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nrf: allocate two I2C on CPB
1 parent 56ac41f commit e35eb08

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2 files changed

+31
-9
lines changed

2 files changed

+31
-9
lines changed

ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk

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Original file line numberDiff line numberDiff line change
@@ -24,3 +24,10 @@ NRF_DEFINES += -DNRF52840_XXAA -DNRF52840
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QSPI_FLASH_FILESYSTEM = 1
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EXTERNAL_FLASH_DEVICE_COUNT = 1
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EXTERNAL_FLASH_DEVICES = "GD25Q16C"
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# Allocate two, not just one I2C peripheral for CPB, so that we have both
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# on-board and off-board I2C available.
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# When SPIM3 becomes available we'll be able to have two I2C and two SPI peripherals.
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# We use a CFLAGS define here because there are include order issues
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# if we try to include "mpconfigport.h" into nrfx_config.h .
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CFLAGS += -DCIRCUITPY_NRF_NUM_I2C=2

ports/nrf/nrfx_config.h

Lines changed: 24 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -5,12 +5,9 @@
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#define NRFX_POWER_ENABLED 1
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#define NRFX_POWER_CONFIG_IRQ_PRIORITY 7
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8-
// Turn on nrfx supported workarounds for errata in Rev1/Rev2 of nRF52832
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#ifdef NRF52832_XXAA
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#define NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1
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#endif
12-
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// NOTE: THIS WORKAROUND CAUSES BLE CODE TO CRASH; tested on 2019-03-11.
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// NOTE: THIS WORKAROUND CAUSES BLE CODE TO CRASH.
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// It doesn't work with the SoftDevice.
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// See https://devzone.nordicsemi.com/f/nordic-q-a/33982/sdk-15-software-crash-during-spi-session
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// Turn on nrfx supported workarounds for errata in Rev1 of nRF52840
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#ifdef NRF52840_XXAA
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// #define NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED 1
@@ -24,11 +21,26 @@
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// so out of the box TWIM0/SPIM0 and TWIM1/SPIM1 cannot be shared
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// between common-hal/busio/I2C.c and SPI.c.
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// We could write an interrupt handler that checks whether it's
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// being used for SPI or I2C, but perhaps two I2C's and 1-2 SPI's are good enough for now.
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// being used for SPI or I2C, but perhaps one I2C and two SPI or two I2C and one SPI
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// are good enough for now.
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// CIRCUITPY_NRF_NUM_I2C is 1 or 2 to choose how many I2C (TWIM) peripherals
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// to provide.
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// This can go away once we have SPIM3 working: then we can have two
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// I2C and two SPI.
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#ifndef CIRCUITPY_NRF_NUM_I2C
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#define CIRCUITPY_NRF_NUM_I2C 1
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#endif
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#if CIRCUITPY_NRF_NUM_I2C != 1 && CIRCUITPY_NRF_NUM_I2C != 2
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# error CIRCUITPY_NRF_NUM_I2C must be 1 or 2
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#endif
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// Enable SPIM1, SPIM2 and SPIM3 (if available)
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// No conflict with TWIM0.
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#if CIRCUITPY_NRF_NUM_I2C == 1
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#define NRFX_SPIM1_ENABLED 1
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#endif
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#define NRFX_SPIM2_ENABLED 1
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// DON'T ENABLE SPIM3 DUE TO ANOMALY WORKAROUND FAILURE (SEE ABOVE).
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// #ifdef NRF52840_XXAA
@@ -45,10 +57,13 @@
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// QSPI
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#define NRFX_QSPI_ENABLED 1
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48-
// TWI aka. I2C; enable a single bus: TWIM0 (no conflict with SPIM1 and SPIM2)
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// TWI aka. I2C; always enable TWIM0 (no conflict with SPIM1 and SPIM2)
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#define NRFX_TWIM_ENABLED 1
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#define NRFX_TWIM0_ENABLED 1
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//#define NRFX_TWIM1_ENABLED 1
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#if CIRCUITPY_NRF_NUM_I2C == 2
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#define NRFX_TWIM1_ENABLED 1
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#endif
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#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY 7
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#define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY NRF_TWIM_FREQ_400K

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