@@ -140,7 +140,7 @@ enum status_code tc_init(
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/* Array of PM APBC mask bit position for different TC instances */
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uint16_t inst_pm_apbmask [] = TC_INST_PM_APBCMASK ;
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- struct system_pinmux_config pin_config ;
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+ // struct system_pinmux_config pin_config;
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struct system_gclk_chan_config gclk_chan_config ;
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#if TC_ASYNC == true
@@ -169,15 +169,15 @@ enum status_code tc_init(
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return STATUS_ERR_INVALID_ARG ;
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}
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#else
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- /* Check if odd numbered TC modules are being configured in 32-bit
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- * counter size. Only even numbered counters are allowed to be
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- * configured in 32-bit counter size.
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- */
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- if ((config -> counter_size == TC_COUNTER_SIZE_32BIT ) &&
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- ((instance + TC_INSTANCE_OFFSET ) & 0x01 )) {
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- Assert (false);
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- return STATUS_ERR_INVALID_ARG ;
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- }
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+ // / * Check if odd numbered TC modules are being configured in 32-bit
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+ // * counter size. Only even numbered counters are allowed to be
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+ // * configured in 32-bit counter size.
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+ // */
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+ // if ((config->counter_size == TC_COUNTER_SIZE_32BIT) &&
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+ // ((instance + TC_INSTANCE_OFFSET) & 0x01)) {
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+ // Assert(false);
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+ // return STATUS_ERR_INVALID_ARG;
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+ // }
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#endif
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/* Make the counter size variable in the module_inst struct reflect
@@ -200,35 +200,35 @@ enum status_code tc_init(
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return STATUS_ERR_DENIED ;
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}
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- /* Set up the TC PWM out pin for channel 0 */
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- if (config -> pwm_channel [0 ].enabled ) {
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- system_pinmux_get_config_defaults (& pin_config );
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- pin_config .mux_position = config -> pwm_channel [0 ].pin_mux ;
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- pin_config .direction = SYSTEM_PINMUX_PIN_DIR_OUTPUT ;
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- system_pinmux_pin_set_config (
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- config -> pwm_channel [0 ].pin_out , & pin_config );
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- }
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-
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- /* Set up the TC PWM out pin for channel 1 */
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- if (config -> pwm_channel [1 ].enabled ) {
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- system_pinmux_get_config_defaults (& pin_config );
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- pin_config .mux_position = config -> pwm_channel [1 ].pin_mux ;
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- pin_config .direction = SYSTEM_PINMUX_PIN_DIR_OUTPUT ;
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- system_pinmux_pin_set_config (
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- config -> pwm_channel [1 ].pin_out , & pin_config );
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- }
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+ // / * Set up the TC PWM out pin for channel 0 */
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+ // if (config->pwm_channel[0].enabled) {
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+ // system_pinmux_get_config_defaults(&pin_config);
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+ // pin_config.mux_position = config->pwm_channel[0].pin_mux;
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+ // pin_config.direction = SYSTEM_PINMUX_PIN_DIR_OUTPUT;
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+ // system_pinmux_pin_set_config(
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+ // config->pwm_channel[0].pin_out, &pin_config);
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+ // }
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+ //
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+ // / * Set up the TC PWM out pin for channel 1 */
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+ // if (config->pwm_channel[1].enabled) {
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+ // system_pinmux_get_config_defaults(&pin_config);
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+ // pin_config.mux_position = config->pwm_channel[1].pin_mux;
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+ // pin_config.direction = SYSTEM_PINMUX_PIN_DIR_OUTPUT;
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+ // system_pinmux_pin_set_config(
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+ // config->pwm_channel[1].pin_out, &pin_config);
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+ // }
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/* Enable the user interface clock in the PM */
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system_apb_clock_set_mask (SYSTEM_CLOCK_APB_APBC ,
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inst_pm_apbmask [instance ]);
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- /* Enable the slave counter if counter_size is 32-bit */
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- if ((config -> counter_size == TC_COUNTER_SIZE_32BIT ))
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- {
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- /* Enable the user interface clock in the PM */
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- system_apb_clock_set_mask (SYSTEM_CLOCK_APB_APBC ,
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- inst_pm_apbmask [instance + 1 ]);
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- }
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+ // / * Enable the slave counter if counter_size is 32-bit */
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+ // if ((config->counter_size == TC_COUNTER_SIZE_32BIT))
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+ // {
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+ // /* Enable the user interface clock in the PM */
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+ // system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC,
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+ // inst_pm_apbmask[instance + 1]);
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+ // }
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/* Setup clock for module */
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system_gclk_chan_get_config_defaults (& gclk_chan_config );
@@ -299,34 +299,34 @@ enum status_code tc_init(
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/* Switch for TC counter size */
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switch (module_inst -> counter_size ) {
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case TC_COUNTER_SIZE_8BIT :
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- while (tc_is_syncing (module_inst )) {
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- /* Wait for sync */
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- }
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-
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- hw -> COUNT8 .COUNT .reg =
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- config -> counter_8_bit .value ;
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-
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-
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- while (tc_is_syncing (module_inst )) {
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- /* Wait for sync */
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- }
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-
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- hw -> COUNT8 .PER .reg =
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- config -> counter_8_bit .period ;
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-
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- while (tc_is_syncing (module_inst )) {
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- /* Wait for sync */
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- }
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-
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- hw -> COUNT8 .CC [0 ].reg =
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- config -> counter_8_bit .compare_capture_channel [0 ];
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-
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- while (tc_is_syncing (module_inst )) {
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- /* Wait for sync */
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- }
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-
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- hw -> COUNT8 .CC [1 ].reg =
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- config -> counter_8_bit .compare_capture_channel [1 ];
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+ // while (tc_is_syncing(module_inst)) {
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+ // /* Wait for sync */
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+ // }
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+ //
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+ // hw->COUNT8.COUNT.reg =
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+ // config->counter_8_bit.value;
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+ //
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+ //
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+ // while (tc_is_syncing(module_inst)) {
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+ // /* Wait for sync */
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+ // }
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+ //
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+ // hw->COUNT8.PER.reg =
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+ // config->counter_8_bit.period;
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+ //
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+ // while (tc_is_syncing(module_inst)) {
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+ // /* Wait for sync */
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+ // }
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+ //
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+ // hw->COUNT8.CC[0].reg =
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+ // config->counter_8_bit.compare_capture_channel[0];
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+ //
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+ // while (tc_is_syncing(module_inst)) {
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+ // /* Wait for sync */
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+ // }
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+ //
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+ // hw->COUNT8.CC[1].reg =
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+ // config->counter_8_bit.compare_capture_channel[1];
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return STATUS_OK ;
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@@ -355,26 +355,26 @@ enum status_code tc_init(
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return STATUS_OK ;
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case TC_COUNTER_SIZE_32BIT :
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- while (tc_is_syncing (module_inst )) {
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- /* Wait for sync */
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- }
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-
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- hw -> COUNT32 .COUNT .reg
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- = config -> counter_32_bit .value ;
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-
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- while (tc_is_syncing (module_inst )) {
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- /* Wait for sync */
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- }
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-
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- hw -> COUNT32 .CC [0 ].reg =
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- config -> counter_32_bit .compare_capture_channel [0 ];
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-
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- while (tc_is_syncing (module_inst )) {
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- /* Wait for sync */
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- }
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-
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- hw -> COUNT32 .CC [1 ].reg =
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- config -> counter_32_bit .compare_capture_channel [1 ];
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+ // while (tc_is_syncing(module_inst)) {
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+ // /* Wait for sync */
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+ // }
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+ //
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+ // hw->COUNT32.COUNT.reg
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+ // = config->counter_32_bit.value;
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+ //
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+ // while (tc_is_syncing(module_inst)) {
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+ // /* Wait for sync */
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+ // }
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+ //
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+ // hw->COUNT32.CC[0].reg =
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+ // config->counter_32_bit.compare_capture_channel[0];
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+ //
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+ // while (tc_is_syncing(module_inst)) {
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+ // /* Wait for sync */
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+ // }
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+ //
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+ // hw->COUNT32.CC[1].reg =
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+ // config->counter_32_bit.compare_capture_channel[1];
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return STATUS_OK ;
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}
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