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Changed the order of SPI configuration and activation.
SPI should be configured while chip select pin is disabled. Tested with external flash on STM32 F4VE board.
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supervisor/shared/external_flash/spi_flash.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -105,12 +105,12 @@ bool spi_flash_sector_command(uint8_t command, uint32_t address) {
105105

106106
bool spi_flash_write_data(uint32_t address, uint8_t *data, uint32_t data_length) {
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uint8_t request[4] = {CMD_PAGE_PROGRAM, 0x00, 0x00, 0x00};
108+
common_hal_busio_spi_configure(&supervisor_flash_spi_bus, spi_flash_baudrate, 0, 0, 8);
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// Write the SPI flash write address into the bytes following the command byte.
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address_to_bytes(address, request + 1);
110111
if (!flash_enable()) {
111112
return false;
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}
113-
common_hal_busio_spi_configure(&supervisor_flash_spi_bus, spi_flash_baudrate, 0, 0, 8);
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bool status = common_hal_busio_spi_write(&supervisor_flash_spi_bus, request, 4);
115115
if (status) {
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status = common_hal_busio_spi_write(&supervisor_flash_spi_bus, data, data_length);
@@ -126,12 +126,12 @@ bool spi_flash_read_data(uint32_t address, uint8_t *data, uint32_t data_length)
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request[0] = CMD_FAST_READ_DATA;
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command_length = 5;
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}
129+
common_hal_busio_spi_configure(&supervisor_flash_spi_bus, spi_flash_baudrate, 0, 0, 8);
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// Write the SPI flash read address into the bytes following the command byte.
130131
address_to_bytes(address, request + 1);
131132
if (!flash_enable()) {
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return false;
133134
}
134-
common_hal_busio_spi_configure(&supervisor_flash_spi_bus, spi_flash_baudrate, 0, 0, 8);
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bool status = common_hal_busio_spi_write(&supervisor_flash_spi_bus, request, command_length);
136136
if (status) {
137137
status = common_hal_busio_spi_read(&supervisor_flash_spi_bus, data, data_length, 0xff);

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