55// SPDX-License-Identifier: MIT
66#include "timers.h"
77
8- #include "py/mpconfig.h"
98#include "py/obj.h"
109#include "py/runtime.h"
10+ #include "ports/stm/peripherals/periph.h"
1111
1212#include "shared-bindings/microcontroller/__init__.h"
1313#include "shared-bindings/microcontroller/Pin.h"
14+ #ifdef STM32H7
15+ #include "stm32h7xx_hal_rcc.h"
16+ #endif
1417
15- #if !(CPY_STM32H7 )
1618
1719#define ALL_CLOCKS 0xFFFF
1820#define NULL_IRQ 0xFF
@@ -161,17 +163,29 @@ uint32_t stm_peripherals_timer_get_source_freq(TIM_TypeDef *timer) {
161163 // TIM{1,8,9,10,11} are on APB2
162164 source = HAL_RCC_GetPCLK2Freq ();
163165 // 0b0xx means not divided; 0b100 is divide by 2; 0b101 by 4; 0b110 by 8; 0b111 by 16.
166+ #ifdef STM32H7
167+ clk_div = (RCC -> CFGR & RCC_D2CFGR_D2PPRE2 );
168+ #else
164169 clk_div = (RCC -> CFGR & RCC_CFGR_PPRE2 ) >> RCC_CFGR_PPRE2_Pos ;
170+ #endif
165171 } else {
166172 // TIM{2,3,4,5,6,7,12,13,14} are on APB1
167173 source = HAL_RCC_GetPCLK1Freq ();
168174 // 0b0xx means not divided; 0b100 is divide by 2; 0b101 by 4; 0b110 by 8; 0b111 by 16.
175+ #ifdef STM32H7
176+ clk_div = (RCC -> CFGR & RCC_D1CFGR_D1PPRE_Msk );
177+ #else
169178 clk_div = (RCC -> CFGR & RCC_CFGR_PPRE1 ) >> RCC_CFGR_PPRE1_Pos ;
179+ #endif
170180 }
171181
172182 // Only some STM32's have TIMPRE.
173183 #if defined(RCC_CFGR_TIMPRE )
184+ #ifdef STM32H7
185+ uint32_t timpre = RCC -> CFGR & RCC_CFGR_TIMPRE ;
186+ #else
174187 uint32_t timpre = RCC -> DCKCFGR & RCC_CFGR_TIMPRE ;
188+ #endif
175189 if (timpre == 0 ) {
176190 if (clk_div >= 0b100 ) {
177191 source *= 2 ;
@@ -287,7 +301,7 @@ size_t stm_peripherals_timer_get_index(TIM_TypeDef *instance) {
287301 return ~(size_t )0 ;
288302}
289303
290- void tim_clock_enable (uint16_t mask ) {
304+ void tim_clock_enable (uint32_t mask ) {
291305 #ifdef TIM1
292306 if (mask & (1 << 0 )) {
293307 __HAL_RCC_TIM1_CLK_ENABLE ();
@@ -349,9 +363,24 @@ void tim_clock_enable(uint16_t mask) {
349363 __HAL_RCC_TIM14_CLK_ENABLE ();
350364 }
351365 #endif
366+ #ifdef TIM15
367+ if (mask & (1 << 14 )) {
368+ __HAL_RCC_TIM15_CLK_ENABLE ();
369+ }
370+ #endif
371+ #ifdef TIM16
372+ if (mask & (1 << 15 )) {
373+ __HAL_RCC_TIM16_CLK_ENABLE ();
374+ }
375+ #endif
376+ #ifdef TIM17
377+ if (mask & (1 << 16 )) {
378+ __HAL_RCC_TIM17_CLK_ENABLE ();
379+ }
380+ #endif
352381}
353382
354- void tim_clock_disable (uint16_t mask ) {
383+ void tim_clock_disable (uint32_t mask ) {
355384 #ifdef TIM1
356385 if (mask & (1 << 0 )) {
357386 __HAL_RCC_TIM1_CLK_DISABLE ();
@@ -413,6 +442,22 @@ void tim_clock_disable(uint16_t mask) {
413442 __HAL_RCC_TIM14_CLK_DISABLE ();
414443 }
415444 #endif
445+ #ifdef TIM15
446+ if (mask & (1 << 14 )) {
447+ __HAL_RCC_TIM15_CLK_DISABLE ();
448+ }
449+ #endif
450+ #ifdef TIM16
451+ if (mask & (1 << 15 )) {
452+ __HAL_RCC_TIM16_CLK_DISABLE ();
453+ }
454+ #endif
455+ #ifdef TIM17
456+ if (mask & (1 << 16 )) {
457+ __HAL_RCC_TIM17_CLK_DISABLE ();
458+ }
459+ #endif
460+
416461}
417462
418463static void callback_router (size_t index ) {
@@ -421,75 +466,105 @@ static void callback_router(size_t index) {
421466 }
422467}
423468
469+ #ifdef TIM1
424470void TIM1_CC_IRQHandler (void ) { // Advanced timer
425471 callback_router (1 );
426472}
473+ #endif
427474
475+ #ifdef TIM2
428476void TIM2_IRQHandler (void ) {
429477 callback_router (2 );
430478}
479+ #endif
431480
481+ #ifdef TIM3
432482void TIM3_IRQHandler (void ) {
433483 callback_router (3 );
434484}
485+ #endif
435486
487+ #ifdef TIM4
436488void TIM4_IRQHandler (void ) {
437489 callback_router (4 );
438490}
491+ #endif
439492
493+ #ifdef TIM5
440494void TIM5_IRQHandler (void ) {
441495 callback_router (5 );
442496}
497+ #endif
443498
499+ #ifdef TIM6
444500void TIM6_DAC_IRQHandler (void ) { // Basic timer (DAC)
445501 callback_router (6 );
446502}
503+ #endif
447504
505+ #ifdef TIM7
448506void TIM7_IRQHandler (void ) { // Basic timer
449507 callback_router (7 );
450508}
509+ #endif
451510
511+ #ifdef TIM8
452512void TIM8_CC_IRQHandler (void ) { // Advanced timer
453513 callback_router (8 );
454514}
515+ #endif
455516
456517// Advanced timer interrupts are currently unused.
518+ #ifdef TIM9
457519void TIM1_BRK_TIM9_IRQHandler (void ) {
458520 callback_router (9 );
459521}
522+ #endif
460523
524+ #ifdef TIM10
461525void TIM1_UP_TIM10_IRQHandler (void ) {
462526 callback_router (10 );
463527}
528+ #endif
464529
530+ #ifdef TIM11
465531void TIM1_TRG_COM_TIM11_IRQHandler (void ) {
466532 callback_router (11 );
467533}
534+ #endif
468535
536+ #ifdef TIM12
469537void TIM8_BRK_TIM12_IRQHandler (void ) {
470538 callback_router (12 );
471539}
540+ #endif
472541
542+ #ifdef TIM13
473543void TIM8_UP_TIM13_IRQHandler (void ) {
474544 callback_router (13 );
475545}
546+ #endif
476547
548+ #ifdef TIM14
477549void TIM8_TRG_COM_TIM14_IRQHandler (void ) {
478550 callback_router (14 );
479551}
552+ #endif
480553
481- #if ( CPY_STM32H7 )
554+ #ifdef TIM15
482555void TIM15_IRQHandler (void ) {
483556 callback_router (15 );
484557}
558+ #endif
485559
560+ #ifdef TIM16
486561void TIM16_IRQHandler (void ) {
487562 callback_router (16 );
488563}
564+ #endif
489565
566+ #ifdef TIM17
490567void TIM17_IRQHandler (void ) {
491568 callback_router (17 );
492569}
493570#endif
494-
495- #endif
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