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Add rest of board pin definitions and peripheral pin cleanup
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+69
-23
lines changed

3 files changed

+69
-23
lines changed

ports/stm/boards/daisy_seed_with_sdram/pins.c

Lines changed: 48 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,8 +6,56 @@
66

77
#include "shared-bindings/board/__init__.h"
88

9+
// See pinout on Daisy Seed product page
10+
// https://electro-smith.com/products/daisy-seed?variant=45234245108004
911
static const mp_rom_map_elem_t board_module_globals_table[] = {
1012
{MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PC07)},
1113
{MP_ROM_QSTR(MP_QSTR_BOOT), MP_ROM_PTR(&pin_PG03)},
14+
{MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB12)},
15+
{MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PC11)},
16+
{MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PC10)},
17+
{MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PC09)},
18+
{MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PC08)},
19+
{MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PD02)},
20+
{MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PC12)},
21+
{MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PG10)},
22+
{MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PG11)},
23+
{MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PB04)},
24+
{MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PB05)},
25+
{MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PB08)},
26+
{MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PB09)},
27+
{MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PB06)},
28+
{MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PB07)},
29+
30+
{MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PC00)},
31+
{MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PC00)},
32+
{MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PA03)},
33+
{MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA03)},
34+
{MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PB01)},
35+
{MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB01)},
36+
{MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_PA07)},
37+
{MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07)},
38+
{MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_PA06)},
39+
{MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA06)},
40+
{MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_PC01)},
41+
{MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PC01)},
42+
{MP_ROM_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_PC04)},
43+
{MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PC04)},
44+
{MP_ROM_QSTR(MP_QSTR_D22), MP_ROM_PTR(&pin_PA05)},
45+
{MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA05)},
46+
{MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_PA04)},
47+
{MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA04)},
48+
{MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_PA01)},
49+
{MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PA01)},
50+
{MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_PA00)},
51+
{MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA00)},
52+
{MP_ROM_QSTR(MP_QSTR_D26), MP_ROM_PTR(&pin_PD11)},
53+
{MP_ROM_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_PG09)},
54+
{MP_ROM_QSTR(MP_QSTR_D28), MP_ROM_PTR(&pin_PA02)},
55+
{MP_ROM_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_PA02)},
56+
{MP_ROM_QSTR(MP_QSTR_D29), MP_ROM_PTR(&pin_PB14)},
57+
{MP_ROM_QSTR(MP_QSTR_D30), MP_ROM_PTR(&pin_PB15)},
58+
1259
};
60+
1361
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);

ports/stm/peripherals/stm32h7/stm32h750xx/periph.c

Lines changed: 14 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -9,8 +9,10 @@
99
#include "peripherals/pins.h"
1010
#include "peripherals/periph.h"
1111

12+
// See alternate functions tables in the STM32H750xx datasheet
13+
1214
// I2C
13-
I2C_TypeDef *mcu_i2c_banks[4] = {I2C1, I2C2, I2C3, I2C4};
15+
I2C_TypeDef *mcu_i2c_banks[MAX_I2C] = {I2C1, I2C2, I2C3, I2C4};
1416

1517
const mcu_periph_obj_t mcu_i2c_sda_list[12] = {
1618
PERIPH(1, 4, &pin_PB07),
@@ -44,9 +46,9 @@ const mcu_periph_obj_t mcu_i2c_scl_list[12] = {
4446

4547
// SPI
4648

47-
SPI_TypeDef *mcu_spi_banks[6] = {SPI1, SPI2, SPI3, SPI4, SPI5, SPI6};
49+
SPI_TypeDef *mcu_spi_banks[MAX_SPI] = {SPI1, SPI2, SPI3, SPI4, SPI5, SPI6};
4850

49-
const mcu_periph_obj_t mcu_spi_sck_list[19] = {
51+
const mcu_periph_obj_t mcu_spi_sck_list[18] = {
5052
PERIPH(1, 5, &pin_PA05),
5153
PERIPH(6, 8, &pin_PA05),
5254
PERIPH(2, 5, &pin_PA09),
@@ -65,10 +67,9 @@ const mcu_periph_obj_t mcu_spi_sck_list[19] = {
6567
PERIPH(6, 5, &pin_PG13),
6668
PERIPH(5, 5, &pin_PH06),
6769
PERIPH(2, 5, &pin_PI01),
68-
PERIPH(5, 5, &pin_PI00),
6970
};
7071

71-
const mcu_periph_obj_t mcu_spi_mosi_list[19] = {
72+
const mcu_periph_obj_t mcu_spi_mosi_list[18] = {
7273
PERIPH(1, 5, &pin_PA07),
7374
PERIPH(6, 8, &pin_PA07),
7475
PERIPH(3, 7, &pin_PB02),
@@ -87,10 +88,9 @@ const mcu_periph_obj_t mcu_spi_mosi_list[19] = {
8788
PERIPH(5, 5, &pin_PF11),
8889
PERIPH(6, 5, &pin_PG14),
8990
PERIPH(2, 5, &pin_PI03),
90-
PERIPH(5, 5, &pin_PI10),
9191
};
9292

93-
const mcu_periph_obj_t mcu_spi_miso_list[16] = {
93+
const mcu_periph_obj_t mcu_spi_miso_list[15] = {
9494
PERIPH(1, 5, &pin_PA06),
9595
PERIPH(6, 8, &pin_PA06),
9696
PERIPH(1, 5, &pin_PB04),
@@ -106,15 +106,15 @@ const mcu_periph_obj_t mcu_spi_miso_list[16] = {
106106
PERIPH(6, 5, &pin_PG12),
107107
PERIPH(5, 5, &pin_PH07),
108108
PERIPH(2, 5, &pin_PI02),
109-
PERIPH(5, 5, &pin_PI11),
110109
};
111110

112111
// UART
113112

114-
USART_TypeDef *mcu_uart_banks[MAX_UART] = {USART1, USART2, USART3, UART4, UART5, USART6, UART7, UART8, LPUART1};
115-
bool mcu_uart_has_usart[MAX_UART] = {true, true, true, false, false, true, false, false, false};
113+
USART_TypeDef *mcu_uart_banks[MAX_UART] = {USART1, USART2, USART3, UART4, UART5, USART6, UART7, UART8};
114+
// circuitpython doesn't implement USART
115+
// bool mcu_uart_has_usart[MAX_UART] = {true, true, true, false, false, true, false, false, false};
116116

117-
const mcu_periph_obj_t mcu_uart_tx_list[25] = {
117+
const mcu_periph_obj_t mcu_uart_tx_list[24] = {
118118
PERIPH(4, 8, &pin_PA00),
119119
PERIPH(2, 7, &pin_PA02),
120120
PERIPH(1, 7, &pin_PA09),
@@ -138,11 +138,10 @@ const mcu_periph_obj_t mcu_uart_tx_list[25] = {
138138
PERIPH(7, 7, &pin_PE08),
139139
PERIPH(7, 7, &pin_PF07),
140140
PERIPH(6, 7, &pin_PG14),
141-
PERIPH(4, 8, &pin_PI13),
142-
PERIPH(8, 8, &pin_PI08),
141+
PERIPH(4, 8, &pin_PH13),
143142
};
144143

145-
const mcu_periph_obj_t mcu_uart_rx_list[26] = {
144+
const mcu_periph_obj_t mcu_uart_rx_list[25] = {
146145
PERIPH(4, 8, &pin_PA01),
147146
PERIPH(2, 7, &pin_PA03),
148147
PERIPH(7, 11, &pin_PA08),
@@ -166,9 +165,8 @@ const mcu_periph_obj_t mcu_uart_rx_list[26] = {
166165
PERIPH(7, 7, &pin_PE07),
167166
PERIPH(7, 7, &pin_PF06),
168167
PERIPH(6, 7, &pin_PG09),
169-
PERIPH(4, 8, &pin_PI14),
168+
PERIPH(4, 8, &pin_PH14),
170169
PERIPH(4, 8, &pin_PI09),
171-
PERIPH(8, 8, &pin_PI09),
172170
};
173171

174172
// Timers

ports/stm/peripherals/stm32h7/stm32h750xx/periph.h

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -7,24 +7,24 @@
77
#pragma once
88

99
// I2C
10-
extern I2C_TypeDef *mcu_i2c_banks[4];
10+
extern I2C_TypeDef *mcu_i2c_banks[MAX_I2C];
1111

1212
extern const mcu_periph_obj_t mcu_i2c_sda_list[12];
1313
extern const mcu_periph_obj_t mcu_i2c_scl_list[12];
1414

1515
// SPI
16-
extern SPI_TypeDef *mcu_spi_banks[6];
16+
extern SPI_TypeDef *mcu_spi_banks[MAX_SPI];
1717

18-
extern const mcu_periph_obj_t mcu_spi_sck_list[19];
19-
extern const mcu_periph_obj_t mcu_spi_mosi_list[19];
20-
extern const mcu_periph_obj_t mcu_spi_miso_list[16];
18+
extern const mcu_periph_obj_t mcu_spi_sck_list[18];
19+
extern const mcu_periph_obj_t mcu_spi_mosi_list[18];
20+
extern const mcu_periph_obj_t mcu_spi_miso_list[15];
2121

2222
// UART
2323
extern USART_TypeDef *mcu_uart_banks[MAX_UART];
2424
extern bool mcu_uart_has_usart[MAX_UART];
2525

26-
extern const mcu_periph_obj_t mcu_uart_tx_list[25];
27-
extern const mcu_periph_obj_t mcu_uart_rx_list[26];
26+
extern const mcu_periph_obj_t mcu_uart_tx_list[24];
27+
extern const mcu_periph_obj_t mcu_uart_rx_list[25];
2828

2929
// Timers
3030
#define TIM_BANK_ARRAY_LEN 14

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