Add MIMXRT1176 (i.MX RT1170) support with flash boot

Add support for MIMXRT1176 including direct flash boot (XIP) mode.

Build system:
- Add FLASH_BUILD=1 option for flash-resident builds
- Fix UF2_MIMXRT1176_ADDR to 0x30000400 (FCFB at 0x400 offset)
- Use MCU-specific memory.ld for MIMXRT1176

Linker scripts:
- Add MIMXRT1176_flash.ld for XIP boot configuration
- Update MIMXRT1176_memory.ld to support both RAM and flash builds

Flash operations:
- Fix SCB_InvalidateDCache_by_Addr to use absolute address instead of
  offset (was causing cache corruption on Cortex-M7)
- Add XIP detection to skip FlexSPI re-init when running from flash
- Add ROM_API_Init() call required for MIMXRT1176

USB support:
- Add optional USB_PWR_PINMUX for boards with USB power control
- Fix USB PHY PLL reference clock for RT1176 (24MHz, not 480MHz)

Board support:
- Add imxrt1170_evk board with clock configuration supporting both
  RAM (SDP) and flash (XIP) boot modes

Other fixes:
- Fix CFG_TUSB_MEM_ALIGN to 32 bytes for M7 DCache compatibility
- Add MIMXRT1176-specific sources to family.cmake
- Update README with RT1170-EVK and FLASH_BUILD documentation

Author: APIUM

ports/mimxrt10xx/Makefile

@@ -7,10 +7,26 @@ FLASH_BIN_ADDR = $(UF2_$(MCU)_WRITE_ADDR)
 include ../make.mk
 include port.mk
 
+# Support flash-resident builds with FLASH_BUILD=1
+# Default is RAM build for SDP loading
+# MIMXRT1176 uses its own memory layout file
+ifeq ($(MCU),MIMXRT1176)
+MEMORY_LD = $(PORT_DIR)/linker/$(MCU)_memory.ld
+else
+MEMORY_LD = $(PORT_DIR)/linker/memory.ld
+endif
+
+ifeq ($(FLASH_BUILD),1)
+LD_FILES ?= \
+  $(PORT_DIR)/linker/$(MCU)_flash.ld \
+  $(MEMORY_LD) \
+  $(PORT_DIR)/linker/common.ld
+else
 LD_FILES ?= \
   $(PORT_DIR)/linker/$(MCU)_ram.ld \
-  $(PORT_DIR)/linker/memory.ld \
+  $(MEMORY_LD) \
   $(PORT_DIR)/linker/common.ld
+endif
 
 SRC_C += \
 	$(PORT_DIR)/boards.c \
@@ -57,16 +73,24 @@ UF2_MIMXRT1042_ADDR= 0x60000000
 UF2_MIMXRT1052_ADDR= 0x60000000
 UF2_MIMXRT1062_ADDR= 0x60000000
 UF2_MIMXRT1064_ADDR= 0x70000000
-UF2_MIMXRT1176_ADDR= 0x30000000
+UF2_MIMXRT1176_ADDR= 0x30000400
+
+# WRITE_ADDR used by flash-pyocd-bin target - same as UF2_ADDR for most chips
+UF2_MIMXRT1176_WRITE_ADDR= 0x30000400
 
 SDP_PID = $(SDP_$(MCU)_PID)
 UF2_ADDR = $(UF2_$(MCU)_ADDR)
 
 DBL_TAP_REG_ADDR = 0x400D410C
 
 # extract _fcfb_origin and _ivt_origin from linker file
+ifeq ($(FLASH_BUILD),1)
+FCFB_ORIGIN := $(shell sed -n 's/_fcfb_origin.*\(0x.*\);/\1/p' $(TOP)/$(PORT_DIR)/linker/$(MCU)_flash.ld)
+IVT_ORIGIN := $(shell sed -n 's/_ivt_origin.*\(0x.*\);/\1/p' $(TOP)/$(PORT_DIR)/linker/$(MCU)_flash.ld)
+else
 FCFB_ORIGIN := $(shell sed -n 's/_fcfb_origin.*\(0x.*\);/\1/p' $(TOP)/$(PORT_DIR)/linker/$(MCU)_ram.ld)
 IVT_ORIGIN := $(shell sed -n 's/_ivt_origin.*\(0x.*\);/\1/p' $(TOP)/$(PORT_DIR)/linker/$(MCU)_ram.ld)
+endif
 
 $(BUILD)/$(OUTNAME).hex: $(BUILD)/$(OUTNAME).elf
 	@echo CREATE $@

ports/mimxrt10xx/README.md

@@ -8,7 +8,7 @@ To initially flash TinyUF2 on your blank board or board that is shipped with oth
 
 ### External Debugger
 
-jlink or pyocd can be used to program .bin file to appropriate address on external flash which is typically **0x60000000** (RT1062) or **0x60000400** (RT1011). This  can be done with `flash-jlink-bin` or `flash-pyocd-bin` make target.
+jlink or pyocd can be used to program .bin file to appropriate address on external flash which is typically **0x60000000** (RT1062), **0x60000400** (RT1011), or **0x30000400** (RT1170). This can be done with `flash-jlink-bin` or `flash-pyocd-bin` make target.
 
 ```
 make BOARD=metro_m7_1011 flash-jlink-bin
@@ -43,12 +43,80 @@ Note: Since SDP with BootROM doesn't requires external debugger and always exist
 
 Double tap to enter bootloader mode, then simply drag & drop `update-tinyuf2_BOARD.uf2` into BOOT drive to update. The update file can be generated by running make with `self-update` target or simply download it from [release page](https://github.com/adafruit/tinyuf2/releases).
 
+## RT1170/RT1176 Support
+
+The RT1170/RT1176 requires a different flashing approach than other RT10xx chips. The SDP (Serial Download Protocol) method used by other chips does not work reliably for RT1170 because:
+- The RT1170 ROM bootloader uses `blhost` protocol instead of `sdphost`
+- Self-programming to flash is disabled for RT1176 builds
+
+**For RT1170, you must use `FLASH_BUILD=1` and flash via a debugger.**
+
+### Building for RT1170
+
+```
+make BOARD=imxrt1170_evk FLASH_BUILD=1 all
+```
+
+This creates a flash-resident (XIP) build that executes directly from flash. Key differences:
+- Uses `MIMXRT1176_flash.ld` linker script (code linked at 0x3000xxxx)
+- Data/BSS placed in DTCM (0x20000000)
+- Clock configuration preserves ROM bootloader settings when running from flash
+
+The flash layout for RT1170 is:
+- **0x30000400**: FCFB (FlexSPI Configuration Block)
+- **0x30001000**: IVT (Image Vector Table)
+- **0x30002000**: Application code (vector table + text)
+
+### RT1170-EVK Boot Switch Settings
+
+The RT1170-EVK/EVKB uses SW1 (4-position DIP switch) to select boot mode:
+
+| Mode  | SW1[1] | SW1[2] | SW1[3] | SW1[4] | Description |
+|-------|--------|--------|--------|--------|-------------|
+| SDP   | OFF    | OFF    | OFF    | ON     | Serial Download Mode (for debugger access) |
+| Flash | OFF    | OFF    | ON     | OFF    | Internal Boot from flash (normal operation) |
+
+Note: OFF = switch down/open, ON = switch up/closed.
+
+### Flashing TinyUF2 to RT1170-EVK
+
+**Requirements:** A debug probe (MCU-Link on the EVK, or external J-Link/CMSIS-DAP) and LinkServer or equivalent flash tool.
+
+**Procedure:**
+
+1. Build the flash-resident version:
+   ```
+   make BOARD=imxrt1170_evk FLASH_BUILD=1 clean all
+   ```
+
+2. Connect the debug probe (MCU-Link is built into the EVK)
+
+3. Set SW1 to Flash boot mode: **0-0-1-0** (only switch 3 ON)
+
+4. Flash the ELF file using LinkServer:
+   ```
+   LinkServer flash MIMXRT1176xxxxx:MIMXRT1170-EVK-CM7-ONLY erase
+   LinkServer flash MIMXRT1176xxxxx:MIMXRT1170-EVK-CM7-ONLY load _build/imxrt1170_evk/tinyuf2-imxrt1170_evk.elf
+   ```
+
+5. Reset the board - TinyUF2 should enumerate as USB mass storage device "RT1170BOOT"
+
+**Alternative using pyocd** (if LinkServer is not available):
+```
+pyocd erase -t mimxrt1170_cm7 --chip
+pyocd load -t mimxrt1170_cm7 _build/imxrt1170_evk/tinyuf2-imxrt1170_evk.elf
+pyocd reset -t mimxrt1170_cm7
+```
+
+Note: pyocd flash programming may not work reliably on all RT1170 boards. LinkServer is recommended.
+
 ## Supported Boards
 
 - [Adafruit Metro M7 1011](https://www.adafruit.com/product/4950)
 - [MIMX RT1010 Evaluation Kit](https://www.nxp.com/design/development-boards/i.mx-evaluation-and-development-boards/i.mx-rt1010-evaluation-kit:MIMXRT1010-EVK)
 - [MIMX RT1020 Evaluation Kit](https://www.nxp.com/design/development-boards/i.mx-evaluation-and-development-boards/i.mx-rt1020-evaluation-kit:MIMXRT1020-EVK)
 - [MIMX RT1060 Evaluation Kit](https://www.nxp.com/design/development-boards/i.mx-evaluation-and-development-boards/mimxrt1060-evk-i.mx-rt1060-evaluation-kit:MIMXRT1060-EVK)
+- [MIMX RT1170 Evaluation Kit](https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/i-mx-rt1170-evaluation-kit:MIMXRT1170-EVK)
 - [Teensy 4.0](https://www.pjrc.com/store/teensy40.html)
 - [Teensy 4.1](https://www.pjrc.com/store/teensy41.html)
 

ports/mimxrt10xx/board_flash.c

@@ -63,6 +63,7 @@ static uint8_t  _flash_cache[SECTOR_SIZE] __attribute__((aligned(4)));
 // compare and write tinyuf2 to flash every time it is running
 #define COMPARE_AND_WRITE_TINYUF2   0
 
+#if !defined(MIMXRT1176_cm7_SERIES)
 // Check if TinyUF2 running in SRAM matches the on flash contents
 static bool compare_tinyuf2_ram_vs_flash(void)
 {
@@ -98,25 +99,50 @@ static void write_tinyuf2_to_flash(void)
   board_flash_flush();
   TUF2_LOG1("TinyUF2 copied to flash.\r\n");
 }
+#endif // !defined(MIMXRT1176_cm7_SERIES)
+
+// Check if we're executing from flash (XIP mode)
+// If PC is in the FlexSPI address range, skip FlexSPI re-initialization
+static inline bool is_running_from_flash(void) {
+  extern char __isr_vector[];
+  uint32_t vec_addr = (uint32_t)__isr_vector;
+  return (vec_addr >= FLEXSPI_FLASH_BASE) && (vec_addr < (FLEXSPI_FLASH_BASE + 0x10000000));
+}
 
 void board_flash_init(void)
 {
-  ROM_FLEXSPI_NorFlash_Init(FLEXSPI_INSTANCE, flash_cfg);
+#if defined(MIMXRT1176_cm7_SERIES)
+  // MIMXRT1176 requires ROM_API_Init to be called before using ROM API functions
+  ROM_API_Init();
+#endif
+
+  // Skip FlexSPI initialization if already running from flash (XIP mode)
+  // Re-initializing FlexSPI while executing from it would crash the system
+  if (!is_running_from_flash()) {
+    ROM_FLEXSPI_NorFlash_Init(FLEXSPI_INSTANCE, flash_cfg);
+  }
 
   // TinyUF2 will copy its image to flash if one of conditions meets:
   // - Boot Mode is '01' i.e Serial Download Mode (BootRom)
   // - Flash FCFB is invalid e.g blank flash
   // - Flash contents does not match running tinyuf2 in SRAM (depending on COMPARE_AND_WRITE_TINYUF2)
+  //
+  // NOTE: Self-flash is disabled for MIMXRT1176 because the code is linked for
+  // RAM addresses and won't run correctly from flash. Use debugger to flash
+  // firmware directly after using UF2 drag-drop.
+#if !defined(MIMXRT1176_cm7_SERIES)
   uint32_t const boot_mode = (SRC->SBMR2 & SRC_SBMR2_BMOD_MASK) >> SRC_SBMR2_BMOD_SHIFT;
   bool const fcfb_valid = (*(uint32_t*) FCFB_START_ADDRESS == FLEXSPI_CFG_BLK_TAG);
   bool const matched_flash = compare_tinyuf2_ram_vs_flash();
 
+  (void) boot_mode; // Used in TUF2_LOG1 which may be disabled
   TUF2_LOG1("Boot Mode = %lu, fcfb_valid = %u, matched_flash = %u\r\n", boot_mode, fcfb_valid, matched_flash);
 
-  if (boot_mode == 1 || !fcfb_valid || !matched_flash)
+  if (!fcfb_valid || !matched_flash)
   {
     write_tinyuf2_to_flash();
   }
+#endif
 }
 
 uint32_t board_flash_size(void)
@@ -151,7 +177,8 @@ void board_flash_flush(void)
     status = ROM_FLEXSPI_NorFlash_Erase(FLEXSPI_INSTANCE, flash_cfg, sector_addr, SECTOR_SIZE);
     __enable_irq();
 
-    SCB_InvalidateDCache_by_Addr((uint32_t *)sector_addr, SECTOR_SIZE);
+    // Use absolute address for cache invalidation, not the offset
+    SCB_InvalidateDCache_by_Addr((uint32_t *)_flash_page_addr, SECTOR_SIZE);
 
     if ( status != kStatus_Success )
     {
@@ -175,7 +202,8 @@ void board_flash_flush(void)
       }
     }
 
-    SCB_InvalidateDCache_by_Addr((uint32_t *)sector_addr, SECTOR_SIZE);
+    // Use absolute address for cache invalidation, not the offset
+    SCB_InvalidateDCache_by_Addr((uint32_t *)_flash_page_addr, SECTOR_SIZE);
   }
 
   _flash_page_addr = NO_CACHE;
@@ -210,9 +238,11 @@ void board_flash_erase_app(void)
   ROM_FLEXSPI_NorFlash_Init(FLEXSPI_INSTANCE, flash_cfg);
   ROM_FLEXSPI_NorFlash_EraseAll(FLEXSPI_INSTANCE, flash_cfg);
 
+#if !defined(MIMXRT1176_cm7_SERIES)
   // write bootloader to flash
   TUF2_LOG1("Erase app firmware: ");
   write_tinyuf2_to_flash();
+#endif
 }
 
 bool board_flash_protect_bootloader(bool protect)

ports/mimxrt10xx/boards.c

@@ -97,9 +97,23 @@ void board_usb_init(void)
 {
   USBPHY_Type* usb_phy;
 
+#ifdef USB_PWR_PINMUX
+  // Enable USB power pin if defined by board (active high)
+  IOMUXC_SetPinMux(USB_PWR_PINMUX, 0);
+  IOMUXC_SetPinConfig(USB_PWR_PINMUX, 0x10B0U);
+  gpio_pin_config_t usb_pwr_config = { kGPIO_DigitalOutput, 1, kGPIO_NoIntmode };
+  GPIO_PinInit(USB_PWR_PORT, USB_PWR_PIN, &usb_pwr_config);
+#endif
+
 #if BOARD_TUD_RHPORT == 0
   // Clock
+#if defined(MIMXRT1176_cm7_SERIES)
+  // RT1176 USB PHY PLL expects reference clock frequency (24MHz from OSC24M)
+  // PLL multiplies by 20 to get 480MHz: 24MHz * 20 = 480MHz
+  CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usbphy480M, 24000000U);
+#else
   CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usbphy480M, 480000000U);
+#endif
   CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M, 480000000U);
 
   #ifdef USBPHY1
@@ -110,7 +124,11 @@ void board_usb_init(void)
 
 #elif BOARD_TUD_RHPORT == 1
   // USB1
+#if defined(MIMXRT1176_cm7_SERIES)
+  CLOCK_EnableUsbhs1PhyPllClock(kCLOCK_Usbphy480M, 24000000U);
+#else
   CLOCK_EnableUsbhs1PhyPllClock(kCLOCK_Usbphy480M, 480000000U);
+#endif
   CLOCK_EnableUsbhs1Clock(kCLOCK_Usb480M, 480000000U);
   usb_phy = USBPHY2;
 #endif
@@ -121,10 +139,19 @@ void board_usb_init(void)
   // Enable all power for normal operation
   usb_phy->PWD = 0;
 
-  // TX Timing
+  // TX Timing - use board-specific values if defined, otherwise defaults
+#ifndef BOARD_USB_PHY_D_CAL
+#define BOARD_USB_PHY_D_CAL     (0x0CU)
+#endif
+#ifndef BOARD_USB_PHY_TXCAL45DP
+#define BOARD_USB_PHY_TXCAL45DP (0x06U)
+#endif
+#ifndef BOARD_USB_PHY_TXCAL45DM
+#define BOARD_USB_PHY_TXCAL45DM (0x06U)
+#endif
   uint32_t phytx = usb_phy->TX;
   phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
-  phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
+  phytx |= USBPHY_TX_D_CAL(BOARD_USB_PHY_D_CAL) | USBPHY_TX_TXCAL45DP(BOARD_USB_PHY_TXCAL45DP) | USBPHY_TX_TXCAL45DM(BOARD_USB_PHY_TXCAL45DM);
   usb_phy->TX = phytx;
 }
 
@@ -376,6 +403,10 @@ void board_uart_init(uint32_t baud_rate)
   uart_config.enableRx = true;
 
   uint32_t freq;
+#if defined(MIMXRT117x_SERIES)
+  // MIMXRT1176 uses different clock API - get clock from root configuration
+  freq = CLOCK_GetRootClockFreq(kCLOCK_Root_Lpuart1);
+#else
   if (CLOCK_GetMux(kCLOCK_UartMux) == 0) /* PLL3 div6 80M */
   {
     freq = (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
@@ -384,6 +415,7 @@ void board_uart_init(uint32_t baud_rate)
   {
     freq = CLOCK_GetOscFreq() / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
   }
+#endif
 
   LPUART_Init(UART_DEV, &uart_config, freq);
 }

ports/mimxrt10xx/boards/imxrt1170_evk/board.cmake

@@ -0,0 +1,16 @@
+set(MCU_VARIANT MIMXRT1176)
+
+set(JLINK_DEVICE MIMXRT1176xxxA_M7)
+set(PYOCD_TARGET mimxrt1170_cm7)
+set(NXPLINK_DEVICE MIMXRT1176xxxxx:MIMXRT1170-EVK)
+
+function(update_board TARGET)
+  target_sources(${TARGET} PRIVATE
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/flash_config.c
+    )
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_MIMXRT1176DVMAA_cm7
+    MIMXRT117x_SERIES
+    )
+endfunction()