tinyuf2 working well with rt1176

Author: hathach

ports/mimxrt10xx/Makefile

@@ -76,13 +76,14 @@ UF2_ADDR = $(UF2_$(MCU)_ADDR)
 
 DBL_TAP_REG_ADDR = 0x400D410C
 
-# extract _fcfb_origin and _ivt_origin from linker file
+# extract _fcfb_origin from linker file
 ifeq ($(FLASH_BUILD),1)
  FCFB_ORIGIN := $(shell sed -n 's/_fcfb_origin.*\(0x.*\);/\1/p' $(TOP)/$(PORT_DIR)/linker/$(MCU)_flash.ld)
 else
   FCFB_ORIGIN := $(shell sed -n 's/_fcfb_origin.*\(0x.*\);/\1/p' $(TOP)/$(PORT_DIR)/linker/$(MCU)_ram.ld)
 endif
 IVT_ORIGIN := $(shell printf "0x%X\n" $$(( ($(FCFB_ORIGIN) & ~0xFFF) + 0x1000 )))
+$(info FCFB_ORIGIN=$(FCFB_ORIGIN) IVT_ORIGIN=$(IVT_ORIGIN))
 
 $(BUILD)/$(OUTNAME).hex: $(BUILD)/$(OUTNAME).elf
 	@echo CREATE $@
@@ -130,9 +131,9 @@ flash-sdp: $(BUILD)/$(OUTNAME).bin
 else
 # RAM build: direct load-image (TinyUF2 runs from RAM and self-programs to flash)
 flash-sdp: $(BUILD)/$(OUTNAME).bin
-	@echo "RT1176 RAM Build: Loading TinyUF2 via blhost load-image..."
-	@echo "TinyUF2 will self-program to flash, then enumerate as USB mass storage."
-	$(BLHOST) -u 0x1fc9,$(SDP_PID) load-image $<
+	@if [ -z "$(BLHOST)" ]; then echo SDPHOST is not found for this machine; exit 1; fi
+	$(PYTHON3) tools/make_ivt0_image.py $< $(BUILD)/$(OUTNAME)_ivt0.bin
+	$(BLHOST) -u 0x1fc9,$(SDP_PID) load-image $(BUILD)/$(OUTNAME)_ivt0.bin
 endif
 else
 flash-sdp: $(BUILD)/$(OUTNAME).bin

ports/mimxrt10xx/board_flash.c

@@ -56,24 +56,15 @@
 
 // Flash Configuration Structure
 extern flexspi_nor_config_t const qspiflash_config;
+static flexspi_nor_config_t       flash_cfg; // local copy since ROM API may modify it
 
 #if defined(MIMXRT1176_cm7_SERIES)
+  #define USE_BLHOST
 extern const flexspi_nor_config_t qspiflash_config_copy;
 extern const BOOT_DATA_T          g_boot_data_copy;
 extern const ivt                  image_vector_table;
-
-// SDP ivt0 image has ivt at address 0, no FCFB in RAM, cooked boot data use the copies in .text
-const uint8_t *fcfb_data = (const uint8_t *)&qspiflash_config_copy;
-const uint8_t *boot_data = (const uint8_t *)&g_boot_data_copy;
-
-#else
-const uint8_t *fcfb_data = (const uint8_t *)&qspiflash_config;
-const uint8_t *boot_data = (const uint8_t *)&g_boot_data;
-
 #endif
 
-static flexspi_nor_config_t flash_cfg;
-
 static uint32_t _flash_page_addr = FLASH_CACHE_INVALID_ADDR;
 static uint8_t  _flash_cache[SECTOR_SIZE] __attribute__((aligned(4)));
 
@@ -85,16 +76,24 @@ static uint8_t  _flash_cache[SECTOR_SIZE] __attribute__((aligned(4)));
 static void write_tinyuf2_to_flash(void) {
   TUF2_LOG1("Writing TinyUF2 image to flash.\r\n");
 
+#ifdef USE_BLHOST
+  // BLHOST load-image with ivt at address 0, no FCFB in RAM, manual write it using copies
   // Write FCFB
-  board_flash_write(FLASH_FCFB_ADDR, fcfb_data, sizeof(flexspi_nor_config_t));
+  board_flash_write(FLASH_FCFB_ADDR, &qspiflash_config_copy, sizeof(flexspi_nor_config_t));
 
   // Write IVT (image vector table + boot data)
   board_flash_write(FLASH_IVT_ADDR, &image_vector_table, sizeof(ivt));
-  board_flash_write(FLASH_IVT_ADDR + sizeof(ivt), boot_data, sizeof(BOOT_DATA_T));
+  board_flash_write(FLASH_IVT_ADDR + sizeof(ivt), &g_boot_data_copy, sizeof(BOOT_DATA_T));
+  // DCD is not used, skip writing it
 
   // Write Interrupts + Text
   const uint8_t *image_data = (const uint8_t *)((uint32_t)_interrupts_origin);
   uint32_t       flash_addr = FLASH_IVT_ADDR + ((uint32_t)_ivt_length);
+#else
+  // SDPHost write from fcfb to end of bootloader
+  const uint8_t *image_data = (const uint8_t *)&qspiflash_config;
+  uint32_t       flash_addr = FLASH_FCFB_ADDR;
+#endif
   const uint32_t flash_end  = FLEXSPI_FLASH_BASE + BOARD_BOOT_LENGTH;
 
   while (flash_addr < flash_end) {

ports/mimxrt10xx/family.cmake

@@ -36,8 +36,6 @@ set(SDP_MIMXRT1062_PID 0x0135)
 set(SDP_MIMXRT1064_PID 0x0135)
 set(SDP_MIMXRT1176_PID 0x013d)
 
-set(FLASHLOADER_MIMXRT1176_PID 0x0073)
-
 set(UF2_MIMXRT1011_ADDR 0x60000400)
 set(UF2_MIMXRT1015_ADDR 0x60000000)
 set(UF2_MIMXRT1021_ADDR 0x60000000)

ports/mimxrt10xx/linker/MIMXRT1011_ram.ld

@@ -11,6 +11,8 @@ _ocram_size = 64K;
 _fcfb_origin = 0x20206400;
 _text_length = 32K - 0x400;
 
+_flash_base = 0x60000000;
+
 /*
  * MIMXRT1011 Memory Layout
  *

ports/mimxrt10xx/linker/MIMXRT1015_ram.ld

@@ -11,6 +11,8 @@ _ocram_size = 64K;
 _fcfb_origin = 0x20208000;
 _text_length = 32K - 0x2400;
 
+_flash_base = 0x60000000;
+
 /*
  * MIMXRT1015 Memory Layout
  *

ports/mimxrt10xx/linker/MIMXRT1021_ram.ld

@@ -11,6 +11,8 @@ _ocram_size = 128K;
 /* The bootrom uses up to 0x20207FFF */
 _fcfb_origin = 0x20208000;
 
+_flash_base = 0x60000000;
+
 /*
  * MIMXRT1021 Memory Layout
  *

ports/mimxrt10xx/linker/MIMXRT1024_ram.ld

@@ -11,6 +11,8 @@ _ocram_size = 128K;
 /* The bootrom uses up to 0x20207FFF */
 _fcfb_origin = 0x20208000;
 
+_flash_base = 0x60000000;
+
 /*
  * MIMXRT1024 Memory Layout
  *

ports/mimxrt10xx/linker/MIMXRT1042_ram.ld

@@ -11,6 +11,8 @@ _ocram_size = 256K;
 /* The bootrom uses up to 0x20207FFF */
 _fcfb_origin = 0x20208000;
 
+_flash_base = 0x60000000;
+
 /*
  * MIMXRT1042 Memory Layout
  *

ports/mimxrt10xx/linker/MIMXRT1052_ram.ld

@@ -11,6 +11,8 @@ _ocram_size = 256K;
 /* The bootrom uses up to 0x20207FFF */
 _fcfb_origin = 0x20208000;
 
+_flash_base = 0x60000000;
+
 /*
  * MIMXRT1052 Memory Layout
  *

ports/mimxrt10xx/linker/MIMXRT1062_ram.ld

@@ -15,6 +15,8 @@ _ocram_size = 256K;
 /* in section 9.6.1.2, so start at 0x1000 */
 _fcfb_origin = 0x20208000;
 
+_flash_base = 0x60000000;
+
 /*
  * MIMXRT1062 Memory Layout
  *