|
| 1 | +include_guard(GLOBAL) |
| 2 | + |
| 3 | +#------------------------------------ |
| 4 | +# Config |
| 5 | +#------------------------------------ |
| 6 | + |
| 7 | +set(UF2_FAMILY_ID 0x7410520a) |
| 8 | +set(MAX32_LIB ${TOP}/lib/mcu/analog/max32/Libraries) |
| 9 | + |
| 10 | +include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) |
| 11 | + |
| 12 | +# enable LTO |
| 13 | +set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) |
| 14 | + |
| 15 | +set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor") |
| 16 | +set(CMAKE_TOOLCHAIN_FILE ${TOP}/cmake/toolchain/arm_${TOOLCHAIN}.cmake) |
| 17 | + |
| 18 | +string(TOUPPER ${MAX_DEVICE} MAX_DEVICE_UPPER) |
| 19 | + |
| 20 | +# 32KB |
| 21 | +set(FLASH_BOOT_SIZE 0x8000) |
| 22 | + |
| 23 | +#------------------------------------ |
| 24 | +# BOARD_TARGET |
| 25 | +#------------------------------------ |
| 26 | +function(family_add_board_target BOARD_TARGET) |
| 27 | + if (TARGET ${BOARD_TARGET}) |
| 28 | + return() |
| 29 | + endif () |
| 30 | + |
| 31 | + add_library(${BOARD_TARGET} STATIC |
| 32 | + ${MAX32_LIB}/CMSIS/Device/Maxim/MAX32690/Source/GCC/startup_max32690.S |
| 33 | + ${MAX32_LIB}/CMSIS/Device/Maxim/MAX32690/Source/heap.c |
| 34 | + ${MAX32_LIB}/CMSIS/Device/Maxim/MAX32690/Source/system_max32690.c |
| 35 | + ${MAX32_LIB}/PeriphDrivers/Source/SYS/mxc_assert.c |
| 36 | + ${MAX32_LIB}/PeriphDrivers/Source/SYS/mxc_delay.c |
| 37 | + ${MAX32_LIB}/PeriphDrivers/Source/SYS/mxc_lock.c |
| 38 | + ${MAX32_LIB}/PeriphDrivers/Source/SYS/nvic_table.c |
| 39 | + ${MAX32_LIB}/PeriphDrivers/Source/SYS/pins_me18.c |
| 40 | + ${MAX32_LIB}/PeriphDrivers/Source/SYS/sys_me18.c |
| 41 | + ${MAX32_LIB}/PeriphDrivers/Source/CTB/ctb_me18.c |
| 42 | + ${MAX32_LIB}/PeriphDrivers/Source/CTB/ctb_reva.c |
| 43 | + ${MAX32_LIB}/PeriphDrivers/Source/CTB/ctb_common.c |
| 44 | + ${MAX32_LIB}/PeriphDrivers/Source/FLC/flc_common.c |
| 45 | + ${MAX32_LIB}/PeriphDrivers/Source/FLC/flc_me18.c |
| 46 | + ${MAX32_LIB}/PeriphDrivers/Source/FLC/flc_reva.c |
| 47 | + ${MAX32_LIB}/PeriphDrivers/Source/GPIO/gpio_common.c |
| 48 | + ${MAX32_LIB}/PeriphDrivers/Source/GPIO/gpio_me18.c |
| 49 | + ${MAX32_LIB}/PeriphDrivers/Source/GPIO/gpio_reva.c |
| 50 | + ${MAX32_LIB}/PeriphDrivers/Source/ICC/icc_me18.c |
| 51 | + ${MAX32_LIB}/PeriphDrivers/Source/ICC/icc_reva.c |
| 52 | + ${MAX32_LIB}/PeriphDrivers/Source/UART/uart_common.c |
| 53 | + ${MAX32_LIB}/PeriphDrivers/Source/UART/uart_me18.c |
| 54 | + ${MAX32_LIB}/PeriphDrivers/Source/UART/uart_revb.c |
| 55 | + ) |
| 56 | + target_include_directories(${BOARD_TARGET} PUBLIC |
| 57 | + # port & board |
| 58 | + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} |
| 59 | + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} |
| 60 | + # sdk |
| 61 | + ${MAX32_LIB}/CMSIS/5.9.0/Core/Include |
| 62 | + ${MAX32_LIB}/CMSIS/Device/Maxim/MAX32690/Include |
| 63 | + ${MAX32_LIB}/PeriphDrivers/Include/MAX32690 |
| 64 | + ${MAX32_LIB}/PeriphDrivers/Source/SYS |
| 65 | + ${MAX32_LIB}/PeriphDrivers/Source/GPIO |
| 66 | + ${MAX32_LIB}/PeriphDrivers/Source/CTB |
| 67 | + ${MAX32_LIB}/PeriphDrivers/Source/ICC |
| 68 | + ${MAX32_LIB}/PeriphDrivers/Source/FLC |
| 69 | + ${MAX32_LIB}/PeriphDrivers/Source/UART |
| 70 | + ) |
| 71 | + |
| 72 | + update_board(${BOARD_TARGET}) |
| 73 | + |
| 74 | + target_compile_definitions(${BOARD_TARGET} PUBLIC |
| 75 | + BOARD_UF2_FAMILY_ID=${UF2_FAMILY_ID} |
| 76 | + TARGET=MAX32690 |
| 77 | + TARGET_REV=0x4131 |
| 78 | + MXC_ASSERT_ENABLE |
| 79 | + MAX32690 |
| 80 | + IAR_PRAGMAS=0 |
| 81 | + FLASH_BOOT_SIZE=${FLASH_BOOT_SIZE} |
| 82 | + ) |
| 83 | + target_compile_options(${BOARD_TARGET} PUBLIC |
| 84 | + ) |
| 85 | + target_link_options(${BOARD_TARGET} PUBLIC |
| 86 | + -nostartfiles |
| 87 | + --specs=nosys.specs --specs=nano.specs |
| 88 | + -Wl,--defsym=__FLASH_BOOT_SIZE=${FLASH_BOOT_SIZE} |
| 89 | + ) |
| 90 | +endfunction() |
| 91 | + |
| 92 | +#------------------------------------ |
| 93 | +# Main target |
| 94 | +#------------------------------------ |
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