[RISCV] Fix wrong use of SiFiveP400GetVLMAX in RISCVSchedSiFiveP600 (llvm#171562)

wangpc-pp · web-flow · commit 13d99e3e6ea5 · 2025-12-10T13:59:13.000+08:00
There is no difference of functionality and I believe this is a
copy-paste mistake. :-)
diff --git a/llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td b/llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
@@ -48,7 +48,7 @@ class SiFiveP600GetVLMAX<string mx, int sew> {
 }
 
 class SiFiveP600StridedLdStLatency<string mx, int sew> {
-  defvar VL = SiFiveP400GetVLMAX<mx, sew>.val;
+  defvar VL = SiFiveP600GetVLMAX<mx, sew>.val;
   int val = !cond(
     !eq(VL, 2):  13,
     !eq(VL, 4):  18,

Original file line number	Diff line number	Diff line change
`@@ -48,7 +48,7 @@ class SiFiveP600GetVLMAX<string mx, int sew> {`
`48`	`48`	`}`
`49`	`49`
`50`	`50`	`class SiFiveP600StridedLdStLatency<string mx, int sew> {`
`51`		`- defvar VL = SiFiveP400GetVLMAX<mx, sew>.val;`
	`51`	`+ defvar VL = SiFiveP600GetVLMAX<mx, sew>.val;`
`52`	`52`	`int val = !cond(`
`53`	`53`	`!eq(VL, 2): 13,`
`54`	`54`	`!eq(VL, 4): 18,`