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Fixed DAC led timing bug and removed redundant LDAC toggles
1 parent 9d15e20 commit 31eb2bc

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4 files changed

+23
-24
lines changed

4 files changed

+23
-24
lines changed

m4/src/Config.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,7 @@ const int drdy[NUM_ADC_BOARDS] = {47,48};//,49,50};
3636
#define led 7 // indicator LED
3737
#define data_pin 6 // data indicator LED
3838
#define err 11 // error indicator LED
39-
const static SPISettings DAC_SPI_SETTINGS(22000000, MSBFIRST, SPI_MODE1);
39+
const static SPISettings DAC_SPI_SETTINGS(22000000, MSBFIRST, SPI_MODE1 );
4040
const static SPISettings ADC_SPI_SETTINGS(8000000, MSBFIRST, SPI_MODE0);
4141
#endif
4242

m4/src/Peripherals/God.h

Lines changed: 10 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -376,8 +376,6 @@ class God {
376376
adcMask = 1;
377377
#endif
378378

379-
TimingUtil::setupTimersTimeSeries(dac_interval_us, adc_interval_us);
380-
381379
setStopFlag(false);
382380
PeripheralCommsController::dataLedOn();
383381

@@ -386,7 +384,6 @@ class God {
386384
DACController::setVoltageNoTransactionNoLdac(dacChannels[i], dacV0s[i]);
387385
nextVoltageSet[i] += voltageStepSize[i];
388386
}
389-
390387
DACController::toggleLdac();
391388
steps++;
392389

@@ -402,6 +399,8 @@ class God {
402399
#endif
403400
}
404401

402+
TimingUtil::setupTimersTimeSeries(dac_interval_us, adc_interval_us);
403+
405404
//float cycles = 0.0;
406405
//uint32_t start = DWT->CYCCNT;
407406

@@ -639,9 +638,6 @@ class God {
639638
DACController::setVoltageNoTransactionNoLdac(dacChannels[i], dacV0s[i]);
640639
nextVoltageSet[i] += voltageStepSize[i];
641640
}
642-
DACController::toggleLdac();
643-
644-
delayMicroseconds(dac_settling_time_us);
645641

646642
for (int i = 0; i < numAdcChannels; i++) {
647643
ADCController::startContinuousConversion(adcChannels[i]);
@@ -651,41 +647,37 @@ class God {
651647
}
652648

653649
TimingUtil::setupTimersDacLed(dac_interval_us, dac_settling_time_us);
654-
655650
TimingUtil::dacFlag = false;
656651

657652
int maxDiff = 0;
658-
659653
x = 0;
660654
int diff = 0;
661655

662-
// float cycles = 0.0;
663-
// uint32_t start = DWT->CYCCNT;
656+
//float cycles = 0.0;
657+
//uint32_t start = DWT->CYCCNT;
664658

665659
while (x < numSteps && !getStopFlag()) {
666660
__WFE();
667-
if (TimingUtil::dacFlag && ++dacIncrements < numSteps) {
668-
// cycles = static_cast<float>(DWT->CYCCNT - start);
669-
// m4SendFloat(&cycles, 1); // send cycles for debugging
661+
//cycles = static_cast<float>(DWT->CYCCNT - start);
662+
//m4SendFloat(&cycles, 1); // send cycles for debugging
663+
664+
if (TimingUtil::dacFlag && dacIncrements < numSteps) {
670665
#if !defined(__NEW_SHIELD__)
671666
PeripheralCommsController::beginDacTransaction();
672667
#endif
673668
for (int i = 0; i < numDacChannels; i++) {
674669
DACController::setVoltageNoTransactionNoLdac(dacChannels[i], nextVoltageSet[i]);
675670
nextVoltageSet[i] += voltageStepSize[i];
676671
}
677-
DACController::toggleLdac();
678672
#if !defined(__NEW_SHIELD__)
679673
PeripheralCommsController::endTransaction();
680674
#endif
681675
TimingUtil::dacFlag = false;
682-
676+
dacIncrements++;
683677

684678
// float data[2] = { static_cast<float>(dacIncrements), static_cast<float>(x)};
685-
686679
// m4SendFloat(data, 2);
687-
// cycles = static_cast<float>(DWT->CYCCNT - start);
688-
// m4SendFloat(&cycles, 1);
680+
689681
}
690682
if (TimingUtil::adcFlag == adcMask) {
691683
// uint32_t start = DWT->CYCCNT;

m4/src/UserIOHandler.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,7 @@ struct UserIOHandler {
4040
// I HIGHLY recommend using the following format: __SERIAL_NUMBER__ {2 characters representing the instrument} {4 digits for the year} {3 characters for the device ID}
4141
// The serial number ideally should be set to a default value here and then changed post-compile time using the firmware_uploader.py or patch_serial_number.py scripts.
4242
__attribute__((section(".serial_number")))
43-
inline static const char serial_number[29] = "__SERIAL_NUMBER__DA_2025_001";
43+
inline static const char serial_number[29] = "__SERIAL_NUMBER__DA_2025_002";
4444

4545
static OperationResult serialNumber() {
4646
return OperationResult::Success(serial_number + 17);

m4/src/Utils/TimingUtil.h

Lines changed: 11 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -62,6 +62,7 @@ struct TimingUtil {
6262
}
6363

6464
// Configure TIM1
65+
TIM1->CR1 &= ~TIM_CR1_CEN; // Stop timer before configuration
6566
TIM1->PSC = psc_dac;
6667
TIM1->ARR = arr_dac;
6768
TIM1->CR1 = TIM_CR1_ARPE;
@@ -99,6 +100,7 @@ struct TimingUtil {
99100
}
100101

101102
// Configure TIM8
103+
TIM8->CR1 &= ~TIM_CR1_CEN; // Stop timer before configuration
102104
TIM8->PSC = psc_adc;
103105
TIM8->ARR = arr_adc;
104106
TIM8->CR1 = TIM_CR1_ARPE;
@@ -170,6 +172,7 @@ struct TimingUtil {
170172
}
171173

172174
// Configure TIM1
175+
TIM1->CR1 &= ~TIM_CR1_CEN; // Stop timer before configuration
173176
TIM1->PSC = psc_dac;
174177
TIM1->ARR = arr_dac;
175178
TIM1->CR1 = TIM_CR1_ARPE;
@@ -180,6 +183,7 @@ struct TimingUtil {
180183
TIM1->SR &= ~TIM_SR_UIF;
181184

182185
// Configure TIM8
186+
TIM8->CR1 &= ~TIM_CR1_CEN; // Stop timer before configuration
183187
TIM8->PSC = psc_adc;
184188
TIM8->ARR = arr_adc;
185189
TIM8->CR1 = TIM_CR1_ARPE;
@@ -248,15 +252,15 @@ struct TimingUtil {
248252
// Clear the SMS bits...
249253
TIM8->SMCR &= ~TIM_SMCR_SMS;
250254
// ...and set SMS bits to 0b100 (Reset Mode)
251-
TIM8->SMCR |= TIM_SMCR_SMS_2; // (Assuming SMS_2 represents the bit for value 4)
255+
TIM8->SMCR |= TIM_SMCR_SMS_3; // Sets SMS to trigger + reset mode, this means TIM8 will not start until the first overflow of TIM1
252256
// --- Configure phase shift if requested ---
253257
if (phase_shift_us > 0 && phase_shift_us < period_us) {
254258
// Use Channel 1 compare event for phase-shifted ADC trigger
255259
uint32_t timerPhaseShift = (phase_shift_us * (TIM8->ARR + 1)) / period_us;
256260
TIM8->CCR1 = timerPhaseShift; // Set to the proper timer tick count for the phase shift
257261
// Set Channel 1 to PWM mode 1: clear then set OC1M bits
258262
TIM8->CCMR1 &= ~TIM_CCMR1_OC1M;
259-
TIM8->CCMR1 |= TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2;
263+
TIM8->CCMR1 |= (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2);
260264
TIM8->CCER |= TIM_CCER_CC1E; // Enable CC1 output
261265
// Enable only the compare interrupt (disable UIE if not needed)
262266
TIM8->DIER |= TIM_DIER_CC1IE;
@@ -265,12 +269,14 @@ struct TimingUtil {
265269
TIM8->DIER |= TIM_DIER_UIE;
266270
}
267271
// Clear update interrupt flag and enable update event generation flags for TIM1
272+
TIM1->CR1 &= ~TIM_CR1_CEN; // Disable the timer to avoid unwanted interrupts
268273
TIM1->EGR |= 0x01;
269274
TIM1->SR &= ~TIM_SR_UIF;
270275
TIM1->EGR |= 0x02;
271276
TIM1->SR &= ~TIM_SR_CC1IF;
272277

273278
//Clear update interrupt flag and enable update event generation flags for TIM8
279+
TIM8->CR1 &= ~TIM_CR1_CEN; // Disable the timer to avoid unwanted interrupts
274280
TIM8->EGR |= 0x01;
275281
TIM8->SR &= ~TIM_SR_UIF;
276282
TIM8->EGR |= 0x02;
@@ -282,8 +288,8 @@ struct TimingUtil {
282288
NVIC_SetPriority(TIM8_CC_IRQn, 3);
283289
NVIC_EnableIRQ(TIM8_CC_IRQn);
284290

285-
// Start the slave timer first so it’s waiting for TIM1’s trigger.
286-
TIM8->CR1 |= TIM_CR1_CEN;
291+
// Start timer 1 (DAC)
292+
//TIM8->CR1 |= TIM_CR1_CEN;
287293
TIM1->CR1 |= TIM_CR1_CEN;
288294
}
289295

@@ -294,6 +300,7 @@ struct TimingUtil {
294300

295301
inline static void disableAdcInterrupt() {
296302
TIM8->DIER &= ~TIM_DIER_UIE;
303+
TIM8->DIER &= ~TIM_DIER_CC1IE; // Disable CC1 interrupt if it was enabled
297304
NVIC_DisableIRQ(TIM8_UP_TIM13_IRQn);
298305
NVIC_DisableIRQ(TIM8_CC_IRQn);
299306
}

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