[X86] printZeroUpperMove - add support for mask predicated instructions

Handle masked predicated movss/movsd in addConstantComments now that we can generically handle the destination + mask register

This will more significantly help improve 'fixup constant' comments from llvm#73509

Author: RKSimon

llvm/lib/Target/X86/X86MCInstLower.cpp

@@ -1561,12 +1561,14 @@ static void printConstant(const Constant *COp, unsigned BitWidth,
 static void printZeroUpperMove(const MachineInstr *MI, MCStreamer &OutStreamer,
                                int SclWidth, int VecWidth,
                                const char *ShuffleComment) {
+  unsigned SrcIdx = getSrcIdx(MI, 1);
+
   std::string Comment;
   raw_string_ostream CS(Comment);
-  const MachineOperand &DstOp = MI->getOperand(0);
-  CS << X86ATTInstPrinter::getRegisterName(DstOp.getReg()) << " = ";
+  printDstRegisterName(CS, MI, SrcIdx);
+  CS << " = ";
 
-  if (auto *C = X86::getConstantFromPool(*MI, 1)) {
+  if (auto *C = X86::getConstantFromPool(*MI, SrcIdx)) {
     CS << "[";
     printConstant(C, SclWidth, CS);
     for (int I = 1, E = VecWidth / SclWidth; I < E; ++I) {
@@ -1863,7 +1865,7 @@ static void addConstantComments(const MachineInstr *MI,
 
   case X86::MOVSDrm:
   case X86::VMOVSDrm:
-  case X86::VMOVSDZrm:
+  MASK_AVX512_CASE(X86::VMOVSDZrm)
   case X86::MOVSDrm_alt:
   case X86::VMOVSDrm_alt:
   case X86::VMOVSDZrm_alt:
@@ -1875,7 +1877,7 @@ static void addConstantComments(const MachineInstr *MI,
 
   case X86::MOVSSrm:
   case X86::VMOVSSrm:
-  case X86::VMOVSSZrm:
+  MASK_AVX512_CASE(X86::VMOVSSZrm)
   case X86::MOVSSrm_alt:
   case X86::VMOVSSrm_alt:
   case X86::VMOVSSZrm_alt:

llvm/test/CodeGen/X86/apx/kmov-postrapseudos.ll

@@ -6,15 +6,17 @@ define void @kmovkr_1(i1 %cmp23.not) {
 ; AVX512-LABEL: kmovkr_1:
 ; AVX512:       # %bb.0: # %entry
 ; AVX512-NEXT:    kmovw %edi, %k1 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x92,0xcf]
-; AVX512-NEXT:    vmovsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0xff,0x89,0x10,0x05,A,A,A,A]
+; AVX512-NEXT:    vmovsd {{.*#+}} xmm0 {%k1} {z} = [1.0E+0,0.0E+0]
+; AVX512-NEXT:    # encoding: [0x62,0xf1,0xff,0x89,0x10,0x05,A,A,A,A]
 ; AVX512-NEXT:    # fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}-4, kind: reloc_riprel_4byte
 ; AVX512-NEXT:    vmovsd %xmm0, 0 # EVEX TO VEX Compression encoding: [0xc5,0xfb,0x11,0x04,0x25,0x00,0x00,0x00,0x00]
 ; AVX512-NEXT:    retq # encoding: [0xc3]
 ;
 ; AVX512BW-LABEL: kmovkr_1:
 ; AVX512BW:       # %bb.0: # %entry
 ; AVX512BW-NEXT:    kmovd %edi, %k1 # EVEX TO VEX Compression encoding: [0xc5,0xfb,0x92,0xcf]
-; AVX512BW-NEXT:    vmovsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0xff,0x89,0x10,0x05,A,A,A,A]
+; AVX512BW-NEXT:    vmovsd {{.*#+}} xmm0 {%k1} {z} = [1.0E+0,0.0E+0]
+; AVX512BW-NEXT:    # encoding: [0x62,0xf1,0xff,0x89,0x10,0x05,A,A,A,A]
 ; AVX512BW-NEXT:    # fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}-4, kind: reloc_riprel_4byte
 ; AVX512BW-NEXT:    vmovsd %xmm0, 0 # EVEX TO VEX Compression encoding: [0xc5,0xfb,0x11,0x04,0x25,0x00,0x00,0x00,0x00]
 ; AVX512BW-NEXT:    retq # encoding: [0xc3]