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ARM: Migrate to the new relocation specifier representation
Use MCSpecifierExpr directly and remove the ARMMCExpr subclass. Define printImpl and evaluateAsRelocationImpl within ARM*MCAsmInfo classes. While there is some duplication, it enables better separation for object file formats.
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11 files changed

+142
-155
lines changed

11 files changed

+142
-155
lines changed

‎llvm/lib/Target/ARM/ARMAsmPrinter.cpp‎

Lines changed: 18 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1619,12 +1619,15 @@ void ARMAsmPrinter::emitInstruction(const MachineInstr *MI) {
16191619
MI->getOperand(2).getImm(), OutContext);
16201620
const MCExpr *LabelSymExpr= MCSymbolRefExpr::create(LabelSym, OutContext);
16211621
unsigned PCAdj = (Opc == ARM::MOVi16_ga_pcrel) ? 8 : 4;
1622-
const MCExpr *PCRelExpr =
1623-
ARMMCExpr::createLower16(MCBinaryExpr::createSub(GVSymExpr,
1624-
MCBinaryExpr::createAdd(LabelSymExpr,
1625-
MCConstantExpr::create(PCAdj, OutContext),
1626-
OutContext), OutContext), OutContext);
1627-
TmpInst.addOperand(MCOperand::createExpr(PCRelExpr));
1622+
const MCExpr *PCRelExpr = ARM::createLower16(
1623+
MCBinaryExpr::createSub(
1624+
GVSymExpr,
1625+
MCBinaryExpr::createAdd(LabelSymExpr,
1626+
MCConstantExpr::create(PCAdj, OutContext),
1627+
OutContext),
1628+
OutContext),
1629+
OutContext);
1630+
TmpInst.addOperand(MCOperand::createExpr(PCRelExpr));
16281631

16291632
// Add predicate operands.
16301633
TmpInst.addOperand(MCOperand::createImm(ARMCC::AL));
@@ -1652,12 +1655,15 @@ void ARMAsmPrinter::emitInstruction(const MachineInstr *MI) {
16521655
MI->getOperand(3).getImm(), OutContext);
16531656
const MCExpr *LabelSymExpr= MCSymbolRefExpr::create(LabelSym, OutContext);
16541657
unsigned PCAdj = (Opc == ARM::MOVTi16_ga_pcrel) ? 8 : 4;
1655-
const MCExpr *PCRelExpr =
1656-
ARMMCExpr::createUpper16(MCBinaryExpr::createSub(GVSymExpr,
1657-
MCBinaryExpr::createAdd(LabelSymExpr,
1658-
MCConstantExpr::create(PCAdj, OutContext),
1659-
OutContext), OutContext), OutContext);
1660-
TmpInst.addOperand(MCOperand::createExpr(PCRelExpr));
1658+
const MCExpr *PCRelExpr = ARM::createUpper16(
1659+
MCBinaryExpr::createSub(
1660+
GVSymExpr,
1661+
MCBinaryExpr::createAdd(LabelSymExpr,
1662+
MCConstantExpr::create(PCAdj, OutContext),
1663+
OutContext),
1664+
OutContext),
1665+
OutContext);
1666+
TmpInst.addOperand(MCOperand::createExpr(PCRelExpr));
16611667
// Add predicate operands.
16621668
TmpInst.addOperand(MCOperand::createImm(ARMCC::AL));
16631669
TmpInst.addOperand(MCOperand::createReg(0));

‎llvm/lib/Target/ARM/ARMMCInstLower.cpp‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -49,27 +49,27 @@ MCOperand ARMAsmPrinter::GetSymbolRef(const MachineOperand &MO,
4949
break;
5050
case ARMII::MO_LO16:
5151
Expr = MCSymbolRefExpr::create(Symbol, Specifier, OutContext);
52-
Expr = ARMMCExpr::createLower16(Expr, OutContext);
52+
Expr = ARM::createLower16(Expr, OutContext);
5353
break;
5454
case ARMII::MO_HI16:
5555
Expr = MCSymbolRefExpr::create(Symbol, Specifier, OutContext);
56-
Expr = ARMMCExpr::createUpper16(Expr, OutContext);
56+
Expr = ARM::createUpper16(Expr, OutContext);
5757
break;
5858
case ARMII::MO_LO_0_7:
5959
Expr = MCSymbolRefExpr::create(Symbol, Specifier, OutContext);
60-
Expr = ARMMCExpr::createLower0_7(Expr, OutContext);
60+
Expr = ARM::createLower0_7(Expr, OutContext);
6161
break;
6262
case ARMII::MO_LO_8_15:
6363
Expr = MCSymbolRefExpr::create(Symbol, Specifier, OutContext);
64-
Expr = ARMMCExpr::createLower8_15(Expr, OutContext);
64+
Expr = ARM::createLower8_15(Expr, OutContext);
6565
break;
6666
case ARMII::MO_HI_0_7:
6767
Expr = MCSymbolRefExpr::create(Symbol, Specifier, OutContext);
68-
Expr = ARMMCExpr::createUpper0_7(Expr, OutContext);
68+
Expr = ARM::createUpper0_7(Expr, OutContext);
6969
break;
7070
case ARMII::MO_HI_8_15:
7171
Expr = MCSymbolRefExpr::create(Symbol, Specifier, OutContext);
72-
Expr = ARMMCExpr::createUpper8_15(Expr, OutContext);
72+
Expr = ARM::createUpper8_15(Expr, OutContext);
7373
break;
7474
}
7575

‎llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp‎

Lines changed: 9 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -454,7 +454,7 @@ class ARMAsmParser : public MCTargetAsmParser {
454454
bool parseMemory(OperandVector &);
455455
bool parseOperand(OperandVector &, StringRef Mnemonic);
456456
bool parseImmExpr(int64_t &Out);
457-
bool parsePrefix(ARMMCExpr::Specifier &);
457+
bool parsePrefix(ARM::Specifier &);
458458
bool parseMemRegOffsetShift(ARM_AM::ShiftOpc &ShiftType,
459459
unsigned &ShiftAmount);
460460
bool parseLiteralValues(unsigned Size, SMLoc L);
@@ -1326,7 +1326,7 @@ class ARMOperand : public MCParsedAsmOperand {
13261326
if (isImm() && !isa<MCConstantExpr>(getImm())) {
13271327
// We want to avoid matching :upper16: and :lower16: as we want these
13281328
// expressions to match in isImm0_65535Expr()
1329-
const ARMMCExpr *ARM16Expr = dyn_cast<ARMMCExpr>(getImm());
1329+
auto *ARM16Expr = dyn_cast<MCSpecifierExpr>(getImm());
13301330
return (!ARM16Expr || (ARM16Expr->getSpecifier() != ARM::S_HI16 &&
13311331
ARM16Expr->getSpecifier() != ARM::S_LO16));
13321332
}
@@ -6424,15 +6424,16 @@ bool ARMAsmParser::parseOperand(OperandVector &Operands, StringRef Mnemonic) {
64246424
// ":upper8_15:", expression prefixes
64256425
// FIXME: Check it's an expression prefix,
64266426
// e.g. (FOO - :lower16:BAR) isn't legal.
6427-
ARMMCExpr::Specifier Spec;
6427+
ARM::Specifier Spec;
64286428
if (parsePrefix(Spec))
64296429
return true;
64306430

64316431
const MCExpr *SubExprVal;
64326432
if (getParser().parseExpression(SubExprVal))
64336433
return true;
64346434

6435-
const MCExpr *ExprVal = ARMMCExpr::create(Spec, SubExprVal, getContext());
6435+
const auto *ExprVal =
6436+
MCSpecifierExpr::create(SubExprVal, Spec, getContext());
64366437
E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
64376438
Operands.push_back(ARMOperand::CreateImm(ExprVal, S, E, *this));
64386439
return false;
@@ -6471,7 +6472,7 @@ bool ARMAsmParser::parseImmExpr(int64_t &Out) {
64716472
// parsePrefix - Parse ARM 16-bit relocations expression prefixes, i.e.
64726473
// :lower16: and :upper16: and Thumb 8-bit relocation expression prefixes, i.e.
64736474
// :upper8_15:, :upper0_7:, :lower8_15: and :lower0_7:
6474-
bool ARMAsmParser::parsePrefix(ARMMCExpr::Specifier &Spec) {
6475+
bool ARMAsmParser::parsePrefix(ARM::Specifier &Spec) {
64756476
MCAsmParser &Parser = getParser();
64766477
Spec = ARM::S_None;
64776478

@@ -6495,7 +6496,7 @@ bool ARMAsmParser::parsePrefix(ARMMCExpr::Specifier &Spec) {
64956496
};
64966497
static const struct PrefixEntry {
64976498
const char *Spelling;
6498-
ARMMCExpr::Specifier Spec;
6499+
ARM::Specifier Spec;
64996500
uint8_t SupportedFormats;
65006501
} PrefixEntries[] = {
65016502
{"upper16", ARM::S_HI16, COFF | ELF | MACHO},
@@ -6879,7 +6880,7 @@ static bool isThumbI8Relocation(MCParsedAsmOperand &MCOp) {
68796880
const MCExpr *E = dyn_cast<MCExpr>(Op.getImm());
68806881
if (!E)
68816882
return false;
6882-
const ARMMCExpr *ARM16Expr = dyn_cast<ARMMCExpr>(E);
6883+
auto *ARM16Expr = dyn_cast<MCSpecifierExpr>(E);
68836884
if (ARM16Expr && (ARM16Expr->getSpecifier() == ARM::S_HI_8_15 ||
68846885
ARM16Expr->getSpecifier() == ARM::S_HI_0_7 ||
68856886
ARM16Expr->getSpecifier() == ARM::S_LO_8_15 ||
@@ -8286,7 +8287,7 @@ bool ARMAsmParser::validateInstruction(MCInst &Inst,
82868287
if (CE) break;
82878288
const MCExpr *E = dyn_cast<MCExpr>(Op.getImm());
82888289
if (!E) break;
8289-
const ARMMCExpr *ARM16Expr = dyn_cast<ARMMCExpr>(E);
8290+
auto *ARM16Expr = dyn_cast<MCSpecifierExpr>(E);
82908291
if (!ARM16Expr || (ARM16Expr->getSpecifier() != ARM::S_HI16 &&
82918292
ARM16Expr->getSpecifier() != ARM::S_LO16))
82928293
return Error(

‎llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp‎

Lines changed: 60 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,8 +11,8 @@
1111
//===----------------------------------------------------------------------===//
1212

1313
#include "ARMMCAsmInfo.h"
14-
#include "MCTargetDesc/ARMMCExpr.h"
1514
#include "llvm/MC/MCExpr.h"
15+
#include "llvm/Support/raw_ostream.h"
1616
#include "llvm/TargetParser/Triple.h"
1717

1818
using namespace llvm;
@@ -153,3 +153,62 @@ ARMCOFFMCAsmInfoGNU::ARMCOFFMCAsmInfoGNU() {
153153

154154
initializeVariantKinds(variantKindDescs);
155155
}
156+
157+
void ARM::printSpecifierExpr(const MCAsmInfo &MAI, raw_ostream &OS,
158+
const MCSpecifierExpr &Expr) {
159+
switch (Expr.getSpecifier()) {
160+
default:
161+
llvm_unreachable("Invalid kind!");
162+
case ARM::S_HI16:
163+
OS << ":upper16:";
164+
break;
165+
case ARM::S_LO16:
166+
OS << ":lower16:";
167+
break;
168+
case ARM::S_HI_8_15:
169+
OS << ":upper8_15:";
170+
break;
171+
case ARM::S_HI_0_7:
172+
OS << ":upper0_7:";
173+
break;
174+
case ARM::S_LO_8_15:
175+
OS << ":lower8_15:";
176+
break;
177+
case ARM::S_LO_0_7:
178+
OS << ":lower0_7:";
179+
break;
180+
}
181+
182+
const MCExpr *Sub = Expr.getSubExpr();
183+
if (Sub->getKind() != MCExpr::SymbolRef)
184+
OS << '(';
185+
MAI.printExpr(OS, *Sub);
186+
if (Sub->getKind() != MCExpr::SymbolRef)
187+
OS << ')';
188+
}
189+
190+
const MCSpecifierExpr *ARM::createUpper16(const MCExpr *Expr, MCContext &Ctx) {
191+
return MCSpecifierExpr::create(Expr, ARM::S_HI16, Ctx);
192+
}
193+
194+
const MCSpecifierExpr *ARM::createLower16(const MCExpr *Expr, MCContext &Ctx) {
195+
return MCSpecifierExpr::create(Expr, ARM::S_LO16, Ctx);
196+
}
197+
198+
const MCSpecifierExpr *ARM::createUpper8_15(const MCExpr *Expr,
199+
MCContext &Ctx) {
200+
return MCSpecifierExpr::create(Expr, ARM::S_HI_8_15, Ctx);
201+
}
202+
203+
const MCSpecifierExpr *ARM::createUpper0_7(const MCExpr *Expr, MCContext &Ctx) {
204+
return MCSpecifierExpr::create(Expr, ARM::S_HI_0_7, Ctx);
205+
}
206+
207+
const MCSpecifierExpr *ARM::createLower8_15(const MCExpr *Expr,
208+
MCContext &Ctx) {
209+
return MCSpecifierExpr::create(Expr, ARM::S_LO_8_15, Ctx);
210+
}
211+
212+
const MCSpecifierExpr *ARM::createLower0_7(const MCExpr *Expr, MCContext &Ctx) {
213+
return MCSpecifierExpr::create(Expr, ARM::S_LO_0_7, Ctx);
214+
}

‎llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h‎

Lines changed: 45 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,6 @@
1313
#ifndef LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMMCASMINFO_H
1414
#define LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMMCASMINFO_H
1515

16-
#include "MCTargetDesc/ARMMCExpr.h"
1716
#include "llvm/MC/MCAsmInfoCOFF.h"
1817
#include "llvm/MC/MCAsmInfoDarwin.h"
1918
#include "llvm/MC/MCAsmInfoELF.h"
@@ -22,11 +21,24 @@
2221
namespace llvm {
2322
class Triple;
2423

24+
namespace ARM {
25+
void printSpecifierExpr(const MCAsmInfo &MAI, raw_ostream &OS,
26+
const MCSpecifierExpr &Expr);
27+
}
28+
2529
class ARMMCAsmInfoDarwin : public MCAsmInfoDarwin {
2630
virtual void anchor();
2731

2832
public:
2933
explicit ARMMCAsmInfoDarwin(const Triple &TheTriple);
34+
void printSpecifierExpr(raw_ostream &OS,
35+
const MCSpecifierExpr &Expr) const override {
36+
ARM::printSpecifierExpr(*this, OS, Expr);
37+
}
38+
bool evaluateAsRelocatableImpl(const MCSpecifierExpr &, MCValue &,
39+
const MCAssembler *) const override {
40+
return false;
41+
}
3042
};
3143

3244
class ARMELFMCAsmInfo : public MCAsmInfoELF {
@@ -36,23 +48,48 @@ class ARMELFMCAsmInfo : public MCAsmInfoELF {
3648
explicit ARMELFMCAsmInfo(const Triple &TT);
3749

3850
void setUseIntegratedAssembler(bool Value) override;
51+
void printSpecifierExpr(raw_ostream &OS,
52+
const MCSpecifierExpr &Expr) const override {
53+
ARM::printSpecifierExpr(*this, OS, Expr);
54+
}
55+
bool evaluateAsRelocatableImpl(const MCSpecifierExpr &, MCValue &,
56+
const MCAssembler *) const override {
57+
return false;
58+
}
3959
};
4060

4161
class ARMCOFFMCAsmInfoMicrosoft : public MCAsmInfoMicrosoft {
4262
void anchor() override;
4363

4464
public:
4565
explicit ARMCOFFMCAsmInfoMicrosoft();
66+
void printSpecifierExpr(raw_ostream &OS,
67+
const MCSpecifierExpr &Expr) const override {
68+
ARM::printSpecifierExpr(*this, OS, Expr);
69+
}
70+
bool evaluateAsRelocatableImpl(const MCSpecifierExpr &, MCValue &,
71+
const MCAssembler *) const override {
72+
return false;
73+
}
4674
};
4775

4876
class ARMCOFFMCAsmInfoGNU : public MCAsmInfoGNUCOFF {
4977
void anchor() override;
5078

5179
public:
5280
explicit ARMCOFFMCAsmInfoGNU();
81+
void printSpecifierExpr(raw_ostream &OS,
82+
const MCSpecifierExpr &Expr) const override {
83+
ARM::printSpecifierExpr(*this, OS, Expr);
84+
}
85+
bool evaluateAsRelocatableImpl(const MCSpecifierExpr &, MCValue &,
86+
const MCAssembler *) const override {
87+
return false;
88+
}
5389
};
5490

5591
namespace ARM {
92+
using Specifier = uint16_t;
5693
enum {
5794
S_None,
5895
S_HI16 =
@@ -93,6 +130,13 @@ enum {
93130
S_TLSLDO,
94131
S_TPOFF,
95132
};
133+
134+
const MCSpecifierExpr *createUpper16(const MCExpr *Expr, MCContext &Ctx);
135+
const MCSpecifierExpr *createLower16(const MCExpr *Expr, MCContext &Ctx);
136+
const MCSpecifierExpr *createUpper8_15(const MCExpr *Expr, MCContext &Ctx);
137+
const MCSpecifierExpr *createUpper0_7(const MCExpr *Expr, MCContext &Ctx);
138+
const MCSpecifierExpr *createLower8_15(const MCExpr *Expr, MCContext &Ctx);
139+
const MCSpecifierExpr *createLower0_7(const MCExpr *Expr, MCContext &Ctx);
96140
}
97141

98142
} // namespace llvm

‎llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1192,7 +1192,7 @@ uint32_t ARMMCCodeEmitter::getHiLoImmOpValue(const MCInst &MI, unsigned OpIdx,
11921192
const MCExpr *E = MO.getExpr();
11931193
MCFixupKind Kind;
11941194
if (E->getKind() == MCExpr::Specifier) {
1195-
const ARMMCExpr *ARM16Expr = cast<ARMMCExpr>(E);
1195+
auto *ARM16Expr = cast<MCSpecifierExpr>(E);
11961196
E = ARM16Expr->getSubExpr();
11971197

11981198
if (const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(E)) {

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