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Fix assignment type
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rtl/axis_pipeline_fifo.v

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -158,8 +158,8 @@ if (LENGTH > 0) begin
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if (rst) begin
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for (i = 0; i < LENGTH; i = i + 1) begin
161-
axis_tvalid_reg[i] = 1'b0;
162-
axis_tready_reg[i] = 1'b0;
161+
axis_tvalid_reg[i] <= 1'b0;
162+
axis_tready_reg[i] <= 1'b0;
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end
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end
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end

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