Merge pull request ziglang#23654 from alichraghi/continue

Compilation: don't build compiler_rt or ubsan_rt for amdgcn and ptx

Author: Snektron

src/Compilation.zig

@@ -1352,8 +1352,8 @@ pub fn create(gpa: Allocator, arena: Allocator, options: CreateOptions) !*Compil
         // approach, since the ubsan runtime uses quite a lot of the standard library
         // and this reduces unnecessary bloat.
         const ubsan_rt_strat: RtStrat = s: {
-            const is_spirv = options.root_mod.resolved_target.result.cpu.arch.isSpirV();
-            const want_ubsan_rt = options.want_ubsan_rt orelse (!is_spirv and any_sanitize_c == .full and is_exe_or_dyn_lib);
+            const can_build_ubsan_rt = target_util.canBuildLibUbsanRt(options.root_mod.resolved_target.result);
+            const want_ubsan_rt = options.want_ubsan_rt orelse (can_build_ubsan_rt and any_sanitize_c == .full and is_exe_or_dyn_lib);
             if (!want_ubsan_rt) break :s .none;
             if (options.skip_linker_dependencies) break :s .none;
             if (have_zcu) break :s .zcu;
@@ -1768,8 +1768,7 @@ pub fn create(gpa: Allocator, arena: Allocator, options: CreateOptions) !*Compil
     errdefer comp.destroy();
 
     const target = comp.root_mod.resolved_target.result;
-
-    const capable_of_building_compiler_rt = canBuildLibCompilerRt(target, comp.config.use_llvm);
+    const can_build_compiler_rt = target_util.canBuildLibCompilerRt(target, comp.config.use_llvm, build_options.have_llvm);
 
     // Add a `CObject` for each `c_source_files`.
     try comp.c_object_table.ensureTotalCapacity(gpa, options.c_source_files.len);
@@ -1939,7 +1938,7 @@ pub fn create(gpa: Allocator, arena: Allocator, options: CreateOptions) !*Compil
                 comp.remaining_prelink_tasks += 1;
             }
 
-            if (capable_of_building_compiler_rt) {
+            if (can_build_compiler_rt) {
                 if (comp.compiler_rt_strat == .lib) {
                     log.debug("queuing a job to build compiler_rt_lib", .{});
                     comp.queued_jobs.compiler_rt_lib = true;
@@ -6558,22 +6557,6 @@ pub fn dump_argv(argv: []const []const u8) void {
     nosuspend stderr.print("{s}\n", .{argv[argv.len - 1]}) catch {};
 }
 
-fn canBuildLibCompilerRt(target: std.Target, use_llvm: bool) bool {
-    switch (target.os.tag) {
-        .plan9 => return false,
-        else => {},
-    }
-    switch (target.cpu.arch) {
-        .spirv, .spirv32, .spirv64 => return false,
-        else => {},
-    }
-    return switch (target_util.zigBackend(target, use_llvm)) {
-        .stage2_llvm => true,
-        .stage2_x86_64 => if (target.ofmt == .elf or target.ofmt == .macho) true else build_options.have_llvm,
-        else => build_options.have_llvm,
-    };
-}
-
 pub fn getZigBackend(comp: Compilation) std.builtin.CompilerBackend {
     const target = comp.root_mod.resolved_target.result;
     return target_util.zigBackend(target, comp.config.use_llvm);

src/codegen/spirv.zig

@@ -1065,6 +1065,7 @@ const NavGen = struct {
 
     fn derivePtr(self: *NavGen, derivation: Value.PointerDeriveStep) Error!IdRef {
         const pt = self.pt;
+        const zcu = pt.zcu;
         switch (derivation) {
             .comptime_alloc_ptr, .comptime_field_ptr => unreachable,
             .int => |int| {
@@ -1104,23 +1105,36 @@ const NavGen = struct {
             .offset_and_cast => |oac| {
                 const parent_ptr_id = try self.derivePtr(oac.parent.*);
                 const parent_ptr_ty = try oac.parent.ptrType(pt);
-                disallow: {
-                    if (oac.byte_offset != 0) break :disallow;
-                    // Allow changing the pointer type child only to restructure arrays.
-                    // e.g. [3][2]T to T is fine, as is [2]T -> [2][1]T.
-                    const result_ty_id = try self.resolveType(oac.new_ptr_ty, .direct);
-                    const result_ptr_id = self.spv.allocId();
-                    try self.func.body.emit(self.spv.gpa, .OpBitcast, .{
-                        .id_result_type = result_ty_id,
-                        .id_result = result_ptr_id,
-                        .operand = parent_ptr_id,
-                    });
-                    return result_ptr_id;
+                const result_ty_id = try self.resolveType(oac.new_ptr_ty, .direct);
+
+                if (oac.byte_offset != 0) {
+                    const child_size = oac.new_ptr_ty.childType(zcu).abiSize(zcu);
+                    if (oac.byte_offset % child_size != 0) {
+                        return self.fail("cannot perform pointer cast: '{}' to '{}'", .{
+                            parent_ptr_ty.fmt(pt),
+                            oac.new_ptr_ty.fmt(pt),
+                        });
+                    }
+
+                    // Vector element ptr accesses are derived as offset_and_cast.
+                    // We can just use OpAccessChain.
+                    assert(parent_ptr_ty.childType(zcu).zigTypeTag(zcu) == .vector);
+                    return self.accessChain(
+                        result_ty_id,
+                        parent_ptr_id,
+                        &.{@intCast(@divExact(oac.byte_offset, child_size))},
+                    );
                 }
-                return self.fail("cannot perform pointer cast: '{}' to '{}'", .{
-                    parent_ptr_ty.fmt(pt),
-                    oac.new_ptr_ty.fmt(pt),
+
+                // Allow changing the pointer type child only to restructure arrays.
+                // e.g. [3][2]T to T is fine, as is [2]T -> [2][1]T.
+                const result_ptr_id = self.spv.allocId();
+                try self.func.body.emit(self.spv.gpa, .OpBitcast, .{
+                    .id_result_type = result_ty_id,
+                    .id_result = result_ptr_id,
+                    .operand = parent_ptr_id,
                 });
+                return result_ptr_id;
             },
         }
     }

src/target.zig

@@ -313,6 +313,33 @@ pub fn defaultCompilerRtOptimizeMode(target: std.Target) std.builtin.OptimizeMod
     }
 }
 
+pub fn canBuildLibCompilerRt(target: std.Target, use_llvm: bool, have_llvm: bool) bool {
+    switch (target.os.tag) {
+        .plan9 => return false,
+        else => {},
+    }
+    switch (target.cpu.arch) {
+        .spirv, .spirv32, .spirv64 => return false,
+        // Remove this once https://github.com/ziglang/zig/issues/23714 is fixed
+        .amdgcn => return false,
+        else => {},
+    }
+    return switch (zigBackend(target, use_llvm)) {
+        .stage2_llvm => true,
+        .stage2_x86_64 => if (target.ofmt == .elf or target.ofmt == .macho) true else have_llvm,
+        else => have_llvm,
+    };
+}
+
+pub fn canBuildLibUbsanRt(target: std.Target) bool {
+    switch (target.cpu.arch) {
+        .spirv, .spirv32, .spirv64 => return false,
+        // Remove this once https://github.com/ziglang/zig/issues/23715 is fixed
+        .nvptx, .nvptx64 => return false,
+        else => return true,
+    }
+}
+
 pub fn hasRedZone(target: std.Target) bool {
     return switch (target.cpu.arch) {
         .aarch64,

test/behavior/struct.zig

@@ -1524,6 +1524,7 @@ test "optional generic function label struct field" {
 }
 
 test "struct fields get automatically reordered" {
+    if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
 
     const S1 = struct {