HPS enhanced 25.1 release src

Author: ranenikhil19

.gitmodules

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+[submodule "poky"]
+	path = src/sw/poky
+	url = https://git.yoctoproject.org/git/poky
+	branch = styhead
+[submodule "meta-intel-fpga"]
+	path = src/sw/meta-intel-fpga
+	url = https://git.yoctoproject.org/git/meta-intel-fpga
+	branch = styhead
+[submodule "meta-intel-fpga-refdes"]
+	path = src/sw/meta-intel-fpga-refdes
+	url = https://github.com/altera-opensource/meta-intel-fpga-refdes.git
+	branch = styhead
+[submodule "meta-openembedded"]
+	path = src/sw/meta-openembedded
+	url = https://git.openembedded.org/meta-openembedded
+	branch = styhead
+[submodule "meta-clang"]
+	path = src/sw/meta-clang
+	url = https://github.com/kraj/meta-clang.git
+	branch = styhead
+[submodule "meta-virtualization"]
+	path = src/sw/meta-virtualization
+	url = https://git.yoctoproject.org/git/meta-virtualization
+	branch = styhead

README.md

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+# Agilex 5e HPS Enhanced System Example Design 
+
+HPS Enhanced System Example Design is for Altera 5e System On Chip (SoC) FPGA. It works together with a complete solution to boot Uboot and Linux with Altera SoC Development board.
+
+This example design demonstrates the following system integration between Hard Processor System (HPS) and FPGA IPs:
+- Hard Processor System enablement and configuration
+  - HPS Peripheral and I/O (eg, NAND, SD/MMC, EMAC, USB, SPI, I2C, UART, and GPIO)
+  - HPS Clock and Reset
+  - HPS FPGA Bridge and Interrupt
+- HPS EMIF configuration
+- System integration with FPGA IPs
+  - SYSID
+  - Programmable I/O (PIO) IP for controlling DIPSW, PushButton, and LEDs)
+  - FPGA On-Chip Memory
+  - Ethernet IP
+  - Fabric EMIF
+
+Build scripts are organized according to the Intel SoC FPGA Family:
+Enhanced GSRD for Intel Quartus Prime Pro Edition
+
+## Build Steps:
+Refer to the README in repective folder for build steps.
+
+## Repository Structure
+
+- Directory Structure used in this example design
+ ```bash
+    |--- src
+    |   |--- hw 
+    |   |--- sw 
+ ```
+
+## Project Details 
+- **Family**: Agilex 5 E-Series
+- **Quartus Version**: 25.1.0 Pro Edition
+- **Development Kit**: Agilex 5 FPGA E-Series 065B Premium Development Kit DK-A5E065BB32AES1
+- **Device Part**: A5ED065BB32AE6SR0
+
+## Getting Started
+Follow the steps below to build the design
+- [HW Build Readme](src/hw/README.md)
+- [SW Build Readme](src/sw/README.md)
+  
+Enhanced GSRD Wiki
+- [Wiki](https://github.com/altera-innersource/applications.fpga.soc.agilex5e-ed-gsrd-enhanced/wiki)

altera_license.txt

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+Copyright 2024-2025 Altera Corporation
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the “Software”), to deal in the Software without restriction, except as set forth below, 
+including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software; 
+
+If a file contained in this Software includes separate license text or a header file with license terms, those terms will supersede this agreement for purposes of that file only, all files without a separate agreement are subject to this agreement;
+
+The Software must be used solely for design and implementation on an Altera product; 
+
+You must not use the Software or devices you configure using this Software to violate any internationally recognized human right; and 
+
+The Software may be subject to export controls under applicable government laws and regulations, including those of the U.S. You must: 
+a) comply with applicable laws and regulations and obtain any necessary authorizations; 
+b) not export, import, or transfer the materials to any prohibited or sanctioned country, person, or entity; or 
+c) use the materials for the development, design, manufacture, or production of nuclear, missile, chemical, or biological weapons.
+
+THE SOFTWARE IS PROVIDED “AS IS”, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 
+IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+Governing Law and Jurisdiction. If you are in the Americas, U.S. and Delaware law governs all disputes arising out of or relating to this agreement without regard to conflict-of-laws principles. The state and federal 
+courts in Wilmington, Delaware will have exclusive jurisdiction over any dispute arising out of or relating to this agreement. If you are in Europe or Africa, the laws of England and Wales govern all matters arising 
+out of or relating to this agreement without regard to conflict-of-laws principles. The courts in England will have exclusive jurisdiction over any dispute arising out of or relating to this agreement. If you are in 
+Asia or Australia, Singapore law governs all disputes arising out of or relating to this agreement without regard to conflict-of-laws principles. The courts in Singapore will have exclusive jurisdiction over any dispute 
+arising out of or relating to this agreement. You and Intel consent to personal jurisdiction and venue in the courts designated for your location. If you are in China, Hong Kong law governs all disputes arising out of or 
+relating to this agreement without regard to conflict-of-laws principles. Any dispute arising out of or relating to this agreement will be subject to arbitration by the Hong Kong International Arbitration Centre, this 
+arbitration agreement will be governed by Hong Kong law, and the seat and location of proceedings will be Hong Kong. The current rules of the HKIAC will apply, except that the arbitration will be referred to a sole 
+arbitrator and the proceedings will be conducted in English. The Arbitral Tribunal may only award monetary damages and may not award injunctive relief or any remedy that requires a party to license any intellectual 
+property rights. Regardless of the above or your location, claims for misappropriation of trade secrets and breach of confidentiality obligations may also be brought in any court that has jurisdiction over the parties 
+if the relief sought is limited to injunctive or other nonmonetary relief. The parties exclude the application of the United Nations Convention on Contracts for the International Sale of Goods (1980).
+
+

src/hw/Makefile

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+
+THIS_MK_ABSPATH := $(abspath $(lastword $(MAKEFILE_LIST)))
+THIS_MK_DIR := $(dir $(THIS_MK_ABSPATH))
+
+# Enable pipefail for all commands
+SHELL=/bin/bash -o pipefail
+
+# Enable second expansion
+.SECONDEXPANSION:
+
+# Clear all built in suffixes
+.SUFFIXES:
+
+NOOP :=
+SPACE := $(NOOP) $(NOOP)
+COMMA := ,
+HOSTNAME := $(shell hostname)
+
+##############################################################################
+# Environment check
+##############################################################################
+
+
+##############################################################################
+# Configuration
+##############################################################################
+PROJECT_DIR_ABS := $(abspath $(THIS_MK_DIR))
+
+# Name of all the revisions
+PROJECT_NAME :=
+REVISION_NAMES :=
+
+include $(THIS_MK_DIR)/project_config.mk
+ifeq ($(PROJECT_NAME),)
+$(error PROJECT_NAME is not defined in project_config.mk)
+endif
+ifeq ($(REVISION_NAMES),)
+$(error REVISION_NAMES is not defined in project_config.mk)
+endif
+
+# Set defaults
+INSTALL_ROOT ?= $(THIS_MK_DIR)
+ARCHIVE_NAME ?= $(PROJECT_NAME)
+##############################################################################
+# Set default goal before any targets. The default goal here is "test"
+##############################################################################
+DEFAULT_TARGET := test
+
+.DEFAULT_GOAL := default
+.PHONY: default
+default: $(DEFAULT_TARGET)
+
+
+##############################################################################
+# Makefile starts here
+##############################################################################
+
+# Initialize variables
+ALL_TARGET_STEM_NAMES =
+ALL_PREP_TARGETS =
+ALL_IP_UPGRADE_TARGETS =
+ALL_BUILD_TARGETS =
+ALL_SW_BUILD_TARGETS =
+ALL_TEST_TARGETS =
+ALL_INSTALL_SOF_TARGETS =
+
+# Define function to create targets
+define create_targets_on_revisions
+ALL_TARGET_STEM_NAMES += $(strip $(1))
+ALL_PREP_TARGETS += $(addsuffix -prep,$(strip $(1)))
+ALL_IP_UPGRADE_TARGETS += $(addsuffix -ip-upgrade,$(strip $(1)))
+ALL_BUILD_TARGETS += $(addsuffix -build,$(strip $(1)))
+ALL_SW_BUILD_TARGETS += $(addsuffix -sw-build,$(strip $(1)))
+ALL_TEST_TARGETS += $(addsuffix -test,$(strip $(1)))
+ALL_INSTALL_SOF_TARGETS += $(addsuffix -install-sof,$(strip $(1)))
+
+$(strip $(1))-prep : output_files/prep-$(strip $(1)).done
+
+$(strip $(1))-ip-upgrade: pre-prep | output_files
+	flock --verbose output_files/ipupgrade.lock quartus_sh --ip_upgrade $(PROJECT_NAME) -revision $(strip $(1))
+
+$(strip $(1))-generate-design :
+
+$(strip $(1))-package-design : $(INSTALL_ROOT)/$(ARCHIVE_NAME).zip
+
+$(strip $(1))-build : output_files/$(strip $(1)).sof
+
+$(strip $(1))-sw-build :
+
+$(strip $(1))-test : $(strip $(1))-build
+$(strip $(1))-install-sof : output_files/$(strip $(1)).sof | $(INSTALL_ROOT)
+	cp $$< $(INSTALL_ROOT)/$(ARCHIVE_NAME)-$(strip $(1)).sof
+endef
+
+# Create all targets
+$(foreach revision,$(REVISION_NAMES),$(eval $(call create_targets_on_revisions,$(revision))))
+
+###############################################################################
+#                          UTILITY TARGETS
+###############################################################################
+
+output_files $(INSTALL_ROOT):
+	mkdir -p $@
+
+output_files/pre-prep.done: | output_files
+	# Write protect QPF so it doesn't get modified when switching revisions
+	chmod a-w $(PROJECT_NAME).qpf
+	touch $@
+
+output_files/prep-%.done: output_files/pre-prep.done | output_files
+	chmod a-w $(PROJECT_NAME).qpf
+	flock --verbose output_files/ipgenerate.lock quartus_ipgenerate top -c $* --synthesis=verilog
+	#flock --verbose output_files/ipgenerate.lock quartus_ipgenerate top -c $* --simulation=verilog --synthesis=verilog
+	#ip-setup-simulation --quartus-project=top --revision=$* --output-directory=sim_setup_$*
+	touch $@
+
+.PHONY: pre-prep
+pre-prep: output_files/pre-prep.done
+
+$(INSTALL_ROOT)/$(ARCHIVE_NAME).zip: pre-prep | $(INSTALL_ROOT)
+	# Validate metadata in the README.md
+	quartus_sh --validate_metadata -file README.md -strict
+	rm validate_metadata_log.txt
+	zip -r $@ * -x .gitignore "output_files/*" "qdb/*" "dni/*" "tmp-clearbox/*"
+
+.PHONY: package-design
+package-design: $(INSTALL_ROOT)/$(ARCHIVE_NAME).zip
+
+.PHONY: generate-design
+generate-design: pre-prep
+
+.PHONY: ip-upgrade
+ip-upgrade: $(ALL_IP_UPGRADE_TARGETS)
+
+.PHONY: prep
+prep: $(ALL_PREP_TARGETS)
+
+output_files/%.sof: output_files/prep-%.done
+	quartus_syn top -c $*
+	quartus_fit top -c $*
+	quartus_sta top -c $* --mode=finalize
+	quartus_asm top -c $*
+	quartus_pow top -c $*
+	mv $*.qptc output_files/$*.qptc
+
+# Clean all files
+.PHONY: clean
+clean :
+	rm -rf output_files qdb tmp-clearbox dni
+
+# Deep clean using git
+.PHONY: dev-clean
+dev-clean :
+	git clean -dfx .
+
+# Build all revisions
+.PHONY: build
+build : $(ALL_BUILD_TARGETS)
+
+# Run all tests
+.PHONY: test
+test : $(ALL_TEST_TARGETS)
+
+.PHONY: print-targets
+print-targets:
+	$(info $(ALL_TARGET_STEM_NAMES))
+
+###############################################################################
+#                           SW Build Targets
+###############################################################################
+-include $(THIS_MK_DIR)/swbuild_config.mk
+
+# Build all SW projects
+.PHONY: sw-build
+sw-build : $(ALL_SW_BUILD_TARGETS)
+
+###############################################################################
+#                                HELP
+###############################################################################
+.PHONY: help
+help:
+	$(info GHRD Build)
+	$(info    Project Directory       : $(PROJECT_DIR_ABS))
+	$(info    Prep Targets            : $(ALL_PREP_TARGETS))
+	$(info    Build Targets           : $(ALL_BUILD_TARGETS))
+	$(info    Test Targets            : $(ALL_TEST_TARGETS))
+	$(info    Software Build Targets  : $(ALL_SW_BUILD_TARGETS))