33433343
33443344< h1 id ="baremetal-drivers "> Baremetal Drivers< a class ="headerlink " href ="#baremetal-drivers " title ="Permanent link "> ¶</ a > </ h1 >
33453345< h2 id ="overview "> Overview< a class ="headerlink " href ="#overview " title ="Permanent link "> ¶</ a > </ h2 >
3346- < p > This page presents the pre-release of the Agilex 5 baremetal drivers. The purpose of the drivers is to provide developers with access to the low-level functionality of the HPS IP blocks, including the ability to access IP registers. The drivers are provided through the following git repository: < a href ="https://github.com/altera-fpga/baremetal-drivers "> https://github.com/altera-fpga/baremetal-drivers</ a > and are released under the < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /LICENSE "> MIT License</ a > . </ p >
3346+ < p > This page presents the pre-release of the Agilex 5 baremetal drivers. The purpose of the drivers is to provide developers with access to the low-level functionality of the HPS IP blocks, including the ability to access IP registers. The drivers are provided through the following git repository: < a href ="https://github.com/altera-fpga/baremetal-drivers "> https://github.com/altera-fpga/baremetal-drivers</ a > and are released under the < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /LICENSE "> MIT License</ a > . </ p >
33473347< p > Resources:</ p >
33483348< ul >
3349- < li > < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /DOCUMENTATION.md "> Documentation</ a > </ li >
3350- < li > < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /DESIGN.md "> API Construction</ a > </ li >
3351- < li > < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /BUILD.md "> Build Details</ a > </ li >
3352- < li > < a href ="https://github.com/altera-fpga/baremetal-drivers/releases/tag/24 .3.1 "> Release Notes</ a > </ li >
3349+ < li > < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /DOCUMENTATION.md "> Documentation</ a > </ li >
3350+ < li > < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /DESIGN.md "> API Construction</ a > </ li >
3351+ < li > < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /BUILD.md "> Build Details</ a > </ li >
3352+ < li > < a href ="https://github.com/altera-fpga/baremetal-drivers/releases/tag/QPDS24 .3.1_REL_GSRD_PR "> Release Notes</ a > </ li >
33533353</ ul >
33543354< p > Majority of validation for this pre-release was done on the Intel Simics Simulator for Intel FPGAs.</ p >
33553355< h2 id ="demo "> Demo< a class ="headerlink " href ="#demo " title ="Permanent link "> ¶</ a > </ h2 >
@@ -3369,83 +3369,83 @@ <h2 id="driver-list">Driver List<a class="headerlink" href="#driver-list" title=
33693369< tbody >
33703370< tr >
33713371< td align ="center "> Clock Manager</ td >
3372- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /inc/clkmgr/clkmgr.md "> clkmgr</ a > </ td >
3373- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/24 .3.1 /src/clkmgr "> clkmgr</ a > </ td >
3372+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /inc/clkmgr/clkmgr.md "> clkmgr</ a > </ td >
3373+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/QPDS24 .3.1_REL_GSRD_PR /src/clkmgr "> clkmgr</ a > </ td >
33743374</ tr >
33753375< tr >
33763376< td align ="center "> Combophy for SDMMC</ td >
3377- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /inc/combophy/combophy.md "> combophy</ a > </ td >
3378- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/24 .3.1 /src/combophy "> combophy</ a > </ td >
3377+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /inc/combophy/combophy.md "> combophy</ a > </ td >
3378+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/QPDS24 .3.1_REL_GSRD_PR /src/combophy "> combophy</ a > </ td >
33793379</ tr >
33803380< tr >
33813381< td align ="center "> DMA</ td >
3382- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /inc/dma/dma.md "> dma</ a > </ td >
3383- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/24 .3.1 /src/dma "> dma</ a > </ td >
3382+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /inc/dma/dma.md "> dma</ a > </ td >
3383+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/QPDS24 .3.1_REL_GSRD_PR /src/dma "> dma</ a > </ td >
33843384</ tr >
33853385< tr >
33863386< td align ="center "> GIC</ td >
3387- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /inc/gic/gic.md "> gic</ a > </ td >
3388- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/24 .3.1 /src/gic "> gic</ a > </ td >
3387+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /inc/gic/gic.md "> gic</ a > </ td >
3388+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/QPDS24 .3.1_REL_GSRD_PR /src/gic "> gic</ a > </ td >
33893389</ tr >
33903390< tr >
33913391< td align ="center "> General Purpose IO</ td >
3392- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /inc/gpio/gpio.md "> gpio</ a > </ td >
3393- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/24 .3.1 /src/gpio "> gpio</ a > </ td >
3392+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /inc/gpio/gpio.md "> gpio</ a > </ td >
3393+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/QPDS24 .3.1_REL_GSRD_PR /src/gpio "> gpio</ a > </ td >
33943394</ tr >
33953395< tr >
33963396< td align ="center "> HPS Mailbox to SDM</ td >
3397- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /inc/mailbox/mailbox .md "> mailbox </ a > </ td >
3398- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/24 .3.1 /src/mailbox " > mailbox </ a > </ td >
3397+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /inc/hps_mailbox/hps_mailbox .md "> hps_mailbox </ a > </ td >
3398+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/QPDS24 .3.1_REL_GSRD_PR /src/hps_mailbox " > hps_mailbox </ a > </ td >
33993399</ tr >
34003400< tr >
34013401< td align ="center "> I2C</ td >
3402- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /inc/i2c/i2c.md "> i2c</ a > </ td >
3403- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/24 .3.1 /src/i2c "> i2c</ a > </ td >
3402+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /inc/i2c/i2c.md "> i2c</ a > </ td >
3403+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/QPDS24 .3.1_REL_GSRD_PR /src/i2c "> i2c</ a > </ td >
34043404</ tr >
34053405< tr >
34063406< td align ="center "> I3C</ td >
3407- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /inc/i3c/i3c.md "> i3c</ a > </ td >
3408- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/24 .3.1 /src/i3c "> i3c</ a > </ td >
3407+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /inc/i3c/i3c.md "> i3c</ a > </ td >
3408+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/QPDS24 .3.1_REL_GSRD_PR /src/i3c "> i3c</ a > </ td >
34093409</ tr >
34103410< tr >
34113411< td align ="center "> MMU</ td >
3412- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /inc/mmu/mmu.md "> mmu</ a > </ td >
3413- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/24 .3.1 /src/mmu "> mmu</ a > </ td >
3412+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /inc/mmu/mmu.md "> mmu</ a > </ td >
3413+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/QPDS24 .3.1_REL_GSRD_PR /src/mmu "> mmu</ a > </ td >
34143414</ tr >
34153415< tr >
34163416< td align ="center "> Reset Manager</ td >
3417- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /inc/rstmgr/rstmgr.md "> rstmgr</ a > </ td >
3418- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/24 .3.1 /src/rstmgr "> rstmgr</ a > </ td >
3417+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /inc/rstmgr/rstmgr.md "> rstmgr</ a > </ td >
3418+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/QPDS24 .3.1_REL_GSRD_PR /src/rstmgr "> rstmgr</ a > </ td >
34193419</ tr >
34203420< tr >
34213421< td align ="center "> SDMMC</ td >
3422- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /inc/sdmmc/sdmmc.md "> sdmmc</ a > </ td >
3423- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/24 .3.1 /src/sdmmc "> sdmmc</ a > </ td >
3422+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /inc/sdmmc/sdmmc.md "> sdmmc</ a > </ td >
3423+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/QPDS24 .3.1_REL_GSRD_PR /src/sdmmc "> sdmmc</ a > </ td >
34243424</ tr >
34253425< tr >
34263426< td align ="center "> SPI</ td >
3427- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /inc/spi/spi.md "> spi</ a > </ td >
3428- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/24 .3.1 /src/spi "> spi</ a > </ td >
3427+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /inc/spi/spi.md "> spi</ a > </ td >
3428+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/QPDS24 .3.1_REL_GSRD_PR /src/spi "> spi</ a > </ td >
34293429</ tr >
34303430< tr >
34313431< td align ="center "> System Manager</ td >
3432- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /inc/sysmgr/sysmgr.md "> sysmgr</ a > </ td >
3433- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/24 .3.1 /src/sysmgr "> sysmgr</ a > </ td >
3432+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /inc/sysmgr/sysmgr.md "> sysmgr</ a > </ td >
3433+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/QPDS24 .3.1_REL_GSRD_PR /src/sysmgr "> sysmgr</ a > </ td >
34343434</ tr >
34353435< tr >
34363436< td align ="center "> Timers</ td >
3437- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /inc/timer/timer.md "> timer</ a > </ td >
3438- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/24 .3.1 /src/timer "> timer</ a > </ td >
3437+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /inc/timer/timer.md "> timer</ a > </ td >
3438+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/QPDS24 .3.1_REL_GSRD_PR /src/timer "> timer</ a > </ td >
34393439</ tr >
34403440< tr >
34413441< td align ="center "> UART</ td >
3442- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /inc/uart/uart.md "> uart</ a > </ td >
3443- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/24 .3.1 /src/uart "> uart</ a > </ td >
3442+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /inc/uart/uart.md "> uart</ a > </ td >
3443+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/QPDS24 .3.1_REL_GSRD_PR /src/uart "> uart</ a > </ td >
34443444</ tr >
34453445< tr >
34463446< td align ="center "> Watchdog Timers</ td >
3447- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/24 .3.1 /inc/watchdog/watchdog.md "> watchdog</ a > </ td >
3448- < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/24 .3.1 /src/watchdog "> watchdog</ a > </ td >
3447+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/blob/QPDS24 .3.1_REL_GSRD_PR /inc/watchdog/watchdog.md "> watchdog</ a > </ td >
3448+ < td align ="center "> < a href ="https://github.com/altera-fpga/baremetal-drivers/tree/QPDS24 .3.1_REL_GSRD_PR /src/watchdog "> watchdog</ a > </ td >
34493449</ tr >
34503450</ tbody >
34513451</ table >
@@ -3455,7 +3455,7 @@ <h2 id="driver-list">Driver List<a class="headerlink" href="#driver-list" title=
34553455 < small >
34563456
34573457 Last update:
3458- < span class ="git-revision-date-localized-plugin git-revision-date-localized-plugin-date "> February 7 , 2025</ span >
3458+ < span class ="git-revision-date-localized-plugin git-revision-date-localized-plugin-date "> February 11 , 2025</ span >
34593459
34603460 < br >
34613461 Created:
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