HSD #15014505415: ddr: altera: iossm: Poll emif ready signal for second port

Poll emif ready signal for second port when dual port is set

Signed-off-by: Teik Heng Chong <[email protected]>

Author: teikheng

drivers/ddr/altera/iossm_mailbox.c

@@ -21,7 +21,7 @@ static const char *ddr_type_list[7] = {
 		"DDR4", "DDR5", "DDR5_RDIMM", "LPDDR4", "LPDDR5", "QDRIV", "UNKNOWN"
 };
 
-static int is_ddr_csr_clkgen_locked(u32 clkgen_mask)
+static int is_ddr_csr_clkgen_locked(u32 clkgen_mask, u8 num_port)
 {
 	int ret;
 
@@ -33,12 +33,14 @@ static int is_ddr_csr_clkgen_locked(u32 clkgen_mask)
 		return ret;
 	}
 
-	ret = wait_for_bit_le32((const void *)(ECC_INISTATUS_DERR)
-				, clkgen_mask, true, TIMEOUT, false);
+	if (num_port == 3) {
+		ret = wait_for_bit_le32((const void *)(ECC_INISTATUS_DERR)
+					, clkgen_mask, true, TIMEOUT, false);
 
-	if (ret) {
-		debug("%s: ddr csr clkgenb locked is timeout\n", __func__);
-		return ret;
+		if (ret) {
+			debug("%s: ddr csr clkgenb locked is timeout\n", __func__);
+			return ret;
+		}
 	}
 
 	return 0;
@@ -308,10 +310,12 @@ void init_mem_cal(struct io96b_info *io96b_ctrl)
 	for (i = 0; i < io96b_ctrl->num_instance; i++) {
 		switch (i) {
 		case 0:
-			ret = is_ddr_csr_clkgen_locked(DDR_CSR_CLKGEN_LOCKED_IO96B0_MASK);
-			if (ret) {
-				printf("%s: ckgena_lock iossm IO96B_0 is not locked\n", __func__);
-				hang();
+			if(io96b_ctrl->ckgen_lock) {
+				ret = is_ddr_csr_clkgen_locked(DDR_CSR_CLKGEN_LOCKED_IO96B0_MASK, io96b_ctrl->num_port);
+				if (ret) {
+					printf("%s: ckgena_lock iossm IO96B_0 is not locked\n", __func__);
+					hang();
+				}
 			}
 			ret = io96b_cal_status(io96b_ctrl->io96b_0.io96b_csr_addr);
 			if (ret) {
@@ -325,10 +329,12 @@ void init_mem_cal(struct io96b_info *io96b_ctrl)
 			count++;
 			break;
 		case 1:
-			ret = is_ddr_csr_clkgen_locked(DDR_CSR_CLKGEN_LOCKED_IO96B1_MASK);
-			if (ret) {
-				printf("%s: ckgena_lock iossm IO96B_1 is not locked\n", __func__);
-				hang();
+			if(io96b_ctrl->ckgen_lock) {
+				ret = is_ddr_csr_clkgen_locked(DDR_CSR_CLKGEN_LOCKED_IO96B1_MASK, io96b_ctrl->num_port);
+				if (ret) {
+					printf("%s: ckgena_lock iossm IO96B_1 is not locked\n", __func__);
+					hang();
+				}
 			}
 			ret = io96b_cal_status(io96b_ctrl->io96b_1.io96b_csr_addr);
 			if (ret) {

drivers/ddr/altera/iossm_mailbox.h

@@ -113,6 +113,8 @@ struct io96b_instance {
  * @overall_size:	Total DDR memory size
  * @io96b_0:		IO96B 0 instance specific information
  * @io96b_1:		IO96B 1 instance specific information
+ * @ckgen_lock:		IO96B GEN PLL lock (false = not locked, true = locked)
+ * @num_port:		Number of IO96B port. Example bit 0 represent port 0, bit 1 represent port 1, and so on
  */
 struct io96b_info {
 	u8 num_instance;
@@ -122,6 +124,8 @@ struct io96b_info {
 	u16 overall_size;
 	struct io96b_instance io96b_0;
 	struct io96b_instance io96b_1;
+	bool ckgen_lock;
+	u8 num_port;
 };
 
 int io96b_mb_req(phys_addr_t io96b_csr_addr, u32 ip_type, u32 instance_id

drivers/ddr/altera/sdram_agilex5.c

@@ -98,6 +98,11 @@ int populate_ddr_handoff(struct udevice *dev, struct io96b_info *io96b_ctrl)
 	plat->dualport = handoff_table[0] & BIT(0);
 	debug("%s: dualport from handoff: 0x%x\n", __func__, plat->dualport);
 
+	if (plat->dualport)
+		io96b_ctrl->num_port = 3;
+	else
+		io96b_ctrl->num_port = 1;
+
 	/* Read handoff - dual EMIF */
 	plat->dualemif = handoff_table[0] & BIT(1);
 	debug("%s: dualemif from handoff: 0x%x\n", __func__, plat->dualemif);
@@ -212,6 +217,9 @@ int sdram_mmr_init_full(struct udevice *dev)
 		return ret;
 	}
 
+	/* Configure if polling is needed for IO96B GEN PLL locked */
+	io96b_ctrl->ckgen_lock = true;
+
 	/* Ensure calibration status passing */
 	init_mem_cal(io96b_ctrl);
 

drivers/ddr/altera/sdram_agilex7.c

@@ -235,6 +235,9 @@ int sdram_mmr_init_full(struct udevice *dev)
 
 	printf("DDR: Checking calibration...\n");
 
+	/* Configure if polling is needed for IO96B GEN PLL locked */
+	io96b_ctrl->ckgen_lock = false;
+
 	/* Ensure calibration status passing */
 	init_mem_cal(io96b_ctrl);