hdl: remove subclassing of AnyValue and Property.

This subclassing is unnecessary and makes downstream code more complex.
In the new IR, they are unified into cells with the same name anyway.
Even before that, this change simplifies things.

Author: whitequark

amaranth/back/rtlil.py

@@ -442,27 +442,13 @@ def on_value(self, value):
     def on_Const(self, value):
         return _const(value)
 
-    def on_AnyConst(self, value):
+    def on_AnyValue(self, value):
         if value in self.s.anys:
             return self.s.anys[value]
 
         res_shape = value.shape()
         res = self.s.rtlil.wire(width=res_shape.width, src=_src(value.src_loc))
-        self.s.rtlil.cell("$anyconst", ports={
-            "\\Y": res,
-        }, params={
-            "WIDTH": res_shape.width,
-        }, src=_src(value.src_loc))
-        self.s.anys[value] = res
-        return res
-
-    def on_AnySeq(self, value):
-        if value in self.s.anys:
-            return self.s.anys[value]
-
-        res_shape = value.shape()
-        res = self.s.rtlil.wire(width=res_shape.width, src=_src(value.src_loc))
-        self.s.rtlil.cell("$anyseq", ports={
+        self.s.rtlil.cell("$" + value.kind.value, ports={
             "\\Y": res,
         }, params={
             "WIDTH": res_shape.width,
@@ -619,10 +605,7 @@ class _LHSValueCompiler(_ValueCompiler):
     def on_Const(self, value):
         raise TypeError # :nocov:
 
-    def on_AnyConst(self, value):
-        raise TypeError # :nocov:
-
-    def on_AnySeq(self, value):
+    def on_AnyValue(self, value):
         raise TypeError # :nocov:
 
     def on_Initial(self, value):
@@ -721,21 +704,17 @@ def on_Assign(self, stmt):
         else:
             self._case.assign(self.lhs_compiler(stmt.lhs), rhs_sigspec)
 
-    def on_property(self, stmt):
+    def on_Property(self, stmt):
         self(stmt._check.eq(stmt.test))
         self(stmt._en.eq(1))
 
         en_wire = self.rhs_compiler(stmt._en)
         check_wire = self.rhs_compiler(stmt._check)
-        self.state.rtlil.cell("$" + stmt._kind, ports={
+        self.state.rtlil.cell("$" + stmt.kind.value, ports={
             "\\A": check_wire,
             "\\EN": en_wire,
         }, src=_src(stmt.src_loc), name=stmt.name)
 
-    on_Assert = on_property
-    on_Assume = on_property
-    on_Cover  = on_property
-
     def on_Switch(self, stmt):
         self._check_rhs(stmt.test)
 

amaranth/hdl/_ast.py

@@ -918,32 +918,6 @@ def __repr__(self):
 C = Const  # shorthand
 
 
-class AnyValue(Value, DUID):
-    def __init__(self, shape, *, src_loc_at=0):
-        super().__init__(src_loc_at=src_loc_at)
-        shape = Shape.cast(shape, src_loc_at=1 + src_loc_at)
-        self.width  = shape.width
-        self.signed = shape.signed
-
-    def shape(self):
-        return Shape(self.width, self.signed)
-
-    def _rhs_signals(self):
-        return SignalSet()
-
-
-@final
-class AnyConst(AnyValue):
-    def __repr__(self):
-        return "(anyconst {}'{})".format(self.width, "s" if self.signed else "")
-
-
-@final
-class AnySeq(AnyValue):
-    def __repr__(self):
-        return "(anyseq {}'{})".format(self.width, "s" if self.signed else "")
-
-
 @final
 class Operator(Value):
     def __init__(self, operator, operands, *, src_loc_at=0):
@@ -1442,6 +1416,37 @@ def __repr__(self):
         return f"(rst {self.domain})"
 
 
+@final
+class AnyValue(Value, DUID):
+    class Kind(Enum):
+        AnyConst = "anyconst"
+        AnySeq   = "anyseq"
+
+    def __init__(self, kind, shape, *, src_loc_at=0):
+        super().__init__(src_loc_at=src_loc_at)
+        self.kind  = self.Kind(kind)
+        shape = Shape.cast(shape, src_loc_at=1 + src_loc_at)
+        self.width  = shape.width
+        self.signed = shape.signed
+
+    def shape(self):
+        return Shape(self.width, self.signed)
+
+    def _rhs_signals(self):
+        return SignalSet()
+
+    def __repr__(self):
+        return "({} {}'{})".format(self.kind.value, self.width, "s" if self.signed else "")
+
+
+def AnyConst(shape, *, src_loc_at=0):
+    return AnyValue("anyconst", shape, src_loc_at=src_loc_at+1)
+
+
+def AnySeq(shape, *, src_loc_at=0):
+    return AnyValue("anyseq", shape, src_loc_at=src_loc_at+1)
+
+
 class Array(MutableSequence):
     """Addressable multiplexer.
 
@@ -1729,11 +1734,18 @@ class UnusedProperty(UnusedMustUse):
     pass
 
 
+@final
 class Property(Statement, MustUse):
     _MustUse__warning = UnusedProperty
 
-    def __init__(self, test, *, _check=None, _en=None, name=None, src_loc_at=0):
+    class Kind(Enum):
+        Assert = "assert"
+        Assume = "assume"
+        Cover  = "cover"
+
+    def __init__(self, kind, test, *, _check=None, _en=None, name=None, src_loc_at=0):
         super().__init__(src_loc_at=src_loc_at)
+        self.kind   = self.Kind(kind)
         self.test   = Value.cast(test)
         self._check = _check
         self._en    = _en
@@ -1742,10 +1754,10 @@ def __init__(self, test, *, _check=None, _en=None, name=None, src_loc_at=0):
             raise TypeError("Property name must be a string or None, not {!r}"
                             .format(self.name))
         if self._check is None:
-            self._check = Signal(reset_less=True, name=f"${self._kind}$check")
+            self._check = Signal(reset_less=True, name=f"${self.kind.value}$check")
             self._check.src_loc = self.src_loc
         if _en is None:
-            self._en = Signal(reset_less=True, name=f"${self._kind}$en")
+            self._en = Signal(reset_less=True, name=f"${self.kind.value}$en")
             self._en.src_loc = self.src_loc
 
     def _lhs_signals(self):
@@ -1756,23 +1768,20 @@ def _rhs_signals(self):
 
     def __repr__(self):
         if self.name is not None:
-            return f"({self.name}: {self._kind} {self.test!r})"
-        return f"({self._kind} {self.test!r})"
+            return f"({self.name}: {self.kind.value} {self.test!r})"
+        return f"({self.kind.value} {self.test!r})"
 
 
-@final
-class Assert(Property):
-    _kind = "assert"
+def Assert(test, *, name=None, src_loc_at=0):
+    return Property("assert", test, name=name, src_loc_at=src_loc_at+1)
 
 
-@final
-class Assume(Property):
-    _kind = "assume"
+def Assume(test, *, name=None, src_loc_at=0):
+    return Property("assume", test, name=name, src_loc_at=src_loc_at+1)
 
 
-@final
-class Cover(Property):
-    _kind = "cover"
+def Cover(test, *, name=None, src_loc_at=0):
+    return Property("cover", test, name=name, src_loc_at=src_loc_at+1)
 
 
 @final

amaranth/hdl/_dsl.py

@@ -506,7 +506,7 @@ def domain_name(domain):
             self._pop_ctrl()
 
         for stmt in Statement.cast(assigns):
-            if not isinstance(stmt, (Assign, Assert, Assume, Cover)):
+            if not isinstance(stmt, (Assign, Property)):
                 raise SyntaxError(
                     "Only assignments and property checks may be appended to d.{}"
                     .format(domain_name(domain)))