build.plat: introduce quote_sdc

quote_sdc is needed because synplify excepts signal names to be quoted but wrapped in curly braces.

Author: anuejn

nmigen/build/plat.py

@@ -395,6 +395,9 @@ def tcl_escape(string):
         def tcl_quote(string):
             return '"' + re.sub(r"([$[\\])", r"\\\1", string) + '"'
 
+        def sdc_quote(string):
+            return "{" + re.sub(r"([${}\\])", r"\\\1", string) + "}"
+
         def verbose(arg):
             if "NMIGEN_verbose" in os.environ:
                 return arg
@@ -417,6 +420,7 @@ def render(source, origin, syntax=None):
                 compiled.environment.filters["ascii_escape"] = ascii_escape
                 compiled.environment.filters["tcl_escape"] = tcl_escape
                 compiled.environment.filters["tcl_quote"] = tcl_quote
+                compiled.environment.filters["sdc_quote"] = sdc_quote
             except jinja2.TemplateSyntaxError as e:
                 e.args = ("{} (at {}:{})".format(e.message, origin, e.lineno),)
                 raise

nmigen/vendor/lattice_ecp5.py

@@ -240,9 +240,9 @@ class LatticeECP5Platform(TemplatedPlatform):
             set_hierarchy_separator {/}
             {% for net_signal, port_signal, frequency in platform.iter_clock_constraints() -%}
                 {% if port_signal is not none -%}
-                    create_clock -name {{port_signal.name|tcl_quote}} -period {{1000000000/frequency}} [get_ports {{port_signal.name|tcl_quote}}]
+                    create_clock -name {{port_signal.name|sdc_quote}} -period {{1000000000/frequency}} [get_ports {{port_signal.name|sdc_quote}}]
                 {% else -%}
-                    create_clock -name {{net_signal.name|tcl_quote}} -period {{1000000000/frequency}} [get_nets {{net_signal|hierarchy("/")|tcl_quote}}]
+                    create_clock -name {{net_signal.name|sdc_quote}} -period {{1000000000/frequency}} [get_nets {{net_signal|hierarchy("/")|sdc_quote}}]
                 {% endif %}
             {% endfor %}
             {{get_override("add_constraints")|default("# (add_constraints placeholder)")}}

nmigen/vendor/lattice_machxo_2_3l.py

@@ -107,9 +107,9 @@ class LatticeMachXO2Or3LPlatform(TemplatedPlatform):
             set_hierarchy_separator {/}
             {% for net_signal, port_signal, frequency in platform.iter_clock_constraints() -%}
                 {% if port_signal is not none -%}
-                    create_clock -name {{port_signal.name|tcl_quote}} -period {{1000000000/frequency}} [get_ports {{port_signal.name|tcl_quote}}]
+                    create_clock -name {{port_signal.name|sdc_quote}} -period {{1000000000/frequency}} [get_ports {{port_signal.name|sdc_quote}}]
                 {% else -%}
-                    create_clock -name {{net_signal.name|tcl_quote}} -period {{1000000000/frequency}} [get_nets {{net_signal|hierarchy("/")|tcl_quote}}]
+                    create_clock -name {{net_signal.name|sdc_quote}} -period {{1000000000/frequency}} [get_nets {{net_signal|hierarchy("/")|sdc_quote}}]
                 {% endif %}
             {% endfor %}
             {{get_override("add_constraints")|default("# (add_constraints placeholder)")}}