Skip to content

Commit 895a8e6

Browse files
authored
[AArch64][GISel] Support neon.abs intrinsic for vector types (llvm#107226)
This patch lowers the intrinsic to G_ABS and thus supports the intrinsic in GISel.
1 parent 7fb13a9 commit 895a8e6

File tree

2 files changed

+35
-19
lines changed

2 files changed

+35
-19
lines changed

llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1711,6 +1711,14 @@ bool AArch64LegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper,
17111711
return LowerBinOp(AArch64::G_UMULL);
17121712
case Intrinsic::aarch64_neon_umull:
17131713
return LowerBinOp(AArch64::G_SMULL);
1714+
case Intrinsic::aarch64_neon_abs: {
1715+
// Lower the intrinsic to G_ABS.
1716+
MachineIRBuilder MIB(MI);
1717+
MIB.buildInstr(TargetOpcode::G_ABS, {MI.getOperand(0)}, {MI.getOperand(2)});
1718+
MI.eraseFromParent();
1719+
return true;
1720+
}
1721+
17141722
case Intrinsic::vector_reverse:
17151723
// TODO: Add support for vector_reverse
17161724
return false;

llvm/test/CodeGen/AArch64/arm64-vabs.ll

Lines changed: 27 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -2,15 +2,7 @@
22
; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck -check-prefixes=CHECK,CHECK-SD %s
33
; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI
44

5-
; CHECK-GI: warning: Instruction selection used fallback path for abs_8b
6-
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for abs_16b
7-
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for abs_4h
8-
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for abs_8h
9-
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for abs_2s
10-
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for abs_4s
11-
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for abs_1d
12-
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for abs_1d_honestly
13-
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fabds
5+
; CHECK-GI: warning: Instruction selection used fallback path for fabds
146
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fabdd
157
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for uabd_i64
168

@@ -1047,21 +1039,37 @@ define <4 x i32> @abs_4s(ptr %A) nounwind {
10471039
}
10481040

10491041
define <1 x i64> @abs_1d(<1 x i64> %A) nounwind {
1050-
; CHECK-LABEL: abs_1d:
1051-
; CHECK: // %bb.0:
1052-
; CHECK-NEXT: abs d0, d0
1053-
; CHECK-NEXT: ret
1042+
; CHECK-SD-LABEL: abs_1d:
1043+
; CHECK-SD: // %bb.0:
1044+
; CHECK-SD-NEXT: abs d0, d0
1045+
; CHECK-SD-NEXT: ret
1046+
;
1047+
; CHECK-GI-LABEL: abs_1d:
1048+
; CHECK-GI: // %bb.0:
1049+
; CHECK-GI-NEXT: fmov x8, d0
1050+
; CHECK-GI-NEXT: fmov x9, d0
1051+
; CHECK-GI-NEXT: neg x8, x8
1052+
; CHECK-GI-NEXT: cmp x9, #0
1053+
; CHECK-GI-NEXT: fmov d1, x8
1054+
; CHECK-GI-NEXT: fcsel d0, d0, d1, gt
1055+
; CHECK-GI-NEXT: ret
10541056
%abs = call <1 x i64> @llvm.aarch64.neon.abs.v1i64(<1 x i64> %A)
10551057
ret <1 x i64> %abs
10561058
}
10571059

10581060
define i64 @abs_1d_honestly(i64 %A) nounwind {
1059-
; CHECK-LABEL: abs_1d_honestly:
1060-
; CHECK: // %bb.0:
1061-
; CHECK-NEXT: fmov d0, x0
1062-
; CHECK-NEXT: abs d0, d0
1063-
; CHECK-NEXT: fmov x0, d0
1064-
; CHECK-NEXT: ret
1061+
; CHECK-SD-LABEL: abs_1d_honestly:
1062+
; CHECK-SD: // %bb.0:
1063+
; CHECK-SD-NEXT: fmov d0, x0
1064+
; CHECK-SD-NEXT: abs d0, d0
1065+
; CHECK-SD-NEXT: fmov x0, d0
1066+
; CHECK-SD-NEXT: ret
1067+
;
1068+
; CHECK-GI-LABEL: abs_1d_honestly:
1069+
; CHECK-GI: // %bb.0:
1070+
; CHECK-GI-NEXT: cmp x0, #0
1071+
; CHECK-GI-NEXT: cneg x0, x0, le
1072+
; CHECK-GI-NEXT: ret
10651073
%abs = call i64 @llvm.aarch64.neon.abs.i64(i64 %A)
10661074
ret i64 %abs
10671075
}

0 commit comments

Comments
 (0)