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lines changed Original file line number Diff line number Diff line change 33- Evaluation board product page: [ ADRV9364-Z7020] ( https://www.analog.com/adrv9364-z7020 )
44- System documentation: https://wiki.analog.com/resources/eval/user-guides/adrv9364-z7020
55- HDL project documentation: https://analogdevicesinc.github.io/hdl/projects/adrv9364z7020/index.html
6+ - Evaluation board VADJ: 2.5V
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7- ### ADRV9364Z7020 SOM
8+ ### ADRV9364Z7020 SOM
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910This folder contains the ADRV9364Z7020 SOM projects for each of the carrier boards.
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Original file line number Diff line number Diff line change 1+ <!-- no_build_example, no_no_os -->
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13# ADRV9364Z7020/CCBOB-CMOS
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5+ - VADJ with which it was tested in hardware: 2.5V
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37## Building the project
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59```
610cd projects/adrv9364z7020/ccbob_cmos
711make
812```
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10- Corresponding devicetree : [ zynq-adrv9364-z7020-bob-cmos.dts] ( https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/xilinx/zynq-adrv9364-z7020-bob-cmos.dts )
14+ Corresponding device tree : [ zynq-adrv9364-z7020-bob-cmos.dts] ( https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/xilinx/zynq-adrv9364-z7020-bob-cmos.dts )
Original file line number Diff line number Diff line change 1+ <!-- no_build_example, no_no_os -->
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13# ADRV9364Z7020/CCBOB-LVDS
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5+ - VADJ with which it was tested in hardware: 2.5V
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37## Building the project
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59```
610cd projects/adrv9364z7020/ccbob_lvds
711make
812```
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10- Corresponding devicetree : [ zynq-adrv9364-z7020-bob.dts] ( https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/xilinx/zynq-adrv9364-z7020-bob.dts )
14+ Corresponding device tree : [ zynq-adrv9364-z7020-bob.dts] ( https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/xilinx/zynq-adrv9364-z7020-bob.dts )
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