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tests/analog_functions.py

Lines changed: 47 additions & 47 deletions
Original file line numberDiff line numberDiff line change
@@ -314,7 +314,7 @@ def phase_diff_ch0_ch1(aout, ain, trig):
314314
# csv_path -- Path to the csv file where are saved the samples
315315
# Returns:
316316
# phase_diff_between_channels-- the phase difference between channels in degrees
317-
#
317+
#
318318

319319
file_name, dir_name, csv_path = get_result_files(gen_reports)
320320

@@ -1190,7 +1190,7 @@ def compute_percentage_diff(v1, v2):
11901190
try:
11911191
percentage_diff = ((vals[1] - vals[0]) / vals[1])
11921192
except:
1193-
pass
1193+
pass
11941194
return percentage_diff
11951195

11961196
def compute_y_distance(v1, v2):
@@ -1200,42 +1200,42 @@ def compute_y_distance(v1, v2):
12001200

12011201
def is_spike(data, peak, threshold = 0.25):
12021202
# for sampling_frequency_in = 1_000_000 the center of of the glitch is at 75 samples distance with repect to the peak
1203-
dx_small = 75
1203+
dx_small = 75
12041204
dx_large = 200
1205-
1205+
12061206
prev_sample, next_sample = data[peak - dx_small], data[peak + dx_small]
12071207
step_inside_glitch_range = compute_y_distance(prev_sample, next_sample)
12081208
prev_sample, next_sample = data[peak - dx_large], data[peak + dx_large]
12091209
step_outside_glitch_range = compute_y_distance(prev_sample, next_sample)
1210-
1210+
12111211
percentage_dif = compute_percentage_diff(step_inside_glitch_range, step_outside_glitch_range)
12121212
return percentage_dif > threshold
12131213

12141214
def test_buffer_transition_glitch(channel, ain, aout, trig, waveform, amplitude=1):
12151215
file_name, dir_name, csv_path = get_result_files(gen_reports)
1216-
1216+
12171217
BUFFER_SIZE = 5_00_000
1218-
1218+
12191219
reset.analog_in(ain)
1220-
reset.analog_out(aout)
1220+
reset.analog_out(aout)
12211221
reset.trigger(trig)
1222-
1222+
12231223
test_name = "buffer_transition_glitch"
12241224
data_string = []
1225-
1225+
12261226
dac_sr = 75_000
12271227
adc_sr = 1_000_000
1228-
1228+
12291229
ain.setSampleRate(adc_sr)
12301230
ain.setRange(channel, libm2k.PLUS_MINUS_2_5V)
1231-
1231+
12321232
set_trig(trig, channel, 0, libm2k.RISING_EDGE_ANALOG, 0.1)
1233-
1233+
12341234
aout.setSampleRate(channel, dac_sr)
12351235
aout.enableChannel(channel, True)
12361236
aout.setCyclic(True)
12371237
ctx.setTimeout(10000)
1238-
1238+
12391239
out_samples = 4096
12401240
if waveform == 'sine':
12411241
offset = 0
@@ -1244,21 +1244,21 @@ def test_buffer_transition_glitch(channel, ain, aout, trig, waveform, amplitude=
12441244
if waveform == 'dc':
12451245
data_high = [amplitude] * out_samples
12461246
data_low = [-amplitude] * out_samples
1247-
1247+
12481248
ain.startAcquisition(BUFFER_SIZE)
12491249
for _ in range(5):
12501250
aout.push(channel, data_high)
12511251
time.sleep(0.1)
12521252
aout.push(channel, data_low)
12531253
time.sleep(0.1)
12541254
try:
1255-
data = np.array(ain.getSamples(BUFFER_SIZE)[channel][int(BUFFER_SIZE* 0.05):])
1255+
data = np.array(ain.getSamples(BUFFER_SIZE)[channel][int(BUFFER_SIZE* 0.05):])
12561256
except:
12571257
print('Timeout occured')
1258-
1258+
12591259
aout.stop()
12601260
ain.stopAcquisition()
1261-
1261+
12621262
param_args = {
12631263
'sine': {
12641264
'threshold': 0.1,
@@ -1275,22 +1275,22 @@ def test_buffer_transition_glitch(channel, ain, aout, trig, waveform, amplitude=
12751275
},
12761276
},
12771277
}
1278-
1279-
peaks_pos, _ = find_peaks(data, **param_args[waveform]["find_peaks_args"])
1280-
peaks_neg, _ = find_peaks(-data, **param_args[waveform]["find_peaks_args"])
1281-
1282-
peaks = np.concatenate((peaks_pos, peaks_neg))
1283-
filtered_peaks = list(filter(lambda peak: is_spike(data, peak, param_args[waveform]["threshold"]), peaks))
1278+
1279+
peaks_pos, _ = find_peaks(data, **param_args[waveform]["find_peaks_args"])
1280+
peaks_neg, _ = find_peaks(-data, **param_args[waveform]["find_peaks_args"])
1281+
1282+
peaks = np.concatenate((peaks_pos, peaks_neg))
1283+
filtered_peaks = list(filter(lambda peak: is_spike(data, peak, param_args[waveform]["threshold"]), peaks))
12841284
num_peaks = len(filtered_peaks)
1285-
1285+
12861286
data_string.append(
12871287
"Number of glitch peaks found in " + waveform + " signal :" + str(num_peaks))
1288-
1288+
12891289
if gen_reports:
1290-
write_file(file_name, test_name, channel, data_string)
1291-
plot_to_file(f'Buffer Glitch , channel{channel}',
1292-
data,
1293-
dir_name,
1290+
write_file(file_name, test_name, channel, data_string)
1291+
plot_to_file(f'Buffer Glitch , channel{channel}',
1292+
data,
1293+
dir_name,
12941294
f'buffer_glitch_plot_ch{channel}_{waveform}.png',
12951295
data_marked=filtered_peaks)
12961296

@@ -1394,21 +1394,21 @@ def check_for_glitch(data, threshold=0.3):
13941394
for chn_samples in data:
13951395
if any(abs(left - right) >= threshold for left, right in zip(chn_samples, chn_samples[1:])):
13961396
glitch_found = True
1397-
return glitch_found
1398-
1397+
return glitch_found
1398+
13991399
file_name, dir_name, csv_path = get_result_files(gen_reports)
14001400
test_name = "sample_hold"
14011401
data_string = []
14021402

14031403
chn_str = "both_channels" if channel is None else f"CH{channel}"
14041404
sr_str = get_sample_rate_display_format(cfg.get("dac_sr"))
14051405
x_time, x_label = get_time_format(cfg.get("buffer_size"), cfg.get("adc_sr"))
1406-
1406+
14071407
if gen_reports:
14081408
subdir_name = f"{dir_name}/last_sample_hold/{chn_str}"
14091409
os.makedirs(subdir_name, exist_ok=True)
14101410

1411-
SLEEP = 0.15
1411+
SLEEP = 0.15
14121412
glitched = False
14131413
is_last_sample_hold_ok = True # Assume it is ok until proven otherwise
14141414
is_idle_ok = True
@@ -1440,7 +1440,7 @@ def check_for_glitch(data, threshold=0.3):
14401440
# NOTE: we selected an arbitraty number of samples from both ends to validate sample hold and reset functionality
14411441
# 1: Rising
14421442
data = step_ramp_rising(channel, trig_chn, buffer_ramp_up)
1443-
if channel is None:
1443+
if channel is None:
14441444
# Both channels should idle at 0V before push due to being reset
14451445
is_idle_ok = is_idle_ok and are_values_within_range(data[:, :2000], -0.20, 0.20, channel)
14461446
elif channel == libm2k.ANALOG_IN_CHANNEL_1:
@@ -1450,13 +1450,13 @@ def check_for_glitch(data, threshold=0.3):
14501450
is_idle_ok = is_idle_ok and are_values_within_range(data, -0.20, 0.20, libm2k.ANALOG_IN_CHANNEL_1)
14511451
# Shoud hold last sample from new buffer for current channel config
14521452
is_idle_ok = is_idle_ok and are_values_within_range(data[:, -2000:], cfg["amplitude"] * 0.85, cfg["amplitude"] * 1.15, channel)
1453-
1453+
14541454
if gen_reports:
14551455
plot_to_file(title=f"Last Sample Hold: {chn_str} - {sr_str} - Rising Ramp",
14561456
data=data[0],
14571457
data1=data[1],
14581458
x_data=x_time,
1459-
xlabel = x_label,
1459+
xlabel = x_label,
14601460
dir_name=subdir_name,
14611461
y_lim=(-6, 6),
14621462
filename=f"last_sample_hold_{chn_str}_{sr_str}_step1.png")
@@ -1478,7 +1478,7 @@ def check_for_glitch(data, threshold=0.3):
14781478
data=data[0],
14791479
data1=data[1],
14801480
x_data=x_time,
1481-
xlabel = x_label,
1481+
xlabel = x_label,
14821482
dir_name=subdir_name,
14831483
y_lim=(-6, 6),
14841484
filename=f"last_sample_hold_{chn_str}_{sr_str}_step2.png")
@@ -1500,7 +1500,7 @@ def check_for_glitch(data, threshold=0.3):
15001500
data=data[0],
15011501
data1=data[1],
15021502
x_data=x_time,
1503-
xlabel = x_label,
1503+
xlabel = x_label,
15041504
dir_name=subdir_name,
15051505
y_lim=(-6, 6),
15061506
filename=f"last_sample_hold_{chn_str}_{sr_str}_step3.png")
@@ -1522,15 +1522,15 @@ def check_for_glitch(data, threshold=0.3):
15221522
data=data[0],
15231523
data1=data[1],
15241524
x_data=x_time,
1525-
xlabel = x_label,
1525+
xlabel = x_label,
15261526
dir_name=subdir_name,
15271527
y_lim=(-6, 6),
15281528
filename=f"last_sample_hold_{chn_str}_{sr_str}_step4.png")
15291529

15301530
aout.stop()
15311531
return glitched, is_last_sample_hold_ok, is_idle_ok
15321532

1533-
1533+
15341534
def test_aout_triggering(
15351535
ain: libm2k.M2kAnalogIn,
15361536
aout: libm2k.M2kAnalogOut,
@@ -1544,7 +1544,7 @@ def configure_trigger(trig: libm2k.M2kHardwareTrigger,
15441544
trig_pin, status, delay):
15451545
trig.setAnalogDelay(-delay)
15461546
trig.setDigitalDelay(-delay)
1547-
trig.setDigitalSource(libm2k.SRC_NONE) # DigitalIn conditioned by internal trigger structure
1547+
trig.setDigitalSource(libm2k.SRC_NONE) # DigitalIn conditioned by internal trigger structure
15481548
trig.setDigitalCondition(trig_pin, libm2k.RISING_EDGE_DIGITAL)
15491549
trig.setAnalogOutTriggerSource(libm2k.TRIGGER_LA) # aout conditioned by the LA trigger
15501550
trig.setAnalogOutTriggerStatus(status)
@@ -1564,7 +1564,7 @@ def configure_trigger(trig: libm2k.M2kHardwareTrigger,
15641564

15651565
ADC_SR = 100_000_000
15661566
DAC_SR = 75_000_000
1567-
SR_IN_DIG = 100_000_000
1567+
SR_IN_DIG = 100_000_000
15681568
SR_OUT_DIG = 100_000_000
15691569

15701570
ctx.reset()
@@ -1589,7 +1589,7 @@ def configure_trigger(trig: libm2k.M2kHardwareTrigger,
15891589
aout.setKernelBuffersCount(0, KB_COUNT)
15901590
aout.setKernelBuffersCount(1, KB_COUNT)
15911591
assert aout.getSampleRate(1) == DAC_SR, "Failed to set the sample rate for AnalogOut1"
1592-
1592+
15931593
dig.setDirection(TRIG_PIN, libm2k.DIO_OUTPUT)
15941594
dig.setOutputMode(TRIG_PIN, libm2k.DIO_PUSHPULL)
15951595
dig.enableChannel(TRIG_PIN, True)
@@ -1651,22 +1651,22 @@ def configure_trigger(trig: libm2k.M2kHardwareTrigger,
16511651
# Should output exactly 1 period after trigger
16521652
result = result and (len(peaks_CH0_right) == 1) and (len(peaks_CH1_right) == 1)
16531653
# Case 3
1654-
if (status == libm2k.START) and (isCyclic) and (not auto_rearm):
1654+
if (status == libm2k.START) and (isCyclic) and (not auto_rearm):
16551655
# Should IDLE before trigger at 0V because the channel was reset
16561656
result = are_values_within_range(analog_data[:, :DELAY ], -0.2, 0.2)
16571657
# Should output multiple period after trigger
16581658
result = result and (len(peaks_CH0_right) > 1) and (len(peaks_CH1_right) > 1)
16591659
# Case 5 and 6
16601660
if ((status == libm2k.STOP) and (not isCyclic) and (not auto_rearm)) or \
1661-
((status == libm2k.STOP) and (not isCyclic) and (auto_rearm)):
1661+
((status == libm2k.STOP) and (not isCyclic) and (auto_rearm)):
16621662
# The channels are in the last sample hold state and STOP is not available for non-cyclic buffers due to HDL limitations
16631663
# We expect both channels to hold last sample for the entire duration
16641664
result = result and are_values_within_range(analog_data, -AMPLITUDE * 1.2, -AMPLITUDE * 0.8)
16651665
result = result and (len(peaks_CH0_left) == 0) and (len(peaks_CH1_left) == 0)
16661666
result = result and (len(peaks_CH0_right) == 0) and (len(peaks_CH1_right) == 0)
16671667
# Case 7 and 8
16681668
if ((status == libm2k.STOP) and (isCyclic) and (not auto_rearm)) or \
1669-
((status == libm2k.STOP) and (isCyclic) and (auto_rearm)):
1669+
((status == libm2k.STOP) and (isCyclic) and (auto_rearm)):
16701670
# Should be generating cyclic signal before trigger
16711671
result = result and (len(peaks_CH0_left) > 1) and (len(peaks_CH1_left) > 1)
16721672
# Should stop generating signal after trigger

tests/m2k_analog_test.py

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -78,7 +78,7 @@ def setUpClass(self):
7878
input()
7979

8080
def test_1_analog_objects(self):
81-
# Verify through open_context() function if the analog objects AnalogIn, AnalogOut and Trigger were
81+
# Verify through open_context() function if the analog objects AnalogIn, AnalogOut and Trigger were
8282
# successfully retrieved.
8383

8484
with self.subTest(msg='test if AnalogIn, AnalogOut and Trigger objects were retrieved'):
@@ -289,23 +289,23 @@ def test_timeout(self):
289289

290290
@unittest.skipIf(ctx.getFirmwareVersion() < 'v0.32', 'This is a known bug in previous firmware implementations which is fixed in v0.32')
291291
def test_buffer_transition_glitch(self):
292-
# Pushing a new cyclic buffer should output the value of the raw attr. In previous firmware versions, the new buffer would start
292+
# Pushing a new cyclic buffer should output the value of the raw attr. In previous firmware versions, the new buffer would start
293293
# with the last sample from previous buffer which lead to a glitch in the output signal. This test verifies that the glitch is not present anymore.
294-
294+
295295
for channel in [libm2k.ANALOG_IN_CHANNEL_1, libm2k.ANALOG_IN_CHANNEL_2]:
296296
for waveform in ['dc', 'sine']:
297297
num_glitches = test_buffer_transition_glitch(channel, ain, aout, trig, waveform)
298-
298+
299299
with self.subTest(msg='Test buffer transition glitch: ' + waveform + ' on ch' + str(channel)):
300300
self.assertEqual(num_glitches, 0, 'Found ' + str(num_glitches) + ' glitches on channel ' + str(channel))
301301

302302
# @unittest.skipIf(ctx.getFirmwareVersion() < 'v0.33',
303303
# 'The sample and hold feature is available starting with firmware v0.33. Note: v0.32 had a glitch that is handled in this test.')
304304
def test_last_sample_hold(self):
305305
# Tests the last sample hold functionality for different channels and DAC sample rates.
306-
# This test iterates over different channels (each channel individually and both channels together)
307-
# and then tests the last sample hold functionality. When testing both channels together, 'None'
308-
# is used to denote this case.
306+
# This test iterates over different channels (each channel individually and both channels together)
307+
# and then tests the last sample hold functionality. When testing both channels together, 'None'
308+
# is used to denote this case.
309309
# It verifies that the last sample is held correctly and that there are no glitches in the output signal in between the last sample and a new push.
310310

311311
for channel in [libm2k.ANALOG_IN_CHANNEL_1, libm2k.ANALOG_IN_CHANNEL_2, None]:
@@ -338,8 +338,8 @@ def test_aout_triggering(self):
338338
with self.subTest(msg=f'Test aout start with trigger for: status={status_str}, isCyclic={isCyclic}, autorearm={autorearm} '):
339339
self.assertEqual(test_result, True, msg=f'Specification not met')
340340

341-
@unittest.skipIf(ctx.getFirmwareVersion() < 'v0.34',
342-
'Dual-channel sync fix for m2k-fw#20 requires firmware v0.34+')
341+
# @unittest.skipIf(ctx.getFirmwareVersion() < 'v0.34',
342+
# 'Dual-channel sync fix for m2k-fw#20 requires firmware v0.34+')
343343
def test_dual_channel_waveform_sync(self):
344344
"""Test that dual-channel waveform phase relationships are correct.
345345

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