arm: dts: xilinx: Add dts for AD4052 on cora

Add device tree for using AD4052 on CoraZ7.

Signed-off-by: Jorge Marques <jorge.marques@analog.com>

Author: gastmaier

arch/arm/boot/dts/xilinx/zynq-coraz7s-ad4052.dts

@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Analog Devices AD4052
+ *
+ * hdl_project: <ad4052_ardz/coraz7s>
+ * Link: https://github.com/analogdevicesinc/hdl/tree/main/projects/ad4052_ardz
+ * board_revision: <A>
+ *
+ * Copyright (C) 2026 Analog Devices Inc.
+ */
+/dts-v1/;
+#include "zynq-coraz7s.dtsi"
+#include "zynq-coraz7s-axi-sysid.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/iio/adc/adi,ad4052.h>
+
+/ {
+	vdd: regulator-vdd {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-fixed-supply";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+	};
+
+	vio: regulator-vio {
+		compatible = "regulator-fixed";
+		regulator-name = "vio-fixed-supply";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+	};
+
+	ref: regulator-ref {
+		compatible = "regulator-fixed";
+		regulator-name = "ref-fixed-supply";
+		regulator-min-microvolt = <2500000>;
+		regulator-max-microvolt = <2500000>;
+		regulator-always-on;
+	};
+};
+
+&fpga_axi {
+	rx_dma: dma-controller@44a30000 {
+		compatible = "adi,axi-dmac-1.00.a";
+		reg = <0x44a30000 0x1000>;
+		#dma-cells = <1>;
+		interrupt-parent = <&intc>;
+		interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clkc 15>;
+	};
+
+	spi_clk: clock-controller@44a70000 {
+		compatible = "adi,axi-clkgen-2.00.a";
+		reg = <0x44a70000 0x10000>;
+		#clock-cells = <0>;
+		clocks = <&clkc 15>, <&clkc 15>;
+		clock-names = "s_axi_aclk", "clkin1";
+		clock-output-names = "spi_clk";
+	};
+
+	adc_trigger: pwm@44b00000 {
+		compatible = "adi,axi-pwmgen-2.00.a";
+		reg = <0x44b00000 0x1000>;
+		#pwm-cells = <2>;
+		clocks = <&spi_clk>;
+	};
+
+	axi_spi_engine: spi@44a00000 {
+		compatible = "adi,axi-spi-engine-1.00.a";
+		reg = <0x44a00000 0x1FF>;
+		interrupt-parent = <&intc>;
+		interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clkc 15>, <&spi_clk>;
+		clock-names = "s_axi_aclk", "spi_clk";
+
+		dmas = <&rx_dma 0>;
+		dma-names = "offload0-rx";
+		trigger-sources = <&ad4052 AD4052_TRIGGER_EVENT_DATA_READY
+					   AD4052_TRIGGER_PIN_GP1>;
+
+		#address-cells = <0x1>;
+		#size-cells = <0x0>;
+
+		ad4052: ad4052@0 {
+			compatible = "adi,ad4052";
+			reg = <0>;
+			vdd-supply = <&vdd>;
+			vio-supply = <&vio>;
+			ref-supply = <&ref>;
+			spi-max-frequency = <16000000>;
+
+			#trigger-source-cells = <2>;
+
+			pwms = <&adc_trigger 0 10000 0>;
+
+			interrupt-parent = <&gpio0>;
+			interrupts = <86 IRQ_TYPE_EDGE_RISING>,
+				     <87 IRQ_TYPE_EDGE_FALLING>;
+			interrupt-names = "gp0", "gp1";
+			cnv-gpios = <&gpio0 88 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};