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jiezjiez
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arm/arm64: dts: adi: sc59x: fix I2C and CRC nodes
This patch does the following: - sc594-som.dtsi and sc598-som.dtsi: remove useless code - sc59x.dtsi: add i2c3/4/5 nodes; fix register block length in i2c controller nodes; fix register block base address, register block length, interrupt number in crc0 and crc1 nodes; add crc2 and crc3. - sc59x-64.dtsi: fix register block length for crc0 and crc1; add crc2 and crc3; add crc2_dma and crc3_dma in crc_cluster. Signed-off-by: Jie Zhang <jie.zhang@analog.com>
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4 files changed

+104
-36
lines changed

4 files changed

+104
-36
lines changed

‎arch/arm/boot/dts/adi/sc594-som.dtsi‎

Lines changed: 0 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -228,14 +228,6 @@
228228
};
229229
};
230230

231-
&i2c0 {
232-
status = "disabled";
233-
};
234-
235-
&i2c1 {
236-
status = "disabled";
237-
};
238-
239231
&i2c2 {
240232
status = "okay";
241233

@@ -303,14 +295,6 @@
303295
};
304296
};
305297

306-
&crc0 {
307-
status = "disabled";
308-
};
309-
310-
&crc1 {
311-
status = "disabled";
312-
};
313-
314298
&usb0_phy {
315299
reset-gpios = <&gpg 11 GPIO_ACTIVE_LOW>;
316300
status = "okay";

‎arch/arm/boot/dts/adi/sc59x.dtsi‎

Lines changed: 66 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -44,6 +44,9 @@
4444
i2c0 = &i2c0;
4545
i2c1 = &i2c1;
4646
i2c2 = &i2c2;
47+
i2c3 = &i2c3;
48+
i2c4 = &i2c4;
49+
i2c5 = &i2c5;
4750
i2s4 = &i2s4;
4851
mmc0 = &mmc0;
4952
sru0 = &sru_ctrl_dai0;
@@ -351,7 +354,7 @@
351354
#address-cells = <1>;
352355
#size-cells = <0>;
353356
compatible = "adi,twi";
354-
reg = <0x31001400 0xFF>;
357+
reg = <0x31001400 0x100>;
355358
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
356359
clock-khz = <100>;
357360
clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>;
@@ -363,7 +366,7 @@
363366
#address-cells = <1>;
364367
#size-cells = <0>;
365368
compatible = "adi,twi";
366-
reg = <0x31001500 0xFF>;
369+
reg = <0x31001500 0x100>;
367370
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
368371
clock-khz = <100>;
369372
clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>;
@@ -375,14 +378,50 @@
375378
#address-cells = <1>;
376379
#size-cells = <0>;
377380
compatible = "adi,twi";
378-
reg = <0x31001600 0xFF>;
381+
reg = <0x31001600 0x100>;
379382
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
380383
clock-khz = <100>;
381384
clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>;
382385
clock-names = "sclk0";
383386
status = "disabled";
384387
};
385388

389+
i2c3: twi@31001000 {
390+
#address-cells = <1>;
391+
#size-cells = <0>;
392+
compatible = "adi,twi";
393+
reg = <0x31001000 0x100>;
394+
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
395+
clock-khz = <100>;
396+
clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>;
397+
clock-names = "sclk0";
398+
status = "disabled";
399+
};
400+
401+
i2c4: twi@31001100 {
402+
#address-cells = <1>;
403+
#size-cells = <0>;
404+
compatible = "adi,twi";
405+
reg = <0x31001100 0x100>;
406+
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
407+
clock-khz = <100>;
408+
clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>;
409+
clock-names = "sclk0";
410+
status = "disabled";
411+
};
412+
413+
i2c5: twi@31001200 {
414+
#address-cells = <1>;
415+
#size-cells = <0>;
416+
compatible = "adi,twi";
417+
reg = <0x31001200 0x100>;
418+
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
419+
clock-khz = <100>;
420+
clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>;
421+
clock-names = "sclk0";
422+
status = "disabled";
423+
};
424+
386425
i2s4: i2s@4 {
387426
compatible = "adi,sc5xx-i2s-dai";
388427
clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>;
@@ -500,24 +539,42 @@
500539
status = "disabled";
501540
};
502541

503-
crc0: crc@31001200 {
542+
crc0: crc@3100a500 {
504543
compatible = "adi,hmac-crc";
505-
reg = <0x31001200 0xFF>;
506-
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
544+
reg = <0x3100a500 0x100>;
545+
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
507546
dma_channel = <8>;
508547
crypto_crc_poly = <0x5c5c5c5c>;
509548
status = "disabled";
510549
};
511550

512-
crc1: crc@31001300 {
551+
crc1: crc@3100a600 {
513552
compatible = "adi,hmac-crc";
514-
reg = <0x31001300 0xFF>;
515-
interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
553+
reg = <0x3100a600 0x100>;
554+
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
516555
dma_channel = <18>;
517556
crypto_crc_poly = <0x5c5c5c5c>;
518557
status = "disabled";
519558
};
520559

560+
crc2: crc@3100aa00 {
561+
compatible = "adi,hmac-crc";
562+
reg = <0x3100aa00 0x100>;
563+
interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>;
564+
dma_channel = <45>;
565+
crypto_crc_poly = <0x5c5c5c5c>;
566+
status = "disabled";
567+
};
568+
569+
crc3: crc@3100ab00 {
570+
compatible = "adi,hmac-crc";
571+
reg = <0x3100ab00 0x100>;
572+
interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
573+
dma_channel = <47>;
574+
crypto_crc_poly = <0x5c5c5c5c>;
575+
status = "disabled";
576+
};
577+
521578
pinctrl0: pinctrl@31004600 {
522579
compatible = "adi,adsp-pinctrl";
523580
#address-cells = <1>;

‎arch/arm64/boot/dts/adi/sc598-som.dtsi‎

Lines changed: 0 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -204,16 +204,7 @@
204204
cs-gpios = <&gpa 5 GPIO_ACTIVE_LOW>;
205205
};
206206

207-
&i2c0 {
208-
status = "okay";
209-
};
210-
211-
&i2c1 {
212-
status = "disabled";
213-
};
214-
215207
&i2c2 {
216-
status = "okay";
217208
pinctrl-names = "default";
218209
pinctrl-0 = <&i2c2_pins>;
219210
};

‎arch/arm64/boot/dts/adi/sc59x-64.dtsi‎

Lines changed: 38 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -574,7 +574,7 @@
574574

575575
crc0: crc@310a5000 {
576576
compatible = "adi,hmac-crc";
577-
reg = <0x310a5000 0xFF>;
577+
reg = <0x310a5000 0x100>;
578578
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
579579
dmas = <&crc_cluster 8>;
580580
dma-names = "mdma_chan";
@@ -584,14 +584,34 @@
584584

585585
crc1: crc@310a6000 {
586586
compatible = "adi,hmac-crc";
587-
reg = <0x310a6000 0xFF>;
587+
reg = <0x310a6000 0x100>;
588588
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
589589
dmas = <&crc_cluster 18>;
590590
dma-names = "mdma_chan";
591591
crypto_crc_poly = <0x04C11DB7>;
592592
status = "disabled";
593593
};
594594

595+
crc2: crc@310aa000 {
596+
compatible = "adi,hmac-crc";
597+
reg = <0x310aa000 0x100>;
598+
interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>;
599+
dmas = <&crc_cluster 45>;
600+
dma-names = "mdma_chan";
601+
crypto_crc_poly = <0x04C11DB7>;
602+
status = "disabled";
603+
};
604+
605+
crc3: crc@310ab000 {
606+
compatible = "adi,hmac-crc";
607+
reg = <0x310ab000 0x100>;
608+
interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
609+
dmas = <&crc_cluster 47>;
610+
dma-names = "mdma_chan";
611+
crypto_crc_poly = <0x04C11DB7>;
612+
status = "disabled";
613+
};
614+
595615
pinctrl0: pinctrl@31004600 {
596616
compatible = "adi,adsp-pinctrl";
597617
#address-cells = <1>;
@@ -1198,6 +1218,22 @@
11981218
interrupt-names = "complete", "error";
11991219
adi,src-offset = <0x100>;
12001220
};
1221+
1222+
crc2_dma: channel@45 { /* MDMA4_SRC */
1223+
adi,id = <45>;
1224+
interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
1225+
<GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>;
1226+
interrupt-names = "complete", "error";
1227+
adi,src-offset = <0x200>;
1228+
};
1229+
1230+
crc3_dma: channel@47 { /* MDMA5_SRC */
1231+
adi,id = <47>;
1232+
interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
1233+
<GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>;
1234+
interrupt-names = "complete", "error";
1235+
adi,src-offset = <0x300>;
1236+
};
12011237
};
12021238

12031239
dma_cluster2: dma@31026000 {

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