iio: dac: ad3530r: Add support for AD3532R/AD3532

The AD3532R/AD3532 is a 16-channel, 16-bit voltage output DAC. These
devices use a dual-bank register architecture with base addresses at
0x1000 (bank 0) and 0x3000 (bank 1). Channels 0-7 are mapped to bank 0,
while channels 8-15 are mapped to bank 1.

To support the dual-bank architecture, a new ad3532r_set_dac_powerdown()
function handles the 4-register powerdown mapping, where channels 0-7
use registers 0x1020/0x1021 and channels 8-15 use 0x3020/0x3021. The
AD3532 variants also implement different powerdown modes (1kΩ, 10kΩ,
three-state) compared to the AD3530/31 devices (1kΩ, 7.7kΩ, 32kΩ).

The ad3530r_normal_op_mode() and ad3530r_setup() functions have been
extended to configure dual-bank registers for reference control and
output settings. New helper functions ad3532r_input_ch_reg() and
ad3532r_trigger_sw_ldac_reg() provide bank-aware register addressing
based on the channel number.

Dynamic channel allocation is now used with chip-specific ext_info
assignment to handle the different powerdown mode enums per variant.

Signed-off-by: Kim Seer Paller <kimseer.paller@analog.com>

Author: kseerp

drivers/iio/dac/Kconfig

@@ -11,8 +11,8 @@ config AD3530R
 	depends on SPI
 	select REGMAP_SPI
 	help
-	  Say yes here to build support for Analog Devices AD3530R, AD3531R
-	  Digital to Analog Converter.
+	  Say yes here to build support for Analog Devices AD3530R, AD3531R,
+	  AD3532R Digital to Analog Converter.
 
 	  To compile this driver as a module, choose M here: the
 	  module will be called ad3530r.