iio: axi_aion_trig Preserve and restore per-channel trigger phase settings

This patch adds support for storing trigger phase values per channel in
the `axi_aion_state` structure. The values are saved during IIO write
operations and later restored during JESD204 setup stage 1.

This ensures that user-configured phase offsets are retained across
initialization sequences.

Signed-off-by: Michael Hennerich <[email protected]>

Author: mhennerich

drivers/iio/logic/axi_aion_trig.c

@@ -77,6 +77,7 @@ struct axi_aion_state {
 	struct clk *dev_clk;
 	struct jesd204_dev *jdev;
 	struct iio_channel *iio_adf4030;
+	u32 trigX_phase[8];
 };
 
 struct axi_aion_state *st_global;
@@ -300,6 +301,7 @@ static int axi_aion_iio_write_raw(struct iio_dev *indio_dev, struct iio_chan_spe
 	case IIO_CHAN_INFO_PHASE:
 		if (val > 0xFFFF || val < 0)
 			return -EINVAL;
+		st->trigX_phase[chan->channel] = val;
 		return regmap_write(st->regmap, chan->address, val);
 	case IIO_CHAN_INFO_ENABLE:
 		return regmap_update_bits(st->regmap, AION_CONTROL_REG, BIT(chan->channel + 2),
@@ -507,7 +509,7 @@ static int axi_aion_jesd204_opt_setup_stage1(struct jesd204_dev *jdev,
 	struct device *dev = jesd204_dev_to_device(jdev);
 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
 	struct axi_aion_state *st = iio_priv(indio_dev);
-	int ret;
+	int ret, i;
 	u32 regval;
 	s64 adf4030_phase;
 	int val, val2;
@@ -651,6 +653,9 @@ static int axi_aion_jesd204_opt_setup_stage1(struct jesd204_dev *jdev,
 		return ret;
 	}
 
+	for (i = 0; i < ARRAY_SIZE(st->trigX_phase); i++)
+		regmap_write(st->regmap, AION_TRIG_CH0_PHASE_REG + (i * 4), st->trigX_phase[i]);
+
 	return JESD204_STATE_CHANGE_DONE;
 out:
 	regmap_set_bits(st->regmap, AION_CONTROL_REG,