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projects: eval-adg1736: Add README documentation
Add README with hardware setup instructions, jumper configuration, wiring connections, and build commands for the EVAL-ADG1736 project. Signed-off-by: Alexandru Vasile Popa <Alexandruvasile.Popa@analog.com>
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‎doc/sphinx/source/projects/eval/eval-adg1736.rst‎

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.. include:: ../../../../../projects/eval-adg1736/README.rst

‎projects/eval-adg1736/README.rst‎

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Evaluating the EVAL-ADG1736
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===========================
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.. no-os-doxygen::
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.. contents::
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:depth: 3
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Supported Evaluation Boards
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---------------------------
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* `EVAL-ADG1736 <https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/eval-adg1736.html>`_
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Overview
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--------
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The ADG1736 is a low voltage, 2.4 Ohm dual SPDT analog switch in a 2mm x 2mm
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LGA package. It contains two independently selectable single-pole, double-throw
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(SPDT) switches and operates with single supply (+1.08V to +5.5V) or dual supply
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(+/-1.08V to +/-2.75V). An EN input is used to disable all switches.
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Key specifications:
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* On Resistance: 2.4 Ohm typical
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* Signal Range: Rail-to-rail
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* Logic Levels: 1.8V and 3V JEDEC compliant
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* Bandwidth: 300 MHz typical
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* Operating Temperature: -40C to +125C
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The ADG1736 data sheet provides full specifications and details on device
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operation. Consult it in conjunction with this user guide.
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Hardware Specifications
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-----------------------
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Power Supply Requirements
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^^^^^^^^^^^^^^^^^^^^^^^^^
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The EVAL-ADG1736 can be powered via USB Type-C or external supply:
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* Single supply: +1.08V to +5.5V (VDD to VSS)
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* Dual supply: +/-1.08V to +/-2.75V
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For this project, 3.3V from the MAX32655FTHR is used as VDD.
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Board Connector and Jumper Settings
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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Before connecting the MCU, configure the EVAL-ADG1736 jumpers.
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**Common settings (required for both SW1 and SW2):**
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+----------+------------------+-----------------------------------------------+
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| Jumper | Setting | Description |
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+----------+------------------+-----------------------------------------------+
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| JP4 | **Remove** | Disconnect EN from manual control |
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+----------+------------------+-----------------------------------------------+
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| JP5 | **Position A** | Connect VL to VL/EN header |
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+----------+------------------+-----------------------------------------------+
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| P13 | **Insert** | Connect EN to DIGIO3 for MCU control |
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+----------+------------------+-----------------------------------------------+
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| P21 | **Insert** | Set logic level VL to 3.3V |
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+----------+------------------+-----------------------------------------------+
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**SW1 testing:**
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+----------+------------------+-----------------------------------------------+
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| Jumper | Setting | Description |
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+----------+------------------+-----------------------------------------------+
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| JP2 | **Remove** | Disconnect IN1 from manual A/B control |
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+----------+------------------+-----------------------------------------------+
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| P11 | **Insert** | Connect IN1 to DIGIO1 for MCU control |
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+----------+------------------+-----------------------------------------------+
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**SW2 testing:**
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+----------+------------------+-----------------------------------------------+
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| Jumper | Setting | Description |
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+----------+------------------+-----------------------------------------------+
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| JP3 | **Remove** | Disconnect IN2 from manual A/B control |
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+----------+------------------+-----------------------------------------------+
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| P12 | **Insert** | Connect IN2 to DIGIO2 for MCU control |
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+----------+------------------+-----------------------------------------------+
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No-OS Build Setup
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-----------------
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Please see: https://wiki.analog.com/resources/no-os/build
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No-OS Supported Examples
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------------------------
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The initialization data used in the examples is taken from:
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`Project Common Data Path <https://github.com/analogdevicesinc/no-OS/tree/main/projects/eval-adg1736/src/common>`_
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The macros used in Common Data are defined in platform specific files found in:
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`Project Platform Configuration Path <https://github.com/analogdevicesinc/no-OS/tree/main/projects/eval-adg1736/src/platform>`_
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Basic example
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^^^^^^^^^^^^^
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This example tests ADG1736 switch routing using 4 GPIOs (P1.6-P1.9):
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* Initializes the ADG1736 driver with IN and EN GPIO control
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* Toggles the switch between A and B positions
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* Sends a test signal through D and reads back on S
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* Verifies switch routing with LED feedback (green = pass, red = fail)
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**GPIO Configuration:**
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* IN1 (P1.6) -> SW1 control: HIGH=A, LOW=B. Wire to P11 (DIGIO1) header
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* IN2 (P2.0) -> SW2 control: HIGH=A, LOW=B. Wire to P12 (DIGIO2) header
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* EN (P1.7) -> Enable: HIGH=enabled, LOW=disabled. Wire to P13 header
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* D (P1.8) -> Test signal output. Connect to D1 or D2 terminal
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* S (P1.9) -> Test signal input. Connect to S1A/S1B/S2A/S2B (based on TEST_SIDE)
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Note: IN1 and IN2 use separate GPIO pins to allow independent control of both switches.
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The test toggles the switch between A and B positions:
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* When in the configured TEST_SIDE position, S should read D's value
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* When in the opposite position, S should read LOW (disconnected)
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**LED feedback:**
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* Green: Test passing (switch routing correctly)
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* Red: Test failing
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The test configuration is set via ``parameters.h``:
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* ``TEST_SWITCH``: 0 = SW1, 1 = SW2
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* ``TEST_SIDE``: 0 = A side, 1 = B side
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**Test Configuration Truth Table:**
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IN1 (P1.6) controls SW1, IN2 (P2.0) controls SW2. Each switch has its own
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dedicated GPIO pin for independent control.
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+------------+-----------+--------+----------------+------------------+
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| TEST_SWITCH| TEST_SIDE | Switch | S Connection | IN Wiring |
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+------------+-----------+--------+----------------+------------------+
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| 0 | 0 | SW1 | S1A | P1.6 to P11 |
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+------------+-----------+--------+----------------+------------------+
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| 0 | 1 | SW1 | S1B | P1.6 to P11 |
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+------------+-----------+--------+----------------+------------------+
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| 1 | 0 | SW2 | S2A | P2.0 to P12 |
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+------------+-----------+--------+----------------+------------------+
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| 1 | 1 | SW2 | S2B | P2.0 to P12 |
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+------------+-----------+--------+----------------+------------------+
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No-OS Supported Platforms
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-------------------------
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Maxim Platform
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^^^^^^^^^^^^^^
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**Used hardware**
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* `EVAL-ADG1736 <https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/eval-adg1736.html>`_
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* `MAX32655FTHR <https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32655fthr.html>`_
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**Power Options**
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Option 1: USB-C power (recommended)
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* Connect USB-C cable to P27 on EVAL-ADG1736
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* Set JP1 to position A (connect VDD to EXT_VDD)
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* Insert P17 (connect POS_SUPPLY to 3.3V)
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* Insert P25 (connect NEG_SUPPLY to GND)
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* Connect GND between boards for common reference
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Option 2: Power from MAX32655FTHR
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* Set JP1 to position A (connect VDD to EXT_VDD)
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* Connect MAX32655FTHR 3V3 to POS_SUPPLY header
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* Connect MAX32655FTHR GND to NEG_SUPPLY header
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* Insert P19 (connect POS_SUPPLY to VDD)
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* Insert P25 (connect NEG_SUPPLY to GND)
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**Signal Connections for SW1, A side test (default configuration)**
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+------------------+---------------------------+------------------------------+
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| MAX32655FTHR | EVAL-ADG1736 | Function |
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+------------------+---------------------------+------------------------------+
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| GND | NEG_SUPPLY header | Common ground |
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+------------------+---------------------------+------------------------------+
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| P1.6 | DIGIO1 (via P11 header) | IN1 switch control |
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+------------------+---------------------------+------------------------------+
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| P1.7 | DIGIO3 (via P13 header) | EN enable control |
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+------------------+---------------------------+------------------------------+
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| P1.8 | D1 terminal | Test signal output |
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+------------------+---------------------------+------------------------------+
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| P1.9 | S1A terminal | Test signal readback |
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+------------------+---------------------------+------------------------------+
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For other test configurations, change the D and S connections per the truth table above:
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* SW1, B side: P1.9 to S1B, set ``TEST_SWITCH=0``, ``TEST_SIDE=1``
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* SW2, A side: P2.0 to P12, P1.8 to D2, P1.9 to S2A, set ``TEST_SWITCH=1``, ``TEST_SIDE=0``
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* SW2, B side: P2.0 to P12, P1.8 to D2, P1.9 to S2B, set ``TEST_SWITCH=1``, ``TEST_SIDE=1``
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Note: P1.6 is on J7 header (pin 4), P2.0 is on J9 header (pin 5).
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**Build Command**
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.. code-block:: bash
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# to delete current build
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make PLATFORM=maxim TARGET=max32655 reset
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# to build the project
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make PLATFORM=maxim TARGET=max32655
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# to flash the code
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make run

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