Test 5

Author: TheTumultuousUnicornOfDarkness

libcpuid/libcpuid_internal.h

@@ -122,89 +122,89 @@ struct internal_type_info_array_t {
 	struct internal_type_info_t* data;
 };
 
-#define LBIT(x) ((1ULL) << x)
+#define LBIT(x) (((1ULL) << x))
 
 // common detection bits for CPUs:
-#define _M_                     0x0000000000000001ULL
-#define MOBILE_                 0x0000000000000002ULL
-#define _MP_                    0x0000000000000004ULL
-#define _3                      0x0000000000000008ULL
-#define _5                      0x0000000000000010ULL
-#define _7                      0x0000000000000020ULL
-#define _9                      0x0000000000000040ULL
-#define _H                      0x0000000000000080ULL // powerful mobile processors for laptop
-#define _S                      0x0000000000000100ULL
-#define _U                      0x0000000000000200ULL // ultra-low power
-#define _X                      0x0000000000000400ULL // CPU with great amount of power
-#define _F                      0x0000000000000800ULL // CPU that doesn’t have integrated graphics
-#define _G                      0x0000000000001000ULL // CPU with additional built-in integrated graphics
-#define _E                      0x0000000000002000ULL // Embedded (Intel)
+#define _M_                     LBIT(  0 )
+#define MOBILE_                 LBIT(  1 )
+#define _MP_                    LBIT(  2 )
+#define _3                      LBIT(  3 )
+#define _5                      LBIT(  4 )
+#define _7                      LBIT(  5 )
+#define _9                      LBIT(  6 )
+#define _H                      LBIT(  7 ) // powerful mobile processors for laptop
+#define _S                      LBIT(  8 )
+#define _U                      LBIT(  9 ) // ultra-low power
+#define _X                      LBIT( 10 ) // CPU with great amount of power
+#define _F                      LBIT( 11 ) // CPU that doesn’t have integrated graphics
+#define _G                      LBIT( 12 ) // CPU with additional built-in integrated graphics
+#define _E                      LBIT( 13 ) // Embedded (Intel)
 
 // additional detection bits for Intel CPUs:
-#define PENTIUM_                0x0000000000010000ULL
-#define CELERON_                0x0000000000020000ULL
-#define CORE_                   0x0000000000040000ULL
-#define _I_                     0x0000000000080000ULL
-#define XEON_                   0x0000000000100000ULL
-#define ATOM_                   0x0000000000200000ULL
-#define _K                      0x0000000000400000ULL
-#define _P                      0x0000000000800000ULL
-#define _N                      0x0000000001000000ULL
-#define _W_                     0x0000000002000000ULL
-#define _D_                     0x0000000004000000ULL
-#define _BRONZE_                0x0000000008000000ULL
-#define _SILVER_                0x0000000010000000ULL
-#define _GOLD_                  0x0000000020000000ULL
-#define _PLATINIUM_             0x0000000040000000ULL
-#define _MAX_                   0x0000000080000000ULL
-#define _J_                     0x0000000100000000ULL
-#define _N_                     0x0000000200000000ULL
-#define _ULTRA_                 0x0000000400000000ULL
-#define _V                      0x0000000800000000ULL
-#define _L                      0x0000001000000000ULL
-#define _T                      0x0000002000000000ULL
-#define _U_                     0x0000004000000000ULL
+#define PENTIUM_                LBIT( 15 )
+#define CELERON_                LBIT( 16 )
+#define CORE_                   LBIT( 17 )
+#define _I_                     LBIT( 18 )
+#define XEON_                   LBIT( 19 )
+#define ATOM_                   LBIT( 20 )
+#define _K                      LBIT( 21 ) // an unlocked desktop processor that allows for overclocking
+#define _P                      LBIT( 22 )
+#define _N                      LBIT( 23 )
+#define _W_                     LBIT( 24 )
+#define _D_                     LBIT( 25 )
+#define _BRONZE_                LBIT( 26 )
+#define _SILVER_                LBIT( 27 )
+#define _GOLD_                  LBIT( 28 )
+#define _PLATINIUM_             LBIT( 29 )
+#define _MAX_                   LBIT( 30 )
+#define _J_                     LBIT( 31 )
+#define _N_                     LBIT( 32 )
+#define _ULTRA_                 LBIT( 33 )
+#define _V                      LBIT( 34 ) // Lunar Lake
+#define _L                      LBIT( 35 ) // LGA package (UL = Power efficient, in LGA package / HL = Highest performance, in LGA package)
+#define _T                      LBIT( 36 ) // Power-optimized lifestyle
+#define _U_                     LBIT( 37 )
 
 // additional detection bits for AMD CPUs:
-#define ATHLON_      0x0000000000010000ULL
-#define _XP_         0x0000000000020000ULL
-#define DURON_       0x0000000000040000ULL
-#define SEMPRON_     0x0000000000080000ULL
-#define OPTERON_     0x0000000000100000ULL
-#define TURION_      0x0000000000200000ULL
-#define RYZEN_       0x0000000000400000ULL
-#define RYZEN_TR_    0x0000000000800000ULL
-#define EPYC_        0x0000000001000000ULL
-#define _LV_         0x0000000002000000ULL
-#define _64_         0x0000000004000000ULL
-#define _X2          0x0000000008000000ULL
-#define _X3          0x0000000010000000ULL
-#define _X4          0x0000000020000000ULL
-#define _X6          0x0000000040000000ULL
-#define _FX          0x0000000080000000ULL
-#define _APU_        0x0000000100000000ULL
-#define C86_         0x0000000200000000ULL
-#define _Z           0x0000000400000000ULL
-#define _AI_         0x0000000800000000ULL
+#define ATHLON_      LBIT( 15 )
+#define _XP_         LBIT( 16 )
+#define DURON_       LBIT( 17 )
+#define SEMPRON_     LBIT( 18 )
+#define OPTERON_     LBIT( 19 )
+#define TURION_      LBIT( 20 )
+#define RYZEN_       LBIT( 21 )
+#define RYZEN_TR_    LBIT( 22 )
+#define EPYC_        LBIT( 23 )
+#define _LV_         LBIT( 24 )
+#define _64_         LBIT( 25 )
+#define _X2          LBIT( 26 )
+#define _X3          LBIT( 27 )
+#define _X4          LBIT( 28 )
+#define _X6          LBIT( 29 )
+#define _FX          LBIT( 30 )
+#define _APU_        LBIT( 31 )
+#define C86_	     LBIT( 32 )
+#define _Z           LBIT( 33 )
+#define _AI_         LBIT( 34 )
 
 // additional detection bits for Via CPUs:
-#define SAMUEL_            0x0000000000010000ULL
-#define EZRA_              0x0000000000020000ULL
-#define NEHEMIAH_          0x0000000000040000ULL
-#define ESTHER_            0x0000000000080000ULL
-#define EDEN_              0x0000000000100000ULL
-#define CNA_               0x0000000000200000ULL
-#define NANO_              0x0000000000400000ULL
-#define QUADCORE_          0x0000000000800000ULL
+#define SAMUEL_            LBIT( 15 )
+#define EZRA_              LBIT( 16 )
+#define NEHEMIAH_          LBIT( 17 )
+#define ESTHER_            LBIT( 18 )
+#define EDEN_              LBIT( 19 )
+#define CNA_               LBIT( 20 )
+#define NANO_              LBIT( 21 )
+#define QUADCORE_          LBIT( 22 )
 
 // additional detection bits for Zhaoxin CPUs:
-#define KAISHENG_          0x0000000000010000ULL
-#define KAIXIAN_           0x0000000000020000ULL
-#define _KH_               0x0000000000040000ULL
-#define _KX_               0x0000000000080000ULL
-#define _ZX_               0x0000000000100000ULL
-#define _C                 0x0000000000200000ULL
-#define _D                 0x0000000000400000ULL
+#define KAISHENG_          LBIT( 15 )
+#define KAIXIAN_           LBIT( 16 )
+#define _KH_               LBIT( 17 )
+#define _KX_               LBIT( 18 )
+#define _ZX_               LBIT( 19 )
+#define _C                 LBIT( 20 )
+#define _D                 LBIT( 21 )
 
 
 int cpu_ident_internal(struct cpu_raw_data_t* raw, struct cpu_id_t* data,