Document compliance test suite tests

Author: PiotrZierhoffer

doc/cts-list.md

@@ -0,0 +1,19 @@
+| Test name      | Specification section                                                             |
+|----------------|-----------------------------------------------------------------------------------|
+| ccc_bc_rstdaa  | 5.1.9.3.3 Reset Dynamic Address Assignment (RSTDAA)                               |
+| ccc_dc_rstdaa  | 5.1.9.3.3 Reset Dynamic Address Assignment (RSTDAA)                               |
+| ccc_defslvs    | 5.1.9.3.7 Define List of Slaves (DEFSLVS)                                         |
+| ccc_getmrl     | 5.1.9.3.6 Set/Get Max Read Length (SETMRL/GETMRL)                                 |
+| ccc_getmwl     | 5.1.9.3.5 Set/Get Max Write Length (SETMWL/GETMWL)                                |
+| ccc_getmxds    | 5.1.9.3.18 Get Max Data Speed (GETMXDS)                                           |
+| ccc_getxtime   | 5.1.9.3.21 Get Exchange Timing Support Information (GETXTIME)                     |
+| ccc_setbrgtgt  | 5.1.9.3.17 Set Bridge Targets (SETBRGTGT)                                         |
+| ccc_setmwl     | 5.1.9.3.5 Set/Get Max Write Length (SETMWL/GETMWL)                                |
+| ccc_setnewda   | 5.1.9.3.11 Set New Dynamic Address (SETNEWDA)                                     |
+| ccc_setxtime   | 5.1.9.3.20 Set Exchange Timing Information (SETXTIME)                             |
+| ibi_no_payload | 5.1.6 In-Band Interrupt <br /> 5.1.6.2 I3C Slave Interrupt Request                |
+| ibi_payload    | 5.1.6 In-Band Interrupt <br /> 5.1.6.2 I3C Slave Interrupt Request                |
+| tc_sync        | 5.1.8.2 Synchronous Systems and Events                                            |
+| ccc_bc_setaasa | 5.1.9.3.22 Set All Addresses to Static Address (SETAASA)                          |
+| slv_no_rst     | 5.1.11 Slave Reset <br /> 5.1.11.1 Theory of Operation <br /> 5.1.11.2 RSTACT CCC |
+

doc/source/dv.md

@@ -3,7 +3,6 @@
 This chapter presents the available models and tools which are used for I3C verification.
 The core is verified with [the Cocotb + unit tests](https://github.com/chipsalliance/i3c-core/tree/main/verification/cocotb/block) and [the UVM test suite](https://github.com/chipsalliance/i3c-core/tree/main/verification/uvm_i3c).
 
-There are also non-public tests which utilize Avery I3C VIP framework. The tests include: `private_read`, `private_write` and `recovery` and verify operation of target mode private reads and writes and the secure firmware recovery flow respectively.
 
 This section contains testplans for the verification.
 
@@ -29,3 +28,9 @@ Full overview of tests can be found in [Testplan summary](./sim-results/index.ht
 ```{include} ../../verification/testplan/generated/testplans_core.md
 :heading-offset: 2
 ```
+
+## Compliance test suite
+
+The list of non-public tests which utilize Avery I3C VIP framework and have been successfully ran against the design is available in the [CTS list](https://github.com/chipsalliance/i3c-core/blob/main/doc/cts-list.md).
+
+