Rework passing configuration to tests

Signed-off-by: Jan Malek <[email protected]>

Author: jan-malek

Makefile

@@ -96,30 +96,25 @@ build-verilator:
 #
 # Tests
 #
-test: config ## Run single module test (use `TEST=<test_name>` flag)
+test: ## Run single module test (use `TEST=<test_name>` flag)
 	cd $(COCOTB_VERIF_DIR) && $(PYTHON) -m nox -R -s $(TEST)_verify --no-venv --forcecolor
 
 tests-axi: ## Run all verification/cocotb/* RTL tests for AXI bus configuration without coverage
-	$(MAKE) config CFG_NAME=axi
-	cd $(COCOTB_VERIF_DIR) && $(PYTHON) -m nox -R -t "axi" --no-venv --forcecolor
+	cd $(COCOTB_VERIF_DIR) && CFG_NAME=axi $(PYTHON) -m nox -R -t "axi" --no-venv --forcecolor
 
 tests-axi-ff: ## Run all verification/cocotb/* RTL tests for AXI bus configuration without coverage (input FF enabled)
-	$(MAKE) config CFG_NAME=axi_ff
-	cd $(COCOTB_VERIF_DIR) && $(PYTHON) -m nox -R -t "axi" --no-venv --forcecolor -- +MinSystemClockFrequency=200.0
+	cd $(COCOTB_VERIF_DIR) && CFG_NAME=axi_ff $(PYTHON) -m nox -R -t "axi" --no-venv --forcecolor -- +MinSystemClockFrequency=200.0
 
 tests-ahb: ## Run all verification/cocotb/* RTL tests for AHB bus configuration without coverage
-	$(MAKE) config CFG_NAME=ahb
-	cd $(COCOTB_VERIF_DIR) && $(PYTHON) -m nox -R -t "ahb" --no-venv --forcecolor
+	cd $(COCOTB_VERIF_DIR) && CFG_NAME=ahb $(PYTHON) -m nox -R -t "ahb" --no-venv --forcecolor
 
 tests-ahb-ff: ## Run all verification/cocotb/* RTL tests for AHB bus configuration without coverage (input FF enabled)
-	$(MAKE) config CFG_NAME=ahb_ff
-	cd $(COCOTB_VERIF_DIR) && $(PYTHON) -m nox -R -t "ahb" --no-venv --forcecolor -- +MinSystemClockFrequency=200.0
+	cd $(COCOTB_VERIF_DIR) && CFG_NAME=ahb_ff $(PYTHON) -m nox -R -t "ahb" --no-venv --forcecolor -- +MinSystemClockFrequency=200.0
 
 tests: tests-axi tests-ahb ## Run all verification/cocotb/* RTL tests fro AHB and AXI bus configurations without coverage
 
 tests-i2c: ## Run all I2C tests without coverage
-	$(MAKE) config CFG_NAME=ahb
-	cd $(COCOTB_VERIF_DIR) && $(PYTHON) -m nox -R -t "i2c" --no-venv --forcecolor
+	cd $(COCOTB_VERIF_DIR) && CFG_NAME=ahb $(PYTHON) -m nox -R -t "i2c" --no-venv --forcecolor
 
 # TODO: Enable full coverage flow
 tests-coverage: ## Run all verification/block/* RTL tests with coverage

verification/cocotb/block/ahb_if/Makefile

@@ -14,7 +14,7 @@ override PLUSARGS := $(strip +FrontendBusInterface=AHB $(PLUSARGS))
 
 MODULE      ?= $(subst $(space),$(comma),$(subst .py,,$(TEST_FILES)))
 TOPLEVEL     = ahb_if_wrapper
-CFG_NAME     = ahb
+override CFG_NAME = ahb
 
 VERILOG_SOURCES  = \
     $(CALIPTRA_ROOT)/src/libs/rtl/ahb_defines_pkg.sv \

verification/cocotb/block/axi_adapter/Makefile

@@ -14,6 +14,7 @@ override PLUSARGS := $(strip +FrontendBusInterface=AXI $(PLUSARGS))
 
 MODULE      ?= $(subst $(space),$(comma),$(subst .py,,$(TEST_FILES)))
 TOPLEVEL     = axi_adapter_wrapper
+override CFG_NAME = axi
 
 VERILOG_SOURCES  = \
     $(CALIPTRA_ROOT)/src/caliptra_prim/rtl/caliptra_prim_pkg.sv \

verification/cocotb/block/axi_adapter_id_filter/Makefile

@@ -14,8 +14,8 @@ override PLUSARGS := $(strip +FrontendBusInterface=AXI $(PLUSARGS))
 
 MODULE  ?= $(subst $(space),$(comma),$(subst .py,,$(TEST_FILES)))
 TOPLEVEL = axi_adapter_wrapper
-CFG_NAME = axi
-CFG_FILE = $(TEST_DIR)/i3c_cfg.yaml
+override CFG_NAME = axi
+override CFG_FILE = $(TEST_DIR)/i3c_cfg.yaml
 
 VERILOG_SOURCES  = \
     $(CALIPTRA_ROOT)/src/caliptra_prim/rtl/caliptra_prim_pkg.sv \

verification/cocotb/block/hci_queues_ahb/Makefile

@@ -11,7 +11,7 @@ TEST_FILES   = $(sort $(wildcard test_*.py))
 
 MODULE      ?= $(subst $(space),$(comma),$(subst .py,,$(TEST_FILES)))
 TOPLEVEL     = hci_queues_wrapper
-CFG_NAME     = ahb
+override CFG_NAME = ahb
 
 # Set appropriate bus interface via Cocotb's PLUSARGS:
 override PLUSARGS := $(strip +FrontendBusInterface=AHB $(PLUSARGS))

verification/cocotb/block/hci_queues_axi/Makefile

@@ -11,6 +11,7 @@ TEST_FILES   = $(sort $(wildcard test_*.py))
 
 MODULE      ?= $(subst $(space),$(comma),$(subst .py,,$(TEST_FILES)))
 TOPLEVEL     = hci_queues_wrapper
+override CFG_NAME = axi
 
 # Set appropriate bus interface via Cocotb's PLUSARGS:
 override PLUSARGS := $(strip +FrontendBusInterface=AXI $(PLUSARGS))

verification/cocotb/block/tti_queues_ahb/Makefile

@@ -11,6 +11,7 @@ TEST_FILES   = $(sort $(wildcard test_*.py))
 
 MODULE      ?= $(subst $(space),$(comma),$(subst .py,,$(TEST_FILES)))
 TOPLEVEL     = hci_queues_wrapper
+override CFG_NAME = ahb
 
 # Set appropriate bus interface via Cocotb's PLUSARGS:
 override PLUSARGS := $(strip +FrontendBusInterface=AHB $(PLUSARGS))

verification/cocotb/block/tti_queues_axi/Makefile

@@ -11,6 +11,7 @@ TEST_FILES   = $(sort $(wildcard test_*.py))
 
 MODULE      ?= $(subst $(space),$(comma),$(subst .py,,$(TEST_FILES)))
 TOPLEVEL     = hci_queues_wrapper
+override CFG_NAME = axi
 
 # Set appropriate bus interface via Cocotb's PLUSARGS:
 override PLUSARGS := $(strip +FrontendBusInterface=AXI $(PLUSARGS))

verification/cocotb/top/i3c_ahb/Makefile

@@ -12,7 +12,7 @@ TEST_FILES   = $(sort $(wildcard test_*.py))
 
 MODULE      ?= $(subst $(space),$(comma),$(subst .py,,$(TEST_FILES)))
 TOPLEVEL     = i3c_test_wrapper
-CFG_NAME     = ahb
+override CFG_NAME = ahb
 
 # Set appropriate bus interface via Cocotb's PLUSARGS:
 override PLUSARGS := $(strip +FrontendBusInterface=AHB $(PLUSARGS))

verification/cocotb/top/i3c_axi/Makefile

@@ -12,7 +12,7 @@ TEST_FILES   = $(sort $(wildcard test_*.py))
 
 MODULE      ?= $(subst $(space),$(comma),$(subst .py,,$(TEST_FILES)))
 TOPLEVEL     = i3c_test_wrapper
-CFG_NAME 	 = axi_bypass
+override CFG_NAME = axi_bypass
 
 # Set appropriate bus interface via Cocotb's PLUSARGS:
 override PLUSARGS := $(strip +FrontendBusInterface=AXI $(PLUSARGS))