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robertszczepanskirobertszczepanski
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Move whole IMAGE_SIZE to single register
1 parent ff7e2e5 commit 63ba7ec

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10 files changed

+59
-131
lines changed

10 files changed

+59
-131
lines changed

‎src/csr/I3CCSR.sv‎

Lines changed: 18 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -945,16 +945,12 @@ module I3CCSR (
945945
logic [7:0] next;
946946
logic load_next;
947947
} RESET;
948-
struct packed{
949-
logic [15:0] next;
950-
logic load_next;
951-
} IMAGE_SIZE_MSB;
952948
} INDIRECT_FIFO_CTRL_0;
953949
struct packed{
954950
struct packed{
955-
logic [15:0] next;
951+
logic [31:0] next;
956952
logic load_next;
957-
} IMAGE_SIZE_LSB;
953+
} IMAGE_SIZE;
958954
} INDIRECT_FIFO_CTRL_1;
959955
struct packed{
960956
struct packed{
@@ -2206,14 +2202,11 @@ module I3CCSR (
22062202
struct packed{
22072203
logic [7:0] value;
22082204
} RESET;
2209-
struct packed{
2210-
logic [15:0] value;
2211-
} IMAGE_SIZE_MSB;
22122205
} INDIRECT_FIFO_CTRL_0;
22132206
struct packed{
22142207
struct packed{
2215-
logic [15:0] value;
2216-
} IMAGE_SIZE_LSB;
2208+
logic [31:0] value;
2209+
} IMAGE_SIZE;
22172210
} INDIRECT_FIFO_CTRL_1;
22182211
struct packed{
22192212
struct packed{
@@ -5589,54 +5582,30 @@ module I3CCSR (
55895582
end
55905583
end
55915584
assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.RESET.value = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.RESET.value;
5592-
// Field: I3CCSR.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.IMAGE_SIZE_MSB
5593-
always_comb begin
5594-
automatic logic [15:0] next_c;
5595-
automatic logic load_next_c;
5596-
next_c = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.IMAGE_SIZE_MSB.value;
5597-
load_next_c = '0;
5598-
if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0 && decoded_req_is_wr) begin // SW write
5599-
next_c = (field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.IMAGE_SIZE_MSB.value & ~decoded_wr_biten[31:16]) | (decoded_wr_data[31:16] & decoded_wr_biten[31:16]);
5600-
load_next_c = '1;
5601-
end else if(hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.IMAGE_SIZE_MSB.we) begin // HW Write - we
5602-
next_c = hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.IMAGE_SIZE_MSB.next;
5603-
load_next_c = '1;
5604-
end
5605-
field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.IMAGE_SIZE_MSB.next = next_c;
5606-
field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.IMAGE_SIZE_MSB.load_next = load_next_c;
5607-
end
5608-
always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
5609-
if(~hwif_in.rst_ni) begin
5610-
field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.IMAGE_SIZE_MSB.value <= 16'h0;
5611-
end else if(field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.IMAGE_SIZE_MSB.load_next) begin
5612-
field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.IMAGE_SIZE_MSB.value <= field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.IMAGE_SIZE_MSB.next;
5613-
end
5614-
end
5615-
assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.IMAGE_SIZE_MSB.value = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.IMAGE_SIZE_MSB.value;
5616-
// Field: I3CCSR.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE_LSB
5585+
// Field: I3CCSR.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE
56175586
always_comb begin
5618-
automatic logic [15:0] next_c;
5587+
automatic logic [31:0] next_c;
56195588
automatic logic load_next_c;
5620-
next_c = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE_LSB.value;
5589+
next_c = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.value;
56215590
load_next_c = '0;
56225591
if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1 && decoded_req_is_wr) begin // SW write
5623-
next_c = (field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE_LSB.value & ~decoded_wr_biten[15:0]) | (decoded_wr_data[15:0] & decoded_wr_biten[15:0]);
5592+
next_c = (field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]);
56245593
load_next_c = '1;
5625-
end else if(hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE_LSB.we) begin // HW Write - we
5626-
next_c = hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE_LSB.next;
5594+
end else if(hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.we) begin // HW Write - we
5595+
next_c = hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.next;
56275596
load_next_c = '1;
56285597
end
5629-
field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE_LSB.next = next_c;
5630-
field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE_LSB.load_next = load_next_c;
5598+
field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.next = next_c;
5599+
field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.load_next = load_next_c;
56315600
end
56325601
always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
56335602
if(~hwif_in.rst_ni) begin
5634-
field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE_LSB.value <= 16'h0;
5635-
end else if(field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE_LSB.load_next) begin
5636-
field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE_LSB.value <= field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE_LSB.next;
5603+
field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.value <= 32'h0;
5604+
end else if(field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.load_next) begin
5605+
field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.value <= field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.next;
56375606
end
56385607
end
5639-
assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE_LSB.value = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE_LSB.value;
5608+
assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.value = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.value;
56405609
// Field: I3CCSR.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.EMPTY
56415610
always_comb begin
56425611
automatic logic [0:0] next_c;
@@ -9839,9 +9808,8 @@ module I3CCSR (
98399808
assign readback_array[48][31:24] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.HW_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS_LEN.value : '0;
98409809
assign readback_array[49][7:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.CMS.value : '0;
98419810
assign readback_array[49][15:8] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.RESET.value : '0;
9842-
assign readback_array[49][31:16] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.IMAGE_SIZE_MSB.value : '0;
9843-
assign readback_array[50][15:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE_LSB.value : '0;
9844-
assign readback_array[50][31:16] = '0;
9811+
assign readback_array[49][31:16] = '0;
9812+
assign readback_array[50][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.value : '0;
98459813
assign readback_array[51][0:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.EMPTY.value : '0;
98469814
assign readback_array[51][1:1] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.FULL.value : '0;
98479815
assign readback_array[51][7:2] = '0;

‎src/csr/I3CCSR_covergroups.svh‎

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1317,13 +1317,11 @@
13171317
endgroup
13181318
covergroup I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_0_fld_cg with function sample(
13191319
input bit [8-1:0] CMS,
1320-
input bit [8-1:0] RESET,
1321-
input bit [16-1:0] IMAGE_SIZE_MSB
1320+
input bit [8-1:0] RESET
13221321
);
13231322
option.per_instance = 1;
13241323
CMS_cp : coverpoint CMS;
13251324
RESET_cp : coverpoint RESET;
1326-
IMAGE_SIZE_MSB_cp : coverpoint IMAGE_SIZE_MSB;
13271325

13281326
endgroup
13291327

@@ -1340,10 +1338,10 @@
13401338

13411339
endgroup
13421340
covergroup I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_1_fld_cg with function sample(
1343-
input bit [16-1:0] IMAGE_SIZE_LSB
1341+
input bit [32-1:0] IMAGE_SIZE
13441342
);
13451343
option.per_instance = 1;
1346-
IMAGE_SIZE_LSB_cp : coverpoint IMAGE_SIZE_LSB;
1344+
IMAGE_SIZE_cp : coverpoint IMAGE_SIZE;
13471345

13481346
endgroup
13491347

‎src/csr/I3CCSR_pkg.sv‎

Lines changed: 6 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -499,24 +499,18 @@ package I3CCSR_pkg;
499499
logic we;
500500
} I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_0__RESET__in_t;
501501

502-
typedef struct packed{
503-
logic [15:0] next;
504-
logic we;
505-
} I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_0__IMAGE_SIZE_MSB__in_t;
506-
507502
typedef struct packed{
508503
I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_0__CMS__in_t CMS;
509504
I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_0__RESET__in_t RESET;
510-
I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_0__IMAGE_SIZE_MSB__in_t IMAGE_SIZE_MSB;
511505
} I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_0__in_t;
512506

513507
typedef struct packed{
514-
logic [15:0] next;
508+
logic [31:0] next;
515509
logic we;
516-
} I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_1__IMAGE_SIZE_LSB__in_t;
510+
} I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_1__IMAGE_SIZE__in_t;
517511

518512
typedef struct packed{
519-
I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_1__IMAGE_SIZE_LSB__in_t IMAGE_SIZE_LSB;
513+
I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_1__IMAGE_SIZE__in_t IMAGE_SIZE;
520514
} I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_1__in_t;
521515

522516
typedef struct packed{
@@ -1975,22 +1969,17 @@ package I3CCSR_pkg;
19751969
logic [7:0] value;
19761970
} I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_0__RESET__out_t;
19771971

1978-
typedef struct packed{
1979-
logic [15:0] value;
1980-
} I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_0__IMAGE_SIZE_MSB__out_t;
1981-
19821972
typedef struct packed{
19831973
I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_0__CMS__out_t CMS;
19841974
I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_0__RESET__out_t RESET;
1985-
I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_0__IMAGE_SIZE_MSB__out_t IMAGE_SIZE_MSB;
19861975
} I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_0__out_t;
19871976

19881977
typedef struct packed{
1989-
logic [15:0] value;
1990-
} I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_1__IMAGE_SIZE_LSB__out_t;
1978+
logic [31:0] value;
1979+
} I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_1__IMAGE_SIZE__out_t;
19911980

19921981
typedef struct packed{
1993-
I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_1__IMAGE_SIZE_LSB__out_t IMAGE_SIZE_LSB;
1982+
I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_1__IMAGE_SIZE__out_t IMAGE_SIZE;
19941983
} I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_1__out_t;
19951984

19961985
typedef struct packed{

‎src/csr/I3CCSR_sample.svh‎

Lines changed: 6 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1579,21 +1579,19 @@
15791579
if (get_coverage(UVM_CVR_REG_BITS)) begin
15801580
foreach(CMS_bit_cg[bt]) this.CMS_bit_cg[bt].sample(data[0 + bt]);
15811581
foreach(RESET_bit_cg[bt]) this.RESET_bit_cg[bt].sample(data[8 + bt]);
1582-
foreach(IMAGE_SIZE_MSB_bit_cg[bt]) this.IMAGE_SIZE_MSB_bit_cg[bt].sample(data[16 + bt]);
15831582
end
15841583
if (get_coverage(UVM_CVR_FIELD_VALS)) begin
1585-
this.fld_cg.sample( data[7:0]/*CMS*/ , data[15:8]/*RESET*/ , data[31:16]/*IMAGE_SIZE_MSB*/ );
1584+
this.fld_cg.sample( data[7:0]/*CMS*/ , data[15:8]/*RESET*/ );
15861585
end
15871586
endfunction
15881587

15891588
function void I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_0::sample_values();
15901589
if (get_coverage(UVM_CVR_REG_BITS)) begin
15911590
foreach(CMS_bit_cg[bt]) this.CMS_bit_cg[bt].sample(CMS.get_mirrored_value() >> bt);
15921591
foreach(RESET_bit_cg[bt]) this.RESET_bit_cg[bt].sample(RESET.get_mirrored_value() >> bt);
1593-
foreach(IMAGE_SIZE_MSB_bit_cg[bt]) this.IMAGE_SIZE_MSB_bit_cg[bt].sample(IMAGE_SIZE_MSB.get_mirrored_value() >> bt);
15941592
end
15951593
if (get_coverage(UVM_CVR_FIELD_VALS)) begin
1596-
this.fld_cg.sample( CMS.get_mirrored_value() , RESET.get_mirrored_value() , IMAGE_SIZE_MSB.get_mirrored_value() );
1594+
this.fld_cg.sample( CMS.get_mirrored_value() , RESET.get_mirrored_value() );
15971595
end
15981596
endfunction
15991597

@@ -1606,19 +1604,19 @@
16061604
m_data = data;
16071605
m_is_read = is_read;
16081606
if (get_coverage(UVM_CVR_REG_BITS)) begin
1609-
foreach(IMAGE_SIZE_LSB_bit_cg[bt]) this.IMAGE_SIZE_LSB_bit_cg[bt].sample(data[0 + bt]);
1607+
foreach(IMAGE_SIZE_bit_cg[bt]) this.IMAGE_SIZE_bit_cg[bt].sample(data[0 + bt]);
16101608
end
16111609
if (get_coverage(UVM_CVR_FIELD_VALS)) begin
1612-
this.fld_cg.sample( data[15:0]/*IMAGE_SIZE_LSB*/ );
1610+
this.fld_cg.sample( data[31:0]/*IMAGE_SIZE*/ );
16131611
end
16141612
endfunction
16151613

16161614
function void I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_1::sample_values();
16171615
if (get_coverage(UVM_CVR_REG_BITS)) begin
1618-
foreach(IMAGE_SIZE_LSB_bit_cg[bt]) this.IMAGE_SIZE_LSB_bit_cg[bt].sample(IMAGE_SIZE_LSB.get_mirrored_value() >> bt);
1616+
foreach(IMAGE_SIZE_bit_cg[bt]) this.IMAGE_SIZE_bit_cg[bt].sample(IMAGE_SIZE.get_mirrored_value() >> bt);
16191617
end
16201618
if (get_coverage(UVM_CVR_FIELD_VALS)) begin
1621-
this.fld_cg.sample( IMAGE_SIZE_LSB.get_mirrored_value() );
1619+
this.fld_cg.sample( IMAGE_SIZE.get_mirrored_value() );
16221620
end
16231621
endfunction
16241622

‎src/csr/I3CCSR_uvm.sv‎

Lines changed: 5 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -2406,11 +2406,9 @@ package I3CCSR_uvm;
24062406

24072407
I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_0_bit_cg CMS_bit_cg[8];
24082408
I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_0_bit_cg RESET_bit_cg[8];
2409-
I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_0_bit_cg IMAGE_SIZE_MSB_bit_cg[16];
24102409
I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_0_fld_cg fld_cg;
24112410
rand uvm_reg_field CMS;
24122411
rand uvm_reg_field RESET;
2413-
rand uvm_reg_field IMAGE_SIZE_MSB;
24142412

24152413
function new(string name = "I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_0");
24162414
super.new(name, 32, build_coverage(UVM_CVR_ALL));
@@ -2426,12 +2424,9 @@ package I3CCSR_uvm;
24262424
this.CMS.configure(this, 8, 0, "RW", 1, 'h0, 1, 1, 0);
24272425
this.RESET = new("RESET");
24282426
this.RESET.configure(this, 8, 8, "W1C", 1, 'h0, 1, 1, 0);
2429-
this.IMAGE_SIZE_MSB = new("IMAGE_SIZE_MSB");
2430-
this.IMAGE_SIZE_MSB.configure(this, 16, 16, "RW", 1, 'h0, 1, 1, 0);
24312427
if (has_coverage(UVM_CVR_REG_BITS)) begin
24322428
foreach(CMS_bit_cg[bt]) CMS_bit_cg[bt] = new();
24332429
foreach(RESET_bit_cg[bt]) RESET_bit_cg[bt] = new();
2434-
foreach(IMAGE_SIZE_MSB_bit_cg[bt]) IMAGE_SIZE_MSB_bit_cg[bt] = new();
24352430
end
24362431
if (has_coverage(UVM_CVR_FIELD_VALS))
24372432
fld_cg = new();
@@ -2444,9 +2439,9 @@ package I3CCSR_uvm;
24442439
protected uvm_reg_data_t m_data;
24452440
protected bit m_is_read;
24462441

2447-
I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_1_bit_cg IMAGE_SIZE_LSB_bit_cg[16];
2442+
I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_1_bit_cg IMAGE_SIZE_bit_cg[32];
24482443
I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_1_fld_cg fld_cg;
2449-
rand uvm_reg_field IMAGE_SIZE_LSB;
2444+
rand uvm_reg_field IMAGE_SIZE;
24502445

24512446
function new(string name = "I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_CTRL_1");
24522447
super.new(name, 32, build_coverage(UVM_CVR_ALL));
@@ -2458,10 +2453,10 @@ package I3CCSR_uvm;
24582453
uvm_reg_map map);
24592454

24602455
virtual function void build();
2461-
this.IMAGE_SIZE_LSB = new("IMAGE_SIZE_LSB");
2462-
this.IMAGE_SIZE_LSB.configure(this, 16, 0, "RW", 1, 'h0, 1, 1, 0);
2456+
this.IMAGE_SIZE = new("IMAGE_SIZE");
2457+
this.IMAGE_SIZE.configure(this, 32, 0, "RW", 1, 'h0, 1, 1, 0);
24632458
if (has_coverage(UVM_CVR_REG_BITS)) begin
2464-
foreach(IMAGE_SIZE_LSB_bit_cg[bt]) IMAGE_SIZE_LSB_bit_cg[bt] = new();
2459+
foreach(IMAGE_SIZE_bit_cg[bt]) IMAGE_SIZE_bit_cg[bt] = new();
24652460
end
24662461
if (has_coverage(UVM_CVR_FIELD_VALS))
24672462
fld_cg = new();

‎src/rdl/docs/README.md‎

Lines changed: 9 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -1772,11 +1772,10 @@ When set to 0, it holds execution of enqueued commands and runs current command
17721772
- Base Offset: 0x48
17731773
- Size: 0x4
17741774

1775-
| Bits| Identifier | Access |Reset| Name |
1776-
|-----|--------------|---------|-----|------------------------------------------|
1777-
| 7:0 | CMS | rw | 0x0 |Indirect FIFO memory access configuration.|
1778-
| 15:8| RESET |rw, woclr| 0x0 | Indirect memory configuration - reset |
1779-
|31:16|IMAGE_SIZE_MSB| rw | 0x0 |Indirect memory configuration - Image Size|
1775+
|Bits|Identifier| Access |Reset| Name |
1776+
|----|----------|---------|-----|------------------------------------------|
1777+
| 7:0| CMS | rw | 0x0 |Indirect FIFO memory access configuration.|
1778+
|15:8| RESET |rw, woclr| 0x0 | Indirect memory configuration - reset |
17801779

17811780
#### CMS field
17821781

@@ -1802,23 +1801,19 @@ Component Memory Space (CMS):</p>
18021801
</li>
18031802
</ul>
18041803

1805-
#### IMAGE_SIZE_MSB field
1806-
1807-
<p>Image Size (2 MSBs): Size of the image to be loaded in 4B units</p>
1808-
18091804
### INDIRECT_FIFO_CTRL_1 register
18101805

18111806
- Absolute Address: 0x14C
18121807
- Base Offset: 0x4C
18131808
- Size: 0x4
18141809

1815-
|Bits| Identifier |Access|Reset| Name |
1816-
|----|--------------|------|-----|------------------------------------------|
1817-
|15:0|IMAGE_SIZE_LSB| rw | 0x0 |Indirect memory configuration - Image Size|
1810+
|Bits|Identifier|Access|Reset| Name |
1811+
|----|----------|------|-----|------------------------------------------|
1812+
|31:0|IMAGE_SIZE| rw | 0x0 |Indirect memory configuration - Image Size|
18181813

1819-
#### IMAGE_SIZE_LSB field
1814+
#### IMAGE_SIZE field
18201815

1821-
<p>Image Size (2 LSBs): Size of the image to be loaded in 4B units</p>
1816+
<p>Image Size: Size of the image to be loaded in 4B units</p>
18221817

18231818
### INDIRECT_FIFO_STATUS_0 register
18241819

‎src/rdl/secure_firmware_recovery_interface.rdl‎

Lines changed: 3 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -573,25 +573,17 @@ regfile SecureFirmwareRecoveryInterfaceRegisters{
573573
onwrite = woclr;
574574
reset = 8'h00;
575575
} RESET[15:8];
576-
field {
577-
name = "Indirect memory configuration - Image Size";
578-
desc = "Image Size (2 MSBs): Size of the image to be loaded in 4B units";
579-
sw = rw;
580-
hw = rw;
581-
we = true;
582-
reset = 16'h0000;
583-
} IMAGE_SIZE_MSB[31:16];
584576
} INDIRECT_FIFO_CTRL_0;
585577
reg {
586578
name = "Indirect FIFO Control 1";
587579
field {
588580
name = "Indirect memory configuration - Image Size";
589-
desc = "Image Size (2 LSBs): Size of the image to be loaded in 4B units";
581+
desc = "Image Size: Size of the image to be loaded in 4B units";
590582
sw = rw;
591583
hw = rw;
592584
we = true;
593-
reset = 16'h0000;
594-
} IMAGE_SIZE_LSB[15:0];
585+
reset = 32'h0;
586+
} IMAGE_SIZE[31:0];
595587
} INDIRECT_FIFO_CTRL_1;
596588
reg {
597589
name = "Indirect FIFO Status 0";

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