We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent 1291569 commit 7891fa1Copy full SHA for 7891fa1
src/ctrl/flow_standby_i2c.sv
@@ -58,7 +58,7 @@ module flow_standby_i2c
58
// FSM STATE
59
state_t state_d, state_q;
60
// Buffer for holding elements returned by I2C target FSM
61
- logic [AcqFifoWidth-1:0] fifo_buf[AcqFifoDepth];
+ logic [AcqFifoWidth-1:0] fifo_buf[4];
62
// Are we currently mid-transfer?
63
logic transfer_active;
64
// Number of data bytes held in `fifo_buf`
@@ -120,7 +120,7 @@ module flow_standby_i2c
120
121
always_ff @(posedge clk_i or negedge rst_ni) begin : accumulate_bytes_in_dword
122
if (!rst_ni) begin
123
- for (integer i = 0; i < AcqFifoDepth; i = i + 1) begin : gen_clear_buf
+ for (integer i = 0; i < 4; i = i + 1) begin : gen_clear_buf
124
fifo_buf[i] <= 0;
125
end
126
end else begin
0 commit comments