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robertszczepanskitmichalak
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Unify signals widths in expressions
Internal-tag: [#74406]
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2 files changed

+3
-3
lines changed

2 files changed

+3
-3
lines changed

src/ctrl/descriptor_tx.sv

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -105,7 +105,7 @@ module descriptor_tx #(
105105
assign data_len_words = TtiTxDescDataWidth'(data_len >> 2);
106106
// Add 1 to depth, because there is one word in the Nto8 converter
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assign tx_start = ~tx_pending && descriptor_valid &&
108-
((tti_tx_queue_depth_i+1'b1) >= data_len_words);
108+
(TtiTxDescDataWidth'(tti_tx_queue_depth_i+1'b1) >= data_len_words);
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110110
always_ff @(posedge clk_i or negedge rst_ni) begin : proc_tx_pending
111111
if (!rst_ni) begin

src/hci/queues/read_queue.sv

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -71,8 +71,8 @@ module read_queue #(
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start_thld_trig_o = |start_thld_i && (empty_entries >= FifoDepthWidth'(start_thld_i));
7272
ready_thld_trig_o = |ready_thld_o && (fifo_depth >= FifoDepthWidth'(ready_thld_o));
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end else begin
74-
start_thld_trig_o = (empty_entries >= (1 << (FifoDepthWidth'(start_thld_i) + 1)));
75-
ready_thld_trig_o = (fifo_depth >= (1 << (FifoDepthWidth'(ready_thld_o) + 1)));
74+
start_thld_trig_o = (empty_entries >= FifoDepthWidth'(1 << ((start_thld_i) + 1)));
75+
ready_thld_trig_o = (fifo_depth >= FifoDepthWidth'(1 << ((ready_thld_o) + 1)));
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end
7777
end : trigger_threshold
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