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wkkunakgugala
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Add reserved CSR access test
Signed-off-by: Wiktoria Kuna <[email protected]>
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verification/cocotb/top/lib_i3c_top/test_csr_access.py

Lines changed: 19 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -71,6 +71,7 @@ def csr_access_test_data(reg_if, skip_regs=[]):
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at the depth `1` of the `reg_if`.
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Will skip registers that are contained within the additional regfiles of the `reg_if`.
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"""
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skip_regs = skip_regs.copy()
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skip_regs.extend(["start_addr"])
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test_data = []
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for reg_name in reg_if:
@@ -140,21 +141,35 @@ async def test_ec_sec_fw_rec_csr_access(dut):
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@cocotb.test()
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async def test_ec_stdby_ctrl_mode_csr_access(dut):
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exceptions = [
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"STBY_CR_CONTROL",
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unhandled = [
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"__RSVD_0",
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"STBY_CR_STATUS",
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"__RSVD_1",
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"STBY_CR_INTR_FORCE",
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"STBY_CR_CCC_CONFIG_GETCAPS",
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"__RSVD_3",
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]
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exceptions = [
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"STBY_CR_CONTROL",
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"STBY_CR_INTR_STATUS",
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"STBY_CR_STATUS",
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"STBY_CR_INTR_SIGNAL_ENABLE",
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"STBY_CR_CCC_CONFIG_GETCAPS",
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"STBY_CR_CCC_CONFIG_RSTACT_PARAMS",
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]
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exceptions.extend(unhandled)
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tb = await initialize(dut)
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await run_basic_csr_access(tb, tb.reg_map.I3C_EC.STDBYCTRLMODE, exceptions)
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# Standby Controller Mode CSRs that are not supported or are reserved
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# should not be updated with writes and should return `0` upon read
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for reg_name in unhandled:
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reg = getattr(tb.reg_map.I3C_EC.STDBYCTRLMODE, reg_name)
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addr = reg.base_addr
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exp_rd = 0
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await tb.write_csr(addr, int2dword(rand_reg_val(reg)[0]), 4)
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rd_data = await tb.read_csr(addr)
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compare_values(int2dword(exp_rd), rd_data, addr)
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@cocotb.test()
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async def test_ec_tti_csr_access(dut):

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