add stub entdaa module

Author: kgugala

src/ctrl/ccc.sv

@@ -89,6 +89,7 @@ module ccc
 (
     input logic clk_i,  // Clock
     input logic rst_ni, // Async reset, active low
+    input logic [47:0] id_i,
 
     // CC is decoded from the frame by the primary FSM
     input logic [7:0] ccc_i,
@@ -459,8 +460,10 @@ module ccc
           // have defining byte
           if (have_defining_byte) state_d = RxDefByte;
           else begin
+            // ENTDAA is special
+            if (command_code == ENTDAA) state_d = HandleENTDAA;
             // broadcast CCCs
-            if (~is_direct_cmd) state_d = RxData;
+            else if (~is_direct_cmd) state_d = RxData;
             // direct CCCs
             else
               state_d = RxByte;

src/ctrl/ccc_entdaa.sv

@@ -0,0 +1,25 @@
+module ccc_entdaa
+    import controller_pkg::*;
+    import i3c_pkg::*;
+(
+    input logic clk_i,  // Clock
+    input logic rst_ni, // Async reset, active low
+    input logic [47:0] id_i,
+    input start_daa,
+    output done_daa
+);
+
+
+  typedef enum logic [7:0] {
+    Idle,
+    ReceiveRsvdByte,
+    AckRsvdByte,
+    SendID,
+    ReceiveAddr,
+    Done,
+    Error
+  } state_e;
+
+  state_e state_q, state_d;
+
+endmodule

src/ctrl/controller.sv

@@ -62,6 +62,7 @@ module controller
 ) (
     input logic clk_i,
     input logic rst_ni,
+    input logic [47:0] id_i,
 
     // Interface to SDA/SCL
     input  logic scl_i,
@@ -453,6 +454,7 @@ module controller
   controller_standby xcontroller_standby (
       .clk_i(clk_i),
       .rst_ni(rst_ni),
+      .id_i(id_i),
       .ctrl_bus_i(ctrl_bus_i[2:3]),
       .ctrl_scl_o(ctrl_scl_o[2:3]),
       .ctrl_sda_o(ctrl_sda_o[2:3]),

src/ctrl/controller_standby.sv

@@ -30,6 +30,7 @@ module controller_standby
 ) (
     input logic clk_i,
     input logic rst_ni,
+    input logic [47:0] id_i,
 
     // Interface to SDA/SCL
     input bus_state_t ctrl_bus_i[2],
@@ -380,6 +381,7 @@ module controller_standby
   ) xcontroller_standby_i3c (
       .clk_i(clk_i),
       .rst_ni(rst_ni),
+      .id_i(id_i)
       .ctrl_bus_i(ctrl_bus_i[1]),
       .ctrl_scl_o(ctrl_scl_o[1]),
       .ctrl_sda_o(ctrl_sda_o[1]),

src/ctrl/controller_standby_i3c.sv

@@ -16,6 +16,7 @@ module controller_standby_i3c
 ) (
     input logic clk_i,
     input logic rst_ni,
+    input logic [47:0] id_i,
 
     // Interface to SDA/SCL
     input bus_state_t ctrl_bus_i,
@@ -466,6 +467,7 @@ module controller_standby_i3c
   ccc xccc (
       .clk_i,
       .rst_ni,
+      .id_i,
       .ccc_i                     (ccc),
       .ccc_valid_i               (ccc_valid),
       .done_fsm_o                (is_ccc_done),

src/i3c.sv

@@ -102,6 +102,7 @@ module i3c
 ) (
     input clk_i,  // clock
     input rst_ni, // active low reset
+    input logic [47:0] id_i,
 
 `ifdef I3C_USE_AHB
     // AHB-Lite interface
@@ -558,6 +559,7 @@ module i3c
   ) xcontroller (
       .clk_i (clk_i),
       .rst_ni(rst_ni),
+      .id_i  (id_i),
 
       .scl_i(phy2ctrl_scl),
       .sda_i(phy2ctrl_sda),

src/i3c_wrapper.sv

@@ -22,6 +22,7 @@ module i3c_wrapper #(
 ) (
     input clk_i,  // clock
     input rst_ni, // active low reset
+    input logic [47:0] id_i,
 
 `ifdef I3C_USE_AHB
     // AHB-Lite interface
@@ -162,6 +163,7 @@ module i3c_wrapper #(
   ) i3c (
       .clk_i,
       .rst_ni,
+      .id_i,
 
 `ifdef I3C_USE_AHB
       .haddr_i,