Skip to content

Commit e22a210

Browse files
wkkunakgugala
authored andcommitted
nox: Add workaround for running tag intersection
Signed-off-by: Wiktoria Kuna <[email protected]>
1 parent 43042c3 commit e22a210

File tree

14 files changed

+453
-360
lines changed

14 files changed

+453
-360
lines changed

verification/cocotb/block/axi_adapter/test_bus_stress.py

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,8 @@
1010
import cocotb
1111
from cocotb.triggers import ClockCycles, Combine, RisingEdge, Timer, with_timeout
1212

13+
from utils import target_test
14+
1315

1416
async def timeout_task(timeout):
1517
await Timer(timeout, "us")
@@ -70,7 +72,7 @@ async def initialize(dut, timeout=50):
7072
return tb, data_len, test_data
7173

7274

73-
@cocotb.test()
75+
@target_test()
7476
async def test_collision_with_write(dut):
7577
tb, data_len, test_data = await initialize(dut)
7678

@@ -108,7 +110,7 @@ async def reader(return_data):
108110
tb.log.info("Test finished!")
109111

110112

111-
@cocotb.test()
113+
@target_test()
112114
async def test_collision_with_read(dut):
113115
tb, data_len, test_data = await initialize(dut)
114116

@@ -152,7 +154,7 @@ async def reader(return_data):
152154
tb.log.info("Test finished!")
153155

154156

155-
@cocotb.test()
157+
@target_test()
156158
async def test_write_read_burst(dut):
157159
tb, data_len, test_data = await initialize(dut)
158160

@@ -174,7 +176,7 @@ async def test_write_read_burst(dut):
174176
tb.log.info("Test finished!")
175177

176178

177-
@cocotb.test()
179+
@target_test()
178180
async def test_write_burst_collision_with_read(dut):
179181
tb, data_len, test_data = await initialize(dut)
180182

@@ -213,7 +215,7 @@ async def reader(return_data):
213215
tb.log.info("Test finished!")
214216

215217

216-
@cocotb.test()
218+
@target_test()
217219
async def test_read_burst_collision_with_write(dut):
218220
tb, data_len, test_data = await initialize(dut)
219221

verification/cocotb/block/axi_adapter_id_filter/test_bus_stress.py

Lines changed: 20 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
from axi_utils import initialize_dut
55
from bus2csr import dword2int, int2bytes, int2dword
66
from cocotbext.axi.constants import AxiBurstType
7-
from utils import Access, draw_axi_priv_ids, get_axi_ids_seq
7+
from utils import Access, draw_axi_priv_ids, get_axi_ids_seq, target_test
88

99
import cocotb
1010
from cocotb.triggers import ClockCycles, Combine, RisingEdge, with_timeout
@@ -74,22 +74,22 @@ async def reader(return_data):
7474
verify_data(test_data, awids, received_data, arids, filter_off, priv_ids)
7575

7676

77-
@cocotb.test()
77+
@target_test()
7878
async def test_collision_with_write_id_filter_off(dut):
7979
await collision_with_write(dut, True)
8080

8181

82-
@cocotb.test()
82+
@target_test()
8383
async def test_collision_with_write_id_filter_on_priv(dut):
8484
await collision_with_write(dut, False, Access.Priv, Access.Priv)
8585

8686

87-
@cocotb.test()
87+
@target_test()
8888
async def test_collision_with_write_id_filter_on_non_priv(dut):
8989
await collision_with_write(dut, False, Access.Priv, Access.Unpriv)
9090

9191

92-
@cocotb.test()
92+
@target_test()
9393
async def test_collision_with_write_id_filter_on_mixed(dut):
9494
await collision_with_write(dut, False, Access.Priv, Access.Mixed)
9595

@@ -140,22 +140,22 @@ async def reader(return_data):
140140
verify_data(test_data, awids, received_data, arids, filter_off, priv_ids)
141141

142142

143-
@cocotb.test()
143+
@target_test()
144144
async def test_collision_with_read_id_filter_off(dut):
145145
await collision_with_read(dut, True)
146146

147147

148-
@cocotb.test()
148+
@target_test()
149149
async def test_collision_with_read_id_filter_on_priv(dut):
150150
await collision_with_read(dut, False, Access.Priv, Access.Priv)
151151

152152

153-
@cocotb.test()
153+
@target_test()
154154
async def test_collision_with_read_id_filter_on_non_priv(dut):
155155
await collision_with_read(dut, False, Access.Priv, Access.Unpriv)
156156

157157

158-
@cocotb.test()
158+
@target_test()
159159
async def test_collision_with_read_id_filter_on_mixed(dut):
160160
await collision_with_read(dut, False, Access.Priv, Access.Mixed)
161161

@@ -181,17 +181,17 @@ async def write_read_burst(dut, filter_off=False, awid_priv=True, arid_priv=True
181181
verify_data(test_data, awids, received_data, arids, filter_off, priv_ids)
182182

183183

184-
@cocotb.test()
184+
@target_test()
185185
async def test_write_read_burst_id_filter_off(dut):
186186
await write_read_burst(dut, True)
187187

188188

189-
@cocotb.test()
189+
@target_test()
190190
async def test_write_read_burst_id_filter_on_priv(dut):
191191
await write_read_burst(dut, False, Access.Priv, Access.Priv)
192192

193193

194-
@cocotb.test()
194+
@target_test()
195195
async def test_write_read_burst_id_filter_on_non_priv(dut):
196196
await write_read_burst(dut, False, Access.Priv, Access.Unpriv)
197197

@@ -232,17 +232,17 @@ async def reader(return_data):
232232
verify_data(test_data, awids, received_data, arids, filter_off, priv_ids)
233233

234234

235-
@cocotb.test()
235+
@target_test()
236236
async def test_write_burst_collision_with_read_id_filter_off(dut):
237237
await write_burst_collision_with_read(dut, True)
238238

239239

240-
@cocotb.test(skip=False)
240+
@target_test()
241241
async def test_write_burst_collision_with_read_id_filter_on_priv(dut):
242242
await write_burst_collision_with_read(dut, False, Access.Priv, Access.Priv)
243243

244244

245-
@cocotb.test()
245+
@target_test()
246246
async def test_write_burst_collision_with_read_id_filter_on_non_priv(dut):
247247
await write_burst_collision_with_read(dut, False, Access.Priv, Access.Unpriv)
248248

@@ -293,22 +293,22 @@ async def reader(return_data):
293293
verify_data(test_data, awids, received_data2, arids, filter_off, priv_ids)
294294

295295

296-
@cocotb.test()
296+
@target_test()
297297
async def test_read_burst_collision_with_write_id_filter_off(dut):
298298
await read_burst_collision_with_write(dut, True)
299299

300300

301-
@cocotb.test()
301+
@target_test()
302302
async def test_read_burst_collision_with_write_id_filter_on_priv(dut):
303303
await read_burst_collision_with_write(dut, False, Access.Priv, Access.Priv)
304304

305305

306-
@cocotb.test()
306+
@target_test()
307307
async def test_read_burst_collision_with_write_id_filter_on_non_priv(dut):
308308
await read_burst_collision_with_write(dut, False, Access.Priv, Access.Unpriv)
309309

310310

311-
@cocotb.test()
311+
@target_test()
312312
async def test_collision_with_write_mixed_priv(dut):
313313
priv_ids = draw_axi_priv_ids()
314314
tb, data_len, test_data = await initialize(dut, filter_off=False, priv_ids=priv_ids)
@@ -345,7 +345,7 @@ async def reader():
345345
await Combine(w, r)
346346

347347

348-
@cocotb.test()
348+
@target_test()
349349
async def test_collision_with_read_mixed_priv(dut):
350350
priv_ids = draw_axi_priv_ids()
351351
tb, data_len, test_data = await initialize(dut, filter_off=False, priv_ids=priv_ids)

verification/cocotb/block/axi_adapter_id_filter/test_runtime_id_change.py

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
from axi_utils import initialize_dut
55
from bus2csr import dword2int, int2bytes
66
from cocotbext.axi.constants import AxiBurstType
7-
from utils import Access, draw_axi_priv_ids, get_axi_ids_seq
7+
from utils import Access, draw_axi_priv_ids, get_axi_ids_seq, target_test
88

99
import cocotb
1010
from cocotb.triggers import Combine, RisingEdge
@@ -87,12 +87,12 @@ async def toggle_filtering(dut, cond):
8787
await Combine(w, r)
8888

8989

90-
@cocotb.test()
90+
@target_test()
9191
async def test_toggle_filtering_mid_read(dut):
9292
await toggle_filtering(dut, lambda: dut.arready.value and dut.arvalid.value)
9393

9494

95-
@cocotb.test()
95+
@target_test()
9696
async def test_toggle_filtering_mid_write(dut):
9797
await toggle_filtering(dut, lambda: dut.wready.value and dut.wvalid.value)
9898

@@ -119,17 +119,17 @@ async def swap_priv_ids(dut, cond):
119119
await Combine(w, r)
120120

121121

122-
@cocotb.test()
122+
@target_test()
123123
async def test_swap_priv_ids_mid_read(dut):
124124
await swap_priv_ids(dut, lambda: dut.arready.value and dut.arvalid.value)
125125

126126

127-
@cocotb.test()
127+
@target_test()
128128
async def test_swap_priv_ids_mid_write(dut):
129129
await swap_priv_ids(dut, lambda: dut.wready.value and dut.wvalid.value)
130130

131131

132-
@cocotb.test()
132+
@target_test()
133133
async def test_randomized_id_configuration_swap(dut):
134134
async def disable_random():
135135
while True:

verification/cocotb/block/axi_adapter_id_filter/test_seq_csr_access.py

Lines changed: 19 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@
2020
mask_bits,
2121
rand_bits,
2222
rand_bits32,
23+
controller_test
2324
)
2425

2526
import cocotb
@@ -39,18 +40,18 @@ async def read_hci_version_csr(dut, disable_id_filtering=False, priv_ids=None, t
3940
compare_values(expected_hci_version_value, resp, addr)
4041

4142

42-
@cocotb.test(skip=("ControllerSupport" not in cocotb.plusargs))
43+
@controller_test()
4344
async def test_read_hci_version_csr_id_filter_off(dut):
4445
await read_hci_version_csr(dut, True, draw_axi_priv_ids(), rand_bits(AxiIdWidth))
4546

4647

47-
@cocotb.test(skip=("ControllerSupport" not in cocotb.plusargs))
48+
@controller_test()
4849
async def test_read_hci_version_csr_id_filter_on_priv(dut):
4950
priv_ids = draw_axi_priv_ids()
5051
await read_hci_version_csr(dut, False, priv_ids, get_axi_ids_seq(priv_ids, 1, Access.Priv)[0])
5152

5253

53-
@cocotb.test(skip=("ControllerSupport" not in cocotb.plusargs))
54+
@controller_test()
5455
async def test_read_hci_version_csr_id_filter_on_non_priv(dut):
5556
priv_ids = draw_axi_priv_ids()
5657
await read_hci_version_csr(dut, False, priv_ids, get_axi_ids_seq(priv_ids, 1, Access.Unpriv)[0])
@@ -71,19 +72,19 @@ async def read_pio_section_offset(dut, disable_id_filtering=False, priv_ids=None
7172
compare_values(expected, resp, addr)
7273

7374

74-
@cocotb.test(skip=("ControllerSupport" not in cocotb.plusargs))
75+
@controller_test()
7576
async def test_read_pio_section_offset_filter_off(dut):
7677
await read_pio_section_offset(dut, True, draw_axi_priv_ids(), rand_bits(AxiIdWidth))
7778

7879

79-
@cocotb.test(skip=("ControllerSupport" not in cocotb.plusargs))
80+
@controller_test()
8081
async def test_read_pio_section_offset_filter_on_priv(dut):
8182
priv_ids = draw_axi_priv_ids()
8283
tid = get_axi_ids_seq(priv_ids, 1, Access.Priv)[0]
8384
await read_pio_section_offset(dut, False, priv_ids, tid)
8485

8586

86-
@cocotb.test(skip=("ControllerSupport" not in cocotb.plusargs))
87+
@controller_test()
8788
async def test_read_pio_section_offset_filter_on_non_priv(dut):
8889
priv_ids = draw_axi_priv_ids()
8990
tid = get_axi_ids_seq(priv_ids, 1, Access.Unpriv)[0]
@@ -109,19 +110,19 @@ async def write_to_controller_device_addr(dut, disable_id_filtering=False, priv_
109110
compare_values(wdata, resp, addr)
110111

111112

112-
@cocotb.test(skip=("ControllerSupport" not in cocotb.plusargs))
113+
@controller_test()
113114
async def test_write_to_controller_device_addr_filter_off(dut):
114115
await write_to_controller_device_addr(dut, True, draw_axi_priv_ids(), rand_bits(AxiIdWidth))
115116

116117

117-
@cocotb.test(skip=("ControllerSupport" not in cocotb.plusargs))
118+
@controller_test()
118119
async def test_write_to_controller_device_addr_filter_on_priv(dut):
119120
priv_ids = draw_axi_priv_ids()
120121
tid = get_axi_ids_seq(priv_ids, 1, Access.Priv)[0]
121122
await write_to_controller_device_addr(dut, False, priv_ids, tid)
122123

123124

124-
@cocotb.test(skip=("ControllerSupport" not in cocotb.plusargs))
125+
@controller_test()
125126
async def test_write_to_controller_device_addr_filter_on_non_priv(dut):
126127
priv_ids = draw_axi_priv_ids()
127128
tid = get_axi_ids_seq(priv_ids, 1, Access.Unpriv)[0]
@@ -146,19 +147,19 @@ async def write_should_not_affect_ro_csr(dut, disable_id_filtering=False, priv_i
146147
compare_values(hc_cap, resp, addr)
147148

148149

149-
@cocotb.test(skip=("ControllerSupport" not in cocotb.plusargs))
150+
@controller_test()
150151
async def test_write_should_not_affect_ro_csr_filter_off(dut):
151152
await write_should_not_affect_ro_csr(dut, True, draw_axi_priv_ids(), rand_bits(AxiIdWidth))
152153

153154

154-
@cocotb.test(skip=("ControllerSupport" not in cocotb.plusargs))
155+
@controller_test()
155156
async def test_write_should_not_affect_ro_csr_filter_on_priv(dut):
156157
priv_ids = draw_axi_priv_ids()
157158
tid = get_axi_ids_seq(priv_ids, 1, Access.Priv)[0]
158159
await write_should_not_affect_ro_csr(dut, False, priv_ids, tid)
159160

160161

161-
@cocotb.test(skip=("ControllerSupport" not in cocotb.plusargs))
162+
@controller_test()
162163
async def test_write_should_not_affect_ro_csr_filter_on_non_priv(dut):
163164
priv_ids = draw_axi_priv_ids()
164165
tid = get_axi_ids_seq(priv_ids, 1, Access.Unpriv)[0]
@@ -199,19 +200,19 @@ async def sequence_csr_read(dut, disable_id_filtering=False, priv_ids=None, tid=
199200
compare_values(int2bytes(value), resp, addr)
200201

201202

202-
@cocotb.test(skip=("ControllerSupport" not in cocotb.plusargs))
203+
@controller_test()
203204
async def test_sequence_csr_read_filter_off(dut):
204205
await sequence_csr_read(dut, True, draw_axi_priv_ids(), rand_bits(AxiIdWidth))
205206

206207

207-
@cocotb.test(skip=("ControllerSupport" not in cocotb.plusargs))
208+
@controller_test()
208209
async def test_sequence_csr_read_filter_on_priv(dut):
209210
priv_ids = draw_axi_priv_ids()
210211
tid = get_axi_ids_seq(priv_ids, 1, Access.Priv)[0]
211212
await sequence_csr_read(dut, False, priv_ids, tid)
212213

213214

214-
@cocotb.test(skip=("ControllerSupport" not in cocotb.plusargs))
215+
@controller_test()
215216
async def test_sequence_csr_read_filter_on_non_priv(dut):
216217
priv_ids = draw_axi_priv_ids()
217218
tid = get_axi_ids_seq(priv_ids, 1, Access.Unpriv)[0]
@@ -261,19 +262,19 @@ async def sequence_csr_write(dut, disable_id_filtering=False, priv_ids=None, tid
261262
compare_values(int2bytes(value), resp, addr)
262263

263264

264-
@cocotb.test(skip=("ControllerSupport" not in cocotb.plusargs))
265+
@controller_test()
265266
async def test_sequence_csr_write_filter_off(dut):
266267
await sequence_csr_write(dut, True, draw_axi_priv_ids(), rand_bits(AxiIdWidth))
267268

268269

269-
@cocotb.test(skip=("ControllerSupport" not in cocotb.plusargs))
270+
@controller_test()
270271
async def test_sequence_csr_write_filter_on_priv(dut):
271272
priv_ids = draw_axi_priv_ids()
272273
tid = get_axi_ids_seq(priv_ids, 1, Access.Priv)[0]
273274
await sequence_csr_write(dut, False, priv_ids, tid)
274275

275276

276-
@cocotb.test(skip=("ControllerSupport" not in cocotb.plusargs))
277+
@controller_test()
277278
async def test_sequence_csr_write_filter_on_non_priv(dut):
278279
priv_ids = draw_axi_priv_ids()
279280
tid = get_axi_ids_seq(priv_ids, 1, Access.Unpriv)[0]

0 commit comments

Comments
 (0)