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entdaa fsm
1 parent 29d05d6 commit fda5bac

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3 files changed

+34
-25
lines changed

3 files changed

+34
-25
lines changed

src/ctrl/ccc.sv

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -91,7 +91,6 @@ module ccc
9191
input logic rst_ni, // Async reset, active low
9292
input logic [47:0] id_i,
9393

94-
input logic arbitration_lost_i,
9594
// CC is decoded from the frame by the primary FSM
9695
input logic [7:0] ccc_i,
9796
// Assert valid when you want to give control to this FSM
@@ -339,13 +338,13 @@ module ccc
339338
// Mux TX access between regular CCC and ENTDAA
340339
logic entdaa_tx_req_bit;
341340
logic entdaa_tx_req_byte;
342-
logic entdaa_tx_req_value;
341+
logic [7:0] entdaa_tx_req_value;
343342
logic entdaa_tx_sel_od_pp;
344343
logic entdaa_rx_req_bit;
345344
logic entdaa_rx_req_byte;
346345
logic ccc_tx_req_bit;
347346
logic ccc_tx_req_byte;
348-
logic ccc_tx_req_value;
347+
logic [7:0] ccc_tx_req_value;
349348
logic ccc_tx_sel_od_pp;
350349
logic ccc_rx_req_bit;
351350
logic ccc_rx_req_byte;
@@ -967,7 +966,6 @@ module ccc
967966
assign entas1_o = '0;
968967
assign entas2_o = '0;
969968
assign entas3_o = '0;
970-
assign entdaa_o = '0;
971969
assign ent_tm_o = '0;
972970
assign tm_o = '0;
973971
assign ent_hdr_0_o = '0;
@@ -985,7 +983,7 @@ module ccc
985983
.rst_ni, // Async reset, active low
986984
.id_i,
987985

988-
.start_daa_i(entdaa_start),
986+
.start_daa_i(entdaa_o),
989987
.done_daa_o(entdaa_done),
990988

991989
// Bus RX interface
@@ -995,7 +993,7 @@ module ccc
995993
.bus_rx_req_byte_o(entdaa_rx_req_byte),
996994

997995
// Bus TX interface
998-
.bus_tx_done_i,
996+
.bus_tx_done_i(bus_tx_done_i),
999997
.bus_tx_req_byte_o(entdaa_tx_req_byte),
1000998
.bus_tx_req_bit_o(entdaa_tx_req_bit),
1001999
.bus_tx_req_value_o(entdaa_tx_req_value),

src/ctrl/ccc_entdaa.sv

Lines changed: 29 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -36,17 +36,17 @@ module ccc_entdaa
3636

3737

3838
typedef enum logic [7:0] {
39-
Idle,
40-
WaitStart,
41-
ReceiveRsvdByte,
42-
AckRsvdByte,
43-
SendNack,
44-
SendID,
45-
LostArbitration,
46-
ReceiveAddr,
47-
AckAddr,
48-
Done,
49-
Error
39+
Idle = 'h0,
40+
WaitStart = 'h1,
41+
ReceiveRsvdByte = 'h2,
42+
AckRsvdByte = 'h3,
43+
SendNack = 'h4,
44+
SendID = 'h5,
45+
LostArbitration = 'h6,
46+
ReceiveAddr = 'h7,
47+
AckAddr = 'h8,
48+
Done = 'h9,
49+
Error = 'ha
5050
} state_e;
5151

5252
state_e state_q, state_d;
@@ -55,7 +55,7 @@ module ccc_entdaa
5555

5656
logic parity_ok;
5757

58-
assign reserved_word_det = (bus_rx_data_i[7:1] == 7'h7e && bus_rx_data_i[0] == 0);
58+
assign reserved_word_det = (bus_rx_data_i[7:1] == 7'h7e && bus_rx_data_i[0] == 1'b1);
5959

6060
always_comb begin: state_functions
6161
state_d = state_q;
@@ -77,17 +77,25 @@ module ccc_entdaa
7777
end
7878
end
7979
AckRsvdByte: begin
80-
state_d <= SendID;
80+
if (bus_tx_done_i) begin
81+
state_d <= SendID;
82+
end
8183
end
8284
SendNack: begin
83-
state_d <= Error;
85+
if (bus_tx_done_i) begin
86+
state_d <= Error;
87+
end
8488
end
8589
SendID: begin
86-
// our Id was overwritten by some other device
87-
if (arbitration_lost_i) begin
88-
state_d <= LostArbitration;
90+
if (bus_tx_done_i) begin
91+
// our Id was overwritten by some other device
92+
if (arbitration_lost_i) begin
93+
state_d <= LostArbitration;
94+
end
8995
end
9096
end
97+
LostArbitration: begin
98+
end
9199
ReceiveAddr: begin
92100
if (bus_rx_done_i) begin
93101
if (parity_ok) state_d <= AckAddr;
@@ -106,7 +114,9 @@ module ccc_entdaa
106114

107115
always_comb begin : state_outputs
108116
bus_rx_req_byte_o = '0;
117+
bus_rx_req_bit_o = '0;
109118

119+
bus_tx_req_byte_o = '0;
110120
bus_tx_req_bit_o = '0;
111121
bus_tx_req_value_o = '0;
112122
bus_tx_sel_od_pp_o = '0;
@@ -119,12 +129,13 @@ module ccc_entdaa
119129
bus_rx_req_byte_o = '1;
120130
end
121131
AckRsvdByte: begin
132+
bus_tx_req_byte_o = '0;
122133
bus_tx_req_bit_o = '1;
123134
bus_tx_req_value_o = '0;
124135
end
125136
SendNack: begin
126137
bus_tx_req_bit_o = '1;
127-
bus_tx_req_value_o = '0;
138+
bus_tx_req_value_o = '1;
128139
end
129140
SendID: begin
130141
end

src/i3c.sv

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -541,7 +541,7 @@ module i3c
541541

542542
logic arbitration_lost;
543543

544-
assign arbitration_lost = sda_i != sda_o;
544+
assign arbitration_lost = i3c_sda_i != i3c_sda_o;
545545

546546
// HCI
547547
I3CCSR_pkg::I3CCSR__I3C_EC__TTI__out_t hwif_tti_out;

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