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Commit 1648fa7

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wangyangcarlosqwqqwq
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[#961] riscv: reject scalar M instructions without the M extension
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arch/riscv/translate.c

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -873,6 +873,29 @@ static void gen_arith(DisasContext *dc, uint32_t opc, int rd, int rs1, int rs2)
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{
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TCGv source1, source2, cond1, cond2, zeroreg, resultopt1;
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target_ulong mask;
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switch(opc) {
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case OPC_RISC_MUL:
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case OPC_RISC_MULH:
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case OPC_RISC_MULHSU:
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case OPC_RISC_MULHU:
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case OPC_RISC_DIV:
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case OPC_RISC_DIVU:
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case OPC_RISC_REM:
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case OPC_RISC_REMU:
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#if defined(TARGET_RISCV64)
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case OPC_RISC_MULW:
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case OPC_RISC_DIVW:
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case OPC_RISC_DIVUW:
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case OPC_RISC_REMW:
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case OPC_RISC_REMUW:
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#endif
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if(!ensure_extension(dc, RISCV_FEATURE_RVM)) {
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return;
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}
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break;
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default:
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break;
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}
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source1 = tcg_temp_local_new();
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source2 = tcg_temp_local_new();
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gen_get_gpr(source1, rs1);

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