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Update patch
Signed-off-by: Kamil Rakoczy <[email protected]>
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uhdm-tests/opentitan/0001-Add-opentitan-patch-for-uhdm.patch

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@@ -522,70 +522,6 @@ index 962d3b559..9d5a10c8c 100644
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`endif
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end
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diff --git a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
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index 2acc14e86..f20146f6e 100644
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--- a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
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+++ b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
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@@ -239,8 +239,8 @@ module top_earlgrey #(
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assign unused_irq_id = irq_id;
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// Alert list
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- prim_alert_pkg::alert_tx_t [alert_pkg::NAlerts-1:0] alert_tx;
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- prim_alert_pkg::alert_rx_t [alert_pkg::NAlerts-1:0] alert_rx;
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+ wire [9:0] alert_tx;
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+ wire [19:0] alert_rx;
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// Escalation outputs
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prim_esc_pkg::esc_tx_t [alert_pkg::N_ESC_SEV-1:0] esc_tx;
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prim_esc_pkg::esc_rx_t [alert_pkg::N_ESC_SEV-1:0] esc_rx;
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@@ -259,12 +259,12 @@ module top_earlgrey #(
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pwrmgr_pkg::pwr_cpu_t pwrmgr_pwr_cpu;
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clkmgr_pkg::clkmgr_out_t clkmgr_clocks;
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logic aes_idle;
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- clkmgr_pkg::clk_hint_status_t clkmgr_status;
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+ reg [2:0] clkmgr_status;
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always_comb begin
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// TODO: So far just aes is connected
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- clkmgr_status.idle = clkmgr_pkg::CLK_HINT_STATUS_DEFAULT;
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- clkmgr_status.idle[0] = aes_idle;
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+ clkmgr_status[2-:3] = clkmgr_pkg::CLK_HINT_STATUS_DEFAULT;
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+ clkmgr_status[0] = aes_idle;
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end
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// Non-debug module reset == reset for everything except for the debug module
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@@ -647,8 +647,8 @@ module top_earlgrey #(
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.tl_o (tl_aes_d_d2h),
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// [0]: ctrl_err
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- .alert_tx_o ( alert_tx[0:0] ),
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- .alert_rx_i ( alert_rx[0:0] ),
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+ .alert_tx_o ( alert_tx[0+:2] ),
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+ .alert_rx_i ( alert_rx[0+:4] ),
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// Inter-module signals
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.idle_o(aes_idle),
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@@ -666,8 +666,8 @@ module top_earlgrey #(
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.intr_hmac_err_o (intr_hmac_hmac_err),
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// [1]: msg_push_sha_disabled
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- .alert_tx_o ( alert_tx[1:1] ),
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- .alert_rx_i ( alert_rx[1:1] ),
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+ .alert_tx_o ( alert_tx[2+:2] ),
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+ .alert_rx_i ( alert_rx[4+:4] ),
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.clk_i (clkmgr_clocks.clk_main_hmac),
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.rst_ni (rstmgr_resets.rst_sys_n)
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);
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@@ -904,8 +904,8 @@ module top_earlgrey #(
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// [2]: imem_uncorrectable
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// [3]: dmem_uncorrectable
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// [4]: reg_uncorrectable
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- .alert_tx_o ( alert_tx[4:2] ),
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- .alert_rx_i ( alert_rx[4:2] ),
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+ .alert_tx_o ( alert_tx[4+:6] ),
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+ .alert_rx_i ( alert_rx[8+:12] ),
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// Inter-module signals
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.idle_o(),
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diff --git a/hw/top_earlgrey/top_earlgrey_nexysvideo.core b/hw/top_earlgrey/top_earlgrey_nexysvideo.core
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index 8d6cf89b6..1683f0693 100644
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--- a/hw/top_earlgrey/top_earlgrey_nexysvideo.core

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