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| 1 | +/* Copyright 2013-2014 IBM Corp. |
| 2 | + * |
| 3 | + * Licensed under the Apache License, Version 2.0 (the "License"); |
| 4 | + * you may not use this file except in compliance with the License. |
| 5 | + * You may obtain a copy of the License at |
| 6 | + * |
| 7 | + * http://www.apache.org/licenses/LICENSE-2.0 |
| 8 | + * |
| 9 | + * Unless required by applicable law or agreed to in writing, software |
| 10 | + * distributed under the License is distributed on an "AS IS" BASIS, |
| 11 | + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or |
| 12 | + * implied. |
| 13 | + * See the License for the specific language governing permissions and |
| 14 | + * limitations under the License. |
| 15 | + */ |
| 16 | + |
| 17 | +#define STACK_TOP 0x20000 |
| 18 | + |
| 19 | +#define FIXUP_ENDIAN \ |
| 20 | + tdi 0,0,0x48; /* Reverse endian of b . + 8 */ \ |
| 21 | + b 191f; /* Skip trampoline if endian is good */ \ |
| 22 | + .long 0xa600607d; /* mfmsr r11 */ \ |
| 23 | + .long 0x01006b69; /* xori r11,r11,1 */ \ |
| 24 | + .long 0x05009f42; /* bcl 20,31,$+4 */ \ |
| 25 | + .long 0xa602487d; /* mflr r10 */ \ |
| 26 | + .long 0x14004a39; /* addi r10,r10,20 */ \ |
| 27 | + .long 0xa64b5a7d; /* mthsrr0 r10 */ \ |
| 28 | + .long 0xa64b7b7d; /* mthsrr1 r11 */ \ |
| 29 | + .long 0x2402004c; /* hrfid */ \ |
| 30 | +191: |
| 31 | + |
| 32 | + |
| 33 | +/* Load an immediate 64-bit value into a register */ |
| 34 | +#define LOAD_IMM64(r, e) \ |
| 35 | + lis r,(e)@highest; \ |
| 36 | + ori r,r,(e)@higher; \ |
| 37 | + rldicr r,r, 32, 31; \ |
| 38 | + oris r,r, (e)@h; \ |
| 39 | + ori r,r, (e)@l; |
| 40 | + |
| 41 | + .section ".head","ax" |
| 42 | + |
| 43 | + /* |
| 44 | + * Microwatt currently enters in LE mode at 0x0, so we don't need to |
| 45 | + * do any endian fix ups> |
| 46 | + */ |
| 47 | + . = 0 |
| 48 | +.global _start |
| 49 | +_start: |
| 50 | + b boot_entry |
| 51 | + |
| 52 | + /* QEMU enters at 0x10 */ |
| 53 | + . = 0x10 |
| 54 | + FIXUP_ENDIAN |
| 55 | + b boot_entry |
| 56 | + |
| 57 | + . = 0x100 |
| 58 | + FIXUP_ENDIAN |
| 59 | + b boot_entry |
| 60 | + |
| 61 | +.global boot_entry |
| 62 | +boot_entry: |
| 63 | + /* setup stack */ |
| 64 | + LOAD_IMM64(%r1, STACK_TOP - 0x100) |
| 65 | + LOAD_IMM64(%r12, main) |
| 66 | + mtctr %r12, |
| 67 | + bctrl |
| 68 | + b . |
| 69 | + |
| 70 | +#define EXCEPTION(nr) \ |
| 71 | + .= nr ;\ |
| 72 | + b . |
| 73 | + |
| 74 | + /* More exception stubs */ |
| 75 | + EXCEPTION(0x300) |
| 76 | + EXCEPTION(0x380) |
| 77 | + EXCEPTION(0x400) |
| 78 | + EXCEPTION(0x480) |
| 79 | + EXCEPTION(0x500) |
| 80 | + EXCEPTION(0x600) |
| 81 | + EXCEPTION(0x700) |
| 82 | + EXCEPTION(0x800) |
| 83 | + EXCEPTION(0x900) |
| 84 | + EXCEPTION(0x980) |
| 85 | + EXCEPTION(0xa00) |
| 86 | + EXCEPTION(0xb00) |
| 87 | + EXCEPTION(0xc00) |
| 88 | + EXCEPTION(0xd00) |
| 89 | + EXCEPTION(0xe00) |
| 90 | + EXCEPTION(0xe20) |
| 91 | + EXCEPTION(0xe40) |
| 92 | + EXCEPTION(0xe60) |
| 93 | + EXCEPTION(0xe80) |
| 94 | + EXCEPTION(0xf00) |
| 95 | + EXCEPTION(0xf20) |
| 96 | + EXCEPTION(0xf40) |
| 97 | + EXCEPTION(0xf60) |
| 98 | + EXCEPTION(0xf80) |
| 99 | +#if 0 |
| 100 | + EXCEPTION(0x1000) |
| 101 | + EXCEPTION(0x1100) |
| 102 | + EXCEPTION(0x1200) |
| 103 | + EXCEPTION(0x1300) |
| 104 | + EXCEPTION(0x1400) |
| 105 | + EXCEPTION(0x1500) |
| 106 | + EXCEPTION(0x1600) |
| 107 | +#endif |
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