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[libclc] Move logb/ilogb to CLC library; optimize (llvm#128028)
This commit moves the logb and ilogb builtins to the CLC library. It simultaneously optimizes them both for vector types and for half types. Vector types were being scalarized in some cases. Half types were previously promoting to float, whereas this commit provides them a native implementation. Everything passes the OpenCL-CTS. I had to intuit some magic numbers used by these implementations in order to generate the half variants. I gave them clearer definitions derived from what I believe are their actual component numbers, but named them 'magic' to convey that they weren't derived from first principles.
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13 files changed

+259
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‎libclc/clc/include/clc/math/clc_ilogb.h‎

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//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef __CLC_MATH_CLC_ILOGB_H__
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#define __CLC_MATH_CLC_ILOGB_H__
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#define __CLC_FUNCTION __clc_ilogb
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#define __CLC_BODY <clc/math/unary_decl_with_int_return.inc>
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#include <clc/math/gentype.inc>
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#undef __CLC_FUNCTION
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#endif // __CLC_MATH_CLC_ILOGB_H__

‎libclc/clc/include/clc/math/clc_logb.h‎

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//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef __CLC_MATH_CLC_LOGB_H__
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#define __CLC_MATH_CLC_LOGB_H__
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#define __CLC_FUNCTION __clc_logb
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#define __CLC_BODY <clc/shared/unary_decl.inc>
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#include <clc/math/gentype.inc>
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#undef __CLC_FUNCTION
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#endif // __CLC_MATH_CLC_LOGB_H__

‎libclc/clc/include/clc/math/math.h‎

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@@ -52,6 +52,7 @@ bool __attribute__((noinline)) __clc_runtime_has_hw_fma32(void);
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#define INDEFBITPATT_SP32 0xffc00000
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#define PINFBITPATT_SP32 0x7f800000
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#define NINFBITPATT_SP32 0xff800000
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#define NUMEXPBITS_SP32 8
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#define EXPBIAS_SP32 127
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#define EXPSHIFTBITS_SP32 23
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#define BIASEDEMIN_SP32 1
@@ -62,6 +63,8 @@ bool __attribute__((noinline)) __clc_runtime_has_hw_fma32(void);
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#define MANTLENGTH_SP32 24
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#define BASEDIGITS_SP32 7
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#define LOG_MAGIC_NUM_SP32 (1 + NUMEXPBITS_SP32 - EXPBIAS_SP32)
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_CLC_OVERLOAD _CLC_INLINE float __clc_flush_denormal_if_not_supported(float x) {
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int ix = __clc_as_int(x);
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if (!__clc_fp32_subnormals_supported() && ((ix & EXPBITS_SP32) == 0) &&
@@ -86,6 +89,7 @@ _CLC_OVERLOAD _CLC_INLINE float __clc_flush_denormal_if_not_supported(float x) {
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#define INDEFBITPATT_DP64 0xfff8000000000000L
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#define PINFBITPATT_DP64 0x7ff0000000000000L
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#define NINFBITPATT_DP64 0xfff0000000000000L
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#define NUMEXPBITS_DP64 11
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#define EXPBIAS_DP64 1023
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#define EXPSHIFTBITS_DP64 52
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#define BIASEDEMIN_DP64 1
@@ -96,8 +100,26 @@ _CLC_OVERLOAD _CLC_INLINE float __clc_flush_denormal_if_not_supported(float x) {
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#define MANTLENGTH_DP64 53
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#define BASEDIGITS_DP64 15
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#define LOG_MAGIC_NUM_DP64 (1 + NUMEXPBITS_DP64 - EXPBIAS_DP64)
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#endif // cl_khr_fp64
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#ifdef cl_khr_fp16
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#define SIGNBIT_FP16 0x8000
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#define EXSIGNBIT_FP16 0x7fff
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#define EXPBITS_FP16 0x7c00
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#define MANTBITS_FP16 0x03ff
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#define PINFBITPATT_FP16 0x7c00
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#define NINFBITPATT_FP16 0xfc00
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#define NUMEXPBITS_FP16 5
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#define EXPBIAS_FP16 15
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#define EXPSHIFTBITS_FP16 10
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#define LOG_MAGIC_NUM_FP16 (1 + NUMEXPBITS_FP16 - EXPBIAS_FP16)
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#endif // cl_khr_fp16
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#define ALIGNED(x) __attribute__((aligned(x)))
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#endif // __CLC_MATH_MATH_H__

‎libclc/generic/include/clc/math/ilogb.inc‎ renamed to ‎libclc/clc/include/clc/math/unary_decl_with_int_return.inc‎

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@@ -6,4 +6,4 @@
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//
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//===----------------------------------------------------------------------===//
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_CLC_OVERLOAD _CLC_DECL __CLC_INTN ilogb(__CLC_GENTYPE x);
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_CLC_OVERLOAD _CLC_DECL __CLC_INTN __CLC_FUNCTION(__CLC_GENTYPE x);

‎libclc/clc/include/clc/math/unary_def_with_int_return.inc‎

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//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include <clc/utils.h>
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#ifndef __CLC_FUNCTION
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#define __CLC_FUNCTION(x) __CLC_CONCAT(__clc_, x)
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#endif
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_CLC_OVERLOAD _CLC_DEF __CLC_INTN FUNCTION(__CLC_GENTYPE a) {
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return __CLC_FUNCTION(FUNCTION)(a);
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}

‎libclc/clc/lib/generic/SOURCES‎

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@@ -69,13 +69,15 @@ math/clc_half_sin.cl
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math/clc_half_sqrt.cl
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math/clc_half_tan.cl
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math/clc_hypot.cl
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math/clc_ilogb.cl
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math/clc_ldexp.cl
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math/clc_lgamma.cl
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math/clc_lgamma_r.cl
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math/clc_log.cl
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math/clc_log10.cl
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math/clc_log1p.cl
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math/clc_log2.cl
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math/clc_logb.cl
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math/clc_mad.cl
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math/clc_maxmag.cl
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math/clc_minmag.cl

‎libclc/clc/lib/generic/math/clc_ilogb.cl‎

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//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include <clc/clc_convert.h>
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#include <clc/clcmacro.h>
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#include <clc/float/definitions.h>
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#include <clc/integer/clc_clz.h>
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#include <clc/internal/clc.h>
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#include <clc/math/math.h>
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#define __CLC_BODY <clc_ilogb.inc>
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#include <clc/math/gentype.inc>

‎libclc/clc/lib/generic/math/clc_ilogb.inc‎

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//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#if __CLC_FPSIZE == 32
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_CLC_OVERLOAD _CLC_DEF __CLC_INTN __clc_ilogb(__CLC_GENTYPE x) {
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__CLC_UINTN ux = __CLC_AS_UINTN(x);
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__CLC_UINTN ax = ux & EXSIGNBIT_SP32;
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__CLC_INTN rs = (__CLC_INTN)LOG_MAGIC_NUM_SP32 -
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__CLC_AS_INTN(__clc_clz(ux & MANTBITS_SP32));
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__CLC_INTN r = __CLC_AS_INTN(ax >> EXPSHIFTBITS_SP32) - EXPBIAS_SP32;
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r = ax < 0x00800000U ? rs : r;
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r = ax == 0 ? FP_ILOGB0 : r;
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// We could merge those 2 tests and have:
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//
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// r = ax >= EXPBITS_SP32 ? 0x7fffffff : r
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//
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// since FP_ILOGBNAN is set to INT_MAX, but it's clearer this way and
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// FP_ILOGBNAN can change without requiring changes to __clc_ilogb() code.
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r = ax > EXPBITS_SP32 ? FP_ILOGBNAN : r;
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r = ax == EXPBITS_SP32 ? 0x7fffffff : r;
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return r;
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}
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#endif
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#if __CLC_FPSIZE == 64
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_CLC_OVERLOAD _CLC_DEF __CLC_INTN __clc_ilogb(__CLC_GENTYPE x) {
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__CLC_ULONGN ux = __CLC_AS_ULONGN(x);
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__CLC_ULONGN ax = ux & ~SIGNBIT_DP64;
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__CLC_INTN rs = (__CLC_INTN)LOG_MAGIC_NUM_DP64 -
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__CLC_CONVERT_INTN(__clc_clz(ax & MANTBITS_DP64));
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__CLC_INTN r = __CLC_CONVERT_INTN(ax >> EXPSHIFTBITS_DP64) - EXPBIAS_DP64;
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r = __CLC_CONVERT_INTN(ax < 0x0010000000000000UL) ? rs : r;
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r = __CLC_CONVERT_INTN(ax == 0UL) ? (__CLC_INTN)FP_ILOGB0 : r;
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// We could merge those 2 tests and have:
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//
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// r = ax >= 0x7ff0000000000000UL ? 0x7fffffff : r
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//
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// since FP_ILOGBNAN is set to INT_MAX, but it's clearer this way and
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// FP_ILOGBNAN can change without requiring changes to __clc_ilogb() code.
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r = __CLC_CONVERT_INTN(ax > 0x7ff0000000000000UL) ? FP_ILOGBNAN : r;
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r = __CLC_CONVERT_INTN(ax == 0x7ff0000000000000UL) ? 0x7fffffff : r;
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return r;
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}
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#endif
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#if __CLC_FPSIZE == 16
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_CLC_OVERLOAD _CLC_DEF __CLC_INTN __clc_ilogb(__CLC_GENTYPE x) {
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__CLC_USHORTN ux = __CLC_AS_USHORTN(x);
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__CLC_USHORTN ax = ux & (__CLC_USHORTN)EXSIGNBIT_FP16;
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__CLC_USHORTN mantx = ux & (__CLC_USHORTN)MANTBITS_FP16;
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__CLC_INTN rs =
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(__CLC_INTN)LOG_MAGIC_NUM_FP16 - __CLC_CONVERT_INTN(__clc_clz(mantx));
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__CLC_INTN r =
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__CLC_CONVERT_INTN(ax >> (__CLC_USHORTN)EXPSHIFTBITS_FP16) - EXPBIAS_FP16;
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r = __CLC_CONVERT_INTN(ax < (__CLC_USHORTN)0x0400U) ? rs : r;
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r = __CLC_CONVERT_INTN(ax == (__CLC_USHORTN)0) ? (__CLC_INTN)FP_ILOGB0 : r;
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// We could merge those 2 tests and have:
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//
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// r = ax >= EXPBITS_FP16 ? 0x7fffffff : r
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//
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// since FP_ILOGBNAN is set to INT_MAX, but it's clearer this way and
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// FP_ILOGBNAN can change without requiring changes to __clc_ilogb() code.
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r = __CLC_CONVERT_INTN(ax > (__CLC_USHORTN)EXPBITS_FP16) ? FP_ILOGBNAN : r;
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r = __CLC_CONVERT_INTN(ax == (__CLC_USHORTN)EXPBITS_FP16) ? 0x7fffffff : r;
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return r;
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}
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#endif

‎libclc/clc/lib/generic/math/clc_logb.cl‎

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//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include <clc/clc_convert.h>
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#include <clc/clcmacro.h>
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#include <clc/float/definitions.h>
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#include <clc/integer/clc_clz.h>
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#include <clc/internal/clc.h>
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#include <clc/math/math.h>
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#define __CLC_BODY <clc_logb.inc>
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#include <clc/math/gentype.inc>

‎libclc/clc/lib/generic/math/clc_logb.inc‎

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//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#if __CLC_FPSIZE == 32
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_CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE __clc_logb(__CLC_GENTYPE x) {
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__CLC_INTN ax = __CLC_AS_INTN(x) & EXSIGNBIT_SP32;
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__CLC_GENTYPE s = __CLC_CONVERT_GENTYPE(LOG_MAGIC_NUM_SP32 - __clc_clz(ax));
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__CLC_GENTYPE r =
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__CLC_CONVERT_GENTYPE((ax >> EXPSHIFTBITS_SP32) - EXPBIAS_SP32);
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r = ax >= PINFBITPATT_SP32 ? __CLC_AS_GENTYPE(ax) : r;
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r = ax < 0x00800000 ? s : r;
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r = ax == 0 ? __CLC_AS_GENTYPE((__CLC_INTN)NINFBITPATT_SP32) : r;
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return r;
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}
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#endif
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#if __CLC_FPSIZE == 64
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_CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE __clc_logb(__CLC_GENTYPE x) {
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__CLC_LONGN ax = __CLC_AS_LONGN(x) & EXSIGNBIT_DP64;
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__CLC_GENTYPE s = __CLC_CONVERT_GENTYPE(LOG_MAGIC_NUM_DP64 - __clc_clz(ax));
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__CLC_GENTYPE r =
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__CLC_CONVERT_GENTYPE((ax >> EXPSHIFTBITS_DP64) - EXPBIAS_DP64);
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r = ax >= PINFBITPATT_DP64 ? __CLC_AS_GENTYPE(ax) : r;
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r = ax < 0x0010000000000000L ? s : r;
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r = ax == 0L ? __CLC_AS_GENTYPE((__CLC_LONGN)NINFBITPATT_DP64) : r;
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return r;
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}
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#endif
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#if __CLC_FPSIZE == 16
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_CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE __clc_logb(__CLC_GENTYPE x) {
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__CLC_SHORTN ax = __CLC_AS_SHORTN(x) & (__CLC_SHORTN)EXSIGNBIT_FP16;
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__CLC_GENTYPE s = __CLC_CONVERT_GENTYPE((__CLC_SHORTN)LOG_MAGIC_NUM_FP16 -
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(__CLC_SHORTN)__clc_clz(ax));
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__CLC_GENTYPE r = __CLC_CONVERT_GENTYPE(
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(ax >> (__CLC_SHORTN)EXPSHIFTBITS_FP16) - (__CLC_SHORTN)EXPBIAS_FP16);
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r = ax >= (__CLC_SHORTN)PINFBITPATT_FP16 ? __CLC_AS_GENTYPE(ax) : r;
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r = ax < (__CLC_SHORTN)0x0400 ? s : r;
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r = ax == (__CLC_SHORTN)0 ? __CLC_AS_GENTYPE((__CLC_SHORTN)NINFBITPATT_FP16)
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: r;
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return r;
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}
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#endif

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