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[SOL] Run simplifyswitch pass for SBF (#153)
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4 files changed

+121
-1
lines changed

4 files changed

+121
-1
lines changed

llvm/lib/Target/SBF/SBFTargetMachine.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -118,7 +118,9 @@ void SBFTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
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});
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PB.registerPeepholeEPCallback([=](FunctionPassManager &FPM,
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OptimizationLevel Level) {
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FPM.addPass(SimplifyCFGPass(SimplifyCFGOptions().hoistCommonInsts(true)));
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FPM.addPass(SimplifyCFGPass(
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SimplifyCFGOptions().hoistCommonInsts(true).convertSwitchToLookupTable(
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true)));
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});
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}
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llvm/lib/Target/SBF/SBFTargetTransformInfo.h

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -44,6 +44,16 @@ class SBFTTIImpl : public BasicTTIImplBase<SBFTTIImpl> {
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return TTI::TCC_Basic;
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}
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bool shouldBuildLookupTables() const {
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return true;
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}
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bool shouldBuildRelLookupTables() const {
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// Relational lookup tables are not working for SBF, since the offset
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// calculation is not implemented.
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return false;
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}
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4757
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
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CmpInst::Predicate VecPred,
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TTI::TargetCostKind CostKind,
Lines changed: 60 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,60 @@
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; RUN: opt -march=sbf -O2 -S < %s | FileCheck %s
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target datalayout = "e-m:e-p:64:64-i64:64-n32:64-S128"
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@alloc_a095982df5ef6fa38482490385e9df9c = private unnamed_addr constant <{ [11 x i8] }> <{ [11 x i8] c"Invalid num" }>, align 1
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@alloc_a85d045283da191190505c6c52c35e47 = private unnamed_addr constant <{ ptr, [8 x i8] }> <{ ptr @alloc_a095982df5ef6fa38482490385e9df9c, [8 x i8] c"\0B\00\00\00\00\00\00\00" }>, align 8
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@alloc_f5ffd2fd1476bab43ad89fb40c72d0c5 = private unnamed_addr constant <{ [10 x i8] }> <{ [10 x i8] c"src/lib.rs" }>, align 1
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@alloc_2c31b023ec05614e5709d58aa57c990b = private unnamed_addr constant <{ ptr, [16 x i8] }> <{ ptr @alloc_f5ffd2fd1476bab43ad89fb40c72d0c5, [16 x i8] c"\0A\00\00\00\00\00\00\00\0E\00\00\00\12\00\00\00" }>, align 8
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@do_that = unnamed_addr alias i8 (i64), ptr @"_ZN68_$LT$rust_test..MyEnum$u20$as$u20$core..convert..From$LT$u64$GT$$GT$4from17hd15e70d09a9b53c5E"
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; <rust_test::MyEnum as core::convert::From<u64>>::from
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; Function Attrs: nounwind
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define hidden noundef range(i8 0, 3) i8 @"_ZN68_$LT$rust_test..MyEnum$u20$as$u20$core..convert..From$LT$u64$GT$$GT$4from17hd15e70d09a9b53c5E"(i64 noundef %num) unnamed_addr {
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start:
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%_3 = alloca [48 x i8], align 8
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switch i64 %num, label %bb1 [
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i64 1, label %bb5
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i64 2, label %bb3
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i64 3, label %bb2
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]
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; Verifies we are simplifying the switch. In this case, we should expect the index to be '%num - 1'
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; CHECK-NOT: switch i64 %num
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; CHECK: %switch.tableidx = add i64 %num, -1
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; CHECK: %0 = icmp ult i64 %switch.tableidx, 3
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; CHECK: br i1 %0, label %switch.lookup, label %bb1
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bb1: ; preds = %start
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call void @llvm.lifetime.start.p0(i64 48, ptr nonnull %_3)
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store ptr @alloc_a85d045283da191190505c6c52c35e47, ptr %_3, align 8
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%0 = getelementptr inbounds i8, ptr %_3, i64 8
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store i64 1, ptr %0, align 8
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%1 = getelementptr inbounds i8, ptr %_3, i64 32
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store ptr null, ptr %1, align 8
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%2 = getelementptr inbounds i8, ptr %_3, i64 16
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store ptr inttoptr (i64 8 to ptr), ptr %2, align 8
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%3 = getelementptr inbounds i8, ptr %_3, i64 24
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store i64 0, ptr %3, align 8
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; call core::panicking::panic_fmt
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call void @_ZN4core9panicking9panic_fmt17ha4a6c4ba8141afc1E(ptr noalias nocapture noundef nonnull readonly align 8 dereferenceable(48) %_3, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @alloc_2c31b023ec05614e5709d58aa57c990b)
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unreachable
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bb3: ; preds = %start
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br label %bb5
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bb2: ; preds = %start
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br label %bb5
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bb5: ; preds = %start, %bb2, %bb3
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%_0.sroa.0.0 = phi i8 [ 2, %bb2 ], [ 1, %bb3 ], [ 0, %start ]
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ret i8 %_0.sroa.0.0
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}
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; core::panicking::panic_fmt
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; Function Attrs: cold noinline noreturn nounwind
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declare void @_ZN4core9panicking9panic_fmt17ha4a6c4ba8141afc1E(ptr noalias nocapture noundef readonly align 8 dereferenceable(48), ptr noalias noundef readonly align 8 dereferenceable(24)) unnamed_addr
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; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
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declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
Lines changed: 48 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,48 @@
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; RUN: opt -O2 -S < %s | FileCheck %s
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; ModuleID = 'rust_test.ae01a02caa2566bf-cgu.0'
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source_filename = "rust_test.ae01a02caa2566bf-cgu.0"
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target datalayout = "e-m:e-p:64:64-i64:64-n32:64-S128"
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target triple = "sbf"
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@alloc_e813fda33c33e38665803c55f01a1a57 = private unnamed_addr constant <{ [3 x i8] }> <{ [3 x i8] c"One" }>, align 1
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@alloc_da1d77dfe6c47b0702ad778dd22ebff8 = private unnamed_addr constant <{ [3 x i8] }> <{ [3 x i8] c"Two" }>, align 1
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@alloc_460442126579dd15a4cc4f66a722a171 = private unnamed_addr constant <{ [5 x i8] }> <{ [5 x i8] c"Three" }>, align 1
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; We do not want the relative lookup table to be here
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; CHECK-NOT: private unnamed_addr constant [3 x i32] [i32 trunc (i64 sub (i64 ptrtoint
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; CHECK: private unnamed_addr constant [3 x ptr]
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; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
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define { ptr, i64 } @do_this(i8 noundef range(i8 0, 3) %0) unnamed_addr #0 {
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start:
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switch i8 %0, label %default.unreachable [
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i8 0, label %bb1
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i8 1, label %bb4
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i8 2, label %bb3
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]
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default.unreachable: ; preds = %start
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unreachable
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bb4: ; preds = %start
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br label %bb1
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bb3: ; preds = %start
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br label %bb1
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bb1: ; preds = %start, %bb3, %bb4
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%_0.sroa.0.0 = phi ptr [ @alloc_460442126579dd15a4cc4f66a722a171, %bb3 ], [ @alloc_da1d77dfe6c47b0702ad778dd22ebff8, %bb4 ], [ @alloc_e813fda33c33e38665803c55f01a1a57, %start ]
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%_0.sroa.4.0 = phi i64 [ 5, %bb3 ], [ 3, %bb4 ], [ 3, %start ]
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%1 = insertvalue { ptr, i64 } poison, ptr %_0.sroa.0.0, 0
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%2 = insertvalue { ptr, i64 } %1, i64 %_0.sroa.4.0, 1
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ret { ptr, i64 } %2
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}
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attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) "target-cpu"="generic" "target-features"="+store-imm,+jmp-ext" }
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!llvm.module.flags = !{!0}
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!llvm.ident = !{!1}
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!0 = !{i32 8, !"PIC Level", i32 2}
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!1 = !{!"rustc version 1.84.1-dev"}

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