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[AArch64] Correct am_indexed used in bitcast loadext patterns. (llvm#164588)
The i8 versions were using the wrong index modes, we didn't have enough test cases.
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+33
-42
lines changed

2 files changed

+33
-42
lines changed

‎llvm/lib/Target/AArch64/AArch64InstrInfo.td‎

Lines changed: 10 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -4005,24 +4005,20 @@ def : Pat<(i64 (zextloadi32 (am_indexed32 GPR64sp:$Rn, uimm12s4:$offset))),
40054005
(SUBREG_TO_REG (i64 0), (LDRWui GPR64sp:$Rn, uimm12s4:$offset), sub_32)>;
40064006

40074007
// load zero-extended i32, bitcast to f64
4008-
def : Pat <(f64 (bitconvert (i64 (zextloadi32 (am_indexed32 GPR64sp:$Rn, uimm12s4:$offset))))),
4009-
(SUBREG_TO_REG (i64 0), (LDRSui GPR64sp:$Rn, uimm12s4:$offset), ssub)>;
4010-
4008+
def : Pat<(f64 (bitconvert (i64 (zextloadi32 (am_indexed32 GPR64sp:$Rn, uimm12s4:$offset))))),
4009+
(SUBREG_TO_REG (i64 0), (LDRSui GPR64sp:$Rn, uimm12s4:$offset), ssub)>;
40114010
// load zero-extended i16, bitcast to f64
4012-
def : Pat <(f64 (bitconvert (i64 (zextloadi16 (am_indexed32 GPR64sp:$Rn, uimm12s2:$offset))))),
4013-
(SUBREG_TO_REG (i64 0), (LDRHui GPR64sp:$Rn, uimm12s2:$offset), hsub)>;
4014-
4011+
def : Pat<(f64 (bitconvert (i64 (zextloadi16 (am_indexed16 GPR64sp:$Rn, uimm12s2:$offset))))),
4012+
(SUBREG_TO_REG (i64 0), (LDRHui GPR64sp:$Rn, uimm12s2:$offset), hsub)>;
40154013
// load zero-extended i8, bitcast to f64
4016-
def : Pat <(f64 (bitconvert (i64 (zextloadi8 (am_indexed32 GPR64sp:$Rn, uimm12s1:$offset))))),
4017-
(SUBREG_TO_REG (i64 0), (LDRBui GPR64sp:$Rn, uimm12s1:$offset), bsub)>;
4018-
4014+
def : Pat<(f64 (bitconvert (i64 (zextloadi8 (am_indexed8 GPR64sp:$Rn, uimm12s1:$offset))))),
4015+
(SUBREG_TO_REG (i64 0), (LDRBui GPR64sp:$Rn, uimm12s1:$offset), bsub)>;
40194016
// load zero-extended i16, bitcast to f32
4020-
def : Pat <(f32 (bitconvert (i32 (zextloadi16 (am_indexed16 GPR64sp:$Rn, uimm12s2:$offset))))),
4021-
(SUBREG_TO_REG (i32 0), (LDRHui GPR64sp:$Rn, uimm12s2:$offset), hsub)>;
4022-
4017+
def : Pat<(f32 (bitconvert (i32 (zextloadi16 (am_indexed16 GPR64sp:$Rn, uimm12s2:$offset))))),
4018+
(SUBREG_TO_REG (i32 0), (LDRHui GPR64sp:$Rn, uimm12s2:$offset), hsub)>;
40234019
// load zero-extended i8, bitcast to f32
4024-
def : Pat <(f32 (bitconvert (i32 (zextloadi8 (am_indexed16 GPR64sp:$Rn, uimm12s1:$offset))))),
4025-
(SUBREG_TO_REG (i32 0), (LDRBui GPR64sp:$Rn, uimm12s1:$offset), bsub)>;
4020+
def : Pat<(f32 (bitconvert (i32 (zextloadi8 (am_indexed8 GPR64sp:$Rn, uimm12s1:$offset))))),
4021+
(SUBREG_TO_REG (i32 0), (LDRBui GPR64sp:$Rn, uimm12s1:$offset), bsub)>;
40264022

40274023
// Pre-fetch.
40284024
def PRFMui : PrefetchUI<0b11, 0, 0b10, "prfm",

‎llvm/test/CodeGen/AArch64/load-zext-bitcast.ll‎

Lines changed: 23 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -112,8 +112,7 @@ entry:
112112
define double @load_u64_from_u8_off1(ptr %n){
113113
; CHECK-LABEL: load_u64_from_u8_off1:
114114
; CHECK: // %bb.0: // %entry
115-
; CHECK-NEXT: ldrb w8, [x0, #1]
116-
; CHECK-NEXT: fmov d0, x8
115+
; CHECK-NEXT: ldr b0, [x0, #1]
117116
; CHECK-NEXT: ret
118117
entry:
119118
%p = getelementptr i8, ptr %n, i64 1
@@ -140,8 +139,7 @@ entry:
140139
define float @load_u32_from_u8_off1(ptr %n){
141140
; CHECK-LABEL: load_u32_from_u8_off1:
142141
; CHECK: // %bb.0: // %entry
143-
; CHECK-NEXT: ldrb w8, [x0, #1]
144-
; CHECK-NEXT: fmov s0, w8
142+
; CHECK-NEXT: ldr b0, [x0, #1]
145143
; CHECK-NEXT: ret
146144
entry:
147145
%p = getelementptr i8, ptr %n, i64 1
@@ -154,8 +152,7 @@ entry:
154152
define half @load_u16_from_u8_off1(ptr %n){
155153
; CHECK-LABEL: load_u16_from_u8_off1:
156154
; CHECK: // %bb.0: // %entry
157-
; CHECK-NEXT: ldrb w8, [x0, #1]
158-
; CHECK-NEXT: fmov s0, w8
155+
; CHECK-NEXT: ldr b0, [x0, #1]
159156
; CHECK-NEXT: // kill: def $h0 killed $h0 killed $s0
160157
; CHECK-NEXT: ret
161158
entry:
@@ -185,8 +182,7 @@ entry:
185182
define double @load_u64_from_u16_off2(ptr %n){
186183
; CHECK-LABEL: load_u64_from_u16_off2:
187184
; CHECK: // %bb.0: // %entry
188-
; CHECK-NEXT: ldrh w8, [x0, #2]
189-
; CHECK-NEXT: fmov d0, x8
185+
; CHECK-NEXT: ldr h0, [x0, #2]
190186
; CHECK-NEXT: ret
191187
entry:
192188
%p = getelementptr i8, ptr %n, i64 2
@@ -199,8 +195,7 @@ entry:
199195
define double @load_u64_from_u8_off2(ptr %n){
200196
; CHECK-LABEL: load_u64_from_u8_off2:
201197
; CHECK: // %bb.0: // %entry
202-
; CHECK-NEXT: ldrb w8, [x0, #2]
203-
; CHECK-NEXT: fmov d0, x8
198+
; CHECK-NEXT: ldr b0, [x0, #2]
204199
; CHECK-NEXT: ret
205200
entry:
206201
%p = getelementptr i8, ptr %n, i64 2
@@ -226,7 +221,7 @@ entry:
226221
define float @load_u32_from_u8_off2(ptr %n){
227222
; CHECK-LABEL: load_u32_from_u8_off2:
228223
; CHECK: // %bb.0: // %entry
229-
; CHECK-NEXT: ldr b0, [x0, #1]
224+
; CHECK-NEXT: ldr b0, [x0, #2]
230225
; CHECK-NEXT: ret
231226
entry:
232227
%p = getelementptr i8, ptr %n, i64 2
@@ -239,7 +234,7 @@ entry:
239234
define half @load_u16_from_u8_off2(ptr %n){
240235
; CHECK-LABEL: load_u16_from_u8_off2:
241236
; CHECK: // %bb.0: // %entry
242-
; CHECK-NEXT: ldr b0, [x0, #1]
237+
; CHECK-NEXT: ldr b0, [x0, #2]
243238
; CHECK-NEXT: // kill: def $h0 killed $h0 killed $s0
244239
; CHECK-NEXT: ret
245240
entry:
@@ -283,8 +278,7 @@ entry:
283278
define double @load_u64_from_u8_off255(ptr %n){
284279
; CHECK-LABEL: load_u64_from_u8_off255:
285280
; CHECK: // %bb.0: // %entry
286-
; CHECK-NEXT: ldrb w8, [x0, #255]
287-
; CHECK-NEXT: fmov d0, x8
281+
; CHECK-NEXT: ldr b0, [x0, #255]
288282
; CHECK-NEXT: ret
289283
entry:
290284
%p = getelementptr i8, ptr %n, i64 255
@@ -311,8 +305,7 @@ entry:
311305
define float @load_u32_from_u8_off255(ptr %n){
312306
; CHECK-LABEL: load_u32_from_u8_off255:
313307
; CHECK: // %bb.0: // %entry
314-
; CHECK-NEXT: ldrb w8, [x0, #255]
315-
; CHECK-NEXT: fmov s0, w8
308+
; CHECK-NEXT: ldr b0, [x0, #255]
316309
; CHECK-NEXT: ret
317310
entry:
318311
%p = getelementptr i8, ptr %n, i64 255
@@ -325,8 +318,7 @@ entry:
325318
define half @load_u16_from_u8_off255(ptr %n){
326319
; CHECK-LABEL: load_u16_from_u8_off255:
327320
; CHECK: // %bb.0: // %entry
328-
; CHECK-NEXT: ldrb w8, [x0, #255]
329-
; CHECK-NEXT: fmov s0, w8
321+
; CHECK-NEXT: ldr b0, [x0, #255]
330322
; CHECK-NEXT: // kill: def $h0 killed $h0 killed $s0
331323
; CHECK-NEXT: ret
332324
entry:
@@ -354,7 +346,7 @@ entry:
354346
define double @load_u64_from_u16_off256(ptr %n){
355347
; CHECK-LABEL: load_u64_from_u16_off256:
356348
; CHECK: // %bb.0: // %entry
357-
; CHECK-NEXT: ldr h0, [x0, #128]
349+
; CHECK-NEXT: ldr h0, [x0, #256]
358350
; CHECK-NEXT: ret
359351
entry:
360352
%p = getelementptr i8, ptr %n, i64 256
@@ -367,7 +359,7 @@ entry:
367359
define double @load_u64_from_u8_off256(ptr %n){
368360
; CHECK-LABEL: load_u64_from_u8_off256:
369361
; CHECK: // %bb.0: // %entry
370-
; CHECK-NEXT: ldr b0, [x0, #64]
362+
; CHECK-NEXT: ldr b0, [x0, #256]
371363
; CHECK-NEXT: ret
372364
entry:
373365
%p = getelementptr i8, ptr %n, i64 256
@@ -393,7 +385,7 @@ entry:
393385
define float @load_u32_from_u8_off256(ptr %n){
394386
; CHECK-LABEL: load_u32_from_u8_off256:
395387
; CHECK: // %bb.0: // %entry
396-
; CHECK-NEXT: ldr b0, [x0, #128]
388+
; CHECK-NEXT: ldr b0, [x0, #256]
397389
; CHECK-NEXT: ret
398390
entry:
399391
%p = getelementptr i8, ptr %n, i64 256
@@ -406,7 +398,7 @@ entry:
406398
define half @load_u16_from_u8_off256(ptr %n){
407399
; CHECK-LABEL: load_u16_from_u8_off256:
408400
; CHECK: // %bb.0: // %entry
409-
; CHECK-NEXT: ldr b0, [x0, #128]
401+
; CHECK-NEXT: ldr b0, [x0, #256]
410402
; CHECK-NEXT: // kill: def $h0 killed $h0 killed $s0
411403
; CHECK-NEXT: ret
412404
entry:
@@ -435,8 +427,7 @@ entry:
435427
define double @load_u64_from_u16_offn(ptr %n){
436428
; CHECK-LABEL: load_u64_from_u16_offn:
437429
; CHECK: // %bb.0: // %entry
438-
; CHECK-NEXT: mov w8, #8190 // =0x1ffe
439-
; CHECK-NEXT: ldr h0, [x0, x8]
430+
; CHECK-NEXT: ldr h0, [x0, #8190]
440431
; CHECK-NEXT: ret
441432
entry:
442433
%p = getelementptr i8, ptr %n, i64 8190
@@ -517,7 +508,8 @@ entry:
517508
define double @load_u64_from_u16_offnp1(ptr %n){
518509
; CHECK-LABEL: load_u64_from_u16_offnp1:
519510
; CHECK: // %bb.0: // %entry
520-
; CHECK-NEXT: ldr h0, [x0, #4096]
511+
; CHECK-NEXT: add x8, x0, #2, lsl #12 // =8192
512+
; CHECK-NEXT: ldr h0, [x8]
521513
; CHECK-NEXT: ret
522514
entry:
523515
%p = getelementptr i8, ptr %n, i64 8192
@@ -530,7 +522,8 @@ entry:
530522
define double @load_u64_from_u8_offnp1(ptr %n){
531523
; CHECK-LABEL: load_u64_from_u8_offnp1:
532524
; CHECK: // %bb.0: // %entry
533-
; CHECK-NEXT: ldr b0, [x0, #1024]
525+
; CHECK-NEXT: add x8, x0, #1, lsl #12 // =4096
526+
; CHECK-NEXT: ldr b0, [x8]
534527
; CHECK-NEXT: ret
535528
entry:
536529
%p = getelementptr i8, ptr %n, i64 4096
@@ -557,7 +550,8 @@ entry:
557550
define float @load_u32_from_u8_offnp1(ptr %n){
558551
; CHECK-LABEL: load_u32_from_u8_offnp1:
559552
; CHECK: // %bb.0: // %entry
560-
; CHECK-NEXT: ldr b0, [x0, #2048]
553+
; CHECK-NEXT: add x8, x0, #1, lsl #12 // =4096
554+
; CHECK-NEXT: ldr b0, [x8]
561555
; CHECK-NEXT: ret
562556
entry:
563557
%p = getelementptr i8, ptr %n, i64 4096
@@ -570,7 +564,8 @@ entry:
570564
define half @load_u16_from_u8_offnp1(ptr %n){
571565
; CHECK-LABEL: load_u16_from_u8_offnp1:
572566
; CHECK: // %bb.0: // %entry
573-
; CHECK-NEXT: ldr b0, [x0, #2048]
567+
; CHECK-NEXT: add x8, x0, #1, lsl #12 // =4096
568+
; CHECK-NEXT: ldr b0, [x8]
574569
; CHECK-NEXT: // kill: def $h0 killed $h0 killed $s0
575570
; CHECK-NEXT: ret
576571
entry:

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