Commit 56930e0
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[Backend][Relax] Add NPU BYOC backend tutorial with architectural concepts
This commit introduces a vendor-neutral NPU backend that demonstrates
architectural patterns common across Neural Processing Units.
The implementation covers key NPU concepts including multi-tier memory
hierarchy management, automatic tiling for large tensors, quantization
handling, and specialized execution engines. It shows how NPUs manage
memory across different tiers (L0/L1/L2/L3), tile operations to fit
in on-chip SRAM, and dispatch operations to dedicated compute units.
This serves as an educational template for developers creating NPU
backends, demonstrating BYOC integration while teaching NPU-specific
optimization strategies. Uses CPU emulation for testing without
requiring actual NPU hardware.
Addresses feedback from #18201 requesting generic NPU BYOC tutorials.1 parent 5feed58 commit 56930e0
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lines changed- python/tvm/relax/backend/contrib/example_npu
- src/runtime/contrib/example_npu
- tests/python/relax
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