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boards/tiliqua_r5: rename tiliqua (was r2) to tiliqua_r5 and update pinmaps
1 parent 71fb640 commit ddb9aa9

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5 files changed

+47
-36
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5 files changed

+47
-36
lines changed

gateware/boards/tiliqua/pinmap.lpf

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This file was deleted.
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@@ -1,16 +1,16 @@
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PROJ = top
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3-
DEVICE = 45k
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DEVICE = 25k
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PACKAGE = CABGA256
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SPEEDGRADE = 7
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PIN_DEF = ./boards/tiliqua/pinmap.lpf
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PIN_DEF = ./boards/tiliqua_r5/pinmap.lpf
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# UART: 115200 baud as RP2040 CDC converter assumes this.
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ADD_DEFINES = -DSELECTED_DSP_CORE=$(CORE) -DINVERT_BUTTON=1 -DDEBUG_UART_CLKDIV=104
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ADD_DEFINES = -DSELECTED_DSP_CORE=$(CORE) -DINVERT_BUTTON=1 -DDEBUG_UART_CLKDIV=104 -DPDN_CLK=1
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include ./mk/common.mk
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include ./mk/ecp5.mk
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ADD_SRC = boards/tiliqua/sysmgr.v \
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ADD_SRC = boards/tiliqua_r5/sysmgr.v \
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$(SRC_COMMON)
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prog: $(BUILD)/$(PROJ).bin
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SYSCONFIG COMPRESS_CONFIG=ON;
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LOCATE COMP "CLK" SITE "A8";
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IOBUF PORT "CLK" IO_TYPE=LVCMOS33;
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FREQUENCY PORT "CLK" 48 MHZ;
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# These pads are to the eurorack-pmod 'backpack' FFC.
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LOCATE COMP "PMOD_MCLK" SITE "C15";
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LOCATE COMP "PMOD_PDN" SITE "A15";
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LOCATE COMP "PMOD_I2C_SDA" SITE "C16";
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LOCATE COMP "PMOD_I2C_SCL" SITE "B16";
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LOCATE COMP "PMOD_SDIN1" SITE "D7";
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LOCATE COMP "PMOD_SDOUT1" SITE "C9";
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LOCATE COMP "PMOD_LRCK" SITE "C10";
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LOCATE COMP "PMOD_BICK" SITE "D9";
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LOCATE COMP "FFC_PDN_CLK" SITE "C12";
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IOBUF PORT "PMOD_MCLK" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=8;
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IOBUF PORT "PMOD_PDN" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=8;
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IOBUF PORT "PMOD_I2C_SDA" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=8;
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IOBUF PORT "PMOD_I2C_SCL" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=8;
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IOBUF PORT "PMOD_SDIN1" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=8;
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IOBUF PORT "PMOD_SDOUT1" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=8;
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IOBUF PORT "PMOD_LRCK" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=8;
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IOBUF PORT "PMOD_BICK" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=8;
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IOBUF PORT "FFC_PDN_CLK" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=8;
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# This is the Tiliqua encoder switch.
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LOCATE COMP "RESET_BUTTON" SITE "A6";
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IOBUF PORT "RESET_BUTTON" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
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# This is connected to the Tiliqua RP2040 debugger.
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LOCATE COMP "UART_TX" SITE "B4";
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IOBUF PORT "UART_TX" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;

gateware/top.sv

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@@ -20,6 +20,11 @@ module top #(
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input PMOD_SDOUT1,
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output PMOD_PDN,
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output PMOD_MCLK,
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`ifdef PDN_CLK
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// Tiliqua platform has a D-flip-flop on PDN for muting
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// This must be clocked on this platform.
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output FFC_PDN_CLK,
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`endif
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// Button used for reset and output cal. Assumed momentary, pressed == HIGH.
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// You can use any random PMOD that has a button on it.
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input RESET_BUTTON,
@@ -178,6 +183,10 @@ SB_IO #(.PIN_TYPE(6'b000000)) sb_io_sdout1 (
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`endif
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`endif
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`ifdef PDN_CLK
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assign FFC_PDN_CLK = pmod_lrck_int;
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`endif
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eurorack_pmod #(
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.W(W)
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) eurorack_pmod1 (

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