[feat] seperate return_run_guest and dispatch_irq, retroduce AxVCpuHal trait

Author: hky1999

Cargo.toml

@@ -16,7 +16,4 @@ percpu = "0.1.4"
 crate_interface = "0.1"
 
 axaddrspace = { git = "https://github.com/arceos-hypervisor/axaddrspace.git" }
-axvcpu = { git = "https://github.com/arceos-hypervisor/axvcpu.git" }
-
-[patch."https://github.com/arceos-hypervisor/axvcpu.git"]
-axvcpu = { path = "../axvcpu" }
+axvcpu = { git = "https://github.com/arceos-hypervisor/axvcpu.git", branch = "axvcpuhal" }

src/context_frame.rs

@@ -5,21 +5,22 @@ use aarch64_cpu::registers::*;
 
 /// A struct representing the AArch64 CPU context frame.
 ///
-/// This context frame includes the general-purpose registers (GPRs),
-/// the stack pointer (SP), the exception link register (ELR), and
-/// the saved program status register (SPSR).
+/// This context frame includes
+/// * the general-purpose registers (GPRs),
+/// * the stack pointer associated with EL0 (SP_EL0),
+/// * the exception link register (ELR),
+/// * the saved program status register (SPSR).
 ///
 /// The `#[repr(C)]` attribute ensures that the struct has a C-compatible
 /// memory layout, which is important when interfacing with hardware or
 /// other low-level components.
 #[repr(C)]
-#[derive(Copy, Clone, Debug, Default)]
+#[derive(Copy, Clone, Debug)]
 pub struct Aarch64ContextFrame {
     /// An array of 31 `u64` values representing the general-purpose registers.
     pub gpr: [u64; 31],
-    /// The stack pointer.
-    /// The value currently stored in this field is meaningless (the base address of Aarch64ContextFrame).
-    pub sp: u64,
+    /// The stack pointer associated with EL0 (SP_EL0)
+    pub sp_el0: u64,
     /// The exception link register, which stores the return address after an exception.
     pub elr: u64,
     /// The saved program status register, which holds the state of the program at the time of an exception.
@@ -37,16 +38,16 @@ impl core::fmt::Display for Aarch64ContextFrame {
         }
         writeln!(f, "spsr:{:016x}", self.spsr)?;
         write!(f, "elr: {:016x}", self.elr)?;
-        writeln!(f, "   sp:  {:016x}", self.sp)?;
+        writeln!(f, "   sp_el0:  {:016x}", self.sp_el0)?;
         Ok(())
     }
 }
 
-impl Aarch64ContextFrame {
+impl Default for Aarch64ContextFrame {
     /// Returns the default context frame.
     ///
     /// The default state sets the SPSR to mask all exceptions and sets the mode to EL1h.
-    pub fn default() -> Aarch64ContextFrame {
+    fn default() -> Self {
         Aarch64ContextFrame {
             gpr: [0; 31],
             spsr: (SPSR_EL1::M::EL1h
@@ -56,34 +57,12 @@ impl Aarch64ContextFrame {
                 + SPSR_EL1::D::Masked)
                 .value,
             elr: 0,
-            sp: 0,
+            sp_el0: 0,
         }
     }
+}
 
-    /// Creates a new context frame with a specific program counter, stack pointer, and argument.
-    ///
-    /// Sets the SPSR to mask all exceptions and sets the mode to EL1h by default.
-    /// # Arguments
-    ///
-    /// * `pc` - The initial program counter (PC).
-    /// * `sp` - The initial stack pointer (SP).
-    /// * `arg` - The argument to be passed in register x0.
-    pub fn new(pc: usize, sp: usize, arg: usize) -> Self {
-        let mut r = Aarch64ContextFrame {
-            gpr: [0; 31],
-            spsr: (SPSR_EL1::M::EL1h
-                + SPSR_EL1::I::Masked
-                + SPSR_EL1::F::Masked
-                + SPSR_EL1::A::Masked
-                + SPSR_EL1::D::Masked)
-                .value,
-            elr: pc as u64,
-            sp: sp as u64,
-        };
-        r.set_argument(arg);
-        r
-    }
-
+impl Aarch64ContextFrame {
     /// Returns the exception program counter (ELR).
     pub fn exception_pc(&self) -> usize {
         self.elr as usize
@@ -98,23 +77,6 @@ impl Aarch64ContextFrame {
         self.elr = pc as u64;
     }
 
-    /// Returns the stack pointer (SP).
-    /// Note: currently returned value is meaningless.
-    pub fn stack_pointer(&self) -> usize {
-        self.sp as usize
-    }
-
-    /// Sets the stack pointer (SP).
-    ///
-    /// Note: currently useless.
-    ///
-    /// # Arguments
-    ///
-    /// * `sp` - The new stack pointer value.
-    pub fn set_stack_pointer(&mut self, sp: usize) {
-        self.sp = sp as u64;
-    }
-
     /// Sets the argument in register x0.
     ///
     /// # Arguments
@@ -200,7 +162,7 @@ pub struct GuestSystemRegisters {
     pub vmpidr_el2: u64,
 
     // 64bit EL1/EL0 register
-    sp_el0: u64,
+    pub sp_el0: u64,
     sp_el1: u64,
     elr_el1: u64,
     spsr_el1: u32,
@@ -300,7 +262,9 @@ impl GuestSystemRegisters {
         asm!("msr CNTV_CVAL_EL0, {0}", in(reg) self.cntv_cval_el0);
         asm!("msr CNTKCTL_EL1, {0:x}", in (reg) self.cntkctl_el1);
         asm!("msr CNTV_CTL_EL0, {0:x}", in (reg) self.cntv_ctl_el0);
-        asm!("msr SP_EL0, {0}", in(reg) self.sp_el0);
+        // The restoration of SP_EL0 is done in `exception_return_el2`,
+        // which move the value from `self.ctx.sp_el0` to `SP_EL0`.
+        // asm!("msr SP_EL0, {0}", in(reg) self.sp_el0);
         asm!("msr SP_EL1, {0}", in(reg) self.sp_el1);
         asm!("msr ELR_EL1, {0}", in(reg) self.elr_el1);
         asm!("msr SPSR_EL1, {0:x}", in(reg) self.spsr_el1);

src/entry.S

@@ -1,6 +1,8 @@
 .macro SAVE_REGS_FROM_EL1
+    # Curretly `sp` points to the address of `Aarch64VCpu.host_stack_top`.
+    sub     sp, sp, 34 * 8
     # Curretly `sp` points to the base address of `Aarch64VCpu.ctx`, which stores guest's `TrapFrame`.
-    
+
     # Save general purpose registers into `Aarch64VCpu.ctx`
     stp     x0, x1, [sp]
     stp     x2, x3, [sp, 2 * 8]
@@ -18,9 +20,7 @@
     stp     x26, x27, [sp, 26 * 8]
     stp     x28, x29, [sp, 28 * 8]
 
-    # The value currently stored in `sp` is unused, (the base address of Aarch64ContextFrame).
-    mov     x9, sp
-    add     x9, x9, #(0x110)
+    mrs     x9, sp_el0
     stp     x30, x9, [sp, 30 * 8]
 
     # Save `elr_el2` and `spsr_el2` into `Aarch64VCpu.ctx`
@@ -29,17 +29,13 @@
     stp     x10, x11, [sp, 32 * 8]
 .endm
 
-# Same as `context_vm_entry` in `src/entry.S`
 .macro RESTORE_REGS_INTO_EL1
     ldp     x10, x11, [sp, 32 * 8]
+    ldp     x30, x9, [sp, 30 * 8]
+    msr     sp_el0, x9
     msr     elr_el2, x10
     msr     spsr_el2, x11
 
-    ldr     x10,      [sp, 31 * 8]
-    mrs     x11, sp_el0
-    msr     sp_el0, x10
-    str     x11,      [sp, 31 * 8]
-
     ldr     x30,      [sp, 30 * 8]
     ldp     x28, x29, [sp, 28 * 8]
     ldp     x26, x27, [sp, 26 * 8]
@@ -56,7 +52,9 @@
     ldp     x4, x5, [sp, 4 * 8]
     ldp     x2, x3, [sp, 2 * 8]
     ldp     x0, x1, [sp]
-    # Keep `sp` as the base address of `Aarch64VCpu.ctx`
+    # Curretly `sp` points to the base address of `Aarch64VCpu.ctx`
+    add     sp, sp, 34 * 8
+     # Curretly `x0` points to the address of `Aarch64VCpu.host_stack_top`.
 .endm
 
 
@@ -75,13 +73,15 @@
     SAVE_REGS_FROM_EL1
     mov    x0, {exception_irq}
     bl     vmexit_trampoline
+    # b .Lexception_return_el2 is called by `vmexit_trampoline`
 .endm
 
 .macro HANDLE_LOWER_SYNC_VCPU
 .p2align 7
     SAVE_REGS_FROM_EL1
     mov    x0, {exception_sync}
     bl     vmexit_trampoline
+    # b .Lexception_return_el2 is called by `vmexit_trampoline`
 .endm
 
 
@@ -113,6 +113,12 @@ exception_vector_base_vcpu:
     INVALID_EXCP_EL2 2 3
     INVALID_EXCP_EL2 3 3
 
+.global context_vm_entry
+context_vm_entry:
+    # Curretly `x0` points to the address of `Aarch64VCpu.host_stack_top`.
+    mov     sp, x0
+    sub     sp, sp, 34 * 8
+    # Curretly `sp` points to the base address of `Aarch64VCpu.ctx`, which stores guest's `TrapFrame`.
 .Lexception_return_el2:
     RESTORE_REGS_INTO_EL1
     eret

src/exception.S

@@ -45,35 +45,6 @@ core::arch::global_asm!(
     exception_irq = const EXCEPTION_IRQ,
 );
 
-/// Handles IRQ (Interrupt Request) exceptions that occur during the execution of a guest VM.
-///
-/// This function is responsible for processing external interrupts.
-///
-/// # Arguments
-///
-/// * `_ctx` - A mutable reference to the `TrapFrame`, which contains the saved state of the
-///            guest VM's CPU registers at the time of the exception. This is currently unused
-///            but included for future expansion.
-///
-/// # Returns
-///
-/// An `AxResult` containing an `AxVCpuExitReason` with the reason for the VM exit.
-///
-/// # TODO
-///
-/// - Implement proper handling of both current and lower EL IRQs.
-/// - Replace the temporary vector `33` with the actual interrupt vector once the
-///   full implementation is complete.
-///
-/// # Notes
-///
-/// This function is a placeholder and should be expanded to fully support IRQ handling
-/// in future iterations.
-///
-pub fn handle_exception_irq(_ctx: &mut TrapFrame) -> AxResult<AxVCpuExitReason> {
-    Ok(AxVCpuExitReason::ExternalInterrupt { vector: 33 })
-}
-
 /// Handles synchronous exceptions that occur during the execution of a guest VM.
 ///
 /// This function examines the exception class (EC) to determine the cause of the exception
@@ -251,15 +222,23 @@ fn dispatch_irq() {
 /// 2. **Dispatch IRQ:**
 ///   - If there is no active vcpu running, the `dispatch_irq` function is called to handle the IRQ,
 ///     which will dispatch this irq routine to the underlining host OS.
+///   - The IRQ handling routine will end up calling `exception_return_el2` here.
 ///
+/// Note that the `return_run_guest` will never return.
 #[naked]
 #[no_mangle]
 unsafe extern "C" fn vmexit_trampoline() {
     core::arch::asm!(
         "bl {vcpu_running}", // Check if vcpu is running.
-        "cbnz x0, {return_run_guest}", // If vcpu_running returns true, jump to `return_run_guest`.
+        // If vcpu_running returns true, jump to `return_run_guest`,
+        // after that the control flow is handed back to Aarch64VCpu.run(),
+        // simulating the normal return of the `run_guest` function.
+        "cbnz x0, {return_run_guest}",
+        // If vcpu_running returns false, there is no active vcpu running,
+        // jump to `dispatch_irq`.
         "bl {dispatch_irq}",
-        "ret", // Control flow is handed back to Aarch64VCpu.run(), simulating the normal return of the `run_guest` function.
+        // Return from exception.
+        "b  .Lexception_return_el2",
         vcpu_running = sym crate::vcpu::vcpu_running,
         return_run_guest = sym return_run_guest,
         dispatch_irq = sym dispatch_irq,
@@ -304,12 +283,13 @@ unsafe extern "C" fn vmexit_trampoline() {
 ///   invoked as part of the low-level hypervisor or VM exit handling routines.
 #[naked]
 #[no_mangle]
-unsafe extern "C" fn return_run_guest() {
+unsafe extern "C" fn return_run_guest() -> ! {
     core::arch::asm!(
-        "add sp, sp, 34 * 8",       // Skip the exception frame.
-        "mov x9, sp", // Currently `sp` points to `&Aarch64VCpu.host_stack_top`, see `run_guest()` in vcpu.rs.
+        // Curretly `sp` points to the base address of `Aarch64VCpu.ctx`, which stores guest's `TrapFrame`.
+        "add x9, sp, 34 * 8", // Skip the exception frame.
+        // Currently `x9` points to `&Aarch64VCpu.host_stack_top`, see `run_guest()` in vcpu.rs.
         "ldr x10, [x9]", // Get `host_stack_top` value from `&Aarch64VCpu.host_stack_top`.
-        "mov sp, x10", // Set `sp` as the host stack top.
+        "mov sp, x10",   // Set `sp` as the host stack top.
         restore_regs_from_stack!(), // Restore host function context frame.
         "ret", // Control flow is handed back to Aarch64VCpu.run(), simulating the normal return of the `run_guest` function.
         options(noreturn),

src/exception.rs

@@ -35,4 +35,4 @@ pub fn has_hardware_support() -> bool {
 #[crate_interface::def_interface]
 pub trait HalIf {
     fn irq_hanlder();
-}
+}