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1 parent 5daa669 commit 20bb384Copy full SHA for 20bb384
Cargo.toml
@@ -1,7 +1,7 @@
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[package]
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edition = "2024"
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name = "arm_vcpu"
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-version = "0.1.0"
+version = "0.1.1"
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authors = [
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"KeYang Hu <keyang.hu@qq.com>",
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"Mingxian Su <aarkegz@gmail.com>",
src/vcpu.rs
@@ -192,9 +192,9 @@ impl<H: AxVCpuHal> Aarch64VCpu<H> {
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// read PARange (bits 3:0)
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let parange = (ID_AA64MMFR0_EL1.get() & 0xF) as u8;
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// ARM Definition: 0x5 indicates 48 bits PA, 0x4 indicates 44 bits PA, and so on.
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- if parange <= 0x5 {
+ if parange <= 0x4 {
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panic!(
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- "CPU only supports {}-bit PA (< 48), \
+ "CPU only supports {}-bit PA (< 44), \
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cannot enable 4-level EPT paging!",
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match parange {
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0x0 => 32,
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