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Merge pull request #255 from YanLien/next
feat(plc): add tac_e400 profile on smp1
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/dts-v1/;
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/memreserve/ 0x0000000080000000 0x0000000000010000;
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/ {
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compatible = "phytium,pe2204";
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interrupt-parent = <0x01>;
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#address-cells = <0x02>;
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#size-cells = <0x02>;
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model = "Phytium Pi Board";
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// memory@01 {
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// device_type = "memory";
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// reg = <0x20 0x00 0x00 0x80000000>;
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// numa-node-id = <0x00>;
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// };
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aliases {
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serial1 = "/soc/uart@2800d000";
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};
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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cpu_suspend = <0xc4000001>;
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cpu_off = <0x84000002>;
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cpu_on = <0xc4000003>;
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sys_poweroff = <0x84000008>;
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sys_reset = <0x84000009>;
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};
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cpus {
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#address-cells = <0x02>;
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#size-cells = <0x00>;
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cpu-map {
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// cluster0 {
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// core0 {
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// cpu = <0x05>;
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// };
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// };
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// cluster1 {
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// core0 {
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// cpu = <0x06>;
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// };
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// };
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cluster2 {
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core0 {
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cpu = <0x07>;
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};
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// core1 {
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// cpu = <0x08>;
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// };
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};
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};
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cpu@0 {
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device_type = "cpu";
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compatible = "phytium,ftc310\0arm,armv8";
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reg = <0x00 0x200>;
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enable-method = "psci";
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clocks = <0x09 0x02>;
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capacity-dmips-mhz = <0xb22>;
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phandle = <0x07>;
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};
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// cpu@1 {
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// device_type = "cpu";
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// compatible = "phytium,ftc310\0arm,armv8";
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// reg = <0x00 0x201>;
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// enable-method = "psci";
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// clocks = <0x09 0x02>;
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// capacity-dmips-mhz = <0xb22>;
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// phandle = <0x08>;
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// };
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// cpu@100 {
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// device_type = "cpu";
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// compatible = "phytium,ftc664\0arm,armv8";
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// reg = <0x00 0x00>;
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// enable-method = "psci";
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// clocks = <0x09 0x00>;
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// capacity-dmips-mhz = <0x161c>;
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// phandle = <0x05>;
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// };
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// cpu@101 {
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// device_type = "cpu";
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// compatible = "phytium,ftc664\0arm,armv8";
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// reg = <0x00 0x100>;
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// enable-method = "psci";
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// clocks = <0x09 0x01>;
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// capacity-dmips-mhz = <0x161c>;
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// phandle = <0x06>;
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// };
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};
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interrupt-controller@30800000 {
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compatible = "arm,gic-v3";
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#interrupt-cells = <0x03>;
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#address-cells = <0x02>;
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#size-cells = <0x02>;
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ranges;
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interrupt-controller;
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reg = <0x00 0x30800000 0x00 0x20000 0x00 0x30880000 0x00 0x80000 0x00 0x30840000 0x00 0x10000 0x00 0x30850000 0x00 0x10000 0x00 0x30860000 0x00 0x10000>;
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interrupts = <0x01 0x09 0x08>;
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phandle = <0x01>;
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gic-its@30820000 {
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compatible = "arm,gic-v3-its";
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msi-controller;
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reg = <0x00 0x30820000 0x00 0x20000>;
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phandle = <0x0f>;
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <0x01 0x0d 0x08 0x01 0x0e 0x08 0x01 0x0b 0x08 0x01 0x0a 0x08>;
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clock-frequency = <0x2faf080>;
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <0x02>;
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#size-cells = <0x02>;
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dma-coherent;
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ranges;
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uart@2800d000 {
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compatible = "arm,pl011\0arm,primecell";
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reg = <0x00 0x2800d000 0x00 0x1000>;
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interrupts = <0x00 0x54 0x04>;
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clocks = <0x0c 0x0c>;
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clock-names = "uartclk\0apb_pclk";
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status = "okay";
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};
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};
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chosen {
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bootargs = "console=ttyAMA1,115200 earlycon=pl011,0x2800d000 root=/dev/sda2 rootfstype=ext4 rootwait rw cma=256m ;";
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stdout-path = "serial1:115200n8";
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};
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memory@00 {
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device_type = "memory";
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reg = <0x20 0x20000000 0x00 0x20000000>;
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};
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};
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# Vm base info configs
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#
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[base]
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# Guest vm id.
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id = 2
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# Guest vm name.
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name = "arceos"
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# Virtualization type.
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vm_type = 1
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# The number of virtual CPUs.
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cpu_num = 1
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# The physical CPU ids.
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phys_cpu_ids = [0x200]
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# Guest vm physical cpu sets.
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phys_cpu_sets = [1]
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#
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# Vm kernel configs
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#
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[kernel]
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# The entry point of the kernel image.
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entry_point = 0x20_2008_0000
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# The location of image: "memory" | "fs".
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# Load from file system.
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image_location = "memory"
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# The load address of the kernel image.
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kernel_load_addr = 0x20_2008_0000
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## The file path of the kernel image.
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kernel_path = "/path/to/arceos_aarch64-dyn_smp1.bin"
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## The file path of the device tree blob (DTB).
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dtb_load_addr = 0x20_2000_0000
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dtb_path = "/path/to/arceos-aarch64-tac_e400-smp1.dtb"
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# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`).
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# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`.
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memory_regions = [
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[0x20_2000_0000, 0x2000_0000, 0x7, 1], # System RAM MAP_IDENTICAL
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]
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#
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# Device specifications
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#
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[devices]
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# Emu_devices.
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# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig.
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emu_devices = []
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# Pass-through devices.
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# Name Base-Ipa Base-Pa Length Alloc-Irq.
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passthrough_devices = [
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[
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"UART1",
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0x2800_d000,
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0x2800_d000,
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0x1000,
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0x1,
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],
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[
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"gic-v3",
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0x3080_0000,
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0x3080_0000,
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0x10000,
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0x1,
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],
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[
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"gic-v3-its",
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0x3082_0000,
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0x3082_0000,
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0x100000,
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0x1,
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],
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]

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