diff --git a/Boot-on-qemu.md b/Boot-on-qemu.md new file mode 100644 index 00000000..d5b42545 --- /dev/null +++ b/Boot-on-qemu.md @@ -0,0 +1,40 @@ +## Compile AxVisor + +* get deps +```bash +./tool/dev_env.py +cd crates/arceos && git checkout rk3588_jd4_qemu +cd crates/axvm && git checkout ivc +cd crates/axvcpu && git checkout ivc +cd crates/arm_vcpu && git checkout ivc_and_4lpt +cd crates/axaddrspace && git checkout 4_level_paging +cd crates/axhvc && git checkout ivc +``` + + +```bash +make ARCH=aarch64 LOG=info VM_CONFIGS=configs/vms/linux-qemu-aarch64.toml:configs/vms/arceos-aarch64.toml GICV3=y NET=y SMP=2 run DISK_IMG=/home/hky/workspace/Linux/ubuntu-22.04-rootfs_ext4.img SECOND_SERIAL=y + +telnet localhost 4321 +``` + +## Test AxVisor IVC + +* Compile arceos ivc tester as guest VM 2 + +repo: https://github.com/arceos-hypervisor/arceos/tree/ivc_tester + +```bash +make ARCH=aarch64 A=examples/ivc_tester defconfig +make ARCH=aarch64 A=examples/ivc_tester build +# You can get `examples/ivc_tester/ivc_tester_aarch64-qemu-virt.bin`, +# whose path should be set to `kernel_path` field in `configs/vms/arceos-aarch64.toml`. +``` + +* Build and install axvisor-driver + +```bash +git clone git@github.com:arceos-hypervisor/axvisor-tools.git --branch ivc +``` + +see its [README](https://github.com/arceos-hypervisor/axvisor-tools/blob/ivc/axvisor-driver/README.md) about how to compile it and how to subscribe messages from guest ArceOS's ivc publisher. diff --git a/Boot-on-rk3588.md b/Boot-on-rk3588.md new file mode 100644 index 00000000..b59c5ec4 --- /dev/null +++ b/Boot-on-rk3588.md @@ -0,0 +1,65 @@ +## Setup TFTP Server + +```bash +sudo apt-get install tftpd-hpa tftp-hpa +sudo chmod 777 /srv/tftp +``` + +judge if TFTP works + +```bash +echo "TFTP Server Test" > /srv/tftp/testfile.txt +tftp localhost +tftp> get testfile.txt +tftp> quit +cat testfile.txt +``` + +You should see `TFTP Server Test` on your screen. + +## Compile device tree + +```bash +dtc -o aio-rk3588-jd4.dtb -O dtb -I dts aio-rk3588-jd4.dts +``` + +## Prepare Linux kernel bianry + +```bash +scp xxx@192.168.xxx.xxx:/home/xxx/firefly_rk3588_SDK/kernel/arch/arm64/boot/Image configs/vms/Image.bin +``` + +## Compile AxVisor + +* get deps +```bash +./tool/dev_env.py +cd crates/arceos && git checkout rk3588_jd4 +``` + +* compile + +```bash +make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-rk3588j-hv.toml defconfig +make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-rk3588j-hv.toml VM_CONFIGS=configs/vms/linux-rk3588-aarch64-smp.toml LOG=debug GICV3=y upload +``` + +* copy to tftp dir (make xxx upload will copy the image to `/srv/tftp/axvisor` automatically) + +```bash +cp axvisor_aarch64-rk3588j.img /srv/tftp/axvisor +``` + +## rk3588 console + +上电，在 uboot 中 ctrl+C + +```bash +# 这是 tftp 服务器所在的主机 ip +setenv serverip 192.168.50.97 +# 这是 rk3588 所在设备的 ip (Firefly Linux 自己 DHCP 拿到的地址) +setenv ipaddr 192.168.50.8 +# 使用 tftp 加载镜像到指定内存地址并 boot +setenv serverip 192.168.50.97;setenv ipaddr 192.168.50.8;tftp 0x00480000 ${serverip}:axvisor;tftp 0x10000000 ${serverip}:rk3588_dtb.bin;bootm 0x00480000 - 0x10000000; +``` +tftp 0x00480000 ${serverip}:Image.bin;tftp 0x10000000 ${serverip}:rk3588_dtb.bin;bootm 0x00480000 - 0x10000000; diff --git a/Cargo.lock b/Cargo.lock index 1eb589a4..59637ce4 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -117,10 +117,9 @@ dependencies = [ [[package]] name = "arceos_api" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "axalloc", - "axconfig", + "axconfig 0.1.0", "axdriver", "axerrno", "axfeat", @@ -167,7 +166,6 @@ dependencies = [ [[package]] name = "arm_vcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arm_vcpu.git#e537c7b5125130e85b12a57390a251a86227c2ec" dependencies = [ "aarch64-cpu 9.4.0", "aarch64_sysreg", @@ -190,7 +188,6 @@ checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" [[package]] name = "axaddrspace" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axaddrspace.git#2ed4d076e01f966710bd6480131abd3a9ffb8930" dependencies = [ "axerrno", "bit_field", @@ -208,7 +205,6 @@ dependencies = [ [[package]] name = "axalloc" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "allocator", "axerrno", @@ -218,6 +214,13 @@ dependencies = [ "memory_addr", ] +[[package]] +name = "axconfig" +version = "0.1.0" +dependencies = [ + "axconfig-gen-macros", +] + [[package]] name = "axconfig" version = "0.1.0" @@ -251,7 +254,6 @@ dependencies = [ [[package]] name = "axdevice" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axdevice.git#8652ce80b2c53310fb7b0f8ac275f2dfcfbb1338" dependencies = [ "axaddrspace", "axdevice_base", @@ -265,7 +267,6 @@ dependencies = [ [[package]] name = "axdevice_base" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axdevice_crates.git#28d49f147793997a9db1ebb75a34295cde2a107d" dependencies = [ "axaddrspace", "axerrno", @@ -277,10 +278,9 @@ dependencies = [ [[package]] name = "axdriver" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "axalloc", - "axconfig", + "axconfig 0.1.0", "axdriver_base", "axdriver_block", "axdriver_pci", @@ -335,7 +335,6 @@ dependencies = [ [[package]] name = "axfeat" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "axalloc", "axdriver", @@ -350,7 +349,6 @@ dependencies = [ [[package]] name = "axfs" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "axdriver", "axdriver_block", @@ -404,14 +402,13 @@ dependencies = [ [[package]] name = "axhal" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "aarch64-cpu 10.0.0", "arm-gic-driver", "arm_gicv2", "arm_pl011", "axalloc", - "axconfig", + "axconfig 0.1.0", "axlog", "bitflags 2.9.0", "cfg-if", @@ -441,6 +438,15 @@ dependencies = [ "x86_64 0.15.2", ] +[[package]] +name = "axhvc" +version = "0.1.0" +dependencies = [ + "axerrno", + "bit_field", + "numeric-enum-macro", +] + [[package]] name = "axio" version = "0.1.1" @@ -453,7 +459,6 @@ dependencies = [ [[package]] name = "axlog" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "cfg-if", "crate_interface", @@ -464,10 +469,9 @@ dependencies = [ [[package]] name = "axmm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "axalloc", - "axconfig", + "axconfig 0.1.0", "axerrno", "axhal", "kspin", @@ -480,7 +484,6 @@ dependencies = [ [[package]] name = "axns" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "crate_interface", "lazyinit", @@ -489,10 +492,9 @@ dependencies = [ [[package]] name = "axruntime" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "axalloc", - "axconfig", + "axconfig 0.1.0", "axdriver", "axfs", "axhal", @@ -509,7 +511,6 @@ dependencies = [ [[package]] name = "axstd" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "arceos_api", "axerrno", @@ -521,7 +522,6 @@ dependencies = [ [[package]] name = "axsync" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "axtask", "kspin", @@ -530,9 +530,8 @@ dependencies = [ [[package]] name = "axtask" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ - "axconfig", + "axconfig 0.1.0", "axhal", "cfg-if", "cpumask", @@ -550,7 +549,6 @@ dependencies = [ [[package]] name = "axvcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvcpu.git#34fc1067c4e9dddf3e43e7d290bcb5cf4127382e" dependencies = [ "axaddrspace", "axerrno", @@ -563,14 +561,16 @@ name = "axvisor" version = "0.1.0" dependencies = [ "axaddrspace", - "axconfig", + "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm)", "axerrno", + "axhvc", "axstd", "axvcpu", "axvm", "bitflags 2.9.0", "cfg-if", "crate_interface", + "fdt-parser", "kspin", "lazyinit", "log", @@ -589,7 +589,6 @@ dependencies = [ [[package]] name = "axvm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvm.git#69b48a93cedb031a78f59d6219bd323d12e96a71" dependencies = [ "arm_vcpu", "axaddrspace", @@ -879,6 +878,12 @@ dependencies = [ "log", ] +[[package]] +name = "fdt-parser" +version = "0.4.16" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d09dfa244d6891db105eefae4f3aa5752adcab254a95e24c17c3ebd76f6d77ba" + [[package]] name = "getrandom" version = "0.2.15" @@ -1089,8 +1094,6 @@ checksum = "42f5e15c9953c5e4ccceeb2e7382a716482c34515315f7b03532b8b4e8393d2d" [[package]] name = "page_table_entry" version = "0.5.3" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c097d641745a066856a26eed6e486d4430bb3e32c94f1203ea09c63239b360a0" dependencies = [ "aarch64-cpu 10.0.0", "bitflags 2.9.0", @@ -1101,8 +1104,6 @@ dependencies = [ [[package]] name = "page_table_multiarch" version = "0.5.3" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4647889585d29762d747be0916d6d28db72967a697d142be86f187a6b496832a" dependencies = [ "log", "memory_addr", @@ -1802,3 +1803,7 @@ dependencies = [ "quote", "syn 2.0.100", ] + +[[patch.unused]] +name = "arm_vgic" +version = "0.0.0" diff --git a/Cargo.toml b/Cargo.toml index d5a4b78b..faa50ae8 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -36,6 +36,7 @@ axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm axvm = { git = "https://github.com/arceos-hypervisor/axvm.git" } axvcpu = { git = "https://github.com/arceos-hypervisor/axvcpu.git" } axaddrspace = { git = "https://github.com/arceos-hypervisor/axaddrspace.git" } +axhvc = { git = "https://github.com/arceos-hypervisor/axhvc.git" } # System independent crates provided by ArceOS, these crates could be imported by remote url. crate_interface = "0.1" @@ -45,9 +46,37 @@ page_table_entry = { version = "0.5", features = ["arm-el2"] } page_table_multiarch = "0.5" percpu = { version = "0.2.0", features = ["arm-el2"] } +fdt-parser = "0.4" + [build-dependencies] toml = { git = "https://github.com/arceos-hypervisor/toml.git", branch = "no_std" } axconfig = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm" } prettyplease = "0.2" quote = "1.0" syn = "2.0" + + +[patch."https://github.com/arceos-hypervisor/arceos.git".axstd] +path = "crates/arceos/ulib/axstd" +[patch."https://github.com/arceos-hypervisor/arceos.git".axhal] +path = "crates/arceos/modules/axhal" +[patch."https://github.com/arceos-hypervisor/axvm.git".axvm] +path = "crates/axvm" +[patch."https://github.com/arceos-hypervisor/axvcpu.git".axvcpu] +path = "crates/axvcpu" +[patch."https://github.com/arceos-hypervisor/axaddrspace.git".axaddrspace] +path = "crates/axaddrspace" +[patch."https://github.com/arceos-hypervisor/arm_vcpu.git".arm_vcpu] +path = "crates/arm_vcpu" +[patch."https://github.com/arceos-hypervisor/axdevice.git".axdevice] +path = "crates/axdevice" +[patch."https://github.com/arceos-hypervisor/arm_vgic.git".arm_vgic] +path = "crates/arm_vgic" +[patch."https://github.com/arceos-hypervisor/axdevice_crates.git".axdevice_base] +path = "crates/axdevice_crates/axdevice_base" +[patch."https://github.com/arceos-hypervisor/axhvc.git".axhvc] +path = "crates/axhvc" + +[patch.crates-io] +page_table_multiarch = {path = "crates/page_table_multiarch/page_table_multiarch"} +page_table_entry = {path = "crates/page_table_multiarch/page_table_entry"} \ No newline at end of file diff --git a/Makefile b/Makefile index daec2baa..75350f82 100644 --- a/Makefile +++ b/Makefile @@ -155,7 +155,7 @@ ifeq ($(PLAT_NAME), aarch64-raspi4) include scripts/make/raspi4.mk else ifeq ($(PLAT_NAME), aarch64-bsta1000b-virt-hv) include scripts/make/bsta1000b-fada.mk -else ifeq ($(PLAT_NAME), aarch64-rk3588j-hv) +else ifeq ($(PLAT_NAME), aarch64-rk3588j) include scripts/make/rk3588.mk endif @@ -184,6 +184,12 @@ gdb: -ex 'b rust_entry' \ -ex 'disp /16i $$pc' +# Temporarily used for building image for the `aarch64-rk3588j` platform. +image: build_image + +upload: image + $(call upload_image) + clippy: oldconfig ifeq ($(origin ARCH), command line) $(call cargo_clippy,--target $(TARGET)) diff --git a/configs/platforms/aarch64-qemu-virt-hv.toml b/configs/platforms/aarch64-qemu-virt-hv.toml index b5c2001a..9e8aa6d8 100644 --- a/configs/platforms/aarch64-qemu-virt-hv.toml +++ b/configs/platforms/aarch64-qemu-virt-hv.toml @@ -90,7 +90,7 @@ pci-ranges = [ [0x80_0000_0000, 0x80_0000_0000], # 64-bit MMIO space ] # [(uint, uint)] # UART Address -uart-paddr = 0x0900_0000 # uint +uart-paddr = 0x0904_0000 # uint # UART IRQ number uart-irq = 1 # uint diff --git a/configs/platforms/aarch64-rk3588j-hv.toml b/configs/platforms/aarch64-rk3588j-hv.toml index de34e4ab..14e0602d 100644 --- a/configs/platforms/aarch64-rk3588j-hv.toml +++ b/configs/platforms/aarch64-rk3588j-hv.toml @@ -32,11 +32,6 @@ kernel-aspace-size = "0x0000_ffff_ffff_f000" [devices] # MMIO regions with format (`base_paddr`, `size`). mmio-regions = [ - # ["0x0900_0000", "0x1000"], # PL011 UART - # ["0x0800_0000", "0x5_0000"], # GICv2 with Virtualization (GICV@0x0803_0000, GICH@0x0804_0000) - # ["0x0a00_0000", "0x4000"], # VirtIO - # ["0x1000_0000", "0x2eff_0000"], # PCI memory ranges (ranges 1: 32-bit MMIO space) - # ["0x40_1000_0000", "0x1000_0000"], # PCI config space [0xfeb50000, 0x1000], # uart8250 UART0 [0xfe600000, 0x10000], # gic-v3 gicd [0xfe680000, 0x100000], # gic-v3 gicr @@ -59,10 +54,10 @@ uart-paddr = 0xfeb5_0000 # uint uart-irq = 0x14d # uint # GICC Address +gicc-paddr = 0xfe610000 # uint +# GICD Address gicd-paddr = 0xfe600000 # uint # GICR Address -gicc-paddr = 0xfe680000 # uint -# GICR Address gicr-paddr = 0xfe680000 # uint # PSCI diff --git a/configs/vms/aio-rk3588-jd4.dts b/configs/vms/aio-rk3588-jd4.dts new file mode 100644 index 00000000..40549136 --- /dev/null +++ b/configs/vms/aio-rk3588-jd4.dts @@ -0,0 +1,12905 @@ +/dts-v1/; + +/ { + #address-cells = <0x02>; + model = "Firefly AIO-3588JD4"; + serial-number = "a0deeea630de3975"; + #size-cells = <0x02>; + interrupt-parent = <0x01>; + compatible = "rockchip,aio-3588jd4\0rockchip,rk3588"; + + pcie30-avdd1v8 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "pcie30_avdd1v8"; + compatible = "regulator-fixed"; + phandle = <0x4a6>; + vin-supply = <0x1de>; + }; + + syscon@fd5bc000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5bc000 0x00 0x100>; + phandle = <0x194>; + }; + + vcc5v0-host3 { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + gpio = <0x182 0x07 0x00>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_host3"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a2>; + vin-supply = <0x1dd>; + }; + + pwm@febd0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x16c>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04 0x00 0x15b 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebd0030 0x00 0x10>; + phandle = <0x2d4>; + }; + + rkisp@fdcc0000 { + power-domains = <0x60 0x1c>; + iommus = <0xd1>; + clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; + interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; + clocks = <0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; + compatible = "rockchip,rk3588-rkisp"; + status = "disabled"; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + reg = <0x00 0xfdcc0000 0x00 0x7f00>; + phandle = <0x5a>; + }; + + qos@fdf66600 { + compatible = "syscon"; + reg = <0x00 0xfdf66600 0x00 0x20>; + phandle = <0x96>; + }; + + serial@febb0000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x167>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x153 0x04>; + clocks = <0x02 0xd3 0x02 0xb2>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfebb0000 0x00 0x100>; + phandle = <0x2d0>; + dmas = <0xf2 0x09 0xf2 0x0a>; + reg-shift = <0x02>; + }; + + qos@fdf41000 { + compatible = "syscon"; + reg = <0x00 0xfdf41000 0x00 0x20>; + phandle = <0xa6>; + }; + + csi2-dcphy1 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x20e>; + }; + + rkispp0-vir0 { + rockchip,hw = <0x5b>; + compatible = "rockchip,rk3588-rkispp-vir"; + status = "disabled"; + phandle = <0x243>; + }; + + wireless-bluetooth { + pinctrl-names = "default\0rts_gpio"; + pinctrl-0 = <0x1e5 0x1e6 0x1e7 0x1e8>; + clock-names = "ext_clock"; + BT,power_gpio = <0x7b 0x16 0x00>; + clocks = <0x1e4>; + BT,wake_gpio = <0x7b 0x15 0x00>; + uart_rts_gpios = <0xfe 0x02 0x01>; + compatible = "bluetooth-platdata"; + BT,wake_host_irq = <0x7b 0x00 0x00>; + pinctrl-1 = <0x1e9>; + status = "disabled"; + phandle = <0x4aa>; + }; + + pwm@febd0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x16b>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebd0020 0x00 0x10>; + phandle = <0x2d3>; + }; + + qos@fdf39000 { + compatible = "syscon"; + reg = <0x00 0xfdf39000 0x00 0x20>; + phandle = <0xaf>; + }; + + cam0-cam1-switch { + regulator-max-microvolt = <0x1b7740>; + pinctrl-names = "default"; + regulator-boot-on; + gpio = <0x181 0x11 0x00>; + pinctrl-0 = <0x1f0>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "cam0_cam1_switch"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4b2>; + }; + + qos@fdf3e400 { + compatible = "syscon"; + reg = <0x00 0xfdf3e400 0x00 0x20>; + phandle = <0xad>; + }; + + mipi2-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "okay"; + firefly-compatible; + phandle = <0x226>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@0 { + remote-endpoint = <0x4d>; + reg = <0x00>; + phandle = <0x33>; + }; + }; + + port@1 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + + endpoint@0 { + remote-endpoint = <0x4e>; + reg = <0x00>; + phandle = <0x54>; + }; + }; + }; + }; + + iommu@fdc48700 { + power-domains = <0x60 0x0f>; + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x62 0x04>; + clocks = <0x02 0x195 0x02 0x194>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvdec1_mmu"; + reg = <0x00 0xfdc48700 0x00 0x40 0x00 0xfdc48740 0x00 0x40>; + phandle = <0xcc>; + rockchip,master-handle-irq; + }; + + clock-controller@fd7c0000 { + #reset-cells = <0x01>; + assigned-clocks = <0x02 0x09 0x02 0x05 0x02 0x08 0x02 0x07 0x02 0xd8 0x02 0xda 0x02 0xd9 0x02 0x10e 0x02 0x10f 0x02 0x110 0x02 0x299 0x02 0x29a 0x02 0x7b 0x02 0xec 0x02 0x114 0x02 0x208 0x02 0x20e 0x02 0x21f 0x02 0x77>; + assigned-clock-rates = <0x4190ab00 0x2ee00000 0x32a9f880 0x46cf7100 0x29d7ab80 0x17d78400 0x1dcd6500 0x2cb41780 0x5f5e100 0x17d78400 0x5f5e100 0xbebc200 0x165a0bc0 0x8f0d180 0xbebc200 0xb71b00 0xb71b00 0x5e69ec0 0x1312d00>; + #clock-cells = <0x01>; + compatible = "rockchip,rk3588-cru"; + rockchip,grf = <0x76>; + reg = <0x00 0xfd7c0000 0x00 0x5c000>; + phandle = <0x02>; + }; + + qos@fdf81000 { + compatible = "syscon"; + reg = <0x00 0xfdf81000 0x00 0x20>; + phandle = <0xa0>; + }; + + qos@fdf36000 { + compatible = "syscon"; + reg = <0x00 0xfdf36000 0x00 0x20>; + phandle = <0xaa>; + }; + + i2s@fe4a0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x132 0x133>; + pinctrl-0 = <0x12f 0x130>; + clock-names = "i2s_clk\0i2s_hclk"; + assigned-clocks = <0x02 0x2a>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xb7 0x04>; + clocks = <0x02 0x2d 0x02 0x23>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; + pinctrl-1 = <0x131>; + status = "disabled"; + reg = <0x00 0xfe4a0000 0x00 0x1000>; + phandle = <0x299>; + dmas = <0xf1 0x02 0xf1 0x03>; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd5c4000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5c4000 0x00 0x100>; + phandle = <0x195>; + }; + + sram@ff001000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "mmio-sram"; + ranges = <0x00 0x00 0xff001000 0xef000>; + reg = <0x00 0xff001000 0x00 0xef000>; + phandle = <0x2eb>; + + rkvdec-sram@0 { + reg = <0x00 0x78000>; + phandle = <0xcb>; + }; + + rkvdec-sram@78000 { + reg = <0x78000 0x77000>; + phandle = <0xcd>; + }; + }; + + uio@fe1c0000 { + compatible = "rockchip,uio-gmac"; + status = "disabled"; + reg = <0x00 0xfe1c0000 0x00 0x10000>; + phandle = <0x28e>; + rockchip,ethernet = <0x109>; + }; + + pwm@febd0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x16a>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "okay"; + reg = <0x00 0xfebd0010 0x00 0x10>; + phandle = <0x1ed>; + }; + + rkisp1-vir3 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x242>; + }; + + pcie-clk2 { + regulator-boot-on; + regulator-always-on; + regulator-name = "pcie_clk2"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x495>; + gpios = <0x181 0x16 0x01>; + }; + + serial@feb40000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x160>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14c 0x04>; + clocks = <0x02 0xb7 0x02 0xab>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "okay"; + reg = <0x00 0xfeb40000 0x00 0x100>; + phandle = <0x2c9>; + dmas = <0x7c 0x08 0x7c 0x09>; + reg-shift = <0x02>; + }; + + pinctrl { + #address-cells = <0x02>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-pinctrl"; + ranges; + rockchip,grf = <0x196>; + phandle = <0x197>; + + eth0 { + + eth0-pins { + rockchip,pins = <0x02 0x13 0x01 0x198>; + phandle = <0x46c>; + }; + }; + + i2c3 { + + i2c3m3-xfer { + rockchip,pins = <0x02 0x0a 0x09 0x19d 0x02 0x0b 0x09 0x19d>; + phandle = <0x361>; + }; + + i2c3m2-xfer { + rockchip,pins = <0x04 0x04 0x09 0x19d 0x04 0x05 0x09 0x19d>; + phandle = <0x14a>; + }; + + i2c3m1-xfer { + rockchip,pins = <0x03 0x0f 0x09 0x19d 0x03 0x10 0x09 0x19d>; + phandle = <0x35f>; + }; + + i2c3m0-xfer { + rockchip,pins = <0x01 0x11 0x09 0x19d 0x01 0x10 0x09 0x19d>; + phandle = <0x35e>; + }; + + i2c3m4-xfer { + rockchip,pins = <0x04 0x18 0x09 0x19d 0x04 0x19 0x09 0x19d>; + phandle = <0x360>; + }; + }; + + pwm9 { + + pwm9m2-pins { + rockchip,pins = <0x03 0x19 0x0b 0x198>; + phandle = <0x3d7>; + }; + + pwm9m1-pins { + rockchip,pins = <0x04 0x19 0x0b 0x198>; + phandle = <0x3d6>; + }; + + pwm9m0-pins { + rockchip,pins = <0x03 0x08 0x0b 0x198>; + phandle = <0x16e>; + }; + }; + + pcfg-pull-none-drv-level-7 { + drive-strength = <0x07>; + bias-disable; + phandle = <0x451>; + }; + + mipi { + + mipi-te1 { + rockchip,pins = <0x03 0x13 0x02 0x198>; + phandle = <0x39f>; + }; + + mipim1-camera2-clk { + rockchip,pins = <0x03 0x07 0x04 0x198>; + phandle = <0x39b>; + }; + + mipim0-camera0-clk { + rockchip,pins = <0x04 0x09 0x01 0x198>; + phandle = <0x395>; + }; + + mipim0-camera4-clk { + rockchip,pins = <0x01 0x1f 0x02 0x198>; + phandle = <0x399>; + }; + + mipim1-camera3-clk { + rockchip,pins = <0x03 0x08 0x04 0x198>; + phandle = <0x39c>; + }; + + mipim0-camera1-clk { + rockchip,pins = <0x01 0x0e 0x02 0x198>; + phandle = <0x396>; + }; + + mipim1-camera0-clk { + rockchip,pins = <0x03 0x05 0x04 0x198>; + phandle = <0x39a>; + }; + + mipim1-camera4-clk { + rockchip,pins = <0x03 0x09 0x04 0x198>; + phandle = <0x39d>; + }; + + mipim0-camera2-clk { + rockchip,pins = <0x01 0x0f 0x02 0x198>; + phandle = <0x397>; + }; + + mipi-te0 { + rockchip,pins = <0x03 0x12 0x02 0x198>; + phandle = <0x39e>; + }; + + mipim1-camera1-clk { + rockchip,pins = <0x03 0x06 0x04 0x198>; + phandle = <0x180>; + }; + + mipim0-camera3-clk { + rockchip,pins = <0x01 0x1e 0x02 0x198>; + phandle = <0x398>; + }; + }; + + pwm14 { + + pwm14m2-pins { + rockchip,pins = <0x01 0x1e 0x0b 0x198>; + phandle = <0x3e1>; + }; + + pwm14m1-pins { + rockchip,pins = <0x04 0x0a 0x0b 0x198>; + phandle = <0x3e0>; + }; + + pwm14m0-pins { + rockchip,pins = <0x03 0x12 0x0b 0x198>; + phandle = <0x173>; + }; + }; + + pcfg-pull-none-drv-level-4-smt { + drive-strength = <0x04>; + bias-disable; + input-schmitt-enable; + phandle = <0x303>; + }; + + headphone { + + hp-det { + rockchip,pins = <0x02 0x13 0x00 0x198>; + phandle = <0x1dc>; + }; + }; + + npu { + + npu-pins { + rockchip,pins = <0x00 0x16 0x02 0x198>; + phandle = <0x3a0>; + }; + }; + + wireless-bluetooth { + + bt-reset-gpio { + rockchip,pins = <0x00 0x16 0x00 0x198>; + phandle = <0x1e6>; + }; + + bt-irq-gpio { + rockchip,pins = <0x00 0x00 0x00 0x198>; + phandle = <0x1e8>; + }; + + bt-wake-gpio { + rockchip,pins = <0x00 0x15 0x00 0x198>; + phandle = <0x1e7>; + }; + + uart6-gpios { + rockchip,pins = <0x01 0x02 0x00 0x198>; + phandle = <0x1e9>; + }; + }; + + pcie30x1 { + + pcie30x1-1-button-rstn { + rockchip,pins = <0x04 0x0a 0x04 0x198>; + phandle = <0x3a9>; + }; + + pcie30x1m1-pins { + rockchip,pins = <0x04 0x03 0x04 0x198 0x04 0x05 0x04 0x198 0x04 0x04 0x04 0x198 0x04 0x00 0x04 0x198 0x04 0x02 0x04 0x198 0x04 0x01 0x04 0x198>; + phandle = <0x3a6>; + }; + + pcie30x1m0-pins { + rockchip,pins = <0x00 0x10 0x0c 0x198 0x00 0x15 0x0c 0x198 0x00 0x14 0x0c 0x198 0x00 0x0d 0x0c 0x198 0x00 0x0f 0x0c 0x198 0x00 0x0e 0x0c 0x198>; + phandle = <0x3a5>; + }; + + pcie30x1-0-button-rstn { + rockchip,pins = <0x04 0x09 0x04 0x198>; + phandle = <0x3a8>; + }; + + pcie30x1m2-pins { + rockchip,pins = <0x01 0x0d 0x04 0x198 0x01 0x0c 0x04 0x198 0x01 0x0b 0x04 0x198 0x01 0x00 0x04 0x198 0x01 0x07 0x04 0x198 0x01 0x01 0x04 0x198>; + phandle = <0x3a7>; + }; + }; + + uart8 { + + uart8m0-rtsn { + rockchip,pins = <0x04 0x0a 0x0a 0x198>; + phandle = <0x443>; + }; + + uart8m1-ctsn { + rockchip,pins = <0x03 0x05 0x0a 0x198>; + phandle = <0x444>; + }; + + uart8m0-ctsn { + rockchip,pins = <0x04 0x0b 0x0a 0x198>; + phandle = <0x442>; + }; + + uart8m1-xfer { + rockchip,pins = <0x03 0x03 0x0a 0x19e 0x03 0x02 0x0a 0x19e>; + phandle = <0x167>; + }; + + uart8m0-xfer { + rockchip,pins = <0x04 0x09 0x0a 0x19e 0x04 0x08 0x0a 0x19e>; + phandle = <0x441>; + }; + + uart8-xfer { + rockchip,pins = <0x04 0x09 0x0a 0x19e>; + phandle = <0x446>; + }; + + uart8m1-rtsn { + rockchip,pins = <0x03 0x04 0x0a 0x198>; + phandle = <0x445>; + }; + }; + + spi2 { + + spi2m0-cs1 { + rockchip,pins = <0x01 0x08 0x08 0x19a>; + phandle = <0x404>; + }; + + spi2m2-cs0 { + rockchip,pins = <0x00 0x09 0x01 0x19f>; + phandle = <0x154>; + }; + + spi2m1-cs1 { + rockchip,pins = <0x04 0x08 0x08 0x19a>; + phandle = <0x407>; + }; + + spi2m2-pins { + rockchip,pins = <0x00 0x05 0x01 0x19f 0x00 0x0b 0x01 0x19f 0x00 0x06 0x01 0x19f>; + phandle = <0x155>; + }; + + spi2m1-pins { + rockchip,pins = <0x04 0x06 0x08 0x19a 0x04 0x04 0x08 0x19a 0x04 0x05 0x08 0x19a>; + phandle = <0x405>; + }; + + spi2m2-cs1 { + rockchip,pins = <0x00 0x08 0x01 0x19f>; + phandle = <0x408>; + }; + + spi2m0-cs0 { + rockchip,pins = <0x01 0x07 0x08 0x19a>; + phandle = <0x403>; + }; + + spi2m0-pins { + rockchip,pins = <0x01 0x06 0x08 0x19a 0x01 0x04 0x08 0x19a 0x01 0x05 0x08 0x19a>; + phandle = <0x402>; + }; + + spi2m1-cs0 { + rockchip,pins = <0x04 0x07 0x08 0x19a>; + phandle = <0x406>; + }; + }; + + pcfg-pull-up-drv-level-15 { + drive-strength = <0x0f>; + phandle = <0x462>; + bias-pull-up; + }; + + pcfg-pull-down-drv-level-13 { + drive-strength = <0x0d>; + bias-pull-down; + phandle = <0x469>; + }; + + pcfg-pull-up-drv-level-2 { + drive-strength = <0x02>; + phandle = <0x199>; + bias-pull-up; + }; + + i2s1 { + + i2s1m0-sdo1 { + rockchip,pins = <0x04 0x0a 0x03 0x198>; + phandle = <0x127>; + }; + + i2s1m1-sdi1 { + rockchip,pins = <0x00 0x16 0x01 0x198>; + phandle = <0x380>; + }; + + i2s1m0-sdi3 { + rockchip,pins = <0x04 0x08 0x03 0x198>; + phandle = <0x125>; + }; + + i2s1m0-mclk { + rockchip,pins = <0x04 0x00 0x03 0x19d>; + phandle = <0x37b>; + }; + + i2s1m0-sdi1 { + rockchip,pins = <0x04 0x06 0x03 0x198>; + phandle = <0x123>; + }; + + i2s1m1-sdo2 { + rockchip,pins = <0x00 0x1c 0x01 0x198>; + phandle = <0x385>; + }; + + i2s1m1-sdo0 { + rockchip,pins = <0x00 0x19 0x01 0x198>; + phandle = <0x383>; + }; + + i2s1m0-sdo2 { + rockchip,pins = <0x04 0x0b 0x03 0x198>; + phandle = <0x128>; + }; + + i2s1m1-sdi2 { + rockchip,pins = <0x00 0x17 0x01 0x198>; + phandle = <0x381>; + }; + + i2s1m0-sdo0 { + rockchip,pins = <0x04 0x09 0x03 0x198>; + phandle = <0x126>; + }; + + i2s1m1-sdi0 { + rockchip,pins = <0x00 0x15 0x01 0x198>; + phandle = <0x37f>; + }; + + i2s1m0-sdi2 { + rockchip,pins = <0x04 0x07 0x03 0x198>; + phandle = <0x124>; + }; + + i2s1m1-sclk { + rockchip,pins = <0x00 0x0e 0x01 0x19d>; + phandle = <0x37e>; + }; + + i2s1m0-sdi0 { + rockchip,pins = <0x04 0x05 0x03 0x198>; + phandle = <0x122>; + }; + + i2s1m1-sdo3 { + rockchip,pins = <0x00 0x1d 0x01 0x198>; + phandle = <0x386>; + }; + + i2s1m1-lrck { + rockchip,pins = <0x00 0x0f 0x01 0x19d>; + phandle = <0x37c>; + }; + + i2s1m0-sclk { + rockchip,pins = <0x04 0x01 0x03 0x19d>; + phandle = <0x121>; + }; + + i2s1m1-sdo1 { + rockchip,pins = <0x00 0x1a 0x01 0x198>; + phandle = <0x384>; + }; + + i2s1m0-sdo3 { + rockchip,pins = <0x04 0x0c 0x03 0x198>; + phandle = <0x129>; + }; + + i2s1m1-sdi3 { + rockchip,pins = <0x00 0x18 0x01 0x198>; + phandle = <0x382>; + }; + + i2s1m0-lrck { + rockchip,pins = <0x04 0x02 0x03 0x19d>; + phandle = <0x120>; + }; + + i2s1m1-mclk { + rockchip,pins = <0x00 0x0d 0x01 0x19d>; + phandle = <0x37d>; + }; + }; + + ddrphych2 { + + ddrphych2-pins { + rockchip,pins = <0x04 0x08 0x07 0x198 0x04 0x09 0x07 0x198 0x04 0x0a 0x07 0x198 0x04 0x0b 0x07 0x198>; + phandle = <0x31a>; + }; + }; + + pcfg-pull-none-drv-level-12 { + drive-strength = <0x0c>; + bias-disable; + phandle = <0x456>; + }; + + i2c1 { + + i2c1m2-xfer { + rockchip,pins = <0x00 0x1c 0x09 0x19d 0x00 0x1d 0x09 0x19d>; + phandle = <0x148>; + }; + + i2c1m1-xfer { + rockchip,pins = <0x00 0x08 0x02 0x19d 0x00 0x09 0x02 0x19d>; + phandle = <0x357>; + }; + + i2c1m0-xfer { + rockchip,pins = <0x00 0x0d 0x09 0x19d 0x00 0x0e 0x09 0x19d>; + phandle = <0x356>; + }; + + i2c1m4-xfer { + rockchip,pins = <0x01 0x1a 0x09 0x19d 0x01 0x1b 0x09 0x19d>; + phandle = <0x359>; + }; + + i2c1m3-xfer { + rockchip,pins = <0x02 0x1c 0x09 0x19d 0x02 0x1d 0x09 0x19d>; + phandle = <0x358>; + }; + }; + + pwm7 { + + pwm7m3-pins { + rockchip,pins = <0x04 0x16 0x0b 0x198>; + phandle = <0x3d3>; + }; + + pwm7m2-pins { + rockchip,pins = <0x01 0x13 0x0b 0x198>; + phandle = <0x3d2>; + }; + + pwm7m1-pins { + rockchip,pins = <0x04 0x1c 0x0b 0x198>; + phandle = <0x3d1>; + }; + + pwm7m0-pins { + rockchip,pins = <0x00 0x18 0x0b 0x198>; + phandle = <0x16c>; + }; + }; + + pcfg-pull-none-drv-level-5 { + drive-strength = <0x05>; + bias-disable; + phandle = <0x2f1>; + }; + + gmac0 { + + gmac0-clkinout { + rockchip,pins = <0x04 0x13 0x01 0x198>; + phandle = <0x46d>; + }; + + gmac0-miim { + rockchip,pins = <0x04 0x14 0x01 0x198 0x04 0x15 0x01 0x198>; + phandle = <0x1c1>; + }; + + gmac0-tx-bus2 { + rockchip,pins = <0x02 0x0e 0x01 0x19a 0x02 0x0f 0x01 0x19a 0x02 0x10 0x01 0x198>; + phandle = <0x1c2>; + }; + + gmac0-rgmii-bus { + rockchip,pins = <0x02 0x06 0x01 0x198 0x02 0x07 0x01 0x198 0x02 0x09 0x01 0x19a 0x02 0x0a 0x01 0x19a>; + phandle = <0x1c5>; + }; + + gmac0-ppsclk { + rockchip,pins = <0x02 0x14 0x01 0x198>; + phandle = <0x46e>; + }; + + gmac0-txer { + rockchip,pins = <0x04 0x16 0x01 0x198>; + phandle = <0x471>; + }; + + gmac0-ptp-refclk { + rockchip,pins = <0x02 0x0c 0x01 0x198>; + phandle = <0x470>; + }; + + gmac0-rx-bus2 { + rockchip,pins = <0x02 0x11 0x01 0x198 0x02 0x12 0x01 0x198 0x04 0x12 0x01 0x198>; + phandle = <0x1c3>; + }; + + gmac0-rgmii-clk { + rockchip,pins = <0x02 0x08 0x01 0x198 0x02 0x0b 0x01 0x198>; + phandle = <0x1c4>; + }; + + gmac0-ppstring { + rockchip,pins = <0x02 0x0d 0x01 0x198>; + phandle = <0x46f>; + }; + }; + + pwm12 { + + pwm12m1-pins { + rockchip,pins = <0x04 0x0d 0x0b 0x198>; + phandle = <0x3dd>; + }; + + pwm12m0-pins { + rockchip,pins = <0x03 0x0d 0x0b 0x198>; + phandle = <0x171>; + }; + }; + + usb-typec { + + usbc0-int { + rockchip,pins = <0x00 0x1b 0x00 0x198>; + phandle = <0x17b>; + }; + + usb-5v-ctrl { + rockchip,pins = <0x01 0x03 0x00 0x198>; + phandle = <0x1ef>; + }; + }; + + uart6 { + + uart6m1-ctsn { + rockchip,pins = <0x01 0x03 0x0a 0x198>; + phandle = <0x436>; + }; + + uart6m2-xfer { + rockchip,pins = <0x01 0x19 0x0a 0x19e 0x01 0x18 0x0a 0x19e>; + phandle = <0x437>; + }; + + uart6m0-ctsn { + rockchip,pins = <0x02 0x09 0x0a 0x198>; + phandle = <0x439>; + }; + + uart6m1-xfer { + rockchip,pins = <0x01 0x00 0x0a 0x19e 0x01 0x01 0x0a 0x19e>; + phandle = <0x165>; + }; + + uart6m0-xfer { + rockchip,pins = <0x02 0x06 0x0a 0x19e 0x02 0x07 0x0a 0x19e>; + phandle = <0x438>; + }; + + uart6m1-rtsn { + rockchip,pins = <0x01 0x02 0x0a 0x198>; + phandle = <0x1e5>; + }; + + uart6m0-rtsn { + rockchip,pins = <0x02 0x08 0x0a 0x198>; + phandle = <0x43a>; + }; + }; + + pcfg-pull-down-drv-level-8 { + drive-strength = <0x08>; + bias-pull-down; + phandle = <0x464>; + }; + + gpu { + + gpu-pins { + rockchip,pins = <0x00 0x15 0x02 0x198>; + phandle = <0x333>; + }; + }; + + spi0 { + + spi0m2-cs1 { + rockchip,pins = <0x01 0x0d 0x08 0x19a>; + phandle = <0x3f8>; + }; + + spi0m0-cs0 { + rockchip,pins = <0x00 0x19 0x08 0x19a>; + phandle = <0x14e>; + }; + + spi0m3-pins { + rockchip,pins = <0x03 0x1b 0x08 0x19a 0x03 0x19 0x08 0x19a 0x03 0x1a 0x08 0x19a>; + phandle = <0x3f9>; + }; + + spi0m3-cs1 { + rockchip,pins = <0x03 0x1d 0x08 0x19a>; + phandle = <0x3fb>; + }; + + spi0m2-pins { + rockchip,pins = <0x01 0x0b 0x08 0x19a 0x01 0x09 0x08 0x19a 0x01 0x0a 0x08 0x19a>; + phandle = <0x3f6>; + }; + + spi0m1-cs0 { + rockchip,pins = <0x04 0x0a 0x08 0x19a>; + phandle = <0x3f4>; + }; + + spi0m1-pins { + rockchip,pins = <0x04 0x02 0x08 0x19a 0x04 0x00 0x08 0x19a 0x04 0x01 0x08 0x19a>; + phandle = <0x3f3>; + }; + + spi0m0-cs1 { + rockchip,pins = <0x00 0x0f 0x08 0x19a>; + phandle = <0x14f>; + }; + + spi0m2-cs0 { + rockchip,pins = <0x01 0x0c 0x08 0x19a>; + phandle = <0x3f7>; + }; + + spi0m0-pins { + rockchip,pins = <0x00 0x16 0x08 0x19a 0x00 0x17 0x08 0x19a 0x00 0x10 0x08 0x19a>; + phandle = <0x150>; + }; + + spi0m1-cs1 { + rockchip,pins = <0x04 0x09 0x08 0x19a>; + phandle = <0x3f5>; + }; + + spi0m3-cs0 { + rockchip,pins = <0x03 0x1c 0x08 0x19a>; + phandle = <0x3fa>; + }; + }; + + fspi { + + fspim0-cs1 { + rockchip,pins = <0x02 0x1f 0x02 0x199>; + phandle = <0x329>; + }; + + fspim1-pins { + rockchip,pins = <0x02 0x0b 0x03 0x199 0x02 0x0c 0x03 0x199 0x02 0x06 0x03 0x199 0x02 0x07 0x03 0x199 0x02 0x08 0x03 0x199 0x02 0x09 0x03 0x199>; + phandle = <0x32c>; + }; + + fspim0-pins { + rockchip,pins = <0x02 0x00 0x02 0x199 0x02 0x1e 0x02 0x199 0x02 0x18 0x02 0x199 0x02 0x19 0x02 0x199 0x02 0x1a 0x02 0x199 0x02 0x1b 0x02 0x199>; + phandle = <0x328>; + }; + + fspim1-cs1 { + rockchip,pins = <0x02 0x0d 0x03 0x199>; + phandle = <0x32d>; + }; + + fspim2-cs1 { + rockchip,pins = <0x03 0x15 0x02 0x199>; + phandle = <0x32b>; + }; + + fspim2-pins { + rockchip,pins = <0x03 0x05 0x05 0x199 0x03 0x14 0x02 0x199 0x03 0x00 0x05 0x199 0x03 0x01 0x05 0x199 0x03 0x02 0x05 0x199 0x03 0x03 0x05 0x199>; + phandle = <0x32a>; + }; + }; + + pcfg-pull-up-drv-level-13 { + drive-strength = <0x0d>; + phandle = <0x460>; + bias-pull-up; + }; + + clk32k { + + clk32k-out0 { + rockchip,pins = <0x00 0x0a 0x02 0x198>; + phandle = <0x315>; + }; + + clk32k-in { + rockchip,pins = <0x00 0x0a 0x01 0x198>; + phandle = <0x314>; + }; + + clk32k-out1 { + rockchip,pins = <0x02 0x15 0x01 0x198>; + phandle = <0x316>; + }; + }; + + pcfg-pull-down-drv-level-11 { + drive-strength = <0x0b>; + bias-pull-down; + phandle = <0x467>; + }; + + pcie30phy { + + pcie30phy-pins { + rockchip,pins = <0x01 0x14 0x04 0x198 0x01 0x19 0x04 0x198>; + phandle = <0x3a4>; + }; + }; + + pcfg-pull-up-drv-level-0 { + drive-strength = <0x00>; + phandle = <0x2f3>; + bias-pull-up; + }; + + ddrphych0 { + + ddrphych0-pins { + rockchip,pins = <0x04 0x00 0x07 0x198 0x04 0x01 0x07 0x198 0x04 0x02 0x07 0x198 0x04 0x03 0x07 0x198>; + phandle = <0x318>; + }; + }; + + pcfg-pull-none-drv-level-10 { + drive-strength = <0x0a>; + bias-disable; + phandle = <0x454>; + }; + + pwm5 { + + pwm5m2-pins { + rockchip,pins = <0x04 0x14 0x0b 0x198>; + phandle = <0x3ce>; + }; + + pwm5m1-pins { + rockchip,pins = <0x00 0x16 0x0b 0x198>; + phandle = <0x16a>; + }; + + pwm5m0-pins { + rockchip,pins = <0x00 0x09 0x03 0x198>; + phandle = <0x3cd>; + }; + }; + + pcfg-pull-none-drv-level-3 { + drive-strength = <0x03>; + bias-disable; + phandle = <0x2ef>; + }; + + pwm10 { + + pwm10m2-pins { + rockchip,pins = <0x03 0x1b 0x0b 0x198>; + phandle = <0x3d9>; + }; + + pwm10m1-pins { + rockchip,pins = <0x04 0x1b 0x0b 0x198>; + phandle = <0x3d8>; + }; + + pwm10m0-pins { + rockchip,pins = <0x03 0x00 0x0b 0x198>; + phandle = <0x16f>; + }; + }; + + pcfg-pull-down-smt { + input-schmitt-enable; + bias-pull-down; + phandle = <0x2ff>; + }; + + gpio@fec50000 { + gpio-controller; + interrupts = <0x00 0x119 0x04>; + clocks = <0x02 0x83 0x02 0x84>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec50000 0x00 0x100>; + phandle = <0x10d>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x80 0x20>; + interrupt-controller; + }; + + pcfg-pull-down { + bias-pull-down; + phandle = <0x2ec>; + }; + + uart4 { + + uart4m2-xfer { + rockchip,pins = <0x01 0x0a 0x0a 0x19e 0x01 0x0b 0x0a 0x19e>; + phandle = <0x42d>; + }; + + uart4-ctsn { + rockchip,pins = <0x01 0x17 0x0a 0x198>; + phandle = <0x42e>; + }; + + uart4m1-xfer { + rockchip,pins = <0x03 0x18 0x0a 0x19e 0x03 0x19 0x0a 0x19e>; + phandle = <0x163>; + }; + + uart4m0-xfer { + rockchip,pins = <0x01 0x1b 0x0a 0x19e 0x01 0x1a 0x0a 0x19e>; + phandle = <0x42c>; + }; + + uart4-rtsn { + rockchip,pins = <0x01 0x15 0x0a 0x198>; + phandle = <0x42f>; + }; + }; + + spdif0 { + + spdif0m0-tx { + rockchip,pins = <0x01 0x0e 0x03 0x198>; + phandle = <0x142>; + }; + + spdif0m1-tx { + rockchip,pins = <0x04 0x0c 0x06 0x198>; + phandle = <0x3f0>; + }; + }; + + pcfg-pull-down-drv-level-6 { + drive-strength = <0x06>; + bias-pull-down; + phandle = <0x2fd>; + }; + + pcfg-pull-up-drv-level-9 { + drive-strength = <0x09>; + phandle = <0x45c>; + bias-pull-up; + }; + + pcfg-pull-none-drv-level-1-smt { + drive-strength = <0x01>; + bias-disable; + input-schmitt-enable; + phandle = <0x19c>; + }; + + pcfg-pull-up-drv-level-11 { + drive-strength = <0x0b>; + phandle = <0x45e>; + bias-pull-up; + }; + + mcu { + + mcum1-pins { + rockchip,pins = <0x03 0x1c 0x06 0x198 0x03 0x1d 0x06 0x198>; + phandle = <0x394>; + }; + + mcum0-pins { + rockchip,pins = <0x04 0x1c 0x05 0x198 0x04 0x1d 0x05 0x198>; + phandle = <0x393>; + }; + }; + + i2c8 { + + i2c8m4-xfer { + rockchip,pins = <0x03 0x12 0x09 0x19d 0x03 0x13 0x09 0x19d>; + phandle = <0x373>; + }; + + i2c8m3-xfer { + rockchip,pins = <0x04 0x10 0x09 0x19d 0x04 0x11 0x09 0x19d>; + phandle = <0x372>; + }; + + i2c8m2-xfer { + rockchip,pins = <0x01 0x1e 0x09 0x19d 0x01 0x1f 0x09 0x19d>; + phandle = <0x371>; + }; + + i2c8m1-xfer { + rockchip,pins = <0x02 0x08 0x09 0x19d 0x02 0x09 0x09 0x19d>; + phandle = <0x374>; + }; + + i2c8m0-xfer { + rockchip,pins = <0x04 0x1a 0x09 0x19d 0x04 0x1b 0x09 0x19d>; + phandle = <0x186>; + }; + }; + + dp0 { + + dp0m0-pins { + rockchip,pins = <0x04 0x0c 0x05 0x198>; + phandle = <0x31c>; + }; + + dp0m2-pins { + rockchip,pins = <0x01 0x00 0x05 0x198>; + phandle = <0x31e>; + }; + + dp0m1-pins { + rockchip,pins = <0x00 0x14 0x0a 0x198>; + phandle = <0x31d>; + }; + }; + + pcfg-pull-none-drv-level-5-smt { + drive-strength = <0x05>; + bias-disable; + input-schmitt-enable; + phandle = <0x19b>; + }; + + pwm3 { + + pwm3m2-pins { + rockchip,pins = <0x01 0x12 0x0b 0x198>; + phandle = <0x3ca>; + }; + + pwm3m1-pins { + rockchip,pins = <0x03 0x0a 0x0b 0x198>; + phandle = <0x3c9>; + }; + + pwm3m0-pins { + rockchip,pins = <0x00 0x1c 0x03 0x198>; + phandle = <0x81>; + }; + + pwm3m3-pins { + rockchip,pins = <0x01 0x07 0x0b 0x198>; + phandle = <0x3cb>; + }; + }; + + pcfg-pull-none-drv-level-1 { + drive-strength = <0x01>; + bias-disable; + phandle = <0x2ee>; + }; + + sata2 { + + sata2m1-pins { + rockchip,pins = <0x01 0x0f 0x06 0x198>; + phandle = <0x3ed>; + }; + + sata2m0-pins { + rockchip,pins = <0x04 0x09 0x06 0x198>; + phandle = <0x3ec>; + }; + }; + + cam { + + cam0-or-cam1-switch-pin { + rockchip,pins = <0x03 0x11 0x00 0x198>; + phandle = <0x1f0>; + }; + }; + + uart2 { + + uart2-rtsn { + rockchip,pins = <0x03 0x0b 0x0a 0x198>; + phandle = <0x427>; + }; + + uart2m1-xfer { + rockchip,pins = <0x04 0x19 0x0a 0x19e 0x04 0x18 0x0a 0x19e>; + phandle = <0x161>; + }; + + uart2m0-xfer { + rockchip,pins = <0x00 0x0e 0x0a 0x19e 0x00 0x0d 0x0a 0x19e>; + phandle = <0x1ce>; + }; + + uart2-ctsn { + rockchip,pins = <0x03 0x0c 0x0a 0x198>; + phandle = <0x426>; + }; + + uart2m2-xfer { + rockchip,pins = <0x03 0x0a 0x0a 0x19e 0x03 0x09 0x0a 0x19e>; + phandle = <0x425>; + }; + }; + + pcfg-pull-down-drv-level-4 { + drive-strength = <0x04>; + bias-pull-down; + phandle = <0x2fb>; + }; + + pcfg-pull-up-drv-level-7 { + drive-strength = <0x07>; + phandle = <0x45a>; + bias-pull-up; + }; + + i2c6 { + + i2c6m4-xfer { + rockchip,pins = <0x03 0x01 0x09 0x19d 0x03 0x00 0x09 0x19d>; + phandle = <0x36c>; + }; + + i2c6m3-xfer { + rockchip,pins = <0x04 0x09 0x09 0x19d 0x04 0x08 0x09 0x19d>; + phandle = <0x36b>; + }; + + i2c6m2-xfer { + rockchip,pins = <0x02 0x13 0x09 0x19d 0x02 0x12 0x09 0x19d>; + phandle = <0x36d>; + }; + + i2c6m1-xfer { + rockchip,pins = <0x01 0x13 0x09 0x19d 0x01 0x12 0x09 0x19d>; + phandle = <0x36a>; + }; + + i2c6m0-xfer { + rockchip,pins = <0x00 0x18 0x09 0x19d 0x00 0x17 0x09 0x19d>; + phandle = <0x178>; + }; + }; + + pdm1 { + + pdm1m1-sdi3 { + rockchip,pins = <0x01 0x0a 0x02 0x198>; + phandle = <0x3c1>; + }; + + pdm1m0-clk { + rockchip,pins = <0x04 0x1d 0x02 0x198>; + phandle = <0x140>; + }; + + pdm1m1-sdi1 { + rockchip,pins = <0x01 0x08 0x02 0x198>; + phandle = <0x3bf>; + }; + + pdm1m0-sdi3 { + rockchip,pins = <0x04 0x18 0x02 0x198>; + phandle = <0x13e>; + }; + + pdm1m0-sdi1 { + rockchip,pins = <0x04 0x1a 0x02 0x198>; + phandle = <0x13c>; + }; + + pdm1m1-clk { + rockchip,pins = <0x01 0x0c 0x02 0x198>; + phandle = <0x3bb>; + }; + + pdm1m1-clk1 { + rockchip,pins = <0x01 0x0b 0x02 0x198>; + phandle = <0x3bc>; + }; + + pdm1m1-idle { + rockchip,pins = <0x01 0x0c 0x00 0x198 0x01 0x0b 0x00 0x198>; + phandle = <0x3bd>; + }; + + pdm1m0-clk1 { + rockchip,pins = <0x04 0x1c 0x02 0x198>; + phandle = <0x141>; + }; + + pdm1m1-sdi2 { + rockchip,pins = <0x01 0x09 0x02 0x198>; + phandle = <0x3c0>; + }; + + pdm1m0-idle { + rockchip,pins = <0x04 0x1d 0x00 0x198 0x04 0x1c 0x00 0x198>; + phandle = <0x13f>; + }; + + pdm1m1-sdi0 { + rockchip,pins = <0x01 0x07 0x02 0x198>; + phandle = <0x3be>; + }; + + pdm1m0-sdi2 { + rockchip,pins = <0x04 0x19 0x02 0x198>; + phandle = <0x13d>; + }; + + pdm1m0-sdi0 { + rockchip,pins = <0x04 0x1b 0x02 0x198>; + phandle = <0x13b>; + }; + }; + + cpu { + + cpu-pins { + rockchip,pins = <0x00 0x19 0x02 0x198 0x00 0x1d 0x02 0x198>; + phandle = <0x317>; + }; + }; + + gpio-func { + + tsadc-gpio-func { + rockchip,pins = <0x00 0x01 0x00 0x198>; + phandle = <0x175>; + }; + }; + + pcie20x1 { + + pcie20x1-2-button-rstn { + rockchip,pins = <0x04 0x0b 0x04 0x198>; + phandle = <0x3a3>; + }; + + pcie20x1m1-pins { + rockchip,pins = <0x04 0x0f 0x04 0x198 0x04 0x11 0x04 0x198 0x04 0x10 0x04 0x198>; + phandle = <0x3a2>; + }; + + pcie20x1m0-pins { + rockchip,pins = <0x03 0x17 0x04 0x198 0x03 0x19 0x04 0x198 0x03 0x18 0x04 0x198>; + phandle = <0x3a1>; + }; + }; + + leds { + + leds-gpio { + rockchip,pins = <0x00 0x15 0x00 0x198>; + phandle = <0x1ee>; + }; + }; + + pwm1 { + + pwm1m1-pins { + rockchip,pins = <0x01 0x1b 0x0b 0x198>; + phandle = <0x3c5>; + }; + + pwm1m0-pins { + rockchip,pins = <0x00 0x10 0x03 0x198>; + phandle = <0x7f>; + }; + + pwm1m2-pins { + rockchip,pins = <0x01 0x03 0x0b 0x198>; + phandle = <0x3c6>; + }; + }; + + sata0 { + + sata0m1-pins { + rockchip,pins = <0x01 0x0b 0x06 0x198>; + phandle = <0x3e9>; + }; + + sata0m0-pins { + rockchip,pins = <0x04 0x0e 0x06 0x198>; + phandle = <0x3e8>; + }; + }; + + refclk { + + refclk-pins { + rockchip,pins = <0x00 0x00 0x01 0x198>; + phandle = <0x3e5>; + }; + }; + + pcie30x4 { + + pcie30x4m2-pins { + rockchip,pins = <0x03 0x14 0x04 0x198 0x03 0x16 0x04 0x198 0x03 0x15 0x04 0x198>; + phandle = <0x3b1>; + }; + + pcie30x4m1-pins { + rockchip,pins = <0x04 0x0c 0x04 0x198 0x04 0x0e 0x04 0x198 0x04 0x0d 0x04 0x198>; + phandle = <0x3b0>; + }; + + pcie30x4-button-rstn { + rockchip,pins = <0x03 0x1d 0x04 0x198>; + phandle = <0x3b3>; + }; + + pcie30x4m0-pins { + rockchip,pins = <0x00 0x16 0x0c 0x198 0x00 0x18 0x0c 0x198 0x00 0x17 0x0c 0x198>; + phandle = <0x3af>; + }; + + pcie30x4m3-pins { + rockchip,pins = <0x01 0x08 0x04 0x198 0x01 0x0a 0x04 0x198 0x01 0x09 0x04 0x198>; + phandle = <0x3b2>; + }; + }; + + can2 { + + can2m1-pins { + rockchip,pins = <0x00 0x1c 0x0a 0x198 0x00 0x1d 0x0a 0x198>; + phandle = <0x30f>; + }; + + can2m0-pins { + rockchip,pins = <0x03 0x14 0x09 0x198 0x03 0x15 0x09 0x198>; + phandle = <0x147>; + }; + }; + + litcpu { + + litcpu-pins { + rockchip,pins = <0x00 0x1b 0x01 0x198>; + phandle = <0x392>; + }; + }; + + sata { + + sata-reset { + rockchip,pins = <0x04 0x11 0x00 0x198>; + phandle = <0x3e7>; + }; + + sata-pins { + rockchip,pins = <0x00 0x16 0x0d 0x198 0x00 0x1c 0x0d 0x198 0x00 0x1d 0x0d 0x198>; + phandle = <0x3e6>; + }; + }; + + tsadc { + + tsadc-shut { + rockchip,pins = <0x00 0x01 0x02 0x198>; + phandle = <0x176>; + }; + + tsadc-shut-org { + rockchip,pins = <0x00 0x01 0x01 0x198>; + phandle = <0x418>; + }; + + tsadcm1-shut { + rockchip,pins = <0x00 0x02 0x02 0x198>; + phandle = <0x417>; + }; + }; + + uart0 { + + uart0m1-xfer { + rockchip,pins = <0x00 0x08 0x04 0x19e 0x00 0x09 0x04 0x19e>; + phandle = <0x7d>; + }; + + uart0m0-xfer { + rockchip,pins = <0x00 0x14 0x04 0x19e 0x00 0x15 0x04 0x19e>; + phandle = <0x419>; + }; + + uart0-rtsn { + rockchip,pins = <0x00 0x16 0x04 0x198>; + phandle = <0x41c>; + }; + + uart0-ctsn { + rockchip,pins = <0x00 0x19 0x04 0x198>; + phandle = <0x41b>; + }; + + uart0m2-xfer { + rockchip,pins = <0x04 0x04 0x0a 0x19e 0x04 0x03 0x0a 0x19e>; + phandle = <0x41a>; + }; + }; + + pcfg-pull-down-drv-level-2 { + drive-strength = <0x02>; + bias-pull-down; + phandle = <0x2f9>; + }; + + pcfg-pull-up-drv-level-5 { + drive-strength = <0x05>; + phandle = <0x2f6>; + bias-pull-up; + }; + + gpio@fec20000 { + gpio-controller; + interrupts = <0x00 0x116 0x04>; + clocks = <0x02 0x7d 0x02 0x7e>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec20000 0x00 0x100>; + phandle = <0xfe>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x20 0x20>; + interrupt-controller; + }; + + pcfg-pull-none-drv-level-15 { + drive-strength = <0x0f>; + bias-disable; + phandle = <0x459>; + }; + + eth1 { + + eth1-pins { + rockchip,pins = <0x03 0x06 0x01 0x198>; + phandle = <0x327>; + }; + }; + + i2c4 { + + i2c4m3-xfer { + rockchip,pins = <0x01 0x03 0x09 0x19d 0x01 0x02 0x09 0x19d>; + phandle = <0x364>; + }; + + i2c4m2-xfer { + rockchip,pins = <0x00 0x15 0x09 0x19d 0x00 0x14 0x09 0x19d>; + phandle = <0x363>; + }; + + i2c4m1-xfer { + rockchip,pins = <0x02 0x0d 0x09 0x19d 0x02 0x0c 0x09 0x19d>; + phandle = <0x14b>; + }; + + i2c4m0-xfer { + rockchip,pins = <0x03 0x06 0x09 0x19d 0x03 0x05 0x09 0x19d>; + phandle = <0x362>; + }; + + i2c4m4-xfer { + rockchip,pins = <0x01 0x17 0x09 0x19d 0x01 0x16 0x09 0x19d>; + phandle = <0x365>; + }; + }; + + emmc { + + emmc-data-strobe { + rockchip,pins = <0x02 0x02 0x01 0x198>; + phandle = <0x326>; + }; + + emmc-clk { + rockchip,pins = <0x02 0x01 0x01 0x199>; + phandle = <0x324>; + }; + + emmc-bus8 { + rockchip,pins = <0x02 0x18 0x01 0x199 0x02 0x19 0x01 0x199 0x02 0x1a 0x01 0x199 0x02 0x1b 0x01 0x199 0x02 0x1c 0x01 0x199 0x02 0x1d 0x01 0x199 0x02 0x1e 0x01 0x199 0x02 0x1f 0x01 0x199>; + phandle = <0x323>; + }; + + emmc-cmd { + rockchip,pins = <0x02 0x00 0x01 0x199>; + phandle = <0x325>; + }; + + emmc-rstnout { + rockchip,pins = <0x02 0x03 0x01 0x198>; + phandle = <0x322>; + }; + }; + + pcfg-pull-none-drv-level-8 { + drive-strength = <0x08>; + bias-disable; + phandle = <0x452>; + }; + + pwm15 { + + pwm15m0-pins { + rockchip,pins = <0x03 0x13 0x0b 0x198>; + phandle = <0x174>; + }; + + pwm15m3-pins { + rockchip,pins = <0x01 0x1f 0x0b 0x198>; + phandle = <0x3e4>; + }; + + pwm15m2-pins { + rockchip,pins = <0x01 0x16 0x0b 0x198>; + phandle = <0x3e3>; + }; + + pwm15m1-pins { + rockchip,pins = <0x04 0x0b 0x0b 0x198>; + phandle = <0x3e2>; + }; + }; + + pcie30x2 { + + pcie30x2m2-pins { + rockchip,pins = <0x03 0x1a 0x04 0x198 0x03 0x1c 0x04 0x198 0x03 0x1b 0x04 0x198>; + phandle = <0x3ac>; + }; + + pcie30x2m1-pins { + rockchip,pins = <0x04 0x06 0x04 0x198 0x04 0x08 0x04 0x198 0x04 0x07 0x04 0x198>; + phandle = <0x3ab>; + }; + + pcie30x2-button-rstn { + rockchip,pins = <0x03 0x11 0x04 0x198>; + phandle = <0x3ae>; + }; + + pcie30x2m0-pins { + rockchip,pins = <0x00 0x19 0x0c 0x198 0x00 0x1c 0x0c 0x198 0x00 0x1a 0x0c 0x198>; + phandle = <0x3aa>; + }; + + pcie30x2m3-pins { + rockchip,pins = <0x01 0x1f 0x04 0x198 0x01 0x0f 0x04 0x198 0x01 0x0e 0x04 0x198>; + phandle = <0x3ad>; + }; + }; + + can0 { + + can0m0-pins { + rockchip,pins = <0x00 0x10 0x0b 0x198 0x00 0x0f 0x0b 0x198>; + phandle = <0x145>; + }; + + can0m1-pins { + rockchip,pins = <0x04 0x1d 0x09 0x198 0x04 0x1c 0x09 0x198>; + phandle = <0x30d>; + }; + }; + + pcfg-output-high { + output-high; + phandle = <0x305>; + }; + + uart9 { + + uart9m0-rtsn { + rockchip,pins = <0x04 0x14 0x0a 0x198>; + phandle = <0x44e>; + }; + + uart9m2-ctsn { + rockchip,pins = <0x03 0x1b 0x0a 0x198>; + phandle = <0x44a>; + }; + + uart9m1-ctsn { + rockchip,pins = <0x04 0x01 0x0a 0x198>; + phandle = <0x447>; + }; + + uart9m2-xfer { + rockchip,pins = <0x03 0x1c 0x0a 0x19e 0x03 0x1d 0x0a 0x19e>; + phandle = <0x449>; + }; + + uart9m0-ctsn { + rockchip,pins = <0x04 0x15 0x0a 0x198>; + phandle = <0x44d>; + }; + + uart9m1-xfer { + rockchip,pins = <0x04 0x0d 0x0a 0x19e 0x04 0x0c 0x0a 0x19e>; + phandle = <0x168>; + }; + + uart9m0-xfer { + rockchip,pins = <0x02 0x14 0x0a 0x19e 0x02 0x12 0x0a 0x19e>; + phandle = <0x44c>; + }; + + uart9m2-rtsn { + rockchip,pins = <0x03 0x1a 0x0a 0x198>; + phandle = <0x44b>; + }; + + uart9m1-rtsn { + rockchip,pins = <0x04 0x00 0x0a 0x198>; + phandle = <0x448>; + }; + }; + + pcfg-pull-none-drv-level-2-smt { + drive-strength = <0x02>; + bias-disable; + input-schmitt-enable; + phandle = <0x301>; + }; + + pcfg-pull-up { + phandle = <0x19e>; + bias-pull-up; + }; + + spi3 { + + spi3m3-cs1 { + rockchip,pins = <0x03 0x15 0x08 0x19a>; + phandle = <0x40e>; + }; + + spi3m1-cs0 { + rockchip,pins = <0x04 0x10 0x08 0x19a>; + phandle = <0x15d>; + }; + + spi3m3-pins { + rockchip,pins = <0x03 0x18 0x08 0x19a 0x03 0x16 0x08 0x19a 0x03 0x17 0x08 0x19a>; + phandle = <0x40c>; + }; + + spi3m0-cs1 { + rockchip,pins = <0x04 0x13 0x08 0x19f>; + phandle = <0x411>; + }; + + spi3m2-cs0 { + rockchip,pins = <0x00 0x1c 0x08 0x19a>; + phandle = <0x40a>; + }; + + spi3m2-pins { + rockchip,pins = <0x00 0x1b 0x08 0x19a 0x00 0x18 0x08 0x19a 0x00 0x1a 0x08 0x19a>; + phandle = <0x409>; + }; + + spi3m1-cs1 { + rockchip,pins = <0x04 0x11 0x08 0x19a>; + phandle = <0x15e>; + }; + + spi3m1-pins { + rockchip,pins = <0x04 0x0f 0x08 0x19a 0x04 0x0d 0x08 0x19a 0x04 0x0e 0x08 0x19a>; + phandle = <0x15f>; + }; + + spi3m3-cs0 { + rockchip,pins = <0x03 0x14 0x08 0x19a>; + phandle = <0x40d>; + }; + + spi3m0-pins { + rockchip,pins = <0x04 0x16 0x08 0x19f 0x04 0x14 0x08 0x19f 0x04 0x15 0x08 0x19f>; + phandle = <0x40f>; + }; + + spi3m2-cs1 { + rockchip,pins = <0x00 0x1d 0x08 0x19a>; + phandle = <0x40b>; + }; + + spi3m0-cs0 { + rockchip,pins = <0x04 0x12 0x08 0x19f>; + phandle = <0x410>; + }; + }; + + pcfg-pull-down-drv-level-14 { + drive-strength = <0x0e>; + bias-pull-down; + phandle = <0x46a>; + }; + + bt656 { + + bt656-pins { + rockchip,pins = <0x04 0x08 0x02 0x1a0 0x04 0x00 0x02 0x1a0 0x04 0x01 0x02 0x1a0 0x04 0x02 0x02 0x1a0 0x04 0x03 0x02 0x1a0 0x04 0x04 0x02 0x1a0 0x04 0x05 0x02 0x1a0 0x04 0x06 0x02 0x1a0 0x04 0x07 0x02 0x1a0>; + phandle = <0x450>; + }; + }; + + pcfg-pull-down-drv-level-0 { + drive-strength = <0x00>; + bias-pull-down; + phandle = <0x2f7>; + }; + + pcfg-pull-up-drv-level-3 { + drive-strength = <0x03>; + phandle = <0x2f4>; + bias-pull-up; + }; + + i2s2 { + + i2s2m0-lrck { + rockchip,pins = <0x02 0x10 0x02 0x19d>; + phandle = <0x389>; + }; + + i2s2m1-mclk { + rockchip,pins = <0x03 0x0c 0x03 0x19d>; + phandle = <0x387>; + }; + + i2s2m0-mclk { + rockchip,pins = <0x02 0x0e 0x02 0x19d>; + phandle = <0x38a>; + }; + + i2s2m1-sdo { + rockchip,pins = <0x03 0x0b 0x03 0x198>; + phandle = <0x12b>; + }; + + i2s2m0-sdi { + rockchip,pins = <0x02 0x13 0x02 0x198>; + phandle = <0x38c>; + }; + + i2s2m1-idle { + rockchip,pins = <0x03 0x0e 0x00 0x198 0x03 0x0d 0x00 0x198>; + phandle = <0x12c>; + }; + + i2s2m1-sdi { + rockchip,pins = <0x03 0x0a 0x03 0x198>; + phandle = <0x12a>; + }; + + i2s2m0-idle { + rockchip,pins = <0x02 0x10 0x00 0x198 0x02 0x0f 0x00 0x198>; + phandle = <0x388>; + }; + + i2s2m1-sclk { + rockchip,pins = <0x03 0x0d 0x03 0x19d>; + phandle = <0x12e>; + }; + + i2s2m1-lrck { + rockchip,pins = <0x03 0x0e 0x03 0x19d>; + phandle = <0x12d>; + }; + + i2s2m0-sclk { + rockchip,pins = <0x02 0x0f 0x02 0x19d>; + phandle = <0x38b>; + }; + + i2s2m0-sdo { + rockchip,pins = <0x04 0x13 0x02 0x198>; + phandle = <0x38d>; + }; + }; + + pcfg-pull-none-drv-level-6-smt { + drive-strength = <0x06>; + bias-disable; + input-schmitt-enable; + phandle = <0x304>; + }; + + ddrphych3 { + + ddrphych3-pins { + rockchip,pins = <0x04 0x0c 0x07 0x198 0x04 0x0d 0x07 0x198 0x04 0x0e 0x07 0x198 0x04 0x0f 0x07 0x198>; + phandle = <0x31b>; + }; + }; + + pcfg-pull-none-drv-level-13 { + drive-strength = <0x0d>; + bias-disable; + phandle = <0x457>; + }; + + i2c2 { + + i2c2m2-xfer { + rockchip,pins = <0x02 0x03 0x09 0x19d 0x02 0x02 0x09 0x19d>; + phandle = <0x35a>; + }; + + i2c2m1-xfer { + rockchip,pins = <0x02 0x11 0x09 0x19d 0x02 0x10 0x09 0x19d>; + phandle = <0x35d>; + }; + + i2c2m0-xfer { + rockchip,pins = <0x00 0x0f 0x09 0x19d 0x00 0x10 0x09 0x19d>; + phandle = <0x149>; + }; + + i2c2m4-xfer { + rockchip,pins = <0x01 0x01 0x09 0x19d 0x01 0x00 0x09 0x19d>; + phandle = <0x35c>; + }; + + i2c2m3-xfer { + rockchip,pins = <0x01 0x15 0x09 0x19d 0x01 0x14 0x09 0x19d>; + phandle = <0x35b>; + }; + }; + + auddsm { + + auddsm-pins { + rockchip,pins = <0x03 0x01 0x04 0x198 0x03 0x02 0x04 0x198 0x03 0x03 0x04 0x198 0x03 0x04 0x04 0x198>; + phandle = <0x144>; + }; + }; + + pwm8 { + + pwm8m2-pins { + rockchip,pins = <0x03 0x18 0x0b 0x198>; + phandle = <0x3d5>; + }; + + pwm8m1-pins { + rockchip,pins = <0x04 0x18 0x0b 0x198>; + phandle = <0x3d4>; + }; + + pwm8m0-pins { + rockchip,pins = <0x03 0x07 0x0b 0x198>; + phandle = <0x16d>; + }; + }; + + pmic { + + pmic-pins { + rockchip,pins = <0x00 0x07 0x00 0x19e 0x00 0x02 0x01 0x198 0x00 0x03 0x01 0x198 0x00 0x11 0x01 0x198 0x00 0x12 0x01 0x198 0x00 0x13 0x01 0x198 0x00 0x1e 0x01 0x198>; + phandle = <0x156>; + }; + }; + + pcfg-pull-none-drv-level-6 { + drive-strength = <0x06>; + bias-disable; + phandle = <0x2f2>; + }; + + jtag { + + jtagm2-pins { + rockchip,pins = <0x00 0x0d 0x02 0x198 0x00 0x0e 0x02 0x198>; + phandle = <0x391>; + }; + + jtagm1-pins { + rockchip,pins = <0x04 0x18 0x05 0x198 0x04 0x19 0x05 0x198>; + phandle = <0x390>; + }; + + jtagm0-pins { + rockchip,pins = <0x04 0x1a 0x05 0x198 0x04 0x1b 0x05 0x198>; + phandle = <0x38f>; + }; + }; + + gpio@fd8a0000 { + gpio-controller; + interrupts = <0x00 0x115 0x04>; + clocks = <0x02 0x284 0x02 0x285>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfd8a0000 0x00 0x100>; + phandle = <0x7b>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x00 0x20>; + interrupt-controller; + }; + + gmac1 { + + gmac1-rgmii-clk { + rockchip,pins = <0x03 0x05 0x01 0x198 0x03 0x04 0x01 0x198>; + phandle = <0x111>; + }; + + gmac1-rx-bus2 { + rockchip,pins = <0x03 0x07 0x01 0x198 0x03 0x08 0x01 0x198 0x03 0x09 0x01 0x198>; + phandle = <0x110>; + }; + + gmac1-txer { + rockchip,pins = <0x03 0x0a 0x01 0x198>; + phandle = <0x332>; + }; + + gmac1-clkinout { + rockchip,pins = <0x03 0x0e 0x01 0x198>; + phandle = <0x32e>; + }; + + gmac1-ptp-ref-clk { + rockchip,pins = <0x03 0x0f 0x01 0x198>; + phandle = <0x331>; + }; + + gmac1-ppsclk { + rockchip,pins = <0x03 0x11 0x01 0x198>; + phandle = <0x32f>; + }; + + gmac1-ppstrig { + rockchip,pins = <0x03 0x10 0x01 0x198>; + phandle = <0x330>; + }; + + gmac1-rgmii-bus { + rockchip,pins = <0x03 0x02 0x01 0x198 0x03 0x03 0x01 0x198 0x03 0x00 0x01 0x19a 0x03 0x01 0x01 0x19a>; + phandle = <0x112>; + }; + + gmac1-tx-bus2 { + rockchip,pins = <0x03 0x0b 0x01 0x19a 0x03 0x0c 0x01 0x19a 0x03 0x0d 0x01 0x198>; + phandle = <0x10f>; + }; + + gmac1-miim { + rockchip,pins = <0x03 0x12 0x01 0x198 0x03 0x13 0x01 0x198>; + phandle = <0x10e>; + }; + }; + + pcfg-pull-none { + bias-disable; + phandle = <0x198>; + }; + + pwm13 { + + pwm13m2-pins { + rockchip,pins = <0x01 0x0f 0x0b 0x198>; + phandle = <0x3df>; + }; + + pwm13m1-pins { + rockchip,pins = <0x04 0x0e 0x0b 0x198>; + phandle = <0x3de>; + }; + + pwm13m0-pins { + rockchip,pins = <0x03 0x0e 0x0b 0x198>; + phandle = <0x172>; + }; + }; + + pcfg-output-high-pull-down { + output-high; + bias-pull-down; + phandle = <0x307>; + }; + + uart7 { + + uart7m1-ctsn { + rockchip,pins = <0x03 0x13 0x0a 0x198>; + phandle = <0x43b>; + }; + + uart7m2-xfer { + rockchip,pins = <0x01 0x0c 0x0a 0x19e 0x01 0x0d 0x0a 0x19e>; + phandle = <0x43d>; + }; + + uart7m0-ctsn { + rockchip,pins = <0x04 0x16 0x0a 0x198>; + phandle = <0x43f>; + }; + + uart7m1-xfer { + rockchip,pins = <0x03 0x11 0x0a 0x19e 0x03 0x10 0x0a 0x19e>; + phandle = <0x166>; + }; + + uart7m0-xfer { + rockchip,pins = <0x02 0x0c 0x0a 0x19e 0x02 0x0d 0x0a 0x19e>; + phandle = <0x43e>; + }; + + uart7m1-rtsn { + rockchip,pins = <0x03 0x12 0x0a 0x198>; + phandle = <0x43c>; + }; + + uart7m0-rtsn { + rockchip,pins = <0x04 0x12 0x0a 0x198>; + phandle = <0x440>; + }; + }; + + pcfg-pull-down-drv-level-9 { + drive-strength = <0x09>; + bias-pull-down; + phandle = <0x465>; + }; + + spi1 { + + spi1m1-cs1 { + rockchip,pins = <0x03 0x13 0x08 0x19a>; + phandle = <0x152>; + }; + + spi1m2-cs1 { + rockchip,pins = <0x01 0x1d 0x08 0x19a>; + phandle = <0x3fe>; + }; + + spi1m0-cs0 { + rockchip,pins = <0x02 0x13 0x08 0x19f>; + phandle = <0x400>; + }; + + spi1m2-pins { + rockchip,pins = <0x01 0x1a 0x08 0x19a 0x01 0x18 0x08 0x19a 0x01 0x19 0x08 0x19a>; + phandle = <0x3fc>; + }; + + spi1m1-pins { + rockchip,pins = <0x03 0x11 0x08 0x19a 0x03 0x10 0x08 0x19a 0x03 0x0f 0x08 0x19a>; + phandle = <0x153>; + }; + + spi1m1-cs0 { + rockchip,pins = <0x03 0x12 0x08 0x19a>; + phandle = <0x151>; + }; + + spi1m0-pins { + rockchip,pins = <0x02 0x10 0x08 0x19f 0x02 0x11 0x08 0x19f 0x02 0x12 0x08 0x19f>; + phandle = <0x3ff>; + }; + + spi1m0-cs1 { + rockchip,pins = <0x02 0x14 0x08 0x19f>; + phandle = <0x401>; + }; + + spi1m2-cs0 { + rockchip,pins = <0x01 0x1b 0x08 0x19a>; + phandle = <0x3fd>; + }; + }; + + pcfg-pull-up-drv-level-14 { + drive-strength = <0x0e>; + phandle = <0x461>; + bias-pull-up; + }; + + pcfg-output-low-pull-down { + bias-pull-down; + phandle = <0x30b>; + output-low; + }; + + pcfg-pull-down-drv-level-12 { + drive-strength = <0x0c>; + bias-pull-down; + phandle = <0x468>; + }; + + pcfg-pull-up-drv-level-1 { + drive-strength = <0x01>; + phandle = <0x19f>; + bias-pull-up; + }; + + pcfg-pull-none-smt { + bias-disable; + input-schmitt-enable; + phandle = <0x19d>; + }; + + sdmmc { + + sdmmc-det { + rockchip,pins = <0x00 0x04 0x01 0x19e>; + phandle = <0x116>; + }; + + sdmmc-pwren { + rockchip,pins = <0x00 0x05 0x02 0x198>; + phandle = <0x3ef>; + }; + + sdmmc-bus4 { + rockchip,pins = <0x04 0x18 0x01 0x199 0x04 0x19 0x01 0x199 0x04 0x1a 0x01 0x199 0x04 0x1b 0x01 0x199>; + phandle = <0x117>; + }; + + sdmmc-cmd { + rockchip,pins = <0x04 0x1c 0x01 0x199>; + phandle = <0x115>; + }; + + sdmmc-clk { + rockchip,pins = <0x04 0x1d 0x01 0x199>; + phandle = <0x114>; + }; + }; + + i2s0 { + + i2s0-sclk { + rockchip,pins = <0x01 0x13 0x01 0x19d>; + phandle = <0x11c>; + }; + + i2s0-sdo3 { + rockchip,pins = <0x01 0x1a 0x01 0x198>; + phandle = <0x37a>; + }; + + i2s0-lrck { + rockchip,pins = <0x01 0x15 0x01 0x19d>; + phandle = <0x11b>; + }; + + i2s0-sdo1 { + rockchip,pins = <0x01 0x18 0x01 0x198>; + phandle = <0x378>; + }; + + i2s0-sdi3 { + rockchip,pins = <0x01 0x19 0x02 0x198>; + phandle = <0x377>; + }; + + i2s0-mclk { + rockchip,pins = <0x01 0x12 0x01 0x19d>; + phandle = <0x17a>; + }; + + i2s0-sdi1 { + rockchip,pins = <0x01 0x1b 0x02 0x198>; + phandle = <0x375>; + }; + + i2s0-sdo2 { + rockchip,pins = <0x01 0x19 0x01 0x198>; + phandle = <0x379>; + }; + + i2s0-idle { + rockchip,pins = <0x01 0x15 0x00 0x198 0x01 0x13 0x00 0x198>; + phandle = <0x11f>; + }; + + i2s0-sdo0 { + rockchip,pins = <0x01 0x17 0x01 0x198>; + phandle = <0x11e>; + }; + + i2s0-sdi2 { + rockchip,pins = <0x01 0x1a 0x02 0x198>; + phandle = <0x376>; + }; + + i2s0-sdi0 { + rockchip,pins = <0x01 0x1c 0x02 0x198>; + phandle = <0x11d>; + }; + }; + + ddrphych1 { + + ddrphych1-pins { + rockchip,pins = <0x04 0x04 0x07 0x198 0x04 0x05 0x07 0x198 0x04 0x06 0x07 0x198 0x04 0x07 0x07 0x198>; + phandle = <0x319>; + }; + }; + + pcfg-pull-none-drv-level-11 { + drive-strength = <0x0b>; + bias-disable; + phandle = <0x455>; + }; + + i2c0 { + + i2c0m2-xfer { + rockchip,pins = <0x00 0x19 0x03 0x19d 0x00 0x1a 0x03 0x19d>; + phandle = <0x77>; + }; + + i2c0m1-xfer { + rockchip,pins = <0x04 0x15 0x09 0x19d 0x04 0x16 0x09 0x19d>; + phandle = <0x355>; + }; + + i2c0m0-xfer { + rockchip,pins = <0x00 0x0b 0x02 0x19d 0x00 0x06 0x02 0x19d>; + phandle = <0x354>; + }; + }; + + pwm6 { + + pwm6m2-pins { + rockchip,pins = <0x04 0x15 0x0b 0x198>; + phandle = <0x3d0>; + }; + + pwm6m1-pins { + rockchip,pins = <0x04 0x11 0x0b 0x198>; + phandle = <0x3cf>; + }; + + pwm6m0-pins { + rockchip,pins = <0x00 0x17 0x0b 0x198>; + phandle = <0x16b>; + }; + }; + + hym8563 { + + hym8563-int { + rockchip,pins = <0x00 0x08 0x00 0x198>; + phandle = <0x7a>; + }; + }; + + pcfg-pull-none-drv-level-4 { + drive-strength = <0x04>; + bias-disable; + phandle = <0x2f0>; + }; + + pcfg-output-high-pull-up { + output-high; + phandle = <0x306>; + bias-pull-up; + }; + + pwm11 { + + pwm11m3-pins { + rockchip,pins = <0x03 0x1d 0x0b 0x198>; + phandle = <0x3dc>; + }; + + pwm11m2-pins { + rockchip,pins = <0x01 0x14 0x0b 0x198>; + phandle = <0x3db>; + }; + + pwm11m1-pins { + rockchip,pins = <0x04 0x0c 0x0b 0x198>; + phandle = <0x3da>; + }; + + pwm11m0-pins { + rockchip,pins = <0x03 0x01 0x0b 0x198>; + phandle = <0x170>; + }; + }; + + bt1120 { + + bt1120-pins { + rockchip,pins = <0x04 0x08 0x02 0x198 0x04 0x00 0x02 0x198 0x04 0x01 0x02 0x198 0x04 0x02 0x02 0x198 0x04 0x03 0x02 0x198 0x04 0x04 0x02 0x198 0x04 0x05 0x02 0x198 0x04 0x06 0x02 0x198 0x04 0x07 0x02 0x198 0x04 0x0a 0x02 0x198 0x04 0x0b 0x02 0x198 0x04 0x0c 0x02 0x198 0x04 0x0d 0x02 0x198 0x04 0x0e 0x02 0x198 0x04 0x0f 0x02 0x198 0x04 0x10 0x02 0x198 0x04 0x11 0x02 0x198>; + phandle = <0x71>; + }; + }; + + pcfg-output-low-pull-up { + phandle = <0x30a>; + bias-pull-up; + output-low; + }; + + uart5 { + + uart5m1-ctsn { + rockchip,pins = <0x02 0x02 0x0a 0x198>; + phandle = <0x433>; + }; + + uart5m2-xfer { + rockchip,pins = <0x02 0x1c 0x0a 0x19e 0x02 0x1d 0x0a 0x19e>; + phandle = <0x435>; + }; + + uart5m0-ctsn { + rockchip,pins = <0x04 0x1a 0x0a 0x198>; + phandle = <0x431>; + }; + + uart5m1-xfer { + rockchip,pins = <0x03 0x15 0x0a 0x19e 0x03 0x14 0x0a 0x19e>; + phandle = <0x164>; + }; + + uart5m0-xfer { + rockchip,pins = <0x04 0x1c 0x0a 0x19e 0x04 0x1d 0x0a 0x19e>; + phandle = <0x430>; + }; + + uart5m1-rtsn { + rockchip,pins = <0x02 0x03 0x0a 0x198>; + phandle = <0x434>; + }; + + uart5m0-rtsn { + rockchip,pins = <0x04 0x1b 0x0a 0x198>; + phandle = <0x432>; + }; + }; + + sdio { + + sdiom1-pins { + rockchip,pins = <0x03 0x05 0x02 0x198 0x03 0x04 0x02 0x19e 0x03 0x00 0x02 0x19e 0x03 0x01 0x02 0x19e 0x03 0x02 0x02 0x19e 0x03 0x03 0x02 0x19e>; + phandle = <0x119>; + }; + + sdiom0-pins { + rockchip,pins = <0x02 0x0b 0x02 0x198 0x02 0x0a 0x02 0x19e 0x02 0x06 0x02 0x19e 0x02 0x07 0x02 0x19e 0x02 0x08 0x02 0x19e 0x02 0x09 0x02 0x19e>; + phandle = <0x3ee>; + }; + }; + + spdif1 { + + spdif1m0-tx { + rockchip,pins = <0x01 0x0f 0x03 0x198>; + phandle = <0x143>; + }; + + spdif1m2-tx { + rockchip,pins = <0x04 0x11 0x03 0x198>; + phandle = <0x3f2>; + }; + + spdif1m1-tx { + rockchip,pins = <0x04 0x09 0x02 0x198>; + phandle = <0x3f1>; + }; + }; + + pcfg-pull-down-drv-level-7 { + drive-strength = <0x07>; + bias-pull-down; + phandle = <0x463>; + }; + + gpio@fec30000 { + gpio-controller; + interrupts = <0x00 0x117 0x04>; + clocks = <0x02 0x7f 0x02 0x80>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec30000 0x00 0x100>; + phandle = <0x79>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x40 0x20>; + interrupt-controller; + }; + + pcfg-pull-up-drv-level-12 { + drive-strength = <0x0c>; + phandle = <0x45f>; + bias-pull-up; + }; + + pcfg-pull-down-drv-level-10 { + drive-strength = <0x0a>; + bias-pull-down; + phandle = <0x466>; + }; + + dp1 { + + dp1m1-pins { + rockchip,pins = <0x00 0x15 0x0a 0x198>; + phandle = <0x320>; + }; + + dp1m0-pins { + rockchip,pins = <0x03 0x1d 0x05 0x198>; + phandle = <0x31f>; + }; + + dp1m2-pins { + rockchip,pins = <0x01 0x01 0x05 0x198>; + phandle = <0x321>; + }; + }; + + vop { + + vop-pins { + rockchip,pins = <0x01 0x02 0x01 0x198>; + phandle = <0x44f>; + }; + }; + + pwm4 { + + pwm4m1-pins { + rockchip,pins = <0x04 0x13 0x0b 0x198>; + phandle = <0x3cc>; + }; + + pwm4m0-pins { + rockchip,pins = <0x00 0x15 0x0b 0x198>; + phandle = <0x169>; + }; + }; + + pcfg-pull-none-drv-level-2 { + drive-strength = <0x02>; + bias-disable; + phandle = <0x1a0>; + }; + + pcfg-pull-none-drv-level-3-smt { + drive-strength = <0x03>; + bias-disable; + input-schmitt-enable; + phandle = <0x302>; + }; + + uart3 { + + uart3m2-xfer { + rockchip,pins = <0x04 0x06 0x0a 0x19e 0x04 0x05 0x0a 0x19e>; + phandle = <0x429>; + }; + + uart3m1-xfer { + rockchip,pins = <0x03 0x0e 0x0a 0x19e 0x03 0x0d 0x0a 0x19e>; + phandle = <0x162>; + }; + + uart3-ctsn { + rockchip,pins = <0x01 0x13 0x0a 0x198>; + phandle = <0x42a>; + }; + + uart3m0-xfer { + rockchip,pins = <0x01 0x10 0x0a 0x19e 0x01 0x11 0x0a 0x19e>; + phandle = <0x428>; + }; + + uart3-rtsn { + rockchip,pins = <0x01 0x12 0x0a 0x198>; + phandle = <0x42b>; + }; + }; + + pcfg-pull-down-drv-level-5 { + drive-strength = <0x05>; + bias-pull-down; + phandle = <0x2fc>; + }; + + pcfg-pull-up-drv-level-8 { + drive-strength = <0x08>; + phandle = <0x45b>; + bias-pull-up; + }; + + pcfg-pull-up-drv-level-10 { + drive-strength = <0x0a>; + phandle = <0x45d>; + bias-pull-up; + }; + + pcfg-output-low { + phandle = <0x309>; + output-low; + }; + + i2c7 { + + i2c7m3-xfer { + rockchip,pins = <0x04 0x0a 0x09 0x19d 0x04 0x0b 0x09 0x19d>; + phandle = <0x36f>; + }; + + i2c7m2-xfer { + rockchip,pins = <0x03 0x1a 0x09 0x19d 0x03 0x1b 0x09 0x19d>; + phandle = <0x36e>; + }; + + i2c7m1-xfer { + rockchip,pins = <0x04 0x13 0x09 0x19d 0x04 0x14 0x09 0x19d>; + phandle = <0x370>; + }; + + i2c7m0-xfer { + rockchip,pins = <0x01 0x18 0x09 0x19d 0x01 0x19 0x09 0x19d>; + phandle = <0x185>; + }; + }; + + pwm2 { + + pwm2m2-pins { + rockchip,pins = <0x04 0x12 0x0b 0x198>; + phandle = <0x3c8>; + }; + + pwm2m1-pins { + rockchip,pins = <0x03 0x09 0x0b 0x198>; + phandle = <0x3c7>; + }; + + pwm2m0-pins { + rockchip,pins = <0x00 0x14 0x03 0x198>; + phandle = <0x80>; + }; + }; + + pcfg-pull-none-drv-level-0 { + drive-strength = <0x00>; + bias-disable; + phandle = <0x2ed>; + }; + + sata1 { + + sata1m1-pins { + rockchip,pins = <0x01 0x01 0x06 0x198>; + phandle = <0x3eb>; + }; + + sata1m0-pins { + rockchip,pins = <0x04 0x0d 0x06 0x198>; + phandle = <0x3ea>; + }; + }; + + pmu { + + pmu-pins { + rockchip,pins = <0x00 0x05 0x03 0x198>; + phandle = <0x3c2>; + }; + }; + + hdmirx { + + hdmirx-det { + rockchip,pins = <0x01 0x1d 0x00 0x198>; + phandle = <0x1b4>; + }; + }; + + uart1 { + + uart1m0-ctsn { + rockchip,pins = <0x02 0x11 0x0a 0x198>; + phandle = <0x423>; + }; + + uart1m1-xfer { + rockchip,pins = <0x01 0x0f 0x0a 0x19e 0x01 0x0e 0x0a 0x19e>; + phandle = <0x160>; + }; + + uart1m0-xfer { + rockchip,pins = <0x02 0x0e 0x0a 0x19e 0x02 0x0f 0x0a 0x19e>; + phandle = <0x422>; + }; + + uart1m2-rtsn { + rockchip,pins = <0x00 0x17 0x0a 0x198>; + phandle = <0x421>; + }; + + uart1m1-rtsn { + rockchip,pins = <0x01 0x1e 0x0a 0x198>; + phandle = <0x41e>; + }; + + uart1m0-rtsn { + rockchip,pins = <0x02 0x10 0x0a 0x198>; + phandle = <0x424>; + }; + + uart1m2-ctsn { + rockchip,pins = <0x00 0x18 0x0a 0x198>; + phandle = <0x420>; + }; + + uart1m1-ctsn { + rockchip,pins = <0x01 0x1f 0x0a 0x198>; + phandle = <0x41d>; + }; + + uart1m2-xfer { + rockchip,pins = <0x00 0x1a 0x0a 0x19e 0x00 0x19 0x0a 0x19e>; + phandle = <0x41f>; + }; + }; + + hdmi { + + hdmim1-rx-cec { + rockchip,pins = <0x03 0x19 0x05 0x198>; + phandle = <0x338>; + }; + + hdmim0-rx-scl { + rockchip,pins = <0x00 0x1a 0x0b 0x198>; + phandle = <0x336>; + }; + + hdmim0-rx-sda { + rockchip,pins = <0x00 0x19 0x0b 0x198>; + phandle = <0x337>; + }; + + hdmim0-tx0-cec { + rockchip,pins = <0x04 0x11 0x05 0x198>; + phandle = <0xf9>; + }; + + hdmim2-rx-cec { + rockchip,pins = <0x01 0x0f 0x05 0x198>; + phandle = <0x342>; + }; + + hdmim1-rx-scl { + rockchip,pins = <0x03 0x1a 0x05 0x19d>; + phandle = <0x33a>; + }; + + hdmim1-rx-sda { + rockchip,pins = <0x03 0x1b 0x05 0x19d>; + phandle = <0x33b>; + }; + + hdmim0-tx0-scl { + rockchip,pins = <0x04 0x0f 0x05 0x19b>; + phandle = <0xfb>; + }; + + hdmim0-tx0-sda { + rockchip,pins = <0x04 0x10 0x05 0x19c>; + phandle = <0xfc>; + }; + + hdmim2-rx-scl { + rockchip,pins = <0x01 0x1e 0x05 0x198>; + phandle = <0x344>; + }; + + hdmim2-rx-sda { + rockchip,pins = <0x01 0x1f 0x05 0x198>; + phandle = <0x345>; + }; + + hdmim0-tx0-hpd { + rockchip,pins = <0x01 0x05 0x05 0x198>; + phandle = <0xfa>; + }; + + hdmim2-rx-hpdin { + rockchip,pins = <0x01 0x0e 0x05 0x198>; + phandle = <0x343>; + }; + + hdmi-debug6 { + rockchip,pins = <0x01 0x00 0x07 0x198>; + phandle = <0x350>; + }; + + hdmim2-tx0-scl { + rockchip,pins = <0x03 0x17 0x05 0x19b>; + phandle = <0x346>; + }; + + hdmim2-tx0-sda { + rockchip,pins = <0x03 0x18 0x05 0x19c>; + phandle = <0x347>; + }; + + hdmi-debug4 { + rockchip,pins = <0x01 0x0b 0x07 0x198>; + phandle = <0x34e>; + }; + + hdmim0-tx1-cec { + rockchip,pins = <0x02 0x14 0x04 0x198>; + phandle = <0x351>; + }; + + hdmim0-tx1-scl { + rockchip,pins = <0x02 0x0d 0x04 0x198>; + phandle = <0x352>; + }; + + hdmim0-tx1-sda { + rockchip,pins = <0x02 0x0c 0x04 0x198>; + phandle = <0x353>; + }; + + hdmi-debug2 { + rockchip,pins = <0x01 0x09 0x07 0x198>; + phandle = <0x34c>; + }; + + hdmim0-tx1-hpd { + rockchip,pins = <0x01 0x06 0x05 0x198>; + phandle = <0x1a9>; + }; + + hdmim1-rx { + rockchip,pins = <0x03 0x19 0x05 0x198 0x03 0x1a 0x05 0x19d 0x03 0x1b 0x05 0x19d 0x03 0x1c 0x05 0x198>; + phandle = <0x1b3>; + }; + + hdmim2-tx1-cec { + rockchip,pins = <0x03 0x14 0x05 0x198>; + phandle = <0x1a8>; + }; + + hdmi-debug0 { + rockchip,pins = <0x01 0x07 0x07 0x198>; + phandle = <0x34a>; + }; + + hdmim2-tx1-scl { + rockchip,pins = <0x01 0x04 0x05 0x19b>; + phandle = <0x348>; + }; + + hdmim2-tx1-sda { + rockchip,pins = <0x01 0x03 0x05 0x19c>; + phandle = <0x349>; + }; + + hdmim1-tx0-cec { + rockchip,pins = <0x00 0x19 0x0d 0x198>; + phandle = <0x33c>; + }; + + hdmim1-tx0-scl { + rockchip,pins = <0x00 0x1d 0x0b 0x19b>; + phandle = <0x33e>; + }; + + hdmim1-tx0-sda { + rockchip,pins = <0x00 0x1c 0x0b 0x19c>; + phandle = <0x33f>; + }; + + hdmim1-tx0-hpd { + rockchip,pins = <0x03 0x1c 0x03 0x198>; + phandle = <0x33d>; + }; + + hdmim0-rx-hpdin { + rockchip,pins = <0x04 0x0e 0x05 0x198>; + phandle = <0x335>; + }; + + hdmi-debug5 { + rockchip,pins = <0x01 0x0c 0x07 0x198>; + phandle = <0x34f>; + }; + + hdmi-debug3 { + rockchip,pins = <0x01 0x0a 0x07 0x198>; + phandle = <0x34d>; + }; + + hdmim1-tx1-cec { + rockchip,pins = <0x00 0x1a 0x0d 0x198>; + phandle = <0x340>; + }; + + hdmi-debug1 { + rockchip,pins = <0x01 0x08 0x07 0x198>; + phandle = <0x34b>; + }; + + hdmim1-tx1-scl { + rockchip,pins = <0x03 0x16 0x05 0x19b>; + phandle = <0x1aa>; + }; + + hdmim1-tx1-sda { + rockchip,pins = <0x03 0x15 0x05 0x19c>; + phandle = <0x1ab>; + }; + + hdmim1-tx1-hpd { + rockchip,pins = <0x03 0x0f 0x05 0x198>; + phandle = <0x341>; + }; + + hdmim1-rx-hpdin { + rockchip,pins = <0x03 0x1c 0x05 0x198>; + phandle = <0x339>; + }; + + hdmim0-rx-cec { + rockchip,pins = <0x04 0x0d 0x05 0x198>; + phandle = <0x334>; + }; + }; + + pcfg-pull-down-drv-level-3 { + drive-strength = <0x03>; + bias-pull-down; + phandle = <0x2fa>; + }; + + pcfg-pull-up-drv-level-6 { + drive-strength = <0x06>; + phandle = <0x19a>; + bias-pull-up; + }; + + i2c5 { + + i2c5m3-xfer { + rockchip,pins = <0x01 0x0e 0x09 0x19d 0x01 0x0f 0x09 0x19d>; + phandle = <0x368>; + }; + + i2c5m2-xfer { + rockchip,pins = <0x04 0x06 0x09 0x19d 0x04 0x07 0x09 0x19d>; + phandle = <0x367>; + }; + + i2c5m1-xfer { + rockchip,pins = <0x04 0x0e 0x09 0x19d 0x04 0x0f 0x09 0x19d>; + phandle = <0x366>; + }; + + i2c5m0-xfer { + rockchip,pins = <0x03 0x17 0x09 0x19d 0x03 0x18 0x09 0x19d>; + phandle = <0x14d>; + }; + + i2c5m4-xfer { + rockchip,pins = <0x02 0x0e 0x09 0x19d 0x02 0x0f 0x09 0x19d>; + phandle = <0x369>; + }; + }; + + pcfg-pull-none-drv-level-9 { + drive-strength = <0x09>; + bias-disable; + phandle = <0x453>; + }; + + pdm0 { + + pdm0m1-sdi3 { + rockchip,pins = <0x00 0x1e 0x02 0x198>; + phandle = <0x3ba>; + }; + + pdm0m1-clk { + rockchip,pins = <0x00 0x10 0x02 0x198>; + phandle = <0x3b4>; + }; + + pdm0m1-sdi1 { + rockchip,pins = <0x00 0x18 0x02 0x198>; + phandle = <0x3b8>; + }; + + pdm0m0-sdi3 { + rockchip,pins = <0x01 0x1b 0x03 0x198>; + phandle = <0x137>; + }; + + pdm0m0-sdi1 { + rockchip,pins = <0x01 0x19 0x03 0x198>; + phandle = <0x135>; + }; + + pdm0m1-clk1 { + rockchip,pins = <0x00 0x14 0x02 0x198>; + phandle = <0x3b5>; + }; + + pdm0m1-idle { + rockchip,pins = <0x00 0x10 0x00 0x198 0x00 0x14 0x00 0x198>; + phandle = <0x3b6>; + }; + + pdm0m0-clk1 { + rockchip,pins = <0x01 0x14 0x03 0x198>; + phandle = <0x13a>; + }; + + pdm0m1-sdi2 { + rockchip,pins = <0x00 0x1c 0x02 0x198>; + phandle = <0x3b9>; + }; + + pdm0m0-idle { + rockchip,pins = <0x01 0x16 0x00 0x198 0x01 0x14 0x00 0x198>; + phandle = <0x138>; + }; + + pdm0m1-sdi0 { + rockchip,pins = <0x00 0x17 0x02 0x198>; + phandle = <0x3b7>; + }; + + pdm0m0-sdi2 { + rockchip,pins = <0x01 0x1a 0x03 0x198>; + phandle = <0x136>; + }; + + pdm0m0-sdi0 { + rockchip,pins = <0x01 0x1d 0x03 0x198>; + phandle = <0x134>; + }; + + pdm0m0-clk { + rockchip,pins = <0x01 0x16 0x03 0x198>; + phandle = <0x139>; + }; + }; + + pcfg-output-high-pull-none { + bias-disable; + output-high; + phandle = <0x308>; + }; + + pwm0 { + + pwm0m1-pins { + rockchip,pins = <0x01 0x1a 0x0b 0x198>; + phandle = <0x3c3>; + }; + + pwm0m0-pins { + rockchip,pins = <0x00 0x0f 0x03 0x198>; + phandle = <0x7e>; + }; + + pwm0m2-pins { + rockchip,pins = <0x01 0x02 0x0b 0x198>; + phandle = <0x3c4>; + }; + }; + + cif { + + cif-dvp-clk { + rockchip,pins = <0x04 0x08 0x01 0x198 0x04 0x0a 0x01 0x198 0x04 0x0b 0x01 0x198>; + phandle = <0x311>; + }; + + cif-clk { + rockchip,pins = <0x04 0x0c 0x01 0x198>; + phandle = <0x310>; + }; + + cif-dvp-bus8 { + rockchip,pins = <0x04 0x00 0x01 0x198 0x04 0x01 0x01 0x198 0x04 0x02 0x01 0x198 0x04 0x03 0x01 0x198 0x04 0x04 0x01 0x198 0x04 0x05 0x01 0x198 0x04 0x06 0x01 0x198 0x04 0x07 0x01 0x198>; + phandle = <0x313>; + }; + + cif-dvp-bus16 { + rockchip,pins = <0x03 0x14 0x01 0x198 0x03 0x15 0x01 0x198 0x03 0x16 0x01 0x198 0x03 0x17 0x01 0x198 0x03 0x18 0x01 0x198 0x03 0x19 0x01 0x198 0x03 0x1a 0x01 0x198 0x03 0x1b 0x01 0x198>; + phandle = <0x312>; + }; + }; + + can1 { + + can1m1-pins { + rockchip,pins = <0x04 0x0a 0x0c 0x198 0x04 0x0b 0x0c 0x198>; + phandle = <0x146>; + }; + + can1m0-pins { + rockchip,pins = <0x03 0x0d 0x09 0x198 0x03 0x0e 0x09 0x198>; + phandle = <0x30e>; + }; + }; + + pcfg-output-low-pull-none { + bias-disable; + phandle = <0x30c>; + output-low; + }; + + gpio@fec40000 { + gpio-controller; + interrupts = <0x00 0x118 0x04>; + clocks = <0x02 0x81 0x02 0x82>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec40000 0x00 0x100>; + phandle = <0x181>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x60 0x20>; + interrupt-controller; + }; + + spi4 { + + spi4m0-cs0 { + rockchip,pins = <0x01 0x13 0x08 0x19a>; + phandle = <0x187>; + }; + + spi4m1-cs0 { + rockchip,pins = <0x03 0x03 0x08 0x19a>; + phandle = <0x413>; + }; + + spi4m2-pins { + rockchip,pins = <0x01 0x02 0x08 0x19a 0x01 0x00 0x08 0x19a 0x01 0x01 0x08 0x19a>; + phandle = <0x415>; + }; + + spi4m0-cs1 { + rockchip,pins = <0x01 0x14 0x08 0x19a>; + phandle = <0x188>; + }; + + spi4m1-pins { + rockchip,pins = <0x03 0x02 0x08 0x19a 0x03 0x00 0x08 0x19a 0x03 0x01 0x08 0x19a>; + phandle = <0x412>; + }; + + spi4m2-cs0 { + rockchip,pins = <0x01 0x03 0x08 0x19a>; + phandle = <0x416>; + }; + + spi4m0-pins { + rockchip,pins = <0x01 0x12 0x08 0x19a 0x01 0x10 0x08 0x19a 0x01 0x11 0x08 0x19a>; + phandle = <0x189>; + }; + + spi4m1-cs1 { + rockchip,pins = <0x03 0x04 0x08 0x19a>; + phandle = <0x414>; + }; + }; + + pcfg-pull-down-drv-level-15 { + drive-strength = <0x0f>; + bias-pull-down; + phandle = <0x46b>; + }; + + pcfg-pull-up-smt { + input-schmitt-enable; + phandle = <0x2fe>; + bias-pull-up; + }; + + pcfg-pull-down-drv-level-1 { + drive-strength = <0x01>; + bias-pull-down; + phandle = <0x2f8>; + }; + + pcfg-pull-up-drv-level-4 { + drive-strength = <0x04>; + phandle = <0x2f5>; + bias-pull-up; + }; + + wireless-wlan { + + wifi-host-wake-irq { + rockchip,pins = <0x00 0x0a 0x00 0x198>; + phandle = <0x1ea>; + }; + }; + + wdt-pc9202 { + + wdt-en-base { + rockchip,pins = <0x00 0x14 0x00 0x198>; + phandle = <0x14c>; + }; + }; + + pcfg-pull-none-drv-level-0-smt { + drive-strength = <0x00>; + bias-disable; + input-schmitt-enable; + phandle = <0x300>; + }; + + i2s3 { + + i2s3-sdi { + rockchip,pins = <0x03 0x04 0x03 0x198>; + phandle = <0x12f>; + }; + + i2s3-idle { + rockchip,pins = <0x03 0x02 0x00 0x198 0x03 0x01 0x00 0x198>; + phandle = <0x131>; + }; + + i2s3-sclk { + rockchip,pins = <0x03 0x01 0x03 0x19d>; + phandle = <0x133>; + }; + + i2s3-lrck { + rockchip,pins = <0x03 0x02 0x03 0x19d>; + phandle = <0x132>; + }; + + i2s3-sdo { + rockchip,pins = <0x03 0x03 0x03 0x198>; + phandle = <0x130>; + }; + + i2s3-mclk { + rockchip,pins = <0x03 0x00 0x03 0x19d>; + phandle = <0x38e>; + }; + }; + + pcfg-pull-none-drv-level-14 { + drive-strength = <0x0e>; + bias-disable; + phandle = <0x458>; + }; + }; + + rkcif-mipi-lvds4-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x473>; + }; + + bt-sco { + #sound-dai-cells = <0x01>; + compatible = "delta,dfbmcs320"; + status = "disabled"; + phandle = <0x1d2>; + }; + + phy@fed80000 { + svid = <0xff01>; + orientation-switch; + sbu2-dc-gpios = <0x10d 0x07 0x00>; + clock-names = "refclk\0immortal\0pclk\0utmi"; + resets = <0x02 0x28 0x02 0x29 0x02 0x2a 0x02 0x2b 0x02 0x482>; + clocks = <0x02 0x2b6 0x02 0x27f 0x02 0x269 0x18d>; + compatible = "rockchip,rk3588-usbdp-phy"; + status = "okay"; + reg = <0x00 0xfed80000 0x00 0x10000>; + phandle = <0x2ea>; + rockchip,usb-grf = <0x74>; + reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; + rockchip,u2phy-grf = <0x18b>; + sbu1-dc-gpios = <0x10d 0x06 0x00>; + rockchip,usbdpphy-grf = <0x18c>; + rockchip,vo-grf = <0xf5>; + + dp-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0xf6>; + }; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@1 { + remote-endpoint = <0x18f>; + reg = <0x01>; + phandle = <0x17f>; + }; + + endpoint@0 { + remote-endpoint = <0x18e>; + reg = <0x00>; + phandle = <0x17e>; + }; + }; + + u3-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x67>; + }; + }; + + interrupt-controller@fe600000 { + #address-cells = <0x02>; + interrupts = <0x01 0x09 0x04>; + #size-cells = <0x02>; + compatible = "arm,gic-v3"; + ranges; + #interrupt-cells = <0x03>; + reg = <0x00 0xfe600000 0x00 0x10000 0x00 0xfe680000 0x00 0x100000>; + phandle = <0x01>; + interrupt-controller; + + msi-controller@fe640000 { + msi-controller; + compatible = "arm,gic-v3-its"; + reg = <0x00 0xfe640000 0x00 0x20000>; + phandle = <0x106>; + #msi-cells = <0x01>; + }; + + msi-controller@fe660000 { + msi-controller; + compatible = "arm,gic-v3-its"; + reg = <0x00 0xfe660000 0x00 0x20000>; + phandle = <0x1b6>; + #msi-cells = <0x01>; + }; + }; + + ethernet@fe1c0000 { + power-domains = <0x60 0x21>; + pinctrl-names = "default"; + phy-mode = "rgmii-rxid"; + snps,mixed-burst; + snps,mtl-rx-config = <0x10b>; + snps,reset-active-low; + pinctrl-0 = <0x10e 0x10f 0x110 0x111 0x112>; + clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; + snps,mtl-tx-config = <0x10c>; + local-mac-address = [de 2f 1a d4 a9 85]; + resets = <0x02 0x20b>; + interrupts = <0x00 0xea 0x04 0x00 0xe9 0x04>; + clocks = <0x02 0x144 0x02 0x145 0x02 0x168 0x02 0x16d 0x02 0x143>; + clock_in_out = "output"; + snps,tso; + compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; + status = "okay"; + rockchip,grf = <0xc8>; + interrupt-names = "macirq\0eth_wake_irq"; + snps,reset-gpio = <0x10d 0x08 0x01>; + reg = <0x00 0xfe1c0000 0x00 0x10000>; + rockchip,php_grf = <0x76>; + phandle = <0x109>; + phy-handle = <0x113>; + reset-names = "stmmaceth"; + tx_delay = <0x40>; + snps,axi-config = <0x10a>; + snps,reset-delays-us = <0x00 0x4e20 0x186a0>; + + mdio { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "snps,dwmac-mdio"; + phandle = <0x28f>; + + phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x01>; + phandle = <0x113>; + }; + }; + + tx-queues-config { + phandle = <0x10c>; + snps,tx-queues-to-use = <0x01>; + + queue0 { + }; + }; + + stmmac-axi-config { + snps,wr_osr_lmt = <0x04>; + phandle = <0x10a>; + snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; + snps,rd_osr_lmt = <0x08>; + }; + + rx-queues-config { + snps,rx-queues-to-use = <0x01>; + phandle = <0x10b>; + + queue0 { + }; + }; + }; + + pcie-essd { + regulator-max-microvolt = <0x2625a0>; + enable-active-high; + regulator-min-microvolt = <0x2625a0>; + regulator-name = "pcie_essd"; + startup-delay-us = <0x1388>; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x1ba>; + vin-supply = <0x1cd>; + gpios = <0x181 0x0f 0x00>; + }; + + iommu@fdab9000 { + clock-names = "aclk0\0aclk1\0aclk2\0iface0\0iface1\0iface2"; + interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; + clocks = <0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "npu0_mmu\0npu1_mmu\0npu2_mmu"; + reg = <0x00 0xfdab9000 0x00 0x100 0x00 0xfdaba000 0x00 0x100 0x00 0xfdaca000 0x00 0x100 0x00 0xfdada000 0x00 0x100>; + phandle = <0xb2>; + }; + + otp@fecc0000 { + #address-cells = <0x01>; + clock-names = "otpc\0apb\0arb\0phy"; + resets = <0x02 0x12a 0x02 0x129 0x02 0x12b>; + clocks = <0x02 0x96 0x02 0x95 0x02 0x97 0x02 0x99>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-otp"; + reg = <0x00 0xfecc0000 0x00 0x400>; + phandle = <0x2e7>; + reset-names = "otpc\0apb\0arb"; + + id@7 { + reg = <0x07 0x10>; + phandle = <0x2a>; + }; + + cpul-opp-info@3d { + reg = <0x3d 0x06>; + phandle = <0x20>; + }; + + cpub1-leakage@18 { + reg = <0x18 0x01>; + phandle = <0x27>; + }; + + vop-opp-info@61 { + reg = <0x61 0x06>; + phandle = <0x2e8>; + }; + + cpul-leakage@19 { + reg = <0x19 0x01>; + phandle = <0x1f>; + }; + + codec-leakage@29 { + reg = <0x29 0x01>; + phandle = <0xc6>; + }; + + cpu-version@1c { + bits = <0x03 0x03>; + reg = <0x1c 0x01>; + phandle = <0x2b>; + }; + + cpub0-leakage@17 { + reg = <0x17 0x01>; + phandle = <0x24>; + }; + + log-leakage@1a { + reg = <0x1a 0x01>; + phandle = <0x44>; + }; + + cpu-code@2 { + reg = <0x02 0x02>; + phandle = <0x2c>; + }; + + package-serial-number-low@6 { + bits = <0x05 0x03>; + reg = <0x06 0x01>; + phandle = <0xd4>; + }; + + npu-opp-info@55 { + reg = <0x55 0x06>; + phandle = <0xb5>; + }; + + package-serial-number-high@5 { + bits = <0x00 0x01>; + reg = <0x05 0x01>; + phandle = <0xd5>; + }; + + cpub01-opp-info@43 { + reg = <0x43 0x06>; + phandle = <0x25>; + }; + + dmc-opp-info@5b { + reg = <0x5b 0x06>; + phandle = <0x45>; + }; + + npu-leakage@28 { + reg = <0x28 0x01>; + phandle = <0xb4>; + }; + + gpu-leakage@1b { + reg = <0x1b 0x01>; + phandle = <0x63>; + }; + + specification-serial-number@6 { + bits = <0x00 0x05>; + reg = <0x06 0x01>; + phandle = <0x21>; + }; + + venc-opp-info@67 { + reg = <0x67 0x06>; + phandle = <0xc7>; + }; + + gpu-opp-info@4f { + reg = <0x4f 0x06>; + phandle = <0x64>; + }; + + cpub23-opp-info@49 { + reg = <0x49 0x06>; + phandle = <0x28>; + }; + }; + + i2s@fddf0000 { + power-domains = <0x60 0x1a>; + rockchip,always-on; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x243>; + assigned-clock-parents = <0x02 0x07>; + resets = <0x02 0x3e8>; + interrupts = <0x00 0xb9 0x04>; + clocks = <0x02 0x246 0x02 0x246 0x02 0x248>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "okay"; + reg = <0x00 0xfddf0000 0x00 0x1000>; + phandle = <0x1d3>; + dmas = <0xf2 0x02>; + reset-names = "tx-m"; + rockchip,hdmi-path; + }; + + dma-controller@fea10000 { + clock-names = "apb_pclk"; + interrupts = <0x00 0x56 0x04 0x00 0x57 0x04>; + clocks = <0x02 0x78>; + arm,pl330-periph-burst; + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfea10000 0x00 0x4000>; + phandle = <0x7c>; + #dma-cells = <0x01>; + }; + + pwm@febd0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x169>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebd0000 0x00 0x10>; + phandle = <0x2d2>; + }; + + rkvenc-ccu { + compatible = "rockchip,rkv-encoder-v2-ccu"; + status = "okay"; + phandle = <0xc3>; + }; + + syscon@fd58c000 { + compatible = "rockchip,rk3588-sys-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd58c000 0x00 0x1000>; + phandle = <0xc8>; + + rgb { + pinctrl-names = "default"; + pinctrl-0 = <0x71>; + compatible = "rockchip,rk3588-rgb"; + status = "disabled"; + phandle = <0x25c>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@2 { + remote-endpoint = <0x3d>; + status = "disabled"; + reg = <0x02>; + phandle = <0xf0>; + }; + }; + }; + }; + }; + + spi@fe2b0000 { + #address-cells = <0x01>; + clock-names = "clk_sfc\0hclk_sfc"; + assigned-clocks = <0x02 0x13d>; + assigned-clock-rates = <0x5f5e100>; + interrupts = <0x00 0xce 0x04>; + clocks = <0x02 0x13d 0x02 0x13e>; + #size-cells = <0x00>; + compatible = "rockchip,sfc"; + status = "disabled"; + reg = <0x00 0xfe2b0000 0x00 0x4000>; + phandle = <0x292>; + }; + + qos@fdf82200 { + compatible = "syscon"; + reg = <0x00 0xfdf82200 0x00 0x20>; + phandle = <0x9e>; + }; + + mmc@fe2c0000 { + power-domains = <0x60 0x28>; + fifo-depth = <0x100>; + pinctrl-names = "default"; + pinctrl-0 = <0x114 0x115 0x116 0x117>; + clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; + cap-sd-highspeed; + vqmmc-supply = <0x118>; + no-mmc; + bus-width = <0x04>; + no-sdio; + interrupts = <0x00 0xcb 0x04>; + clocks = <0x0e 0x17 0x0e 0x09 0x02 0x2c2 0x02 0x2c3>; + compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; + status = "okay"; + disable-wp; + reg = <0x00 0xfe2c0000 0x00 0x4000>; + phandle = <0x293>; + sd-uhs-sdr104; + max-frequency = <0x8f0d180>; + cap-mmc-highspeed; + }; + + serial@feb80000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x164>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x150 0x04>; + clocks = <0x02 0xc7 0x02 0xaf>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb80000 0x00 0x100>; + phandle = <0x2cd>; + dmas = <0xf1 0x0b 0xf1 0x0c>; + reg-shift = <0x02>; + }; + + phy@fee10000 { + rockchip,pipe-grf = <0x76>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2be>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20006 0x02 0x4d7>; + clocks = <0x02 0x2be 0x02 0x186 0x02 0x166>; + #phy-cells = <0x01>; + compatible = "rockchip,rk3588-naneng-combphy"; + status = "disabled"; + rockchip,pipe-phy-grf = <0x1cb>; + reg = <0x00 0xfee10000 0x00 0x100>; + phandle = <0x1bc>; + reset-names = "combphy-apb\0combphy"; + rockchip,pcie1ln-sel-bits = <0x100 0x00 0x00 0x00>; + }; + + can@fea60000 { + pinctrl-names = "default"; + pinctrl-0 = <0x146>; + clock-names = "baudclk\0apb_pclk"; + assigned-clocks = <0x02 0x72>; + assigned-clock-rates = <0xbebc200>; + resets = <0x02 0xbb 0x02 0xba>; + interrupts = <0x00 0x156 0x04>; + clocks = <0x02 0x72 0x02 0x71>; + compatible = "rockchip,can-2.0"; + status = "okay"; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + reg = <0x00 0xfea60000 0x00 0x1000>; + phandle = <0x2a1>; + reset-names = "can\0can-apb"; + }; + + pdm@fe4c0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x140 0x141>; + pinctrl-0 = <0x13b 0x13c 0x13d 0x13e>; + clock-names = "pdm_clk\0pdm_hclk"; + assigned-clocks = <0x02 0x3b>; + assigned-clock-parents = <0x02 0x05>; + clocks = <0x02 0x3b 0x02 0x3a>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-pdm"; + pinctrl-1 = <0x13f>; + status = "disabled"; + reg = <0x00 0xfe4c0000 0x00 0x1000>; + phandle = <0x29b>; + dmas = <0xf1 0x04>; + }; + + rkcif-mipi-lvds3-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x239>; + }; + + qos@fdf66e00 { + compatible = "syscon"; + reg = <0x00 0xfdf66e00 0x00 0x20>; + phandle = <0x9a>; + }; + + usb@fc800000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + companion = <0x6b>; + interrupts = <0x00 0xd7 0x04>; + clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; + compatible = "rockchip,rk3588-ehci\0generic-ehci"; + status = "okay"; + phys = <0x6c>; + reg = <0x00 0xfc800000 0x00 0x40000>; + phandle = <0x254>; + }; + + i2c@fd880000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x77>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xc0022 0x02 0xc0021>; + interrupts = <0x00 0x13d 0x04>; + clocks = <0x02 0x287 0x02 0x286>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfd880000 0x00 0x1000>; + phandle = <0x25f>; + reset-names = "i2c\0apb"; + + hym8563@51 { + pinctrl-names = "default"; + clock-output-names = "hym8563"; + pinctrl-0 = <0x7a>; + wakeup-source; + interrupts = <0x08 0x08>; + #clock-cells = <0x00>; + interrupt-parent = <0x7b>; + clock-frequency = <0x8000>; + compatible = "haoyu,hym8563"; + status = "okay"; + reg = <0x51>; + phandle = <0x1e4>; + }; + + rk8602@42 { + regulator-max-microvolt = <0x100590>; + regulator-boot-on; + rockchip,suspend-voltage-selector = <0x01>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_cpu_big0_s0"; + regulator-ramp-delay = <0x8fc>; + compatible = "rockchip,rk8602"; + reg = <0x42>; + phandle = <0x18>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk8603@43 { + regulator-max-microvolt = <0x100590>; + regulator-boot-on; + rockchip,suspend-voltage-selector = <0x01>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_cpu_big1_s0"; + regulator-ramp-delay = <0x8fc>; + compatible = "rockchip,rk8603"; + reg = <0x43>; + phandle = <0x1c>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pc9202@3c { + index = <0x00>; + compatible = "firefly,pc9202"; + status = "okay"; + wd-en-gpio = <0x79 0x15 0x00>; + driver-names = "wdt_core"; + reg = <0x3c>; + }; + }; + + rkcif-mipi-lvds3-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x237>; + }; + + serial@fd890000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x7d>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14b 0x04>; + clocks = <0x02 0x2ae 0x02 0x2af>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfd890000 0x00 0x100>; + phandle = <0x260>; + dmas = <0x7c 0x06 0x7c 0x07>; + reg-shift = <0x02>; + }; + + qos@fdf70000 { + compatible = "syscon"; + reg = <0x00 0xfdf70000 0x00 0x20>; + phandle = <0x85>; + }; + + gpu-opp-table { + rockchip,pvtm-offset = <0x1c>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-hw = <0x04>; + nvmem-cells = <0x63 0x64 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; + rockchip,pvtm-thermal-zone = "gpu-thermal"; + rockchip,high-temp-max-freq = "\0\f5"; + rockchip,opp-clocks = <0x02 0x114>; + rockchip,pvtm-freq = "\0\f5"; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x65>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; + phandle = <0x61>; + rockchip,pvtm-temp-prop = <0xffffff79 0xffffff79>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0x61a80>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-700000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-300000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-500000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-m-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0x02 0xffff>; + }; + + opp-j-850000000 { + opp-microvolt = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-hz = <0x00 0x32a9f880>; + opp-supported-hw = <0x04 0xffff>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L3 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + }; + + opp-j-m-400000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-700000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-900000000 { + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-hz = <0x00 0x35a4e900>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; + + opp-m-1000000000 { + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-hz = <0x00 0x3b9aca00>; + opp-supported-hw = <0x02 0xffff>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + }; + + opp-400000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-j-m-300000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-m-900000000 { + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-hz = <0x00 0x35a4e900>; + opp-supported-hw = <0x02 0xffff>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; + + opp-1000000000 { + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-hz = <0x00 0x3b9aca00>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + }; + + opp-j-m-500000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L2 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L3 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; + opp-microvolt-L1 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + }; + }; + + csi2-dphy1-hw@fedc8000 { + clock-names = "pclk"; + resets = <0x02 0x19 0x02 0x18>; + clocks = <0x02 0x10d>; + compatible = "rockchip,rk3588-csi2-dphy-hw"; + status = "okay"; + rockchip,grf = <0x193>; + reg = <0x00 0xfedc8000 0x00 0x8000>; + phandle = <0x2e>; + reset-names = "srst_csiphy1\0srst_p_csiphy1"; + rockchip,sys_grf = <0xc8>; + }; + + hdcp@fde40000 { + power-domains = <0x60 0x19>; + clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; + resets = <0x02 0x37f 0x02 0x37d 0x02 0x37c 0x02 0x37b 0x02 0x381>; + interrupts = <0x00 0x9f 0x04>; + clocks = <0x02 0x1ed 0x02 0x1ef 0x02 0x1ee 0x02 0x1ec 0x02 0x1f1 0x02 0x1f2>; + compatible = "rockchip,rk3588-hdcp"; + status = "disabled"; + reg = <0x00 0xfde40000 0x00 0x80>; + phandle = <0x285>; + reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; + rockchip,vo-grf = <0xf5>; + }; + + iommu@fdbac800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x7f 0x04>; + clocks = <0x02 0x1b2 0x02 0x1b3>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege3_mmu"; + reg = <0x00 0xfdbac800 0x00 0x40>; + phandle = <0xc0>; + }; + + qos@fdf40400 { + compatible = "syscon"; + reg = <0x00 0xfdf40400 0x00 0x20>; + phandle = <0xa2>; + }; + + rga@fdb70000 { + power-domains = <0x60 0x1e>; + iommus = <0xba>; + clock-names = "aclk_rga3_1\0hclk_rga3_1\0clk_rga3_1"; + interrupts = <0x00 0x73 0x04>; + clocks = <0x02 0x18a 0x02 0x189 0x02 0x18b>; + compatible = "rockchip,rga3_core1"; + status = "okay"; + interrupt-names = "rga3_core1_irq"; + reg = <0x00 0xfdb70000 0x00 0x1000>; + phandle = <0x26a>; + }; + + spi@feb00000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x14e 0x14f 0x150>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x146 0x04>; + clocks = <0x02 0xa3 0x02 0x9e>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfeb00000 0x00 0x1000>; + phandle = <0x2ab>; + dmas = <0x7c 0x0e 0x7c 0x0f>; + }; + + pcie@fe170000 { + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x20 0x2f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x08>; + resets = <0x02 0x20f 0x02 0x21e>; + interrupts = <0x00 0xf3 0x04 0x00 0xf2 0x04 0x00 0xf1 0x04 0x00 0xf0 0x04 0x00 0xef 0x04>; + clocks = <0x02 0x150 0x02 0x155 0x02 0x14b 0x02 0x15b 0x02 0x160 0x02 0x2c4>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1bb 0x00 0x00 0x00 0x00 0x02 0x1bb 0x01 0x00 0x00 0x00 0x03 0x1bb 0x02 0x00 0x00 0x00 0x04 0x1bb 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x02>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf2000000 0x00 0xf2000000 0x00 0x100000 0x81000000 0x00 0xf2100000 0x00 0xf2100000 0x00 0x100000 0x82000000 0x00 0xf2200000 0x00 0xf2200000 0x00 0xe00000 0xc3000000 0x09 0x80000000 0x09 0x80000000 0x00 0x40000000>; + msi-map = <0x2000 0x106 0x2000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x1bc 0x02>; + num-viewport = <0x04>; + reg = <0x00 0xfe170000 0x00 0x10000 0x0a 0x40800000 0x00 0x400000>; + linux,pci-domain = <0x02>; + phandle = <0x487>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x08>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xf0 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x1bb>; + interrupt-controller; + }; + }; + + i2s@fe470000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x11b 0x11c>; + pinctrl-0 = <0x11b 0x11c 0x11d 0x11e>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x31 0x02 0x35>; + assigned-clock-parents = <0x02 0x05 0x02 0x05>; + resets = <0x02 0x77 0x02 0x7a>; + interrupts = <0x00 0xb4 0x04>; + clocks = <0x02 0x33 0x02 0x37 0x02 0x30>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + pinctrl-1 = <0x11f>; + status = "okay"; + reg = <0x00 0xfe470000 0x00 0x1000>; + phandle = <0x1da>; + dmas = <0x7c 0x00 0x7c 0x01>; + reset-names = "tx-m\0rx-m"; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd594000 { + compatible = "rockchip,rk3588-litcore-grf\0syscon"; + reg = <0x00 0xfd594000 0x00 0x100>; + phandle = <0x22>; + }; + + csi2-dphy5 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x214>; + }; + + usb@fc840000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + interrupts = <0x00 0xd8 0x04>; + clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; + compatible = "rockchip,rk3588-ohci\0generic-ohci"; + status = "okay"; + phys = <0x6c>; + reg = <0x00 0xfc840000 0x00 0x40000>; + phandle = <0x6b>; + }; + + syscon@fd5b0000 { + compatible = "rockchip,rk3588-php-grf\0syscon"; + reg = <0x00 0xfd5b0000 0x00 0x1000>; + phandle = <0x76>; + }; + + rkcif-mipi-lvds2-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x55>; + phandle = <0x236>; + }; + + rkisp1-vir1 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x240>; + }; + + i2c@feaa0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x149>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb1 0x02 0xa9>; + interrupts = <0x00 0x13f 0x04>; + clocks = <0x02 0x8e 0x02 0x86>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfeaa0000 0x00 0x1000>; + phandle = <0x2a5>; + reset-names = "i2c\0apb"; + }; + + dmc { + downdifferential = <0x14>; + clock-names = "dmc_clk"; + interrupts = <0x00 0x49 0x04>; + clocks = <0x0e 0x04>; + upthreshold = <0x28>; + center-supply = <0x42>; + devfreq-events = <0x40>; + compatible = "rockchip,rk3588-dmc"; + status = "disabled"; + interrupt-names = "complete"; + mem-supply = <0x43>; + phandle = <0x21f>; + operating-points-v2 = <0x41>; + system-status-level = <0x01 0x04 0x08 0x08 0x02 0x01 0x10 0x04 0x10000 0x04 0x80000 0x04 0x1000 0x08 0x4000 0x08 0x2000 0x08 0xc00 0x08 0x40000 0x08 0x200000 0x08>; + auto-freq-en = <0x01>; + }; + + hdmi1-sound { + rockchip,jack-det; + rockchip,cpu = <0x1e0>; + rockchip,codec = <0x1e1>; + rockchip,card-name = "rockchip-hdmi1"; + compatible = "rockchip,hdmi"; + status = "disabled"; + phandle = <0x4a8>; + rockchip,mclk-fs = <0x80>; + }; + + qos@fdf3d800 { + compatible = "syscon"; + reg = <0x00 0xfdf3d800 0x00 0x20>; + phandle = <0xb0>; + }; + + mipi-dcphy-dummy { + phandle = <0x223>; + }; + + jpege-core@fdbac000 { + power-domains = <0x60 0x15>; + iommus = <0xc0>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1b2>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2d0 0x02 0x2d1>; + interrupts = <0x00 0x80 0x04>; + clocks = <0x02 0x1b2 0x02 0x1b3>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege3"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbac000 0x00 0x400>; + phandle = <0x270>; + reset-names = "video_a\0video_h"; + }; + + iommu@fdce0800 { + power-domains = <0x60 0x1b>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x71 0x04>; + clocks = <0x02 0x1e4 0x02 0x1e5>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "cif_mmu"; + reg = <0x00 0xfdce0800 0x00 0x100 0x00 0xfdce0900 0x00 0x100>; + phandle = <0x50>; + }; + + qos@fdf35400 { + compatible = "syscon"; + reg = <0x00 0xfdf35400 0x00 0x20>; + phandle = <0x89>; + }; + + syscon@fd5a8000 { + clocks = <0x73>; + compatible = "rockchip,rk3588-vo-grf\0syscon"; + reg = <0x00 0xfd5a8000 0x00 0x100>; + phandle = <0xd8>; + }; + + dp0-sound { + rockchip,jack-det; + rockchip,cpu = <0x1d5>; + rockchip,codec = <0x1d6 0x01>; + rockchip,card-name = "rockchip-dp0"; + compatible = "rockchip,hdmi"; + status = "disabled"; + phandle = <0x49c>; + rockchip,mclk-fs = <0x200>; + }; + + rkcif-mipi-lvds4 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x1a1>; + }; + + usb@fc880000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + companion = <0x6e>; + interrupts = <0x00 0xda 0x04>; + clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; + compatible = "rockchip,rk3588-ehci\0generic-ehci"; + status = "okay"; + phys = <0x6f>; + reg = <0x00 0xfc880000 0x00 0x40000>; + phandle = <0x255>; + }; + + qos@fdf62000 { + compatible = "syscon"; + reg = <0x00 0xfdf62000 0x00 0x20>; + phandle = <0x8b>; + }; + + syscon@fd5f0000 { + compatible = "rockchip,rk3588-ioc\0syscon"; + reg = <0x00 0xfd5f0000 0x00 0x10000>; + phandle = <0x196>; + }; + + mipi1-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x225>; + }; + + hdmiphy@fed70000 { + clock-names = "ref\0apb"; + resets = <0x02 0x491 0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041 0x02 0x48f 0x02 0x490>; + clocks = <0x02 0x2b5 0x02 0x268>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy-hdmi"; + status = "disabled"; + rockchip,grf = <0x1c7>; + reg = <0x00 0xfed70000 0x00 0x2000>; + phandle = <0x1ac>; + reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; + + clk-port { + #clock-cells = <0x00>; + status = "okay"; + phandle = <0x36>; + }; + }; + + i2c@fec80000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x178>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb5 0x02 0xad>; + interrupts = <0x00 0x143 0x04>; + clocks = <0x02 0x92 0x02 0x8a>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfec80000 0x00 0x1000>; + phandle = <0x2df>; + reset-names = "i2c\0apb"; + + imx415@37 { + power-domains = <0x60 0x1b>; + pinctrl-names = "default"; + pinctrl-0 = <0x180>; + clock-names = "xvclk"; + clocks = <0x02 0x100>; + firefly,clkout-enabled-index = <0x00>; + rockchip,camera-module-name = "CMK-OT2022-PX1"; + reset-gpios = <0x182 0x05 0x01>; + rockchip,camera-module-index = <0x00>; + compatible = "sony,imx415"; + rockchip,camera-module-facing = "back"; + power-gpios = <0x181 0x1d 0x00>; + reg = <0x37>; + rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20"; + phandle = <0x2e3>; + + port { + + endpoint { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x184>; + phandle = <0x32>; + }; + }; + }; + + es8388@11 { + pinctrl-names = "default"; + pinctrl-0 = <0x17a>; + clock-names = "mclk"; + assigned-clocks = <0x179>; + assigned-clock-rates = <0xbb8000>; + clocks = <0x179>; + #sound-dai-cells = <0x00>; + compatible = "everest,es8388\0everest,es8323"; + status = "okay"; + reg = <0x11>; + phandle = <0x1db>; + }; + + XC7160b@1b { + power-domains = <0x60 0x1b>; + pinctrl-names = "default"; + pinctrl-0 = <0x180>; + clock-names = "xvclk"; + pwdn-gpios = <0xfe 0x04 0x00>; + clocks = <0x02 0x100>; + firefly,clkout-enabled-index = <0x00>; + rockchip,camera-module-name = "NC"; + reset-gpios = <0x182 0x05 0x00>; + rockchip,camera-module-index = <0x00>; + compatible = "firefly,xc7160"; + rockchip,camera-module-facing = "back"; + power-gpios = <0x181 0x1d 0x01>; + reg = <0x1b>; + rockchip,camera-module-lens-name = "NC"; + phandle = <0x2e2>; + + port { + + endpoint { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x183>; + phandle = <0x31>; + }; + }; + }; + + fusb302@22 { + pinctrl-names = "default"; + pinctrl-0 = <0x17b>; + interrupts = <0x1b 0x08>; + vbus-supply = <0x17c>; + interrupt-parent = <0x7b>; + compatible = "fcs,fusb302"; + status = "disabled"; + reg = <0x22>; + phandle = <0x2e0>; + + connector { + sink-pdos = <0x4019064>; + power-role = "dual"; + source-pdos = <0x401912c>; + data-role = "dual"; + label = "USB-C"; + try-power-role = "sink"; + compatible = "usb-c-connector"; + op-sink-microwatt = <0xf4240>; + phandle = <0x2e1>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + + endpoint { + remote-endpoint = <0x17e>; + phandle = <0x18e>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + remote-endpoint = <0x17f>; + phandle = <0x18f>; + }; + }; + }; + + altmodes { + #address-cells = <0x01>; + #size-cells = <0x00>; + + altmode@0 { + svid = <0xff01>; + vdo = <0xffffffff>; + reg = <0x00>; + }; + }; + }; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + + endpoint@0 { + remote-endpoint = <0x17d>; + phandle = <0x68>; + }; + }; + }; + }; + }; + + syscon@fd5e8000 { + compatible = "rockchip,mipi-dcphy-grf\0syscon"; + reg = <0x00 0xfd5e8000 0x00 0x4000>; + phandle = <0x190>; + }; + + vbus5v0-typec-pwr-en-regulator { + gpio = <0x182 0x0c 0x00>; + enable-active-high; + regulator-name = "vbus5v0_typec_pwr_en"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x17c>; + }; + + mipi2-csi2-hw@fdd30000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x326>; + interrupts = <0x00 0x93 0x04 0x00 0x94 0x04>; + clocks = <0x02 0x1d1>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd30000 0x00 0x10000>; + phandle = <0x49>; + reset-names = "srst_csihost_p"; + }; + + spdif-rx@fde18000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x262>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x401>; + interrupts = <0x00 0xc9 0x04>; + clocks = <0x02 0x262 0x02 0x261>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + status = "disabled"; + reg = <0x00 0xfde18000 0x00 0x1000>; + phandle = <0x480>; + dmas = <0x7c 0x17>; + reset-names = "spdifrx-m"; + }; + + syscon@fd5a2000 { + compatible = "rockchip,rk3588-npu-grf\0syscon"; + reg = <0x00 0xfd5a2000 0x00 0x100>; + phandle = <0xb6>; + }; + + rkisp0-vir3 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23e>; + }; + + qos@fdf66200 { + compatible = "syscon"; + reg = <0x00 0xfdf66200 0x00 0x20>; + phandle = <0x94>; + }; + + rkcif@fdce0000 { + power-domains = <0x60 0x1b>; + iommus = <0x50>; + nvmem-cells = <0x21 0xd4 0xd5>; + clock-names = "aclk_cif\0hclk_cif\0dclk_cif\0iclk_host0\0iclk_host1"; + reg-names = "cif_regs"; + assigned-clocks = <0x02 0x1e3>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x317 0x02 0x318 0x02 0x316 0x02 0x334 0x02 0x335 0x02 0x336 0x02 0x337 0x02 0x338 0x02 0x339>; + interrupts = <0x00 0x9b 0x04>; + clocks = <0x02 0x1e4 0x02 0x1e5 0x02 0x1e3 0x02 0x1cd 0x02 0x1ce>; + compatible = "rockchip,rk3588-cif"; + status = "okay"; + rockchip,grf = <0xc8>; + interrupt-names = "cif-intr"; + nvmem-cell-names = "specification\0package_low\0package_high"; + reg = <0x00 0xfdce0000 0x00 0x800>; + phandle = <0x4f>; + reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_d\0rst_cif_host0\0rst_cif_host1\0rst_cif_host2\0rst_cif_host3\0rst_cif_host4\0rst_cif_host5"; + }; + + edp@fdec0000 { + power-domains = <0x60 0x1a>; + phy-names = "dp"; + clock-names = "dp\0pclk\0spdif\0hclk"; + resets = <0x02 0x3e1 0x02 0x3e0>; + interrupts = <0x00 0xa3 0x04>; + clocks = <0x02 0x211 0x02 0x210 0x02 0x212 0x05>; + compatible = "rockchip,rk3588-edp"; + status = "disabled"; + rockchip,grf = <0xd8>; + phys = <0x101>; + reg = <0x00 0xfdec0000 0x00 0x1000>; + phandle = <0x289>; + reset-names = "dp\0apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x103>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe1>; + }; + + endpoint@2 { + remote-endpoint = <0x3b>; + status = "disabled"; + reg = <0x02>; + phandle = <0xe7>; + }; + + endpoint@0 { + remote-endpoint = <0x102>; + status = "disabled"; + reg = <0x00>; + phandle = <0xdb>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x28a>; + }; + }; + }; + }; + + qos@fdf72400 { + compatible = "syscon"; + reg = <0x00 0xfdf72400 0x00 0x20>; + phandle = <0x84>; + }; + + dp@fde60000 { + power-domains = <0x60 0x19>; + clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; + assigned-clocks = <0x02 0x2cd>; + assigned-clock-rates = <0xf42400>; + resets = <0x02 0x389>; + interrupts = <0x00 0xa2 0x04>; + clocks = <0x02 0x1e7 0x02 0x2cd 0x02 0x201 0x02 0x20d 0x04 0x02 0x1eb>; + #sound-dai-cells = <0x01>; + compatible = "rockchip,rk3588-dp"; + status = "disabled"; + phys = <0x1a5>; + reg = <0x00 0xfde60000 0x00 0x4000>; + phandle = <0x1e3>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x3e>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe3>; + }; + + endpoint@2 { + remote-endpoint = <0x1a7>; + status = "disabled"; + reg = <0x02>; + phandle = <0xeb>; + }; + + endpoint@0 { + remote-endpoint = <0x1a6>; + status = "disabled"; + reg = <0x00>; + phandle = <0xdd>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x481>; + }; + }; + }; + }; + + vcc5v0-usbdcin { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_usbdcin"; + compatible = "regulator-fixed"; + phandle = <0x48c>; + vin-supply = <0x1cd>; + }; + + rkvdec-core@fdc48000 { + power-domains = <0x60 0x0f>; + iommus = <0xcc>; + rockchip,ccu = <0xca>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; + reg-names = "regs\0link"; + assigned-clocks = <0x02 0x195 0x02 0x198 0x02 0x196 0x02 0x197>; + rockchip,core-mask = <0x20002>; + rockchip,task-capacity = <0x10>; + rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; + assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; + resets = <0x02 0x293 0x02 0x292 0x02 0x298 0x02 0x296 0x02 0x297>; + interrupts = <0x00 0x61 0x04>; + rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; + clocks = <0x02 0x195 0x02 0x194 0x02 0x198 0x02 0x196 0x02 0x197>; + rockchip,rcb-min-width = <0x200>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x09>; + compatible = "rockchip,rkv-decoder-v2"; + status = "okay"; + interrupt-names = "irq_rkvdec1"; + rockchip,skip-pmu-idle-request; + rockchip,rcb-iova = <0xffe00000 0x100000>; + reg = <0x00 0xfdc48100 0x00 0x400 0x00 0xfdc48000 0x00 0x100>; + phandle = <0x275>; + reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; + rockchip,sram = <0xcd>; + }; + + vcc-1v1-nldo-s3 { + regulator-max-microvolt = <0x10c8e0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x10c8e0>; + regulator-name = "vcc_1v1_nldo_s3"; + compatible = "regulator-fixed"; + phandle = <0x15c>; + vin-supply = <0x78>; + }; + + power-management@fd8d8000 { + compatible = "rockchip,rk3588-pmu\0syscon\0simple-mfd"; + reg = <0x00 0xfd8d8000 0x00 0x400>; + phandle = <0xd9>; + + power-controller { + #address-cells = <0x01>; + #size-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-power-controller"; + status = "okay"; + phandle = <0x60>; + + power-domain@37 { + clocks = <0x02 0x199 0x02 0x140>; + reg = <0x25>; + pm_qos = <0xaf>; + }; + + power-domain@27 { + #address-cells = <0x01>; + clocks = <0x02 0x1e1 0x02 0x1e2 0x02 0x1df 0x02 0x1de 0x02 0x1e5 0x02 0x1e4>; + #size-cells = <0x00>; + reg = <0x1b>; + pm_qos = <0xa2 0xa3 0xa4 0xa5>; + + power-domain@29 { + clocks = <0x02 0x1d6 0x02 0x1d5 0x02 0x1d9 0x02 0x1d8 0x02 0x1e2>; + reg = <0x1d>; + pm_qos = <0xa8 0xa9>; + }; + + power-domain@28 { + clocks = <0x02 0x121 0x02 0x120 0x02 0x1e1 0x02 0x1e2>; + reg = <0x1c>; + pm_qos = <0xa6 0xa7>; + }; + }; + + power-domain@33 { + clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; + reg = <0x21>; + }; + + power-domain@13 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x0d>; + + power-domain@15 { + clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc 0x02 0x195>; + reg = <0x0f>; + pm_qos = <0x8c>; + }; + + power-domain@16 { + #address-cells = <0x01>; + clocks = <0x02 0x1c4 0x02 0x1c5>; + #size-cells = <0x00>; + reg = <0x10>; + pm_qos = <0x8d 0x8e 0x8f>; + + power-domain@17 { + clocks = <0x02 0x1c9 0x02 0x1c4 0x02 0x1c5 0x02 0x1ca>; + reg = <0x11>; + pm_qos = <0x90 0x91 0x92>; + }; + }; + + power-domain@14 { + clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190 0x02 0x18e>; + reg = <0x0e>; + pm_qos = <0x8b>; + }; + }; + + power-domain@31 { + clocks = <0x02 0x166 0x02 0x1a1 0x02 0x1a4 0x02 0x19d 0x02 0x19e 0x02 0x19f 0x02 0x1a0>; + reg = <0x1f>; + pm_qos = <0xab 0xac 0xad 0xae>; + }; + + power-domain@21 { + #address-cells = <0x01>; + clocks = <0x02 0x1be 0x02 0x1bd 0x02 0x1bc 0x02 0x1bf 0x02 0x1aa 0x02 0x1a9 0x02 0x1ac 0x02 0x1ad 0x02 0x1ae 0x02 0x1af 0x02 0x1b0 0x02 0x1b1 0x02 0x1b2 0x02 0x1b3 0x02 0x1b4 0x02 0x1b5 0x02 0x1b7 0x02 0x1b6>; + #size-cells = <0x00>; + reg = <0x15>; + pm_qos = <0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a>; + + power-domain@15 { + clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc>; + reg = <0x0f>; + pm_qos = <0x8c>; + }; + + power-domain@23 { + clocks = <0x02 0x4b 0x02 0x49 0x02 0x1be>; + reg = <0x17>; + pm_qos = <0x9b>; + }; + + power-domain@14 { + clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190>; + reg = <0x0e>; + pm_qos = <0x8b>; + }; + + power-domain@22 { + clocks = <0x02 0x1ba 0x02 0x1b9>; + reg = <0x16>; + pm_qos = <0x9c>; + }; + }; + + power-domain@38 { + clocks = <0x02 0x3c 0x02 0x3d>; + reg = <0x26>; + }; + + power-domain@8 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x08>; + + power-domain@9 { + #address-cells = <0x01>; + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130 0x02 0x126>; + #size-cells = <0x00>; + reg = <0x09>; + pm_qos = <0x82 0x83 0x84>; + + power-domain@11 { + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; + reg = <0x0b>; + pm_qos = <0x86>; + }; + + power-domain@10 { + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; + reg = <0x0a>; + pm_qos = <0x85>; + }; + }; + }; + + power-domain@26 { + clocks = <0x02 0x22e 0x02 0x22f 0x02 0x22d 0x02 0x218 0x02 0x217 0x02 0x22b 0x02 0x264>; + reg = <0x1a>; + pm_qos = <0xa0 0xa1>; + }; + + power-domain@34 { + clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; + reg = <0x22>; + }; + + power-domain@24 { + #address-cells = <0x01>; + clocks = <0x02 0x26e 0x02 0x26d 0x02 0x270>; + #size-cells = <0x00>; + reg = <0x18>; + pm_qos = <0x9d 0x9e>; + + power-domain@25 { + clocks = <0x02 0x1f6 0x02 0x1f7 0x02 0x1f5 0x02 0x1f3 0x02 0x1ee 0x02 0x1ed 0x02 0x26d>; + reg = <0x19>; + pm_qos = <0x9f>; + }; + }; + + power-domain@12 { + clocks = <0x02 0x114 0x02 0x115 0x02 0x116>; + reg = <0x0c>; + pm_qos = <0x87 0x88 0x89 0x8a>; + }; + + power-domain@40 { + reg = <0x28>; + pm_qos = <0xb0>; + }; + + power-domain@30 { + clocks = <0x02 0x189 0x02 0x18a>; + reg = <0x1e>; + pm_qos = <0xaa>; + }; + }; + }; + + csi2-dphy3 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x212>; + }; + + qos@fdf3e000 { + compatible = "syscon"; + reg = <0x00 0xfdf3e000 0x00 0x20>; + phandle = <0xac>; + }; + + pwm@fd8b0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x81>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04 0x00 0x159 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0030 0x00 0x10>; + phandle = <0x264>; + }; + + rkcif-mipi-lvds2-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x55>; + phandle = <0x234>; + }; + + syscon@fd5cc000 { + compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; + reg = <0x00 0xfd5cc000 0x00 0x4000>; + phandle = <0x1c9>; + }; + + vdpu@fdb50400 { + power-domains = <0x60 0x15>; + iommus = <0xb7>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1c0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + interrupts = <0x00 0x77 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-decoder-v2"; + rockchip,resetgroup-node = <0x00>; + status = "okay"; + interrupt-names = "irq_vdpu"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb50400 0x00 0x400>; + phandle = <0x267>; + reset-names = "shared_video_a\0shared_video_h"; + }; + + qos@fdf60200 { + compatible = "syscon"; + reg = <0x00 0xfdf60200 0x00 0x20>; + phandle = <0x8e>; + }; + + pwm@febe0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x170>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04 0x00 0x15d 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0030 0x00 0x10>; + phandle = <0x2d8>; + }; + + display-subsystem { + memory-region-names = "drm-logo"; + clock-names = "hdmi0_phy_pll\0hdmi1_phy_pll"; + ports = <0x34>; + memory-region = <0x37>; + clocks = <0x35 0x36>; + compatible = "rockchip,display-subsystem"; + phandle = <0x215>; + + route { + + route-edp1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21a>; + }; + + route-hdmi1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3f>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21e>; + }; + + route-dp1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3e>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21d>; + }; + + route-dsi1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3a>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x218>; + }; + + route-edp0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3b>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x219>; + }; + + route-hdmi0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3c>; + logo,mode = "center"; + status = "okay"; + phandle = <0x21b>; + }; + + route-dp0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x38>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x216>; + }; + + route-rgb { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3d>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21c>; + }; + + route-dsi0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x39>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x217>; + }; + }; + }; + + serial@febc0000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x168>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x154 0x04>; + clocks = <0x02 0xd7 0x02 0xb3>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfebc0000 0x00 0x100>; + phandle = <0x2d1>; + dmas = <0xf2 0x0b 0xf2 0x0c>; + reg-shift = <0x02>; + }; + + adc-keys { + io-channels = <0x1d9 0x01>; + poll-interval = <0x64>; + keyup-threshold-microvolt = <0x1b7740>; + compatible = "adc-keys"; + status = "okay"; + phandle = <0x49e>; + io-channel-names = "buttons"; + + recovery-key { + press-threshold-microvolt = <0x4268>; + label = "F12"; + linux,code = <0x58>; + }; + }; + + pvtm@fdaf0000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-npu-pvtm"; + reg = <0x00 0xfdaf0000 0x00 0x100>; + + pvtm@3 { + clock-names = "clk\0pclk"; + resets = <0x02 0x1de 0x02 0x1dc>; + clocks = <0x02 0x12b 0x02 0x129>; + reg = <0x03>; + reset-names = "rts\0rst-p"; + }; + }; + + codec-digital@fe500000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x144>; + clock-names = "dac\0pclk"; + resets = <0x02 0x84>; + clocks = <0x02 0x29 0x02 0x2f>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-codec-digital\0rockchip,codec-digital-v1"; + status = "disabled"; + rockchip,grf = <0xc8>; + reg = <0x00 0xfe500000 0x00 0x1000>; + phandle = <0x29e>; + reset-names = "reset"; + rockchip,pwm-output-mode; + }; + + pwm@fd8b0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x80>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0020 0x00 0x10>; + phandle = <0x263>; + }; + + rkcif-mipi-lvds2 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "okay"; + phandle = <0x55>; + + port { + + endpoint { + remote-endpoint = <0x54>; + phandle = <0x4e>; + }; + }; + }; + + pwm@febe0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x16f>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0020 0x00 0x10>; + phandle = <0x2d7>; + }; + + vcc-fan-pwr-en-regulator { + regulator-boot-on; + gpio = <0x182 0x0b 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_fan_pwr_en"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a4>; + }; + + iommu@fdba0800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x79 0x04>; + clocks = <0x02 0x1ac 0x02 0x1ad>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege0_mmu"; + reg = <0x00 0xfdba0800 0x00 0x40>; + phandle = <0xbc>; + }; + + rkcif-mipi-lvds1-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x231>; + }; + + arm-pmu { + interrupt-affinity = <0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d>; + interrupts = <0x01 0x07 0x08>; + compatible = "arm,armv8-pmuv3"; + phandle = <0x20c>; + }; + + pvtm@fda40000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-bigcore0-pvtm"; + reg = <0x00 0xfda40000 0x00 0x100>; + + pvtm@0 { + clock-names = "clk\0pclk"; + clocks = <0x02 0x2c6 0x02 0x15>; + reg = <0x00>; + }; + }; + + pwm@fd8b0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x7f>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0010 0x00 0x10>; + phandle = <0x262>; + }; + + i2s@fddc0000 { + power-domains = <0x60 0x19>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x1f9>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x38d>; + interrupts = <0x00 0xb8 0x04>; + clocks = <0x02 0x1fb 0x02 0x1fb 0x02 0x1f0>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "disabled"; + reg = <0x00 0xfddc0000 0x00 0x1000>; + phandle = <0x27d>; + dmas = <0xf2 0x00>; + reset-names = "tx-m"; + }; + + qos@fdf61400 { + compatible = "syscon"; + reg = <0x00 0xfdf61400 0x00 0x20>; + phandle = <0x92>; + }; + + syscon@fd5d4000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d4000 0x00 0x4000>; + phandle = <0x1c8>; + + usb2-phy@4000 { + clock-output-names = "usb480m_phy1"; + clock-names = "phyclk"; + resets = <0x02 0xc0048 0x02 0x489>; + interrupts = <0x00 0x18a 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + rockchip,usbctrl-grf = <0x74>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0x4000 0x10>; + phandle = <0x1ca>; + reset-names = "phy\0apb"; + + otg-port { + phy-supply = <0x75>; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a3>; + }; + }; + }; + + rkisp0-vir1 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23c>; + }; + + pwm@febe0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x16e>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0010 0x00 0x10>; + phandle = <0x2d6>; + }; + + thermal-zones { + phandle = <0x248>; + + bigcore1-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x02>; + phandle = <0x24d>; + }; + + soc-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x00>; + sustainable-power = <0x834>; + phandle = <0x249>; + + trips { + + trip-point-0 { + temperature = <0x124f8>; + hysteresis = <0x7d0>; + type = "passive"; + phandle = <0x24a>; + }; + + trip-point-1 { + temperature = <0x14c08>; + hysteresis = <0x7d0>; + type = "passive"; + phandle = <0x5e>; + }; + + soc-crit { + temperature = <0x1c138>; + hysteresis = <0x7d0>; + type = "critical"; + phandle = <0x24b>; + }; + }; + + cooling-maps { + + map2 { + trip = <0x5e>; + cooling-device = <0x0c 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + + map0 { + trip = <0x5e>; + cooling-device = <0x06 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + + map3 { + trip = <0x5e>; + cooling-device = <0x5f 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + + map1 { + trip = <0x5e>; + cooling-device = <0x0a 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + }; + }; + + npu-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x06>; + phandle = <0x251>; + }; + + center-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x04>; + phandle = <0x24f>; + }; + + gpu-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x05>; + phandle = <0x250>; + }; + + littlecore-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x03>; + phandle = <0x24e>; + }; + + bigcore0-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x01>; + phandle = <0x24c>; + }; + }; + + iommu@fdbdf000 { + power-domains = <0x60 0x10>; + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x63 0x04 0x00 0x64 0x04>; + clocks = <0x02 0x1c5 0x02 0x1c4>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvenc0_mmu0\0irq_rkvenc0_mmu1"; + reg = <0x00 0xfdbdf000 0x00 0x40 0x00 0xfdbdf040 0x00 0x40>; + phandle = <0xc2>; + }; + + serial@feb50000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x161>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14d 0x04>; + clocks = <0x02 0xbb 0x02 0xac>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb50000 0x00 0x100>; + phandle = <0x2ca>; + dmas = <0x7c 0x0a 0x7c 0x0b>; + reg-shift = <0x02>; + }; + + iommu@fdcd0f00 { + power-domains = <0x60 0x1d>; + clock-names = "aclk\0iface\0pclk"; + interrupts = <0x00 0x8c 0x04>; + clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "fec0_mmu"; + reg = <0x00 0xfdcd0f00 0x00 0x100>; + phandle = <0xd2>; + }; + + vcc5v0-host { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + gpio = <0x182 0x02 0x00>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_host"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x75>; + vin-supply = <0x1dd>; + }; + + qos@fdf66a00 { + compatible = "syscon"; + reg = <0x00 0xfdf66a00 0x00 0x20>; + phandle = <0x98>; + }; + + phy@fed90000 { + clock-names = "refclk\0immortal\0pclk\0utmi"; + resets = <0x02 0x2f 0x02 0x30 0x02 0x31 0x02 0x32 0x02 0x484>; + clocks = <0x02 0x2b6 0x02 0x280 0x02 0x26a 0x1ca>; + compatible = "rockchip,rk3588-usbdp-phy"; + status = "okay"; + rockchip,dp-lane-mux = <0x02 0x03>; + reg = <0x00 0xfed90000 0x00 0x10000>; + phandle = <0x48b>; + rockchip,usb-grf = <0x74>; + reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; + rockchip,u2phy-grf = <0x1c8>; + rockchip,usbdpphy-grf = <0x1c9>; + rockchip,vo-grf = <0xf5>; + + dp-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a5>; + }; + + u3-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a4>; + }; + }; + + jpege-core@fdba0000 { + power-domains = <0x60 0x15>; + iommus = <0xbc>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1ac>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2ca 0x02 0x2cb>; + interrupts = <0x00 0x7a 0x04>; + clocks = <0x02 0x1ac 0x02 0x1ad>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege0"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdba0000 0x00 0x400>; + phandle = <0x26d>; + reset-names = "video_a\0video_h"; + }; + + vcc5v0-sys { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_sys"; + compatible = "regulator-fixed"; + phandle = <0x78>; + vin-supply = <0x1cd>; + }; + + pwm@fd8b0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x7e>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0000 0x00 0x10>; + phandle = <0x261>; + }; + + vop@fdd90000 { + power-domains = <0x60 0x18>; + iommus = <0xd6>; + rockchip,vop-grf = <0xd7>; + clock-names = "aclk_vop\0hclk_vop\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0pclk_vop\0dclk_src_vp0\0dclk_src_vp1\0dclk_src_vp2"; + reg-names = "regs\0gamma_lut"; + assigned-clocks = <0x02 0x270>; + assigned-clock-rates = <0x2cb41780>; + resets = <0x02 0x349 0x02 0x348 0x02 0x34d 0x02 0x350 0x02 0x351 0x02 0x352>; + interrupts = <0x00 0x9c 0x04>; + clocks = <0x02 0x270 0x02 0x26f 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x02 0x26e 0x02 0x271 0x02 0x272 0x02 0x273>; + compatible = "rockchip,rk3588-vop"; + rockchip,pmu = <0xd9>; + status = "okay"; + rockchip,grf = <0xc8>; + reg = <0x00 0xfdd90000 0x00 0x4200 0x00 0xfdd95000 0x00 0x1000>; + phandle = <0x278>; + rockchip,vo1-grf = <0xd8>; + reset-names = "axi\0ahb\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + phandle = <0x34>; + + port@0 { + rockchip,primary-plane = <0x02>; + rockchip,plane-mask = <0x05>; + #address-cells = <0x01>; + assigned-clocks = <0x02 0x270>; + assigned-clock-rates = <0x2faf0800>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x279>; + + endpoint@5 { + remote-endpoint = <0xdf>; + reg = <0x05>; + phandle = <0x1ad>; + }; + + endpoint@3 { + remote-endpoint = <0xdd>; + reg = <0x03>; + phandle = <0x1a6>; + }; + + endpoint@1 { + remote-endpoint = <0xdb>; + reg = <0x01>; + phandle = <0x102>; + }; + + endpoint@4 { + remote-endpoint = <0xde>; + reg = <0x04>; + phandle = <0x1b0>; + }; + + endpoint@2 { + remote-endpoint = <0xdc>; + reg = <0x02>; + phandle = <0x3c>; + }; + + endpoint@0 { + remote-endpoint = <0xda>; + reg = <0x00>; + phandle = <0xf7>; + }; + }; + + port@3 { + rockchip,primary-plane = <0x09>; + rockchip,plane-mask = <0x280>; + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x03>; + phandle = <0x27c>; + + endpoint@1 { + remote-endpoint = <0xef>; + reg = <0x01>; + phandle = <0x3a>; + }; + + endpoint@2 { + remote-endpoint = <0xf0>; + reg = <0x02>; + phandle = <0x3d>; + }; + + endpoint@0 { + remote-endpoint = <0xee>; + reg = <0x00>; + phandle = <0x39>; + }; + }; + + port@1 { + rockchip,primary-plane = <0x03>; + rockchip,plane-mask = <0x0a>; + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + phandle = <0x27a>; + + endpoint@5 { + remote-endpoint = <0xe5>; + reg = <0x05>; + phandle = <0x3f>; + }; + + endpoint@3 { + remote-endpoint = <0xe3>; + reg = <0x03>; + phandle = <0x3e>; + }; + + endpoint@1 { + remote-endpoint = <0xe1>; + reg = <0x01>; + phandle = <0x103>; + }; + + endpoint@4 { + remote-endpoint = <0xe4>; + reg = <0x04>; + phandle = <0x1b1>; + }; + + endpoint@2 { + remote-endpoint = <0xe2>; + reg = <0x02>; + phandle = <0xff>; + }; + + endpoint@0 { + remote-endpoint = <0xe0>; + reg = <0x00>; + phandle = <0x38>; + }; + }; + + port@2 { + rockchip,primary-plane = <0x08>; + rockchip,plane-mask = <0x140>; + #address-cells = <0x01>; + assigned-clocks = <0x02 0x273>; + assigned-clock-parents = <0x02 0x04>; + #size-cells = <0x00>; + reg = <0x02>; + phandle = <0x27b>; + + endpoint@5 { + remote-endpoint = <0xeb>; + reg = <0x05>; + phandle = <0x1a7>; + }; + + endpoint@3 { + remote-endpoint = <0xe9>; + reg = <0x03>; + phandle = <0xf3>; + }; + + endpoint@1 { + remote-endpoint = <0xe7>; + reg = <0x01>; + phandle = <0x3b>; + }; + + endpoint@6 { + remote-endpoint = <0xec>; + reg = <0x06>; + phandle = <0x1b2>; + }; + + endpoint@4 { + remote-endpoint = <0xea>; + reg = <0x04>; + phandle = <0xf4>; + }; + + endpoint@2 { + remote-endpoint = <0xe8>; + reg = <0x02>; + phandle = <0x100>; + }; + + endpoint@0 { + remote-endpoint = <0xe6>; + reg = <0x00>; + phandle = <0xf8>; + }; + + endpoint@7 { + remote-endpoint = <0xed>; + reg = <0x07>; + phandle = <0x1ae>; + }; + }; + }; + }; + + csi2-dphy1 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x210>; + }; + + pwm@febe0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x16d>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0000 0x00 0x10>; + phandle = <0x2d5>; + }; + + clocks { + #address-cells = <0x02>; + #size-cells = <0x02>; + compatible = "simple-bus"; + ranges; + + hclk_nvm@fd7c087c { + clock-names = "link"; + clocks = <0x02 0x141>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c087c 0x00 0x10>; + phandle = <0x03>; + }; + + mclkin-i2s0 { + clock-output-names = "i2s0_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x204>; + }; + + hclk_rkvenc1_pre@fd7c08c0 { + clock-names = "link"; + clocks = <0x02 0x1c4>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08c0 0x00 0x10>; + phandle = <0x1fe>; + }; + + mclkout-i2s1@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s1_mclkout_to_io"; + clocks = <0x02 0x291>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x208>; + rockchip,bit-shift = <0x01>; + }; + + mclkout-i2s1@fd58a000 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s1m1_mclkout_to_io"; + clocks = <0x02 0x291>; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58a000 0x00 0x04>; + phandle = <0x209>; + rockchip,bit-shift = <0x06>; + }; + + aclk_hdcp0_pre@fd7c08dc { + clock-names = "link"; + clocks = <0x02 0x26c>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x10>; + phandle = <0x1ff>; + }; + + xin32k { + clock-output-names = "xin32k"; + #clock-cells = <0x00>; + clock-frequency = <0x8000>; + compatible = "fixed-clock"; + phandle = <0x1f2>; + }; + + aclk_usb@fd7c08a8 { + clock-names = "link"; + clocks = <0x02 0x263>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a8 0x00 0x10>; + phandle = <0x6a>; + }; + + hclk_usb@fd7c08a8 { + clock-names = "link"; + clocks = <0x02 0x264>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a8 0x00 0x10>; + phandle = <0x1f5>; + }; + + hclk_vo0@fd7c08dc { + clock-names = "link"; + clocks = <0x02 0x26d>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x10>; + phandle = <0x04>; + }; + + pclk_av1_pre@fd7c0910 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0910 0x00 0x10>; + phandle = <0x201>; + }; + + mclkout-i2s2@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s2_mclkout_to_io"; + clocks = <0x02 0x28>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x20a>; + rockchip,bit-shift = <0x02>; + }; + + aclk_vdpu_low_pre@fd7c08b0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08b0 0x00 0x10>; + phandle = <0x1f4>; + }; + + mclkin-i2s3 { + clock-output-names = "i2s3_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x207>; + }; + + spll { + clock-output-names = "spll"; + #clock-cells = <0x00>; + clock-frequency = <0x29d7ab80>; + compatible = "fixed-clock"; + phandle = <0x1f1>; + }; + + xin24m { + clock-output-names = "xin24m"; + #clock-cells = <0x00>; + clock-frequency = <0x16e3600>; + compatible = "fixed-clock"; + phandle = <0x1f3>; + }; + + aclk_av1_pre@fd7c0910 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0910 0x00 0x10>; + phandle = <0x202>; + }; + + pclk_vo0_grf@fd7c08dc { + clock-names = "link"; + clocks = <0x04>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x04>; + phandle = <0x72>; + }; + + aclk_jpeg_decoder_pre@fd7c08b0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08b0 0x00 0x10>; + phandle = <0x1fc>; + }; + + aclk_hdcp1_pre@fd7c08ec { + clock-names = "link"; + clocks = <0x02 0x263>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x10>; + phandle = <0x200>; + }; + + mclkin-i2s1 { + clock-output-names = "i2s1_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x205>; + }; + + hclk_vo1@fd7c08ec { + clock-names = "link"; + clocks = <0x02 0x264>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x10>; + phandle = <0x05>; + }; + + mclkout-i2s3@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s3_mclkout_to_io"; + clocks = <0x02 0x2e>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x20b>; + rockchip,bit-shift = <0x07>; + }; + + aclk_rkvdec0_pre@fd7c08a0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a0 0x00 0x10>; + phandle = <0x1f8>; + }; + + aclk_isp1_pre@fd7c0868 { + clock-names = "link"; + clocks = <0x02 0x1e0>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0868 0x00 0x10>; + phandle = <0x1f7>; + }; + + pclk_vo1_grf@fd7c08ec { + clock-names = "link"; + clocks = <0x05>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x04>; + phandle = <0x73>; + }; + + aclk_rkvdec1_pre@fd7c08a4 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a4 0x00 0x10>; + phandle = <0x1fa>; + }; + + hclk_rkvdec0_pre@fd7c08a0 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a0 0x00 0x10>; + phandle = <0x1f9>; + }; + + hclk_sdio_pre@fd7c092c { + clock-names = "link"; + clocks = <0x03>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c092c 0x00 0x10>; + phandle = <0x203>; + }; + + hclk_rkvdec1_pre@fd7c08a4 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a4 0x00 0x10>; + phandle = <0x1fb>; + }; + + hclk_isp1_pre@fd7c0868 { + clock-names = "link"; + clocks = <0x02 0x1e1>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0868 0x00 0x10>; + phandle = <0x1f6>; + }; + + mclkout-i2s0@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s0_mclkout_to_io"; + clocks = <0x02 0x39>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x179>; + rockchip,bit-shift = <0x00>; + }; + + mclkin-i2s2 { + clock-output-names = "i2s2_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x206>; + }; + + aclk_rkvenc1_pre@fd7c08c0 { + clock-names = "link"; + clocks = <0x02 0x1c5>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08c0 0x00 0x10>; + phandle = <0x1fd>; + }; + }; + + usb@fc8c0000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + interrupts = <0x00 0xdb 0x04>; + clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; + compatible = "rockchip,rk3588-ohci\0generic-ohci"; + status = "okay"; + phys = <0x6f>; + reg = <0x00 0xfc8c0000 0x00 0x40000>; + phandle = <0x6e>; + }; + + qos@fdf40000 { + compatible = "syscon"; + reg = <0x00 0xfdf40000 0x00 0x20>; + phandle = <0xa8>; + }; + + mipi0-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x224>; + }; + + cluster1-opp-table { + rockchip,pvtm-offset = <0x18>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0x24 0x25 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,pvtm-low-len-sel = <0x03>; + rockchip,high-temp-max-freq = <0x21b100>; + opp-shared; + rockchip,reboot-freq = <0x1b7740>; + rockchip,pvtm-freq = <0x188940>; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x26>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; + phandle = <0x16>; + rockchip,idle-threshold-freq = <0x21b100>; + rockchip,pvtm-temp-prop = <0x10e 0x10e>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0xf6180>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-2016000000 { + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + }; + + opp-1200000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1416000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-supported-hw = <0x06 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-1008000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2256000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8677d400>; + opp-supported-hw = <0xf9 0x13>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1200000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1008000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-816000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2400000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8f0d1800>; + opp-supported-hw = <0xf9 0x80>; + clock-latency-ns = <0x9c40>; + }; + + opp-1800000000 { + opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2208000000 { + opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; + opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-microvolt-L2 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-hz = <0x00 0x839b6800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + opp-microvolt-L3 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; + }; + + opp-1608000000 { + opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-408000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1800000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + }; + + opp-2352000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8c30ac00>; + opp-supported-hw = <0xf9 0x48>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1608000000 { + opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2016000000 { + opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; + opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; + opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + }; + + opp-1416000000 { + opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-hz = <0x00 0x54667200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; + opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-408000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0xf9 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-2304000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x89544000>; + opp-supported-hw = <0xf9 0x24>; + clock-latency-ns = <0x9c40>; + }; + }; + + mmc@fe2d0000 { + power-domains = <0x60 0x25>; + fifo-depth = <0x100>; + pinctrl-names = "default"; + pinctrl-0 = <0x119>; + clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; + interrupts = <0x00 0xcc 0x04>; + clocks = <0x02 0x199 0x02 0x19a 0x02 0x2c0 0x02 0x2c1>; + compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; + status = "disabled"; + reg = <0x00 0xfe2d0000 0x00 0x4000>; + phandle = <0x294>; + max-frequency = <0xbebc200>; + }; + + rkcif-mipi-lvds-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22e>; + }; + + serial@feb90000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x165>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x151 0x04>; + clocks = <0x02 0xcb 0x02 0xb0>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "okay"; + reg = <0x00 0xfeb90000 0x00 0x100>; + phandle = <0x2ce>; + dmas = <0xf1 0x0d 0xf1 0x0e>; + reg-shift = <0x02>; + }; + + i2s@fddf8000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x239>; + assigned-clock-parents = <0x02 0x05>; + rockchip,capture-only; + resets = <0x02 0x3c3>; + interrupts = <0x00 0xbb 0x04>; + clocks = <0x02 0x23c 0x02 0x23c 0x02 0x238>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "okay"; + reg = <0x00 0xfddf8000 0x00 0x1000>; + phandle = <0x1ec>; + dmas = <0xf2 0x15>; + reset-names = "rx-m"; + }; + + phy@fee20000 { + rockchip,pipe-grf = <0x76>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2bf>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20007 0x02 0x4d8>; + clocks = <0x02 0x2bf 0x02 0x187 0x02 0x166>; + #phy-cells = <0x01>; + compatible = "rockchip,rk3588-naneng-combphy"; + status = "disabled"; + rockchip,pipe-phy-grf = <0x195>; + reg = <0x00 0xfee20000 0x00 0x100>; + phandle = <0x70>; + reset-names = "combphy-apb\0combphy"; + rockchip,pcie1ln-sel-bits = <0x100 0x01 0x01 0x00>; + }; + + csi2-dphy0-hw@fedc0000 { + clock-names = "pclk"; + resets = <0x02 0x17 0x02 0x16>; + clocks = <0x02 0x10c>; + compatible = "rockchip,rk3588-csi2-dphy-hw"; + status = "okay"; + rockchip,grf = <0x192>; + reg = <0x00 0xfedc0000 0x00 0x8000>; + phandle = <0x2d>; + reset-names = "srst_csiphy0\0srst_p_csiphy0"; + rockchip,sys_grf = <0xc8>; + }; + + can@fea70000 { + pinctrl-names = "default"; + pinctrl-0 = <0x147>; + clock-names = "baudclk\0apb_pclk"; + resets = <0x02 0xbd 0x02 0xbc>; + interrupts = <0x00 0x157 0x04>; + clocks = <0x02 0x74 0x02 0x73>; + compatible = "rockchip,can-2.0"; + status = "disabled"; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + reg = <0x00 0xfea70000 0x00 0x1000>; + phandle = <0x2a2>; + reset-names = "can\0can-apb"; + }; + + mailbox@fec60000 { + clock-names = "pclk_mailbox"; + interrupts = <0x00 0x3d 0x04 0x00 0x3e 0x04 0x00 0x3f 0x04 0x00 0x40 0x04>; + clocks = <0x02 0x4c>; + #mbox-cells = <0x01>; + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + status = "disabled"; + reg = <0x00 0xfec60000 0x00 0x200>; + phandle = <0x2dd>; + }; + + usbdrd3_1 { + #address-cells = <0x02>; + clock-names = "ref\0suspend\0bus"; + clocks = <0x02 0x1a6 0x02 0x1a5 0x02 0x1a4>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + ranges; + status = "okay"; + phandle = <0x47a>; + + usb@fc400000 { + power-domains = <0x60 0x1f>; + snps,dis-u1-entry-quirk; + snps,dis_enblslpm_quirk; + phy-names = "usb2-phy\0usb3-phy"; + snps,dis-u2-freeclk-exists-quirk; + phy_type = "utmi_wide"; + resets = <0x02 0x2a7>; + interrupts = <0x00 0xdd 0x04>; + snps,dis-u2-entry-quirk; + compatible = "snps,dwc3"; + snps,parkmode-disable-hs-quirk; + snps,dis-del-phy-power-chg-quirk; + status = "okay"; + snps,parkmode-disable-ss-quirk; + phys = <0x1a3 0x1a4>; + reg = <0x00 0xfc400000 0x00 0x400000>; + phandle = <0x47b>; + dr_mode = "host"; + reset-names = "usb3-otg"; + snps,dis-tx-ipgap-linecheck-quirk; + }; + }; + + sata@fe210000 { + phy-names = "sata-phy"; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x111 0x04>; + clocks = <0x02 0x171 0x02 0x16e 0x02 0x174 0x02 0x163 0x02 0x17e>; + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + status = "okay"; + interrupt-names = "hostc"; + phys = <0x108 0x01>; + reg = <0x00 0xfe210000 0x00 0x1000>; + phandle = <0x290>; + ports-implemented = <0x01>; + }; + + leds { + compatible = "gpio-leds"; + status = "okay"; + phandle = <0x497>; + + user { + linux,default-trigger = "ir-user-click"; + label = ":user"; + default-state = "off"; + phandle = <0x499>; + gpios = <0x182 0x03 0x00>; + }; + + power { + linux,default-trigger = "ir-power-click"; + label = ":power"; + default-state = "on"; + status = "disabled"; + phandle = <0x498>; + gpios = <0x7b 0x15 0x00>; + }; + }; + + rkcif-mipi-lvds5-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x479>; + }; + + qos@fdf80000 { + compatible = "syscon"; + reg = <0x00 0xfdf80000 0x00 0x20>; + phandle = <0x9f>; + }; + + spdif-tx@fdde0000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x254>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc4 0x04>; + clocks = <0x02 0x257 0x02 0x253>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfdde0000 0x00 0x1000>; + phandle = <0x27e>; + dmas = <0xf1 0x07>; + }; + + qos@fdf35000 { + compatible = "syscon"; + reg = <0x00 0xfdf35000 0x00 0x20>; + phandle = <0x87>; + }; + + psci { + method = "smc"; + compatible = "arm,psci-1.0"; + }; + + rkcif-mipi-lvds { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x52>; + }; + + rga@fdb80000 { + power-domains = <0x60 0x15>; + clock-names = "aclk_rga2\0hclk_rga2\0clk_rga2"; + interrupts = <0x00 0x74 0x04>; + clocks = <0x02 0x1b7 0x02 0x1b6 0x02 0x1b8>; + compatible = "rockchip,rga2_core0"; + status = "okay"; + interrupt-names = "rga2_irq"; + reg = <0x00 0xfdb80000 0x00 0x1000>; + phandle = <0x26b>; + }; + + qos@fdf66800 { + compatible = "syscon"; + reg = <0x00 0xfdf66800 0x00 0x20>; + phandle = <0x97>; + }; + + spi@feb10000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x151 0x152 0x153>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x147 0x04>; + clocks = <0x02 0xa4 0x02 0x9f>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfeb10000 0x00 0x1000>; + phandle = <0x2ac>; + dmas = <0x7c 0x10 0x7c 0x11>; + }; + + rkcif-mipi-lvds4-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x472>; + }; + + hdmi@fdea0000 { + power-domains = <0x60 0x1a>; + reg-io-width = <0x04>; + pinctrl-names = "default"; + phy-names = "hdmi"; + pinctrl-0 = <0x1a8 0x1a9 0x1aa 0x1ab>; + clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; + resets = <0x02 0x3d7 0x02 0x49d>; + interrupts = <0x00 0xad 0x04 0x00 0xae 0x04 0x00 0xaf 0x04 0x00 0xb0 0x04 0x00 0x169 0x04>; + clocks = <0x02 0x224 0x02 0x266 0x02 0x225 0x02 0x226 0x02 0x24c 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x36>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-dw-hdmi"; + status = "disabled"; + rockchip,grf = <0xc8>; + phys = <0x1ac>; + reg = <0x00 0xfdea0000 0x00 0x10000 0x00 0xfdeb0000 0x00 0x10000>; + phandle = <0x1e1>; + reset-names = "ref\0hdp"; + rockchip,vo1_grf = <0xd8>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x482>; + + endpoint@1 { + remote-endpoint = <0x3f>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe5>; + }; + + endpoint@2 { + remote-endpoint = <0x1ae>; + status = "disabled"; + reg = <0x02>; + phandle = <0xed>; + }; + + endpoint@0 { + remote-endpoint = <0x1ad>; + status = "disabled"; + reg = <0x00>; + phandle = <0xdf>; + }; + }; + }; + }; + + pcie@fe180000 { + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x30 0x3f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x08>; + resets = <0x02 0x210 0x02 0x21f>; + interrupts = <0x00 0xf8 0x04 0x00 0xf7 0x04 0x00 0xf6 0x04 0x00 0xf5 0x04 0x00 0xf4 0x04>; + clocks = <0x02 0x151 0x02 0x156 0x02 0x14c 0x02 0x15c 0x02 0x161 0x02 0x2c5>; + interrupt-map = <0x00 0x00 0x00 0x01 0x105 0x00 0x00 0x00 0x00 0x02 0x105 0x01 0x00 0x00 0x00 0x03 0x105 0x02 0x00 0x00 0x00 0x04 0x105 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x02>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf3000000 0x00 0xf3000000 0x00 0x100000 0x81000000 0x00 0xf3100000 0x00 0xf3100000 0x00 0x100000 0x82000000 0x00 0xf3200000 0x00 0xf3200000 0x00 0xe00000 0xc3000000 0x09 0xc0000000 0x09 0xc0000000 0x00 0x40000000>; + msi-map = <0x3000 0x106 0x3000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x70 0x02>; + num-viewport = <0x04>; + reg = <0x00 0xfe180000 0x00 0x10000 0x0a 0x40c00000 0x00 0x400000>; + linux,pci-domain = <0x03>; + phandle = <0x28c>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x08>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xf5 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x105>; + interrupt-controller; + }; + }; + + i2s@fe480000 { + pinctrl-names = "default"; + pinctrl-0 = <0x120 0x121 0x122 0x123 0x124 0x125 0x126 0x127 0x128 0x129>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + resets = <0x02 0xc002a 0x02 0xc002d>; + interrupts = <0x00 0xb5 0x04>; + clocks = <0x02 0x28c 0x02 0x290 0x02 0x288>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "disabled"; + reg = <0x00 0xfe480000 0x00 0x1000>; + phandle = <0x1d1>; + dmas = <0x7c 0x02 0x7c 0x03>; + reset-names = "tx-m\0rx-m"; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd5c0000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5c0000 0x00 0x100>; + phandle = <0x1cb>; + }; + + i2c@feab0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x14a>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb2 0x02 0xaa>; + interrupts = <0x00 0x140 0x04>; + clocks = <0x02 0x8f 0x02 0x87>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfeab0000 0x00 0x1000>; + phandle = <0x2a6>; + reset-names = "i2c\0apb"; + + gpio@21 { + gpio-controller; + gpio-group-num = <0xc8>; + compatible = "nxp,pca9555"; + status = "okay"; + reg = <0x21>; + phandle = <0x182>; + #gpio-cells = <0x02>; + }; + }; + + iommu@fdcb7f00 { + power-domains = <0x60 0x1b>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x84 0x04>; + clocks = <0x02 0x1de 0x02 0x1df>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "isp0_mmu"; + reg = <0x00 0xfdcb7f00 0x00 0x100>; + phandle = <0xd0>; + }; + + qos@fdf3e600 { + compatible = "syscon"; + reg = <0x00 0xfdf3e600 0x00 0x20>; + phandle = <0xae>; + }; + + syscon@fd5b8000 { + compatible = "rockchip,pcie30-phy-grf\0syscon"; + reg = <0x00 0xfd5b8000 0x00 0x10000>; + phandle = <0x1cc>; + }; + + qos@fdf81200 { + compatible = "syscon"; + reg = <0x00 0xfdf81200 0x00 0x20>; + phandle = <0xa1>; + }; + + mipi5-csi2-hw@fdd60000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x329>; + interrupts = <0x00 0x99 0x04 0x00 0x9a 0x04>; + clocks = <0x02 0x1d4>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd60000 0x00 0x10000>; + phandle = <0x4c>; + reset-names = "srst_csihost_p"; + }; + + qos@fdf72000 { + compatible = "syscon"; + reg = <0x00 0xfdf72000 0x00 0x20>; + phandle = <0x82>; + }; + + timer@feae0000 { + clock-names = "pclk\0timer"; + interrupts = <0x00 0x121 0x04>; + clocks = <0x02 0x5c 0x02 0x5f>; + compatible = "rockchip,rk3588-timer\0rockchip,rk3288-timer"; + reg = <0x00 0xfeae0000 0x00 0x20>; + phandle = <0x2a9>; + }; + + rkcif-mipi-lvds-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22c>; + }; + + syscon@fd5b5000 { + compatible = "rockchip,mipi-dphy-grf\0syscon"; + reg = <0x00 0xfd5b5000 0x00 0x1000>; + phandle = <0x193>; + }; + + i2c@fec90000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x185>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb6 0x02 0xae>; + interrupts = <0x00 0x144 0x04>; + clocks = <0x02 0x93 0x02 0x8b>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfec90000 0x00 0x1000>; + phandle = <0x2e4>; + reset-names = "i2c\0apb"; + }; + + avsd-plus@fdb51000 { + power-domains = <0x60 0x15>; + iommus = <0xb7>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1c0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + interrupts = <0x00 0x77 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,disable-auto-freq; + compatible = "rockchip,avs-plus-decoder"; + rockchip,resetgroup-node = <0x00>; + status = "disabled"; + interrupt-names = "irq_avsd"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb51000 0x00 0x200>; + phandle = <0x268>; + reset-names = "shared_video_a\0shared_video_h"; + }; + + dp1-sound { + rockchip,jack-det; + rockchip,cpu = <0x1e2>; + rockchip,codec = <0x1e3 0x01>; + rockchip,card-name = "rockchip,dp1"; + compatible = "rockchip,hdmi"; + status = "disabled"; + phandle = <0x4a9>; + rockchip,mclk-fs = <0x200>; + }; + + mipi1-csi2-hw@fdd20000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x325>; + interrupts = <0x00 0x91 0x04 0x00 0x92 0x04>; + clocks = <0x02 0x1d0>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd20000 0x00 0x10000>; + phandle = <0x48>; + reset-names = "srst_csihost_p"; + }; + + iep@fdbb0000 { + power-domains = <0x60 0x15>; + iommus = <0xc1>; + clock-names = "aclk\0hclk\0sclk"; + assigned-clocks = <0x02 0x1aa>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2d5 0x02 0x2d4 0x02 0x2d6>; + interrupts = <0x00 0x75 0x04>; + clocks = <0x02 0x1aa 0x02 0x1a9 0x02 0x1ab>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x06>; + rockchip,disable-auto-freq; + compatible = "rockchip,iep-v2"; + status = "okay"; + interrupt-names = "irq_iep"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbb0000 0x00 0x500>; + phandle = <0x271>; + reset-names = "rst_a\0rst_h\0rst_s"; + }; + + dsi@fde20000 { + power-domains = <0x60 0x18>; + #address-cells = <0x01>; + phy-names = "dcphy"; + clock-names = "pclk\0sys_clk"; + resets = <0x02 0x354>; + interrupts = <0x00 0xa7 0x04>; + clocks = <0x02 0x278 0x02 0x27a>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dsi2"; + status = "disabled"; + rockchip,grf = <0xd7>; + phys = <0x2f>; + reg = <0x00 0xfde20000 0x00 0x10000>; + phandle = <0x281>; + reset-names = "apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x282>; + + endpoint@1 { + remote-endpoint = <0x39>; + status = "disabled"; + reg = <0x01>; + phandle = <0xee>; + }; + + endpoint@0 { + remote-endpoint = <0xf3>; + status = "disabled"; + reg = <0x00>; + phandle = <0xe9>; + }; + }; + }; + }; + + rkcif-mipi-lvds5-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x477>; + }; + + edp@fded0000 { + power-domains = <0x60 0x1a>; + phy-names = "dp"; + clock-names = "dp\0pclk\0spdif\0hclk"; + resets = <0x02 0x3e4 0x02 0x3e3>; + interrupts = <0x00 0xa4 0x04>; + clocks = <0x02 0x214 0x02 0x213 0x02 0x215 0x05>; + compatible = "rockchip,rk3588-edp"; + status = "disabled"; + rockchip,grf = <0xd8>; + phys = <0x1af>; + reg = <0x00 0xfded0000 0x00 0x1000>; + phandle = <0x483>; + reset-names = "dp\0apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x1b1>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe4>; + }; + + endpoint@2 { + remote-endpoint = <0x1b2>; + status = "disabled"; + reg = <0x02>; + phandle = <0xec>; + }; + + endpoint@0 { + remote-endpoint = <0x1b0>; + status = "disabled"; + reg = <0x00>; + phandle = <0xde>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x484>; + }; + }; + }; + }; + + qos@fdf67000 { + compatible = "syscon"; + reg = <0x00 0xfdf67000 0x00 0x20>; + phandle = <0x9c>; + }; + + qos@fdf64000 { + compatible = "syscon"; + reg = <0x00 0xfdf64000 0x00 0x20>; + phandle = <0x9b>; + }; + + npu-opp-table { + rockchip,pvtm-offset = <0x50>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,init-freq = <0xf4240>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0xb4 0xb5 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; + rockchip,pvtm-thermal-zone = "npu-thermal"; + rockchip,high-temp-max-freq = "\0\f5"; + rockchip,opp-clocks = <0x02 0x12a 0x02 0x12f>; + rockchip,pvtm-freq = "\0\f5"; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0xb6>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; + phandle = <0xb1>; + rockchip,pvtm-temp-prop = <0xffffff8f 0xffffff8f>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0x7a120>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-700000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-300000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-500000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-j-m-400000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-700000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-j-m-950000000 { + opp-microvolt = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + opp-microvolt-L4 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L2 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-hz = <0x00 0x389fd980>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L5 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-microvolt-L3 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L1 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-900000000 { + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-hz = <0x00 0x35a4e900>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; + + opp-j-m-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-400000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-j-m-300000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-600000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-1000000000 { + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-hz = <0x00 0x3b9aca00>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + }; + + opp-j-m-500000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L4 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; + opp-microvolt-L2 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L3 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; + }; + }; + + syscon@fd590000 { + compatible = "rockchip,rk3588-bigcore0-grf\0syscon"; + reg = <0x00 0xfd590000 0x00 0x100>; + phandle = <0x26>; + }; + + syscon@fd5dc000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5dc000 0x00 0x4000>; + phandle = <0x25e>; + + usb2-phy@c000 { + clock-output-names = "usb480m_phy3"; + clock-names = "phyclk"; + resets = <0x02 0xc004a 0x02 0x48b>; + interrupts = <0x00 0x188 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0xc000 0x10>; + phandle = <0x6d>; + reset-names = "phy\0apb"; + + host-port { + phy-supply = <0x75>; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x6f>; + }; + }; + }; + + pcie-clk3 { + regulator-boot-on; + regulator-always-on; + regulator-name = "pcie_clk3"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x496>; + gpios = <0xfe 0x09 0x01>; + }; + + pwm@febf0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x174>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04 0x00 0x15f 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0030 0x00 0x10>; + phandle = <0x2dc>; + }; + + hwspinlock@fe5a0000 { + compatible = "rockchip,hwspinlock"; + reg = <0x00 0xfe5a0000 0x00 0x100>; + phandle = <0x29f>; + #hwlock-cells = <0x01>; + }; + + rkcif-mipi-lvds4-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x474>; + }; + + sram@10f000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "mmio-sram"; + ranges = <0x00 0x00 0x10f000 0x100>; + reg = <0x00 0x10f000 0x00 0x100>; + + sram@0 { + compatible = "arm,scmi-shmem"; + reg = <0x00 0x100>; + phandle = <0x46>; + }; + }; + + hdmirx-controller@fdee0000 { + power-domains = <0x60 0x1a>; + pinctrl-names = "default"; + pinctrl-0 = <0x1b3 0x1b4>; + clock-names = "aclk\0audio\0cr_para\0pclk\0ref\0hclk_s_hdmirx\0hclk_vo1"; + reg-names = "hdmirx_regs"; + resets = <0x02 0x3d9 0x02 0x3da 0x02 0x3db 0x02 0x3b7>; + interrupts = <0x00 0xb1 0x04 0x00 0x1b4 0x04 0x00 0xb3 0x04>; + clocks = <0x02 0x21a 0x02 0x21f 0x02 0x2b2 0x02 0x21b 0x02 0x21c 0x02 0x232 0x05>; + hpd-trigger-level = <0x01>; + #sound-dai-cells = <0x01>; + compatible = "rockchip,rk3588-hdmirx-ctrler\0rockchip,hdmirx-ctrler"; + status = "disabled"; + rockchip,grf = <0xc8>; + interrupt-names = "cec\0hdmi\0dma"; + hdmirx-det-gpios = <0xfe 0x1d 0x01>; + reg = <0x00 0xfdee0000 0x00 0x6000>; + phandle = <0x1eb>; + reset-names = "rst_a\0rst_p\0rst_ref\0rst_biu"; + rockchip,vo1_grf = <0xd8>; + }; + + qos@fdf61000 { + compatible = "syscon"; + reg = <0x00 0xfdf61000 0x00 0x20>; + phandle = <0x90>; + }; + + qos@fdf40600 { + compatible = "syscon"; + reg = <0x00 0xfdf40600 0x00 0x20>; + phandle = <0xa4>; + }; + + syscon@fd588000 { + compatible = "rockchip,rk3588-pmu0-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd588000 0x00 0x2000>; + phandle = <0x25a>; + + reboot-mode { + mode-normal = <0x5242c300>; + mode-loader = <0x5242c301>; + mode-quiescent = <0x5242c30e>; + mode-bootloader = <0x5242c301>; + mode-recovery = <0x5242c303>; + mode-watchdog = <0x5242c308>; + mode-ums = <0x5242c30c>; + mode-fastboot = <0x5242c309>; + offset = <0x80>; + compatible = "syscon-reboot-mode"; + mode-winusb = <0x5242c30f>; + phandle = <0x25b>; + mode-charge = <0x5242c30b>; + mode-panic = <0x5242c307>; + }; + }; + + syscon@fd5a4000 { + compatible = "rockchip,rk3588-vop-grf\0syscon"; + reg = <0x00 0xfd5a4000 0x00 0x2000>; + phandle = <0xd7>; + }; + + iommu@fdb60f00 { + power-domains = <0x60 0x16>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x72 0x04>; + clocks = <0x02 0x1ba 0x02 0x1b9>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "rga3_0_mmu"; + reg = <0x00 0xfdb60f00 0x00 0x100>; + phandle = <0xb9>; + }; + + pwm@febf0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x173>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0020 0x00 0x10>; + phandle = <0x2db>; + }; + + rkispp@fdcd0000 { + power-domains = <0x60 0x1d>; + iommus = <0xd2>; + clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; + assigned-clocks = <0x02 0x1d6>; + assigned-clock-rates = <0x5f5e100>; + interrupts = <0x00 0x8b 0x04>; + clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; + compatible = "rockchip,rk3588-rkispp"; + status = "disabled"; + interrupt-names = "fec_irq"; + reg = <0x00 0xfdcd0000 0x00 0xf00>; + phandle = <0x5b>; + }; + + tsadc@fec00000 { + pinctrl-names = "gpio\0otpout"; + pinctrl-0 = <0x175>; + clock-names = "tsadc\0apb_pclk"; + rockchip,hw-tshut-polarity = <0x00>; + assigned-clocks = <0x02 0xaa>; + assigned-clock-rates = <0x1e8480>; + resets = <0x02 0xc1 0x02 0xc0>; + interrupts = <0x00 0x18d 0x04>; + rockchip,hw-tshut-mode = <0x00>; + clocks = <0x02 0xaa 0x02 0xa9>; + #thermal-sensor-cells = <0x01>; + compatible = "rockchip,rk3588-tsadc"; + pinctrl-1 = <0x176>; + status = "okay"; + reg = <0x00 0xfec00000 0x00 0x400>; + phandle = <0x5d>; + reset-names = "tsadc\0tsadc-apb"; + rockchip,hw-tshut-temp = <0x1d4c0>; + }; + + iommu@fdbb0800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x75 0x04>; + clocks = <0x02 0x1aa 0x02 0x1a9>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_iep_mmu"; + reg = <0x00 0xfdbb0800 0x00 0x100>; + phandle = <0xc1>; + }; + + phy@fed60000 { + clock-names = "ref\0apb"; + resets = <0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d>; + clocks = <0x02 0x2b5 0x02 0x267>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy"; + status = "disabled"; + rockchip,grf = <0x18a>; + reg = <0x00 0xfed60000 0x00 0x2000>; + phandle = <0x101>; + reset-names = "apb\0init\0cmn\0lane"; + }; + + pvtm@fda50000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-bigcore1-pvtm"; + reg = <0x00 0xfda50000 0x00 0x100>; + + pvtm@1 { + clock-names = "clk\0pclk"; + clocks = <0x02 0x2c8 0x02 0x17>; + reg = <0x01>; + }; + }; + + csi2-dcphy0 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x20d>; + }; + + mailbox@fece0000 { + clock-names = "pclk_mailbox"; + interrupts = <0x00 0x4d 0x04 0x00 0x4e 0x04 0x00 0x4f 0x04 0x00 0x50 0x04>; + clocks = <0x02 0x4e>; + #mbox-cells = <0x01>; + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + status = "disabled"; + reg = <0x00 0xfece0000 0x00 0x200>; + phandle = <0x2e9>; + }; + + rkcif-mipi-lvds3-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x23a>; + }; + + rkcif-mipi-lvds1-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x22f>; + }; + + dfi@fe060000 { + rockchip,pmu_grf = <0x104>; + compatible = "rockchip,rk3588-dfi"; + status = "disabled"; + reg = <0x00 0xfe060000 0x00 0x10000>; + phandle = <0x40>; + }; + + iommu@fdca0000 { + power-domains = <0x60 0x17>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x6d 0x04>; + clocks = <0x02 0x49 0x02 0x4b>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-av1"; + status = "okay"; + interrupt-names = "irq_av1d_mmu"; + reg = <0x00 0xfdca0000 0x00 0x600>; + phandle = <0xce>; + }; + + mipi5-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x229>; + }; + + qos@fdf35600 { + compatible = "syscon"; + reg = <0x00 0xfdf35600 0x00 0x20>; + phandle = <0x8a>; + }; + + syscon@fd5e4000 { + compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; + reg = <0x00 0xfd5e4000 0x00 0x100>; + phandle = <0x1c7>; + }; + + iommu@fdba8800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x7d 0x04>; + clocks = <0x02 0x1b0 0x02 0x1b1>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege2_mmu"; + reg = <0x00 0xfdba8800 0x00 0x40>; + phandle = <0xbf>; + }; + + mpp-srv { + rockchip,resetgroup-count = <0x01>; + rockchip,taskqueue-count = <0x0c>; + compatible = "rockchip,mpp-service"; + status = "okay"; + phandle = <0xb8>; + }; + + cspmu@fd10c000 { + compatible = "rockchip,cspmu"; + reg = <0x00 0xfd10c000 0x00 0x1000 0x00 0xfd10d000 0x00 0x1000 0x00 0xfd10e000 0x00 0x1000 0x00 0xfd10f000 0x00 0x1000 0x00 0xfd12c000 0x00 0x1000 0x00 0xfd12d000 0x00 0x1000 0x00 0xfd12e000 0x00 0x1000 0x00 0xfd12f000 0x00 0x1000>; + phandle = <0x48e>; + }; + + pwm@febf0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x172>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0010 0x00 0x10>; + phandle = <0x2da>; + }; + + iommu@fdbef000 { + power-domains = <0x60 0x11>; + rockchip,shootdown-entire; + interrupts = <0x00 0x66 0x04 0x00 0x67 0x04>; + clocks = <0x02 0x1ca 0x02 0x1c9>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvenc1_mmu0\0irq_rkvenc1_mmu1"; + reg = <0x00 0xfdbef000 0x00 0x40 0x00 0xfdbef040 0x00 0x40>; + phandle = <0xc5>; + lock-names = "aclk\0iface"; + }; + + serial@feb60000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x162>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14e 0x04>; + clocks = <0x02 0xbf 0x02 0xad>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb60000 0x00 0x100>; + phandle = <0x2cb>; + dmas = <0x7c 0x0c 0x7c 0x0d>; + reg-shift = <0x02>; + }; + + hdmiin-sound { + rockchip,jack-det; + rockchip,cpu = <0x1ec>; + rockchip,codec = <0x1eb 0x00>; + rockchip,bitclock-master = <0x1eb>; + rockchip,card-name = "rockchip,hdmiin"; + rockchip,format = "i2s"; + compatible = "rockchip,hdmi"; + phandle = <0x4ac>; + rockchip,frame-master = <0x1eb>; + rockchip,mclk-fs = <0x80>; + }; + + i2s@fddc8000 { + power-domains = <0x60 0x19>; + clock-names = "mclk_tx\0hclk"; + assigned-clocks = <0x02 0x1ff>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x391>; + interrupts = <0x00 0xbc 0x04>; + clocks = <0x02 0x201 0x02 0x1fe>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "disabled"; + reg = <0x00 0xfddc8000 0x00 0x1000>; + phandle = <0x47c>; + dmas = <0xf2 0x16>; + reset-names = "tx-m"; + }; + + pcie30-avdd0v75 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "pcie30_avdd0v75"; + compatible = "regulator-fixed"; + phandle = <0x4a7>; + vin-supply = <0x1df>; + }; + + timer { + interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; + compatible = "arm,armv8-timer"; + }; + + rockchip-suspend { + rockchip,sleep-debug-en = <0x01>; + rockchip,sleep-mode-config = <0x5000604>; + compatible = "rockchip,pm-rk3588"; + status = "okay"; + rockchip,wakeup-config = <0x100>; + phandle = <0x246>; + }; + + decompress@fea80000 { + clock-names = "aclk\0dclk\0pclk"; + resets = <0x02 0x118>; + interrupts = <0x00 0x55 0x04>; + clocks = <0x02 0x75 0x02 0x77 0x02 0x76>; + compatible = "rockchip,hw-decompress"; + status = "disabled"; + reg = <0x00 0xfea80000 0x00 0x1000>; + phandle = <0x2a3>; + reset-names = "dresetn"; + }; + + dma-controller@fea30000 { + clock-names = "apb_pclk"; + interrupts = <0x00 0x58 0x04 0x00 0x59 0x04>; + clocks = <0x02 0x79>; + arm,pl330-periph-burst; + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfea30000 0x00 0x4000>; + phandle = <0xf1>; + #dma-cells = <0x01>; + }; + + pwm@febf0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x171>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0000 0x00 0x10>; + phandle = <0x2d9>; + }; + + iommu@fdcd8f00 { + power-domains = <0x60 0x1d>; + clock-names = "aclk\0iface\0pclk"; + interrupts = <0x00 0x8e 0x04>; + clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "fec1_mmu"; + reg = <0x00 0xfdcd8f00 0x00 0x100>; + phandle = <0xd3>; + }; + + spdif-tx@fddb0000 { + power-domains = <0x60 0x19>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x205>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc3 0x04>; + clocks = <0x02 0x209 0x02 0x204>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfddb0000 0x00 0x1000>; + phandle = <0x1d5>; + dmas = <0xf1 0x06>; + }; + + rkisp1-vir2 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x241>; + }; + + pcie-clk1 { + regulator-boot-on; + regulator-always-on; + regulator-name = "pcie_clk1"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x494>; + vin-supply = <0x1cd>; + gpios = <0x181 0x15 0x01>; + }; + + jpege-core@fdba8000 { + power-domains = <0x60 0x15>; + iommus = <0xbf>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1b0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2ce 0x02 0x2cf>; + interrupts = <0x00 0x7e 0x04>; + clocks = <0x02 0x1b0 0x02 0x1b1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege2"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdba8000 0x00 0x400>; + phandle = <0x26f>; + reset-names = "video_a\0video_h"; + }; + + qos@fdf66400 { + compatible = "syscon"; + reg = <0x00 0xfdf66400 0x00 0x20>; + phandle = <0x95>; + }; + + spdif-tx1-sound { + simple-audio-card,name = "rockchip,spdif-tx1"; + compatible = "simple-audio-card"; + status = "disabled"; + phandle = <0x49d>; + simple-audio-card,mclk-fs = <0x80>; + + simple-audio-card,cpu { + sound-dai = <0x1d7>; + }; + + simple-audio-card,codec { + sound-dai = <0x1d8>; + }; + }; + + mmc@fe2e0000 { + mmc-hs400-enhanced-strobe; + clock-names = "core\0bus\0axi\0block\0timer"; + assigned-clocks = <0x02 0x13b 0x02 0x13c 0x02 0x13a>; + bus-width = <0x08>; + non-removable; + no-sdio; + assigned-clock-rates = <0xbebc200 0x16e3600 0xbebc200>; + resets = <0x02 0x1f6 0x02 0x1f4 0x02 0x1f5 0x02 0x1f7 0x02 0x1f8>; + mmc-hs400-1_8v; + interrupts = <0x00 0xcd 0x04>; + clocks = <0x02 0x13a 0x02 0x138 0x02 0x139 0x02 0x13b 0x02 0x13c>; + no-sd; + compatible = "rockchip,rk3588-dwcmshc\0rockchip,dwcmshc-sdhci"; + status = "okay"; + reg = <0x00 0xfe2e0000 0x00 0x10000>; + phandle = <0x295>; + max-frequency = <0xbebc200>; + reset-names = "core\0bus\0axi\0block\0timer"; + }; + + dma-controller@fed10000 { + clock-names = "apb_pclk"; + interrupts = <0x00 0x5a 0x04 0x00 0x5b 0x04>; + clocks = <0x02 0x7a>; + arm,pl330-periph-burst; + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfed10000 0x00 0x4000>; + phandle = <0xf2>; + #dma-cells = <0x01>; + }; + + iommu@fc900000 { + interrupts = <0x00 0x171 0x04 0x00 0x173 0x04 0x00 0x176 0x04 0x00 0x16f 0x04>; + #iommu-cells = <0x01>; + compatible = "arm,smmu-v3"; + status = "disabled"; + interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; + reg = <0x00 0xfc900000 0x00 0x200000>; + phandle = <0x256>; + }; + + mailbox@fec70000 { + clock-names = "pclk_mailbox"; + interrupts = <0x00 0x45 0x04 0x00 0x46 0x04 0x00 0x47 0x04 0x00 0x48 0x04>; + clocks = <0x02 0x4d>; + #mbox-cells = <0x01>; + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + status = "disabled"; + reg = <0x00 0xfec70000 0x00 0x200>; + phandle = <0x2de>; + }; + + pcie@fe150000 { + power-domains = <0x60 0x22>; + vpcie3v3-supply = <0x1b8>; + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x00 0x0f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x10>; + resets = <0x02 0x20d 0x02 0x21c>; + interrupts = <0x00 0x107 0x04 0x00 0x106 0x04 0x00 0x105 0x04 0x00 0x104 0x04 0x00 0x103 0x04>; + clocks = <0x02 0x14e 0x02 0x153 0x02 0x149 0x02 0x158 0x02 0x15e 0x02 0x183>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1b5 0x00 0x00 0x00 0x00 0x02 0x1b5 0x01 0x00 0x00 0x00 0x03 0x1b5 0x02 0x00 0x00 0x00 0x04 0x1b5 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x03>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + reset-gpios = <0x10d 0x0e 0x00>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf0000000 0x00 0xf0000000 0x00 0x100000 0x81000000 0x00 0xf0100000 0x00 0xf0100000 0x00 0x100000 0x82000000 0x00 0xf0200000 0x00 0xf0200000 0x00 0xe00000 0xc3000000 0x09 0x00 0x09 0x00 0x00 0x40000000>; + msi-map = <0x00 0x1b6 0x00 0x1000>; + #interrupt-cells = <0x01>; + status = "okay"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x1b7>; + num-viewport = <0x08>; + reg = <0x00 0xfe150000 0x00 0x10000 0x0a 0x40000000 0x00 0x400000>; + linux,pci-domain = <0x00>; + phandle = <0x485>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x10>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0x104 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x1b5>; + interrupt-controller; + }; + }; + + rng@fe378000 { + clock-names = "hclk_trng"; + resets = <0x11a 0x30>; + interrupts = <0x00 0x190 0x04>; + clocks = <0x0e 0x0c>; + compatible = "rockchip,trngv1"; + status = "okay"; + reg = <0x00 0xfe378000 0x00 0x200>; + phandle = <0x297>; + reset-names = "reset"; + }; + + sata@fe220000 { + phy-names = "sata-phy"; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x112 0x04>; + clocks = <0x02 0x172 0x02 0x16f 0x02 0x175 0x02 0x164 0x02 0x17f>; + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + status = "disabled"; + interrupt-names = "hostc"; + phys = <0x1bc 0x01>; + reg = <0x00 0xfe220000 0x00 0x1000>; + phandle = <0x48a>; + ports-implemented = <0x01>; + }; + + rkcif-mipi-lvds5 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x1a2>; + }; + + vcc-sata-pwr-en-regulator { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + gpio = <0x182 0x0c 0x00>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc_sata_pwr_en"; + startup-delay-us = <0x1388>; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4a3>; + vin-supply = <0x1cd>; + }; + + pwm-fan { + cooling-levels = <0x32 0x32 0x64 0x96 0xc8 0xff>; + rockchip,temp-trips = <0xc350 0x01 0xd6d8 0x02 0xea60 0x03 0xfde8 0x04 0x11170 0x05>; + compatible = "pwm-fan"; + phandle = <0x4ad>; + pwms = <0x1ed 0x00 0xc350 0x00>; + #cooling-cells = <0x02>; + fan-supply = <0x78>; + }; + + qos@fdf3e200 { + compatible = "syscon"; + reg = <0x00 0xfdf3e200 0x00 0x20>; + phandle = <0xab>; + }; + + spdif-tx@fe4e0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x142>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x3f>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc1 0x04>; + clocks = <0x02 0x41 0x02 0x3e>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfe4e0000 0x00 0x1000>; + phandle = <0x29d>; + dmas = <0x7c 0x05>; + }; + + vad@fe4d0000 { + rockchip,det-channel = <0x00>; + rockchip,audio-src = <0x00>; + clock-names = "hclk"; + reg-names = "vad"; + interrupts = <0x00 0xca 0x04>; + clocks = <0x02 0x2a0>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-vad"; + status = "disabled"; + rockchip,mode = <0x00>; + reg = <0x00 0xfe4d0000 0x00 0x1000>; + phandle = <0x29c>; + }; + + jpegd@fdb90000 { + power-domains = <0x60 0x15>; + iommus = <0xbb>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1b4>; + rockchip,normal-rates = <0x23c34600 0x00>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x2d2 0x02 0x2d3>; + interrupts = <0x00 0x81 0x04>; + clocks = <0x02 0x1b4 0x02 0x1b5>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x01>; + compatible = "rockchip,rkv-jpeg-decoder-v1"; + status = "okay"; + interrupt-names = "irq_jpegd"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb90000 0x00 0x400>; + phandle = <0x26c>; + reset-names = "video_a\0video_h"; + }; + + cpuinfo { + nvmem-cells = <0x2a 0x2b 0x2c>; + compatible = "rockchip,cpuinfo"; + nvmem-cell-names = "id\0cpu-version\0cpu-code"; + }; + + qos@fdf60400 { + compatible = "syscon"; + reg = <0x00 0xfdf60400 0x00 0x20>; + phandle = <0x8f>; + }; + + spi@feb20000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x01>; + pinctrl-0 = <0x154 0x155>; + clock-names = "spiclk\0apb_pclk"; + assigned-clocks = <0x02 0xa5>; + assigned-clock-rates = <0xbebc200>; + interrupts = <0x00 0x148 0x04>; + clocks = <0x02 0xa5 0x02 0xa0>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "okay"; + reg = <0x00 0xfeb20000 0x00 0x1000>; + phandle = <0x2ad>; + dmas = <0xf1 0x0f 0xf1 0x10>; + + rk806single@0 { + vcc11-supply = <0x15b>; + pinctrl-names = "default\0pmic-power-off"; + vcc12-supply = <0x78>; + vcc13-supply = <0x15c>; + vcc14-supply = <0x15c>; + pinctrl-0 = <0x156 0x157 0x158 0x159>; + interrupts = <0x07 0x08>; + spi-max-frequency = <0xf4240>; + interrupt-parent = <0x7b>; + low_voltage_threshold = <0xbb8>; + vcca-supply = <0x78>; + vcc1-supply = <0x78>; + pmic-reset-func = <0x01>; + vcc2-supply = <0x78>; + hotdie_temperture_threshold = <0x73>; + compatible = "rockchip,rk806"; + vcc3-supply = <0x78>; + pinctrl-1 = <0x15a>; + vcc4-supply = <0x78>; + vcc5-supply = <0x78>; + reg = <0x00>; + phandle = <0x2ae>; + vcc6-supply = <0x78>; + shutdown_voltage_threshold = <0xa8c>; + vcc7-supply = <0x78>; + vcc8-supply = <0x78>; + shutdown_temperture_threshold = <0xa0>; + vcc9-supply = <0x78>; + vcc10-supply = <0x78>; + + pinctrl_rk806 { + gpio-controller; + phandle = <0x2af>; + #gpio-cells = <0x02>; + + rk806_dvs2_rst { + function = "pin_fun3"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b4>; + }; + + rk806_dvs3_null { + function = "pin_fun0"; + pins = "gpio_pwrctrl3"; + phandle = <0x159>; + }; + + rk806_dvs3_dvs { + function = "pin_fun4"; + pins = "gpio_pwrctrl3"; + phandle = <0x2ba>; + }; + + rk806_dvs3_rst { + function = "pin_fun3"; + pins = "gpio_pwrctrl3"; + phandle = <0x2b9>; + }; + + rk806_dvs2_null { + function = "pin_fun0"; + pins = "gpio_pwrctrl2"; + phandle = <0x158>; + }; + + rk806_dvs1_pwrdn { + function = "pin_fun2"; + pins = "gpio_pwrctrl1"; + phandle = <0x15a>; + }; + + rk806_dvs1_slp { + function = "pin_fun1"; + pins = "gpio_pwrctrl1"; + phandle = <0x2b0>; + }; + + rk806_dvs1_null { + function = "pin_fun0"; + pins = "gpio_pwrctrl2"; + phandle = <0x157>; + }; + + rk806_dvs3_gpio { + function = "pin_fun5"; + pins = "gpio_pwrctrl3"; + phandle = <0x2bb>; + }; + + rk806_dvs2_gpio { + function = "pin_fun5"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b6>; + }; + + rk806_dvs2_slp { + function = "pin_fun1"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b2>; + }; + + rk806_dvs2_pwrdn { + function = "pin_fun2"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b3>; + }; + + rk806_dvs1_rst { + function = "pin_fun3"; + pins = "gpio_pwrctrl1"; + phandle = <0x2b1>; + }; + + rk806_dvs3_slp { + function = "pin_fun1"; + pins = "gpio_pwrctrl3"; + phandle = <0x2b7>; + }; + + rk806_dvs2_dvs { + function = "pin_fun4"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b5>; + }; + + rk806_dvs3_pwrdn { + function = "pin_fun2"; + pins = "gpio_pwrctrl3"; + phandle = <0x2b8>; + }; + }; + + pwrkey { + status = "okay"; + }; + + regulators { + + PLDO_REG2 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "vcc_1v8_s0"; + phandle = <0x177>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0x1b7740>; + }; + }; + + DCDC_REG4 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + regulator-init-microvolt = <0xb71b0>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_vdenc_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x2bc>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG2 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_cpu_lit_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x12>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG4 { + regulator-max-microvolt = <0xcf850>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xcf850>; + regulator-name = "vdd_0v85_s0"; + phandle = <0x2c6>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG9 { + regulator-boot-on; + regulator-always-on; + regulator-name = "vddq_ddr_s0"; + phandle = <0x2bf>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG2 { + regulator-max-microvolt = <0xcf850>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xcf850>; + regulator-name = "vdd_ddr_pll_s0"; + phandle = <0x2c5>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0xcf850>; + }; + }; + + PLDO_REG5 { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "vccio_sd_s0"; + phandle = <0x118>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG7 { + regulator-max-microvolt = <0x1e8480>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1e8480>; + regulator-name = "vdd_2v0_pldo_s3"; + phandle = <0x15b>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x1e8480>; + regulator-on-in-suspend; + }; + }; + + PLDO_REG3 { + regulator-max-microvolt = <0x124f80>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x124f80>; + regulator-name = "avdd_1v2_s0"; + phandle = <0x2c1>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG5 { + regulator-max-microvolt = <0xdbba0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xa4cb8>; + regulator-name = "vdd_ddr_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x42>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0xcf850>; + }; + }; + + DCDC_REG10 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "vcc_1v8_s3"; + phandle = <0x2c0>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x1b7740>; + regulator-on-in-suspend; + }; + }; + + PLDO_REG1 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "avcc_1v8_s0"; + phandle = <0x1de>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG3 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xa4cb8>; + regulator-name = "vdd_log_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x43>; + + regulator-state-mem { + regulator-suspend-microvolt = <0xb71b0>; + regulator-on-in-suspend; + }; + }; + + DCDC_REG1 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + regulator-enable-ramp-delay = <0x190>; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_gpu_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x62>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG5 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "vdd_0v75_s0"; + phandle = <0x2c7>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG3 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "avdd_0v75_s0"; + phandle = <0x1df>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + PLDO_REG6 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "pldo6_s3"; + phandle = <0x2c3>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x1b7740>; + regulator-on-in-suspend; + }; + }; + + DCDC_REG8 { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc_3v3_s3"; + phandle = <0x2be>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x325aa0>; + regulator-on-in-suspend; + }; + }; + + NLDO_REG1 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "vdd_0v75_s3"; + phandle = <0x2c4>; + + regulator-state-mem { + regulator-suspend-microvolt = <0xb71b0>; + regulator-on-in-suspend; + }; + }; + + PLDO_REG4 { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc_3v3_s0"; + phandle = <0x2c2>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG6 { + regulator-boot-on; + regulator-always-on; + regulator-name = "vdd2_ddr_s3"; + phandle = <0x2bd>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + }; + }; + }; + + usbhost3_0 { + #address-cells = <0x02>; + clock-names = "ref\0suspend\0bus\0utmi\0php\0pipe"; + clocks = <0x02 0x179 0x02 0x178 0x02 0x177 0x02 0x17a 0x02 0x166 0x02 0x181>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + ranges; + status = "disabled"; + phandle = <0x258>; + + usb@fcd00000 { + snps,dis_enblslpm_quirk; + phy-names = "usb3-phy"; + snps,dis-u2-freeclk-exists-quirk; + phy_type = "utmi_wide"; + resets = <0x02 0x237>; + interrupts = <0x00 0xde 0x04>; + snps,dis_rxdet_inp3_quirk; + compatible = "snps,dwc3"; + snps,parkmode-disable-hs-quirk; + snps,dis-del-phy-power-chg-quirk; + status = "disabled"; + snps,parkmode-disable-ss-quirk; + phys = <0x70 0x04>; + reg = <0x00 0xfcd00000 0x00 0x400000>; + phandle = <0x259>; + dr_mode = "host"; + reset-names = "usb3-host"; + snps,dis-tx-ipgap-linecheck-quirk; + }; + }; + + pcie@fe190000 { + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x40 0x4f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x08>; + resets = <0x02 0x211 0x02 0x220>; + interrupts = <0x00 0xfd 0x04 0x00 0xfc 0x04 0x00 0xfb 0x04 0x00 0xfa 0x04 0x00 0xf9 0x04>; + clocks = <0x02 0x152 0x02 0x157 0x02 0x14d 0x02 0x15d 0x02 0x162 0x02 0x182>; + interrupt-map = <0x00 0x00 0x00 0x01 0x107 0x00 0x00 0x00 0x00 0x02 0x107 0x01 0x00 0x00 0x00 0x03 0x107 0x02 0x00 0x00 0x00 0x04 0x107 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x02>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf4000000 0x00 0xf4000000 0x00 0x100000 0x81000000 0x00 0xf4100000 0x00 0xf4100000 0x00 0x100000 0x82000000 0x00 0xf4200000 0x00 0xf4200000 0x00 0xe00000 0xc3000000 0x0a 0x00 0x0a 0x00 0x00 0x40000000>; + msi-map = <0x4000 0x106 0x4000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x108 0x02>; + num-viewport = <0x04>; + reg = <0x00 0xfe190000 0x00 0x10000 0x0a 0x41000000 0x00 0x400000>; + linux,pci-domain = <0x04>; + phandle = <0x28d>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x08>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xfa 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x107>; + interrupt-controller; + }; + }; + + rkcif-mipi-lvds3-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x238>; + }; + + aliases { + i2c3 = "/i2c@feab0000"; + ethernet0 = "/ethernet@fe1b0000"; + pwm9 = "/pwm@febe0010"; + pwm14 = "/pwm@febf0020"; + spi2 = "/spi@feb20000"; + usbdp0 = "/phy@fed80000"; + gpio0 = "/pinctrl/gpio@fd8a0000"; + dsi1 = "/dsi@fde30000"; + hdmi1 = "/hdmi@fdea0000"; + serial7 = "/serial@feba0000"; + i2c1 = "/i2c@fea90000"; + pwm7 = "/pwm@febd0030"; + pwm12 = "/pwm@febf0000"; + jpege3 = "/jpege-core@fdbac000"; + spi0 = "/spi@feb00000"; + hdptx1 = "/phy@fed70000"; + csi2dphy5 = "/csi2-dphy5"; + serial5 = "/serial@feb80000"; + csi2dcphy1 = "/csi2-dcphy1"; + pwm5 = "/pwm@febd0010"; + mmc1 = "/mmc@fe2c0000"; + pwm10 = "/pwm@febe0020"; + jpege1 = "/jpege-core@fdba4000"; + rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; + i2c8 = "/i2c@feca0000"; + dp0 = "/dp@fde50000"; + csi2dphy3 = "/csi2-dphy3"; + serial3 = "/serial@feb60000"; + edp0 = "/edp@fdec0000"; + pwm3 = "/pwm@fd8b0030"; + hdcp1 = "/hdcp@fde70000"; + rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; + i2c6 = "/i2c@fec80000"; + csi2dphy1 = "/csi2-dphy1"; + serial1 = "/serial@feb40000"; + pwm1 = "/pwm@fd8b0010"; + rkvenc0 = "/rkvenc-core@fdbd0000"; + spi5 = "/spi@fe2b0000"; + gpio3 = "/pinctrl/gpio@fec40000"; + hdptxhdmi1 = "/hdmiphy@fed70000"; + rkcif_mipi_lvds0 = "/rkcif-mipi-lvds"; + i2c4 = "/i2c@feac0000"; + ethernet1 = "/ethernet@fe1c0000"; + rkvdec0 = "/rkvdec-core@fdc38000"; + pwm15 = "/pwm@febf0030"; + hdmirx0 = "/hdmirx-controller@fdee0000"; + spi3 = "/spi@feb30000"; + usbdp1 = "/phy@fed90000"; + gpio1 = "/pinctrl/gpio@fec20000"; + serial8 = "/serial@febb0000"; + i2c2 = "/i2c@feaa0000"; + pwm8 = "/pwm@febe0000"; + pwm13 = "/pwm@febf0010"; + spi1 = "/spi@feb10000"; + dsi0 = "/dsi@fde20000"; + hdmi0 = "/hdmi@fde80000"; + serial6 = "/serial@feb90000"; + i2c0 = "/i2c@fd880000"; + pwm6 = "/pwm@febd0020"; + mmc2 = "/mmc@fe2d0000"; + pwm11 = "/pwm@febe0030"; + jpege2 = "/jpege-core@fdba8000"; + hdptx0 = "/phy@fed60000"; + rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; + dp1 = "/dp@fde60000"; + csi2dphy4 = "/csi2-dphy4"; + serial4 = "/serial@feb70000"; + edp1 = "/edp@fded0000"; + csi2dcphy0 = "/csi2-dcphy0"; + pwm4 = "/pwm@febd0000"; + mmc0 = "/mmc@fe2e0000"; + jpege0 = "/jpege-core@fdba0000"; + rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; + i2c7 = "/i2c@fec90000"; + csi2dphy2 = "/csi2-dphy2"; + serial2 = "/serial@feb50000"; + pwm2 = "/pwm@fd8b0020"; + rkvenc1 = "/rkvenc-core@fdbe0000"; + gpio4 = "/pinctrl/gpio@fec50000"; + hdcp0 = "/hdcp@fde40000"; + rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; + i2c5 = "/i2c@fead0000"; + csi2dphy0 = "/csi2-dphy0"; + serial0 = "/serial@fd890000"; + rkvdec1 = "/rkvdec-core@fdc48000"; + pwm0 = "/pwm@fd8b0000"; + spi4 = "/spi@fecb0000"; + gpio2 = "/pinctrl/gpio@fec30000"; + hdptxhdmi0 = "/hdmiphy@fed60000"; + serial9 = "/serial@febc0000"; + }; + + spdif-tx@fdde8000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x259>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc5 0x04>; + clocks = <0x02 0x25c 0x02 0x258>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfdde8000 0x00 0x1000>; + phandle = <0x47d>; + dmas = <0xf1 0x08>; + }; + + i2s@fe490000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x12d 0x12e>; + pinctrl-0 = <0x12a 0x12b>; + clock-names = "i2s_clk\0i2s_hclk"; + assigned-clocks = <0x02 0x24>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xb6 0x04>; + clocks = <0x02 0x27 0x02 0x22>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; + pinctrl-1 = <0x12c>; + status = "disabled"; + reg = <0x00 0xfe490000 0x00 0x1000>; + phandle = <0x298>; + dmas = <0xf1 0x00 0xf1 0x01>; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd5d0000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d0000 0x00 0x4000>; + phandle = <0x18b>; + + usb2-phy@0 { + clock-output-names = "usb480m_phy0"; + clock-names = "phyclk"; + resets = <0x02 0xc0047 0x02 0x488>; + interrupts = <0x00 0x189 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + rockchip,usbctrl-grf = <0x74>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0x00 0x10>; + phandle = <0x18d>; + reset-names = "phy\0apb"; + + otg-port { + #phy-cells = <0x00>; + rockchip,typec-vbus-det; + status = "okay"; + phandle = <0x66>; + }; + }; + }; + + i2c@feac0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x14b>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb3 0x02 0xab>; + interrupts = <0x00 0x141 0x04>; + clocks = <0x02 0x90 0x02 0x88>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfeac0000 0x00 0x1000>; + phandle = <0x2a7>; + reset-names = "i2c\0apb"; + + pc9202@3c { + pinctrl-names = "default"; + pinctrl-0 = <0x14c>; + index = <0x01>; + compatible = "firefly,pc9202"; + status = "okay"; + wd-en-gpio = <0x7b 0x14 0x00>; + driver-names = "wdt_base"; + reg = <0x3c>; + }; + }; + + rkcif-mipi-lvds5-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x476>; + }; + + firmware { + + optee { + method = "smc"; + compatible = "linaro,optee-tz"; + phandle = <0x222>; + }; + + sdei { + method = "smc"; + compatible = "arm,sdei-1.0"; + phandle = <0x221>; + }; + + scmi { + shmem = <0x46>; + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "arm,scmi-smc"; + phandle = <0x220>; + arm,smc-id = <0x82000010>; + + protocol@16 { + #reset-cells = <0x01>; + reg = <0x16>; + phandle = <0x11a>; + }; + + protocol@14 { + assigned-clocks = <0x0e 0x00 0x0e 0x02 0x0e 0x03>; + assigned-clock-rates = <0x30a32c00 0x30a32c00 0x30a32c00>; + #clock-cells = <0x01>; + reg = <0x14>; + phandle = <0x0e>; + }; + }; + }; + + rkvenc-core@fdbd0000 { + power-domains = <0x60 0x10>; + iommus = <0xc2>; + rockchip,ccu = <0xc3>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; + assigned-clocks = <0x02 0x1c5 0x02 0x1c6>; + rockchip,task-capacity = <0x08>; + rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; + assigned-clock-rates = <0x1dcd6500 0x2faf0800>; + resets = <0x02 0x2f5 0x02 0x2f4 0x02 0x2f6>; + interrupts = <0x00 0x65 0x04>; + clocks = <0x02 0x1c5 0x02 0x1c4 0x02 0x1c6>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x07>; + compatible = "rockchip,rkv-encoder-v2-core"; + status = "okay"; + interrupt-names = "irq_rkvenc0"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbd0000 0x00 0x6000>; + phandle = <0x272>; + reset-names = "video_a\0video_h\0video_core"; + operating-points-v2 = <0xc4>; + }; + + iommu@fdcc7f00 { + power-domains = <0x60 0x1c>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x88 0x04>; + clocks = <0x02 0x120 0x02 0x121>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "isp1_mmu"; + reg = <0x00 0xfdcc7f00 0x00 0x100>; + phandle = <0xd1>; + }; + + rkcif-mipi-lvds-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22b>; + }; + + syscon@fd5c8000 { + compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; + reg = <0x00 0xfd5c8000 0x00 0x4000>; + phandle = <0x18c>; + }; + + gpu@fb000000 { + power-domains = <0x60 0x0c>; + downdifferential = <0x0a>; + mali-supply = <0x62>; + clock-names = "clk_mali\0clk_gpu_coregroup\0clk_gpu_stacks\0clk_gpu"; + assigned-clocks = <0x0e 0x05>; + assigned-clock-rates = <0xbebc200>; + interrupts = <0x00 0x5e 0x04 0x00 0x5d 0x04 0x00 0x5c 0x04>; + clocks = <0x0e 0x05 0x02 0x115 0x02 0x116 0x02 0x114>; + upthreshold = <0x1e>; + compatible = "arm,mali-bifrost"; + dynamic-power-coefficient = <0xba6>; + status = "okay"; + interrupt-names = "GPU\0MMU\0JOB"; + mem-supply = <0x62>; + reg = <0x00 0xfb000000 0x00 0x200000>; + phandle = <0x5f>; + operating-points-v2 = <0x61>; + #cooling-cells = <0x02>; + }; + + csi2-dphy4 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x213>; + }; + + mipi4-csi2-hw@fdd50000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x328>; + interrupts = <0x00 0x97 0x04 0x00 0x98 0x04>; + clocks = <0x02 0x1d3>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd50000 0x00 0x10000>; + phandle = <0x4b>; + reset-names = "srst_csihost_p"; + }; + + qos@fdf82000 { + compatible = "syscon"; + reg = <0x00 0xfdf82000 0x00 0x20>; + phandle = <0x9d>; + }; + + rkcif-mipi-lvds2-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x55>; + phandle = <0x235>; + }; + + rkisp1-vir0 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23f>; + }; + + qos@fdf41100 { + compatible = "syscon"; + reg = <0x00 0xfdf41100 0x00 0x20>; + phandle = <0xa7>; + }; + + test-power { + status = "okay"; + }; + + usb-5v { + pinctrl-names = "default"; + regulator-boot-on; + gpio = <0xfe 0x03 0x00>; + pinctrl-0 = <0x1ef>; + regulator-always-on; + enable-active-high; + regulator-name = "usb_5v"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4b1>; + }; + + phy@feda0000 { + clock-names = "pclk\0ref"; + resets = <0x02 0xc0043 0x02 0x3e 0x02 0x3f 0x02 0xc0044>; + clocks = <0x02 0x108 0x02 0x2b6>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dcphy"; + status = "okay"; + rockchip,grf = <0x190>; + reg = <0x00 0xfeda0000 0x00 0x10000>; + phandle = <0x2f>; + reset-names = "m_phy\0apb\0grf\0s_phy"; + }; + + mod-sleep-regulator { + pinctrl-names = "default"; + regulator-boot-on; + gpio = <0x7b 0x15 0x00>; + pinctrl-0 = <0x1ee>; + regulator-always-on; + enable-active-high; + regulator-name = "mod_sleep"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4ae>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + qos@fdf66c00 { + compatible = "syscon"; + reg = <0x00 0xfdf66c00 0x00 0x20>; + phandle = <0x99>; + }; + + crypto@fe370000 { + clock-names = "aclk\0hclk\0sclk\0pka"; + resets = <0x11a 0x0f>; + interrupts = <0x00 0xd1 0x04>; + clocks = <0x0e 0x0b 0x0e 0x0c 0x0e 0x14 0x0e 0x15>; + compatible = "rockchip,rk3588-crypto"; + status = "disabled"; + reg = <0x00 0xfe370000 0x00 0x2000>; + phandle = <0x296>; + reset-names = "crypto-rst"; + }; + + i2s@fddf4000 { + power-domains = <0x60 0x1a>; + rockchip,always-on; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x249>; + assigned-clock-parents = <0x02 0x07>; + resets = <0x02 0x3ef>; + interrupts = <0x00 0xba 0x04>; + clocks = <0x02 0x24c 0x02 0x24c 0x02 0x252>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "okay"; + reg = <0x00 0xfddf4000 0x00 0x1000>; + phandle = <0x1e0>; + dmas = <0xf2 0x04>; + reset-names = "tx-m"; + rockchip,hdmi-path; + }; + + mipi0-csi2-hw@fdd10000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x324>; + interrupts = <0x00 0x8f 0x04 0x00 0x90 0x04>; + clocks = <0x02 0x1cf>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd10000 0x00 0x10000>; + phandle = <0x47>; + reset-names = "srst_csihost_p"; + }; + + mipi4-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x228>; + }; + + jpege-ccu { + compatible = "rockchip,vpu-jpege-ccu"; + status = "okay"; + phandle = <0xbd>; + }; + + dsi@fde30000 { + power-domains = <0x60 0x18>; + #address-cells = <0x01>; + phy-names = "dcphy"; + clock-names = "pclk\0sys_clk"; + resets = <0x02 0x355>; + interrupts = <0x00 0xa8 0x04>; + clocks = <0x02 0x279 0x02 0x27b>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dsi2"; + status = "disabled"; + rockchip,grf = <0xd7>; + phys = <0x30>; + reg = <0x00 0xfde30000 0x00 0x10000>; + phandle = <0x283>; + reset-names = "apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x284>; + + endpoint@1 { + remote-endpoint = <0x3a>; + status = "disabled"; + reg = <0x01>; + phandle = <0xef>; + }; + + endpoint@0 { + remote-endpoint = <0xf4>; + status = "disabled"; + reg = <0x00>; + phandle = <0xea>; + }; + }; + }; + }; + + iommu@fcb00000 { + interrupts = <0x00 0x17d 0x04 0x00 0x17f 0x04 0x00 0x182 0x04 0x00 0x17b 0x04>; + #iommu-cells = <0x01>; + compatible = "arm,smmu-v3"; + status = "disabled"; + interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; + reg = <0x00 0xfcb00000 0x00 0x200000>; + phandle = <0x257>; + }; + + rkcif-mipi-lvds3 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x57>; + }; + + vcc-hub-regulator { + regulator-boot-on; + gpio = <0x182 0x01 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_hub"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4af>; + }; + + syscon@fd5ac000 { + compatible = "rockchip,rk3588-usb-grf\0syscon"; + reg = <0x00 0xfd5ac000 0x00 0x4000>; + phandle = <0x74>; + }; + + qos@fdf40200 { + compatible = "syscon"; + reg = <0x00 0xfdf40200 0x00 0x20>; + phandle = <0xa9>; + }; + + rkisp@fdcb0000 { + power-domains = <0x60 0x1b>; + iommus = <0xd0>; + clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; + interrupts = <0x00 0x83 0x04 0x00 0x85 0x04 0x00 0x86 0x04>; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd>; + compatible = "rockchip,rk3588-rkisp"; + status = "okay"; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + reg = <0x00 0xfdcb0000 0x00 0x7f00>; + phandle = <0x58>; + }; + + serial@feba0000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x166>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x152 0x04>; + clocks = <0x02 0xcf 0x02 0xb1>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeba0000 0x00 0x100>; + phandle = <0x2cf>; + dmas = <0xf2 0x07 0xf2 0x08>; + reg-shift = <0x02>; + }; + + rkcif-mipi-lvds1-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x232>; + }; + + chosen { + linux,initrd-end = <0x00 0xaac72ae>; + bootargs = "storagemedia=emmc androidboot.storagemedia=emmc androidboot.mode=normal storagenode=/mmc@fe2e0000 androidboot.verifiedbootstate=orange ro rootwait earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0 root=PARTLABEL=rootfs rootfstype=ext4 overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 net.ifnames=0 rcupdate.rcu_expedited=0 comm-05/28/2025 androidboot.fwver=ddr-v1.15-d5483af87d,spl-v1.13,bl31-v1.44,bl32-v1.15,uboot--boot"; + linux,initrd-start = <0x00 0xa200000>; + phandle = <0x48d>; + }; + + hdmi@fde80000 { + power-domains = <0x60 0x1a>; + reg-io-width = <0x04>; + pinctrl-names = "default"; + phy-names = "hdmi"; + pinctrl-0 = <0xf9 0xfa 0xfb 0xfc>; + clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; + resets = <0x02 0x3d0 0x02 0x49c>; + interrupts = <0x00 0xa9 0x04 0x00 0xaa 0x04 0x00 0xab 0x04 0x00 0xac 0x04 0x00 0x168 0x04>; + clocks = <0x02 0x221 0x02 0x265 0x02 0x222 0x02 0x223 0x02 0x246 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x35>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-dw-hdmi"; + status = "okay"; + rockchip,grf = <0xc8>; + phys = <0xfd>; + enable-gpios = <0xfe 0x08 0x00>; + reg = <0x00 0xfde80000 0x00 0x10000 0x00 0xfde90000 0x00 0x10000>; + phandle = <0x1d4>; + reset-names = "ref\0hdp"; + rockchip,vo1_grf = <0xd8>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x288>; + + endpoint@1 { + remote-endpoint = <0xff>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe2>; + }; + + endpoint@2 { + remote-endpoint = <0x100>; + status = "disabled"; + reg = <0x02>; + phandle = <0xe8>; + }; + + endpoint@0 { + remote-endpoint = <0x3c>; + status = "okay"; + reg = <0x00>; + phandle = <0xdc>; + }; + }; + }; + }; + + cluster2-opp-table { + rockchip,pvtm-offset = <0x18>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0x27 0x28 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,pvtm-low-len-sel = <0x03>; + rockchip,high-temp-max-freq = <0x21b100>; + opp-shared; + rockchip,reboot-freq = <0x1b7740>; + rockchip,pvtm-freq = <0x188940>; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x29>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; + phandle = <0x1a>; + rockchip,idle-threshold-freq = <0x21b100>; + rockchip,pvtm-temp-prop = <0x10e 0x10e>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0xf6180>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-2016000000 { + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + }; + + opp-1200000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1416000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-supported-hw = <0x06 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-1008000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2256000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8677d400>; + opp-supported-hw = <0xf9 0x13>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1200000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1008000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-816000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2400000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8f0d1800>; + opp-supported-hw = <0xf9 0x80>; + clock-latency-ns = <0x9c40>; + }; + + opp-1800000000 { + opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2208000000 { + opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; + opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-hz = <0x00 0x839b6800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + opp-microvolt-L3 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-1608000000 { + opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-408000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1800000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + }; + + opp-2352000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8c30ac00>; + opp-supported-hw = <0xf9 0x48>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1608000000 { + opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2016000000 { + opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; + opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; + opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + }; + + opp-1416000000 { + opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-hz = <0x00 0x54667200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; + opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-408000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0xf9 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-2304000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x89544000>; + opp-supported-hw = <0xf9 0x24>; + clock-latency-ns = <0x9c40>; + }; + }; + + rkcif-dvp { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-dvp"; + status = "disabled"; + phandle = <0x51>; + }; + + rkisp0-vir2 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "okay"; + phandle = <0x23d>; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + remote-endpoint = <0x59>; + reg = <0x00>; + phandle = <0x56>; + }; + }; + }; + + i2c@fea90000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x148>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb0 0x02 0xa8>; + interrupts = <0x00 0x13e 0x04>; + clocks = <0x02 0x8d 0x02 0x85>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfea90000 0x00 0x1000>; + phandle = <0x2a4>; + reset-names = "i2c\0apb"; + + rk8602@42 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + rockchip,suspend-voltage-selector = <0x01>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_npu_s0"; + regulator-ramp-delay = <0x8fc>; + compatible = "rockchip,rk8602"; + reg = <0x42>; + phandle = <0xb3>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + syscon@fd58a000 { + compatible = "rockchip,rk3588-pmu1-grf\0syscon"; + reg = <0x00 0xfd58a000 0x00 0x2000>; + phandle = <0x104>; + }; + + syscon@fd5ec000 { + compatible = "rockchip,mipi-dcphy-grf\0syscon"; + reg = <0x00 0xfd5ec000 0x00 0x4000>; + phandle = <0x191>; + }; + + venc-opp-table { + nvmem-cells = <0xc6 0xc7>; + rockchip,leakage-voltage-sel = <0x01 0x0f 0x00 0x10 0x19 0x01 0x1a 0xfe 0x02>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,grf = <0xc8>; + nvmem-cell-names = "leakage\0opp-info"; + phandle = <0xc4>; + + opp-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-microvolt-L0 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + }; + }; + + iommu@fdc38700 { + power-domains = <0x60 0x0e>; + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x60 0x04>; + clocks = <0x02 0x190 0x02 0x18f>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvdec0_mmu"; + reg = <0x00 0xfdc38700 0x00 0x40 0x00 0xfdc38740 0x00 0x40>; + phandle = <0xc9>; + rockchip,master-handle-irq; + }; + + qos@fdf35200 { + compatible = "syscon"; + reg = <0x00 0xfdf35200 0x00 0x20>; + phandle = <0x88>; + }; + + qos@fdf71000 { + compatible = "syscon"; + reg = <0x00 0xfdf71000 0x00 0x20>; + phandle = <0x86>; + }; + + syscon@fd598000 { + compatible = "rockchip,rk3588-dsu-grf\0syscon"; + reg = <0x00 0xfd598000 0x00 0x100>; + phandle = <0x23>; + }; + + csi2-dphy2 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x211>; + }; + + syscon@fd5b4000 { + compatible = "rockchip,mipi-dphy-grf\0syscon"; + reg = <0x00 0xfd5b4000 0x00 0x1000>; + phandle = <0x192>; + }; + + uio@fe1b0000 { + compatible = "rockchip,uio-gmac"; + status = "disabled"; + reg = <0x00 0xfe1b0000 0x00 0x10000>; + phandle = <0x488>; + rockchip,ethernet = <0x1bd>; + }; + + iommu@fdb70f00 { + power-domains = <0x60 0x1e>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x73 0x04>; + clocks = <0x02 0x18a 0x02 0x189>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "rga3_1_mmu"; + reg = <0x00 0xfdb70f00 0x00 0x100>; + phandle = <0xba>; + }; + + vcc5v0-usb { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_usb"; + compatible = "regulator-fixed"; + phandle = <0x1dd>; + vin-supply = <0x1cd>; + }; + + fiq-debugger { + pinctrl-names = "default"; + rockchip,irq-mode-enable = <0x01>; + rockchip,baudrate = <0x1c200>; + pinctrl-0 = <0x1ce>; + interrupts = <0x00 0x1a7 0x08>; + rockchip,wake-irq = <0x00>; + compatible = "rockchip,fiq-debugger"; + status = "okay"; + phandle = <0x490>; + rockchip,serial-id = <0x02>; + }; + + phy@fed70000 { + clock-names = "ref\0apb"; + resets = <0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041>; + clocks = <0x02 0x2b5 0x02 0x268>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy"; + status = "disabled"; + rockchip,grf = <0x1c7>; + reg = <0x00 0xfed70000 0x00 0x2000>; + phandle = <0x1af>; + reset-names = "apb\0init\0cmn\0lane"; + }; + + ethernet@fe1b0000 { + power-domains = <0x60 0x21>; + pinctrl-names = "default"; + phy-mode = "rgmii-rxid"; + snps,mixed-burst; + snps,mtl-rx-config = <0x1bf>; + snps,reset-active-low; + pinctrl-0 = <0x1c1 0x1c2 0x1c3 0x1c4 0x1c5>; + clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; + snps,mtl-tx-config = <0x1c0>; + local-mac-address = [da 2f 1a d4 a9 85]; + resets = <0x02 0x20a>; + interrupts = <0x00 0xe3 0x04 0x00 0xe2 0x04>; + clocks = <0x02 0x144 0x02 0x145 0x02 0x167 0x02 0x16c 0x02 0x142>; + clock_in_out = "output"; + snps,tso; + compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; + status = "okay"; + rockchip,grf = <0xc8>; + interrupt-names = "macirq\0eth_wake_irq"; + snps,reset-gpio = <0x10d 0x02 0x01>; + reg = <0x00 0xfe1b0000 0x00 0x10000>; + rockchip,php_grf = <0x76>; + phandle = <0x1bd>; + phy-handle = <0x1c6>; + reset-names = "stmmaceth"; + tx_delay = <0x31>; + snps,axi-config = <0x1be>; + snps,reset-delays-us = <0x00 0x4e20 0x186a0>; + + mdio { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "snps,dwmac-mdio"; + phandle = <0x489>; + + phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x01>; + phandle = <0x1c6>; + }; + }; + + tx-queues-config { + phandle = <0x1c0>; + snps,tx-queues-to-use = <0x01>; + + queue0 { + }; + }; + + stmmac-axi-config { + snps,wr_osr_lmt = <0x04>; + phandle = <0x1be>; + snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; + snps,rd_osr_lmt = <0x08>; + }; + + rx-queues-config { + snps,rx-queues-to-use = <0x01>; + phandle = <0x1bf>; + + queue0 { + }; + }; + }; + + pvtm@fda60000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-litcore-pvtm"; + reg = <0x00 0xfda60000 0x00 0x100>; + + pvtm@2 { + clock-names = "clk\0pclk"; + clocks = <0x02 0x2ca 0x02 0x1b>; + reg = <0x02>; + }; + }; + + rkispp@fdcd8000 { + power-domains = <0x60 0x1d>; + iommus = <0xd3>; + clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; + assigned-clocks = <0x02 0x1d9>; + assigned-clock-rates = <0x5f5e100>; + interrupts = <0x00 0x8d 0x04>; + clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; + compatible = "rockchip,rk3588-rkispp"; + status = "disabled"; + interrupt-names = "fec_irq"; + reg = <0x00 0xfdcd8000 0x00 0xf00>; + phandle = <0x5c>; + }; + + qos@fdf66000 { + compatible = "syscon"; + reg = <0x00 0xfdf66000 0x00 0x20>; + phandle = <0x93>; + }; + + syscon@fd592000 { + compatible = "rockchip,rk3588-bigcore1-grf\0syscon"; + reg = <0x00 0xfd592000 0x00 0x100>; + phandle = <0x29>; + }; + + rkcif-mipi-lvds1 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x53>; + }; + + av1d@fdc70000 { + power-domains = <0x60 0x17>; + iommus = <0xce>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + reg-names = "vcd\0cache\0afbc"; + assigned-clocks = <0x02 0x49 0x02 0x4b>; + rockchip,normal-rates = <0x17d78400 0x17d78400>; + assigned-clock-rates = <0x17d78400 0x17d78400>; + resets = <0x02 0x442 0x02 0x445>; + interrupts = <0x00 0x6c 0x04 0x00 0x6b 0x04 0x00 0x6a 0x04>; + clocks = <0x02 0x49 0x02 0x4b>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x0b>; + compatible = "rockchip,av1-decoder"; + status = "okay"; + interrupt-names = "irq_av1d\0irq_cache\0irq_afbc"; + reg = <0x00 0xfdc70000 0x00 0x800 0x00 0xfdc80000 0x00 0x400 0x00 0xfdc90000 0x00 0x400>; + phandle = <0x276>; + reset-names = "video_a\0video_h"; + }; + + qos@fdf40500 { + compatible = "syscon"; + reg = <0x00 0xfdf40500 0x00 0x20>; + phandle = <0xa3>; + }; + + vcc-hub-reset-regulator { + regulator-boot-on; + gpio = <0x182 0x04 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_hub_reset"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a0>; + }; + + qos@fdf72200 { + compatible = "syscon"; + reg = <0x00 0xfdf72200 0x00 0x20>; + phandle = <0x83>; + }; + + serial@feb70000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x163>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14f 0x04>; + clocks = <0x02 0xc3 0x02 0xae>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb70000 0x00 0x100>; + phandle = <0x2cc>; + dmas = <0xf1 0x09 0xf1 0x0a>; + reg-shift = <0x02>; + }; + + rkcif-mipi-lvds2-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "okay"; + rockchip,cif = <0x55>; + phandle = <0x233>; + + port { + + endpoint { + remote-endpoint = <0x56>; + phandle = <0x59>; + }; + }; + }; + + i2c@feca0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x186>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb7 0x02 0xaf>; + interrupts = <0x00 0x145 0x04>; + clocks = <0x02 0x94 0x02 0x8c>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfeca0000 0x00 0x1000>; + phandle = <0x2e5>; + reset-names = "i2c\0apb"; + }; + + vcc-sdcard-pwr-en-regulator { + regulator-boot-on; + gpio = <0xfe 0x07 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_sdcard_pwr_en"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4a5>; + }; + + rkcif-mipi-lvds1-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x230>; + }; + + qos@fdf63000 { + compatible = "syscon"; + reg = <0x00 0xfdf63000 0x00 0x20>; + phandle = <0x8c>; + }; + + phy@fee00000 { + rockchip,pipe-grf = <0x76>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2bd>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20005 0x02 0x4d6>; + clocks = <0x02 0x2bd 0x02 0x185 0x02 0x166>; + #phy-cells = <0x01>; + compatible = "rockchip,rk3588-naneng-combphy"; + status = "okay"; + rockchip,pipe-phy-grf = <0x194>; + reg = <0x00 0xfee00000 0x00 0x100>; + phandle = <0x108>; + reset-names = "combphy-apb\0combphy"; + }; + + can@fea50000 { + pinctrl-names = "default"; + pinctrl-0 = <0x145>; + clock-names = "baudclk\0apb_pclk"; + resets = <0x02 0xb9 0x02 0xb8>; + interrupts = <0x00 0x155 0x04>; + clocks = <0x02 0x70 0x02 0x6f>; + compatible = "rockchip,can-2.0"; + status = "disabled"; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + reg = <0x00 0xfea50000 0x00 0x1000>; + phandle = <0x2a0>; + reset-names = "can\0can-apb"; + }; + + pdm@fe4b0000 { + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x139 0x13a>; + pinctrl-0 = <0x134 0x135 0x136 0x137>; + clock-names = "pdm_clk\0pdm_hclk"; + clocks = <0x02 0x29f 0x02 0x29e>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-pdm"; + pinctrl-1 = <0x138>; + status = "disabled"; + reg = <0x00 0xfe4b0000 0x00 0x1000>; + phandle = <0x29a>; + dmas = <0x7c 0x04>; + }; + + rkisp-unite-mmu@fdcb7f00 { + power-domains = <0x60 0x1c>; + clock-names = "aclk0\0iface0\0aclk1\0iface1"; + interrupts = <0x00 0x84 0x04 0x00 0x88 0x04>; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x120 0x02 0x121>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "isp0_mmu\0isp1_mmu"; + reg = <0x00 0xfdcb7f00 0x00 0x100 0x00 0xfdcc7f00 0x00 0x100>; + phandle = <0xcf>; + }; + + syscon@fd5a6000 { + clocks = <0x72>; + compatible = "rockchip,rk3588-vo-grf\0syscon"; + reg = <0x00 0xfd5a6000 0x00 0x2000>; + phandle = <0xf5>; + }; + + cpus { + #address-cells = <0x01>; + #size-cells = <0x00>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x00>; + enable-method = "psci"; + clocks = <0x0e 0x00>; + cpu-idle-states = <0x10>; + operating-points-v2 = <0x0f>; + capacity-dmips-mhz = <0x212>; + + cpu-supply = <0x12>; + mem-supply = <0x12>; + dynamic-power-coefficient = <0x64>; + + i-cache-line-size = <0x40>; + i-cache-size = <0x8000>; + i-cache-sets = <0x80>; + + d-cache-line-size = <0x40>; + d-cache-size = <0x8000>; + d-cache-sets = <0x80>; + + next-level-cache = <0x11>; + #cooling-cells = <0x02>; + phandle = <0x06>; + }; + + l2-cache-l0 { + compatible = "cache"; + cache-size = <0x20000>; + cache-sets = <0x200>; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x11>; + }; + + l3-cache { + compatible = "cache"; + cache-size = <0x300000>; + cache-sets = <0x1000>; + cache-line-size = <0x40>; + phandle = <0x1e>; + }; + + idle-states { + entry-method = "psci"; + + cpu-sleep { + compatible = "arm,idle-state"; + entry-latency-us = <0x64>; + exit-latency-us = <0x78>; + min-residency-us = <0x3e8>; + local-timer-stop; + arm,psci-suspend-param = <0x10000>; + phandle = <0x10>; + }; + }; + + cpu-map { + cluster0 { + core0 { + cpu = <0x06>; + }; + }; + }; + }; + + vcc-hub3-reset-regulator { + gpio = <0x182 0x06 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_hub3_reset"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a1>; + }; + + rkispp1-vir0 { + rockchip,hw = <0x5c>; + compatible = "rockchip,rk3588-rkispp-vir"; + status = "disabled"; + phandle = <0x244>; + }; + + saradc@fec10000 { + vref-supply = <0x177>; + clock-names = "saradc\0apb_pclk"; + resets = <0x02 0xbe>; + interrupts = <0x00 0x18e 0x04>; + clocks = <0x02 0x9d 0x02 0x9c>; + #io-channel-cells = <0x01>; + compatible = "rockchip,rk3588-saradc"; + status = "okay"; + reg = <0x00 0xfec10000 0x00 0x10000>; + phandle = <0x1d9>; + reset-names = "saradc-apb"; + }; + + rkisp0-vir0 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23b>; + }; + + __symbols__ { + i2s2m0_lrck = "/pinctrl/i2s2/i2s2m0-lrck"; + i2c3 = "/i2c@feab0000"; + scmi_shmem = "/sram@10f000/sram@0"; + rkispp0_vir0 = "/rkispp0-vir0"; + qos_jpeg_enc0 = "/qos@fdf66400"; + i2s1m1_sdi1 = "/pinctrl/i2s1/i2s1m1-sdi1"; + dp_altmode_mux = "/i2c@fec80000/fusb302@22/connector/ports/port@1/endpoint"; + pmic_pins = "/pinctrl/pmic/pmic-pins"; + usb_host1_ohci = "/usb@fc8c0000"; + pwm9 = "/pwm@febe0010"; + i2c6m4_xfer = "/pinctrl/i2c6/i2c6m4-xfer"; + leds_gpio = "/pinctrl/leds/leds-gpio"; + i2c3m3_xfer = "/pinctrl/i2c3/i2c3m3-xfer"; + qos_usb3_1 = "/qos@fdf3e000"; + hdmi_debug4 = "/pinctrl/hdmi/hdmi-debug4"; + i2c0m2_xfer = "/pinctrl/i2c0/i2c0m2-xfer"; + gmac0_rgmii_bus = "/pinctrl/gmac0/gmac0-rgmii-bus"; + pcie30x2m2_pins = "/pinctrl/pcie30x2/pcie30x2m2-pins"; + sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; + spi0m3_cs0 = "/pinctrl/spi0/spi0m3-cs0"; + hwlock = "/hwspinlock@fe5a0000"; + pcie3x2 = "/pcie@fe160000"; + i2s2m1_mclk = "/pinctrl/i2s2/i2s2m1-mclk"; + mipim0_camera3_clk = "/pinctrl/mipi/mipim0-camera3-clk"; + mclkin_i2s0 = "/clocks/mclkin-i2s0"; + edp1_in_vp1 = "/edp@fded0000/ports/port@0/endpoint@1"; + rkvenc0_mmu = "/iommu@fdbdf000"; + pwm14 = "/pwm@febf0020"; + rk806_dvs2_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_rst"; + mipi2_csi2 = "/mipi2-csi2"; + can2m1_pins = "/pinctrl/can2/can2m1-pins"; + pcie2x1l1 = "/pcie@fe180000"; + hdmi0_in_vp2 = "/hdmi@fde80000/ports/port@0/endpoint@2"; + qos_rkvenc0_m2wo = "/qos@fdf60400"; + pwm3m2_pins = "/pinctrl/pwm3/pwm3m2-pins"; + optee = "/firmware/optee"; + l2_cache_b2 = "/cpus/l2-cache-b2"; + pwm0m1_pins = "/pinctrl/pwm0/pwm0m1-pins"; + vdpu = "/vdpu@fdb50400"; + i2s3_sdo = "/pinctrl/i2s3/i2s3-sdo"; + usbdp_phy0_u3 = "/phy@fed80000/u3-port"; + thermal_zones = "/thermal-zones"; + hdmim2_rx_scl = "/pinctrl/hdmi/hdmim2-rx-scl"; + hdmim2_rx_sda = "/pinctrl/hdmi/hdmim2-rx-sda"; + uart9m0_rtsn = "/pinctrl/uart9/uart9m0-rtsn"; + spi1m2_cs0 = "/pinctrl/spi1/spi1m2-cs0"; + pcie2x1l1_intc = "/pcie@fe180000/legacy-interrupt-controller"; + spdif1m1_tx = "/pinctrl/spdif1/spdif1m1-tx"; + venc_opp_info = "/otp@fecc0000/venc-opp-info@67"; + qos_iep = "/qos@fdf66000"; + pcfg_pull_none_drv_level_3 = "/pinctrl/pcfg-pull-none-drv-level-3"; + spi3m2_cs1 = "/pinctrl/spi3/spi3m2-cs1"; + uart4m2_xfer = "/pinctrl/uart4/uart4m2-xfer"; + vp1 = "/vop@fdd90000/ports/port@1"; + bigcore1_grf = "/syscon@fd592000"; + uart1m1_xfer = "/pinctrl/uart1/uart1m1-xfer"; + uart5m1_ctsn = "/pinctrl/uart5/uart5m1-ctsn"; + fspim1_pins = "/pinctrl/fspi/fspim1-pins"; + cpu_l1 = "/cpus/cpu@100"; + uart8 = "/serial@febb0000"; + rkisp1_vir3 = "/rkisp1-vir3"; + qos_vop_m1 = "/qos@fdf82200"; + pcie_clk2 = "/pcie-clk2"; + cluster2_opp_table = "/cluster2-opp-table"; + usb_grf = "/syscon@fd5ac000"; + pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; + jpege0_mmu = "/iommu@fdba0800"; + spi2m1_cs0 = "/pinctrl/spi2/spi2m1-cs0"; + u2phy3 = "/syscon@fd5dc000/usb2-phy@c000"; + power_led = "/leds/power"; + aclk_usb = "/clocks/aclk_usb@fd7c08a8"; + csi2_dphy1 = "/csi2-dphy1"; + spi2 = "/spi@feb20000"; + uart2_rtsn = "/pinctrl/uart2/uart2-rtsn"; + spi4m1_cs1 = "/pinctrl/spi4/spi4m1-cs1"; + pcfg_pull_up_drv_level_15 = "/pinctrl/pcfg-pull-up-drv-level-15"; + vo1_grf = "/syscon@fd5a8000"; + pcie_essd = "/pcie-essd"; + i2c4m3_xfer = "/pinctrl/i2c4/i2c4m3-xfer"; + gpio0 = "/pinctrl/gpio@fd8a0000"; + saradc = "/saradc@fec10000"; + i2s1m0_sdi3 = "/pinctrl/i2s1/i2s1m0-sdi3"; + i2c1m2_xfer = "/pinctrl/i2c1/i2c1m2-xfer"; + csidphy0_out = "/csi2-dphy0/ports/port@1/endpoint@0"; + emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; + mclkout_i2s3 = "/clocks/mclkout-i2s3@fd58c318"; + xc7160_out0 = "/i2c@fec80000/XC7160b@1b/port/endpoint"; + rkcif_mipi_lvds1_sditf_vir1 = "/rkcif-mipi-lvds1-sditf-vir1"; + dsi1 = "/dsi@fde30000"; + venc_opp_table = "/venc-opp-table"; + qos_isp0_mwo = "/qos@fdf40500"; + pmu_pins = "/pinctrl/pmu/pmu-pins"; + gmac0_miim = "/pinctrl/gmac0/gmac0-miim"; + spi3m0_cs0 = "/pinctrl/spi3/spi3m0-cs0"; + mipi_dcphy0 = "/mipi-dcphy-dummy"; + minidump_mem = "/reserved-memory/minidump-mem@c000000"; + avdd_1v2_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG3"; + pwm7m3_pins = "/pinctrl/pwm7/pwm7m3-pins"; + route_edp1 = "/display-subsystem/route/route-edp1"; + hdmi1 = "/hdmi@fdea0000"; + crypto = "/crypto@fe370000"; + hdmi1_in_vp2 = "/hdmi@fdea0000/ports/port@0/endpoint@2"; + dfi = "/dfi@fe060000"; + can0m0_pins = "/pinctrl/can0/can0m0-pins"; + pcfg_pull_up_drv_level_2 = "/pinctrl/pcfg-pull-up-drv-level-2"; + pinctrl = "/pinctrl"; + rgmii_phy0 = "/ethernet@fe1b0000/mdio/phy@1"; + pcfg_pull_down_drv_level_6 = "/pinctrl/pcfg-pull-down-drv-level-6"; + dp0m0_pins = "/pinctrl/dp0/dp0m0-pins"; + i2s0_sdo3 = "/pinctrl/i2s0/i2s0-sdo3"; + vcc_sata_pwr_en = "/vcc-sata-pwr-en-regulator"; + pwm1m1_pins = "/pinctrl/pwm1/pwm1m1-pins"; + pcie30_avdd1v8 = "/pcie30-avdd1v8"; + usb2phy3_grf = "/syscon@fd5dc000"; + u2phy2_host = "/syscon@fd5d8000/usb2-phy@8000/host-port"; + hym8563_int = "/pinctrl/hym8563/hym8563-int"; + mailbox1 = "/mailbox@fec70000"; + pdm0m1_sdi3 = "/pinctrl/pdm0/pdm0m1-sdi3"; + combphy1_ps = "/phy@fee10000"; + hdptxphy0_grf = "/syscon@fd5e0000"; + sdei = "/firmware/sdei"; + vp0_out_dp1 = "/vop@fdd90000/ports/port@0/endpoint@3"; + uart5m2_xfer = "/pinctrl/uart5/uart5m2-xfer"; + uart9m2_ctsn = "/pinctrl/uart9/uart9m2-ctsn"; + uart2m1_xfer = "/pinctrl/uart2/uart2m1-xfer"; + dp0_out = "/dp@fde50000/ports/port@1/endpoint"; + uart6m1_ctsn = "/pinctrl/uart6/uart6m1-ctsn"; + route_rgb = "/display-subsystem/route/route-rgb"; + csidphy0_out1 = "/csi2-dphy0/ports/port@1/endpoint@0"; + i2c1 = "/i2c@fea90000"; + pinctrl_rk806 = "/spi@feb20000/rk806single@0/pinctrl_rk806"; + cpu_code = "/otp@fecc0000/cpu-code@2"; + pwm7 = "/pwm@febd0030"; + mipi5_csi2_hw = "/mipi5-csi2-hw@fdd60000"; + gpu_leakage = "/otp@fecc0000/gpu-leakage@1b"; + hdmi_debug2 = "/pinctrl/hdmi/hdmi-debug2"; + pdm0m0_clk = "/pinctrl/pdm0/pdm0m0-clk"; + gmac0_ppsclk = "/pinctrl/gmac0/gmac0-ppsclk"; + i2c8m4_xfer = "/pinctrl/i2c8/i2c8m4-xfer"; + vdd_npu_s0 = "/i2c@fea90000/rk8602@42"; + i2c5m3_xfer = "/pinctrl/i2c5/i2c5m3-xfer"; + gmac0 = "/ethernet@fe1b0000"; + i2c2m2_xfer = "/pinctrl/i2c2/i2c2m2-xfer"; + rockchip_system_monitor = "/rockchip-system-monitor"; + pcie30x4m2_pins = "/pinctrl/pcie30x4/pcie30x4m2-pins"; + pwm12 = "/pwm@febf0000"; + emmc_cmd = "/pinctrl/emmc/emmc-cmd"; + i2s1_8ch = "/i2s@fe480000"; + pcie30x1m1_pins = "/pinctrl/pcie30x1/pcie30x1m1-pins"; + uart4_ctsn = "/pinctrl/uart4/uart4-ctsn"; + vdd_cpu_big0_mem_s0 = "/i2c@fd880000/rk8602@42"; + pcfg_pull_none = "/pinctrl/pcfg-pull-none"; + i2s1m0_mclk = "/pinctrl/i2s1/i2s1m0-mclk"; + vp1_out_edp1 = "/vop@fdd90000/ports/port@1/endpoint@4"; + hdmi0_in_vp0 = "/hdmi@fde80000/ports/port@0/endpoint@0"; + vcc_4g = "/vcc-4g-regulator"; + firefly_leds = "/leds"; + jpege3 = "/jpege-core@fdbac000"; + l2_cache_b0 = "/cpus/l2-cache-b0"; + pmu1_grf = "/syscon@fd58a000"; + aclk_rkvenc1_pre = "/clocks/aclk_rkvenc1_pre@fd7c08c0"; + can1m0_pins = "/pinctrl/can1/can1m0-pins"; + spi0m3_pins = "/pinctrl/spi0/spi0m3-pins"; + pwm5m2_pins = "/pinctrl/pwm5/pwm5m2-pins"; + mipidphy0_in_ucam1 = "/csi2-dphy0/ports/port@0/endpoint@1"; + i2s0_lrck = "/pinctrl/i2s0/i2s0-lrck"; + clk32k_out0 = "/pinctrl/clk32k/clk32k-out0"; + dp1m0_pins = "/pinctrl/dp1/dp1m0-pins"; + pwm2m1_pins = "/pinctrl/pwm2/pwm2m1-pins"; + usbc0 = "/i2c@fec80000/fusb302@22"; + eth1_pins = "/pinctrl/eth1/eth1-pins"; + pcfg_pull_none_drv_level_1 = "/pinctrl/pcfg-pull-none-drv-level-1"; + csi2_dphy0_hw = "/csi2-dphy0-hw@fedc0000"; + pdm1m1_sdi3 = "/pinctrl/pdm1/pdm1m1-sdi3"; + dsi0_in_vp3 = "/dsi@fde20000/ports/port@0/endpoint@1"; + hdmim1_tx1_cec = "/pinctrl/hdmi/hdmim1-tx1-cec"; + usbc0_role_sw = "/i2c@fec80000/fusb302@22/ports/port@0/endpoint@0"; + uart6 = "/serial@feb90000"; + rkisp1_vir1 = "/rkisp1-vir1"; + sdhci = "/mmc@fe2e0000"; + uart6m2_xfer = "/pinctrl/uart6/uart6m2-xfer"; + target = "/thermal-zones/soc-thermal/trips/trip-point-1"; + rkcif_mipi_lvds_sditf_vir3 = "/rkcif-mipi-lvds-sditf-vir3"; + pcfg_pull_none_drv_level_0_smt = "/pinctrl/pcfg-pull-none-drv-level-0-smt"; + uart3m1_xfer = "/pinctrl/uart3/uart3m1-xfer"; + uart7m1_ctsn = "/pinctrl/uart7/uart7m1-ctsn"; + uart0m0_xfer = "/pinctrl/uart0/uart0m0-xfer"; + rgb_in_vp3 = "/syscon@fd58c000/rgb/ports/port@0/endpoint@2"; + rkcif_mipi_lvds5_sditf_vir2 = "/rkcif-mipi-lvds5-sditf-vir2"; + u2phy1 = "/syscon@fd5d4000/usb2-phy@4000"; + i2s5_8ch = "/i2s@fddf0000"; + i2s2m0_sdo = "/pinctrl/i2s2/i2s2m0-sdo"; + gpu = "/gpu@fb000000"; + spi0 = "/spi@feb00000"; + iep = "/iep@fdbb0000"; + pcfg_pull_up_drv_level_13 = "/pinctrl/pcfg-pull-up-drv-level-13"; + spdif_tx5 = "/spdif-tx@fddb8000"; + hdptxphy_hdmi_clk1 = "/hdmiphy@fed70000/clk-port"; + drm_logo = "/reserved-memory/drm-logo@00000000"; + i2s1m0_sdi1 = "/pinctrl/i2s1/i2s1m0-sdi1"; + rk806_dvs3_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_null"; + gmac1_ppsclk = "/pinctrl/gmac1/gmac1-ppsclk"; + usb_host0_ohci = "/usb@fc840000"; + mclkout_i2s1 = "/clocks/mclkout-i2s1@fd58c318"; + i2c6m3_xfer = "/pinctrl/i2c6/i2c6m3-xfer"; + i2c3m2_xfer = "/pinctrl/i2c3/i2c3m2-xfer"; + vop_opp_info = "/otp@fecc0000/vop-opp-info@61"; + cif_dvp_bus16 = "/pinctrl/cif/cif-dvp-bus16"; + i2c0m1_xfer = "/pinctrl/i2c0/i2c0m1-xfer"; + pcie30x2m1_pins = "/pinctrl/pcie30x2/pcie30x2m1-pins"; + mipidcphy0_grf = "/syscon@fd5e8000"; + vdd_cpu_big1_mem_s0 = "/i2c@fd880000/rk8603@43"; + pcie30phy = "/phy@fee80000"; + dmc = "/dmc"; + i2s2m0_mclk = "/pinctrl/i2s2/i2s2m0-mclk"; + mipidcphy1 = "/phy@fedb0000"; + dp1_sound = "/dp1-sound"; + hdmi1_in_vp0 = "/hdmi@fdea0000/ports/port@0/endpoint@0"; + scmi = "/firmware/scmi"; + pcfg_pull_up_drv_level_0 = "/pinctrl/pcfg-pull-up-drv-level-0"; + gmac1_clkinout = "/pinctrl/gmac1/gmac1-clkinout"; + pcfg_pull_down_drv_level_4 = "/pinctrl/pcfg-pull-down-drv-level-4"; + i2s0_sdo1 = "/pinctrl/i2s0/i2s0-sdo1"; + l3_cache = "/cpus/l3-cache"; + i2s3_idle = "/pinctrl/i2s3/i2s3-idle"; + pcfg_pull_none_drv_level_4_smt = "/pinctrl/pcfg-pull-none-drv-level-4-smt"; + litcpu_pins = "/pinctrl/litcpu/litcpu-pins"; + mipi1_csi2 = "/mipi1-csi2"; + can2m0_pins = "/pinctrl/can2/can2m0-pins"; + pwm6m2_pins = "/pinctrl/pwm6/pwm6m2-pins"; + usbdp_phy0 = "/phy@fed80000"; + pdm0m1_sdi1 = "/pinctrl/pdm0/pdm0m1-sdi1"; + pwm3m1_pins = "/pinctrl/pwm3/pwm3m1-pins"; + vdd_log_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG3"; + i2s9_8ch = "/i2s@fddfc000"; + pwm0m0_pins = "/pinctrl/pwm0/pwm0m0-pins"; + vcc_hub3_reset = "/vcc-hub3-reset-regulator"; + dsi1_in_vp3 = "/dsi@fde30000/ports/port@0/endpoint@1"; + otp_cpu_version = "/otp@fecc0000/cpu-version@1c"; + pcie2x1l0_intc = "/pcie@fe170000/legacy-interrupt-controller"; + spdif0m1_tx = "/pinctrl/spdif0/spdif0m1-tx"; + pcfg_pull_down_drv_level_15 = "/pinctrl/pcfg-pull-down-drv-level-15"; + XC7160 = "/i2c@fec80000/XC7160b@1b"; + rkcif_mipi_lvds4_sditf_vir3 = "/rkcif-mipi-lvds4-sditf-vir3"; + uart7m2_xfer = "/pinctrl/uart7/uart7m2-xfer"; + uart4m1_xfer = "/pinctrl/uart4/uart4m1-xfer"; + hdmim1_tx1_scl = "/pinctrl/hdmi/hdmim1-tx1-scl"; + hdmim1_tx1_sda = "/pinctrl/hdmi/hdmim1-tx1-sda"; + uart8m1_ctsn = "/pinctrl/uart8/uart8m1-ctsn"; + i2s2_2ch = "/i2s@fe490000"; + pwm5 = "/pwm@febd0010"; + uart1m0_xfer = "/pinctrl/uart1/uart1m0-xfer"; + uart5m0_ctsn = "/pinctrl/uart5/uart5m0-ctsn"; + fspim0_cs1 = "/pinctrl/fspi/fspim0-cs1"; + fspim0_pins = "/pinctrl/fspi/fspim0-pins"; + rkisp0_vir3 = "/rkisp0-vir3"; + l2_cache_l3 = "/cpus/l2-cache-l3"; + rk806_dvs3_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_dvs"; + hdmi_debug0 = "/pinctrl/hdmi/hdmi-debug0"; + hdmim1_tx1_hpd = "/pinctrl/hdmi/hdmim1-tx1-hpd"; + vp1_out_dp0 = "/vop@fdd90000/ports/port@1/endpoint@0"; + qos_isp0_mro = "/qos@fdf40400"; + spi0m2_cs1 = "/pinctrl/spi0/spi0m2-cs1"; + vdd_gpu_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; + tsadc_shut = "/pinctrl/tsadc/tsadc-shut"; + pwm10 = "/pwm@febe0020"; + i2c7m3_xfer = "/pinctrl/i2c7/i2c7m3-xfer"; + rktimer = "/timer@feae0000"; + cpub0_leakage = "/otp@fecc0000/cpub0-leakage@17"; + i2c4m2_xfer = "/pinctrl/i2c4/i2c4m2-xfer"; + hclk_rkvdec1_pre = "/clocks/hclk_rkvdec1_pre@fd7c08a4"; + pcie30phy_pins = "/pinctrl/pcie30phy/pcie30phy-pins"; + jpege1 = "/jpege-core@fdba4000"; + pcfg_pull_none_drv_level_14 = "/pinctrl/pcfg-pull-none-drv-level-14"; + i2c1m1_xfer = "/pinctrl/i2c1/i2c1m1-xfer"; + rkcif_dvp_sditf = "/rkcif-dvp-sditf"; + rkcif_mipi_lvds4_sditf = "/rkcif-mipi-lvds4-sditf"; + vp2_out_dp1 = "/vop@fdd90000/ports/port@2/endpoint@5"; + vp2_out_dsi0 = "/vop@fdd90000/ports/port@2/endpoint@3"; + its1 = "/interrupt-controller@fe600000/msi-controller@fe660000"; + cpu_b3 = "/cpus/cpu@700"; + vcc_hub_reset = "/vcc-hub-reset-regulator"; + spi1m1_cs1 = "/pinctrl/spi1/spi1m1-cs1"; + vdd_npu_mem_s0 = "/i2c@fea90000/rk8602@42"; + pwm7m2_pins = "/pinctrl/pwm7/pwm7m2-pins"; + pdm1m1_sdi1 = "/pinctrl/pdm1/pdm1m1-sdi1"; + vbus5v0_typec_pwr_en = "/vbus5v0-typec-pwr-en-regulator"; + pwm4m1_pins = "/pinctrl/pwm4/pwm4m1-pins"; + dmc_opp_table = "/dmc-opp-table"; + pcie30x4_button_rstn = "/pinctrl/pcie30x4/pcie30x4-button-rstn"; + uart4 = "/serial@feb70000"; + pwm1m0_pins = "/pinctrl/pwm1/pwm1m0-pins"; + spi0m0_cs0 = "/pinctrl/spi0/spi0m0-cs0"; + pldo6_s3 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG6"; + mipim1_camera2_clk = "/pinctrl/mipi/mipim1-camera2-clk"; + mipim0_camera0_clk = "/pinctrl/mipi/mipim0-camera0-clk"; + rkcif_mipi_lvds_sditf_vir1 = "/rkcif-mipi-lvds-sditf-vir1"; + pcfg_pull_up_drv_level_9 = "/pinctrl/pcfg-pull-up-drv-level-9"; + dmac2 = "/dma-controller@fed10000"; + pdm0m0_sdi3 = "/pinctrl/pdm0/pdm0m0-sdi3"; + qos_gpu_m2 = "/qos@fdf35400"; + i2s0_sdi3 = "/pinctrl/i2s0/i2s0-sdi3"; + cluster0_opp_table = "/cluster0-opp-table"; + spi2m0_cs1 = "/pinctrl/spi2/spi2m0-cs1"; + otp_id = "/otp@fecc0000/id@7"; + uart5m1_xfer = "/pinctrl/uart5/uart5m1-xfer"; + uart9m1_ctsn = "/pinctrl/uart9/uart9m1-ctsn"; + qos_rga3_0 = "/qos@fdf67000"; + usbdp_phy0_dp = "/phy@fed80000/dp-port"; + uart2m0_xfer = "/pinctrl/uart2/uart2m0-xfer"; + uart6m0_ctsn = "/pinctrl/uart6/uart6m0-ctsn"; + npu_pins = "/pinctrl/npu/npu-pins"; + pcfg_pull_up_drv_level_11 = "/pinctrl/pcfg-pull-up-drv-level-11"; + spdif_tx3 = "/spdif-tx@fdde0000"; + rkispp0 = "/rkispp@fdcd0000"; + xin32k = "/clocks/xin32k"; + vcc_1v8_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG10"; + qos_usb2host_1 = "/qos@fdf3e600"; + bt_sco = "/bt-sco"; + pcfg_output_high_pull_none = "/pinctrl/pcfg-output-high-pull-none"; + adc_keys = "/adc-keys"; + rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; + i2c8 = "/i2c@feca0000"; + dp0 = "/dp@fde50000"; + mipi_te1 = "/pinctrl/mipi/mipi-te1"; + i2c8m3_xfer = "/pinctrl/i2c8/i2c8m3-xfer"; + i2c5m2_xfer = "/pinctrl/i2c5/i2c5m2-xfer"; + pcie30x2_button_rstn = "/pinctrl/pcie30x2/pcie30x2-button-rstn"; + syssram = "/sram@ff001000"; + pcfg_pull_down_drv_level_2 = "/pinctrl/pcfg-pull-down-drv-level-2"; + qos_hdmirx = "/qos@fdf81200"; + i2c2m1_xfer = "/pinctrl/i2c2/i2c2m1-xfer"; + pcie30x4m1_pins = "/pinctrl/pcie30x4/pcie30x4m1-pins"; + vdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG5"; + hw_decompress = "/decompress@fea80000"; + pcie30x1m0_pins = "/pinctrl/pcie30x1/pcie30x1m0-pins"; + mipim0_camera4_clk = "/pinctrl/mipi/mipim0-camera4-clk"; + gmac1_txer = "/pinctrl/gmac1/gmac1-txer"; + uart3_ctsn = "/pinctrl/uart3/uart3-ctsn"; + vcc_sdcard_pwr_en = "/vcc-sdcard-pwr-en-regulator"; + mipi0_csi2_hw = "/mipi0-csi2-hw@fdd10000"; + rkvenc1_mmu = "/iommu@fdbef000"; + edp0 = "/edp@fdec0000"; + rkvenc_ccu = "/rkvenc-ccu"; + rk806_dvs3_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_rst"; + power = "/power-management@fd8d8000/power-controller"; + vad = "/vad@fe4d0000"; + spi3m3_pins = "/pinctrl/spi3/spi3m3-pins"; + pwm8m2_pins = "/pinctrl/pwm8/pwm8m2-pins"; + spi0m2_pins = "/pinctrl/spi0/spi0m2-pins"; + pwm5m1_pins = "/pinctrl/pwm5/pwm5m1-pins"; + vcc_3v3_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG4"; + aclk_isp1_pre = "/clocks/aclk_isp1_pre@fd7c0868"; + pwm2m0_pins = "/pinctrl/pwm2/pwm2m0-pins"; + i2s1m1_sdo2 = "/pinctrl/i2s1/i2s1m1-sdo2"; + pcfg_pull_down_drv_level_13 = "/pinctrl/pcfg-pull-down-drv-level-13"; + eth0_pins = "/pinctrl/eth0/eth0-pins"; + rkcif_mipi_lvds4_sditf_vir1 = "/rkcif-mipi-lvds4-sditf-vir1"; + pwm3 = "/pwm@fd8b0030"; + pdm1m0_sdi3 = "/pinctrl/pdm1/pdm1m0-sdi3"; + rkcif_mmu = "/iommu@fdce0800"; + usbc0_int = "/pinctrl/usb-typec/usbc0-int"; + gmac0_tx_bus2 = "/pinctrl/gmac0/gmac0-tx-bus2"; + sata2 = "/sata@fe230000"; + uart9m2_xfer = "/pinctrl/uart9/uart9m2-xfer"; + dp0_in_vp2 = "/dp@fde50000/ports/port@0/endpoint@2"; + hdmiin_sound = "/hdmiin-sound"; + rkisp0_vir1 = "/rkisp0-vir1"; + uart6_gpios = "/pinctrl/wireless-bluetooth/uart6-gpios"; + spi3m3_cs1 = "/pinctrl/spi3/spi3m3-cs1"; + l2_cache_l1 = "/cpus/l2-cache-l1"; + pcfg_pull_none_drv_level_8 = "/pinctrl/pcfg-pull-none-drv-level-8"; + uart6m1_xfer = "/pinctrl/uart6/uart6m1-xfer"; + pwm11m3_pins = "/pinctrl/pwm11/pwm11m3-pins"; + vp2_out_hdmi0 = "/vop@fdd90000/ports/port@2/endpoint@2"; + qos_hdcp1 = "/qos@fdf81000"; + scmi_reset = "/firmware/scmi/protocol@16"; + vdd_cpu_lit_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; + i2s0_mclk = "/pinctrl/i2s0/i2s0-mclk"; + uart3m0_xfer = "/pinctrl/uart3/uart3m0-xfer"; + uart7m0_ctsn = "/pinctrl/uart7/uart7m0-ctsn"; + usbhost_dwc3_0 = "/usbhost3_0/usb@fcd00000"; + hdmim0_rx_hpdin = "/pinctrl/hdmi/hdmim0-rx-hpdin"; + edp0_out = "/edp@fdec0000/ports/port@1/endpoint"; + rkisp0 = "/rkisp@fdcb0000"; + dsu_grf = "/syscon@fd598000"; + vcc_fan_pwr_en = "/vcc-fan-pwr-en-regulator"; + gmac1_rx_bus2 = "/pinctrl/gmac1/gmac1-rx-bus2"; + uart1m2_rtsn = "/pinctrl/uart1/uart1m2-rtsn"; + csi2_dcphy0 = "/csi2-dcphy0"; + usb2phy0_grf = "/syscon@fd5d0000"; + scmi_clk = "/firmware/scmi/protocol@14"; + emmc_clk = "/pinctrl/emmc/emmc-clk"; + jpege1_mmu = "/iommu@fdba4800"; + qos_rkvenc1_m1ro = "/qos@fdf61200"; + spi2m2_cs0 = "/pinctrl/spi2/spi2m2-cs0"; + vcc5v0_host = "/vcc5v0-host"; + cru = "/clock-controller@fd7c0000"; + hdmim0_tx0_cec = "/pinctrl/hdmi/hdmim0-tx0-cec"; + pcfg_pull_none_drv_level_12 = "/pinctrl/pcfg-pull-none-drv-level-12"; + rk806_dvs2_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_null"; + cpub01_opp_info = "/otp@fecc0000/cpub01-opp-info@43"; + i2s3_sdi = "/pinctrl/i2s3/i2s3-sdi"; + aclk_rkvdec0_pre = "/clocks/aclk_rkvdec0_pre@fd7c08a0"; + cpu_b1 = "/cpus/cpu@500"; + i2c6m2_xfer = "/pinctrl/i2c6/i2c6m2-xfer"; + rknpu_mmu = "/iommu@fdab9000"; + rkcif_mipi_lvds_sditf = "/rkcif-mipi-lvds-sditf"; + i2c3m1_xfer = "/pinctrl/i2c3/i2c3m1-xfer"; + i2c0m0_xfer = "/pinctrl/i2c0/i2c0m0-xfer"; + pcie30x2m0_pins = "/pinctrl/pcie30x2/pcie30x2m0-pins"; + qos_isp1_mwo = "/qos@fdf41000"; + mipi2_csi2_output1 = "/mipi2-csi2/ports/port@1/endpoint@0"; + gmac1_stmmac_axi_setup = "/ethernet@fe1c0000/stmmac-axi-config"; + vcc5v0_usbdcin = "/vcc5v0-usbdcin"; + spi3m1_cs0 = "/pinctrl/spi3/spi3m1-cs0"; + reboot_mode = "/syscon@fd588000/reboot-mode"; + rga3_0_mmu = "/iommu@fdb60f00"; + uart2 = "/serial@feb50000"; + imx415_out0 = "/i2c@fec80000/imx415@37/port/endpoint"; + rkcif_mipi_lvds3_sditf_vir2 = "/rkcif-mipi-lvds3-sditf-vir2"; + pwm9m2_pins = "/pinctrl/pwm9/pwm9m2-pins"; + fec0_mmu = "/iommu@fdcd0f00"; + mipi0_csi2 = "/mipi0-csi2"; + spi1m2_pins = "/pinctrl/spi1/spi1m2-pins"; + pcfg_pull_up_drv_level_7 = "/pinctrl/pcfg-pull-up-drv-level-7"; + pwm6m1_pins = "/pinctrl/pwm6/pwm6m1-pins"; + tsadc_shut_org = "/pinctrl/tsadc/tsadc-shut-org"; + qos_rkvdec1 = "/qos@fdf63000"; + dmac0 = "/dma-controller@fea10000"; + vp2_out_edp1 = "/vop@fdd90000/ports/port@2/endpoint@6"; + pdm0m0_sdi1 = "/pinctrl/pdm0/pdm0m0-sdi1"; + qos_gpu_m0 = "/qos@fdf35000"; + pwm3m0_pins = "/pinctrl/pwm3/pwm3m0-pins"; + i2s0_sdi1 = "/pinctrl/i2s0/i2s0-sdi1"; + qos_av1 = "/qos@fdf64000"; + pcfg_output_low = "/pinctrl/pcfg-output-low"; + spdif_tx1 = "/spdif-tx@fe4f0000"; + hdptxphy1_grf = "/syscon@fd5e4000"; + spi4m0_cs0 = "/pinctrl/spi4/spi4m0-cs0"; + dp1_in_vp2 = "/dp@fde60000/ports/port@0/endpoint@2"; + jpegd_mmu = "/iommu@fdb90480"; + sata0m1_pins = "/pinctrl/sata0/sata0m1-pins"; + uart7m1_xfer = "/pinctrl/uart7/uart7m1-xfer"; + vp1_out_hdmi1 = "/vop@fdd90000/ports/port@1/endpoint@5"; + dp1_out = "/dp@fde60000/ports/port@1/endpoint"; + otp = "/otp@fecc0000"; + uart4m0_xfer = "/pinctrl/uart4/uart4m0-xfer"; + uart8m0_ctsn = "/pinctrl/uart8/uart8m0-ctsn"; + hdcp1 = "/hdcp@fde70000"; + rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; + i2c6 = "/i2c@fec80000"; + qos_jpeg_enc3 = "/qos@fdf66a00"; + i2s2m1_idle = "/pinctrl/i2s2/i2s2m1-idle"; + refclk_pins = "/pinctrl/refclk/refclk-pins"; + pcie3x4_intc = "/pcie@fe150000/legacy-interrupt-controller"; + hdptxphy_hdmi1 = "/hdmiphy@fed70000"; + mipi2_lvds2_sditf = "/rkcif-mipi-lvds2-sditf/port/endpoint"; + pdm1 = "/pdm@fe4c0000"; + vdd_cpu_lit_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; + pdm0m1_clk = "/pinctrl/pdm0/pdm0m1-clk"; + pcfg_pull_down_drv_level_0 = "/pinctrl/pcfg-pull-down-drv-level-0"; + qos_vicap_m0 = "/qos@fdf40600"; + gic = "/interrupt-controller@fe600000"; + vdd_cpu_big1_s0 = "/i2c@fd880000/rk8603@43"; + uart0_rtsn = "/pinctrl/uart0/uart0-rtsn"; + i2c7m2_xfer = "/pinctrl/i2c7/i2c7m2-xfer"; + mclkin_i2s3 = "/clocks/mclkin-i2s3"; + hdmim0_tx0_scl = "/pinctrl/hdmi/hdmim0-tx0-scl"; + hdmim0_tx0_sda = "/pinctrl/hdmi/hdmim0-tx0-sda"; + i2c4m1_xfer = "/pinctrl/i2c4/i2c4m1-xfer"; + spdif1m0_tx = "/pinctrl/spdif1/spdif1m0-tx"; + sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; + i2c1m0_xfer = "/pinctrl/i2c1/i2c1m0-xfer"; + rkcif_mipi_lvds2_sditf_vir3 = "/rkcif-mipi-lvds2-sditf-vir3"; + hdptxphy1 = "/phy@fed70000"; + route_dp1 = "/display-subsystem/route/route-dp1"; + hdmim0_tx0_hpd = "/pinctrl/hdmi/hdmim0-tx0-hpd"; + i2s1m1_sdo0 = "/pinctrl/i2s1/i2s1m1-sdo0"; + pdm1m0_clk = "/pinctrl/pdm1/pdm1m0-clk"; + pcfg_pull_down_drv_level_11 = "/pinctrl/pcfg-pull-down-drv-level-11"; + usbdrd3_1 = "/usbdrd3_1"; + spi2m2_pins = "/pinctrl/spi2/spi2m2-pins"; + pwm7m1_pins = "/pinctrl/pwm7/pwm7m1-pins"; + rkcif_mipi_lvds1_sditf = "/rkcif-mipi-lvds1-sditf"; + pwm1 = "/pwm@fd8b0010"; + pdm1m0_sdi1 = "/pinctrl/pdm1/pdm1m0-sdi1"; + threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; + pwm4m0_pins = "/pinctrl/pwm4/pwm4m0-pins"; + gmac0_mtl_rx_setup = "/ethernet@fe1b0000/rx-queues-config"; + sata0 = "/sata@fe210000"; + dp0_in_vp0 = "/dp@fde50000/ports/port@0/endpoint@0"; + can2 = "/can@fea70000"; + pcfg_pull_none_drv_level_6 = "/pinctrl/pcfg-pull-none-drv-level-6"; + usbdrd_dwc3_0 = "/usbdrd3_0/usb@fc000000"; + rkvenc0 = "/rkvenc-core@fdbd0000"; + bt_reset_gpio = "/pinctrl/wireless-bluetooth/bt-reset-gpio"; + sata1m1_pins = "/pinctrl/sata1/sata1m1-pins"; + spll = "/clocks/spll"; + uart8m1_xfer = "/pinctrl/uart8/uart8m1-xfer"; + sata_pins = "/pinctrl/sata/sata-pins"; + pcfg_pull_none_drv_level_1_smt = "/pinctrl/pcfg-pull-none-drv-level-1-smt"; + qos_npu1 = "/qos@fdf70000"; + uart5m0_xfer = "/pinctrl/uart5/uart5m0-xfer"; + uart9m0_ctsn = "/pinctrl/uart9/uart9m0-ctsn"; + pwm10m2_pins = "/pinctrl/pwm10/pwm10m2-pins"; + rk806_dvs1_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_pwrdn"; + pipe_phy0_grf = "/syscon@fd5bc000"; + es8388 = "/i2c@fec80000/es8388@11"; + spdif_rx2 = "/spdif-rx@fde18000"; + usb_host1_ehci = "/usb@fc880000"; + xin24m = "/clocks/xin24m"; + pcie20x1_2_button_rstn = "/pinctrl/pcie20x1/pcie20x1-2-button-rstn"; + mipi2_csi2_hw = "/mipi2-csi2-hw@fdd30000"; + acdcdig_dsm = "/codec-digital@fe500000"; + vop_grf = "/syscon@fd5a4000"; + rk806_dvs1_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_slp"; + i2s6_8ch = "/i2s@fddf4000"; + i2s2m1_sdo = "/pinctrl/i2s2/i2s2m1-sdo"; + pcie30x1_1_button_rstn = "/pinctrl/pcie30x1/pcie30x1-1-button-rstn"; + pcfg_output_low_pull_down = "/pinctrl/pcfg-output-low-pull-down"; + pcfg_pull_none_drv_level_10 = "/pinctrl/pcfg-pull-none-drv-level-10"; + pdm0m1_clk1 = "/pinctrl/pdm0/pdm0m1-clk1"; + mipidphy0_grf = "/syscon@fd5b4000"; + route_dsi1 = "/display-subsystem/route/route-dsi1"; + route_hdmi0 = "/display-subsystem/route/route-hdmi0"; + rkvdec_ccu = "/rkvdec-ccu@fdc30000"; + csi2_dphy4 = "/csi2-dphy4"; + gmac1_rgmii_bus = "/pinctrl/gmac1/gmac1-rgmii-bus"; + qos_sdio = "/qos@fdf39000"; + tsadc = "/tsadc@fec00000"; + pcfg_output_high_pull_up = "/pinctrl/pcfg-output-high-pull-up"; + hclk_usb = "/clocks/hclk_usb@fd7c08a8"; + avcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG1"; + edp0_in_vp2 = "/edp@fdec0000/ports/port@0/endpoint@2"; + mdio1 = "/ethernet@fe1c0000/mdio"; + gpio3 = "/pinctrl/gpio@fec40000"; + gpu_opp_table = "/gpu-opp-table"; + cif_mipi2_in0 = "/rkcif-mipi-lvds2/port/endpoint"; + pcfg_output_high = "/pinctrl/pcfg-output-high"; + i2c8m2_xfer = "/pinctrl/i2c8/i2c8m2-xfer"; + vdpu_mmu = "/iommu@fdb50800"; + i2c5m1_xfer = "/pinctrl/i2c5/i2c5m1-xfer"; + combphy0_ps = "/phy@fee00000"; + rgb = "/syscon@fd58c000/rgb"; + hclk_vo1 = "/clocks/hclk_vo1@fd7c08ec"; + i2c2m0_xfer = "/pinctrl/i2c2/i2c2m0-xfer"; + uart0 = "/serial@fd890000"; + mipidcphy1_grf = "/syscon@fd5ec000"; + pcie30x4m0_pins = "/pinctrl/pcie30x4/pcie30x4m0-pins"; + vdd_ddr_pll_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG2"; + gmac0_txer = "/pinctrl/gmac0/gmac0-txer"; + uart2_ctsn = "/pinctrl/uart2/uart2-ctsn"; + pcfg_pull_up_drv_level_5 = "/pinctrl/pcfg-pull-up-drv-level-5"; + pcfg_pull_down_drv_level_9 = "/pinctrl/pcfg-pull-down-drv-level-9"; + pcfg_pull_none_drv_level_5_smt = "/pinctrl/pcfg-pull-none-drv-level-5-smt"; + i2s2m0_sdi = "/pinctrl/i2s2/i2s2m0-sdi"; + qos_rga2_mwo = "/qos@fdf66e00"; + spi3m2_pins = "/pinctrl/spi3/spi3m2-pins"; + pwm8m1_pins = "/pinctrl/pwm8/pwm8m1-pins"; + dsi1_in = "/dsi@fde30000/ports/port@0"; + vp3_out_dsi0 = "/vop@fdd90000/ports/port@3/endpoint@0"; + pclk_vo0_grf = "/clocks/pclk_vo0_grf@fd7c08dc"; + spi0m1_pins = "/pinctrl/spi0/spi0m1-pins"; + pwm5m0_pins = "/pinctrl/pwm5/pwm5m0-pins"; + bt1120_pins = "/pinctrl/bt1120/bt1120-pins"; + dp1_in_vp0 = "/dp@fde60000/ports/port@0/endpoint@0"; + i2s1m0_sdo2 = "/pinctrl/i2s1/i2s1m0-sdo2"; + mipi2_csi2_input0 = "/mipi2-csi2/ports/port@0/endpoint@0"; + u2phy0_otg = "/syscon@fd5d0000/usb2-phy@0/otg-port"; + vp0_out_edp0 = "/vop@fdd90000/ports/port@0/endpoint@1"; + qos_fisheye0 = "/qos@fdf40000"; + i2c4 = "/i2c@feac0000"; + sata2m1_pins = "/pinctrl/sata2/sata2m1-pins"; + uart9m1_xfer = "/pinctrl/uart9/uart9m1-xfer"; + qos_jpeg_enc1 = "/qos@fdf66600"; + i2s1m1_sdi2 = "/pinctrl/i2s1/i2s1m1-sdi2"; + i2s3_2ch = "/i2s@fe4a0000"; + uart6m0_xfer = "/pinctrl/uart6/uart6m0-xfer"; + cpul_leakage = "/otp@fecc0000/cpul-leakage@19"; + pwm11m2_pins = "/pinctrl/pwm11/pwm11m2-pins"; + fspim1_cs1 = "/pinctrl/fspi/fspim1-cs1"; + vdd_vdenc_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; + pdm1m1_clk1 = "/pinctrl/pdm1/pdm1m1-clk1"; + hdmi_debug5 = "/pinctrl/hdmi/hdmi-debug5"; + uart1m1_rtsn = "/pinctrl/uart1/uart1m1-rtsn"; + qos_isp1_mro = "/qos@fdf41100"; + ddrphych3_pins = "/pinctrl/ddrphych3/ddrphych3-pins"; + spi0m3_cs1 = "/pinctrl/spi0/spi0m3-cs1"; + qos_rkvenc0_m1ro = "/qos@fdf60200"; + qos_jpeg_dec = "/qos@fdf66200"; + mclkin_i2s1 = "/clocks/mclkin-i2s1"; + edp1_in_vp2 = "/edp@fded0000/ports/port@0/endpoint@2"; + pcie30_avdd0v75 = "/pcie30-avdd0v75"; + isp0_mmu = "/iommu@fdcb7f00"; + qos_npu0_mwr = "/qos@fdf72000"; + rkvdec0 = "/rkvdec-core@fdc38000"; + rkvdec0_mmu = "/iommu@fdc38700"; + rk806_dvs1_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_null"; + pwm15 = "/pwm@febf0030"; + vop_mmu = "/iommu@fdd97e00"; + rkcif_mipi_lvds2_sditf_vir1 = "/rkcif-mipi-lvds2-sditf-vir1"; + pcie2x1l2 = "/pcie@fe190000"; + i2c6m1_xfer = "/pinctrl/i2c6/i2c6m1-xfer"; + package_serial_number_low = "/otp@fecc0000/package-serial-number-low@6"; + iep_mmu = "/iommu@fdbb0800"; + l2_cache_b3 = "/cpus/l2-cache-b3"; + i2c3m0_xfer = "/pinctrl/i2c3/i2c3m0-xfer"; + vcc_1v1_nldo_s3 = "/vcc-1v1-nldo-s3"; + spi1m2_cs1 = "/pinctrl/spi1/spi1m2-cs1"; + pdm0m1_idle = "/pinctrl/pdm0/pdm0m1-idle"; + can0 = "/can@fea50000"; + spi4m2_pins = "/pinctrl/spi4/spi4m2-pins"; + pcfg_pull_none_drv_level_4 = "/pinctrl/pcfg-pull-none-drv-level-4"; + pwm9m1_pins = "/pinctrl/pwm9/pwm9m1-pins"; + arm_pmu = "/arm-pmu"; + vp2 = "/vop@fdd90000/ports/port@2"; + rk806single = "/spi@feb20000/rk806single@0"; + spi1m1_pins = "/pinctrl/spi1/spi1m1-pins"; + pwm6m0_pins = "/pinctrl/pwm6/pwm6m0-pins"; + gmac0_mtl_tx_setup = "/ethernet@fe1b0000/tx-queues-config"; + rng = "/rng@fe378000"; + cpu_l2 = "/cpus/cpu@200"; + uart9 = "/serial@febc0000"; + spi0m1_cs0 = "/pinctrl/spi0/spi0m1-cs0"; + rk806_dvs3_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_gpio"; + rkcif_mipi_lvds5_sditf = "/rkcif-mipi-lvds5-sditf"; + usbdpphy0_grf = "/syscon@fd5c8000"; + mipim1_camera3_clk = "/pinctrl/mipi/mipim1-camera3-clk"; + pcie_clk3 = "/pcie-clk3"; + mipim0_camera1_clk = "/pinctrl/mipi/mipim0-camera1-clk"; + vp0_out_hdmi0 = "/vop@fdd90000/ports/port@0/endpoint@2"; + rkcif = "/rkcif@fdce0000"; + gmac0_rgmii_clk = "/pinctrl/gmac0/gmac0-rgmii-clk"; + wdt_en_base = "/pinctrl/wdt-pc9202/wdt-en-base"; + vp3_out_rgb = "/vop@fdd90000/ports/port@3/endpoint@2"; + spdif_rx0 = "/spdif-rx@fde08000"; + sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; + hdmim2_tx0_scl = "/pinctrl/hdmi/hdmim2-tx0-scl"; + hdmim2_tx0_sda = "/pinctrl/hdmi/hdmim2-tx0-sda"; + spi2m1_cs1 = "/pinctrl/spi2/spi2m1-cs1"; + pwm15m3_pins = "/pinctrl/pwm15/pwm15m3-pins"; + sata0m0_pins = "/pinctrl/sata0/sata0m0-pins"; + uart7m0_xfer = "/pinctrl/uart7/uart7m0-xfer"; + csi2_dphy2 = "/csi2-dphy2"; + spi3 = "/spi@feb30000"; + edp0_in_vp0 = "/edp@fdec0000/ports/port@0/endpoint@0"; + gpio1 = "/pinctrl/gpio@fec20000"; + tsadcm1_shut = "/pinctrl/tsadc/tsadcm1-shut"; + usbdp_phy0_dp_altmode_mux = "/phy@fed80000/port/endpoint@1"; + i2s2m0_idle = "/pinctrl/i2s2/i2s2m0-idle"; + spi1m0_cs0 = "/pinctrl/spi1/spi1m0-cs0"; + rkcif_mipi_lvds1_sditf_vir2 = "/rkcif-mipi-lvds1-sditf-vir2"; + i2s3_sclk = "/pinctrl/i2s3/i2s3-sclk"; + hdmim1_rx_hpdin = "/pinctrl/hdmi/hdmim1-rx-hpdin"; + spi3m0_cs1 = "/pinctrl/spi3/spi3m0-cs1"; + mipi_dcphy1 = "/mipi-dcphy-dummy"; + vcc5v0_sys = "/vcc5v0-sys"; + aclk_hdcp0_pre = "/clocks/aclk_hdcp0_pre@fd7c08dc"; + usb_con = "/i2c@fec80000/fusb302@22/connector"; + hdmirx_ctrler = "/hdmirx-controller@fdee0000"; + i2c7m1_xfer = "/pinctrl/i2c7/i2c7m1-xfer"; + pcfg_pull_up_drv_level_3 = "/pinctrl/pcfg-pull-up-drv-level-3"; + rgmii_phy1 = "/ethernet@fe1c0000/mdio/phy@1"; + i2c4m0_xfer = "/pinctrl/i2c4/i2c4m0-xfer"; + pcfg_pull_down_drv_level_7 = "/pinctrl/pcfg-pull-down-drv-level-7"; + spdif0m0_tx = "/pinctrl/spdif0/spdif0m0-tx"; + wdt = "/watchdog@feaf0000"; + vdd_0v85_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG4"; + cspmu = "/cspmu@fd10c000"; + gmac_uio0 = "/uio@fe1b0000"; + av1d_mmu = "/iommu@fdca0000"; + mailbox2 = "/mailbox@fece0000"; + mipi4_csi2_hw = "/mipi4-csi2-hw@fdd50000"; + pdm1m1_idle = "/pinctrl/pdm1/pdm1m1-idle"; + rga3_core0 = "/rga@fdb60000"; + i2s1m0_sdo0 = "/pinctrl/i2s1/i2s1m0-sdo0"; + bigcore1_thermal = "/thermal-zones/bigcore1-thermal"; + pcfg_output_low_pull_up = "/pinctrl/pcfg-output-low-pull-up"; + spi2m1_pins = "/pinctrl/spi2/spi2m1-pins"; + pwm7m0_pins = "/pinctrl/pwm7/pwm7m0-pins"; + i2c2 = "/i2c@feaa0000"; + npu_grf = "/syscon@fd5a2000"; + i2s1m1_sdi0 = "/pinctrl/i2s1/i2s1m1-sdi0"; + mipi5_csi2 = "/mipi5-csi2"; + pwm8 = "/pwm@febe0000"; + log_leakage = "/otp@fecc0000/log-leakage@1a"; + cpub23_opp_info = "/otp@fecc0000/cpub23-opp-info@49"; + vdd_vdenc_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; + rga2 = "/rga@fdb80000"; + emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; + qos_usb3_0 = "/qos@fdf3e200"; + sata1m0_pins = "/pinctrl/sata1/sata1m0-pins"; + uart8m0_xfer = "/pinctrl/uart8/uart8m0-xfer"; + pwm13m2_pins = "/pinctrl/pwm13/pwm13m2-pins"; + hdmi_debug3 = "/pinctrl/hdmi/hdmi-debug3"; + cam0_or_cam1_switch_pin = "/pinctrl/cam/cam0-or-cam1-switch-pin"; + mcum1_pins = "/pinctrl/mcu/mcum1-pins"; + pwm10m1_pins = "/pinctrl/pwm10/pwm10m1-pins"; + edp1_out = "/edp@fded0000/ports/port@1/endpoint"; + hclk_sdio_pre = "/clocks/hclk_sdio_pre@fd7c092c"; + usb_host0_ehci = "/usb@fc800000"; + edp1_in_vp0 = "/edp@fded0000/ports/port@0/endpoint@0"; + gmac1 = "/ethernet@fe1c0000"; + i2s10_8ch = "/i2s@fde00000"; + hdmi1_in = "/hdmi@fdea0000/ports/port@0"; + usb2phy1_grf = "/syscon@fd5d4000"; + pdm0m0_clk1 = "/pinctrl/pdm0/pdm0m0-clk1"; + jpege2_mmu = "/iommu@fdba8800"; + pwm13 = "/pwm@febf0010"; + pcie2x1l0 = "/pcie@fe170000"; + hdmi0_in_vp1 = "/hdmi@fde80000/ports/port@0/endpoint@1"; + hdmim0_tx1_cec = "/pinctrl/hdmi/hdmim0-tx1-cec"; + l2_cache_b1 = "/cpus/l2-cache-b1"; + cif_dvp_bus8 = "/pinctrl/cif/cif-dvp-bus8"; + qos_rga2_mro = "/qos@fdf66c00"; + aclk_rkvdec1_pre = "/clocks/aclk_rkvdec1_pre@fd7c08a4"; + i2c8m1_xfer = "/pinctrl/i2c8/i2c8m1-xfer"; + vdd_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG5"; + hdmirx_det = "/pinctrl/hdmirx/hdmirx-det"; + pca9555 = "/i2c@feab0000/gpio@21"; + qos_sdmmc = "/qos@fdf3d800"; + clk32k_out1 = "/pinctrl/clk32k/clk32k-out1"; + i2c5m0_xfer = "/pinctrl/i2c5/i2c5m0-xfer"; + cif_dvp_clk = "/pinctrl/cif/cif-dvp-clk"; + rknpu = "/npu@fdab0000"; + pcfg_pull_none_drv_level_2 = "/pinctrl/pcfg-pull-none-drv-level-2"; + spi3m2_cs0 = "/pinctrl/spi3/spi3m2-cs0"; + vp0 = "/vop@fdd90000/ports/port@0"; + rga3_1_mmu = "/iommu@fdb70f00"; + jtagm2_pins = "/pinctrl/jtag/jtagm2-pins"; + cpu_l0 = "/cpus/cpu@0"; + uart7 = "/serial@feba0000"; + rkisp1_vir2 = "/rkisp1-vir2"; + fec1_mmu = "/iommu@fdcd8f00"; + qos_vop_m0 = "/qos@fdf82000"; + pcie_clk1 = "/pcie-clk1"; + gmac1_ptp_ref_clk = "/pinctrl/gmac1/gmac1-ptp-ref-clk"; + spi3m1_pins = "/pinctrl/spi3/spi3m1-pins"; + pwm8m0_pins = "/pinctrl/pwm8/pwm8m0-pins"; + hdmi0_sound = "/hdmi0-sound"; + ioc = "/syscon@fd5f0000"; + spi0m0_pins = "/pinctrl/spi0/spi0m0-pins"; + avsd = "/avsd-plus@fdb51000"; + rkcif_mipi_lvds5_sditf_vir3 = "/rkcif-mipi-lvds5-sditf-vir3"; + u2phy2 = "/syscon@fd5d8000/usb2-phy@8000"; + sfc = "/spi@fe2b0000"; + csi2_dphy0 = "/csi2-dphy0"; + spi1 = "/spi@feb10000"; + spi4m1_cs0 = "/pinctrl/spi4/spi4m1-cs0"; + gpu_grf = "/syscon@fd5a0000"; + pcfg_pull_up_drv_level_14 = "/pinctrl/pcfg-pull-up-drv-level-14"; + wireless_bluetooth = "/wireless-bluetooth"; + pclk_av1_pre = "/clocks/pclk_av1_pre@fd7c0910"; + sata2m0_pins = "/pinctrl/sata2/sata2m0-pins"; + uart9m0_xfer = "/pinctrl/uart9/uart9m0-xfer"; + pwm14m2_pins = "/pinctrl/pwm14/pwm14m2-pins"; + i2s1m0_sdi2 = "/pinctrl/i2s1/i2s1m0-sdi2"; + pwm11m1_pins = "/pinctrl/pwm11/pwm11m1-pins"; + bt_sound = "/bt-sound"; + qos_rkvenc1_m0ro = "/qos@fdf61000"; + mclkout_i2s2 = "/clocks/mclkout-i2s2@fd58c318"; + dsi0 = "/dsi@fde20000"; + pdm1m0_clk1 = "/pinctrl/pdm1/pdm1m0-clk1"; + uart1m0_rtsn = "/pinctrl/uart1/uart1m0-rtsn"; + ddrphych2_pins = "/pinctrl/ddrphych2/ddrphych2-pins"; + route_edp0 = "/display-subsystem/route/route-edp0"; + hdmi0 = "/hdmi@fde80000"; + es8388_sound = "/es8388-sound"; + hdmi1_in_vp1 = "/hdmi@fdea0000/ports/port@0/endpoint@1"; + pcfg_pull_up_drv_level_1 = "/pinctrl/pcfg-pull-up-drv-level-1"; + pcfg_pull_down_drv_level_5 = "/pinctrl/pcfg-pull-down-drv-level-5"; + i2s0_sdo2 = "/pinctrl/i2s0/i2s0-sdo2"; + vop_out = "/vop@fdd90000/ports"; + vdd_0v75_s3 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG1"; + hdmim1_rx = "/pinctrl/hdmi/hdmim1-rx"; + pcfg_pull_down_smt = "/pinctrl/pcfg-pull-down-smt"; + hdmim0_tx1_scl = "/pinctrl/hdmi/hdmim0-tx1-scl"; + hdmim0_tx1_sda = "/pinctrl/hdmi/hdmim0-tx1-sda"; + cpul_opp_info = "/otp@fecc0000/cpul-opp-info@3d"; + clk32k_in = "/pinctrl/clk32k/clk32k-in"; + usbdp_phy1 = "/phy@fed90000"; + mailbox0 = "/mailbox@fec60000"; + i2c6m0_xfer = "/pinctrl/i2c6/i2c6m0-xfer"; + pdm0m1_sdi2 = "/pinctrl/pdm0/pdm0m1-sdi2"; + sdmmc = "/mmc@fe2c0000"; + hclk_nvm = "/clocks/hclk_nvm@fd7c087c"; + hdmim0_tx1_hpd = "/pinctrl/hdmi/hdmim0-tx1-hpd"; + vp0_out_dp0 = "/vop@fdd90000/ports/port@0/endpoint@0"; + vddq_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG9"; + vcc_3v3_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG8"; + gmac0_ppstring = "/pinctrl/gmac0/gmac0-ppstring"; + i2c0 = "/i2c@fd880000"; + pdm1m1_clk = "/pinctrl/pdm1/pdm1m1-clk"; + pdm0m0_idle = "/pinctrl/pdm0/pdm0m0-idle"; + soc_thermal = "/thermal-zones/soc-thermal"; + cluster1_opp_table = "/cluster1-opp-table"; + i2s0_idle = "/pinctrl/i2s0/i2s0-idle"; + spi4m1_pins = "/pinctrl/spi4/spi4m1-pins"; + npu_opp_info = "/otp@fecc0000/npu-opp-info@55"; + pwm9m0_pins = "/pinctrl/pwm9/pwm9m0-pins"; + pwm6 = "/pwm@febd0020"; + spi1m0_pins = "/pinctrl/spi1/spi1m0-pins"; + hym8563 = "/i2c@fd880000/hym8563@51"; + i2s1m1_sclk = "/pinctrl/i2s1/i2s1m1-sclk"; + rk806_dvs2_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_gpio"; + hp_det = "/pinctrl/headphone/hp-det"; + hdmi_debug1 = "/pinctrl/hdmi/hdmi-debug1"; + vp1_out_dp1 = "/vop@fdd90000/ports/port@1/endpoint@3"; + qos_mcu_npu = "/qos@fdf72400"; + auddsm_pins = "/pinctrl/auddsm/auddsm-pins"; + i2s3_lrck = "/pinctrl/i2s3/i2s3-lrck"; + pcfg_pull_none_drv_level_2_smt = "/pinctrl/pcfg-pull-none-drv-level-2-smt"; + pwm15m2_pins = "/pinctrl/pwm15/pwm15m2-pins"; + pipe_phy1_grf = "/syscon@fd5c0000"; + pwm12m1_pins = "/pinctrl/pwm12/pwm12m1-pins"; + pwm11 = "/pwm@febe0030"; + rkisp_unite = "/rkisp-unite@fdcb0000"; + rkcif_mipi_lvds2_sditf = "/rkcif-mipi-lvds2-sditf"; + vp1_out_edp0 = "/vop@fdd90000/ports/port@1/endpoint@1"; + hclk_isp1_pre = "/clocks/hclk_isp1_pre@fd7c0868"; + rk806_dvs2_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_slp"; + i2s7_8ch = "/i2s@fddf8000"; + uart5m1_rtsn = "/pinctrl/uart5/uart5m1-rtsn"; + mipidphy1_grf = "/syscon@fd5b5000"; + usbhost3_0 = "/usbhost3_0"; + jpege2 = "/jpege-core@fdba8000"; + pcfg_pull_none_drv_level_15 = "/pinctrl/pcfg-pull-none-drv-level-15"; + pcie3x2_intc = "/pcie@fe160000/legacy-interrupt-controller"; + vp2_out_dsi1 = "/vop@fdd90000/ports/port@2/endpoint@4"; + mipidphy0_in_ucam0 = "/csi2-dphy0/ports/port@0/endpoint@0"; + av1d = "/av1d@fdc70000"; + uart1m2_ctsn = "/pinctrl/uart1/uart1m2-ctsn"; + sdiom1_pins = "/pinctrl/sdio/sdiom1-pins"; + rockchip_suspend = "/rockchip-suspend"; + rk806_dvs2_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_pwrdn"; + pcfg_pull_none_drv_level_0 = "/pinctrl/pcfg-pull-none-drv-level-0"; + npu_thermal = "/thermal-zones/npu-thermal"; + i2c7m0_xfer = "/pinctrl/i2c7/i2c7m0-xfer"; + pdm1m1_sdi2 = "/pinctrl/pdm1/pdm1m1-sdi2"; + cpu_pins = "/pinctrl/cpu/cpu-pins"; + dsi0_in_vp2 = "/dsi@fde20000/ports/port@0/endpoint@0"; + bt_wake_gpio = "/pinctrl/wireless-bluetooth/bt-wake-gpio"; + uart5 = "/serial@feb80000"; + dwc3_0_role_switch = "/usbdrd3_0/usb@fc000000/port/endpoint@0"; + rkisp1_vir0 = "/rkisp1-vir0"; + fiq_debugger = "/fiq-debugger"; + usbdp_phy1_u3 = "/phy@fed90000/u3-port"; + spi0m0_cs1 = "/pinctrl/spi0/spi0m0-cs1"; + sdio = "/mmc@fe2d0000"; + rkcif_mipi_lvds_sditf_vir2 = "/rkcif-mipi-lvds-sditf-vir2"; + spdif1m2_tx = "/pinctrl/spdif1/spdif1m2-tx"; + qos_gpu_m3 = "/qos@fdf35600"; + pdm1m0_idle = "/pinctrl/pdm1/pdm1m0-idle"; + pcfg_pull_none_drv_level_6_smt = "/pinctrl/pcfg-pull-none-drv-level-6-smt"; + user_led = "/leds/user"; + rkcif_mipi_lvds5_sditf_vir1 = "/rkcif-mipi-lvds5-sditf-vir1"; + i2s2m1_sdi = "/pinctrl/i2s2/i2s2m1-sdi"; + uart8_xfer = "/pinctrl/uart8/uart8-xfer"; + u2phy0 = "/syscon@fd5d0000/usb2-phy@0"; + pclk_vo1_grf = "/clocks/pclk_vo1_grf@fd7c08ec"; + vdd_gpu_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; + spi2m0_pins = "/pinctrl/spi2/spi2m0-pins"; + qos_rga3_1 = "/qos@fdf36000"; + i2s2m1_sclk = "/pinctrl/i2s2/i2s2m1-sclk"; + pcfg_pull_up_drv_level_12 = "/pinctrl/pcfg-pull-up-drv-level-12"; + spdif_tx4 = "/spdif-tx@fdde8000"; + gmac1_mtl_rx_setup = "/ethernet@fe1c0000/rx-queues-config"; + rkispp1 = "/rkispp@fdcd8000"; + hdmim2_tx1_cec = "/pinctrl/hdmi/hdmim2-tx1-cec"; + u2phy1_otg = "/syscon@fd5d4000/usb2-phy@4000/otg-port"; + hdptxphy_hdmi_clk0 = "/hdmiphy@fed60000/clk-port"; + i2s1m0_sdi0 = "/pinctrl/i2s1/i2s1m0-sdi0"; + mipi4_csi2 = "/mipi4-csi2"; + mclkout_i2s0 = "/clocks/mclkout-i2s0@fd58c318"; + vcc5v0_host3 = "/vcc5v0-host3"; + rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; + vdd_cpu_big0_s0 = "/i2c@fd880000/rk8602@42"; + dp1 = "/dp@fde60000"; + emmc_data_strobe = "/pinctrl/emmc/emmc-data-strobe"; + pwm13m1_pins = "/pinctrl/pwm13/pwm13m1-pins"; + vop_pins = "/pinctrl/vop/vop-pins"; + pcie20x1m1_pins = "/pinctrl/pcie20x1/pcie20x1m1-pins"; + fspim2_cs1 = "/pinctrl/fspi/fspim2-cs1"; + vcc_hub = "/vcc-hub-regulator"; + mcum0_pins = "/pinctrl/mcu/mcum0-pins"; + pwm10m0_pins = "/pinctrl/pwm10/pwm10m0-pins"; + uart9m2_rtsn = "/pinctrl/uart9/uart9m2-rtsn"; + mipidcphy0 = "/phy@feda0000"; + uart6m1_rtsn = "/pinctrl/uart6/uart6m1-rtsn"; + vcc3v3_pcie30 = "/vcc3v3-pcie30"; + pcfg_pull_down_drv_level_3 = "/pinctrl/pcfg-pull-down-drv-level-3"; + mipim1_camera0_clk = "/pinctrl/mipi/mipim1-camera0-clk"; + i2s0_sdo0 = "/pinctrl/i2s0/i2s0-sdo0"; + vop = "/vop@fdd90000"; + gmac0_ptp_refclk = "/pinctrl/gmac0/gmac0-ptp-refclk"; + usbdp_phy0_orientation_switch = "/phy@fed80000/port/endpoint@0"; + vepu = "/vepu@fdb50000"; + cif_clk = "/pinctrl/cif/cif-clk"; + pcie30_phy_grf = "/syscon@fd5b8000"; + isp1_mmu = "/iommu@fdcc7f00"; + pdm0m1_sdi0 = "/pinctrl/pdm0/pdm0m1-sdi0"; + rkvdec1_mmu = "/iommu@fdc48700"; + edp1 = "/edp@fded0000"; + cam0_cam1_switch = "/cam0-cam1-switch"; + gmac1_ppstrig = "/pinctrl/gmac1/gmac1-ppstrig"; + i2c8m0_xfer = "/pinctrl/i2c8/i2c8m0-xfer"; + dsi1_in_vp2 = "/dsi@fde30000/ports/port@0/endpoint@0"; + hdmim2_rx_hpdin = "/pinctrl/hdmi/hdmim2-rx-hpdin"; + i2s1m1_sdo3 = "/pinctrl/i2s1/i2s1m1-sdo3"; + pcfg_pull_down_drv_level_14 = "/pinctrl/pcfg-pull-down-drv-level-14"; + gmac0_rx_bus2 = "/pinctrl/gmac0/gmac0-rx-bus2"; + rkcif_mipi_lvds4_sditf_vir2 = "/rkcif-mipi-lvds4-sditf-vir2"; + center_thermal = "/thermal-zones/center-thermal"; + uart0_ctsn = "/pinctrl/uart0/uart0-ctsn"; + uart4_rtsn = "/pinctrl/uart4/uart4-rtsn"; + pwm4 = "/pwm@febd0000"; + vdd2_ddr_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG6"; + jtagm1_pins = "/pinctrl/jtag/jtagm1-pins"; + rkisp0_vir2 = "/rkisp0-vir2"; + i2c1m4_xfer = "/pinctrl/i2c1/i2c1m4-xfer"; + l2_cache_l2 = "/cpus/l2-cache-l2"; + pcfg_pull_none_drv_level_9 = "/pinctrl/pcfg-pull-none-drv-level-9"; + qos_vdpu = "/qos@fdf67200"; + vp2_out_hdmi1 = "/vop@fdd90000/ports/port@2/endpoint@7"; + spi3m0_pins = "/pinctrl/spi3/spi3m0-pins"; + pcfg_output_low_pull_none = "/pinctrl/pcfg-output-low-pull-none"; + spi0m2_cs0 = "/pinctrl/spi0/spi0m2-cs0"; + rkisp1 = "/rkisp@fdcc0000"; + usbdpphy1_grf = "/syscon@fd5cc000"; + mipim1_camera4_clk = "/pinctrl/mipi/mipim1-camera4-clk"; + mipim0_camera2_clk = "/pinctrl/mipi/mipim0-camera2-clk"; + csi2_dcphy1 = "/csi2-dcphy1"; + hdmim2_tx1_scl = "/pinctrl/hdmi/hdmim2-tx1-scl"; + hdmim2_tx1_sda = "/pinctrl/hdmi/hdmim2-tx1-sda"; + spi2m2_cs1 = "/pinctrl/spi2/spi2m2-cs1"; + chosen = "/chosen"; + soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; + rk806_dvs1_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_rst"; + mpp_srv = "/mpp-srv"; + hclk_rkvenc1_pre = "/clocks/hclk_rkvenc1_pre@fd7c08c0"; + dp0m2_pins = "/pinctrl/dp0/dp0m2-pins"; + debug = "/debug@fd104000"; + jpege0 = "/jpege-core@fdba0000"; + pcfg_pull_none_drv_level_13 = "/pinctrl/pcfg-pull-none-drv-level-13"; + pwm14m1_pins = "/pinctrl/pwm14/pwm14m1-pins"; + pwm11m0_pins = "/pinctrl/pwm11/pwm11m0-pins"; + vp2_out_dp0 = "/vop@fdd90000/ports/port@2/endpoint@0"; + qos_rkvenc0_m0ro = "/qos@fdf60000"; + its0 = "/interrupt-controller@fe600000/msi-controller@fe640000"; + cpu_b2 = "/cpus/cpu@600"; + uart7m1_rtsn = "/pinctrl/uart7/uart7m1-rtsn"; + usb_5v_ctrl = "/pinctrl/usb-typec/usb-5v-ctrl"; + tsadc_gpio_func = "/pinctrl/gpio-func/tsadc-gpio-func"; + spi1m1_cs0 = "/pinctrl/spi1/spi1m1-cs0"; + pcfg_pull_down = "/pinctrl/pcfg-pull-down"; + dmc_opp_info = "/otp@fecc0000/dmc-opp-info@5b"; + ddrphych1_pins = "/pinctrl/ddrphych1/ddrphych1-pins"; + dsi0_in = "/dsi@fde20000/ports/port@0"; + pdm1m1_sdi0 = "/pinctrl/pdm1/pdm1m1-sdi0"; + spi3m1_cs1 = "/pinctrl/spi3/spi3m1-cs1"; + bigcore0_grf = "/syscon@fd590000"; + cpub1_leakage = "/otp@fecc0000/cpub1-leakage@18"; + uart3 = "/serial@feb60000"; + aclk_hdcp1_pre = "/clocks/aclk_hdcp1_pre@fd7c08ec"; + pcfg_pull_up = "/pinctrl/pcfg-pull-up"; + rkcif_mipi_lvds3_sditf_vir3 = "/rkcif-mipi-lvds3-sditf-vir3"; + codec_leakage = "/otp@fecc0000/codec-leakage@29"; + pcfg_pull_up_drv_level_8 = "/pinctrl/pcfg-pull-up-drv-level-8"; + dmac1 = "/dma-controller@fea30000"; + pdm0m0_sdi2 = "/pinctrl/pdm0/pdm0m0-sdi2"; + i2s1m1_lrck = "/pinctrl/i2s1/i2s1m1-lrck"; + qos_gpu_m1 = "/qos@fdf35200"; + i2s0_sdi2 = "/pinctrl/i2s0/i2s0-sdi2"; + spi2m0_cs0 = "/pinctrl/spi2/spi2m0-cs0"; + gpu_opp_info = "/otp@fecc0000/gpu-opp-info@4f"; + csi2_dphy1_hw = "/csi2-dphy1-hw@fedc8000"; + pcfg_pull_up_drv_level_10 = "/pinctrl/pcfg-pull-up-drv-level-10"; + spdif_tx2 = "/spdif-tx@fddb0000"; + npu_opp_table = "/npu-opp-table"; + spi4m0_cs1 = "/pinctrl/spi4/spi4m0-cs1"; + vo0_grf = "/syscon@fd5a6000"; + i2c2m4_xfer = "/pinctrl/i2c2/i2c2m4-xfer"; + qos_usb2host_0 = "/qos@fdf3e400"; + spi4m0_pins = "/pinctrl/spi4/spi4m0-pins"; + gmac1_mtl_tx_setup = "/ethernet@fe1c0000/tx-queues-config"; + rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; + i2s1m0_sclk = "/pinctrl/i2s1/i2s1m0-sclk"; + i2c7 = "/i2c@fec90000"; + mipi2_csi2_output = "/mipi2-csi2/ports/port@1/endpoint@0"; + mipi_te0 = "/pinctrl/mipi/mipi-te0"; + sata_reset = "/pinctrl/sata/sata-reset"; + dp1m2_pins = "/pinctrl/dp1/dp1m2-pins"; + pwm15m1_pins = "/pinctrl/pwm15/pwm15m1-pins"; + pcfg_pull_down_drv_level_1 = "/pinctrl/pcfg-pull-down-drv-level-1"; + pwm12m0_pins = "/pinctrl/pwm12/pwm12m0-pins"; + qos_vicap_m1 = "/qos@fdf40800"; + sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; + uart8m1_rtsn = "/pinctrl/uart8/uart8m1-rtsn"; + usb2phy2_grf = "/syscon@fd5d8000"; + rkvdec1_sram = "/sram@ff001000/rkvdec-sram@78000"; + uart5m0_rtsn = "/pinctrl/uart5/uart5m0-rtsn"; + jpege3_mmu = "/iommu@fdbac800"; + vcc_2v0_pldo_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG7"; + i2s3_mclk = "/pinctrl/i2s3/i2s3-mclk"; + mclkout_i2s1m1 = "/clocks/mclkout-i2s1@fd58a000"; + spdif_tx1_dc = "/spdif-tx1-dc"; + uart0m2_xfer = "/pinctrl/uart0/uart0m2-xfer"; + wifi_host_wake_irq = "/pinctrl/wireless-wlan/wifi-host-wake-irq"; + i2s1m1_sdo1 = "/pinctrl/i2s1/i2s1m1-sdo1"; + uart1m1_ctsn = "/pinctrl/uart1/uart1m1-ctsn"; + pcfg_pull_down_drv_level_12 = "/pinctrl/pcfg-pull-down-drv-level-12"; + sdiom0_pins = "/pinctrl/sdio/sdiom0-pins"; + pcfg_pull_up_smt = "/pinctrl/pcfg-pull-up-smt"; + php_grf = "/syscon@fd5b0000"; + pwm2 = "/pwm@fd8b0020"; + pdm1m0_sdi2 = "/pinctrl/pdm1/pdm1m0-sdi2"; + i2s2m1_lrck = "/pinctrl/i2s2/i2s2m1-lrck"; + gmac0_stmmac_axi_setup = "/ethernet@fe1b0000/stmmac-axi-config"; + mipi1_csi2_hw = "/mipi1-csi2-hw@fdd20000"; + sata1 = "/sata@fe220000"; + rkispp1_vir0 = "/rkispp1-vir0"; + dp0_in_vp1 = "/dp@fde50000/ports/port@0/endpoint@1"; + CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; + rkisp0_vir0 = "/rkisp0-vir0"; + spi3m3_cs0 = "/pinctrl/spi3/spi3m3-cs0"; + specification_serial_number = "/otp@fecc0000/specification-serial-number@6"; + l2_cache_l0 = "/cpus/l2-cache-l0"; + pcfg_pull_none_drv_level_7 = "/pinctrl/pcfg-pull-none-drv-level-7"; + qos_hdcp0 = "/qos@fdf80000"; + qos_npu0_mro = "/qos@fdf72200"; + usbdrd_dwc3_1 = "/usbdrd3_1/usb@fc400000"; + rkvenc1 = "/rkvenc-core@fdbe0000"; + display_subsystem = "/display-subsystem"; + i2c3m4_xfer = "/pinctrl/i2c3/i2c3m4-xfer"; + pcie30x2m3_pins = "/pinctrl/pcie30x2/pcie30x2m3-pins"; + qos_npu2 = "/qos@fdf71000"; + i2s0_8ch = "/i2s@fe470000"; + i2s2m0_sclk = "/pinctrl/i2s2/i2s2m0-sclk"; + pmu = "/power-management@fd8d8000"; + gmac1_tx_bus2 = "/pinctrl/gmac1/gmac1-tx-bus2"; + pcfg_pull_none_drv_level_11 = "/pinctrl/pcfg-pull-none-drv-level-11"; + route_hdmi1 = "/display-subsystem/route/route-hdmi1"; + csi2_dphy5 = "/csi2-dphy5"; + spi4m2_cs0 = "/pinctrl/spi4/spi4m2-cs0"; + mipi3_csi2 = "/mipi3-csi2"; + pmu0_grf = "/syscon@fd588000"; + fan = "/pwm-fan"; + cpu_b0 = "/cpus/cpu@400"; + vccio_sd_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG5"; + qos_rkvenc1_m2wo = "/qos@fdf61400"; + gpio4 = "/pinctrl/gpio@fec50000"; + hdmim0_rx_cec = "/pinctrl/hdmi/hdmim0-rx-cec"; + pwm3m3_pins = "/pinctrl/pwm3/pwm3m3-pins"; + aclk_vdpu_low_pre = "/clocks/aclk_vdpu_low_pre@fd7c08b0"; + mmu600_php = "/iommu@fcb00000"; + cif_mipi2_in1 = "/rkcif-mipi-lvds2/port/endpoint"; + pwm0m2_pins = "/pinctrl/pwm0/pwm0m2-pins"; + pwm13m0_pins = "/pinctrl/pwm13/pwm13m0-pins"; + pcie20x1m0_pins = "/pinctrl/pcie20x1/pcie20x1m0-pins"; + bt656_pins = "/pinctrl/bt656/bt656-pins"; + hdmi1_sound = "/hdmi1-sound"; + uart9m1_rtsn = "/pinctrl/uart9/uart9m1-rtsn"; + uart6m0_rtsn = "/pinctrl/uart6/uart6m0-rtsn"; + pcie2x1l2_intc = "/pcie@fe190000/legacy-interrupt-controller"; + mod_sleep = "/mod-sleep-regulator"; + gpu_thermal = "/thermal-zones/gpu-thermal"; + hdmim1_tx0_cec = "/pinctrl/hdmi/hdmim1-tx0-cec"; + uart1 = "/serial@feb40000"; + rkcif_mipi_lvds3_sditf_vir1 = "/rkcif-mipi-lvds3-sditf-vir1"; + pcfg_pull_up_drv_level_6 = "/pinctrl/pcfg-pull-up-drv-level-6"; + qos_rkvdec0 = "/qos@fdf62000"; + vp2_out_edp0 = "/vop@fdd90000/ports/port@2/endpoint@1"; + uart1m2_xfer = "/pinctrl/uart1/uart1m2-xfer"; + pdm0m0_sdi0 = "/pinctrl/pdm0/pdm0m0-sdi0"; + fspim2_pins = "/pinctrl/fspi/fspim2-pins"; + i2s0_sdi0 = "/pinctrl/i2s0/i2s0-sdi0"; + gpu_pins = "/pinctrl/gpu/gpu-pins"; + imx415 = "/i2c@fec80000/imx415@37"; + vp3_out_dsi1 = "/vop@fdd90000/ports/port@3/endpoint@1"; + i2s4_8ch = "/i2s@fddc0000"; + ramoops = "/reserved-memory/ramoops@110000"; + dp0_sound = "/dp0-sound"; + spdif_tx0 = "/spdif-tx@fe4e0000"; + dp1_in_vp1 = "/dp@fde60000/ports/port@0/endpoint@1"; + i2s1m0_sdo3 = "/pinctrl/i2s1/i2s1m0-sdo3"; + mipi2_csi2_input1 = "/mipi2-csi2/ports/port@0/endpoint@0"; + vcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG2"; + vp1_out_hdmi0 = "/vop@fdd90000/ports/port@1/endpoint@2"; + vcc12v_dcin = "/vcc12v-dcin"; + vp0_out_edp1 = "/vop@fdd90000/ports/port@0/endpoint@4"; + uart3_rtsn = "/pinctrl/uart3/uart3-rtsn"; + gmac1_rgmii_clk = "/pinctrl/gmac1/gmac1-rgmii-clk"; + package_serial_number_high = "/otp@fecc0000/package-serial-number-high@5"; + hdcp0 = "/hdcp@fde40000"; + qos_fisheye1 = "/qos@fdf40200"; + rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; + i2c5 = "/i2c@fead0000"; + jtagm0_pins = "/pinctrl/jtag/jtagm0-pins"; + i2c4m4_xfer = "/pinctrl/i2c4/i2c4m4-xfer"; + spdif_tx1_sound = "/spdif-tx1-sound"; + qos_jpeg_enc2 = "/qos@fdf66800"; + hdmi0_in = "/hdmi@fde80000/ports/port@0"; + i2s1m1_sdi3 = "/pinctrl/i2s1/i2s1m1-sdi3"; + i2c1m3_xfer = "/pinctrl/i2c1/i2c1m3-xfer"; + hdptxphy_hdmi0 = "/hdmiphy@fed60000"; + sdmmc_pwren = "/pinctrl/sdmmc/sdmmc-pwren"; + usbdp_phy1_dp = "/phy@fed90000/dp-port"; + npu_leakage = "/otp@fecc0000/npu-leakage@28"; + aclk_jpeg_decoder_pre = "/clocks/aclk_jpeg_decoder_pre@fd7c08b0"; + pdm0 = "/pdm@fe4b0000"; + gmac1_miim = "/pinctrl/gmac1/gmac1-miim"; + pcfg_output_high_pull_down = "/pinctrl/pcfg-output-high-pull-down"; + hdmi_debug6 = "/pinctrl/hdmi/hdmi-debug6"; + pcie3x4 = "/pcie@fe150000"; + can0m1_pins = "/pinctrl/can0/can0m1-pins"; + mclkin_i2s2 = "/clocks/mclkin-i2s2"; + jpege_ccu = "/jpege-ccu"; + pcfg_pull_none_drv_level_3_smt = "/pinctrl/pcfg-pull-none-drv-level-3-smt"; + hdmim1_rx_cec = "/pinctrl/hdmi/hdmim1-rx-cec"; + pipe_phy2_grf = "/syscon@fd5c4000"; + dp0m1_pins = "/pinctrl/dp0/dp0m1-pins"; + rkvdec1 = "/rkvdec-core@fdc48000"; + pwm1m2_pins = "/pinctrl/pwm1/pwm1m2-pins"; + pwm14m0_pins = "/pinctrl/pwm14/pwm14m0-pins"; + little_core_thermal = "/thermal-zones/littlecore-thermal"; + rk806_dvs3_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_slp"; + usb_5v = "/usb-5v"; + i2s8_8ch = "/i2s@fddc8000"; + drm_cubic_lut = "/reserved-memory/drm-cubic-lut@00000000"; + rkcif_mipi_lvds2_sditf_vir2 = "/rkcif-mipi-lvds2-sditf-vir2"; + hdptxphy0 = "/phy@fed60000"; + pcie30x1_0_button_rstn = "/pinctrl/pcie30x1/pcie30x1-0-button-rstn"; + u2phy3_host = "/syscon@fd5dc000/usb2-phy@c000/host-port"; + route_dp0 = "/display-subsystem/route/route-dp0"; + hdmim0_rx_scl = "/pinctrl/hdmi/hdmim0-rx-scl"; + hdmim0_rx_sda = "/pinctrl/hdmi/hdmim0-rx-sda"; + uart7m0_rtsn = "/pinctrl/uart7/uart7m0-rtsn"; + pcfg_pull_down_drv_level_10 = "/pinctrl/pcfg-pull-down-drv-level-10"; + usbdrd3_0 = "/usbdrd3_0"; + ddrphych0_pins = "/pinctrl/ddrphych0/ddrphych0-pins"; + bt_irq_gpio = "/pinctrl/wireless-bluetooth/bt-irq-gpio"; + pwm0 = "/pwm@fd8b0000"; + uart2m2_xfer = "/pinctrl/uart2/uart2m2-xfer"; + pdm1m0_sdi0 = "/pinctrl/pdm1/pdm1m0-sdi0"; + hdmim1_tx0_scl = "/pinctrl/hdmi/hdmim1-tx0-scl"; + hdmim1_tx0_sda = "/pinctrl/hdmi/hdmim1-tx0-sda"; + can1 = "/can@fea60000"; + rkvtunnel = "/rkvtunnel"; + pcfg_pull_none_drv_level_5 = "/pinctrl/pcfg-pull-none-drv-level-5"; + rkcif_mipi_lvds3_sditf = "/rkcif-mipi-lvds3-sditf"; + combphy2_psu = "/phy@fee20000"; + vp3 = "/vop@fdd90000/ports/port@3"; + rk806_dvs2_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_dvs"; + mmu600_pcie = "/iommu@fc900000"; + hdmim1_tx0_hpd = "/pinctrl/hdmi/hdmim1-tx0-hpd"; + i2s1m0_lrck = "/pinctrl/i2s1/i2s1m0-lrck"; + cpu_l3 = "/cpus/cpu@300"; + spi0m1_cs1 = "/pinctrl/spi0/spi0m1-cs1"; + vp0_out_hdmi1 = "/vop@fdd90000/ports/port@0/endpoint@5"; + spdif_rx1 = "/spdif-rx@fde10000"; + gmac0_clkinout = "/pinctrl/gmac0/gmac0-clkinout"; + rkcif_dvp = "/rkcif-dvp"; + i2c5m4_xfer = "/pinctrl/i2c5/i2c5m4-xfer"; + wireless_wlan = "/wireless-wlan"; + rkcif_mipi_lvds = "/rkcif-mipi-lvds"; + avdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG3"; + i2c2m3_xfer = "/pinctrl/i2c2/i2c2m3-xfer"; + pcie30x4m3_pins = "/pinctrl/pcie30x4/pcie30x4m3-pins"; + hclk_rkvdec0_pre = "/clocks/hclk_rkvdec0_pre@fd7c08a0"; + route_dsi0 = "/display-subsystem/route/route-dsi0"; + rk806_dvs3_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_pwrdn"; + csi2_dphy3 = "/csi2-dphy3"; + pcie30x1m2_pins = "/pinctrl/pcie30x1/pcie30x1m2-pins"; + spi4 = "/spi@fecb0000"; + litcore_grf = "/syscon@fd594000"; + isp0_vir2 = "/rkisp0-vir2/port/endpoint@0"; + i2s1m1_mclk = "/pinctrl/i2s1/i2s1m1-mclk"; + sys_grf = "/syscon@fd58c000"; + edp0_in_vp1 = "/edp@fdec0000/ports/port@0/endpoint@1"; + mdio0 = "/ethernet@fe1b0000/mdio"; + rkisp_unite_mmu = "/rkisp-unite-mmu@fdcb7f00"; + gpio2 = "/pinctrl/gpio@fec30000"; + spi1m0_cs1 = "/pinctrl/spi1/spi1m0-cs1"; + aclk_av1_pre = "/clocks/aclk_av1_pre@fd7c0910"; + can1m1_pins = "/pinctrl/can1/can1m1-pins"; + rkcif_mipi_lvds1_sditf_vir3 = "/rkcif-mipi-lvds1-sditf-vir3"; + hdmim2_rx_cec = "/pinctrl/hdmi/hdmim2-rx-cec"; + mipi3_csi2_hw = "/mipi3-csi2-hw@fdd40000"; + dp1m1_pins = "/pinctrl/dp1/dp1m1-pins"; + pwm2m2_pins = "/pinctrl/pwm2/pwm2m2-pins"; + pwm15m0_pins = "/pinctrl/pwm15/pwm15m0-pins"; + hclk_vo0 = "/clocks/hclk_vo0@fd7c08dc"; + bigcore0_thermal = "/thermal-zones/bigcore0-thermal"; + hdmim1_rx_scl = "/pinctrl/hdmi/hdmim1-rx-scl"; + hdmim1_rx_sda = "/pinctrl/hdmi/hdmim1-rx-sda"; + uart8m0_rtsn = "/pinctrl/uart8/uart8m0-rtsn"; + pcfg_pull_up_drv_level_4 = "/pinctrl/pcfg-pull-up-drv-level-4"; + mipim1_camera1_clk = "/pinctrl/mipi/mipim1-camera1-clk"; + rkvdec0_sram = "/sram@ff001000/rkvdec-sram@0"; + pcfg_pull_down_drv_level_8 = "/pinctrl/pcfg-pull-down-drv-level-8"; + gmac_uio1 = "/uio@fe1c0000"; + usbc0_orien_sw = "/i2c@fec80000/fusb302@22/connector/ports/port@0/endpoint"; + jpegd = "/jpegd@fdb90000"; + uart3m2_xfer = "/pinctrl/uart3/uart3m2-xfer"; + minidump_smem = "/reserved-memory/minidump-smem@1f0000"; + i2s0_sclk = "/pinctrl/i2s0/i2s0-sclk"; + uart0m1_xfer = "/pinctrl/uart0/uart0m1-xfer"; + rga3_core1 = "/rga@fdb70000"; + i2s1m0_sdo1 = "/pinctrl/i2s1/i2s1m0-sdo1"; + uart1m0_ctsn = "/pinctrl/uart1/uart1m0-ctsn"; + vcc5v0_usb = "/vcc5v0-usb"; + minidump = "/minidump"; + }; + + rkvdec-ccu@fdc30000 { + power-domains = <0x60 0x0e>; + rockchip,ccu-mode = <0x01>; + clock-names = "aclk_ccu"; + reg-names = "ccu"; + assigned-clocks = <0x02 0x18e>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x282>; + clocks = <0x02 0x18e>; + compatible = "rockchip,rkv-decoder-v2-ccu"; + status = "okay"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdc30000 0x00 0x100>; + phandle = <0xca>; + reset-names = "video_ccu"; + }; + + qos@fdf60000 { + compatible = "syscon"; + reg = <0x00 0xfdf60000 0x00 0x20>; + phandle = <0x8d>; + }; + + iommu@fdb50800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x76 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_vdpu_mmu"; + reg = <0x00 0xfdb50800 0x00 0x40>; + phandle = <0xb7>; + }; + + rga@fdb60000 { + power-domains = <0x60 0x16>; + iommus = <0xb9>; + clock-names = "aclk_rga3_0\0hclk_rga3_0\0clk_rga3_0"; + interrupts = <0x00 0x72 0x04>; + clocks = <0x02 0x1ba 0x02 0x1b9 0x02 0x1bb>; + compatible = "rockchip,rga3_core0"; + status = "okay"; + interrupt-names = "rga3_core0_irq"; + reg = <0x00 0xfdb60000 0x00 0x1000>; + phandle = <0x269>; + }; + + qos@fdf67200 { + compatible = "syscon"; + reg = <0x00 0xfdf67200 0x00 0x20>; + phandle = <0x28b>; + }; + + vepu@fdb50000 { + power-domains = <0x60 0x15>; + iommus = <0xb7>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1c0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + interrupts = <0x00 0x78 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-encoder-v2"; + rockchip,resetgroup-node = <0x00>; + status = "disabled"; + interrupt-names = "irq_vepu"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb50000 0x00 0x400>; + phandle = <0x266>; + reset-names = "shared_video_a\0shared_video_h"; + }; + + mipi3-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x227>; + }; + + hdmi0-sound { + rockchip,jack-det; + rockchip,cpu = <0x1d3>; + rockchip,codec = <0x1d4>; + rockchip,card-name = "rockchip-hdmi0"; + compatible = "rockchip,hdmi"; + status = "okay"; + phandle = <0x49b>; + rockchip,mclk-fs = <0x80>; + }; + + reserved-memory { + #address-cells = <0x02>; + #size-cells = <0x02>; + ranges; + + minidump-smem@1f0000 { + status = "disabled"; + reg = <0x00 0x1f0000 0x00 0x100>; + phandle = <0x1cf>; + no-map; + }; + + minidump-mem@c000000 { + status = "disabled"; + reg = <0x00 0xc000000 0x00 0x2000000>; + phandle = <0x1d0>; + no-map; + }; + + cma { + linux,cma-default; + compatible = "shared-dma-pool"; + size = <0x00 0x800000>; + reg = <0x00 0x10000000 0x00 0x10000000>; + reusable; + }; + + drm-logo@00000000 { + compatible = "rockchip,drm-logo"; + reg = <0x00 0xedf00000 0x00 0x2e0000>; + phandle = <0x37>; + }; + + ramoops@110000 { + boot-log-count = <0x01>; + record-size = <0x14000>; + pmsg-size = <0x30000>; + compatible = "ramoops"; + console-size = <0x80000>; + reg = <0x00 0x110000 0x00 0xe0000>; + phandle = <0x493>; + boot-log-size = <0x8000>; + ftrace-size = <0x00>; + }; + + drm-cubic-lut@00000000 { + compatible = "rockchip,drm-cubic-lut"; + reg = <0x00 0x00 0x00 0x00>; + phandle = <0x492>; + }; + }; + + pcie@fe160000 { + power-domains = <0x60 0x22>; + vpcie3v3-supply = <0x1ba>; + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x10 0x1f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x10>; + resets = <0x02 0x20e 0x02 0x21d>; + interrupts = <0x00 0x102 0x04 0x00 0x101 0x04 0x00 0x100 0x04 0x00 0xff 0x04 0x00 0xfe 0x04>; + clocks = <0x02 0x14f 0x02 0x154 0x02 0x14a 0x02 0x159 0x02 0x15f 0x02 0x184>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1b9 0x00 0x00 0x00 0x00 0x02 0x1b9 0x01 0x00 0x00 0x00 0x03 0x1b9 0x02 0x00 0x00 0x00 0x04 0x1b9 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x03>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + reset-gpios = <0x10d 0x08 0x00>; + num-lanes = <0x02>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf1000000 0x00 0xf1000000 0x00 0x100000 0x81000000 0x00 0xf1100000 0x00 0xf1100000 0x00 0x100000 0x82000000 0x00 0xf1200000 0x00 0xf1200000 0x00 0xe00000 0xc3000000 0x09 0x40000000 0x09 0x40000000 0x00 0x40000000>; + msi-map = <0x1000 0x1b6 0x1000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x1b7>; + num-viewport = <0x08>; + reg = <0x00 0xfe160000 0x00 0x10000 0x0a 0x40400000 0x00 0x400000>; + linux,pci-domain = <0x01>; + phandle = <0x486>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x10>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xff 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x1b9>; + interrupt-controller; + }; + }; + + spdif-tx@fddb8000 { + power-domains = <0x60 0x19>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x20b>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc6 0x04>; + clocks = <0x02 0x20f 0x02 0x20a>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfddb8000 0x00 0x1000>; + phandle = <0x1e2>; + dmas = <0xf1 0x16>; + }; + + pvtm@fdb30000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-gpu-pvtm"; + reg = <0x00 0xfdb30000 0x00 0x100>; + + pvtm@4 { + clock-names = "clk"; + resets = <0x02 0x430 0x02 0x42f>; + clocks = <0x02 0x118>; + reg = <0x04>; + reset-names = "rts\0rst-p"; + }; + }; + + spdif-tx1-dc { + #sound-dai-cells = <0x00>; + compatible = "linux,spdif-dit"; + status = "disabled"; + phandle = <0x1d8>; + }; + + csi2-dphy0 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "okay"; + phys = <0x2f 0x30>; + firefly-compatible; + phandle = <0x20f>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x32>; + reg = <0x01>; + phandle = <0x184>; + }; + + endpoint@0 { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x31>; + reg = <0x00>; + phandle = <0x183>; + }; + }; + + port@1 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + + endpoint@0 { + remote-endpoint = <0x33>; + reg = <0x00>; + phandle = <0x4d>; + }; + }; + }; + }; + + rkisp-unite@fdcb0000 { + power-domains = <0x60 0x1c>; + iommus = <0xcf>; + clock-names = "aclk_isp0\0hclk_isp0\0clk_isp_core0\0clk_isp_core_marvin0\0clk_isp_core_vicap0\0aclk_isp1\0hclk_isp1\0clk_isp_core1\0clk_isp_core_marvin1\0clk_isp_core_vicap1"; + interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd 0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; + compatible = "rockchip,rk3588-rkisp-unite"; + status = "disabled"; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + reg = <0x00 0xfdcb0000 0x00 0x10000 0x00 0xfdcc0000 0x00 0x10000>; + phandle = <0x277>; + }; + + sata@fe230000 { + phy-names = "sata-phy"; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x113 0x04>; + clocks = <0x02 0x173 0x02 0x170 0x02 0x176 0x02 0x165 0x02 0x180>; + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + status = "disabled"; + interrupt-names = "hostc"; + phys = <0x70 0x01>; + reg = <0x00 0xfe230000 0x00 0x1000>; + phandle = <0x291>; + ports-implemented = <0x01>; + }; + + syscon@fd5a0000 { + compatible = "rockchip,rk3588-gpu-grf\0syscon"; + reg = <0x00 0xfd5a0000 0x00 0x100>; + phandle = <0x65>; + }; + + bt-sound { + simple-audio-card,name = "rockchip,bt"; + simple-audio-card,format = "dsp_a"; + simple-audio-card,bitclock-inversion = <0x00>; + compatible = "simple-audio-card"; + status = "disabled"; + phandle = <0x49a>; + simple-audio-card,mclk-fs = <0x100>; + + simple-audio-card,cpu { + sound-dai = <0x1d1>; + }; + + simple-audio-card,codec { + sound-dai = <0x1d2 0x01>; + }; + }; + + iommu@fdb90480 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x82 0x04>; + clocks = <0x02 0x1b4 0x02 0x1b5>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpegd_mmu"; + reg = <0x00 0xfdb90480 0x00 0x40>; + phandle = <0xbb>; + }; + + hdcp@fde70000 { + power-domains = <0x60 0x1a>; + clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; + resets = <0x02 0x3c8 0x02 0x3c6 0x02 0x3c5 0x02 0x3c4 0x02 0x3ca>; + interrupts = <0x00 0xa0 0x04>; + clocks = <0x02 0x217 0x02 0x219 0x02 0x218 0x02 0x216 0x02 0x228 0x02 0x229>; + compatible = "rockchip,rk3588-hdcp"; + status = "disabled"; + reg = <0x00 0xfde70000 0x00 0x80>; + phandle = <0x287>; + reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; + rockchip,vo-grf = <0xd8>; + }; + + spdif-tx@fe4f0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x143>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x45>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc2 0x04>; + clocks = <0x02 0x47 0x02 0x44>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfe4f0000 0x00 0x1000>; + phandle = <0x1d7>; + dmas = <0xf1 0x05>; + }; + + rkcif-mipi-lvds-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22d>; + }; + + es8388-sound { + pinctrl-names = "default"; + rockchip,cpu = <0x1da>; + pinctrl-0 = <0x1dc>; + rockchip,codec = <0x1db>; + hp-det-gpio = <0x79 0x13 0x00>; + rockchip,card-name = "rockchip-es8388"; + rockchip,format = "i2s"; + rockchip,audio-routing = "Headphone\0LOUT1\0Headphone\0ROUT1\0Speaker\0LOUT2\0Speaker\0ROUT2\0Headphone\0Headphone Power\0Headphone\0Headphone Power\0LINPUT2\0Main Mic\0RINPUT2\0Main Mic\0LINPUT1\0Headset Mic\0RINPUT1\0Headset Mic"; + compatible = "firefly,multicodecs-card"; + linein-type = <0x01>; + status = "okay"; + phandle = <0x49f>; + hp-con-gpio = <0x182 0x0b 0x00>; + firefly,not-use-dapm; + rockchip,mclk-fs = <0x180>; + }; + + spi@feb30000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x15d 0x15e 0x15f>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x149 0x04>; + clocks = <0x02 0xa6 0x02 0xa1>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfeb30000 0x00 0x1000>; + phandle = <0x2c8>; + dmas = <0xf1 0x11 0xf1 0x12>; + }; + + phy@fee80000 { + rockchip,pipe-grf = <0x76>; + clock-names = "pclk"; + rockchip,pcie30-phymode = <0x01>; + resets = <0x02 0x2000a>; + clocks = <0x02 0x188>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-pcie3-phy"; + status = "okay"; + reg = <0x00 0xfee80000 0x00 0x20000>; + phandle = <0x1b7>; + reset-names = "phy"; + rockchip,phy-grf = <0x1cc>; + }; + + vcc12v-dcin { + regulator-max-microvolt = <0xb71b00>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b00>; + regulator-name = "vcc12v_dcin"; + compatible = "regulator-fixed"; + phandle = <0x1cd>; + }; + + qos@fdf61200 { + compatible = "syscon"; + reg = <0x00 0xfdf61200 0x00 0x20>; + phandle = <0x91>; + }; + + i2s@fde00000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x234>; + assigned-clock-parents = <0x02 0x05>; + rockchip,capture-only; + resets = <0x02 0x417>; + interrupts = <0x00 0xbe 0x04>; + clocks = <0x02 0x237 0x02 0x237 0x02 0x233>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "disabled"; + reg = <0x00 0xfde00000 0x00 0x1000>; + phandle = <0x47e>; + dmas = <0xf2 0x18>; + reset-names = "rx-m"; + }; + + qos@fdf40800 { + compatible = "syscon"; + reg = <0x00 0xfdf40800 0x00 0x20>; + phandle = <0xa5>; + }; + + i2s@fddfc000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x23f>; + assigned-clock-parents = <0x02 0x05>; + rockchip,capture-only; + resets = <0x02 0x413>; + interrupts = <0x00 0xbd 0x04>; + clocks = <0x02 0x242 0x02 0x242 0x02 0x23e>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "disabled"; + reg = <0x00 0xfddfc000 0x00 0x1000>; + phandle = <0x27f>; + dmas = <0xf2 0x17>; + reset-names = "rx-m"; + }; + + usbdrd3_0 { + #address-cells = <0x02>; + clock-names = "ref\0suspend\0bus"; + clocks = <0x02 0x1a3 0x02 0x1a2 0x02 0x1a1>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + ranges; + status = "okay"; + phandle = <0x252>; + + usb@fc000000 { + power-domains = <0x60 0x1f>; + snps,dis-u1-entry-quirk; + snps,dis_enblslpm_quirk; + phy-names = "usb2-phy\0usb3-phy"; + snps,dis-u2-freeclk-exists-quirk; + usb-role-switch; + phy_type = "utmi_wide"; + quirk-skip-phy-init; + resets = <0x02 0x2a4>; + interrupts = <0x00 0xdc 0x04>; + snps,dis-u2-entry-quirk; + compatible = "snps,dwc3"; + snps,parkmode-disable-hs-quirk; + snps,dis-del-phy-power-chg-quirk; + status = "okay"; + snps,parkmode-disable-ss-quirk; + phys = <0x66 0x67>; + reg = <0x00 0xfc000000 0x00 0x400000>; + phandle = <0x253>; + dr_mode = "host"; + reset-names = "usb3-otg"; + snps,dis-tx-ipgap-linecheck-quirk; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + remote-endpoint = <0x68>; + reg = <0x00>; + phandle = <0x17d>; + }; + }; + }; + }; + + rkcif-mipi-lvds5-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x478>; + }; + + rkcif-dvp-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x51>; + phandle = <0x22a>; + }; + + iommu@fdd97e00 { + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x9c 0x04>; + clocks = <0x02 0x270 0x02 0x26f>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "vop_mmu"; + reg = <0x00 0xfdd97e00 0x00 0x100 0x00 0xfdd97f00 0x00 0x100>; + phandle = <0xd6>; + rockchip,disable-device-link-resume; + }; + + rkvtunnel { + compatible = "rockchip,video-tunnel"; + status = "disabled"; + phandle = <0x245>; + }; + + syscon@fd5e0000 { + compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; + reg = <0x00 0xfd5e0000 0x00 0x100>; + phandle = <0x18a>; + }; + + i2c@fead0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x14d>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb4 0x02 0xac>; + interrupts = <0x00 0x142 0x04>; + clocks = <0x02 0x91 0x02 0x89>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfead0000 0x00 0x1000>; + phandle = <0x2a8>; + reset-names = "i2c\0apb"; + }; + + iommu@fdba4800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x7b 0x04>; + clocks = <0x02 0x1ae 0x02 0x1af>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege1_mmu"; + reg = <0x00 0xfdba4800 0x00 0x40>; + phandle = <0xbe>; + }; + + spdif-rx@fde10000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x260>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x3ff>; + interrupts = <0x00 0xc8 0x04>; + clocks = <0x02 0x260 0x02 0x25f>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + status = "disabled"; + reg = <0x00 0xfde10000 0x00 0x1000>; + phandle = <0x47f>; + dmas = <0x7c 0x16>; + reset-names = "spdifrx-m"; + }; + + npu@fdab0000 { + power-domains = <0x60 0x09 0x60 0x0a 0x60 0x0b>; + iommus = <0xb2>; + clock-names = "clk_npu\0aclk0\0aclk1\0aclk2\0hclk0\0hclk1\0hclk2\0pclk"; + assigned-clocks = <0x0e 0x06>; + power-domain-names = "npu0\0npu1\0npu2"; + rknpu-supply = <0xb3>; + assigned-clock-rates = <0xbebc200>; + resets = <0x02 0x1e6 0x02 0x1b0 0x02 0x1c0 0x02 0x1e8 0x02 0x1b2 0x02 0x1c2>; + interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; + clocks = <0x0e 0x06 0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125 0x02 0x131>; + compatible = "rockchip,rk3588-rknpu"; + status = "okay"; + interrupt-names = "npu0_irq\0npu1_irq\0npu2_irq"; + mem-supply = <0xb3>; + reg = <0x00 0xfdab0000 0x00 0x10000 0x00 0xfdac0000 0x00 0x10000 0x00 0xfdad0000 0x00 0x10000>; + phandle = <0x265>; + reset-names = "srst_a0\0srst_a1\0srst_a2\0srst_h0\0srst_h1\0srst_h2"; + operating-points-v2 = <0xb1>; + }; + + hdmiphy@fed60000 { + clock-names = "ref\0apb"; + resets = <0x02 0x48e 0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d 0x02 0x48c 0x02 0x48d>; + clocks = <0x02 0x2b5 0x02 0x267>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy-hdmi"; + status = "okay"; + rockchip,grf = <0x18a>; + reg = <0x00 0xfed60000 0x00 0x2000>; + phandle = <0xfd>; + reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; + + clk-port { + #clock-cells = <0x00>; + status = "okay"; + phandle = <0x35>; + }; + }; + + dmc-opp-table { + nvmem-cells = <0x44 0x45 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,leakage-voltage-sel = <0x01 0x1f 0x00 0x20 0x2c 0x01 0x2d 0x39 0x02 0x3a 0xfe 0x03>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + phandle = <0x41>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,supported-hw; + + opp-1560000000 { + opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xadf34 0xadf34 0xb71b0>; + opp-hz = <0x00 0x5cfbb600>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xb1008 0xb1008 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb1008 0xb1008 0xb71b0>; + }; + + opp-j-m-1560000000 { + opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0x5cfbb600>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L3 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-j-m-528000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0x1f78a400>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-2750000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb1008 0xb1008 0xb71b0>; + opp-hz = <0x00 0xa3e9ab80>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-1068000000 { + opp-microvolt = <0xb1008 0xb1008 0xd59f8 0xb40dc 0xb40dc 0xb71b0>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-hz = <0x00 0x3fa86300>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; + opp-microvolt-L1 = <0xaae60 0xaae60 0xd59f8 0xadf34 0xadf34 0xb71b0>; + }; + + opp-j-m-2750000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0xa3e9ab80>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-528000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xd59f8 0xb1008 0xb1008 0xb71b0>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; + opp-hz = <0x00 0x1f78a400>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa4cb8 0xa4cb8 0xb71b0>; + opp-microvolt-L1 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; + }; + + opp-j-m-1068000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0x3fa86300>; + opp-supported-hw = <0x06 0xffff>; + }; + }; + + rkvenc-core@fdbe0000 { + power-domains = <0x60 0x11>; + iommus = <0xc5>; + rockchip,ccu = <0xc3>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; + assigned-clocks = <0x02 0x1ca 0x02 0x1cb>; + rockchip,task-capacity = <0x08>; + rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; + assigned-clock-rates = <0x1dcd6500 0x2faf0800>; + resets = <0x02 0x305 0x02 0x304 0x02 0x306>; + interrupts = <0x00 0x68 0x04>; + clocks = <0x02 0x1ca 0x02 0x1c9 0x02 0x1cb>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x07>; + compatible = "rockchip,rkv-encoder-v2-core"; + status = "okay"; + interrupt-names = "irq_rkvenc1"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbe0000 0x00 0x6000>; + phandle = <0x273>; + reset-names = "video_a\0video_h\0video_core"; + operating-points-v2 = <0xc4>; + }; + + debug@fd104000 { + compatible = "rockchip,debug"; + reg = <0x00 0xfd104000 0x00 0x1000 0x00 0xfd105000 0x00 0x1000 0x00 0xfd106000 0x00 0x1000 0x00 0xfd107000 0x00 0x1000 0x00 0xfd124000 0x00 0x1000 0x00 0xfd125000 0x00 0x1000 0x00 0xfd126000 0x00 0x1000 0x00 0xfd127000 0x00 0x1000>; + phandle = <0x48f>; + }; + + watchdog@feaf0000 { + clock-names = "tclk\0pclk"; + interrupts = <0x00 0x13b 0x04>; + clocks = <0x02 0x6c 0x02 0x6b>; + compatible = "snps,dw-wdt"; + status = "okay"; + reg = <0x00 0xfeaf0000 0x00 0x100>; + phandle = <0x2aa>; + }; + + syscon@fd5d8000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d8000 0x00 0x4000>; + phandle = <0x25d>; + + usb2-phy@8000 { + clock-output-names = "usb480m_phy2"; + clock-names = "phyclk"; + resets = <0x02 0xc0049 0x02 0x48a>; + interrupts = <0x00 0x187 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0x8000 0x10>; + phandle = <0x69>; + reset-names = "phy\0apb"; + + host-port { + phy-supply = <0x75>; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x6c>; + }; + }; + }; + + cluster0-opp-table { + rockchip,pvtm-offset = <0x64>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,dsu-grf = <0x23>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0x1f 0x20 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x555 0x00 0x556 0x56b 0x01 0x56c 0x581 0x02 0x582 0x597 0x03 0x598 0x5ad 0x04 0x5ae 0x5c3 0x05 0x5c4 0x270f 0x06>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,opp-shared-dsu; + rockchip,high-temp-max-freq = <0x188940>; + opp-shared; + rockchip,reboot-freq = <0x159b40>; + rockchip,pvtm-freq = <0x159b40>; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x22>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x582 0x00 0x583 0x59a 0x01 0x59b 0x5b2 0x02 0x5b3 0x5ca 0x03 0x5cb 0x5e2 0x04 0x5e3 0x5fa 0x05 0x5fb 0x270f 0x06>; + phandle = <0x0f>; + rockchip,pvtm-temp-prop = <0xf4 0xf4>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0xf6180>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-1200000000 { + opp-microvolt = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L2 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xe7ef0 0xa7d8c 0xa7d8c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; + }; + + opp-j-m-1416000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L2 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-microvolt-L0 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-supported-hw = <0x06 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + }; + + opp-1008000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1704000000 { + opp-microvolt = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-microvolt-L6 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + opp-microvolt-L4 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L2 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-hz = <0x00 0x6590fa00>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L5 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L3 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + }; + + opp-j-m-1200000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1008000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-816000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-1800000000 { + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L6 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L4 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L2 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L3 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-1608000000 { + opp-microvolt = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-microvolt-L6 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + }; + + opp-j-1296000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x4d3f6400>; + opp-microvolt-L0 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-supported-hw = <0x04 0xffff>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + }; + + opp-j-m-408000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1608000000 { + opp-microvolt = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L6 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L4 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + opp-microvolt-L2 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L5 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L3 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-1416000000 { + opp-microvolt = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-microvolt-L6 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; + opp-microvolt-L2 = <0xb40dc 0xb40dc 0xe7ef0 0xb40dc 0xb40dc 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-suspend; + opp-microvolt-L3 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + }; + + opp-408000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + }; + + vcc-4g-regulator { + regulator-boot-on; + gpio = <0x182 0x00 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_4g"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4b0>; + }; + + spi@fecb0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x187 0x188 0x189>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x14a 0x04>; + clocks = <0x02 0xa7 0x02 0xa2>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfecb0000 0x00 0x1000>; + phandle = <0x2e6>; + dmas = <0xf2 0x0d 0xf2 0x0e>; + }; + + spdif-rx@fde08000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x25e>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x3fd>; + interrupts = <0x00 0xc7 0x04>; + clocks = <0x02 0x25e 0x02 0x25d>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + status = "disabled"; + reg = <0x00 0xfde08000 0x00 0x1000>; + phandle = <0x280>; + dmas = <0x7c 0x15>; + reset-names = "spdifrx-m"; + }; + + mipi3-csi2-hw@fdd40000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x327>; + interrupts = <0x00 0x95 0x04 0x00 0x96 0x04>; + clocks = <0x02 0x1d2>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd40000 0x00 0x10000>; + phandle = <0x4a>; + reset-names = "srst_csihost_p"; + }; + + memory { + device_type = "memory"; + reg = <0x00 0x9400000 0x00 0xe6c00000 0x01 0x00 0x01 0x00 0x02 0xf0000000 0x00 0x10000000 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>; + }; + + jpege-core@fdba4000 { + power-domains = <0x60 0x15>; + iommus = <0xbe>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1ae>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2cc 0x02 0x2cd>; + interrupts = <0x00 0x7c 0x04>; + clocks = <0x02 0x1ae 0x02 0x1af>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege1"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdba4000 0x00 0x400>; + phandle = <0x26e>; + reset-names = "video_a\0video_h"; + }; + + wireless-wlan { + pinctrl-names = "default"; + pinctrl-0 = <0x1ea>; + WIFI,host_wake_irq = <0x182 0x0a 0x00>; + wifi_chip_type = "rtl8822ce"; + compatible = "wlan-platdata"; + status = "okay"; + phandle = <0x4ab>; + }; + + rkcif-mipi-lvds4-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x475>; + }; + + dp@fde50000 { + power-domains = <0x60 0x19>; + clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; + assigned-clocks = <0x02 0x2cc>; + assigned-clock-rates = <0xf42400>; + resets = <0x02 0x388>; + interrupts = <0x00 0xa1 0x04>; + clocks = <0x02 0x1e6 0x02 0x2cc 0x02 0x1fb 0x02 0x207 0x04 0x02 0x1ea>; + #sound-dai-cells = <0x01>; + compatible = "rockchip,rk3588-dp"; + status = "disabled"; + phys = <0xf6>; + reg = <0x00 0xfde50000 0x00 0x4000>; + phandle = <0x1d6>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x38>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe0>; + }; + + endpoint@2 { + remote-endpoint = <0xf8>; + status = "disabled"; + reg = <0x02>; + phandle = <0xe6>; + }; + + endpoint@0 { + remote-endpoint = <0xf7>; + status = "disabled"; + reg = <0x00>; + phandle = <0xda>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x286>; + }; + }; + }; + }; + + rockchip-system-monitor { + rockchip,thermal-zone = "soc-thermal"; + compatible = "rockchip,system-monitor"; + phandle = <0x247>; + }; + + vcc3v3-pcie30 { + regulator-max-microvolt = <0x325aa0>; + enable-active-high; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc3v3_pcie30"; + startup-delay-us = <0x1388>; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x1b8>; + vin-supply = <0x1cd>; + gpios = <0x182 0x04 0x00>; + }; + + phy@fedb0000 { + clock-names = "pclk\0ref"; + resets = <0x02 0xc0045 0x02 0x43 0x02 0x44 0x02 0xc0046>; + clocks = <0x02 0x109 0x02 0x2b6>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dcphy"; + status = "okay"; + rockchip,grf = <0x191>; + reg = <0x00 0xfedb0000 0x00 0x10000>; + phandle = <0x30>; + reset-names = "m_phy\0apb\0grf\0s_phy"; + }; + + rkvdec-core@fdc38000 { + power-domains = <0x60 0x0e>; + iommus = <0xc9>; + rockchip,ccu = <0xca>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; + reg-names = "regs\0link"; + assigned-clocks = <0x02 0x190 0x02 0x193 0x02 0x191 0x02 0x192>; + rockchip,core-mask = <0x10001>; + rockchip,task-capacity = <0x10>; + rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; + assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; + resets = <0x02 0x284 0x02 0x283 0x02 0x289 0x02 0x287 0x02 0x288>; + interrupts = <0x00 0x5f 0x04>; + rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; + clocks = <0x02 0x190 0x02 0x18f 0x02 0x193 0x02 0x191 0x02 0x192>; + rockchip,rcb-min-width = <0x200>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x09>; + compatible = "rockchip,rkv-decoder-v2"; + status = "okay"; + interrupt-names = "irq_rkvdec0"; + rockchip,skip-pmu-idle-request; + rockchip,rcb-iova = <0xfff00000 0x100000>; + reg = <0x00 0xfdc38100 0x00 0x400 0x00 0xfdc38000 0x00 0x100>; + phandle = <0x274>; + reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; + rockchip,sram = <0xcb>; + }; + + minidump { + smem-region = <0x1cf>; + minidump-region = <0x1d0>; + compatible = "rockchip,minidump"; + status = "disabled"; + phandle = <0x491>; + }; +}; diff --git a/configs/vms/arceos-aarch64.toml b/configs/vms/arceos-aarch64.toml index d2f87d93..bdcf16b9 100644 --- a/configs/vms/arceos-aarch64.toml +++ b/configs/vms/arceos-aarch64.toml @@ -2,7 +2,7 @@ # [base] # Guest vm id. -id = 1 +id = 2 # Guest vm name. name = "arceos" # Virtualization type. @@ -10,21 +10,21 @@ vm_type = 1 # The number of virtual CPUs. cpu_num = 1 # Guest vm physical cpu sets. -phys_cpu_sets = [1] +phys_cpu_sets = [2] # # Vm kernel configs # [kernel] # The entry point of the kernel image. -entry_point = 0x4008_0000 +entry_point = 0x4020_0000 # The location of image: "memory" | "fs". # Load from file system. -image_location = "fs" +image_location = "memory" # The file path of the kernel image. -kernel_path = "arceos-aarch64.bin" +kernel_path = "/home/hky/workspace/arceos/arceos/examples/ivc_tester/ivc_tester_aarch64-qemu-virt.bin" # The load address of the kernel image. -kernel_load_addr = 0x4008_0000 +kernel_load_addr = 0x4020_0000 ## Load from memory # image_location = "memory" ## The file path of the kernel image. @@ -50,6 +50,7 @@ emu_devices = [] passthrough_devices = [ ["intc@8000000", 0x800_0000, 0x800_0000, 0x50_000, 0x1], ["pl011@9000000", 0x900_0000, 0x900_0000, 0x1000, 0x1], + ["pl011@9040000", 0x904_0000, 0x904_0000, 0x1000, 0x1], ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], # a003000.virtio_mmio virtio_mmio@a003000 diff --git a/configs/vms/linux-qemu-aarch64.toml b/configs/vms/linux-qemu-aarch64.toml index c2674378..dbcb8121 100644 --- a/configs/vms/linux-qemu-aarch64.toml +++ b/configs/vms/linux-qemu-aarch64.toml @@ -22,11 +22,11 @@ entry_point = 0x8008_0000 # load from memory. image_location = "memory" # The file path of the kernel image. -kernel_path = "linux-6.6.62.bin" +kernel_path = "linux-5.10.198.bin" # The load address of the kernel image. kernel_load_addr = 0x8008_0000 # The file path of the device tree blob (DTB). -dtb_path = "linux-qemu.dtb" +dtb_path = "qemu_gicv3.dtb" # The load address of the device tree blob (DTB). dtb_load_addr = 0x8000_0000 @@ -47,7 +47,7 @@ dtb_load_addr = 0x8000_0000 # Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). # For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. memory_regions = [ - [0x8000_0000, 0x4000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL + # [0x8000_0000, 0x4000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL ] # @@ -56,13 +56,15 @@ memory_regions = [ [devices] # Pass-through devices. passthrough_devices = [ - ["intc@8000000", 0x800_0000, 0x800_0000, 0x50_000, 0x1], - ["pl011@9000000", 0x900_0000, 0x900_0000, 0x1000, 0x1], - ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], - ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], - # a003000.virtio_mmio virtio_mmio@a003000 - # a003200.virtio_mmio virtio_mmio@a003200 - ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], + # ["intc@8000000", 0x800_0000, 0x800_0000, 0x50_000, 0x1], + # ["pl011@9000000", 0x900_0000, 0x900_0000, 0x1000, 0x1], + # ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], + # ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], + # # a003000.virtio_mmio virtio_mmio@a003000 + # # a003200.virtio_mmio virtio_mmio@a003200 + # ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], + ["low-memory", 0x0, 0x0, 0x2000_0000, 0x1], + ["pci", 0x8000000000, 0x8000000000, 0x10000, 0x1], ] # Emu_devices. diff --git a/configs/vms/linux-rk3588-aarch64-smp.toml b/configs/vms/linux-rk3588-aarch64-smp.toml index a62e75a8..b91a14c3 100644 --- a/configs/vms/linux-rk3588-aarch64-smp.toml +++ b/configs/vms/linux-rk3588-aarch64-smp.toml @@ -19,18 +19,18 @@ phys_cpu_sets = [1, 2, 4, 8] # [kernel] # The entry point of the kernel image. -entry_point = 0x1008_0000 +entry_point = 0x1020_0000 # The load address of the kernel image. -kernel_load_addr = 0x1008_0000 +kernel_load_addr = 0x1020_0000 # The load address of the device tree blob (DTB). dtb_load_addr = 0x1000_0000 # The location of image: "memory" | "fs". # load from memory image_location = "memory" # The file path of the kernel image. -kernel_path = "/path/to/linux-aarch64.bin" +kernel_path = "Image.bin" # The file path of the device tree blob (DTB). -dtb_path = "/path/to/dtb" +dtb_path = "aio-rk3588-jd4.dtb" # load from file system. # image_location = "fs". @@ -50,7 +50,7 @@ dtb_path = "/path/to/dtb" # For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. memory_regions = [ # [0x0, 0x10_f000, 0x7, 1], # passthrough uncahed MAP_IDENTICAL - [0x940_0000, 0xe6c00000, 0x7, 1], # ram 3G MAP_IDENTICAL + # [0x940_0000, 0xe6c00000, 0x7, 1], # ram 3G MAP_IDENTICAL # [0x4000_0000, 0x4000_0000, 0x7, 1], # ram 1G MAP_IDENTICAL ] @@ -64,98 +64,4 @@ emu_devices = [] # Pass-through devices. # Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - [ - "ramoops", - 0x11_0000, - 0x11_0000, - 0xf_0000, - 0x17, - ], - [ - "sram", - 0x10_f000, - 0x10_f000, - 0x1000, - 0x17, - ], - [ - "gpu", - 0xfb00_0000, - 0xfb00_0000, - 0x20_0000, - 0x17, - ], - [ - "uart8250 UART", - 0xfd00_0000, - 0xfd00_0000, - 0x200_0000, - 0x17, - ], - [ - "usb", - 0xfc00_0000, - 0xfc00_0000, - 0x100_0000, - 0x17, - ], - [ - "uncached", - 0x0, - 0x0, - 0x10_f000, - 0x17, - ], - # [ - # "gicr", - # 0xfe68_0000, - # 0xfe68_0000, - # 0x10_0000, - # 0x1, - # ], - # [ - # "uncached", - # 0xf300_0000, - # 0xf300_0000, - # 0x100_0000, - # 0x17, - # ], - # [ - # "uncached", - # 0xf400_0000, - # 0xf400_0000, - # 0x100_0000, - # 0x17, - # ], - # [ - # "uncached", - # 0xa_4100_0000, - # 0xa_4100_0000, - # 0x40_0000, - # 0x17, - # ], - # [ - # "uncached", - # 0xa_40c0_0000, - # 0xa_40c0_0000, - # 0x40_0000, - # 0x17, - # ], - # [ - # "uncached", - # 0x920_0000, - # 0x920_0000, - # 0x20_0000, - # 0x17, - # ], -] - - -# [0xfe600000, 0x10000], # gic-v3 gicd -# [0xfe680000, 0x10_0000], # gic-v3 gicr - - # [0xa41000000, 0x400000], - # [0xa40c00000, 0x400000], - # [0xf4000000,0x1000000], - # [0xf3000000,0x1000000], \ No newline at end of file +passthrough_devices = [] diff --git a/configs/vms/qemu_gicv3.dts b/configs/vms/qemu_gicv3.dts new file mode 100644 index 00000000..73b3158f --- /dev/null +++ b/configs/vms/qemu_gicv3.dts @@ -0,0 +1,410 @@ +/dts-v1/; + +/ { + interrupt-parent = <0x8003>; + dma-coherent; + model = "linux,dummy-virt"; + #size-cells = <0x02>; + #address-cells = <0x02>; + compatible = "linux,dummy-virt"; + + psci { + migrate = <0xc4000005>; + cpu_on = <0xc4000003>; + cpu_off = <0x84000002>; + cpu_suspend = <0xc4000001>; + method = "smc"; + compatible = "arm,psci-1.0\0arm,psci-0.2\0arm,psci"; + }; + + memory@40000000 { + reg = <0x00 0x80000000 0x00 0x40000000>; + device_type = "memory"; + }; + + platform-bus@c000000 { + interrupt-parent = <0x8003>; + ranges = <0x00 0x00 0xc000000 0x2000000>; + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "qemu,platform\0simple-bus"; + }; + + fw-cfg@9020000 { + dma-coherent; + reg = <0x00 0x9020000 0x00 0x18>; + compatible = "qemu,fw-cfg-mmio"; + }; + + virtio_mmio@a000000 { + dma-coherent; + interrupts = <0x00 0x10 0x01>; + reg = <0x00 0xa000000 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000200 { + dma-coherent; + interrupts = <0x00 0x11 0x01>; + reg = <0x00 0xa000200 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000400 { + dma-coherent; + interrupts = <0x00 0x12 0x01>; + reg = <0x00 0xa000400 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000600 { + dma-coherent; + interrupts = <0x00 0x13 0x01>; + reg = <0x00 0xa000600 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000800 { + dma-coherent; + interrupts = <0x00 0x14 0x01>; + reg = <0x00 0xa000800 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000a00 { + dma-coherent; + interrupts = <0x00 0x15 0x01>; + reg = <0x00 0xa000a00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000c00 { + dma-coherent; + interrupts = <0x00 0x16 0x01>; + reg = <0x00 0xa000c00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000e00 { + dma-coherent; + interrupts = <0x00 0x17 0x01>; + reg = <0x00 0xa000e00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001000 { + dma-coherent; + interrupts = <0x00 0x18 0x01>; + reg = <0x00 0xa001000 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001200 { + dma-coherent; + interrupts = <0x00 0x19 0x01>; + reg = <0x00 0xa001200 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001400 { + dma-coherent; + interrupts = <0x00 0x1a 0x01>; + reg = <0x00 0xa001400 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001600 { + dma-coherent; + interrupts = <0x00 0x1b 0x01>; + reg = <0x00 0xa001600 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001800 { + dma-coherent; + interrupts = <0x00 0x1c 0x01>; + reg = <0x00 0xa001800 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001a00 { + dma-coherent; + interrupts = <0x00 0x1d 0x01>; + reg = <0x00 0xa001a00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001c00 { + dma-coherent; + interrupts = <0x00 0x1e 0x01>; + reg = <0x00 0xa001c00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001e00 { + dma-coherent; + interrupts = <0x00 0x1f 0x01>; + reg = <0x00 0xa001e00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002000 { + dma-coherent; + interrupts = <0x00 0x20 0x01>; + reg = <0x00 0xa002000 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002200 { + dma-coherent; + interrupts = <0x00 0x21 0x01>; + reg = <0x00 0xa002200 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002400 { + dma-coherent; + interrupts = <0x00 0x22 0x01>; + reg = <0x00 0xa002400 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002600 { + dma-coherent; + interrupts = <0x00 0x23 0x01>; + reg = <0x00 0xa002600 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002800 { + dma-coherent; + interrupts = <0x00 0x24 0x01>; + reg = <0x00 0xa002800 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002a00 { + dma-coherent; + interrupts = <0x00 0x25 0x01>; + reg = <0x00 0xa002a00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002c00 { + dma-coherent; + interrupts = <0x00 0x26 0x01>; + reg = <0x00 0xa002c00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002e00 { + dma-coherent; + interrupts = <0x00 0x27 0x01>; + reg = <0x00 0xa002e00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003000 { + dma-coherent; + interrupts = <0x00 0x28 0x01>; + reg = <0x00 0xa003000 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003200 { + dma-coherent; + interrupts = <0x00 0x29 0x01>; + reg = <0x00 0xa003200 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003400 { + dma-coherent; + interrupts = <0x00 0x2a 0x01>; + reg = <0x00 0xa003400 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003600 { + dma-coherent; + interrupts = <0x00 0x2b 0x01>; + reg = <0x00 0xa003600 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003800 { + dma-coherent; + interrupts = <0x00 0x2c 0x01>; + reg = <0x00 0xa003800 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003a00 { + dma-coherent; + interrupts = <0x00 0x2d 0x01>; + reg = <0x00 0xa003a00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003c00 { + dma-coherent; + interrupts = <0x00 0x2e 0x01>; + reg = <0x00 0xa003c00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003e00 { + dma-coherent; + interrupts = <0x00 0x2f 0x01>; + reg = <0x00 0xa003e00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + poweroff { + gpios = <0x8005 0x03 0x00>; + linux,code = <0x74>; + label = "GPIO Key Poweroff"; + }; + }; + + pl061@9030000 { + phandle = <0x8005>; + clock-names = "apb_pclk"; + clocks = <0x8000>; + interrupts = <0x00 0x07 0x04>; + gpio-controller; + #gpio-cells = <0x02>; + compatible = "arm,pl061\0arm,primecell"; + reg = <0x00 0x9030000 0x00 0x1000>; + }; + + pcie@10000000 { + interrupt-map-mask = <0x1800 0x00 0x00 0x07>; + interrupt-map = <0x00 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x03 0x04 0x00 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x04 0x04 0x00 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x05 0x04 0x00 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x04 0x04 0x800 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x05 0x04 0x800 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x05 0x04 0x1000 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x06 0x04 0x1000 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x06 0x04 0x1800 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x03 0x04 0x1800 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x05 0x04>; + #interrupt-cells = <0x01>; + ranges = <0x1000000 0x00 0x00 0x00 0x3eff0000 0x00 0x10000 0x2000000 0x00 0x10000000 0x00 0x10000000 0x00 0x2eff0000 0x3000000 0x80 0x00 0x80 0x00 0x80 0x00>; + reg = <0x40 0x10000000 0x00 0x10000000>; + msi-map = <0x00 0x8004 0x00 0x10000>; + dma-coherent; + bus-range = <0x00 0xff>; + linux,pci-domain = <0x00>; + #size-cells = <0x02>; + #address-cells = <0x03>; + device_type = "pci"; + compatible = "pci-host-ecam-generic"; + }; + + pl031@9010000 { + clock-names = "apb_pclk"; + clocks = <0x8000>; + interrupts = <0x00 0x02 0x04>; + reg = <0x00 0x9010000 0x00 0x1000>; + compatible = "arm,pl031\0arm,primecell"; + }; + + pl011@9000000 { + clock-names = "uartclk\0apb_pclk"; + clocks = <0x8000 0x8000>; + interrupts = <0x00 0x01 0x04>; + reg = <0x00 0x9000000 0x00 0x1000>; + compatible = "arm,pl011\0arm,primecell"; + }; + + pmu { + interrupts = <0x01 0x07 0x04>; + compatible = "arm,armv8-pmuv3"; + }; + + intc@8000000 { + phandle = <0x8003>; + interrupts = <0x01 0x09 0x04>; + reg = <0x00 0x8000000 0x00 0x10000 0x00 0x80a0000 0x00 0xf60000>; + #redistributor-regions = <0x01>; + compatible = "arm,gic-v3"; + ranges; + #size-cells = <0x02>; + #address-cells = <0x02>; + interrupt-controller; + #interrupt-cells = <0x03>; + + its@8080000 { + phandle = <0x8004>; + reg = <0x00 0x8080000 0x00 0x20000>; + #msi-cells = <0x01>; + msi-controller; + compatible = "arm,gic-v3-its"; + }; + }; + + flash@0 { + bank-width = <0x04>; + reg = <0x00 0x00 0x00 0x4000000 0x00 0x4000000 0x00 0x4000000>; + compatible = "cfi-flash"; + }; + + cpus { + #size-cells = <0x00>; + #address-cells = <0x01>; + + cpu-map { + + socket0 { + + cluster0 { + + core0 { + cpu = <0x8002>; + }; + + //core1 { + // cpu = <0x8001>; + //}; + }; + }; + }; + + cpu@0 { + phandle = <0x8002>; + reg = <0x00>; + enable-method = "psci"; + compatible = "arm,cortex-a57"; + device_type = "cpu"; + }; + + //cpu@1 { + // phandle = <0x8001>; + // reg = <0x01>; + // enable-method = "psci"; + // compatible = "arm,cortex-a57"; + // device_type = "cpu"; + //}; + }; + + timer { + interrupts = <0x01 0x0d 0x04 0x01 0x0e 0x04 0x01 0x0b 0x04 0x01 0x0a 0x04>; + always-on; + compatible = "arm,armv8-timer\0arm,armv7-timer"; + }; + + apb-pclk { + phandle = <0x8000>; + clock-output-names = "clk24mhz"; + clock-frequency = <0x16e3600>; + #clock-cells = <0x00>; + compatible = "fixed-clock"; + }; + + aliases { + serial0 = "/pl011@9000000"; + }; + + chosen { + bootargs = "earlycon console=ttyAMA0 root=/dev/vda rw audit=0 default_hugepagesz=32M hugepagesz=32M hugepages=4"; + stdout-path = "/pl011@9000000"; + rng-seed = <0x79361ef3 0x1a4e5964 0x9fb01da 0x749b376f 0x7036ec7c 0xdea25f0c 0x79d7ee4e 0xe2e216af>; + kaslr-seed = <0x2758c1 0xf528d3d5>; + }; +}; diff --git a/configs/vms/rk3588jd4.dts b/configs/vms/rk3588jd4.dts new file mode 100644 index 00000000..9f4eeb7a --- /dev/null +++ b/configs/vms/rk3588jd4.dts @@ -0,0 +1,13141 @@ +/dts-v1/; + +/ { + #address-cells = <0x02>; + model = "Firefly AIO-3588JD4"; + serial-number = "a0deeea630de3975"; + #size-cells = <0x02>; + interrupt-parent = <0x01>; + compatible = "rockchip,aio-3588jd4\0rockchip,rk3588"; + + pcie30-avdd1v8 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "pcie30_avdd1v8"; + compatible = "regulator-fixed"; + phandle = <0x4a6>; + vin-supply = <0x1de>; + }; + + syscon@fd5bc000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5bc000 0x00 0x100>; + phandle = <0x194>; + }; + + vcc5v0-host3 { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + gpio = <0x182 0x07 0x00>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_host3"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a2>; + vin-supply = <0x1dd>; + }; + + pwm@febd0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x16c>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04 0x00 0x15b 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebd0030 0x00 0x10>; + phandle = <0x2d4>; + }; + + rkisp@fdcc0000 { + power-domains = <0x60 0x1c>; + iommus = <0xd1>; + clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; + interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; + clocks = <0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; + compatible = "rockchip,rk3588-rkisp"; + status = "disabled"; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + reg = <0x00 0xfdcc0000 0x00 0x7f00>; + phandle = <0x5a>; + }; + + qos@fdf66600 { + compatible = "syscon"; + reg = <0x00 0xfdf66600 0x00 0x20>; + phandle = <0x96>; + }; + + serial@febb0000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x167>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x153 0x04>; + clocks = <0x02 0xd3 0x02 0xb2>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfebb0000 0x00 0x100>; + phandle = <0x2d0>; + dmas = <0xf2 0x09 0xf2 0x0a>; + reg-shift = <0x02>; + }; + + qos@fdf41000 { + compatible = "syscon"; + reg = <0x00 0xfdf41000 0x00 0x20>; + phandle = <0xa6>; + }; + + csi2-dcphy1 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x20e>; + }; + + rkispp0-vir0 { + rockchip,hw = <0x5b>; + compatible = "rockchip,rk3588-rkispp-vir"; + status = "disabled"; + phandle = <0x243>; + }; + + wireless-bluetooth { + pinctrl-names = "default\0rts_gpio"; + pinctrl-0 = <0x1e5 0x1e6 0x1e7 0x1e8>; + clock-names = "ext_clock"; + BT,power_gpio = <0x7b 0x16 0x00>; + clocks = <0x1e4>; + BT,wake_gpio = <0x7b 0x15 0x00>; + uart_rts_gpios = <0xfe 0x02 0x01>; + compatible = "bluetooth-platdata"; + BT,wake_host_irq = <0x7b 0x00 0x00>; + pinctrl-1 = <0x1e9>; + status = "disabled"; + phandle = <0x4aa>; + }; + + pwm@febd0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x16b>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebd0020 0x00 0x10>; + phandle = <0x2d3>; + }; + + qos@fdf39000 { + compatible = "syscon"; + reg = <0x00 0xfdf39000 0x00 0x20>; + phandle = <0xaf>; + }; + + cam0-cam1-switch { + regulator-max-microvolt = <0x1b7740>; + pinctrl-names = "default"; + regulator-boot-on; + gpio = <0x181 0x11 0x00>; + pinctrl-0 = <0x1f0>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "cam0_cam1_switch"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4b2>; + }; + + qos@fdf3e400 { + compatible = "syscon"; + reg = <0x00 0xfdf3e400 0x00 0x20>; + phandle = <0xad>; + }; + + mipi2-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "okay"; + firefly-compatible; + phandle = <0x226>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@0 { + remote-endpoint = <0x4d>; + reg = <0x00>; + phandle = <0x33>; + }; + }; + + port@1 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + + endpoint@0 { + remote-endpoint = <0x4e>; + reg = <0x00>; + phandle = <0x54>; + }; + }; + }; + }; + + iommu@fdc48700 { + power-domains = <0x60 0x0f>; + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x62 0x04>; + clocks = <0x02 0x195 0x02 0x194>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvdec1_mmu"; + reg = <0x00 0xfdc48700 0x00 0x40 0x00 0xfdc48740 0x00 0x40>; + phandle = <0xcc>; + rockchip,master-handle-irq; + }; + + clock-controller@fd7c0000 { + #reset-cells = <0x01>; + assigned-clocks = <0x02 0x09 0x02 0x05 0x02 0x08 0x02 0x07 0x02 0xd8 0x02 0xda 0x02 0xd9 0x02 0x10e 0x02 0x10f 0x02 0x110 0x02 0x299 0x02 0x29a 0x02 0x7b 0x02 0xec 0x02 0x114 0x02 0x208 0x02 0x20e 0x02 0x21f 0x02 0x77>; + assigned-clock-rates = <0x4190ab00 0x2ee00000 0x32a9f880 0x46cf7100 0x29d7ab80 0x17d78400 0x1dcd6500 0x2cb41780 0x5f5e100 0x17d78400 0x5f5e100 0xbebc200 0x165a0bc0 0x8f0d180 0xbebc200 0xb71b00 0xb71b00 0x5e69ec0 0x1312d00>; + #clock-cells = <0x01>; + compatible = "rockchip,rk3588-cru"; + rockchip,grf = <0x76>; + reg = <0x00 0xfd7c0000 0x00 0x5c000>; + phandle = <0x02>; + }; + + qos@fdf81000 { + compatible = "syscon"; + reg = <0x00 0xfdf81000 0x00 0x20>; + phandle = <0xa0>; + }; + + qos@fdf36000 { + compatible = "syscon"; + reg = <0x00 0xfdf36000 0x00 0x20>; + phandle = <0xaa>; + }; + + i2s@fe4a0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x132 0x133>; + pinctrl-0 = <0x12f 0x130>; + clock-names = "i2s_clk\0i2s_hclk"; + assigned-clocks = <0x02 0x2a>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xb7 0x04>; + clocks = <0x02 0x2d 0x02 0x23>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; + pinctrl-1 = <0x131>; + status = "disabled"; + reg = <0x00 0xfe4a0000 0x00 0x1000>; + phandle = <0x299>; + dmas = <0xf1 0x02 0xf1 0x03>; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd5c4000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5c4000 0x00 0x100>; + phandle = <0x195>; + }; + + sram@ff001000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "mmio-sram"; + ranges = <0x00 0x00 0xff001000 0xef000>; + reg = <0x00 0xff001000 0x00 0xef000>; + phandle = <0x2eb>; + + rkvdec-sram@0 { + reg = <0x00 0x78000>; + phandle = <0xcb>; + }; + + rkvdec-sram@78000 { + reg = <0x78000 0x77000>; + phandle = <0xcd>; + }; + }; + + uio@fe1c0000 { + compatible = "rockchip,uio-gmac"; + status = "disabled"; + reg = <0x00 0xfe1c0000 0x00 0x10000>; + phandle = <0x28e>; + rockchip,ethernet = <0x109>; + }; + + pwm@febd0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x16a>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "okay"; + reg = <0x00 0xfebd0010 0x00 0x10>; + phandle = <0x1ed>; + }; + + rkisp1-vir3 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x242>; + }; + + pcie-clk2 { + regulator-boot-on; + regulator-always-on; + regulator-name = "pcie_clk2"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x495>; + gpios = <0x181 0x16 0x01>; + }; + + serial@feb40000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x160>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14c 0x04>; + clocks = <0x02 0xb7 0x02 0xab>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "okay"; + reg = <0x00 0xfeb40000 0x00 0x100>; + phandle = <0x2c9>; + dmas = <0x7c 0x08 0x7c 0x09>; + reg-shift = <0x02>; + }; + + pinctrl { + #address-cells = <0x02>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-pinctrl"; + ranges; + rockchip,grf = <0x196>; + phandle = <0x197>; + + eth0 { + + eth0-pins { + rockchip,pins = <0x02 0x13 0x01 0x198>; + phandle = <0x46c>; + }; + }; + + i2c3 { + + i2c3m3-xfer { + rockchip,pins = <0x02 0x0a 0x09 0x19d 0x02 0x0b 0x09 0x19d>; + phandle = <0x361>; + }; + + i2c3m2-xfer { + rockchip,pins = <0x04 0x04 0x09 0x19d 0x04 0x05 0x09 0x19d>; + phandle = <0x14a>; + }; + + i2c3m1-xfer { + rockchip,pins = <0x03 0x0f 0x09 0x19d 0x03 0x10 0x09 0x19d>; + phandle = <0x35f>; + }; + + i2c3m0-xfer { + rockchip,pins = <0x01 0x11 0x09 0x19d 0x01 0x10 0x09 0x19d>; + phandle = <0x35e>; + }; + + i2c3m4-xfer { + rockchip,pins = <0x04 0x18 0x09 0x19d 0x04 0x19 0x09 0x19d>; + phandle = <0x360>; + }; + }; + + pwm9 { + + pwm9m2-pins { + rockchip,pins = <0x03 0x19 0x0b 0x198>; + phandle = <0x3d7>; + }; + + pwm9m1-pins { + rockchip,pins = <0x04 0x19 0x0b 0x198>; + phandle = <0x3d6>; + }; + + pwm9m0-pins { + rockchip,pins = <0x03 0x08 0x0b 0x198>; + phandle = <0x16e>; + }; + }; + + pcfg-pull-none-drv-level-7 { + drive-strength = <0x07>; + bias-disable; + phandle = <0x451>; + }; + + mipi { + + mipi-te1 { + rockchip,pins = <0x03 0x13 0x02 0x198>; + phandle = <0x39f>; + }; + + mipim1-camera2-clk { + rockchip,pins = <0x03 0x07 0x04 0x198>; + phandle = <0x39b>; + }; + + mipim0-camera0-clk { + rockchip,pins = <0x04 0x09 0x01 0x198>; + phandle = <0x395>; + }; + + mipim0-camera4-clk { + rockchip,pins = <0x01 0x1f 0x02 0x198>; + phandle = <0x399>; + }; + + mipim1-camera3-clk { + rockchip,pins = <0x03 0x08 0x04 0x198>; + phandle = <0x39c>; + }; + + mipim0-camera1-clk { + rockchip,pins = <0x01 0x0e 0x02 0x198>; + phandle = <0x396>; + }; + + mipim1-camera0-clk { + rockchip,pins = <0x03 0x05 0x04 0x198>; + phandle = <0x39a>; + }; + + mipim1-camera4-clk { + rockchip,pins = <0x03 0x09 0x04 0x198>; + phandle = <0x39d>; + }; + + mipim0-camera2-clk { + rockchip,pins = <0x01 0x0f 0x02 0x198>; + phandle = <0x397>; + }; + + mipi-te0 { + rockchip,pins = <0x03 0x12 0x02 0x198>; + phandle = <0x39e>; + }; + + mipim1-camera1-clk { + rockchip,pins = <0x03 0x06 0x04 0x198>; + phandle = <0x180>; + }; + + mipim0-camera3-clk { + rockchip,pins = <0x01 0x1e 0x02 0x198>; + phandle = <0x398>; + }; + }; + + pwm14 { + + pwm14m2-pins { + rockchip,pins = <0x01 0x1e 0x0b 0x198>; + phandle = <0x3e1>; + }; + + pwm14m1-pins { + rockchip,pins = <0x04 0x0a 0x0b 0x198>; + phandle = <0x3e0>; + }; + + pwm14m0-pins { + rockchip,pins = <0x03 0x12 0x0b 0x198>; + phandle = <0x173>; + }; + }; + + pcfg-pull-none-drv-level-4-smt { + drive-strength = <0x04>; + bias-disable; + input-schmitt-enable; + phandle = <0x303>; + }; + + headphone { + + hp-det { + rockchip,pins = <0x02 0x13 0x00 0x198>; + phandle = <0x1dc>; + }; + }; + + npu { + + npu-pins { + rockchip,pins = <0x00 0x16 0x02 0x198>; + phandle = <0x3a0>; + }; + }; + + wireless-bluetooth { + + bt-reset-gpio { + rockchip,pins = <0x00 0x16 0x00 0x198>; + phandle = <0x1e6>; + }; + + bt-irq-gpio { + rockchip,pins = <0x00 0x00 0x00 0x198>; + phandle = <0x1e8>; + }; + + bt-wake-gpio { + rockchip,pins = <0x00 0x15 0x00 0x198>; + phandle = <0x1e7>; + }; + + uart6-gpios { + rockchip,pins = <0x01 0x02 0x00 0x198>; + phandle = <0x1e9>; + }; + }; + + pcie30x1 { + + pcie30x1-1-button-rstn { + rockchip,pins = <0x04 0x0a 0x04 0x198>; + phandle = <0x3a9>; + }; + + pcie30x1m1-pins { + rockchip,pins = <0x04 0x03 0x04 0x198 0x04 0x05 0x04 0x198 0x04 0x04 0x04 0x198 0x04 0x00 0x04 0x198 0x04 0x02 0x04 0x198 0x04 0x01 0x04 0x198>; + phandle = <0x3a6>; + }; + + pcie30x1m0-pins { + rockchip,pins = <0x00 0x10 0x0c 0x198 0x00 0x15 0x0c 0x198 0x00 0x14 0x0c 0x198 0x00 0x0d 0x0c 0x198 0x00 0x0f 0x0c 0x198 0x00 0x0e 0x0c 0x198>; + phandle = <0x3a5>; + }; + + pcie30x1-0-button-rstn { + rockchip,pins = <0x04 0x09 0x04 0x198>; + phandle = <0x3a8>; + }; + + pcie30x1m2-pins { + rockchip,pins = <0x01 0x0d 0x04 0x198 0x01 0x0c 0x04 0x198 0x01 0x0b 0x04 0x198 0x01 0x00 0x04 0x198 0x01 0x07 0x04 0x198 0x01 0x01 0x04 0x198>; + phandle = <0x3a7>; + }; + }; + + uart8 { + + uart8m0-rtsn { + rockchip,pins = <0x04 0x0a 0x0a 0x198>; + phandle = <0x443>; + }; + + uart8m1-ctsn { + rockchip,pins = <0x03 0x05 0x0a 0x198>; + phandle = <0x444>; + }; + + uart8m0-ctsn { + rockchip,pins = <0x04 0x0b 0x0a 0x198>; + phandle = <0x442>; + }; + + uart8m1-xfer { + rockchip,pins = <0x03 0x03 0x0a 0x19e 0x03 0x02 0x0a 0x19e>; + phandle = <0x167>; + }; + + uart8m0-xfer { + rockchip,pins = <0x04 0x09 0x0a 0x19e 0x04 0x08 0x0a 0x19e>; + phandle = <0x441>; + }; + + uart8-xfer { + rockchip,pins = <0x04 0x09 0x0a 0x19e>; + phandle = <0x446>; + }; + + uart8m1-rtsn { + rockchip,pins = <0x03 0x04 0x0a 0x198>; + phandle = <0x445>; + }; + }; + + spi2 { + + spi2m0-cs1 { + rockchip,pins = <0x01 0x08 0x08 0x19a>; + phandle = <0x404>; + }; + + spi2m2-cs0 { + rockchip,pins = <0x00 0x09 0x01 0x19f>; + phandle = <0x154>; + }; + + spi2m1-cs1 { + rockchip,pins = <0x04 0x08 0x08 0x19a>; + phandle = <0x407>; + }; + + spi2m2-pins { + rockchip,pins = <0x00 0x05 0x01 0x19f 0x00 0x0b 0x01 0x19f 0x00 0x06 0x01 0x19f>; + phandle = <0x155>; + }; + + spi2m1-pins { + rockchip,pins = <0x04 0x06 0x08 0x19a 0x04 0x04 0x08 0x19a 0x04 0x05 0x08 0x19a>; + phandle = <0x405>; + }; + + spi2m2-cs1 { + rockchip,pins = <0x00 0x08 0x01 0x19f>; + phandle = <0x408>; + }; + + spi2m0-cs0 { + rockchip,pins = <0x01 0x07 0x08 0x19a>; + phandle = <0x403>; + }; + + spi2m0-pins { + rockchip,pins = <0x01 0x06 0x08 0x19a 0x01 0x04 0x08 0x19a 0x01 0x05 0x08 0x19a>; + phandle = <0x402>; + }; + + spi2m1-cs0 { + rockchip,pins = <0x04 0x07 0x08 0x19a>; + phandle = <0x406>; + }; + }; + + pcfg-pull-up-drv-level-15 { + drive-strength = <0x0f>; + phandle = <0x462>; + bias-pull-up; + }; + + pcfg-pull-down-drv-level-13 { + drive-strength = <0x0d>; + bias-pull-down; + phandle = <0x469>; + }; + + pcfg-pull-up-drv-level-2 { + drive-strength = <0x02>; + phandle = <0x199>; + bias-pull-up; + }; + + i2s1 { + + i2s1m0-sdo1 { + rockchip,pins = <0x04 0x0a 0x03 0x198>; + phandle = <0x127>; + }; + + i2s1m1-sdi1 { + rockchip,pins = <0x00 0x16 0x01 0x198>; + phandle = <0x380>; + }; + + i2s1m0-sdi3 { + rockchip,pins = <0x04 0x08 0x03 0x198>; + phandle = <0x125>; + }; + + i2s1m0-mclk { + rockchip,pins = <0x04 0x00 0x03 0x19d>; + phandle = <0x37b>; + }; + + i2s1m0-sdi1 { + rockchip,pins = <0x04 0x06 0x03 0x198>; + phandle = <0x123>; + }; + + i2s1m1-sdo2 { + rockchip,pins = <0x00 0x1c 0x01 0x198>; + phandle = <0x385>; + }; + + i2s1m1-sdo0 { + rockchip,pins = <0x00 0x19 0x01 0x198>; + phandle = <0x383>; + }; + + i2s1m0-sdo2 { + rockchip,pins = <0x04 0x0b 0x03 0x198>; + phandle = <0x128>; + }; + + i2s1m1-sdi2 { + rockchip,pins = <0x00 0x17 0x01 0x198>; + phandle = <0x381>; + }; + + i2s1m0-sdo0 { + rockchip,pins = <0x04 0x09 0x03 0x198>; + phandle = <0x126>; + }; + + i2s1m1-sdi0 { + rockchip,pins = <0x00 0x15 0x01 0x198>; + phandle = <0x37f>; + }; + + i2s1m0-sdi2 { + rockchip,pins = <0x04 0x07 0x03 0x198>; + phandle = <0x124>; + }; + + i2s1m1-sclk { + rockchip,pins = <0x00 0x0e 0x01 0x19d>; + phandle = <0x37e>; + }; + + i2s1m0-sdi0 { + rockchip,pins = <0x04 0x05 0x03 0x198>; + phandle = <0x122>; + }; + + i2s1m1-sdo3 { + rockchip,pins = <0x00 0x1d 0x01 0x198>; + phandle = <0x386>; + }; + + i2s1m1-lrck { + rockchip,pins = <0x00 0x0f 0x01 0x19d>; + phandle = <0x37c>; + }; + + i2s1m0-sclk { + rockchip,pins = <0x04 0x01 0x03 0x19d>; + phandle = <0x121>; + }; + + i2s1m1-sdo1 { + rockchip,pins = <0x00 0x1a 0x01 0x198>; + phandle = <0x384>; + }; + + i2s1m0-sdo3 { + rockchip,pins = <0x04 0x0c 0x03 0x198>; + phandle = <0x129>; + }; + + i2s1m1-sdi3 { + rockchip,pins = <0x00 0x18 0x01 0x198>; + phandle = <0x382>; + }; + + i2s1m0-lrck { + rockchip,pins = <0x04 0x02 0x03 0x19d>; + phandle = <0x120>; + }; + + i2s1m1-mclk { + rockchip,pins = <0x00 0x0d 0x01 0x19d>; + phandle = <0x37d>; + }; + }; + + ddrphych2 { + + ddrphych2-pins { + rockchip,pins = <0x04 0x08 0x07 0x198 0x04 0x09 0x07 0x198 0x04 0x0a 0x07 0x198 0x04 0x0b 0x07 0x198>; + phandle = <0x31a>; + }; + }; + + pcfg-pull-none-drv-level-12 { + drive-strength = <0x0c>; + bias-disable; + phandle = <0x456>; + }; + + i2c1 { + + i2c1m2-xfer { + rockchip,pins = <0x00 0x1c 0x09 0x19d 0x00 0x1d 0x09 0x19d>; + phandle = <0x148>; + }; + + i2c1m1-xfer { + rockchip,pins = <0x00 0x08 0x02 0x19d 0x00 0x09 0x02 0x19d>; + phandle = <0x357>; + }; + + i2c1m0-xfer { + rockchip,pins = <0x00 0x0d 0x09 0x19d 0x00 0x0e 0x09 0x19d>; + phandle = <0x356>; + }; + + i2c1m4-xfer { + rockchip,pins = <0x01 0x1a 0x09 0x19d 0x01 0x1b 0x09 0x19d>; + phandle = <0x359>; + }; + + i2c1m3-xfer { + rockchip,pins = <0x02 0x1c 0x09 0x19d 0x02 0x1d 0x09 0x19d>; + phandle = <0x358>; + }; + }; + + pwm7 { + + pwm7m3-pins { + rockchip,pins = <0x04 0x16 0x0b 0x198>; + phandle = <0x3d3>; + }; + + pwm7m2-pins { + rockchip,pins = <0x01 0x13 0x0b 0x198>; + phandle = <0x3d2>; + }; + + pwm7m1-pins { + rockchip,pins = <0x04 0x1c 0x0b 0x198>; + phandle = <0x3d1>; + }; + + pwm7m0-pins { + rockchip,pins = <0x00 0x18 0x0b 0x198>; + phandle = <0x16c>; + }; + }; + + pcfg-pull-none-drv-level-5 { + drive-strength = <0x05>; + bias-disable; + phandle = <0x2f1>; + }; + + gmac0 { + + gmac0-clkinout { + rockchip,pins = <0x04 0x13 0x01 0x198>; + phandle = <0x46d>; + }; + + gmac0-miim { + rockchip,pins = <0x04 0x14 0x01 0x198 0x04 0x15 0x01 0x198>; + phandle = <0x1c1>; + }; + + gmac0-tx-bus2 { + rockchip,pins = <0x02 0x0e 0x01 0x19a 0x02 0x0f 0x01 0x19a 0x02 0x10 0x01 0x198>; + phandle = <0x1c2>; + }; + + gmac0-rgmii-bus { + rockchip,pins = <0x02 0x06 0x01 0x198 0x02 0x07 0x01 0x198 0x02 0x09 0x01 0x19a 0x02 0x0a 0x01 0x19a>; + phandle = <0x1c5>; + }; + + gmac0-ppsclk { + rockchip,pins = <0x02 0x14 0x01 0x198>; + phandle = <0x46e>; + }; + + gmac0-txer { + rockchip,pins = <0x04 0x16 0x01 0x198>; + phandle = <0x471>; + }; + + gmac0-ptp-refclk { + rockchip,pins = <0x02 0x0c 0x01 0x198>; + phandle = <0x470>; + }; + + gmac0-rx-bus2 { + rockchip,pins = <0x02 0x11 0x01 0x198 0x02 0x12 0x01 0x198 0x04 0x12 0x01 0x198>; + phandle = <0x1c3>; + }; + + gmac0-rgmii-clk { + rockchip,pins = <0x02 0x08 0x01 0x198 0x02 0x0b 0x01 0x198>; + phandle = <0x1c4>; + }; + + gmac0-ppstring { + rockchip,pins = <0x02 0x0d 0x01 0x198>; + phandle = <0x46f>; + }; + }; + + pwm12 { + + pwm12m1-pins { + rockchip,pins = <0x04 0x0d 0x0b 0x198>; + phandle = <0x3dd>; + }; + + pwm12m0-pins { + rockchip,pins = <0x03 0x0d 0x0b 0x198>; + phandle = <0x171>; + }; + }; + + usb-typec { + + usbc0-int { + rockchip,pins = <0x00 0x1b 0x00 0x198>; + phandle = <0x17b>; + }; + + usb-5v-ctrl { + rockchip,pins = <0x01 0x03 0x00 0x198>; + phandle = <0x1ef>; + }; + }; + + uart6 { + + uart6m1-ctsn { + rockchip,pins = <0x01 0x03 0x0a 0x198>; + phandle = <0x436>; + }; + + uart6m2-xfer { + rockchip,pins = <0x01 0x19 0x0a 0x19e 0x01 0x18 0x0a 0x19e>; + phandle = <0x437>; + }; + + uart6m0-ctsn { + rockchip,pins = <0x02 0x09 0x0a 0x198>; + phandle = <0x439>; + }; + + uart6m1-xfer { + rockchip,pins = <0x01 0x00 0x0a 0x19e 0x01 0x01 0x0a 0x19e>; + phandle = <0x165>; + }; + + uart6m0-xfer { + rockchip,pins = <0x02 0x06 0x0a 0x19e 0x02 0x07 0x0a 0x19e>; + phandle = <0x438>; + }; + + uart6m1-rtsn { + rockchip,pins = <0x01 0x02 0x0a 0x198>; + phandle = <0x1e5>; + }; + + uart6m0-rtsn { + rockchip,pins = <0x02 0x08 0x0a 0x198>; + phandle = <0x43a>; + }; + }; + + pcfg-pull-down-drv-level-8 { + drive-strength = <0x08>; + bias-pull-down; + phandle = <0x464>; + }; + + gpu { + + gpu-pins { + rockchip,pins = <0x00 0x15 0x02 0x198>; + phandle = <0x333>; + }; + }; + + spi0 { + + spi0m2-cs1 { + rockchip,pins = <0x01 0x0d 0x08 0x19a>; + phandle = <0x3f8>; + }; + + spi0m0-cs0 { + rockchip,pins = <0x00 0x19 0x08 0x19a>; + phandle = <0x14e>; + }; + + spi0m3-pins { + rockchip,pins = <0x03 0x1b 0x08 0x19a 0x03 0x19 0x08 0x19a 0x03 0x1a 0x08 0x19a>; + phandle = <0x3f9>; + }; + + spi0m3-cs1 { + rockchip,pins = <0x03 0x1d 0x08 0x19a>; + phandle = <0x3fb>; + }; + + spi0m2-pins { + rockchip,pins = <0x01 0x0b 0x08 0x19a 0x01 0x09 0x08 0x19a 0x01 0x0a 0x08 0x19a>; + phandle = <0x3f6>; + }; + + spi0m1-cs0 { + rockchip,pins = <0x04 0x0a 0x08 0x19a>; + phandle = <0x3f4>; + }; + + spi0m1-pins { + rockchip,pins = <0x04 0x02 0x08 0x19a 0x04 0x00 0x08 0x19a 0x04 0x01 0x08 0x19a>; + phandle = <0x3f3>; + }; + + spi0m0-cs1 { + rockchip,pins = <0x00 0x0f 0x08 0x19a>; + phandle = <0x14f>; + }; + + spi0m2-cs0 { + rockchip,pins = <0x01 0x0c 0x08 0x19a>; + phandle = <0x3f7>; + }; + + spi0m0-pins { + rockchip,pins = <0x00 0x16 0x08 0x19a 0x00 0x17 0x08 0x19a 0x00 0x10 0x08 0x19a>; + phandle = <0x150>; + }; + + spi0m1-cs1 { + rockchip,pins = <0x04 0x09 0x08 0x19a>; + phandle = <0x3f5>; + }; + + spi0m3-cs0 { + rockchip,pins = <0x03 0x1c 0x08 0x19a>; + phandle = <0x3fa>; + }; + }; + + fspi { + + fspim0-cs1 { + rockchip,pins = <0x02 0x1f 0x02 0x199>; + phandle = <0x329>; + }; + + fspim1-pins { + rockchip,pins = <0x02 0x0b 0x03 0x199 0x02 0x0c 0x03 0x199 0x02 0x06 0x03 0x199 0x02 0x07 0x03 0x199 0x02 0x08 0x03 0x199 0x02 0x09 0x03 0x199>; + phandle = <0x32c>; + }; + + fspim0-pins { + rockchip,pins = <0x02 0x00 0x02 0x199 0x02 0x1e 0x02 0x199 0x02 0x18 0x02 0x199 0x02 0x19 0x02 0x199 0x02 0x1a 0x02 0x199 0x02 0x1b 0x02 0x199>; + phandle = <0x328>; + }; + + fspim1-cs1 { + rockchip,pins = <0x02 0x0d 0x03 0x199>; + phandle = <0x32d>; + }; + + fspim2-cs1 { + rockchip,pins = <0x03 0x15 0x02 0x199>; + phandle = <0x32b>; + }; + + fspim2-pins { + rockchip,pins = <0x03 0x05 0x05 0x199 0x03 0x14 0x02 0x199 0x03 0x00 0x05 0x199 0x03 0x01 0x05 0x199 0x03 0x02 0x05 0x199 0x03 0x03 0x05 0x199>; + phandle = <0x32a>; + }; + }; + + pcfg-pull-up-drv-level-13 { + drive-strength = <0x0d>; + phandle = <0x460>; + bias-pull-up; + }; + + clk32k { + + clk32k-out0 { + rockchip,pins = <0x00 0x0a 0x02 0x198>; + phandle = <0x315>; + }; + + clk32k-in { + rockchip,pins = <0x00 0x0a 0x01 0x198>; + phandle = <0x314>; + }; + + clk32k-out1 { + rockchip,pins = <0x02 0x15 0x01 0x198>; + phandle = <0x316>; + }; + }; + + pcfg-pull-down-drv-level-11 { + drive-strength = <0x0b>; + bias-pull-down; + phandle = <0x467>; + }; + + pcie30phy { + + pcie30phy-pins { + rockchip,pins = <0x01 0x14 0x04 0x198 0x01 0x19 0x04 0x198>; + phandle = <0x3a4>; + }; + }; + + pcfg-pull-up-drv-level-0 { + drive-strength = <0x00>; + phandle = <0x2f3>; + bias-pull-up; + }; + + ddrphych0 { + + ddrphych0-pins { + rockchip,pins = <0x04 0x00 0x07 0x198 0x04 0x01 0x07 0x198 0x04 0x02 0x07 0x198 0x04 0x03 0x07 0x198>; + phandle = <0x318>; + }; + }; + + pcfg-pull-none-drv-level-10 { + drive-strength = <0x0a>; + bias-disable; + phandle = <0x454>; + }; + + pwm5 { + + pwm5m2-pins { + rockchip,pins = <0x04 0x14 0x0b 0x198>; + phandle = <0x3ce>; + }; + + pwm5m1-pins { + rockchip,pins = <0x00 0x16 0x0b 0x198>; + phandle = <0x16a>; + }; + + pwm5m0-pins { + rockchip,pins = <0x00 0x09 0x03 0x198>; + phandle = <0x3cd>; + }; + }; + + pcfg-pull-none-drv-level-3 { + drive-strength = <0x03>; + bias-disable; + phandle = <0x2ef>; + }; + + pwm10 { + + pwm10m2-pins { + rockchip,pins = <0x03 0x1b 0x0b 0x198>; + phandle = <0x3d9>; + }; + + pwm10m1-pins { + rockchip,pins = <0x04 0x1b 0x0b 0x198>; + phandle = <0x3d8>; + }; + + pwm10m0-pins { + rockchip,pins = <0x03 0x00 0x0b 0x198>; + phandle = <0x16f>; + }; + }; + + pcfg-pull-down-smt { + input-schmitt-enable; + bias-pull-down; + phandle = <0x2ff>; + }; + + gpio@fec50000 { + gpio-controller; + interrupts = <0x00 0x119 0x04>; + clocks = <0x02 0x83 0x02 0x84>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec50000 0x00 0x100>; + phandle = <0x10d>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x80 0x20>; + interrupt-controller; + }; + + pcfg-pull-down { + bias-pull-down; + phandle = <0x2ec>; + }; + + uart4 { + + uart4m2-xfer { + rockchip,pins = <0x01 0x0a 0x0a 0x19e 0x01 0x0b 0x0a 0x19e>; + phandle = <0x42d>; + }; + + uart4-ctsn { + rockchip,pins = <0x01 0x17 0x0a 0x198>; + phandle = <0x42e>; + }; + + uart4m1-xfer { + rockchip,pins = <0x03 0x18 0x0a 0x19e 0x03 0x19 0x0a 0x19e>; + phandle = <0x163>; + }; + + uart4m0-xfer { + rockchip,pins = <0x01 0x1b 0x0a 0x19e 0x01 0x1a 0x0a 0x19e>; + phandle = <0x42c>; + }; + + uart4-rtsn { + rockchip,pins = <0x01 0x15 0x0a 0x198>; + phandle = <0x42f>; + }; + }; + + spdif0 { + + spdif0m0-tx { + rockchip,pins = <0x01 0x0e 0x03 0x198>; + phandle = <0x142>; + }; + + spdif0m1-tx { + rockchip,pins = <0x04 0x0c 0x06 0x198>; + phandle = <0x3f0>; + }; + }; + + pcfg-pull-down-drv-level-6 { + drive-strength = <0x06>; + bias-pull-down; + phandle = <0x2fd>; + }; + + pcfg-pull-up-drv-level-9 { + drive-strength = <0x09>; + phandle = <0x45c>; + bias-pull-up; + }; + + pcfg-pull-none-drv-level-1-smt { + drive-strength = <0x01>; + bias-disable; + input-schmitt-enable; + phandle = <0x19c>; + }; + + pcfg-pull-up-drv-level-11 { + drive-strength = <0x0b>; + phandle = <0x45e>; + bias-pull-up; + }; + + mcu { + + mcum1-pins { + rockchip,pins = <0x03 0x1c 0x06 0x198 0x03 0x1d 0x06 0x198>; + phandle = <0x394>; + }; + + mcum0-pins { + rockchip,pins = <0x04 0x1c 0x05 0x198 0x04 0x1d 0x05 0x198>; + phandle = <0x393>; + }; + }; + + i2c8 { + + i2c8m4-xfer { + rockchip,pins = <0x03 0x12 0x09 0x19d 0x03 0x13 0x09 0x19d>; + phandle = <0x373>; + }; + + i2c8m3-xfer { + rockchip,pins = <0x04 0x10 0x09 0x19d 0x04 0x11 0x09 0x19d>; + phandle = <0x372>; + }; + + i2c8m2-xfer { + rockchip,pins = <0x01 0x1e 0x09 0x19d 0x01 0x1f 0x09 0x19d>; + phandle = <0x371>; + }; + + i2c8m1-xfer { + rockchip,pins = <0x02 0x08 0x09 0x19d 0x02 0x09 0x09 0x19d>; + phandle = <0x374>; + }; + + i2c8m0-xfer { + rockchip,pins = <0x04 0x1a 0x09 0x19d 0x04 0x1b 0x09 0x19d>; + phandle = <0x186>; + }; + }; + + dp0 { + + dp0m0-pins { + rockchip,pins = <0x04 0x0c 0x05 0x198>; + phandle = <0x31c>; + }; + + dp0m2-pins { + rockchip,pins = <0x01 0x00 0x05 0x198>; + phandle = <0x31e>; + }; + + dp0m1-pins { + rockchip,pins = <0x00 0x14 0x0a 0x198>; + phandle = <0x31d>; + }; + }; + + pcfg-pull-none-drv-level-5-smt { + drive-strength = <0x05>; + bias-disable; + input-schmitt-enable; + phandle = <0x19b>; + }; + + pwm3 { + + pwm3m2-pins { + rockchip,pins = <0x01 0x12 0x0b 0x198>; + phandle = <0x3ca>; + }; + + pwm3m1-pins { + rockchip,pins = <0x03 0x0a 0x0b 0x198>; + phandle = <0x3c9>; + }; + + pwm3m0-pins { + rockchip,pins = <0x00 0x1c 0x03 0x198>; + phandle = <0x81>; + }; + + pwm3m3-pins { + rockchip,pins = <0x01 0x07 0x0b 0x198>; + phandle = <0x3cb>; + }; + }; + + pcfg-pull-none-drv-level-1 { + drive-strength = <0x01>; + bias-disable; + phandle = <0x2ee>; + }; + + sata2 { + + sata2m1-pins { + rockchip,pins = <0x01 0x0f 0x06 0x198>; + phandle = <0x3ed>; + }; + + sata2m0-pins { + rockchip,pins = <0x04 0x09 0x06 0x198>; + phandle = <0x3ec>; + }; + }; + + cam { + + cam0-or-cam1-switch-pin { + rockchip,pins = <0x03 0x11 0x00 0x198>; + phandle = <0x1f0>; + }; + }; + + uart2 { + + uart2-rtsn { + rockchip,pins = <0x03 0x0b 0x0a 0x198>; + phandle = <0x427>; + }; + + uart2m1-xfer { + rockchip,pins = <0x04 0x19 0x0a 0x19e 0x04 0x18 0x0a 0x19e>; + phandle = <0x161>; + }; + + uart2m0-xfer { + rockchip,pins = <0x00 0x0e 0x0a 0x19e 0x00 0x0d 0x0a 0x19e>; + phandle = <0x1ce>; + }; + + uart2-ctsn { + rockchip,pins = <0x03 0x0c 0x0a 0x198>; + phandle = <0x426>; + }; + + uart2m2-xfer { + rockchip,pins = <0x03 0x0a 0x0a 0x19e 0x03 0x09 0x0a 0x19e>; + phandle = <0x425>; + }; + }; + + pcfg-pull-down-drv-level-4 { + drive-strength = <0x04>; + bias-pull-down; + phandle = <0x2fb>; + }; + + pcfg-pull-up-drv-level-7 { + drive-strength = <0x07>; + phandle = <0x45a>; + bias-pull-up; + }; + + i2c6 { + + i2c6m4-xfer { + rockchip,pins = <0x03 0x01 0x09 0x19d 0x03 0x00 0x09 0x19d>; + phandle = <0x36c>; + }; + + i2c6m3-xfer { + rockchip,pins = <0x04 0x09 0x09 0x19d 0x04 0x08 0x09 0x19d>; + phandle = <0x36b>; + }; + + i2c6m2-xfer { + rockchip,pins = <0x02 0x13 0x09 0x19d 0x02 0x12 0x09 0x19d>; + phandle = <0x36d>; + }; + + i2c6m1-xfer { + rockchip,pins = <0x01 0x13 0x09 0x19d 0x01 0x12 0x09 0x19d>; + phandle = <0x36a>; + }; + + i2c6m0-xfer { + rockchip,pins = <0x00 0x18 0x09 0x19d 0x00 0x17 0x09 0x19d>; + phandle = <0x178>; + }; + }; + + pdm1 { + + pdm1m1-sdi3 { + rockchip,pins = <0x01 0x0a 0x02 0x198>; + phandle = <0x3c1>; + }; + + pdm1m0-clk { + rockchip,pins = <0x04 0x1d 0x02 0x198>; + phandle = <0x140>; + }; + + pdm1m1-sdi1 { + rockchip,pins = <0x01 0x08 0x02 0x198>; + phandle = <0x3bf>; + }; + + pdm1m0-sdi3 { + rockchip,pins = <0x04 0x18 0x02 0x198>; + phandle = <0x13e>; + }; + + pdm1m0-sdi1 { + rockchip,pins = <0x04 0x1a 0x02 0x198>; + phandle = <0x13c>; + }; + + pdm1m1-clk { + rockchip,pins = <0x01 0x0c 0x02 0x198>; + phandle = <0x3bb>; + }; + + pdm1m1-clk1 { + rockchip,pins = <0x01 0x0b 0x02 0x198>; + phandle = <0x3bc>; + }; + + pdm1m1-idle { + rockchip,pins = <0x01 0x0c 0x00 0x198 0x01 0x0b 0x00 0x198>; + phandle = <0x3bd>; + }; + + pdm1m0-clk1 { + rockchip,pins = <0x04 0x1c 0x02 0x198>; + phandle = <0x141>; + }; + + pdm1m1-sdi2 { + rockchip,pins = <0x01 0x09 0x02 0x198>; + phandle = <0x3c0>; + }; + + pdm1m0-idle { + rockchip,pins = <0x04 0x1d 0x00 0x198 0x04 0x1c 0x00 0x198>; + phandle = <0x13f>; + }; + + pdm1m1-sdi0 { + rockchip,pins = <0x01 0x07 0x02 0x198>; + phandle = <0x3be>; + }; + + pdm1m0-sdi2 { + rockchip,pins = <0x04 0x19 0x02 0x198>; + phandle = <0x13d>; + }; + + pdm1m0-sdi0 { + rockchip,pins = <0x04 0x1b 0x02 0x198>; + phandle = <0x13b>; + }; + }; + + cpu { + + cpu-pins { + rockchip,pins = <0x00 0x19 0x02 0x198 0x00 0x1d 0x02 0x198>; + phandle = <0x317>; + }; + }; + + gpio-func { + + tsadc-gpio-func { + rockchip,pins = <0x00 0x01 0x00 0x198>; + phandle = <0x175>; + }; + }; + + pcie20x1 { + + pcie20x1-2-button-rstn { + rockchip,pins = <0x04 0x0b 0x04 0x198>; + phandle = <0x3a3>; + }; + + pcie20x1m1-pins { + rockchip,pins = <0x04 0x0f 0x04 0x198 0x04 0x11 0x04 0x198 0x04 0x10 0x04 0x198>; + phandle = <0x3a2>; + }; + + pcie20x1m0-pins { + rockchip,pins = <0x03 0x17 0x04 0x198 0x03 0x19 0x04 0x198 0x03 0x18 0x04 0x198>; + phandle = <0x3a1>; + }; + }; + + leds { + + leds-gpio { + rockchip,pins = <0x00 0x15 0x00 0x198>; + phandle = <0x1ee>; + }; + }; + + pwm1 { + + pwm1m1-pins { + rockchip,pins = <0x01 0x1b 0x0b 0x198>; + phandle = <0x3c5>; + }; + + pwm1m0-pins { + rockchip,pins = <0x00 0x10 0x03 0x198>; + phandle = <0x7f>; + }; + + pwm1m2-pins { + rockchip,pins = <0x01 0x03 0x0b 0x198>; + phandle = <0x3c6>; + }; + }; + + sata0 { + + sata0m1-pins { + rockchip,pins = <0x01 0x0b 0x06 0x198>; + phandle = <0x3e9>; + }; + + sata0m0-pins { + rockchip,pins = <0x04 0x0e 0x06 0x198>; + phandle = <0x3e8>; + }; + }; + + refclk { + + refclk-pins { + rockchip,pins = <0x00 0x00 0x01 0x198>; + phandle = <0x3e5>; + }; + }; + + pcie30x4 { + + pcie30x4m2-pins { + rockchip,pins = <0x03 0x14 0x04 0x198 0x03 0x16 0x04 0x198 0x03 0x15 0x04 0x198>; + phandle = <0x3b1>; + }; + + pcie30x4m1-pins { + rockchip,pins = <0x04 0x0c 0x04 0x198 0x04 0x0e 0x04 0x198 0x04 0x0d 0x04 0x198>; + phandle = <0x3b0>; + }; + + pcie30x4-button-rstn { + rockchip,pins = <0x03 0x1d 0x04 0x198>; + phandle = <0x3b3>; + }; + + pcie30x4m0-pins { + rockchip,pins = <0x00 0x16 0x0c 0x198 0x00 0x18 0x0c 0x198 0x00 0x17 0x0c 0x198>; + phandle = <0x3af>; + }; + + pcie30x4m3-pins { + rockchip,pins = <0x01 0x08 0x04 0x198 0x01 0x0a 0x04 0x198 0x01 0x09 0x04 0x198>; + phandle = <0x3b2>; + }; + }; + + can2 { + + can2m1-pins { + rockchip,pins = <0x00 0x1c 0x0a 0x198 0x00 0x1d 0x0a 0x198>; + phandle = <0x30f>; + }; + + can2m0-pins { + rockchip,pins = <0x03 0x14 0x09 0x198 0x03 0x15 0x09 0x198>; + phandle = <0x147>; + }; + }; + + litcpu { + + litcpu-pins { + rockchip,pins = <0x00 0x1b 0x01 0x198>; + phandle = <0x392>; + }; + }; + + sata { + + sata-reset { + rockchip,pins = <0x04 0x11 0x00 0x198>; + phandle = <0x3e7>; + }; + + sata-pins { + rockchip,pins = <0x00 0x16 0x0d 0x198 0x00 0x1c 0x0d 0x198 0x00 0x1d 0x0d 0x198>; + phandle = <0x3e6>; + }; + }; + + tsadc { + + tsadc-shut { + rockchip,pins = <0x00 0x01 0x02 0x198>; + phandle = <0x176>; + }; + + tsadc-shut-org { + rockchip,pins = <0x00 0x01 0x01 0x198>; + phandle = <0x418>; + }; + + tsadcm1-shut { + rockchip,pins = <0x00 0x02 0x02 0x198>; + phandle = <0x417>; + }; + }; + + uart0 { + + uart0m1-xfer { + rockchip,pins = <0x00 0x08 0x04 0x19e 0x00 0x09 0x04 0x19e>; + phandle = <0x7d>; + }; + + uart0m0-xfer { + rockchip,pins = <0x00 0x14 0x04 0x19e 0x00 0x15 0x04 0x19e>; + phandle = <0x419>; + }; + + uart0-rtsn { + rockchip,pins = <0x00 0x16 0x04 0x198>; + phandle = <0x41c>; + }; + + uart0-ctsn { + rockchip,pins = <0x00 0x19 0x04 0x198>; + phandle = <0x41b>; + }; + + uart0m2-xfer { + rockchip,pins = <0x04 0x04 0x0a 0x19e 0x04 0x03 0x0a 0x19e>; + phandle = <0x41a>; + }; + }; + + pcfg-pull-down-drv-level-2 { + drive-strength = <0x02>; + bias-pull-down; + phandle = <0x2f9>; + }; + + pcfg-pull-up-drv-level-5 { + drive-strength = <0x05>; + phandle = <0x2f6>; + bias-pull-up; + }; + + gpio@fec20000 { + gpio-controller; + interrupts = <0x00 0x116 0x04>; + clocks = <0x02 0x7d 0x02 0x7e>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec20000 0x00 0x100>; + phandle = <0xfe>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x20 0x20>; + interrupt-controller; + }; + + pcfg-pull-none-drv-level-15 { + drive-strength = <0x0f>; + bias-disable; + phandle = <0x459>; + }; + + eth1 { + + eth1-pins { + rockchip,pins = <0x03 0x06 0x01 0x198>; + phandle = <0x327>; + }; + }; + + i2c4 { + + i2c4m3-xfer { + rockchip,pins = <0x01 0x03 0x09 0x19d 0x01 0x02 0x09 0x19d>; + phandle = <0x364>; + }; + + i2c4m2-xfer { + rockchip,pins = <0x00 0x15 0x09 0x19d 0x00 0x14 0x09 0x19d>; + phandle = <0x363>; + }; + + i2c4m1-xfer { + rockchip,pins = <0x02 0x0d 0x09 0x19d 0x02 0x0c 0x09 0x19d>; + phandle = <0x14b>; + }; + + i2c4m0-xfer { + rockchip,pins = <0x03 0x06 0x09 0x19d 0x03 0x05 0x09 0x19d>; + phandle = <0x362>; + }; + + i2c4m4-xfer { + rockchip,pins = <0x01 0x17 0x09 0x19d 0x01 0x16 0x09 0x19d>; + phandle = <0x365>; + }; + }; + + emmc { + + emmc-data-strobe { + rockchip,pins = <0x02 0x02 0x01 0x198>; + phandle = <0x326>; + }; + + emmc-clk { + rockchip,pins = <0x02 0x01 0x01 0x199>; + phandle = <0x324>; + }; + + emmc-bus8 { + rockchip,pins = <0x02 0x18 0x01 0x199 0x02 0x19 0x01 0x199 0x02 0x1a 0x01 0x199 0x02 0x1b 0x01 0x199 0x02 0x1c 0x01 0x199 0x02 0x1d 0x01 0x199 0x02 0x1e 0x01 0x199 0x02 0x1f 0x01 0x199>; + phandle = <0x323>; + }; + + emmc-cmd { + rockchip,pins = <0x02 0x00 0x01 0x199>; + phandle = <0x325>; + }; + + emmc-rstnout { + rockchip,pins = <0x02 0x03 0x01 0x198>; + phandle = <0x322>; + }; + }; + + pcfg-pull-none-drv-level-8 { + drive-strength = <0x08>; + bias-disable; + phandle = <0x452>; + }; + + pwm15 { + + pwm15m0-pins { + rockchip,pins = <0x03 0x13 0x0b 0x198>; + phandle = <0x174>; + }; + + pwm15m3-pins { + rockchip,pins = <0x01 0x1f 0x0b 0x198>; + phandle = <0x3e4>; + }; + + pwm15m2-pins { + rockchip,pins = <0x01 0x16 0x0b 0x198>; + phandle = <0x3e3>; + }; + + pwm15m1-pins { + rockchip,pins = <0x04 0x0b 0x0b 0x198>; + phandle = <0x3e2>; + }; + }; + + pcie30x2 { + + pcie30x2m2-pins { + rockchip,pins = <0x03 0x1a 0x04 0x198 0x03 0x1c 0x04 0x198 0x03 0x1b 0x04 0x198>; + phandle = <0x3ac>; + }; + + pcie30x2m1-pins { + rockchip,pins = <0x04 0x06 0x04 0x198 0x04 0x08 0x04 0x198 0x04 0x07 0x04 0x198>; + phandle = <0x3ab>; + }; + + pcie30x2-button-rstn { + rockchip,pins = <0x03 0x11 0x04 0x198>; + phandle = <0x3ae>; + }; + + pcie30x2m0-pins { + rockchip,pins = <0x00 0x19 0x0c 0x198 0x00 0x1c 0x0c 0x198 0x00 0x1a 0x0c 0x198>; + phandle = <0x3aa>; + }; + + pcie30x2m3-pins { + rockchip,pins = <0x01 0x1f 0x04 0x198 0x01 0x0f 0x04 0x198 0x01 0x0e 0x04 0x198>; + phandle = <0x3ad>; + }; + }; + + can0 { + + can0m0-pins { + rockchip,pins = <0x00 0x10 0x0b 0x198 0x00 0x0f 0x0b 0x198>; + phandle = <0x145>; + }; + + can0m1-pins { + rockchip,pins = <0x04 0x1d 0x09 0x198 0x04 0x1c 0x09 0x198>; + phandle = <0x30d>; + }; + }; + + pcfg-output-high { + output-high; + phandle = <0x305>; + }; + + uart9 { + + uart9m0-rtsn { + rockchip,pins = <0x04 0x14 0x0a 0x198>; + phandle = <0x44e>; + }; + + uart9m2-ctsn { + rockchip,pins = <0x03 0x1b 0x0a 0x198>; + phandle = <0x44a>; + }; + + uart9m1-ctsn { + rockchip,pins = <0x04 0x01 0x0a 0x198>; + phandle = <0x447>; + }; + + uart9m2-xfer { + rockchip,pins = <0x03 0x1c 0x0a 0x19e 0x03 0x1d 0x0a 0x19e>; + phandle = <0x449>; + }; + + uart9m0-ctsn { + rockchip,pins = <0x04 0x15 0x0a 0x198>; + phandle = <0x44d>; + }; + + uart9m1-xfer { + rockchip,pins = <0x04 0x0d 0x0a 0x19e 0x04 0x0c 0x0a 0x19e>; + phandle = <0x168>; + }; + + uart9m0-xfer { + rockchip,pins = <0x02 0x14 0x0a 0x19e 0x02 0x12 0x0a 0x19e>; + phandle = <0x44c>; + }; + + uart9m2-rtsn { + rockchip,pins = <0x03 0x1a 0x0a 0x198>; + phandle = <0x44b>; + }; + + uart9m1-rtsn { + rockchip,pins = <0x04 0x00 0x0a 0x198>; + phandle = <0x448>; + }; + }; + + pcfg-pull-none-drv-level-2-smt { + drive-strength = <0x02>; + bias-disable; + input-schmitt-enable; + phandle = <0x301>; + }; + + pcfg-pull-up { + phandle = <0x19e>; + bias-pull-up; + }; + + spi3 { + + spi3m3-cs1 { + rockchip,pins = <0x03 0x15 0x08 0x19a>; + phandle = <0x40e>; + }; + + spi3m1-cs0 { + rockchip,pins = <0x04 0x10 0x08 0x19a>; + phandle = <0x15d>; + }; + + spi3m3-pins { + rockchip,pins = <0x03 0x18 0x08 0x19a 0x03 0x16 0x08 0x19a 0x03 0x17 0x08 0x19a>; + phandle = <0x40c>; + }; + + spi3m0-cs1 { + rockchip,pins = <0x04 0x13 0x08 0x19f>; + phandle = <0x411>; + }; + + spi3m2-cs0 { + rockchip,pins = <0x00 0x1c 0x08 0x19a>; + phandle = <0x40a>; + }; + + spi3m2-pins { + rockchip,pins = <0x00 0x1b 0x08 0x19a 0x00 0x18 0x08 0x19a 0x00 0x1a 0x08 0x19a>; + phandle = <0x409>; + }; + + spi3m1-cs1 { + rockchip,pins = <0x04 0x11 0x08 0x19a>; + phandle = <0x15e>; + }; + + spi3m1-pins { + rockchip,pins = <0x04 0x0f 0x08 0x19a 0x04 0x0d 0x08 0x19a 0x04 0x0e 0x08 0x19a>; + phandle = <0x15f>; + }; + + spi3m3-cs0 { + rockchip,pins = <0x03 0x14 0x08 0x19a>; + phandle = <0x40d>; + }; + + spi3m0-pins { + rockchip,pins = <0x04 0x16 0x08 0x19f 0x04 0x14 0x08 0x19f 0x04 0x15 0x08 0x19f>; + phandle = <0x40f>; + }; + + spi3m2-cs1 { + rockchip,pins = <0x00 0x1d 0x08 0x19a>; + phandle = <0x40b>; + }; + + spi3m0-cs0 { + rockchip,pins = <0x04 0x12 0x08 0x19f>; + phandle = <0x410>; + }; + }; + + pcfg-pull-down-drv-level-14 { + drive-strength = <0x0e>; + bias-pull-down; + phandle = <0x46a>; + }; + + bt656 { + + bt656-pins { + rockchip,pins = <0x04 0x08 0x02 0x1a0 0x04 0x00 0x02 0x1a0 0x04 0x01 0x02 0x1a0 0x04 0x02 0x02 0x1a0 0x04 0x03 0x02 0x1a0 0x04 0x04 0x02 0x1a0 0x04 0x05 0x02 0x1a0 0x04 0x06 0x02 0x1a0 0x04 0x07 0x02 0x1a0>; + phandle = <0x450>; + }; + }; + + pcfg-pull-down-drv-level-0 { + drive-strength = <0x00>; + bias-pull-down; + phandle = <0x2f7>; + }; + + pcfg-pull-up-drv-level-3 { + drive-strength = <0x03>; + phandle = <0x2f4>; + bias-pull-up; + }; + + i2s2 { + + i2s2m0-lrck { + rockchip,pins = <0x02 0x10 0x02 0x19d>; + phandle = <0x389>; + }; + + i2s2m1-mclk { + rockchip,pins = <0x03 0x0c 0x03 0x19d>; + phandle = <0x387>; + }; + + i2s2m0-mclk { + rockchip,pins = <0x02 0x0e 0x02 0x19d>; + phandle = <0x38a>; + }; + + i2s2m1-sdo { + rockchip,pins = <0x03 0x0b 0x03 0x198>; + phandle = <0x12b>; + }; + + i2s2m0-sdi { + rockchip,pins = <0x02 0x13 0x02 0x198>; + phandle = <0x38c>; + }; + + i2s2m1-idle { + rockchip,pins = <0x03 0x0e 0x00 0x198 0x03 0x0d 0x00 0x198>; + phandle = <0x12c>; + }; + + i2s2m1-sdi { + rockchip,pins = <0x03 0x0a 0x03 0x198>; + phandle = <0x12a>; + }; + + i2s2m0-idle { + rockchip,pins = <0x02 0x10 0x00 0x198 0x02 0x0f 0x00 0x198>; + phandle = <0x388>; + }; + + i2s2m1-sclk { + rockchip,pins = <0x03 0x0d 0x03 0x19d>; + phandle = <0x12e>; + }; + + i2s2m1-lrck { + rockchip,pins = <0x03 0x0e 0x03 0x19d>; + phandle = <0x12d>; + }; + + i2s2m0-sclk { + rockchip,pins = <0x02 0x0f 0x02 0x19d>; + phandle = <0x38b>; + }; + + i2s2m0-sdo { + rockchip,pins = <0x04 0x13 0x02 0x198>; + phandle = <0x38d>; + }; + }; + + pcfg-pull-none-drv-level-6-smt { + drive-strength = <0x06>; + bias-disable; + input-schmitt-enable; + phandle = <0x304>; + }; + + ddrphych3 { + + ddrphych3-pins { + rockchip,pins = <0x04 0x0c 0x07 0x198 0x04 0x0d 0x07 0x198 0x04 0x0e 0x07 0x198 0x04 0x0f 0x07 0x198>; + phandle = <0x31b>; + }; + }; + + pcfg-pull-none-drv-level-13 { + drive-strength = <0x0d>; + bias-disable; + phandle = <0x457>; + }; + + i2c2 { + + i2c2m2-xfer { + rockchip,pins = <0x02 0x03 0x09 0x19d 0x02 0x02 0x09 0x19d>; + phandle = <0x35a>; + }; + + i2c2m1-xfer { + rockchip,pins = <0x02 0x11 0x09 0x19d 0x02 0x10 0x09 0x19d>; + phandle = <0x35d>; + }; + + i2c2m0-xfer { + rockchip,pins = <0x00 0x0f 0x09 0x19d 0x00 0x10 0x09 0x19d>; + phandle = <0x149>; + }; + + i2c2m4-xfer { + rockchip,pins = <0x01 0x01 0x09 0x19d 0x01 0x00 0x09 0x19d>; + phandle = <0x35c>; + }; + + i2c2m3-xfer { + rockchip,pins = <0x01 0x15 0x09 0x19d 0x01 0x14 0x09 0x19d>; + phandle = <0x35b>; + }; + }; + + auddsm { + + auddsm-pins { + rockchip,pins = <0x03 0x01 0x04 0x198 0x03 0x02 0x04 0x198 0x03 0x03 0x04 0x198 0x03 0x04 0x04 0x198>; + phandle = <0x144>; + }; + }; + + pwm8 { + + pwm8m2-pins { + rockchip,pins = <0x03 0x18 0x0b 0x198>; + phandle = <0x3d5>; + }; + + pwm8m1-pins { + rockchip,pins = <0x04 0x18 0x0b 0x198>; + phandle = <0x3d4>; + }; + + pwm8m0-pins { + rockchip,pins = <0x03 0x07 0x0b 0x198>; + phandle = <0x16d>; + }; + }; + + pmic { + + pmic-pins { + rockchip,pins = <0x00 0x07 0x00 0x19e 0x00 0x02 0x01 0x198 0x00 0x03 0x01 0x198 0x00 0x11 0x01 0x198 0x00 0x12 0x01 0x198 0x00 0x13 0x01 0x198 0x00 0x1e 0x01 0x198>; + phandle = <0x156>; + }; + }; + + pcfg-pull-none-drv-level-6 { + drive-strength = <0x06>; + bias-disable; + phandle = <0x2f2>; + }; + + jtag { + + jtagm2-pins { + rockchip,pins = <0x00 0x0d 0x02 0x198 0x00 0x0e 0x02 0x198>; + phandle = <0x391>; + }; + + jtagm1-pins { + rockchip,pins = <0x04 0x18 0x05 0x198 0x04 0x19 0x05 0x198>; + phandle = <0x390>; + }; + + jtagm0-pins { + rockchip,pins = <0x04 0x1a 0x05 0x198 0x04 0x1b 0x05 0x198>; + phandle = <0x38f>; + }; + }; + + gpio@fd8a0000 { + gpio-controller; + interrupts = <0x00 0x115 0x04>; + clocks = <0x02 0x284 0x02 0x285>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfd8a0000 0x00 0x100>; + phandle = <0x7b>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x00 0x20>; + interrupt-controller; + }; + + gmac1 { + + gmac1-rgmii-clk { + rockchip,pins = <0x03 0x05 0x01 0x198 0x03 0x04 0x01 0x198>; + phandle = <0x111>; + }; + + gmac1-rx-bus2 { + rockchip,pins = <0x03 0x07 0x01 0x198 0x03 0x08 0x01 0x198 0x03 0x09 0x01 0x198>; + phandle = <0x110>; + }; + + gmac1-txer { + rockchip,pins = <0x03 0x0a 0x01 0x198>; + phandle = <0x332>; + }; + + gmac1-clkinout { + rockchip,pins = <0x03 0x0e 0x01 0x198>; + phandle = <0x32e>; + }; + + gmac1-ptp-ref-clk { + rockchip,pins = <0x03 0x0f 0x01 0x198>; + phandle = <0x331>; + }; + + gmac1-ppsclk { + rockchip,pins = <0x03 0x11 0x01 0x198>; + phandle = <0x32f>; + }; + + gmac1-ppstrig { + rockchip,pins = <0x03 0x10 0x01 0x198>; + phandle = <0x330>; + }; + + gmac1-rgmii-bus { + rockchip,pins = <0x03 0x02 0x01 0x198 0x03 0x03 0x01 0x198 0x03 0x00 0x01 0x19a 0x03 0x01 0x01 0x19a>; + phandle = <0x112>; + }; + + gmac1-tx-bus2 { + rockchip,pins = <0x03 0x0b 0x01 0x19a 0x03 0x0c 0x01 0x19a 0x03 0x0d 0x01 0x198>; + phandle = <0x10f>; + }; + + gmac1-miim { + rockchip,pins = <0x03 0x12 0x01 0x198 0x03 0x13 0x01 0x198>; + phandle = <0x10e>; + }; + }; + + pcfg-pull-none { + bias-disable; + phandle = <0x198>; + }; + + pwm13 { + + pwm13m2-pins { + rockchip,pins = <0x01 0x0f 0x0b 0x198>; + phandle = <0x3df>; + }; + + pwm13m1-pins { + rockchip,pins = <0x04 0x0e 0x0b 0x198>; + phandle = <0x3de>; + }; + + pwm13m0-pins { + rockchip,pins = <0x03 0x0e 0x0b 0x198>; + phandle = <0x172>; + }; + }; + + pcfg-output-high-pull-down { + output-high; + bias-pull-down; + phandle = <0x307>; + }; + + uart7 { + + uart7m1-ctsn { + rockchip,pins = <0x03 0x13 0x0a 0x198>; + phandle = <0x43b>; + }; + + uart7m2-xfer { + rockchip,pins = <0x01 0x0c 0x0a 0x19e 0x01 0x0d 0x0a 0x19e>; + phandle = <0x43d>; + }; + + uart7m0-ctsn { + rockchip,pins = <0x04 0x16 0x0a 0x198>; + phandle = <0x43f>; + }; + + uart7m1-xfer { + rockchip,pins = <0x03 0x11 0x0a 0x19e 0x03 0x10 0x0a 0x19e>; + phandle = <0x166>; + }; + + uart7m0-xfer { + rockchip,pins = <0x02 0x0c 0x0a 0x19e 0x02 0x0d 0x0a 0x19e>; + phandle = <0x43e>; + }; + + uart7m1-rtsn { + rockchip,pins = <0x03 0x12 0x0a 0x198>; + phandle = <0x43c>; + }; + + uart7m0-rtsn { + rockchip,pins = <0x04 0x12 0x0a 0x198>; + phandle = <0x440>; + }; + }; + + pcfg-pull-down-drv-level-9 { + drive-strength = <0x09>; + bias-pull-down; + phandle = <0x465>; + }; + + spi1 { + + spi1m1-cs1 { + rockchip,pins = <0x03 0x13 0x08 0x19a>; + phandle = <0x152>; + }; + + spi1m2-cs1 { + rockchip,pins = <0x01 0x1d 0x08 0x19a>; + phandle = <0x3fe>; + }; + + spi1m0-cs0 { + rockchip,pins = <0x02 0x13 0x08 0x19f>; + phandle = <0x400>; + }; + + spi1m2-pins { + rockchip,pins = <0x01 0x1a 0x08 0x19a 0x01 0x18 0x08 0x19a 0x01 0x19 0x08 0x19a>; + phandle = <0x3fc>; + }; + + spi1m1-pins { + rockchip,pins = <0x03 0x11 0x08 0x19a 0x03 0x10 0x08 0x19a 0x03 0x0f 0x08 0x19a>; + phandle = <0x153>; + }; + + spi1m1-cs0 { + rockchip,pins = <0x03 0x12 0x08 0x19a>; + phandle = <0x151>; + }; + + spi1m0-pins { + rockchip,pins = <0x02 0x10 0x08 0x19f 0x02 0x11 0x08 0x19f 0x02 0x12 0x08 0x19f>; + phandle = <0x3ff>; + }; + + spi1m0-cs1 { + rockchip,pins = <0x02 0x14 0x08 0x19f>; + phandle = <0x401>; + }; + + spi1m2-cs0 { + rockchip,pins = <0x01 0x1b 0x08 0x19a>; + phandle = <0x3fd>; + }; + }; + + pcfg-pull-up-drv-level-14 { + drive-strength = <0x0e>; + phandle = <0x461>; + bias-pull-up; + }; + + pcfg-output-low-pull-down { + bias-pull-down; + phandle = <0x30b>; + output-low; + }; + + pcfg-pull-down-drv-level-12 { + drive-strength = <0x0c>; + bias-pull-down; + phandle = <0x468>; + }; + + pcfg-pull-up-drv-level-1 { + drive-strength = <0x01>; + phandle = <0x19f>; + bias-pull-up; + }; + + pcfg-pull-none-smt { + bias-disable; + input-schmitt-enable; + phandle = <0x19d>; + }; + + sdmmc { + + sdmmc-det { + rockchip,pins = <0x00 0x04 0x01 0x19e>; + phandle = <0x116>; + }; + + sdmmc-pwren { + rockchip,pins = <0x00 0x05 0x02 0x198>; + phandle = <0x3ef>; + }; + + sdmmc-bus4 { + rockchip,pins = <0x04 0x18 0x01 0x199 0x04 0x19 0x01 0x199 0x04 0x1a 0x01 0x199 0x04 0x1b 0x01 0x199>; + phandle = <0x117>; + }; + + sdmmc-cmd { + rockchip,pins = <0x04 0x1c 0x01 0x199>; + phandle = <0x115>; + }; + + sdmmc-clk { + rockchip,pins = <0x04 0x1d 0x01 0x199>; + phandle = <0x114>; + }; + }; + + i2s0 { + + i2s0-sclk { + rockchip,pins = <0x01 0x13 0x01 0x19d>; + phandle = <0x11c>; + }; + + i2s0-sdo3 { + rockchip,pins = <0x01 0x1a 0x01 0x198>; + phandle = <0x37a>; + }; + + i2s0-lrck { + rockchip,pins = <0x01 0x15 0x01 0x19d>; + phandle = <0x11b>; + }; + + i2s0-sdo1 { + rockchip,pins = <0x01 0x18 0x01 0x198>; + phandle = <0x378>; + }; + + i2s0-sdi3 { + rockchip,pins = <0x01 0x19 0x02 0x198>; + phandle = <0x377>; + }; + + i2s0-mclk { + rockchip,pins = <0x01 0x12 0x01 0x19d>; + phandle = <0x17a>; + }; + + i2s0-sdi1 { + rockchip,pins = <0x01 0x1b 0x02 0x198>; + phandle = <0x375>; + }; + + i2s0-sdo2 { + rockchip,pins = <0x01 0x19 0x01 0x198>; + phandle = <0x379>; + }; + + i2s0-idle { + rockchip,pins = <0x01 0x15 0x00 0x198 0x01 0x13 0x00 0x198>; + phandle = <0x11f>; + }; + + i2s0-sdo0 { + rockchip,pins = <0x01 0x17 0x01 0x198>; + phandle = <0x11e>; + }; + + i2s0-sdi2 { + rockchip,pins = <0x01 0x1a 0x02 0x198>; + phandle = <0x376>; + }; + + i2s0-sdi0 { + rockchip,pins = <0x01 0x1c 0x02 0x198>; + phandle = <0x11d>; + }; + }; + + ddrphych1 { + + ddrphych1-pins { + rockchip,pins = <0x04 0x04 0x07 0x198 0x04 0x05 0x07 0x198 0x04 0x06 0x07 0x198 0x04 0x07 0x07 0x198>; + phandle = <0x319>; + }; + }; + + pcfg-pull-none-drv-level-11 { + drive-strength = <0x0b>; + bias-disable; + phandle = <0x455>; + }; + + i2c0 { + + i2c0m2-xfer { + rockchip,pins = <0x00 0x19 0x03 0x19d 0x00 0x1a 0x03 0x19d>; + phandle = <0x77>; + }; + + i2c0m1-xfer { + rockchip,pins = <0x04 0x15 0x09 0x19d 0x04 0x16 0x09 0x19d>; + phandle = <0x355>; + }; + + i2c0m0-xfer { + rockchip,pins = <0x00 0x0b 0x02 0x19d 0x00 0x06 0x02 0x19d>; + phandle = <0x354>; + }; + }; + + pwm6 { + + pwm6m2-pins { + rockchip,pins = <0x04 0x15 0x0b 0x198>; + phandle = <0x3d0>; + }; + + pwm6m1-pins { + rockchip,pins = <0x04 0x11 0x0b 0x198>; + phandle = <0x3cf>; + }; + + pwm6m0-pins { + rockchip,pins = <0x00 0x17 0x0b 0x198>; + phandle = <0x16b>; + }; + }; + + hym8563 { + + hym8563-int { + rockchip,pins = <0x00 0x08 0x00 0x198>; + phandle = <0x7a>; + }; + }; + + pcfg-pull-none-drv-level-4 { + drive-strength = <0x04>; + bias-disable; + phandle = <0x2f0>; + }; + + pcfg-output-high-pull-up { + output-high; + phandle = <0x306>; + bias-pull-up; + }; + + pwm11 { + + pwm11m3-pins { + rockchip,pins = <0x03 0x1d 0x0b 0x198>; + phandle = <0x3dc>; + }; + + pwm11m2-pins { + rockchip,pins = <0x01 0x14 0x0b 0x198>; + phandle = <0x3db>; + }; + + pwm11m1-pins { + rockchip,pins = <0x04 0x0c 0x0b 0x198>; + phandle = <0x3da>; + }; + + pwm11m0-pins { + rockchip,pins = <0x03 0x01 0x0b 0x198>; + phandle = <0x170>; + }; + }; + + bt1120 { + + bt1120-pins { + rockchip,pins = <0x04 0x08 0x02 0x198 0x04 0x00 0x02 0x198 0x04 0x01 0x02 0x198 0x04 0x02 0x02 0x198 0x04 0x03 0x02 0x198 0x04 0x04 0x02 0x198 0x04 0x05 0x02 0x198 0x04 0x06 0x02 0x198 0x04 0x07 0x02 0x198 0x04 0x0a 0x02 0x198 0x04 0x0b 0x02 0x198 0x04 0x0c 0x02 0x198 0x04 0x0d 0x02 0x198 0x04 0x0e 0x02 0x198 0x04 0x0f 0x02 0x198 0x04 0x10 0x02 0x198 0x04 0x11 0x02 0x198>; + phandle = <0x71>; + }; + }; + + pcfg-output-low-pull-up { + phandle = <0x30a>; + bias-pull-up; + output-low; + }; + + uart5 { + + uart5m1-ctsn { + rockchip,pins = <0x02 0x02 0x0a 0x198>; + phandle = <0x433>; + }; + + uart5m2-xfer { + rockchip,pins = <0x02 0x1c 0x0a 0x19e 0x02 0x1d 0x0a 0x19e>; + phandle = <0x435>; + }; + + uart5m0-ctsn { + rockchip,pins = <0x04 0x1a 0x0a 0x198>; + phandle = <0x431>; + }; + + uart5m1-xfer { + rockchip,pins = <0x03 0x15 0x0a 0x19e 0x03 0x14 0x0a 0x19e>; + phandle = <0x164>; + }; + + uart5m0-xfer { + rockchip,pins = <0x04 0x1c 0x0a 0x19e 0x04 0x1d 0x0a 0x19e>; + phandle = <0x430>; + }; + + uart5m1-rtsn { + rockchip,pins = <0x02 0x03 0x0a 0x198>; + phandle = <0x434>; + }; + + uart5m0-rtsn { + rockchip,pins = <0x04 0x1b 0x0a 0x198>; + phandle = <0x432>; + }; + }; + + sdio { + + sdiom1-pins { + rockchip,pins = <0x03 0x05 0x02 0x198 0x03 0x04 0x02 0x19e 0x03 0x00 0x02 0x19e 0x03 0x01 0x02 0x19e 0x03 0x02 0x02 0x19e 0x03 0x03 0x02 0x19e>; + phandle = <0x119>; + }; + + sdiom0-pins { + rockchip,pins = <0x02 0x0b 0x02 0x198 0x02 0x0a 0x02 0x19e 0x02 0x06 0x02 0x19e 0x02 0x07 0x02 0x19e 0x02 0x08 0x02 0x19e 0x02 0x09 0x02 0x19e>; + phandle = <0x3ee>; + }; + }; + + spdif1 { + + spdif1m0-tx { + rockchip,pins = <0x01 0x0f 0x03 0x198>; + phandle = <0x143>; + }; + + spdif1m2-tx { + rockchip,pins = <0x04 0x11 0x03 0x198>; + phandle = <0x3f2>; + }; + + spdif1m1-tx { + rockchip,pins = <0x04 0x09 0x02 0x198>; + phandle = <0x3f1>; + }; + }; + + pcfg-pull-down-drv-level-7 { + drive-strength = <0x07>; + bias-pull-down; + phandle = <0x463>; + }; + + gpio@fec30000 { + gpio-controller; + interrupts = <0x00 0x117 0x04>; + clocks = <0x02 0x7f 0x02 0x80>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec30000 0x00 0x100>; + phandle = <0x79>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x40 0x20>; + interrupt-controller; + }; + + pcfg-pull-up-drv-level-12 { + drive-strength = <0x0c>; + phandle = <0x45f>; + bias-pull-up; + }; + + pcfg-pull-down-drv-level-10 { + drive-strength = <0x0a>; + bias-pull-down; + phandle = <0x466>; + }; + + dp1 { + + dp1m1-pins { + rockchip,pins = <0x00 0x15 0x0a 0x198>; + phandle = <0x320>; + }; + + dp1m0-pins { + rockchip,pins = <0x03 0x1d 0x05 0x198>; + phandle = <0x31f>; + }; + + dp1m2-pins { + rockchip,pins = <0x01 0x01 0x05 0x198>; + phandle = <0x321>; + }; + }; + + vop { + + vop-pins { + rockchip,pins = <0x01 0x02 0x01 0x198>; + phandle = <0x44f>; + }; + }; + + pwm4 { + + pwm4m1-pins { + rockchip,pins = <0x04 0x13 0x0b 0x198>; + phandle = <0x3cc>; + }; + + pwm4m0-pins { + rockchip,pins = <0x00 0x15 0x0b 0x198>; + phandle = <0x169>; + }; + }; + + pcfg-pull-none-drv-level-2 { + drive-strength = <0x02>; + bias-disable; + phandle = <0x1a0>; + }; + + pcfg-pull-none-drv-level-3-smt { + drive-strength = <0x03>; + bias-disable; + input-schmitt-enable; + phandle = <0x302>; + }; + + uart3 { + + uart3m2-xfer { + rockchip,pins = <0x04 0x06 0x0a 0x19e 0x04 0x05 0x0a 0x19e>; + phandle = <0x429>; + }; + + uart3m1-xfer { + rockchip,pins = <0x03 0x0e 0x0a 0x19e 0x03 0x0d 0x0a 0x19e>; + phandle = <0x162>; + }; + + uart3-ctsn { + rockchip,pins = <0x01 0x13 0x0a 0x198>; + phandle = <0x42a>; + }; + + uart3m0-xfer { + rockchip,pins = <0x01 0x10 0x0a 0x19e 0x01 0x11 0x0a 0x19e>; + phandle = <0x428>; + }; + + uart3-rtsn { + rockchip,pins = <0x01 0x12 0x0a 0x198>; + phandle = <0x42b>; + }; + }; + + pcfg-pull-down-drv-level-5 { + drive-strength = <0x05>; + bias-pull-down; + phandle = <0x2fc>; + }; + + pcfg-pull-up-drv-level-8 { + drive-strength = <0x08>; + phandle = <0x45b>; + bias-pull-up; + }; + + pcfg-pull-up-drv-level-10 { + drive-strength = <0x0a>; + phandle = <0x45d>; + bias-pull-up; + }; + + pcfg-output-low { + phandle = <0x309>; + output-low; + }; + + i2c7 { + + i2c7m3-xfer { + rockchip,pins = <0x04 0x0a 0x09 0x19d 0x04 0x0b 0x09 0x19d>; + phandle = <0x36f>; + }; + + i2c7m2-xfer { + rockchip,pins = <0x03 0x1a 0x09 0x19d 0x03 0x1b 0x09 0x19d>; + phandle = <0x36e>; + }; + + i2c7m1-xfer { + rockchip,pins = <0x04 0x13 0x09 0x19d 0x04 0x14 0x09 0x19d>; + phandle = <0x370>; + }; + + i2c7m0-xfer { + rockchip,pins = <0x01 0x18 0x09 0x19d 0x01 0x19 0x09 0x19d>; + phandle = <0x185>; + }; + }; + + pwm2 { + + pwm2m2-pins { + rockchip,pins = <0x04 0x12 0x0b 0x198>; + phandle = <0x3c8>; + }; + + pwm2m1-pins { + rockchip,pins = <0x03 0x09 0x0b 0x198>; + phandle = <0x3c7>; + }; + + pwm2m0-pins { + rockchip,pins = <0x00 0x14 0x03 0x198>; + phandle = <0x80>; + }; + }; + + pcfg-pull-none-drv-level-0 { + drive-strength = <0x00>; + bias-disable; + phandle = <0x2ed>; + }; + + sata1 { + + sata1m1-pins { + rockchip,pins = <0x01 0x01 0x06 0x198>; + phandle = <0x3eb>; + }; + + sata1m0-pins { + rockchip,pins = <0x04 0x0d 0x06 0x198>; + phandle = <0x3ea>; + }; + }; + + pmu { + + pmu-pins { + rockchip,pins = <0x00 0x05 0x03 0x198>; + phandle = <0x3c2>; + }; + }; + + hdmirx { + + hdmirx-det { + rockchip,pins = <0x01 0x1d 0x00 0x198>; + phandle = <0x1b4>; + }; + }; + + uart1 { + + uart1m0-ctsn { + rockchip,pins = <0x02 0x11 0x0a 0x198>; + phandle = <0x423>; + }; + + uart1m1-xfer { + rockchip,pins = <0x01 0x0f 0x0a 0x19e 0x01 0x0e 0x0a 0x19e>; + phandle = <0x160>; + }; + + uart1m0-xfer { + rockchip,pins = <0x02 0x0e 0x0a 0x19e 0x02 0x0f 0x0a 0x19e>; + phandle = <0x422>; + }; + + uart1m2-rtsn { + rockchip,pins = <0x00 0x17 0x0a 0x198>; + phandle = <0x421>; + }; + + uart1m1-rtsn { + rockchip,pins = <0x01 0x1e 0x0a 0x198>; + phandle = <0x41e>; + }; + + uart1m0-rtsn { + rockchip,pins = <0x02 0x10 0x0a 0x198>; + phandle = <0x424>; + }; + + uart1m2-ctsn { + rockchip,pins = <0x00 0x18 0x0a 0x198>; + phandle = <0x420>; + }; + + uart1m1-ctsn { + rockchip,pins = <0x01 0x1f 0x0a 0x198>; + phandle = <0x41d>; + }; + + uart1m2-xfer { + rockchip,pins = <0x00 0x1a 0x0a 0x19e 0x00 0x19 0x0a 0x19e>; + phandle = <0x41f>; + }; + }; + + hdmi { + + hdmim1-rx-cec { + rockchip,pins = <0x03 0x19 0x05 0x198>; + phandle = <0x338>; + }; + + hdmim0-rx-scl { + rockchip,pins = <0x00 0x1a 0x0b 0x198>; + phandle = <0x336>; + }; + + hdmim0-rx-sda { + rockchip,pins = <0x00 0x19 0x0b 0x198>; + phandle = <0x337>; + }; + + hdmim0-tx0-cec { + rockchip,pins = <0x04 0x11 0x05 0x198>; + phandle = <0xf9>; + }; + + hdmim2-rx-cec { + rockchip,pins = <0x01 0x0f 0x05 0x198>; + phandle = <0x342>; + }; + + hdmim1-rx-scl { + rockchip,pins = <0x03 0x1a 0x05 0x19d>; + phandle = <0x33a>; + }; + + hdmim1-rx-sda { + rockchip,pins = <0x03 0x1b 0x05 0x19d>; + phandle = <0x33b>; + }; + + hdmim0-tx0-scl { + rockchip,pins = <0x04 0x0f 0x05 0x19b>; + phandle = <0xfb>; + }; + + hdmim0-tx0-sda { + rockchip,pins = <0x04 0x10 0x05 0x19c>; + phandle = <0xfc>; + }; + + hdmim2-rx-scl { + rockchip,pins = <0x01 0x1e 0x05 0x198>; + phandle = <0x344>; + }; + + hdmim2-rx-sda { + rockchip,pins = <0x01 0x1f 0x05 0x198>; + phandle = <0x345>; + }; + + hdmim0-tx0-hpd { + rockchip,pins = <0x01 0x05 0x05 0x198>; + phandle = <0xfa>; + }; + + hdmim2-rx-hpdin { + rockchip,pins = <0x01 0x0e 0x05 0x198>; + phandle = <0x343>; + }; + + hdmi-debug6 { + rockchip,pins = <0x01 0x00 0x07 0x198>; + phandle = <0x350>; + }; + + hdmim2-tx0-scl { + rockchip,pins = <0x03 0x17 0x05 0x19b>; + phandle = <0x346>; + }; + + hdmim2-tx0-sda { + rockchip,pins = <0x03 0x18 0x05 0x19c>; + phandle = <0x347>; + }; + + hdmi-debug4 { + rockchip,pins = <0x01 0x0b 0x07 0x198>; + phandle = <0x34e>; + }; + + hdmim0-tx1-cec { + rockchip,pins = <0x02 0x14 0x04 0x198>; + phandle = <0x351>; + }; + + hdmim0-tx1-scl { + rockchip,pins = <0x02 0x0d 0x04 0x198>; + phandle = <0x352>; + }; + + hdmim0-tx1-sda { + rockchip,pins = <0x02 0x0c 0x04 0x198>; + phandle = <0x353>; + }; + + hdmi-debug2 { + rockchip,pins = <0x01 0x09 0x07 0x198>; + phandle = <0x34c>; + }; + + hdmim0-tx1-hpd { + rockchip,pins = <0x01 0x06 0x05 0x198>; + phandle = <0x1a9>; + }; + + hdmim1-rx { + rockchip,pins = <0x03 0x19 0x05 0x198 0x03 0x1a 0x05 0x19d 0x03 0x1b 0x05 0x19d 0x03 0x1c 0x05 0x198>; + phandle = <0x1b3>; + }; + + hdmim2-tx1-cec { + rockchip,pins = <0x03 0x14 0x05 0x198>; + phandle = <0x1a8>; + }; + + hdmi-debug0 { + rockchip,pins = <0x01 0x07 0x07 0x198>; + phandle = <0x34a>; + }; + + hdmim2-tx1-scl { + rockchip,pins = <0x01 0x04 0x05 0x19b>; + phandle = <0x348>; + }; + + hdmim2-tx1-sda { + rockchip,pins = <0x01 0x03 0x05 0x19c>; + phandle = <0x349>; + }; + + hdmim1-tx0-cec { + rockchip,pins = <0x00 0x19 0x0d 0x198>; + phandle = <0x33c>; + }; + + hdmim1-tx0-scl { + rockchip,pins = <0x00 0x1d 0x0b 0x19b>; + phandle = <0x33e>; + }; + + hdmim1-tx0-sda { + rockchip,pins = <0x00 0x1c 0x0b 0x19c>; + phandle = <0x33f>; + }; + + hdmim1-tx0-hpd { + rockchip,pins = <0x03 0x1c 0x03 0x198>; + phandle = <0x33d>; + }; + + hdmim0-rx-hpdin { + rockchip,pins = <0x04 0x0e 0x05 0x198>; + phandle = <0x335>; + }; + + hdmi-debug5 { + rockchip,pins = <0x01 0x0c 0x07 0x198>; + phandle = <0x34f>; + }; + + hdmi-debug3 { + rockchip,pins = <0x01 0x0a 0x07 0x198>; + phandle = <0x34d>; + }; + + hdmim1-tx1-cec { + rockchip,pins = <0x00 0x1a 0x0d 0x198>; + phandle = <0x340>; + }; + + hdmi-debug1 { + rockchip,pins = <0x01 0x08 0x07 0x198>; + phandle = <0x34b>; + }; + + hdmim1-tx1-scl { + rockchip,pins = <0x03 0x16 0x05 0x19b>; + phandle = <0x1aa>; + }; + + hdmim1-tx1-sda { + rockchip,pins = <0x03 0x15 0x05 0x19c>; + phandle = <0x1ab>; + }; + + hdmim1-tx1-hpd { + rockchip,pins = <0x03 0x0f 0x05 0x198>; + phandle = <0x341>; + }; + + hdmim1-rx-hpdin { + rockchip,pins = <0x03 0x1c 0x05 0x198>; + phandle = <0x339>; + }; + + hdmim0-rx-cec { + rockchip,pins = <0x04 0x0d 0x05 0x198>; + phandle = <0x334>; + }; + }; + + pcfg-pull-down-drv-level-3 { + drive-strength = <0x03>; + bias-pull-down; + phandle = <0x2fa>; + }; + + pcfg-pull-up-drv-level-6 { + drive-strength = <0x06>; + phandle = <0x19a>; + bias-pull-up; + }; + + i2c5 { + + i2c5m3-xfer { + rockchip,pins = <0x01 0x0e 0x09 0x19d 0x01 0x0f 0x09 0x19d>; + phandle = <0x368>; + }; + + i2c5m2-xfer { + rockchip,pins = <0x04 0x06 0x09 0x19d 0x04 0x07 0x09 0x19d>; + phandle = <0x367>; + }; + + i2c5m1-xfer { + rockchip,pins = <0x04 0x0e 0x09 0x19d 0x04 0x0f 0x09 0x19d>; + phandle = <0x366>; + }; + + i2c5m0-xfer { + rockchip,pins = <0x03 0x17 0x09 0x19d 0x03 0x18 0x09 0x19d>; + phandle = <0x14d>; + }; + + i2c5m4-xfer { + rockchip,pins = <0x02 0x0e 0x09 0x19d 0x02 0x0f 0x09 0x19d>; + phandle = <0x369>; + }; + }; + + pcfg-pull-none-drv-level-9 { + drive-strength = <0x09>; + bias-disable; + phandle = <0x453>; + }; + + pdm0 { + + pdm0m1-sdi3 { + rockchip,pins = <0x00 0x1e 0x02 0x198>; + phandle = <0x3ba>; + }; + + pdm0m1-clk { + rockchip,pins = <0x00 0x10 0x02 0x198>; + phandle = <0x3b4>; + }; + + pdm0m1-sdi1 { + rockchip,pins = <0x00 0x18 0x02 0x198>; + phandle = <0x3b8>; + }; + + pdm0m0-sdi3 { + rockchip,pins = <0x01 0x1b 0x03 0x198>; + phandle = <0x137>; + }; + + pdm0m0-sdi1 { + rockchip,pins = <0x01 0x19 0x03 0x198>; + phandle = <0x135>; + }; + + pdm0m1-clk1 { + rockchip,pins = <0x00 0x14 0x02 0x198>; + phandle = <0x3b5>; + }; + + pdm0m1-idle { + rockchip,pins = <0x00 0x10 0x00 0x198 0x00 0x14 0x00 0x198>; + phandle = <0x3b6>; + }; + + pdm0m0-clk1 { + rockchip,pins = <0x01 0x14 0x03 0x198>; + phandle = <0x13a>; + }; + + pdm0m1-sdi2 { + rockchip,pins = <0x00 0x1c 0x02 0x198>; + phandle = <0x3b9>; + }; + + pdm0m0-idle { + rockchip,pins = <0x01 0x16 0x00 0x198 0x01 0x14 0x00 0x198>; + phandle = <0x138>; + }; + + pdm0m1-sdi0 { + rockchip,pins = <0x00 0x17 0x02 0x198>; + phandle = <0x3b7>; + }; + + pdm0m0-sdi2 { + rockchip,pins = <0x01 0x1a 0x03 0x198>; + phandle = <0x136>; + }; + + pdm0m0-sdi0 { + rockchip,pins = <0x01 0x1d 0x03 0x198>; + phandle = <0x134>; + }; + + pdm0m0-clk { + rockchip,pins = <0x01 0x16 0x03 0x198>; + phandle = <0x139>; + }; + }; + + pcfg-output-high-pull-none { + bias-disable; + output-high; + phandle = <0x308>; + }; + + pwm0 { + + pwm0m1-pins { + rockchip,pins = <0x01 0x1a 0x0b 0x198>; + phandle = <0x3c3>; + }; + + pwm0m0-pins { + rockchip,pins = <0x00 0x0f 0x03 0x198>; + phandle = <0x7e>; + }; + + pwm0m2-pins { + rockchip,pins = <0x01 0x02 0x0b 0x198>; + phandle = <0x3c4>; + }; + }; + + cif { + + cif-dvp-clk { + rockchip,pins = <0x04 0x08 0x01 0x198 0x04 0x0a 0x01 0x198 0x04 0x0b 0x01 0x198>; + phandle = <0x311>; + }; + + cif-clk { + rockchip,pins = <0x04 0x0c 0x01 0x198>; + phandle = <0x310>; + }; + + cif-dvp-bus8 { + rockchip,pins = <0x04 0x00 0x01 0x198 0x04 0x01 0x01 0x198 0x04 0x02 0x01 0x198 0x04 0x03 0x01 0x198 0x04 0x04 0x01 0x198 0x04 0x05 0x01 0x198 0x04 0x06 0x01 0x198 0x04 0x07 0x01 0x198>; + phandle = <0x313>; + }; + + cif-dvp-bus16 { + rockchip,pins = <0x03 0x14 0x01 0x198 0x03 0x15 0x01 0x198 0x03 0x16 0x01 0x198 0x03 0x17 0x01 0x198 0x03 0x18 0x01 0x198 0x03 0x19 0x01 0x198 0x03 0x1a 0x01 0x198 0x03 0x1b 0x01 0x198>; + phandle = <0x312>; + }; + }; + + can1 { + + can1m1-pins { + rockchip,pins = <0x04 0x0a 0x0c 0x198 0x04 0x0b 0x0c 0x198>; + phandle = <0x146>; + }; + + can1m0-pins { + rockchip,pins = <0x03 0x0d 0x09 0x198 0x03 0x0e 0x09 0x198>; + phandle = <0x30e>; + }; + }; + + pcfg-output-low-pull-none { + bias-disable; + phandle = <0x30c>; + output-low; + }; + + gpio@fec40000 { + gpio-controller; + interrupts = <0x00 0x118 0x04>; + clocks = <0x02 0x81 0x02 0x82>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec40000 0x00 0x100>; + phandle = <0x181>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x60 0x20>; + interrupt-controller; + }; + + spi4 { + + spi4m0-cs0 { + rockchip,pins = <0x01 0x13 0x08 0x19a>; + phandle = <0x187>; + }; + + spi4m1-cs0 { + rockchip,pins = <0x03 0x03 0x08 0x19a>; + phandle = <0x413>; + }; + + spi4m2-pins { + rockchip,pins = <0x01 0x02 0x08 0x19a 0x01 0x00 0x08 0x19a 0x01 0x01 0x08 0x19a>; + phandle = <0x415>; + }; + + spi4m0-cs1 { + rockchip,pins = <0x01 0x14 0x08 0x19a>; + phandle = <0x188>; + }; + + spi4m1-pins { + rockchip,pins = <0x03 0x02 0x08 0x19a 0x03 0x00 0x08 0x19a 0x03 0x01 0x08 0x19a>; + phandle = <0x412>; + }; + + spi4m2-cs0 { + rockchip,pins = <0x01 0x03 0x08 0x19a>; + phandle = <0x416>; + }; + + spi4m0-pins { + rockchip,pins = <0x01 0x12 0x08 0x19a 0x01 0x10 0x08 0x19a 0x01 0x11 0x08 0x19a>; + phandle = <0x189>; + }; + + spi4m1-cs1 { + rockchip,pins = <0x03 0x04 0x08 0x19a>; + phandle = <0x414>; + }; + }; + + pcfg-pull-down-drv-level-15 { + drive-strength = <0x0f>; + bias-pull-down; + phandle = <0x46b>; + }; + + pcfg-pull-up-smt { + input-schmitt-enable; + phandle = <0x2fe>; + bias-pull-up; + }; + + pcfg-pull-down-drv-level-1 { + drive-strength = <0x01>; + bias-pull-down; + phandle = <0x2f8>; + }; + + pcfg-pull-up-drv-level-4 { + drive-strength = <0x04>; + phandle = <0x2f5>; + bias-pull-up; + }; + + wireless-wlan { + + wifi-host-wake-irq { + rockchip,pins = <0x00 0x0a 0x00 0x198>; + phandle = <0x1ea>; + }; + }; + + wdt-pc9202 { + + wdt-en-base { + rockchip,pins = <0x00 0x14 0x00 0x198>; + phandle = <0x14c>; + }; + }; + + pcfg-pull-none-drv-level-0-smt { + drive-strength = <0x00>; + bias-disable; + input-schmitt-enable; + phandle = <0x300>; + }; + + i2s3 { + + i2s3-sdi { + rockchip,pins = <0x03 0x04 0x03 0x198>; + phandle = <0x12f>; + }; + + i2s3-idle { + rockchip,pins = <0x03 0x02 0x00 0x198 0x03 0x01 0x00 0x198>; + phandle = <0x131>; + }; + + i2s3-sclk { + rockchip,pins = <0x03 0x01 0x03 0x19d>; + phandle = <0x133>; + }; + + i2s3-lrck { + rockchip,pins = <0x03 0x02 0x03 0x19d>; + phandle = <0x132>; + }; + + i2s3-sdo { + rockchip,pins = <0x03 0x03 0x03 0x198>; + phandle = <0x130>; + }; + + i2s3-mclk { + rockchip,pins = <0x03 0x00 0x03 0x19d>; + phandle = <0x38e>; + }; + }; + + pcfg-pull-none-drv-level-14 { + drive-strength = <0x0e>; + bias-disable; + phandle = <0x458>; + }; + }; + + rkcif-mipi-lvds4-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x473>; + }; + + bt-sco { + #sound-dai-cells = <0x01>; + compatible = "delta,dfbmcs320"; + status = "disabled"; + phandle = <0x1d2>; + }; + + phy@fed80000 { + svid = <0xff01>; + orientation-switch; + sbu2-dc-gpios = <0x10d 0x07 0x00>; + clock-names = "refclk\0immortal\0pclk\0utmi"; + resets = <0x02 0x28 0x02 0x29 0x02 0x2a 0x02 0x2b 0x02 0x482>; + clocks = <0x02 0x2b6 0x02 0x27f 0x02 0x269 0x18d>; + compatible = "rockchip,rk3588-usbdp-phy"; + status = "okay"; + reg = <0x00 0xfed80000 0x00 0x10000>; + phandle = <0x2ea>; + rockchip,usb-grf = <0x74>; + reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; + rockchip,u2phy-grf = <0x18b>; + sbu1-dc-gpios = <0x10d 0x06 0x00>; + rockchip,usbdpphy-grf = <0x18c>; + rockchip,vo-grf = <0xf5>; + + dp-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0xf6>; + }; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@1 { + remote-endpoint = <0x18f>; + reg = <0x01>; + phandle = <0x17f>; + }; + + endpoint@0 { + remote-endpoint = <0x18e>; + reg = <0x00>; + phandle = <0x17e>; + }; + }; + + u3-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x67>; + }; + }; + + interrupt-controller@fe600000 { + #address-cells = <0x02>; + interrupts = <0x01 0x09 0x04>; + #size-cells = <0x02>; + compatible = "arm,gic-v3"; + ranges; + #interrupt-cells = <0x03>; + reg = <0x00 0xfe600000 0x00 0x10000 0x00 0xfe680000 0x00 0x100000>; + phandle = <0x01>; + interrupt-controller; + + msi-controller@fe640000 { + msi-controller; + compatible = "arm,gic-v3-its"; + reg = <0x00 0xfe640000 0x00 0x20000>; + phandle = <0x106>; + #msi-cells = <0x01>; + }; + + msi-controller@fe660000 { + msi-controller; + compatible = "arm,gic-v3-its"; + reg = <0x00 0xfe660000 0x00 0x20000>; + phandle = <0x1b6>; + #msi-cells = <0x01>; + }; + }; + + ethernet@fe1c0000 { + power-domains = <0x60 0x21>; + pinctrl-names = "default"; + phy-mode = "rgmii-rxid"; + snps,mixed-burst; + snps,mtl-rx-config = <0x10b>; + snps,reset-active-low; + pinctrl-0 = <0x10e 0x10f 0x110 0x111 0x112>; + clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; + snps,mtl-tx-config = <0x10c>; + local-mac-address = [de 2f 1a d4 a9 85]; + resets = <0x02 0x20b>; + interrupts = <0x00 0xea 0x04 0x00 0xe9 0x04>; + clocks = <0x02 0x144 0x02 0x145 0x02 0x168 0x02 0x16d 0x02 0x143>; + clock_in_out = "output"; + snps,tso; + compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; + status = "okay"; + rockchip,grf = <0xc8>; + interrupt-names = "macirq\0eth_wake_irq"; + snps,reset-gpio = <0x10d 0x08 0x01>; + reg = <0x00 0xfe1c0000 0x00 0x10000>; + rockchip,php_grf = <0x76>; + phandle = <0x109>; + phy-handle = <0x113>; + reset-names = "stmmaceth"; + tx_delay = <0x40>; + snps,axi-config = <0x10a>; + snps,reset-delays-us = <0x00 0x4e20 0x186a0>; + + mdio { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "snps,dwmac-mdio"; + phandle = <0x28f>; + + phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x01>; + phandle = <0x113>; + }; + }; + + tx-queues-config { + phandle = <0x10c>; + snps,tx-queues-to-use = <0x01>; + + queue0 { + }; + }; + + stmmac-axi-config { + snps,wr_osr_lmt = <0x04>; + phandle = <0x10a>; + snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; + snps,rd_osr_lmt = <0x08>; + }; + + rx-queues-config { + snps,rx-queues-to-use = <0x01>; + phandle = <0x10b>; + + queue0 { + }; + }; + }; + + pcie-essd { + regulator-max-microvolt = <0x2625a0>; + enable-active-high; + regulator-min-microvolt = <0x2625a0>; + regulator-name = "pcie_essd"; + startup-delay-us = <0x1388>; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x1ba>; + vin-supply = <0x1cd>; + gpios = <0x181 0x0f 0x00>; + }; + + iommu@fdab9000 { + clock-names = "aclk0\0aclk1\0aclk2\0iface0\0iface1\0iface2"; + interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; + clocks = <0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "npu0_mmu\0npu1_mmu\0npu2_mmu"; + reg = <0x00 0xfdab9000 0x00 0x100 0x00 0xfdaba000 0x00 0x100 0x00 0xfdaca000 0x00 0x100 0x00 0xfdada000 0x00 0x100>; + phandle = <0xb2>; + }; + + otp@fecc0000 { + #address-cells = <0x01>; + clock-names = "otpc\0apb\0arb\0phy"; + resets = <0x02 0x12a 0x02 0x129 0x02 0x12b>; + clocks = <0x02 0x96 0x02 0x95 0x02 0x97 0x02 0x99>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-otp"; + reg = <0x00 0xfecc0000 0x00 0x400>; + phandle = <0x2e7>; + reset-names = "otpc\0apb\0arb"; + + id@7 { + reg = <0x07 0x10>; + phandle = <0x2a>; + }; + + cpul-opp-info@3d { + reg = <0x3d 0x06>; + phandle = <0x20>; + }; + + cpub1-leakage@18 { + reg = <0x18 0x01>; + phandle = <0x27>; + }; + + vop-opp-info@61 { + reg = <0x61 0x06>; + phandle = <0x2e8>; + }; + + cpul-leakage@19 { + reg = <0x19 0x01>; + phandle = <0x1f>; + }; + + codec-leakage@29 { + reg = <0x29 0x01>; + phandle = <0xc6>; + }; + + cpu-version@1c { + bits = <0x03 0x03>; + reg = <0x1c 0x01>; + phandle = <0x2b>; + }; + + cpub0-leakage@17 { + reg = <0x17 0x01>; + phandle = <0x24>; + }; + + log-leakage@1a { + reg = <0x1a 0x01>; + phandle = <0x44>; + }; + + cpu-code@2 { + reg = <0x02 0x02>; + phandle = <0x2c>; + }; + + package-serial-number-low@6 { + bits = <0x05 0x03>; + reg = <0x06 0x01>; + phandle = <0xd4>; + }; + + npu-opp-info@55 { + reg = <0x55 0x06>; + phandle = <0xb5>; + }; + + package-serial-number-high@5 { + bits = <0x00 0x01>; + reg = <0x05 0x01>; + phandle = <0xd5>; + }; + + cpub01-opp-info@43 { + reg = <0x43 0x06>; + phandle = <0x25>; + }; + + dmc-opp-info@5b { + reg = <0x5b 0x06>; + phandle = <0x45>; + }; + + npu-leakage@28 { + reg = <0x28 0x01>; + phandle = <0xb4>; + }; + + gpu-leakage@1b { + reg = <0x1b 0x01>; + phandle = <0x63>; + }; + + specification-serial-number@6 { + bits = <0x00 0x05>; + reg = <0x06 0x01>; + phandle = <0x21>; + }; + + venc-opp-info@67 { + reg = <0x67 0x06>; + phandle = <0xc7>; + }; + + gpu-opp-info@4f { + reg = <0x4f 0x06>; + phandle = <0x64>; + }; + + cpub23-opp-info@49 { + reg = <0x49 0x06>; + phandle = <0x28>; + }; + }; + + i2s@fddf0000 { + power-domains = <0x60 0x1a>; + rockchip,always-on; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x243>; + assigned-clock-parents = <0x02 0x07>; + resets = <0x02 0x3e8>; + interrupts = <0x00 0xb9 0x04>; + clocks = <0x02 0x246 0x02 0x246 0x02 0x248>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "okay"; + reg = <0x00 0xfddf0000 0x00 0x1000>; + phandle = <0x1d3>; + dmas = <0xf2 0x02>; + reset-names = "tx-m"; + rockchip,hdmi-path; + }; + + dma-controller@fea10000 { + clock-names = "apb_pclk"; + interrupts = <0x00 0x56 0x04 0x00 0x57 0x04>; + clocks = <0x02 0x78>; + arm,pl330-periph-burst; + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfea10000 0x00 0x4000>; + phandle = <0x7c>; + #dma-cells = <0x01>; + }; + + pwm@febd0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x169>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebd0000 0x00 0x10>; + phandle = <0x2d2>; + }; + + rkvenc-ccu { + compatible = "rockchip,rkv-encoder-v2-ccu"; + status = "okay"; + phandle = <0xc3>; + }; + + syscon@fd58c000 { + compatible = "rockchip,rk3588-sys-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd58c000 0x00 0x1000>; + phandle = <0xc8>; + + rgb { + pinctrl-names = "default"; + pinctrl-0 = <0x71>; + compatible = "rockchip,rk3588-rgb"; + status = "disabled"; + phandle = <0x25c>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@2 { + remote-endpoint = <0x3d>; + status = "disabled"; + reg = <0x02>; + phandle = <0xf0>; + }; + }; + }; + }; + }; + + spi@fe2b0000 { + #address-cells = <0x01>; + clock-names = "clk_sfc\0hclk_sfc"; + assigned-clocks = <0x02 0x13d>; + assigned-clock-rates = <0x5f5e100>; + interrupts = <0x00 0xce 0x04>; + clocks = <0x02 0x13d 0x02 0x13e>; + #size-cells = <0x00>; + compatible = "rockchip,sfc"; + status = "disabled"; + reg = <0x00 0xfe2b0000 0x00 0x4000>; + phandle = <0x292>; + }; + + qos@fdf82200 { + compatible = "syscon"; + reg = <0x00 0xfdf82200 0x00 0x20>; + phandle = <0x9e>; + }; + + mmc@fe2c0000 { + power-domains = <0x60 0x28>; + fifo-depth = <0x100>; + pinctrl-names = "default"; + pinctrl-0 = <0x114 0x115 0x116 0x117>; + clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; + cap-sd-highspeed; + vqmmc-supply = <0x118>; + no-mmc; + bus-width = <0x04>; + no-sdio; + interrupts = <0x00 0xcb 0x04>; + clocks = <0x0e 0x17 0x0e 0x09 0x02 0x2c2 0x02 0x2c3>; + compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; + status = "okay"; + disable-wp; + reg = <0x00 0xfe2c0000 0x00 0x4000>; + phandle = <0x293>; + sd-uhs-sdr104; + max-frequency = <0x8f0d180>; + cap-mmc-highspeed; + }; + + serial@feb80000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x164>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x150 0x04>; + clocks = <0x02 0xc7 0x02 0xaf>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb80000 0x00 0x100>; + phandle = <0x2cd>; + dmas = <0xf1 0x0b 0xf1 0x0c>; + reg-shift = <0x02>; + }; + + phy@fee10000 { + rockchip,pipe-grf = <0x76>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2be>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20006 0x02 0x4d7>; + clocks = <0x02 0x2be 0x02 0x186 0x02 0x166>; + #phy-cells = <0x01>; + compatible = "rockchip,rk3588-naneng-combphy"; + status = "disabled"; + rockchip,pipe-phy-grf = <0x1cb>; + reg = <0x00 0xfee10000 0x00 0x100>; + phandle = <0x1bc>; + reset-names = "combphy-apb\0combphy"; + rockchip,pcie1ln-sel-bits = <0x100 0x00 0x00 0x00>; + }; + + can@fea60000 { + pinctrl-names = "default"; + pinctrl-0 = <0x146>; + clock-names = "baudclk\0apb_pclk"; + assigned-clocks = <0x02 0x72>; + assigned-clock-rates = <0xbebc200>; + resets = <0x02 0xbb 0x02 0xba>; + interrupts = <0x00 0x156 0x04>; + clocks = <0x02 0x72 0x02 0x71>; + compatible = "rockchip,can-2.0"; + status = "okay"; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + reg = <0x00 0xfea60000 0x00 0x1000>; + phandle = <0x2a1>; + reset-names = "can\0can-apb"; + }; + + pdm@fe4c0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x140 0x141>; + pinctrl-0 = <0x13b 0x13c 0x13d 0x13e>; + clock-names = "pdm_clk\0pdm_hclk"; + assigned-clocks = <0x02 0x3b>; + assigned-clock-parents = <0x02 0x05>; + clocks = <0x02 0x3b 0x02 0x3a>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-pdm"; + pinctrl-1 = <0x13f>; + status = "disabled"; + reg = <0x00 0xfe4c0000 0x00 0x1000>; + phandle = <0x29b>; + dmas = <0xf1 0x04>; + }; + + rkcif-mipi-lvds3-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x239>; + }; + + qos@fdf66e00 { + compatible = "syscon"; + reg = <0x00 0xfdf66e00 0x00 0x20>; + phandle = <0x9a>; + }; + + usb@fc800000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + companion = <0x6b>; + interrupts = <0x00 0xd7 0x04>; + clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; + compatible = "rockchip,rk3588-ehci\0generic-ehci"; + status = "okay"; + phys = <0x6c>; + reg = <0x00 0xfc800000 0x00 0x40000>; + phandle = <0x254>; + }; + + i2c@fd880000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x77>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xc0022 0x02 0xc0021>; + interrupts = <0x00 0x13d 0x04>; + clocks = <0x02 0x287 0x02 0x286>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfd880000 0x00 0x1000>; + phandle = <0x25f>; + reset-names = "i2c\0apb"; + + hym8563@51 { + pinctrl-names = "default"; + clock-output-names = "hym8563"; + pinctrl-0 = <0x7a>; + wakeup-source; + interrupts = <0x08 0x08>; + #clock-cells = <0x00>; + interrupt-parent = <0x7b>; + clock-frequency = <0x8000>; + compatible = "haoyu,hym8563"; + status = "okay"; + reg = <0x51>; + phandle = <0x1e4>; + }; + + rk8602@42 { + regulator-max-microvolt = <0x100590>; + regulator-boot-on; + rockchip,suspend-voltage-selector = <0x01>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_cpu_big0_s0"; + regulator-ramp-delay = <0x8fc>; + compatible = "rockchip,rk8602"; + reg = <0x42>; + phandle = <0x18>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk8603@43 { + regulator-max-microvolt = <0x100590>; + regulator-boot-on; + rockchip,suspend-voltage-selector = <0x01>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_cpu_big1_s0"; + regulator-ramp-delay = <0x8fc>; + compatible = "rockchip,rk8603"; + reg = <0x43>; + phandle = <0x1c>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pc9202@3c { + index = <0x00>; + compatible = "firefly,pc9202"; + status = "okay"; + wd-en-gpio = <0x79 0x15 0x00>; + driver-names = "wdt_core"; + reg = <0x3c>; + }; + }; + + rkcif-mipi-lvds3-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x237>; + }; + + serial@fd890000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x7d>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14b 0x04>; + clocks = <0x02 0x2ae 0x02 0x2af>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfd890000 0x00 0x100>; + phandle = <0x260>; + dmas = <0x7c 0x06 0x7c 0x07>; + reg-shift = <0x02>; + }; + + qos@fdf70000 { + compatible = "syscon"; + reg = <0x00 0xfdf70000 0x00 0x20>; + phandle = <0x85>; + }; + + gpu-opp-table { + rockchip,pvtm-offset = <0x1c>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-hw = <0x04>; + nvmem-cells = <0x63 0x64 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; + rockchip,pvtm-thermal-zone = "gpu-thermal"; + rockchip,high-temp-max-freq = "\0\f5"; + rockchip,opp-clocks = <0x02 0x114>; + rockchip,pvtm-freq = "\0\f5"; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x65>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; + phandle = <0x61>; + rockchip,pvtm-temp-prop = <0xffffff79 0xffffff79>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0x61a80>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-700000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-300000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-500000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-m-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0x02 0xffff>; + }; + + opp-j-850000000 { + opp-microvolt = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-hz = <0x00 0x32a9f880>; + opp-supported-hw = <0x04 0xffff>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L3 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + }; + + opp-j-m-400000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-700000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-900000000 { + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-hz = <0x00 0x35a4e900>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; + + opp-m-1000000000 { + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-hz = <0x00 0x3b9aca00>; + opp-supported-hw = <0x02 0xffff>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + }; + + opp-400000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-j-m-300000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-m-900000000 { + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-hz = <0x00 0x35a4e900>; + opp-supported-hw = <0x02 0xffff>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; + + opp-1000000000 { + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-hz = <0x00 0x3b9aca00>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + }; + + opp-j-m-500000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L2 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L3 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; + opp-microvolt-L1 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + }; + }; + + csi2-dphy1-hw@fedc8000 { + clock-names = "pclk"; + resets = <0x02 0x19 0x02 0x18>; + clocks = <0x02 0x10d>; + compatible = "rockchip,rk3588-csi2-dphy-hw"; + status = "okay"; + rockchip,grf = <0x193>; + reg = <0x00 0xfedc8000 0x00 0x8000>; + phandle = <0x2e>; + reset-names = "srst_csiphy1\0srst_p_csiphy1"; + rockchip,sys_grf = <0xc8>; + }; + + hdcp@fde40000 { + power-domains = <0x60 0x19>; + clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; + resets = <0x02 0x37f 0x02 0x37d 0x02 0x37c 0x02 0x37b 0x02 0x381>; + interrupts = <0x00 0x9f 0x04>; + clocks = <0x02 0x1ed 0x02 0x1ef 0x02 0x1ee 0x02 0x1ec 0x02 0x1f1 0x02 0x1f2>; + compatible = "rockchip,rk3588-hdcp"; + status = "disabled"; + reg = <0x00 0xfde40000 0x00 0x80>; + phandle = <0x285>; + reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; + rockchip,vo-grf = <0xf5>; + }; + + iommu@fdbac800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x7f 0x04>; + clocks = <0x02 0x1b2 0x02 0x1b3>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege3_mmu"; + reg = <0x00 0xfdbac800 0x00 0x40>; + phandle = <0xc0>; + }; + + qos@fdf40400 { + compatible = "syscon"; + reg = <0x00 0xfdf40400 0x00 0x20>; + phandle = <0xa2>; + }; + + rga@fdb70000 { + power-domains = <0x60 0x1e>; + iommus = <0xba>; + clock-names = "aclk_rga3_1\0hclk_rga3_1\0clk_rga3_1"; + interrupts = <0x00 0x73 0x04>; + clocks = <0x02 0x18a 0x02 0x189 0x02 0x18b>; + compatible = "rockchip,rga3_core1"; + status = "okay"; + interrupt-names = "rga3_core1_irq"; + reg = <0x00 0xfdb70000 0x00 0x1000>; + phandle = <0x26a>; + }; + + spi@feb00000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x14e 0x14f 0x150>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x146 0x04>; + clocks = <0x02 0xa3 0x02 0x9e>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfeb00000 0x00 0x1000>; + phandle = <0x2ab>; + dmas = <0x7c 0x0e 0x7c 0x0f>; + }; + + pcie@fe170000 { + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x20 0x2f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x08>; + resets = <0x02 0x20f 0x02 0x21e>; + interrupts = <0x00 0xf3 0x04 0x00 0xf2 0x04 0x00 0xf1 0x04 0x00 0xf0 0x04 0x00 0xef 0x04>; + clocks = <0x02 0x150 0x02 0x155 0x02 0x14b 0x02 0x15b 0x02 0x160 0x02 0x2c4>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1bb 0x00 0x00 0x00 0x00 0x02 0x1bb 0x01 0x00 0x00 0x00 0x03 0x1bb 0x02 0x00 0x00 0x00 0x04 0x1bb 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x02>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf2000000 0x00 0xf2000000 0x00 0x100000 0x81000000 0x00 0xf2100000 0x00 0xf2100000 0x00 0x100000 0x82000000 0x00 0xf2200000 0x00 0xf2200000 0x00 0xe00000 0xc3000000 0x09 0x80000000 0x09 0x80000000 0x00 0x40000000>; + msi-map = <0x2000 0x106 0x2000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x1bc 0x02>; + num-viewport = <0x04>; + reg = <0x00 0xfe170000 0x00 0x10000 0x0a 0x40800000 0x00 0x400000>; + linux,pci-domain = <0x02>; + phandle = <0x487>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x08>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xf0 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x1bb>; + interrupt-controller; + }; + }; + + i2s@fe470000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x11b 0x11c>; + pinctrl-0 = <0x11b 0x11c 0x11d 0x11e>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x31 0x02 0x35>; + assigned-clock-parents = <0x02 0x05 0x02 0x05>; + resets = <0x02 0x77 0x02 0x7a>; + interrupts = <0x00 0xb4 0x04>; + clocks = <0x02 0x33 0x02 0x37 0x02 0x30>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + pinctrl-1 = <0x11f>; + status = "okay"; + reg = <0x00 0xfe470000 0x00 0x1000>; + phandle = <0x1da>; + dmas = <0x7c 0x00 0x7c 0x01>; + reset-names = "tx-m\0rx-m"; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd594000 { + compatible = "rockchip,rk3588-litcore-grf\0syscon"; + reg = <0x00 0xfd594000 0x00 0x100>; + phandle = <0x22>; + }; + + csi2-dphy5 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x214>; + }; + + usb@fc840000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + interrupts = <0x00 0xd8 0x04>; + clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; + compatible = "rockchip,rk3588-ohci\0generic-ohci"; + status = "okay"; + phys = <0x6c>; + reg = <0x00 0xfc840000 0x00 0x40000>; + phandle = <0x6b>; + }; + + syscon@fd5b0000 { + compatible = "rockchip,rk3588-php-grf\0syscon"; + reg = <0x00 0xfd5b0000 0x00 0x1000>; + phandle = <0x76>; + }; + + rkcif-mipi-lvds2-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x55>; + phandle = <0x236>; + }; + + rkisp1-vir1 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x240>; + }; + + i2c@feaa0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x149>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb1 0x02 0xa9>; + interrupts = <0x00 0x13f 0x04>; + clocks = <0x02 0x8e 0x02 0x86>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfeaa0000 0x00 0x1000>; + phandle = <0x2a5>; + reset-names = "i2c\0apb"; + }; + + dmc { + downdifferential = <0x14>; + clock-names = "dmc_clk"; + interrupts = <0x00 0x49 0x04>; + clocks = <0x0e 0x04>; + upthreshold = <0x28>; + center-supply = <0x42>; + devfreq-events = <0x40>; + compatible = "rockchip,rk3588-dmc"; + status = "disabled"; + interrupt-names = "complete"; + mem-supply = <0x43>; + phandle = <0x21f>; + operating-points-v2 = <0x41>; + system-status-level = <0x01 0x04 0x08 0x08 0x02 0x01 0x10 0x04 0x10000 0x04 0x80000 0x04 0x1000 0x08 0x4000 0x08 0x2000 0x08 0xc00 0x08 0x40000 0x08 0x200000 0x08>; + auto-freq-en = <0x01>; + }; + + hdmi1-sound { + rockchip,jack-det; + rockchip,cpu = <0x1e0>; + rockchip,codec = <0x1e1>; + rockchip,card-name = "rockchip-hdmi1"; + compatible = "rockchip,hdmi"; + status = "disabled"; + phandle = <0x4a8>; + rockchip,mclk-fs = <0x80>; + }; + + qos@fdf3d800 { + compatible = "syscon"; + reg = <0x00 0xfdf3d800 0x00 0x20>; + phandle = <0xb0>; + }; + + mipi-dcphy-dummy { + phandle = <0x223>; + }; + + jpege-core@fdbac000 { + power-domains = <0x60 0x15>; + iommus = <0xc0>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1b2>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2d0 0x02 0x2d1>; + interrupts = <0x00 0x80 0x04>; + clocks = <0x02 0x1b2 0x02 0x1b3>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege3"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbac000 0x00 0x400>; + phandle = <0x270>; + reset-names = "video_a\0video_h"; + }; + + iommu@fdce0800 { + power-domains = <0x60 0x1b>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x71 0x04>; + clocks = <0x02 0x1e4 0x02 0x1e5>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "cif_mmu"; + reg = <0x00 0xfdce0800 0x00 0x100 0x00 0xfdce0900 0x00 0x100>; + phandle = <0x50>; + }; + + qos@fdf35400 { + compatible = "syscon"; + reg = <0x00 0xfdf35400 0x00 0x20>; + phandle = <0x89>; + }; + + syscon@fd5a8000 { + clocks = <0x73>; + compatible = "rockchip,rk3588-vo-grf\0syscon"; + reg = <0x00 0xfd5a8000 0x00 0x100>; + phandle = <0xd8>; + }; + + dp0-sound { + rockchip,jack-det; + rockchip,cpu = <0x1d5>; + rockchip,codec = <0x1d6 0x01>; + rockchip,card-name = "rockchip-dp0"; + compatible = "rockchip,hdmi"; + status = "disabled"; + phandle = <0x49c>; + rockchip,mclk-fs = <0x200>; + }; + + rkcif-mipi-lvds4 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x1a1>; + }; + + usb@fc880000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + companion = <0x6e>; + interrupts = <0x00 0xda 0x04>; + clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; + compatible = "rockchip,rk3588-ehci\0generic-ehci"; + status = "okay"; + phys = <0x6f>; + reg = <0x00 0xfc880000 0x00 0x40000>; + phandle = <0x255>; + }; + + qos@fdf62000 { + compatible = "syscon"; + reg = <0x00 0xfdf62000 0x00 0x20>; + phandle = <0x8b>; + }; + + syscon@fd5f0000 { + compatible = "rockchip,rk3588-ioc\0syscon"; + reg = <0x00 0xfd5f0000 0x00 0x10000>; + phandle = <0x196>; + }; + + mipi1-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x225>; + }; + + hdmiphy@fed70000 { + clock-names = "ref\0apb"; + resets = <0x02 0x491 0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041 0x02 0x48f 0x02 0x490>; + clocks = <0x02 0x2b5 0x02 0x268>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy-hdmi"; + status = "disabled"; + rockchip,grf = <0x1c7>; + reg = <0x00 0xfed70000 0x00 0x2000>; + phandle = <0x1ac>; + reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; + + clk-port { + #clock-cells = <0x00>; + status = "okay"; + phandle = <0x36>; + }; + }; + + i2c@fec80000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x178>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb5 0x02 0xad>; + interrupts = <0x00 0x143 0x04>; + clocks = <0x02 0x92 0x02 0x8a>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfec80000 0x00 0x1000>; + phandle = <0x2df>; + reset-names = "i2c\0apb"; + + imx415@37 { + power-domains = <0x60 0x1b>; + pinctrl-names = "default"; + pinctrl-0 = <0x180>; + clock-names = "xvclk"; + clocks = <0x02 0x100>; + firefly,clkout-enabled-index = <0x00>; + rockchip,camera-module-name = "CMK-OT2022-PX1"; + reset-gpios = <0x182 0x05 0x01>; + rockchip,camera-module-index = <0x00>; + compatible = "sony,imx415"; + rockchip,camera-module-facing = "back"; + power-gpios = <0x181 0x1d 0x00>; + reg = <0x37>; + rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20"; + phandle = <0x2e3>; + + port { + + endpoint { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x184>; + phandle = <0x32>; + }; + }; + }; + + es8388@11 { + pinctrl-names = "default"; + pinctrl-0 = <0x17a>; + clock-names = "mclk"; + assigned-clocks = <0x179>; + assigned-clock-rates = <0xbb8000>; + clocks = <0x179>; + #sound-dai-cells = <0x00>; + compatible = "everest,es8388\0everest,es8323"; + status = "okay"; + reg = <0x11>; + phandle = <0x1db>; + }; + + XC7160b@1b { + power-domains = <0x60 0x1b>; + pinctrl-names = "default"; + pinctrl-0 = <0x180>; + clock-names = "xvclk"; + pwdn-gpios = <0xfe 0x04 0x00>; + clocks = <0x02 0x100>; + firefly,clkout-enabled-index = <0x00>; + rockchip,camera-module-name = "NC"; + reset-gpios = <0x182 0x05 0x00>; + rockchip,camera-module-index = <0x00>; + compatible = "firefly,xc7160"; + rockchip,camera-module-facing = "back"; + power-gpios = <0x181 0x1d 0x01>; + reg = <0x1b>; + rockchip,camera-module-lens-name = "NC"; + phandle = <0x2e2>; + + port { + + endpoint { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x183>; + phandle = <0x31>; + }; + }; + }; + + fusb302@22 { + pinctrl-names = "default"; + pinctrl-0 = <0x17b>; + interrupts = <0x1b 0x08>; + vbus-supply = <0x17c>; + interrupt-parent = <0x7b>; + compatible = "fcs,fusb302"; + status = "disabled"; + reg = <0x22>; + phandle = <0x2e0>; + + connector { + sink-pdos = <0x4019064>; + power-role = "dual"; + source-pdos = <0x401912c>; + data-role = "dual"; + label = "USB-C"; + try-power-role = "sink"; + compatible = "usb-c-connector"; + op-sink-microwatt = <0xf4240>; + phandle = <0x2e1>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + + endpoint { + remote-endpoint = <0x17e>; + phandle = <0x18e>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + remote-endpoint = <0x17f>; + phandle = <0x18f>; + }; + }; + }; + + altmodes { + #address-cells = <0x01>; + #size-cells = <0x00>; + + altmode@0 { + svid = <0xff01>; + vdo = <0xffffffff>; + reg = <0x00>; + }; + }; + }; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + + endpoint@0 { + remote-endpoint = <0x17d>; + phandle = <0x68>; + }; + }; + }; + }; + }; + + syscon@fd5e8000 { + compatible = "rockchip,mipi-dcphy-grf\0syscon"; + reg = <0x00 0xfd5e8000 0x00 0x4000>; + phandle = <0x190>; + }; + + vbus5v0-typec-pwr-en-regulator { + gpio = <0x182 0x0c 0x00>; + enable-active-high; + regulator-name = "vbus5v0_typec_pwr_en"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x17c>; + }; + + mipi2-csi2-hw@fdd30000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x326>; + interrupts = <0x00 0x93 0x04 0x00 0x94 0x04>; + clocks = <0x02 0x1d1>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd30000 0x00 0x10000>; + phandle = <0x49>; + reset-names = "srst_csihost_p"; + }; + + spdif-rx@fde18000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x262>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x401>; + interrupts = <0x00 0xc9 0x04>; + clocks = <0x02 0x262 0x02 0x261>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + status = "disabled"; + reg = <0x00 0xfde18000 0x00 0x1000>; + phandle = <0x480>; + dmas = <0x7c 0x17>; + reset-names = "spdifrx-m"; + }; + + syscon@fd5a2000 { + compatible = "rockchip,rk3588-npu-grf\0syscon"; + reg = <0x00 0xfd5a2000 0x00 0x100>; + phandle = <0xb6>; + }; + + rkisp0-vir3 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23e>; + }; + + qos@fdf66200 { + compatible = "syscon"; + reg = <0x00 0xfdf66200 0x00 0x20>; + phandle = <0x94>; + }; + + rkcif@fdce0000 { + power-domains = <0x60 0x1b>; + iommus = <0x50>; + nvmem-cells = <0x21 0xd4 0xd5>; + clock-names = "aclk_cif\0hclk_cif\0dclk_cif\0iclk_host0\0iclk_host1"; + reg-names = "cif_regs"; + assigned-clocks = <0x02 0x1e3>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x317 0x02 0x318 0x02 0x316 0x02 0x334 0x02 0x335 0x02 0x336 0x02 0x337 0x02 0x338 0x02 0x339>; + interrupts = <0x00 0x9b 0x04>; + clocks = <0x02 0x1e4 0x02 0x1e5 0x02 0x1e3 0x02 0x1cd 0x02 0x1ce>; + compatible = "rockchip,rk3588-cif"; + status = "okay"; + rockchip,grf = <0xc8>; + interrupt-names = "cif-intr"; + nvmem-cell-names = "specification\0package_low\0package_high"; + reg = <0x00 0xfdce0000 0x00 0x800>; + phandle = <0x4f>; + reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_d\0rst_cif_host0\0rst_cif_host1\0rst_cif_host2\0rst_cif_host3\0rst_cif_host4\0rst_cif_host5"; + }; + + edp@fdec0000 { + power-domains = <0x60 0x1a>; + phy-names = "dp"; + clock-names = "dp\0pclk\0spdif\0hclk"; + resets = <0x02 0x3e1 0x02 0x3e0>; + interrupts = <0x00 0xa3 0x04>; + clocks = <0x02 0x211 0x02 0x210 0x02 0x212 0x05>; + compatible = "rockchip,rk3588-edp"; + status = "disabled"; + rockchip,grf = <0xd8>; + phys = <0x101>; + reg = <0x00 0xfdec0000 0x00 0x1000>; + phandle = <0x289>; + reset-names = "dp\0apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x103>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe1>; + }; + + endpoint@2 { + remote-endpoint = <0x3b>; + status = "disabled"; + reg = <0x02>; + phandle = <0xe7>; + }; + + endpoint@0 { + remote-endpoint = <0x102>; + status = "disabled"; + reg = <0x00>; + phandle = <0xdb>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x28a>; + }; + }; + }; + }; + + qos@fdf72400 { + compatible = "syscon"; + reg = <0x00 0xfdf72400 0x00 0x20>; + phandle = <0x84>; + }; + + dp@fde60000 { + power-domains = <0x60 0x19>; + clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; + assigned-clocks = <0x02 0x2cd>; + assigned-clock-rates = <0xf42400>; + resets = <0x02 0x389>; + interrupts = <0x00 0xa2 0x04>; + clocks = <0x02 0x1e7 0x02 0x2cd 0x02 0x201 0x02 0x20d 0x04 0x02 0x1eb>; + #sound-dai-cells = <0x01>; + compatible = "rockchip,rk3588-dp"; + status = "disabled"; + phys = <0x1a5>; + reg = <0x00 0xfde60000 0x00 0x4000>; + phandle = <0x1e3>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x3e>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe3>; + }; + + endpoint@2 { + remote-endpoint = <0x1a7>; + status = "disabled"; + reg = <0x02>; + phandle = <0xeb>; + }; + + endpoint@0 { + remote-endpoint = <0x1a6>; + status = "disabled"; + reg = <0x00>; + phandle = <0xdd>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x481>; + }; + }; + }; + }; + + vcc5v0-usbdcin { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_usbdcin"; + compatible = "regulator-fixed"; + phandle = <0x48c>; + vin-supply = <0x1cd>; + }; + + rkvdec-core@fdc48000 { + power-domains = <0x60 0x0f>; + iommus = <0xcc>; + rockchip,ccu = <0xca>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; + reg-names = "regs\0link"; + assigned-clocks = <0x02 0x195 0x02 0x198 0x02 0x196 0x02 0x197>; + rockchip,core-mask = <0x20002>; + rockchip,task-capacity = <0x10>; + rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; + assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; + resets = <0x02 0x293 0x02 0x292 0x02 0x298 0x02 0x296 0x02 0x297>; + interrupts = <0x00 0x61 0x04>; + rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; + clocks = <0x02 0x195 0x02 0x194 0x02 0x198 0x02 0x196 0x02 0x197>; + rockchip,rcb-min-width = <0x200>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x09>; + compatible = "rockchip,rkv-decoder-v2"; + status = "okay"; + interrupt-names = "irq_rkvdec1"; + rockchip,skip-pmu-idle-request; + rockchip,rcb-iova = <0xffe00000 0x100000>; + reg = <0x00 0xfdc48100 0x00 0x400 0x00 0xfdc48000 0x00 0x100>; + phandle = <0x275>; + reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; + rockchip,sram = <0xcd>; + }; + + vcc-1v1-nldo-s3 { + regulator-max-microvolt = <0x10c8e0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x10c8e0>; + regulator-name = "vcc_1v1_nldo_s3"; + compatible = "regulator-fixed"; + phandle = <0x15c>; + vin-supply = <0x78>; + }; + + power-management@fd8d8000 { + compatible = "rockchip,rk3588-pmu\0syscon\0simple-mfd"; + reg = <0x00 0xfd8d8000 0x00 0x400>; + phandle = <0xd9>; + + power-controller { + #address-cells = <0x01>; + #size-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-power-controller"; + status = "okay"; + phandle = <0x60>; + + power-domain@37 { + clocks = <0x02 0x199 0x02 0x140>; + reg = <0x25>; + pm_qos = <0xaf>; + }; + + power-domain@27 { + #address-cells = <0x01>; + clocks = <0x02 0x1e1 0x02 0x1e2 0x02 0x1df 0x02 0x1de 0x02 0x1e5 0x02 0x1e4>; + #size-cells = <0x00>; + reg = <0x1b>; + pm_qos = <0xa2 0xa3 0xa4 0xa5>; + + power-domain@29 { + clocks = <0x02 0x1d6 0x02 0x1d5 0x02 0x1d9 0x02 0x1d8 0x02 0x1e2>; + reg = <0x1d>; + pm_qos = <0xa8 0xa9>; + }; + + power-domain@28 { + clocks = <0x02 0x121 0x02 0x120 0x02 0x1e1 0x02 0x1e2>; + reg = <0x1c>; + pm_qos = <0xa6 0xa7>; + }; + }; + + power-domain@33 { + clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; + reg = <0x21>; + }; + + power-domain@13 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x0d>; + + power-domain@15 { + clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc 0x02 0x195>; + reg = <0x0f>; + pm_qos = <0x8c>; + }; + + power-domain@16 { + #address-cells = <0x01>; + clocks = <0x02 0x1c4 0x02 0x1c5>; + #size-cells = <0x00>; + reg = <0x10>; + pm_qos = <0x8d 0x8e 0x8f>; + + power-domain@17 { + clocks = <0x02 0x1c9 0x02 0x1c4 0x02 0x1c5 0x02 0x1ca>; + reg = <0x11>; + pm_qos = <0x90 0x91 0x92>; + }; + }; + + power-domain@14 { + clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190 0x02 0x18e>; + reg = <0x0e>; + pm_qos = <0x8b>; + }; + }; + + power-domain@31 { + clocks = <0x02 0x166 0x02 0x1a1 0x02 0x1a4 0x02 0x19d 0x02 0x19e 0x02 0x19f 0x02 0x1a0>; + reg = <0x1f>; + pm_qos = <0xab 0xac 0xad 0xae>; + }; + + power-domain@21 { + #address-cells = <0x01>; + clocks = <0x02 0x1be 0x02 0x1bd 0x02 0x1bc 0x02 0x1bf 0x02 0x1aa 0x02 0x1a9 0x02 0x1ac 0x02 0x1ad 0x02 0x1ae 0x02 0x1af 0x02 0x1b0 0x02 0x1b1 0x02 0x1b2 0x02 0x1b3 0x02 0x1b4 0x02 0x1b5 0x02 0x1b7 0x02 0x1b6>; + #size-cells = <0x00>; + reg = <0x15>; + pm_qos = <0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a>; + + power-domain@15 { + clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc>; + reg = <0x0f>; + pm_qos = <0x8c>; + }; + + power-domain@23 { + clocks = <0x02 0x4b 0x02 0x49 0x02 0x1be>; + reg = <0x17>; + pm_qos = <0x9b>; + }; + + power-domain@14 { + clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190>; + reg = <0x0e>; + pm_qos = <0x8b>; + }; + + power-domain@22 { + clocks = <0x02 0x1ba 0x02 0x1b9>; + reg = <0x16>; + pm_qos = <0x9c>; + }; + }; + + power-domain@38 { + clocks = <0x02 0x3c 0x02 0x3d>; + reg = <0x26>; + }; + + power-domain@8 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x08>; + + power-domain@9 { + #address-cells = <0x01>; + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130 0x02 0x126>; + #size-cells = <0x00>; + reg = <0x09>; + pm_qos = <0x82 0x83 0x84>; + + power-domain@11 { + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; + reg = <0x0b>; + pm_qos = <0x86>; + }; + + power-domain@10 { + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; + reg = <0x0a>; + pm_qos = <0x85>; + }; + }; + }; + + power-domain@26 { + clocks = <0x02 0x22e 0x02 0x22f 0x02 0x22d 0x02 0x218 0x02 0x217 0x02 0x22b 0x02 0x264>; + reg = <0x1a>; + pm_qos = <0xa0 0xa1>; + }; + + power-domain@34 { + clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; + reg = <0x22>; + }; + + power-domain@24 { + #address-cells = <0x01>; + clocks = <0x02 0x26e 0x02 0x26d 0x02 0x270>; + #size-cells = <0x00>; + reg = <0x18>; + pm_qos = <0x9d 0x9e>; + + power-domain@25 { + clocks = <0x02 0x1f6 0x02 0x1f7 0x02 0x1f5 0x02 0x1f3 0x02 0x1ee 0x02 0x1ed 0x02 0x26d>; + reg = <0x19>; + pm_qos = <0x9f>; + }; + }; + + power-domain@12 { + clocks = <0x02 0x114 0x02 0x115 0x02 0x116>; + reg = <0x0c>; + pm_qos = <0x87 0x88 0x89 0x8a>; + }; + + power-domain@40 { + reg = <0x28>; + pm_qos = <0xb0>; + }; + + power-domain@30 { + clocks = <0x02 0x189 0x02 0x18a>; + reg = <0x1e>; + pm_qos = <0xaa>; + }; + }; + }; + + csi2-dphy3 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x212>; + }; + + qos@fdf3e000 { + compatible = "syscon"; + reg = <0x00 0xfdf3e000 0x00 0x20>; + phandle = <0xac>; + }; + + pwm@fd8b0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x81>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04 0x00 0x159 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0030 0x00 0x10>; + phandle = <0x264>; + }; + + rkcif-mipi-lvds2-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x55>; + phandle = <0x234>; + }; + + syscon@fd5cc000 { + compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; + reg = <0x00 0xfd5cc000 0x00 0x4000>; + phandle = <0x1c9>; + }; + + vdpu@fdb50400 { + power-domains = <0x60 0x15>; + iommus = <0xb7>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1c0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + interrupts = <0x00 0x77 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-decoder-v2"; + rockchip,resetgroup-node = <0x00>; + status = "okay"; + interrupt-names = "irq_vdpu"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb50400 0x00 0x400>; + phandle = <0x267>; + reset-names = "shared_video_a\0shared_video_h"; + }; + + qos@fdf60200 { + compatible = "syscon"; + reg = <0x00 0xfdf60200 0x00 0x20>; + phandle = <0x8e>; + }; + + pwm@febe0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x170>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04 0x00 0x15d 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0030 0x00 0x10>; + phandle = <0x2d8>; + }; + + display-subsystem { + memory-region-names = "drm-logo"; + clock-names = "hdmi0_phy_pll\0hdmi1_phy_pll"; + ports = <0x34>; + memory-region = <0x37>; + clocks = <0x35 0x36>; + compatible = "rockchip,display-subsystem"; + phandle = <0x215>; + + route { + + route-edp1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21a>; + }; + + route-hdmi1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3f>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21e>; + }; + + route-dp1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3e>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21d>; + }; + + route-dsi1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3a>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x218>; + }; + + route-edp0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3b>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x219>; + }; + + route-hdmi0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3c>; + logo,mode = "center"; + status = "okay"; + phandle = <0x21b>; + }; + + route-dp0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x38>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x216>; + }; + + route-rgb { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3d>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21c>; + }; + + route-dsi0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x39>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x217>; + }; + }; + }; + + serial@febc0000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x168>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x154 0x04>; + clocks = <0x02 0xd7 0x02 0xb3>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfebc0000 0x00 0x100>; + phandle = <0x2d1>; + dmas = <0xf2 0x0b 0xf2 0x0c>; + reg-shift = <0x02>; + }; + + adc-keys { + io-channels = <0x1d9 0x01>; + poll-interval = <0x64>; + keyup-threshold-microvolt = <0x1b7740>; + compatible = "adc-keys"; + status = "okay"; + phandle = <0x49e>; + io-channel-names = "buttons"; + + recovery-key { + press-threshold-microvolt = <0x4268>; + label = "F12"; + linux,code = <0x58>; + }; + }; + + pvtm@fdaf0000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-npu-pvtm"; + reg = <0x00 0xfdaf0000 0x00 0x100>; + + pvtm@3 { + clock-names = "clk\0pclk"; + resets = <0x02 0x1de 0x02 0x1dc>; + clocks = <0x02 0x12b 0x02 0x129>; + reg = <0x03>; + reset-names = "rts\0rst-p"; + }; + }; + + codec-digital@fe500000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x144>; + clock-names = "dac\0pclk"; + resets = <0x02 0x84>; + clocks = <0x02 0x29 0x02 0x2f>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-codec-digital\0rockchip,codec-digital-v1"; + status = "disabled"; + rockchip,grf = <0xc8>; + reg = <0x00 0xfe500000 0x00 0x1000>; + phandle = <0x29e>; + reset-names = "reset"; + rockchip,pwm-output-mode; + }; + + pwm@fd8b0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x80>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0020 0x00 0x10>; + phandle = <0x263>; + }; + + rkcif-mipi-lvds2 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "okay"; + phandle = <0x55>; + + port { + + endpoint { + remote-endpoint = <0x54>; + phandle = <0x4e>; + }; + }; + }; + + pwm@febe0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x16f>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0020 0x00 0x10>; + phandle = <0x2d7>; + }; + + vcc-fan-pwr-en-regulator { + regulator-boot-on; + gpio = <0x182 0x0b 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_fan_pwr_en"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a4>; + }; + + iommu@fdba0800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x79 0x04>; + clocks = <0x02 0x1ac 0x02 0x1ad>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege0_mmu"; + reg = <0x00 0xfdba0800 0x00 0x40>; + phandle = <0xbc>; + }; + + rkcif-mipi-lvds1-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x231>; + }; + + arm-pmu { + interrupt-affinity = <0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d>; + interrupts = <0x01 0x07 0x08>; + compatible = "arm,armv8-pmuv3"; + phandle = <0x20c>; + }; + + pvtm@fda40000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-bigcore0-pvtm"; + reg = <0x00 0xfda40000 0x00 0x100>; + + pvtm@0 { + clock-names = "clk\0pclk"; + clocks = <0x02 0x2c6 0x02 0x15>; + reg = <0x00>; + }; + }; + + pwm@fd8b0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x7f>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0010 0x00 0x10>; + phandle = <0x262>; + }; + + i2s@fddc0000 { + power-domains = <0x60 0x19>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x1f9>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x38d>; + interrupts = <0x00 0xb8 0x04>; + clocks = <0x02 0x1fb 0x02 0x1fb 0x02 0x1f0>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "disabled"; + reg = <0x00 0xfddc0000 0x00 0x1000>; + phandle = <0x27d>; + dmas = <0xf2 0x00>; + reset-names = "tx-m"; + }; + + qos@fdf61400 { + compatible = "syscon"; + reg = <0x00 0xfdf61400 0x00 0x20>; + phandle = <0x92>; + }; + + syscon@fd5d4000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d4000 0x00 0x4000>; + phandle = <0x1c8>; + + usb2-phy@4000 { + clock-output-names = "usb480m_phy1"; + clock-names = "phyclk"; + resets = <0x02 0xc0048 0x02 0x489>; + interrupts = <0x00 0x18a 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + rockchip,usbctrl-grf = <0x74>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0x4000 0x10>; + phandle = <0x1ca>; + reset-names = "phy\0apb"; + + otg-port { + phy-supply = <0x75>; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a3>; + }; + }; + }; + + rkisp0-vir1 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23c>; + }; + + pwm@febe0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x16e>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0010 0x00 0x10>; + phandle = <0x2d6>; + }; + + thermal-zones { + phandle = <0x248>; + + bigcore1-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x02>; + phandle = <0x24d>; + }; + + soc-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x00>; + sustainable-power = <0x834>; + phandle = <0x249>; + + trips { + + trip-point-0 { + temperature = <0x124f8>; + hysteresis = <0x7d0>; + type = "passive"; + phandle = <0x24a>; + }; + + trip-point-1 { + temperature = <0x14c08>; + hysteresis = <0x7d0>; + type = "passive"; + phandle = <0x5e>; + }; + + soc-crit { + temperature = <0x1c138>; + hysteresis = <0x7d0>; + type = "critical"; + phandle = <0x24b>; + }; + }; + + cooling-maps { + + map2 { + trip = <0x5e>; + cooling-device = <0x0c 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + + map0 { + trip = <0x5e>; + cooling-device = <0x06 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + + map3 { + trip = <0x5e>; + cooling-device = <0x5f 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + + map1 { + trip = <0x5e>; + cooling-device = <0x0a 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + }; + }; + + npu-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x06>; + phandle = <0x251>; + }; + + center-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x04>; + phandle = <0x24f>; + }; + + gpu-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x05>; + phandle = <0x250>; + }; + + littlecore-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x03>; + phandle = <0x24e>; + }; + + bigcore0-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x01>; + phandle = <0x24c>; + }; + }; + + iommu@fdbdf000 { + power-domains = <0x60 0x10>; + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x63 0x04 0x00 0x64 0x04>; + clocks = <0x02 0x1c5 0x02 0x1c4>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvenc0_mmu0\0irq_rkvenc0_mmu1"; + reg = <0x00 0xfdbdf000 0x00 0x40 0x00 0xfdbdf040 0x00 0x40>; + phandle = <0xc2>; + }; + + serial@feb50000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x161>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14d 0x04>; + clocks = <0x02 0xbb 0x02 0xac>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb50000 0x00 0x100>; + phandle = <0x2ca>; + dmas = <0x7c 0x0a 0x7c 0x0b>; + reg-shift = <0x02>; + }; + + iommu@fdcd0f00 { + power-domains = <0x60 0x1d>; + clock-names = "aclk\0iface\0pclk"; + interrupts = <0x00 0x8c 0x04>; + clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "fec0_mmu"; + reg = <0x00 0xfdcd0f00 0x00 0x100>; + phandle = <0xd2>; + }; + + vcc5v0-host { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + gpio = <0x182 0x02 0x00>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_host"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x75>; + vin-supply = <0x1dd>; + }; + + qos@fdf66a00 { + compatible = "syscon"; + reg = <0x00 0xfdf66a00 0x00 0x20>; + phandle = <0x98>; + }; + + phy@fed90000 { + clock-names = "refclk\0immortal\0pclk\0utmi"; + resets = <0x02 0x2f 0x02 0x30 0x02 0x31 0x02 0x32 0x02 0x484>; + clocks = <0x02 0x2b6 0x02 0x280 0x02 0x26a 0x1ca>; + compatible = "rockchip,rk3588-usbdp-phy"; + status = "okay"; + rockchip,dp-lane-mux = <0x02 0x03>; + reg = <0x00 0xfed90000 0x00 0x10000>; + phandle = <0x48b>; + rockchip,usb-grf = <0x74>; + reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; + rockchip,u2phy-grf = <0x1c8>; + rockchip,usbdpphy-grf = <0x1c9>; + rockchip,vo-grf = <0xf5>; + + dp-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a5>; + }; + + u3-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a4>; + }; + }; + + jpege-core@fdba0000 { + power-domains = <0x60 0x15>; + iommus = <0xbc>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1ac>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2ca 0x02 0x2cb>; + interrupts = <0x00 0x7a 0x04>; + clocks = <0x02 0x1ac 0x02 0x1ad>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege0"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdba0000 0x00 0x400>; + phandle = <0x26d>; + reset-names = "video_a\0video_h"; + }; + + vcc5v0-sys { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_sys"; + compatible = "regulator-fixed"; + phandle = <0x78>; + vin-supply = <0x1cd>; + }; + + pwm@fd8b0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x7e>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0000 0x00 0x10>; + phandle = <0x261>; + }; + + vop@fdd90000 { + power-domains = <0x60 0x18>; + iommus = <0xd6>; + rockchip,vop-grf = <0xd7>; + clock-names = "aclk_vop\0hclk_vop\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0pclk_vop\0dclk_src_vp0\0dclk_src_vp1\0dclk_src_vp2"; + reg-names = "regs\0gamma_lut"; + assigned-clocks = <0x02 0x270>; + assigned-clock-rates = <0x2cb41780>; + resets = <0x02 0x349 0x02 0x348 0x02 0x34d 0x02 0x350 0x02 0x351 0x02 0x352>; + interrupts = <0x00 0x9c 0x04>; + clocks = <0x02 0x270 0x02 0x26f 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x02 0x26e 0x02 0x271 0x02 0x272 0x02 0x273>; + compatible = "rockchip,rk3588-vop"; + rockchip,pmu = <0xd9>; + status = "okay"; + rockchip,grf = <0xc8>; + reg = <0x00 0xfdd90000 0x00 0x4200 0x00 0xfdd95000 0x00 0x1000>; + phandle = <0x278>; + rockchip,vo1-grf = <0xd8>; + reset-names = "axi\0ahb\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + phandle = <0x34>; + + port@0 { + rockchip,primary-plane = <0x02>; + rockchip,plane-mask = <0x05>; + #address-cells = <0x01>; + assigned-clocks = <0x02 0x270>; + assigned-clock-rates = <0x2faf0800>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x279>; + + endpoint@5 { + remote-endpoint = <0xdf>; + reg = <0x05>; + phandle = <0x1ad>; + }; + + endpoint@3 { + remote-endpoint = <0xdd>; + reg = <0x03>; + phandle = <0x1a6>; + }; + + endpoint@1 { + remote-endpoint = <0xdb>; + reg = <0x01>; + phandle = <0x102>; + }; + + endpoint@4 { + remote-endpoint = <0xde>; + reg = <0x04>; + phandle = <0x1b0>; + }; + + endpoint@2 { + remote-endpoint = <0xdc>; + reg = <0x02>; + phandle = <0x3c>; + }; + + endpoint@0 { + remote-endpoint = <0xda>; + reg = <0x00>; + phandle = <0xf7>; + }; + }; + + port@3 { + rockchip,primary-plane = <0x09>; + rockchip,plane-mask = <0x280>; + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x03>; + phandle = <0x27c>; + + endpoint@1 { + remote-endpoint = <0xef>; + reg = <0x01>; + phandle = <0x3a>; + }; + + endpoint@2 { + remote-endpoint = <0xf0>; + reg = <0x02>; + phandle = <0x3d>; + }; + + endpoint@0 { + remote-endpoint = <0xee>; + reg = <0x00>; + phandle = <0x39>; + }; + }; + + port@1 { + rockchip,primary-plane = <0x03>; + rockchip,plane-mask = <0x0a>; + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + phandle = <0x27a>; + + endpoint@5 { + remote-endpoint = <0xe5>; + reg = <0x05>; + phandle = <0x3f>; + }; + + endpoint@3 { + remote-endpoint = <0xe3>; + reg = <0x03>; + phandle = <0x3e>; + }; + + endpoint@1 { + remote-endpoint = <0xe1>; + reg = <0x01>; + phandle = <0x103>; + }; + + endpoint@4 { + remote-endpoint = <0xe4>; + reg = <0x04>; + phandle = <0x1b1>; + }; + + endpoint@2 { + remote-endpoint = <0xe2>; + reg = <0x02>; + phandle = <0xff>; + }; + + endpoint@0 { + remote-endpoint = <0xe0>; + reg = <0x00>; + phandle = <0x38>; + }; + }; + + port@2 { + rockchip,primary-plane = <0x08>; + rockchip,plane-mask = <0x140>; + #address-cells = <0x01>; + assigned-clocks = <0x02 0x273>; + assigned-clock-parents = <0x02 0x04>; + #size-cells = <0x00>; + reg = <0x02>; + phandle = <0x27b>; + + endpoint@5 { + remote-endpoint = <0xeb>; + reg = <0x05>; + phandle = <0x1a7>; + }; + + endpoint@3 { + remote-endpoint = <0xe9>; + reg = <0x03>; + phandle = <0xf3>; + }; + + endpoint@1 { + remote-endpoint = <0xe7>; + reg = <0x01>; + phandle = <0x3b>; + }; + + endpoint@6 { + remote-endpoint = <0xec>; + reg = <0x06>; + phandle = <0x1b2>; + }; + + endpoint@4 { + remote-endpoint = <0xea>; + reg = <0x04>; + phandle = <0xf4>; + }; + + endpoint@2 { + remote-endpoint = <0xe8>; + reg = <0x02>; + phandle = <0x100>; + }; + + endpoint@0 { + remote-endpoint = <0xe6>; + reg = <0x00>; + phandle = <0xf8>; + }; + + endpoint@7 { + remote-endpoint = <0xed>; + reg = <0x07>; + phandle = <0x1ae>; + }; + }; + }; + }; + + csi2-dphy1 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x210>; + }; + + pwm@febe0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x16d>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0000 0x00 0x10>; + phandle = <0x2d5>; + }; + + clocks { + #address-cells = <0x02>; + #size-cells = <0x02>; + compatible = "simple-bus"; + ranges; + + hclk_nvm@fd7c087c { + clock-names = "link"; + clocks = <0x02 0x141>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c087c 0x00 0x10>; + phandle = <0x03>; + }; + + mclkin-i2s0 { + clock-output-names = "i2s0_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x204>; + }; + + hclk_rkvenc1_pre@fd7c08c0 { + clock-names = "link"; + clocks = <0x02 0x1c4>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08c0 0x00 0x10>; + phandle = <0x1fe>; + }; + + mclkout-i2s1@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s1_mclkout_to_io"; + clocks = <0x02 0x291>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x208>; + rockchip,bit-shift = <0x01>; + }; + + mclkout-i2s1@fd58a000 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s1m1_mclkout_to_io"; + clocks = <0x02 0x291>; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58a000 0x00 0x04>; + phandle = <0x209>; + rockchip,bit-shift = <0x06>; + }; + + aclk_hdcp0_pre@fd7c08dc { + clock-names = "link"; + clocks = <0x02 0x26c>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x10>; + phandle = <0x1ff>; + }; + + xin32k { + clock-output-names = "xin32k"; + #clock-cells = <0x00>; + clock-frequency = <0x8000>; + compatible = "fixed-clock"; + phandle = <0x1f2>; + }; + + aclk_usb@fd7c08a8 { + clock-names = "link"; + clocks = <0x02 0x263>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a8 0x00 0x10>; + phandle = <0x6a>; + }; + + hclk_usb@fd7c08a8 { + clock-names = "link"; + clocks = <0x02 0x264>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a8 0x00 0x10>; + phandle = <0x1f5>; + }; + + hclk_vo0@fd7c08dc { + clock-names = "link"; + clocks = <0x02 0x26d>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x10>; + phandle = <0x04>; + }; + + pclk_av1_pre@fd7c0910 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0910 0x00 0x10>; + phandle = <0x201>; + }; + + mclkout-i2s2@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s2_mclkout_to_io"; + clocks = <0x02 0x28>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x20a>; + rockchip,bit-shift = <0x02>; + }; + + aclk_vdpu_low_pre@fd7c08b0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08b0 0x00 0x10>; + phandle = <0x1f4>; + }; + + mclkin-i2s3 { + clock-output-names = "i2s3_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x207>; + }; + + spll { + clock-output-names = "spll"; + #clock-cells = <0x00>; + clock-frequency = <0x29d7ab80>; + compatible = "fixed-clock"; + phandle = <0x1f1>; + }; + + xin24m { + clock-output-names = "xin24m"; + #clock-cells = <0x00>; + clock-frequency = <0x16e3600>; + compatible = "fixed-clock"; + phandle = <0x1f3>; + }; + + aclk_av1_pre@fd7c0910 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0910 0x00 0x10>; + phandle = <0x202>; + }; + + pclk_vo0_grf@fd7c08dc { + clock-names = "link"; + clocks = <0x04>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x04>; + phandle = <0x72>; + }; + + aclk_jpeg_decoder_pre@fd7c08b0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08b0 0x00 0x10>; + phandle = <0x1fc>; + }; + + aclk_hdcp1_pre@fd7c08ec { + clock-names = "link"; + clocks = <0x02 0x263>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x10>; + phandle = <0x200>; + }; + + mclkin-i2s1 { + clock-output-names = "i2s1_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x205>; + }; + + hclk_vo1@fd7c08ec { + clock-names = "link"; + clocks = <0x02 0x264>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x10>; + phandle = <0x05>; + }; + + mclkout-i2s3@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s3_mclkout_to_io"; + clocks = <0x02 0x2e>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x20b>; + rockchip,bit-shift = <0x07>; + }; + + aclk_rkvdec0_pre@fd7c08a0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a0 0x00 0x10>; + phandle = <0x1f8>; + }; + + aclk_isp1_pre@fd7c0868 { + clock-names = "link"; + clocks = <0x02 0x1e0>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0868 0x00 0x10>; + phandle = <0x1f7>; + }; + + pclk_vo1_grf@fd7c08ec { + clock-names = "link"; + clocks = <0x05>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x04>; + phandle = <0x73>; + }; + + aclk_rkvdec1_pre@fd7c08a4 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a4 0x00 0x10>; + phandle = <0x1fa>; + }; + + hclk_rkvdec0_pre@fd7c08a0 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a0 0x00 0x10>; + phandle = <0x1f9>; + }; + + hclk_sdio_pre@fd7c092c { + clock-names = "link"; + clocks = <0x03>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c092c 0x00 0x10>; + phandle = <0x203>; + }; + + hclk_rkvdec1_pre@fd7c08a4 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a4 0x00 0x10>; + phandle = <0x1fb>; + }; + + hclk_isp1_pre@fd7c0868 { + clock-names = "link"; + clocks = <0x02 0x1e1>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0868 0x00 0x10>; + phandle = <0x1f6>; + }; + + mclkout-i2s0@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s0_mclkout_to_io"; + clocks = <0x02 0x39>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x179>; + rockchip,bit-shift = <0x00>; + }; + + mclkin-i2s2 { + clock-output-names = "i2s2_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x206>; + }; + + aclk_rkvenc1_pre@fd7c08c0 { + clock-names = "link"; + clocks = <0x02 0x1c5>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08c0 0x00 0x10>; + phandle = <0x1fd>; + }; + }; + + usb@fc8c0000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + interrupts = <0x00 0xdb 0x04>; + clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; + compatible = "rockchip,rk3588-ohci\0generic-ohci"; + status = "okay"; + phys = <0x6f>; + reg = <0x00 0xfc8c0000 0x00 0x40000>; + phandle = <0x6e>; + }; + + qos@fdf40000 { + compatible = "syscon"; + reg = <0x00 0xfdf40000 0x00 0x20>; + phandle = <0xa8>; + }; + + mipi0-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x224>; + }; + + cluster1-opp-table { + rockchip,pvtm-offset = <0x18>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0x24 0x25 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,pvtm-low-len-sel = <0x03>; + rockchip,high-temp-max-freq = <0x21b100>; + opp-shared; + rockchip,reboot-freq = <0x1b7740>; + rockchip,pvtm-freq = <0x188940>; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x26>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; + phandle = <0x16>; + rockchip,idle-threshold-freq = <0x21b100>; + rockchip,pvtm-temp-prop = <0x10e 0x10e>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0xf6180>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-2016000000 { + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + }; + + opp-1200000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1416000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-supported-hw = <0x06 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-1008000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2256000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8677d400>; + opp-supported-hw = <0xf9 0x13>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1200000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1008000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-816000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2400000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8f0d1800>; + opp-supported-hw = <0xf9 0x80>; + clock-latency-ns = <0x9c40>; + }; + + opp-1800000000 { + opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2208000000 { + opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; + opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-microvolt-L2 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-hz = <0x00 0x839b6800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + opp-microvolt-L3 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; + }; + + opp-1608000000 { + opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-408000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1800000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + }; + + opp-2352000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8c30ac00>; + opp-supported-hw = <0xf9 0x48>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1608000000 { + opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2016000000 { + opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; + opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; + opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + }; + + opp-1416000000 { + opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-hz = <0x00 0x54667200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; + opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-408000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0xf9 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-2304000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x89544000>; + opp-supported-hw = <0xf9 0x24>; + clock-latency-ns = <0x9c40>; + }; + }; + + mmc@fe2d0000 { + power-domains = <0x60 0x25>; + fifo-depth = <0x100>; + pinctrl-names = "default"; + pinctrl-0 = <0x119>; + clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; + interrupts = <0x00 0xcc 0x04>; + clocks = <0x02 0x199 0x02 0x19a 0x02 0x2c0 0x02 0x2c1>; + compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; + status = "disabled"; + reg = <0x00 0xfe2d0000 0x00 0x4000>; + phandle = <0x294>; + max-frequency = <0xbebc200>; + }; + + rkcif-mipi-lvds-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22e>; + }; + + serial@feb90000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x165>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x151 0x04>; + clocks = <0x02 0xcb 0x02 0xb0>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "okay"; + reg = <0x00 0xfeb90000 0x00 0x100>; + phandle = <0x2ce>; + dmas = <0xf1 0x0d 0xf1 0x0e>; + reg-shift = <0x02>; + }; + + i2s@fddf8000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x239>; + assigned-clock-parents = <0x02 0x05>; + rockchip,capture-only; + resets = <0x02 0x3c3>; + interrupts = <0x00 0xbb 0x04>; + clocks = <0x02 0x23c 0x02 0x23c 0x02 0x238>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "okay"; + reg = <0x00 0xfddf8000 0x00 0x1000>; + phandle = <0x1ec>; + dmas = <0xf2 0x15>; + reset-names = "rx-m"; + }; + + phy@fee20000 { + rockchip,pipe-grf = <0x76>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2bf>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20007 0x02 0x4d8>; + clocks = <0x02 0x2bf 0x02 0x187 0x02 0x166>; + #phy-cells = <0x01>; + compatible = "rockchip,rk3588-naneng-combphy"; + status = "disabled"; + rockchip,pipe-phy-grf = <0x195>; + reg = <0x00 0xfee20000 0x00 0x100>; + phandle = <0x70>; + reset-names = "combphy-apb\0combphy"; + rockchip,pcie1ln-sel-bits = <0x100 0x01 0x01 0x00>; + }; + + csi2-dphy0-hw@fedc0000 { + clock-names = "pclk"; + resets = <0x02 0x17 0x02 0x16>; + clocks = <0x02 0x10c>; + compatible = "rockchip,rk3588-csi2-dphy-hw"; + status = "okay"; + rockchip,grf = <0x192>; + reg = <0x00 0xfedc0000 0x00 0x8000>; + phandle = <0x2d>; + reset-names = "srst_csiphy0\0srst_p_csiphy0"; + rockchip,sys_grf = <0xc8>; + }; + + can@fea70000 { + pinctrl-names = "default"; + pinctrl-0 = <0x147>; + clock-names = "baudclk\0apb_pclk"; + resets = <0x02 0xbd 0x02 0xbc>; + interrupts = <0x00 0x157 0x04>; + clocks = <0x02 0x74 0x02 0x73>; + compatible = "rockchip,can-2.0"; + status = "disabled"; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + reg = <0x00 0xfea70000 0x00 0x1000>; + phandle = <0x2a2>; + reset-names = "can\0can-apb"; + }; + + mailbox@fec60000 { + clock-names = "pclk_mailbox"; + interrupts = <0x00 0x3d 0x04 0x00 0x3e 0x04 0x00 0x3f 0x04 0x00 0x40 0x04>; + clocks = <0x02 0x4c>; + #mbox-cells = <0x01>; + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + status = "disabled"; + reg = <0x00 0xfec60000 0x00 0x200>; + phandle = <0x2dd>; + }; + + usbdrd3_1 { + #address-cells = <0x02>; + clock-names = "ref\0suspend\0bus"; + clocks = <0x02 0x1a6 0x02 0x1a5 0x02 0x1a4>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + ranges; + status = "okay"; + phandle = <0x47a>; + + usb@fc400000 { + power-domains = <0x60 0x1f>; + snps,dis-u1-entry-quirk; + snps,dis_enblslpm_quirk; + phy-names = "usb2-phy\0usb3-phy"; + snps,dis-u2-freeclk-exists-quirk; + phy_type = "utmi_wide"; + resets = <0x02 0x2a7>; + interrupts = <0x00 0xdd 0x04>; + snps,dis-u2-entry-quirk; + compatible = "snps,dwc3"; + snps,parkmode-disable-hs-quirk; + snps,dis-del-phy-power-chg-quirk; + status = "okay"; + snps,parkmode-disable-ss-quirk; + phys = <0x1a3 0x1a4>; + reg = <0x00 0xfc400000 0x00 0x400000>; + phandle = <0x47b>; + dr_mode = "host"; + reset-names = "usb3-otg"; + snps,dis-tx-ipgap-linecheck-quirk; + }; + }; + + sata@fe210000 { + phy-names = "sata-phy"; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x111 0x04>; + clocks = <0x02 0x171 0x02 0x16e 0x02 0x174 0x02 0x163 0x02 0x17e>; + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + status = "okay"; + interrupt-names = "hostc"; + phys = <0x108 0x01>; + reg = <0x00 0xfe210000 0x00 0x1000>; + phandle = <0x290>; + ports-implemented = <0x01>; + }; + + leds { + compatible = "gpio-leds"; + status = "okay"; + phandle = <0x497>; + + user { + linux,default-trigger = "ir-user-click"; + label = ":user"; + default-state = "off"; + phandle = <0x499>; + gpios = <0x182 0x03 0x00>; + }; + + power { + linux,default-trigger = "ir-power-click"; + label = ":power"; + default-state = "on"; + status = "disabled"; + phandle = <0x498>; + gpios = <0x7b 0x15 0x00>; + }; + }; + + rkcif-mipi-lvds5-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x479>; + }; + + qos@fdf80000 { + compatible = "syscon"; + reg = <0x00 0xfdf80000 0x00 0x20>; + phandle = <0x9f>; + }; + + spdif-tx@fdde0000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x254>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc4 0x04>; + clocks = <0x02 0x257 0x02 0x253>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfdde0000 0x00 0x1000>; + phandle = <0x27e>; + dmas = <0xf1 0x07>; + }; + + qos@fdf35000 { + compatible = "syscon"; + reg = <0x00 0xfdf35000 0x00 0x20>; + phandle = <0x87>; + }; + + psci { + method = "smc"; + compatible = "arm,psci-1.0"; + }; + + rkcif-mipi-lvds { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x52>; + }; + + rga@fdb80000 { + power-domains = <0x60 0x15>; + clock-names = "aclk_rga2\0hclk_rga2\0clk_rga2"; + interrupts = <0x00 0x74 0x04>; + clocks = <0x02 0x1b7 0x02 0x1b6 0x02 0x1b8>; + compatible = "rockchip,rga2_core0"; + status = "okay"; + interrupt-names = "rga2_irq"; + reg = <0x00 0xfdb80000 0x00 0x1000>; + phandle = <0x26b>; + }; + + qos@fdf66800 { + compatible = "syscon"; + reg = <0x00 0xfdf66800 0x00 0x20>; + phandle = <0x97>; + }; + + spi@feb10000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x151 0x152 0x153>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x147 0x04>; + clocks = <0x02 0xa4 0x02 0x9f>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfeb10000 0x00 0x1000>; + phandle = <0x2ac>; + dmas = <0x7c 0x10 0x7c 0x11>; + }; + + rkcif-mipi-lvds4-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x472>; + }; + + hdmi@fdea0000 { + power-domains = <0x60 0x1a>; + reg-io-width = <0x04>; + pinctrl-names = "default"; + phy-names = "hdmi"; + pinctrl-0 = <0x1a8 0x1a9 0x1aa 0x1ab>; + clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; + resets = <0x02 0x3d7 0x02 0x49d>; + interrupts = <0x00 0xad 0x04 0x00 0xae 0x04 0x00 0xaf 0x04 0x00 0xb0 0x04 0x00 0x169 0x04>; + clocks = <0x02 0x224 0x02 0x266 0x02 0x225 0x02 0x226 0x02 0x24c 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x36>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-dw-hdmi"; + status = "disabled"; + rockchip,grf = <0xc8>; + phys = <0x1ac>; + reg = <0x00 0xfdea0000 0x00 0x10000 0x00 0xfdeb0000 0x00 0x10000>; + phandle = <0x1e1>; + reset-names = "ref\0hdp"; + rockchip,vo1_grf = <0xd8>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x482>; + + endpoint@1 { + remote-endpoint = <0x3f>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe5>; + }; + + endpoint@2 { + remote-endpoint = <0x1ae>; + status = "disabled"; + reg = <0x02>; + phandle = <0xed>; + }; + + endpoint@0 { + remote-endpoint = <0x1ad>; + status = "disabled"; + reg = <0x00>; + phandle = <0xdf>; + }; + }; + }; + }; + + pcie@fe180000 { + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x30 0x3f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x08>; + resets = <0x02 0x210 0x02 0x21f>; + interrupts = <0x00 0xf8 0x04 0x00 0xf7 0x04 0x00 0xf6 0x04 0x00 0xf5 0x04 0x00 0xf4 0x04>; + clocks = <0x02 0x151 0x02 0x156 0x02 0x14c 0x02 0x15c 0x02 0x161 0x02 0x2c5>; + interrupt-map = <0x00 0x00 0x00 0x01 0x105 0x00 0x00 0x00 0x00 0x02 0x105 0x01 0x00 0x00 0x00 0x03 0x105 0x02 0x00 0x00 0x00 0x04 0x105 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x02>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf3000000 0x00 0xf3000000 0x00 0x100000 0x81000000 0x00 0xf3100000 0x00 0xf3100000 0x00 0x100000 0x82000000 0x00 0xf3200000 0x00 0xf3200000 0x00 0xe00000 0xc3000000 0x09 0xc0000000 0x09 0xc0000000 0x00 0x40000000>; + msi-map = <0x3000 0x106 0x3000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x70 0x02>; + num-viewport = <0x04>; + reg = <0x00 0xfe180000 0x00 0x10000 0x0a 0x40c00000 0x00 0x400000>; + linux,pci-domain = <0x03>; + phandle = <0x28c>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x08>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xf5 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x105>; + interrupt-controller; + }; + }; + + i2s@fe480000 { + pinctrl-names = "default"; + pinctrl-0 = <0x120 0x121 0x122 0x123 0x124 0x125 0x126 0x127 0x128 0x129>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + resets = <0x02 0xc002a 0x02 0xc002d>; + interrupts = <0x00 0xb5 0x04>; + clocks = <0x02 0x28c 0x02 0x290 0x02 0x288>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "disabled"; + reg = <0x00 0xfe480000 0x00 0x1000>; + phandle = <0x1d1>; + dmas = <0x7c 0x02 0x7c 0x03>; + reset-names = "tx-m\0rx-m"; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd5c0000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5c0000 0x00 0x100>; + phandle = <0x1cb>; + }; + + i2c@feab0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x14a>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb2 0x02 0xaa>; + interrupts = <0x00 0x140 0x04>; + clocks = <0x02 0x8f 0x02 0x87>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfeab0000 0x00 0x1000>; + phandle = <0x2a6>; + reset-names = "i2c\0apb"; + + gpio@21 { + gpio-controller; + gpio-group-num = <0xc8>; + compatible = "nxp,pca9555"; + status = "okay"; + reg = <0x21>; + phandle = <0x182>; + #gpio-cells = <0x02>; + }; + }; + + iommu@fdcb7f00 { + power-domains = <0x60 0x1b>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x84 0x04>; + clocks = <0x02 0x1de 0x02 0x1df>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "isp0_mmu"; + reg = <0x00 0xfdcb7f00 0x00 0x100>; + phandle = <0xd0>; + }; + + qos@fdf3e600 { + compatible = "syscon"; + reg = <0x00 0xfdf3e600 0x00 0x20>; + phandle = <0xae>; + }; + + syscon@fd5b8000 { + compatible = "rockchip,pcie30-phy-grf\0syscon"; + reg = <0x00 0xfd5b8000 0x00 0x10000>; + phandle = <0x1cc>; + }; + + qos@fdf81200 { + compatible = "syscon"; + reg = <0x00 0xfdf81200 0x00 0x20>; + phandle = <0xa1>; + }; + + mipi5-csi2-hw@fdd60000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x329>; + interrupts = <0x00 0x99 0x04 0x00 0x9a 0x04>; + clocks = <0x02 0x1d4>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd60000 0x00 0x10000>; + phandle = <0x4c>; + reset-names = "srst_csihost_p"; + }; + + qos@fdf72000 { + compatible = "syscon"; + reg = <0x00 0xfdf72000 0x00 0x20>; + phandle = <0x82>; + }; + + timer@feae0000 { + clock-names = "pclk\0timer"; + interrupts = <0x00 0x121 0x04>; + clocks = <0x02 0x5c 0x02 0x5f>; + compatible = "rockchip,rk3588-timer\0rockchip,rk3288-timer"; + reg = <0x00 0xfeae0000 0x00 0x20>; + phandle = <0x2a9>; + }; + + rkcif-mipi-lvds-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22c>; + }; + + syscon@fd5b5000 { + compatible = "rockchip,mipi-dphy-grf\0syscon"; + reg = <0x00 0xfd5b5000 0x00 0x1000>; + phandle = <0x193>; + }; + + i2c@fec90000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x185>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb6 0x02 0xae>; + interrupts = <0x00 0x144 0x04>; + clocks = <0x02 0x93 0x02 0x8b>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfec90000 0x00 0x1000>; + phandle = <0x2e4>; + reset-names = "i2c\0apb"; + }; + + avsd-plus@fdb51000 { + power-domains = <0x60 0x15>; + iommus = <0xb7>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1c0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + interrupts = <0x00 0x77 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,disable-auto-freq; + compatible = "rockchip,avs-plus-decoder"; + rockchip,resetgroup-node = <0x00>; + status = "disabled"; + interrupt-names = "irq_avsd"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb51000 0x00 0x200>; + phandle = <0x268>; + reset-names = "shared_video_a\0shared_video_h"; + }; + + dp1-sound { + rockchip,jack-det; + rockchip,cpu = <0x1e2>; + rockchip,codec = <0x1e3 0x01>; + rockchip,card-name = "rockchip,dp1"; + compatible = "rockchip,hdmi"; + status = "disabled"; + phandle = <0x4a9>; + rockchip,mclk-fs = <0x200>; + }; + + mipi1-csi2-hw@fdd20000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x325>; + interrupts = <0x00 0x91 0x04 0x00 0x92 0x04>; + clocks = <0x02 0x1d0>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd20000 0x00 0x10000>; + phandle = <0x48>; + reset-names = "srst_csihost_p"; + }; + + iep@fdbb0000 { + power-domains = <0x60 0x15>; + iommus = <0xc1>; + clock-names = "aclk\0hclk\0sclk"; + assigned-clocks = <0x02 0x1aa>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2d5 0x02 0x2d4 0x02 0x2d6>; + interrupts = <0x00 0x75 0x04>; + clocks = <0x02 0x1aa 0x02 0x1a9 0x02 0x1ab>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x06>; + rockchip,disable-auto-freq; + compatible = "rockchip,iep-v2"; + status = "okay"; + interrupt-names = "irq_iep"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbb0000 0x00 0x500>; + phandle = <0x271>; + reset-names = "rst_a\0rst_h\0rst_s"; + }; + + dsi@fde20000 { + power-domains = <0x60 0x18>; + #address-cells = <0x01>; + phy-names = "dcphy"; + clock-names = "pclk\0sys_clk"; + resets = <0x02 0x354>; + interrupts = <0x00 0xa7 0x04>; + clocks = <0x02 0x278 0x02 0x27a>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dsi2"; + status = "disabled"; + rockchip,grf = <0xd7>; + phys = <0x2f>; + reg = <0x00 0xfde20000 0x00 0x10000>; + phandle = <0x281>; + reset-names = "apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x282>; + + endpoint@1 { + remote-endpoint = <0x39>; + status = "disabled"; + reg = <0x01>; + phandle = <0xee>; + }; + + endpoint@0 { + remote-endpoint = <0xf3>; + status = "disabled"; + reg = <0x00>; + phandle = <0xe9>; + }; + }; + }; + }; + + rkcif-mipi-lvds5-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x477>; + }; + + edp@fded0000 { + power-domains = <0x60 0x1a>; + phy-names = "dp"; + clock-names = "dp\0pclk\0spdif\0hclk"; + resets = <0x02 0x3e4 0x02 0x3e3>; + interrupts = <0x00 0xa4 0x04>; + clocks = <0x02 0x214 0x02 0x213 0x02 0x215 0x05>; + compatible = "rockchip,rk3588-edp"; + status = "disabled"; + rockchip,grf = <0xd8>; + phys = <0x1af>; + reg = <0x00 0xfded0000 0x00 0x1000>; + phandle = <0x483>; + reset-names = "dp\0apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x1b1>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe4>; + }; + + endpoint@2 { + remote-endpoint = <0x1b2>; + status = "disabled"; + reg = <0x02>; + phandle = <0xec>; + }; + + endpoint@0 { + remote-endpoint = <0x1b0>; + status = "disabled"; + reg = <0x00>; + phandle = <0xde>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x484>; + }; + }; + }; + }; + + qos@fdf67000 { + compatible = "syscon"; + reg = <0x00 0xfdf67000 0x00 0x20>; + phandle = <0x9c>; + }; + + qos@fdf64000 { + compatible = "syscon"; + reg = <0x00 0xfdf64000 0x00 0x20>; + phandle = <0x9b>; + }; + + npu-opp-table { + rockchip,pvtm-offset = <0x50>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,init-freq = <0xf4240>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0xb4 0xb5 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; + rockchip,pvtm-thermal-zone = "npu-thermal"; + rockchip,high-temp-max-freq = "\0\f5"; + rockchip,opp-clocks = <0x02 0x12a 0x02 0x12f>; + rockchip,pvtm-freq = "\0\f5"; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0xb6>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; + phandle = <0xb1>; + rockchip,pvtm-temp-prop = <0xffffff8f 0xffffff8f>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0x7a120>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-700000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-300000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-500000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-j-m-400000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-700000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-j-m-950000000 { + opp-microvolt = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + opp-microvolt-L4 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L2 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-hz = <0x00 0x389fd980>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L5 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-microvolt-L3 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L1 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-900000000 { + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-hz = <0x00 0x35a4e900>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; + + opp-j-m-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-400000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-j-m-300000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-600000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-1000000000 { + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-hz = <0x00 0x3b9aca00>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + }; + + opp-j-m-500000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L4 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; + opp-microvolt-L2 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L3 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; + }; + }; + + syscon@fd590000 { + compatible = "rockchip,rk3588-bigcore0-grf\0syscon"; + reg = <0x00 0xfd590000 0x00 0x100>; + phandle = <0x26>; + }; + + syscon@fd5dc000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5dc000 0x00 0x4000>; + phandle = <0x25e>; + + usb2-phy@c000 { + clock-output-names = "usb480m_phy3"; + clock-names = "phyclk"; + resets = <0x02 0xc004a 0x02 0x48b>; + interrupts = <0x00 0x188 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0xc000 0x10>; + phandle = <0x6d>; + reset-names = "phy\0apb"; + + host-port { + phy-supply = <0x75>; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x6f>; + }; + }; + }; + + pcie-clk3 { + regulator-boot-on; + regulator-always-on; + regulator-name = "pcie_clk3"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x496>; + gpios = <0xfe 0x09 0x01>; + }; + + pwm@febf0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x174>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04 0x00 0x15f 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0030 0x00 0x10>; + phandle = <0x2dc>; + }; + + hwspinlock@fe5a0000 { + compatible = "rockchip,hwspinlock"; + reg = <0x00 0xfe5a0000 0x00 0x100>; + phandle = <0x29f>; + #hwlock-cells = <0x01>; + }; + + rkcif-mipi-lvds4-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x474>; + }; + + sram@10f000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "mmio-sram"; + ranges = <0x00 0x00 0x10f000 0x100>; + reg = <0x00 0x10f000 0x00 0x100>; + + sram@0 { + compatible = "arm,scmi-shmem"; + reg = <0x00 0x100>; + phandle = <0x46>; + }; + }; + + hdmirx-controller@fdee0000 { + power-domains = <0x60 0x1a>; + pinctrl-names = "default"; + pinctrl-0 = <0x1b3 0x1b4>; + clock-names = "aclk\0audio\0cr_para\0pclk\0ref\0hclk_s_hdmirx\0hclk_vo1"; + reg-names = "hdmirx_regs"; + resets = <0x02 0x3d9 0x02 0x3da 0x02 0x3db 0x02 0x3b7>; + interrupts = <0x00 0xb1 0x04 0x00 0x1b4 0x04 0x00 0xb3 0x04>; + clocks = <0x02 0x21a 0x02 0x21f 0x02 0x2b2 0x02 0x21b 0x02 0x21c 0x02 0x232 0x05>; + hpd-trigger-level = <0x01>; + #sound-dai-cells = <0x01>; + compatible = "rockchip,rk3588-hdmirx-ctrler\0rockchip,hdmirx-ctrler"; + status = "disabled"; + rockchip,grf = <0xc8>; + interrupt-names = "cec\0hdmi\0dma"; + hdmirx-det-gpios = <0xfe 0x1d 0x01>; + reg = <0x00 0xfdee0000 0x00 0x6000>; + phandle = <0x1eb>; + reset-names = "rst_a\0rst_p\0rst_ref\0rst_biu"; + rockchip,vo1_grf = <0xd8>; + }; + + qos@fdf61000 { + compatible = "syscon"; + reg = <0x00 0xfdf61000 0x00 0x20>; + phandle = <0x90>; + }; + + qos@fdf40600 { + compatible = "syscon"; + reg = <0x00 0xfdf40600 0x00 0x20>; + phandle = <0xa4>; + }; + + syscon@fd588000 { + compatible = "rockchip,rk3588-pmu0-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd588000 0x00 0x2000>; + phandle = <0x25a>; + + reboot-mode { + mode-normal = <0x5242c300>; + mode-loader = <0x5242c301>; + mode-quiescent = <0x5242c30e>; + mode-bootloader = <0x5242c301>; + mode-recovery = <0x5242c303>; + mode-watchdog = <0x5242c308>; + mode-ums = <0x5242c30c>; + mode-fastboot = <0x5242c309>; + offset = <0x80>; + compatible = "syscon-reboot-mode"; + mode-winusb = <0x5242c30f>; + phandle = <0x25b>; + mode-charge = <0x5242c30b>; + mode-panic = <0x5242c307>; + }; + }; + + syscon@fd5a4000 { + compatible = "rockchip,rk3588-vop-grf\0syscon"; + reg = <0x00 0xfd5a4000 0x00 0x2000>; + phandle = <0xd7>; + }; + + iommu@fdb60f00 { + power-domains = <0x60 0x16>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x72 0x04>; + clocks = <0x02 0x1ba 0x02 0x1b9>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "rga3_0_mmu"; + reg = <0x00 0xfdb60f00 0x00 0x100>; + phandle = <0xb9>; + }; + + pwm@febf0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x173>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0020 0x00 0x10>; + phandle = <0x2db>; + }; + + rkispp@fdcd0000 { + power-domains = <0x60 0x1d>; + iommus = <0xd2>; + clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; + assigned-clocks = <0x02 0x1d6>; + assigned-clock-rates = <0x5f5e100>; + interrupts = <0x00 0x8b 0x04>; + clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; + compatible = "rockchip,rk3588-rkispp"; + status = "disabled"; + interrupt-names = "fec_irq"; + reg = <0x00 0xfdcd0000 0x00 0xf00>; + phandle = <0x5b>; + }; + + tsadc@fec00000 { + pinctrl-names = "gpio\0otpout"; + pinctrl-0 = <0x175>; + clock-names = "tsadc\0apb_pclk"; + rockchip,hw-tshut-polarity = <0x00>; + assigned-clocks = <0x02 0xaa>; + assigned-clock-rates = <0x1e8480>; + resets = <0x02 0xc1 0x02 0xc0>; + interrupts = <0x00 0x18d 0x04>; + rockchip,hw-tshut-mode = <0x00>; + clocks = <0x02 0xaa 0x02 0xa9>; + #thermal-sensor-cells = <0x01>; + compatible = "rockchip,rk3588-tsadc"; + pinctrl-1 = <0x176>; + status = "okay"; + reg = <0x00 0xfec00000 0x00 0x400>; + phandle = <0x5d>; + reset-names = "tsadc\0tsadc-apb"; + rockchip,hw-tshut-temp = <0x1d4c0>; + }; + + iommu@fdbb0800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x75 0x04>; + clocks = <0x02 0x1aa 0x02 0x1a9>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_iep_mmu"; + reg = <0x00 0xfdbb0800 0x00 0x100>; + phandle = <0xc1>; + }; + + phy@fed60000 { + clock-names = "ref\0apb"; + resets = <0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d>; + clocks = <0x02 0x2b5 0x02 0x267>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy"; + status = "disabled"; + rockchip,grf = <0x18a>; + reg = <0x00 0xfed60000 0x00 0x2000>; + phandle = <0x101>; + reset-names = "apb\0init\0cmn\0lane"; + }; + + pvtm@fda50000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-bigcore1-pvtm"; + reg = <0x00 0xfda50000 0x00 0x100>; + + pvtm@1 { + clock-names = "clk\0pclk"; + clocks = <0x02 0x2c8 0x02 0x17>; + reg = <0x01>; + }; + }; + + csi2-dcphy0 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x20d>; + }; + + mailbox@fece0000 { + clock-names = "pclk_mailbox"; + interrupts = <0x00 0x4d 0x04 0x00 0x4e 0x04 0x00 0x4f 0x04 0x00 0x50 0x04>; + clocks = <0x02 0x4e>; + #mbox-cells = <0x01>; + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + status = "disabled"; + reg = <0x00 0xfece0000 0x00 0x200>; + phandle = <0x2e9>; + }; + + rkcif-mipi-lvds3-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x23a>; + }; + + rkcif-mipi-lvds1-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x22f>; + }; + + dfi@fe060000 { + rockchip,pmu_grf = <0x104>; + compatible = "rockchip,rk3588-dfi"; + status = "disabled"; + reg = <0x00 0xfe060000 0x00 0x10000>; + phandle = <0x40>; + }; + + iommu@fdca0000 { + power-domains = <0x60 0x17>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x6d 0x04>; + clocks = <0x02 0x49 0x02 0x4b>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-av1"; + status = "okay"; + interrupt-names = "irq_av1d_mmu"; + reg = <0x00 0xfdca0000 0x00 0x600>; + phandle = <0xce>; + }; + + mipi5-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x229>; + }; + + qos@fdf35600 { + compatible = "syscon"; + reg = <0x00 0xfdf35600 0x00 0x20>; + phandle = <0x8a>; + }; + + syscon@fd5e4000 { + compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; + reg = <0x00 0xfd5e4000 0x00 0x100>; + phandle = <0x1c7>; + }; + + iommu@fdba8800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x7d 0x04>; + clocks = <0x02 0x1b0 0x02 0x1b1>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege2_mmu"; + reg = <0x00 0xfdba8800 0x00 0x40>; + phandle = <0xbf>; + }; + + mpp-srv { + rockchip,resetgroup-count = <0x01>; + rockchip,taskqueue-count = <0x0c>; + compatible = "rockchip,mpp-service"; + status = "okay"; + phandle = <0xb8>; + }; + + cspmu@fd10c000 { + compatible = "rockchip,cspmu"; + reg = <0x00 0xfd10c000 0x00 0x1000 0x00 0xfd10d000 0x00 0x1000 0x00 0xfd10e000 0x00 0x1000 0x00 0xfd10f000 0x00 0x1000 0x00 0xfd12c000 0x00 0x1000 0x00 0xfd12d000 0x00 0x1000 0x00 0xfd12e000 0x00 0x1000 0x00 0xfd12f000 0x00 0x1000>; + phandle = <0x48e>; + }; + + pwm@febf0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x172>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0010 0x00 0x10>; + phandle = <0x2da>; + }; + + iommu@fdbef000 { + power-domains = <0x60 0x11>; + rockchip,shootdown-entire; + interrupts = <0x00 0x66 0x04 0x00 0x67 0x04>; + clocks = <0x02 0x1ca 0x02 0x1c9>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvenc1_mmu0\0irq_rkvenc1_mmu1"; + reg = <0x00 0xfdbef000 0x00 0x40 0x00 0xfdbef040 0x00 0x40>; + phandle = <0xc5>; + lock-names = "aclk\0iface"; + }; + + serial@feb60000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x162>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14e 0x04>; + clocks = <0x02 0xbf 0x02 0xad>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb60000 0x00 0x100>; + phandle = <0x2cb>; + dmas = <0x7c 0x0c 0x7c 0x0d>; + reg-shift = <0x02>; + }; + + hdmiin-sound { + rockchip,jack-det; + rockchip,cpu = <0x1ec>; + rockchip,codec = <0x1eb 0x00>; + rockchip,bitclock-master = <0x1eb>; + rockchip,card-name = "rockchip,hdmiin"; + rockchip,format = "i2s"; + compatible = "rockchip,hdmi"; + phandle = <0x4ac>; + rockchip,frame-master = <0x1eb>; + rockchip,mclk-fs = <0x80>; + }; + + i2s@fddc8000 { + power-domains = <0x60 0x19>; + clock-names = "mclk_tx\0hclk"; + assigned-clocks = <0x02 0x1ff>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x391>; + interrupts = <0x00 0xbc 0x04>; + clocks = <0x02 0x201 0x02 0x1fe>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "disabled"; + reg = <0x00 0xfddc8000 0x00 0x1000>; + phandle = <0x47c>; + dmas = <0xf2 0x16>; + reset-names = "tx-m"; + }; + + pcie30-avdd0v75 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "pcie30_avdd0v75"; + compatible = "regulator-fixed"; + phandle = <0x4a7>; + vin-supply = <0x1df>; + }; + + timer { + interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; + compatible = "arm,armv8-timer"; + }; + + rockchip-suspend { + rockchip,sleep-debug-en = <0x01>; + rockchip,sleep-mode-config = <0x5000604>; + compatible = "rockchip,pm-rk3588"; + status = "okay"; + rockchip,wakeup-config = <0x100>; + phandle = <0x246>; + }; + + decompress@fea80000 { + clock-names = "aclk\0dclk\0pclk"; + resets = <0x02 0x118>; + interrupts = <0x00 0x55 0x04>; + clocks = <0x02 0x75 0x02 0x77 0x02 0x76>; + compatible = "rockchip,hw-decompress"; + status = "disabled"; + reg = <0x00 0xfea80000 0x00 0x1000>; + phandle = <0x2a3>; + reset-names = "dresetn"; + }; + + dma-controller@fea30000 { + clock-names = "apb_pclk"; + interrupts = <0x00 0x58 0x04 0x00 0x59 0x04>; + clocks = <0x02 0x79>; + arm,pl330-periph-burst; + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfea30000 0x00 0x4000>; + phandle = <0xf1>; + #dma-cells = <0x01>; + }; + + pwm@febf0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x171>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0000 0x00 0x10>; + phandle = <0x2d9>; + }; + + iommu@fdcd8f00 { + power-domains = <0x60 0x1d>; + clock-names = "aclk\0iface\0pclk"; + interrupts = <0x00 0x8e 0x04>; + clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "fec1_mmu"; + reg = <0x00 0xfdcd8f00 0x00 0x100>; + phandle = <0xd3>; + }; + + spdif-tx@fddb0000 { + power-domains = <0x60 0x19>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x205>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc3 0x04>; + clocks = <0x02 0x209 0x02 0x204>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfddb0000 0x00 0x1000>; + phandle = <0x1d5>; + dmas = <0xf1 0x06>; + }; + + rkisp1-vir2 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x241>; + }; + + pcie-clk1 { + regulator-boot-on; + regulator-always-on; + regulator-name = "pcie_clk1"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x494>; + vin-supply = <0x1cd>; + gpios = <0x181 0x15 0x01>; + }; + + jpege-core@fdba8000 { + power-domains = <0x60 0x15>; + iommus = <0xbf>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1b0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2ce 0x02 0x2cf>; + interrupts = <0x00 0x7e 0x04>; + clocks = <0x02 0x1b0 0x02 0x1b1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege2"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdba8000 0x00 0x400>; + phandle = <0x26f>; + reset-names = "video_a\0video_h"; + }; + + qos@fdf66400 { + compatible = "syscon"; + reg = <0x00 0xfdf66400 0x00 0x20>; + phandle = <0x95>; + }; + + spdif-tx1-sound { + simple-audio-card,name = "rockchip,spdif-tx1"; + compatible = "simple-audio-card"; + status = "disabled"; + phandle = <0x49d>; + simple-audio-card,mclk-fs = <0x80>; + + simple-audio-card,cpu { + sound-dai = <0x1d7>; + }; + + simple-audio-card,codec { + sound-dai = <0x1d8>; + }; + }; + + mmc@fe2e0000 { + mmc-hs400-enhanced-strobe; + clock-names = "core\0bus\0axi\0block\0timer"; + assigned-clocks = <0x02 0x13b 0x02 0x13c 0x02 0x13a>; + bus-width = <0x08>; + non-removable; + no-sdio; + assigned-clock-rates = <0xbebc200 0x16e3600 0xbebc200>; + resets = <0x02 0x1f6 0x02 0x1f4 0x02 0x1f5 0x02 0x1f7 0x02 0x1f8>; + mmc-hs400-1_8v; + interrupts = <0x00 0xcd 0x04>; + clocks = <0x02 0x13a 0x02 0x138 0x02 0x139 0x02 0x13b 0x02 0x13c>; + no-sd; + compatible = "rockchip,rk3588-dwcmshc\0rockchip,dwcmshc-sdhci"; + status = "okay"; + reg = <0x00 0xfe2e0000 0x00 0x10000>; + phandle = <0x295>; + max-frequency = <0xbebc200>; + reset-names = "core\0bus\0axi\0block\0timer"; + }; + + dma-controller@fed10000 { + clock-names = "apb_pclk"; + interrupts = <0x00 0x5a 0x04 0x00 0x5b 0x04>; + clocks = <0x02 0x7a>; + arm,pl330-periph-burst; + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfed10000 0x00 0x4000>; + phandle = <0xf2>; + #dma-cells = <0x01>; + }; + + iommu@fc900000 { + interrupts = <0x00 0x171 0x04 0x00 0x173 0x04 0x00 0x176 0x04 0x00 0x16f 0x04>; + #iommu-cells = <0x01>; + compatible = "arm,smmu-v3"; + status = "disabled"; + interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; + reg = <0x00 0xfc900000 0x00 0x200000>; + phandle = <0x256>; + }; + + mailbox@fec70000 { + clock-names = "pclk_mailbox"; + interrupts = <0x00 0x45 0x04 0x00 0x46 0x04 0x00 0x47 0x04 0x00 0x48 0x04>; + clocks = <0x02 0x4d>; + #mbox-cells = <0x01>; + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + status = "disabled"; + reg = <0x00 0xfec70000 0x00 0x200>; + phandle = <0x2de>; + }; + + pcie@fe150000 { + power-domains = <0x60 0x22>; + vpcie3v3-supply = <0x1b8>; + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x00 0x0f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x10>; + resets = <0x02 0x20d 0x02 0x21c>; + interrupts = <0x00 0x107 0x04 0x00 0x106 0x04 0x00 0x105 0x04 0x00 0x104 0x04 0x00 0x103 0x04>; + clocks = <0x02 0x14e 0x02 0x153 0x02 0x149 0x02 0x158 0x02 0x15e 0x02 0x183>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1b5 0x00 0x00 0x00 0x00 0x02 0x1b5 0x01 0x00 0x00 0x00 0x03 0x1b5 0x02 0x00 0x00 0x00 0x04 0x1b5 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x03>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + reset-gpios = <0x10d 0x0e 0x00>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf0000000 0x00 0xf0000000 0x00 0x100000 0x81000000 0x00 0xf0100000 0x00 0xf0100000 0x00 0x100000 0x82000000 0x00 0xf0200000 0x00 0xf0200000 0x00 0xe00000 0xc3000000 0x09 0x00 0x09 0x00 0x00 0x40000000>; + msi-map = <0x00 0x1b6 0x00 0x1000>; + #interrupt-cells = <0x01>; + status = "okay"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x1b7>; + num-viewport = <0x08>; + reg = <0x00 0xfe150000 0x00 0x10000 0x0a 0x40000000 0x00 0x400000>; + linux,pci-domain = <0x00>; + phandle = <0x485>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x10>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0x104 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x1b5>; + interrupt-controller; + }; + }; + + rng@fe378000 { + clock-names = "hclk_trng"; + resets = <0x11a 0x30>; + interrupts = <0x00 0x190 0x04>; + clocks = <0x0e 0x0c>; + compatible = "rockchip,trngv1"; + status = "okay"; + reg = <0x00 0xfe378000 0x00 0x200>; + phandle = <0x297>; + reset-names = "reset"; + }; + + sata@fe220000 { + phy-names = "sata-phy"; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x112 0x04>; + clocks = <0x02 0x172 0x02 0x16f 0x02 0x175 0x02 0x164 0x02 0x17f>; + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + status = "disabled"; + interrupt-names = "hostc"; + phys = <0x1bc 0x01>; + reg = <0x00 0xfe220000 0x00 0x1000>; + phandle = <0x48a>; + ports-implemented = <0x01>; + }; + + rkcif-mipi-lvds5 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x1a2>; + }; + + vcc-sata-pwr-en-regulator { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + gpio = <0x182 0x0c 0x00>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc_sata_pwr_en"; + startup-delay-us = <0x1388>; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4a3>; + vin-supply = <0x1cd>; + }; + + pwm-fan { + cooling-levels = <0x32 0x32 0x64 0x96 0xc8 0xff>; + rockchip,temp-trips = <0xc350 0x01 0xd6d8 0x02 0xea60 0x03 0xfde8 0x04 0x11170 0x05>; + compatible = "pwm-fan"; + phandle = <0x4ad>; + pwms = <0x1ed 0x00 0xc350 0x00>; + #cooling-cells = <0x02>; + fan-supply = <0x78>; + }; + + qos@fdf3e200 { + compatible = "syscon"; + reg = <0x00 0xfdf3e200 0x00 0x20>; + phandle = <0xab>; + }; + + spdif-tx@fe4e0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x142>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x3f>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc1 0x04>; + clocks = <0x02 0x41 0x02 0x3e>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfe4e0000 0x00 0x1000>; + phandle = <0x29d>; + dmas = <0x7c 0x05>; + }; + + vad@fe4d0000 { + rockchip,det-channel = <0x00>; + rockchip,audio-src = <0x00>; + clock-names = "hclk"; + reg-names = "vad"; + interrupts = <0x00 0xca 0x04>; + clocks = <0x02 0x2a0>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-vad"; + status = "disabled"; + rockchip,mode = <0x00>; + reg = <0x00 0xfe4d0000 0x00 0x1000>; + phandle = <0x29c>; + }; + + jpegd@fdb90000 { + power-domains = <0x60 0x15>; + iommus = <0xbb>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1b4>; + rockchip,normal-rates = <0x23c34600 0x00>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x2d2 0x02 0x2d3>; + interrupts = <0x00 0x81 0x04>; + clocks = <0x02 0x1b4 0x02 0x1b5>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x01>; + compatible = "rockchip,rkv-jpeg-decoder-v1"; + status = "okay"; + interrupt-names = "irq_jpegd"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb90000 0x00 0x400>; + phandle = <0x26c>; + reset-names = "video_a\0video_h"; + }; + + cpuinfo { + nvmem-cells = <0x2a 0x2b 0x2c>; + compatible = "rockchip,cpuinfo"; + nvmem-cell-names = "id\0cpu-version\0cpu-code"; + }; + + qos@fdf60400 { + compatible = "syscon"; + reg = <0x00 0xfdf60400 0x00 0x20>; + phandle = <0x8f>; + }; + + spi@feb20000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x01>; + pinctrl-0 = <0x154 0x155>; + clock-names = "spiclk\0apb_pclk"; + assigned-clocks = <0x02 0xa5>; + assigned-clock-rates = <0xbebc200>; + interrupts = <0x00 0x148 0x04>; + clocks = <0x02 0xa5 0x02 0xa0>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "okay"; + reg = <0x00 0xfeb20000 0x00 0x1000>; + phandle = <0x2ad>; + dmas = <0xf1 0x0f 0xf1 0x10>; + + rk806single@0 { + vcc11-supply = <0x15b>; + pinctrl-names = "default\0pmic-power-off"; + vcc12-supply = <0x78>; + vcc13-supply = <0x15c>; + vcc14-supply = <0x15c>; + pinctrl-0 = <0x156 0x157 0x158 0x159>; + interrupts = <0x07 0x08>; + spi-max-frequency = <0xf4240>; + interrupt-parent = <0x7b>; + low_voltage_threshold = <0xbb8>; + vcca-supply = <0x78>; + vcc1-supply = <0x78>; + pmic-reset-func = <0x01>; + vcc2-supply = <0x78>; + hotdie_temperture_threshold = <0x73>; + compatible = "rockchip,rk806"; + vcc3-supply = <0x78>; + pinctrl-1 = <0x15a>; + vcc4-supply = <0x78>; + vcc5-supply = <0x78>; + reg = <0x00>; + phandle = <0x2ae>; + vcc6-supply = <0x78>; + shutdown_voltage_threshold = <0xa8c>; + vcc7-supply = <0x78>; + vcc8-supply = <0x78>; + shutdown_temperture_threshold = <0xa0>; + vcc9-supply = <0x78>; + vcc10-supply = <0x78>; + + pinctrl_rk806 { + gpio-controller; + phandle = <0x2af>; + #gpio-cells = <0x02>; + + rk806_dvs2_rst { + function = "pin_fun3"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b4>; + }; + + rk806_dvs3_null { + function = "pin_fun0"; + pins = "gpio_pwrctrl3"; + phandle = <0x159>; + }; + + rk806_dvs3_dvs { + function = "pin_fun4"; + pins = "gpio_pwrctrl3"; + phandle = <0x2ba>; + }; + + rk806_dvs3_rst { + function = "pin_fun3"; + pins = "gpio_pwrctrl3"; + phandle = <0x2b9>; + }; + + rk806_dvs2_null { + function = "pin_fun0"; + pins = "gpio_pwrctrl2"; + phandle = <0x158>; + }; + + rk806_dvs1_pwrdn { + function = "pin_fun2"; + pins = "gpio_pwrctrl1"; + phandle = <0x15a>; + }; + + rk806_dvs1_slp { + function = "pin_fun1"; + pins = "gpio_pwrctrl1"; + phandle = <0x2b0>; + }; + + rk806_dvs1_null { + function = "pin_fun0"; + pins = "gpio_pwrctrl2"; + phandle = <0x157>; + }; + + rk806_dvs3_gpio { + function = "pin_fun5"; + pins = "gpio_pwrctrl3"; + phandle = <0x2bb>; + }; + + rk806_dvs2_gpio { + function = "pin_fun5"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b6>; + }; + + rk806_dvs2_slp { + function = "pin_fun1"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b2>; + }; + + rk806_dvs2_pwrdn { + function = "pin_fun2"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b3>; + }; + + rk806_dvs1_rst { + function = "pin_fun3"; + pins = "gpio_pwrctrl1"; + phandle = <0x2b1>; + }; + + rk806_dvs3_slp { + function = "pin_fun1"; + pins = "gpio_pwrctrl3"; + phandle = <0x2b7>; + }; + + rk806_dvs2_dvs { + function = "pin_fun4"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b5>; + }; + + rk806_dvs3_pwrdn { + function = "pin_fun2"; + pins = "gpio_pwrctrl3"; + phandle = <0x2b8>; + }; + }; + + pwrkey { + status = "okay"; + }; + + regulators { + + PLDO_REG2 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "vcc_1v8_s0"; + phandle = <0x177>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0x1b7740>; + }; + }; + + DCDC_REG4 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + regulator-init-microvolt = <0xb71b0>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_vdenc_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x2bc>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG2 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_cpu_lit_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x12>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG4 { + regulator-max-microvolt = <0xcf850>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xcf850>; + regulator-name = "vdd_0v85_s0"; + phandle = <0x2c6>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG9 { + regulator-boot-on; + regulator-always-on; + regulator-name = "vddq_ddr_s0"; + phandle = <0x2bf>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG2 { + regulator-max-microvolt = <0xcf850>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xcf850>; + regulator-name = "vdd_ddr_pll_s0"; + phandle = <0x2c5>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0xcf850>; + }; + }; + + PLDO_REG5 { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "vccio_sd_s0"; + phandle = <0x118>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG7 { + regulator-max-microvolt = <0x1e8480>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1e8480>; + regulator-name = "vdd_2v0_pldo_s3"; + phandle = <0x15b>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x1e8480>; + regulator-on-in-suspend; + }; + }; + + PLDO_REG3 { + regulator-max-microvolt = <0x124f80>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x124f80>; + regulator-name = "avdd_1v2_s0"; + phandle = <0x2c1>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG5 { + regulator-max-microvolt = <0xdbba0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xa4cb8>; + regulator-name = "vdd_ddr_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x42>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0xcf850>; + }; + }; + + DCDC_REG10 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "vcc_1v8_s3"; + phandle = <0x2c0>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x1b7740>; + regulator-on-in-suspend; + }; + }; + + PLDO_REG1 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "avcc_1v8_s0"; + phandle = <0x1de>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG3 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xa4cb8>; + regulator-name = "vdd_log_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x43>; + + regulator-state-mem { + regulator-suspend-microvolt = <0xb71b0>; + regulator-on-in-suspend; + }; + }; + + DCDC_REG1 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + regulator-enable-ramp-delay = <0x190>; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_gpu_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x62>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG5 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "vdd_0v75_s0"; + phandle = <0x2c7>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG3 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "avdd_0v75_s0"; + phandle = <0x1df>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + PLDO_REG6 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "pldo6_s3"; + phandle = <0x2c3>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x1b7740>; + regulator-on-in-suspend; + }; + }; + + DCDC_REG8 { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc_3v3_s3"; + phandle = <0x2be>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x325aa0>; + regulator-on-in-suspend; + }; + }; + + NLDO_REG1 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "vdd_0v75_s3"; + phandle = <0x2c4>; + + regulator-state-mem { + regulator-suspend-microvolt = <0xb71b0>; + regulator-on-in-suspend; + }; + }; + + PLDO_REG4 { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc_3v3_s0"; + phandle = <0x2c2>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG6 { + regulator-boot-on; + regulator-always-on; + regulator-name = "vdd2_ddr_s3"; + phandle = <0x2bd>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + }; + }; + }; + + usbhost3_0 { + #address-cells = <0x02>; + clock-names = "ref\0suspend\0bus\0utmi\0php\0pipe"; + clocks = <0x02 0x179 0x02 0x178 0x02 0x177 0x02 0x17a 0x02 0x166 0x02 0x181>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + ranges; + status = "disabled"; + phandle = <0x258>; + + usb@fcd00000 { + snps,dis_enblslpm_quirk; + phy-names = "usb3-phy"; + snps,dis-u2-freeclk-exists-quirk; + phy_type = "utmi_wide"; + resets = <0x02 0x237>; + interrupts = <0x00 0xde 0x04>; + snps,dis_rxdet_inp3_quirk; + compatible = "snps,dwc3"; + snps,parkmode-disable-hs-quirk; + snps,dis-del-phy-power-chg-quirk; + status = "disabled"; + snps,parkmode-disable-ss-quirk; + phys = <0x70 0x04>; + reg = <0x00 0xfcd00000 0x00 0x400000>; + phandle = <0x259>; + dr_mode = "host"; + reset-names = "usb3-host"; + snps,dis-tx-ipgap-linecheck-quirk; + }; + }; + + pcie@fe190000 { + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x40 0x4f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x08>; + resets = <0x02 0x211 0x02 0x220>; + interrupts = <0x00 0xfd 0x04 0x00 0xfc 0x04 0x00 0xfb 0x04 0x00 0xfa 0x04 0x00 0xf9 0x04>; + clocks = <0x02 0x152 0x02 0x157 0x02 0x14d 0x02 0x15d 0x02 0x162 0x02 0x182>; + interrupt-map = <0x00 0x00 0x00 0x01 0x107 0x00 0x00 0x00 0x00 0x02 0x107 0x01 0x00 0x00 0x00 0x03 0x107 0x02 0x00 0x00 0x00 0x04 0x107 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x02>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf4000000 0x00 0xf4000000 0x00 0x100000 0x81000000 0x00 0xf4100000 0x00 0xf4100000 0x00 0x100000 0x82000000 0x00 0xf4200000 0x00 0xf4200000 0x00 0xe00000 0xc3000000 0x0a 0x00 0x0a 0x00 0x00 0x40000000>; + msi-map = <0x4000 0x106 0x4000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x108 0x02>; + num-viewport = <0x04>; + reg = <0x00 0xfe190000 0x00 0x10000 0x0a 0x41000000 0x00 0x400000>; + linux,pci-domain = <0x04>; + phandle = <0x28d>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x08>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xfa 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x107>; + interrupt-controller; + }; + }; + + rkcif-mipi-lvds3-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x238>; + }; + + aliases { + i2c3 = "/i2c@feab0000"; + ethernet0 = "/ethernet@fe1b0000"; + pwm9 = "/pwm@febe0010"; + pwm14 = "/pwm@febf0020"; + spi2 = "/spi@feb20000"; + usbdp0 = "/phy@fed80000"; + gpio0 = "/pinctrl/gpio@fd8a0000"; + dsi1 = "/dsi@fde30000"; + hdmi1 = "/hdmi@fdea0000"; + serial7 = "/serial@feba0000"; + i2c1 = "/i2c@fea90000"; + pwm7 = "/pwm@febd0030"; + pwm12 = "/pwm@febf0000"; + jpege3 = "/jpege-core@fdbac000"; + spi0 = "/spi@feb00000"; + hdptx1 = "/phy@fed70000"; + csi2dphy5 = "/csi2-dphy5"; + serial5 = "/serial@feb80000"; + csi2dcphy1 = "/csi2-dcphy1"; + pwm5 = "/pwm@febd0010"; + mmc1 = "/mmc@fe2c0000"; + pwm10 = "/pwm@febe0020"; + jpege1 = "/jpege-core@fdba4000"; + rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; + i2c8 = "/i2c@feca0000"; + dp0 = "/dp@fde50000"; + csi2dphy3 = "/csi2-dphy3"; + serial3 = "/serial@feb60000"; + edp0 = "/edp@fdec0000"; + pwm3 = "/pwm@fd8b0030"; + hdcp1 = "/hdcp@fde70000"; + rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; + i2c6 = "/i2c@fec80000"; + csi2dphy1 = "/csi2-dphy1"; + serial1 = "/serial@feb40000"; + pwm1 = "/pwm@fd8b0010"; + rkvenc0 = "/rkvenc-core@fdbd0000"; + spi5 = "/spi@fe2b0000"; + gpio3 = "/pinctrl/gpio@fec40000"; + hdptxhdmi1 = "/hdmiphy@fed70000"; + rkcif_mipi_lvds0 = "/rkcif-mipi-lvds"; + i2c4 = "/i2c@feac0000"; + ethernet1 = "/ethernet@fe1c0000"; + rkvdec0 = "/rkvdec-core@fdc38000"; + pwm15 = "/pwm@febf0030"; + hdmirx0 = "/hdmirx-controller@fdee0000"; + spi3 = "/spi@feb30000"; + usbdp1 = "/phy@fed90000"; + gpio1 = "/pinctrl/gpio@fec20000"; + serial8 = "/serial@febb0000"; + i2c2 = "/i2c@feaa0000"; + pwm8 = "/pwm@febe0000"; + pwm13 = "/pwm@febf0010"; + spi1 = "/spi@feb10000"; + dsi0 = "/dsi@fde20000"; + hdmi0 = "/hdmi@fde80000"; + serial6 = "/serial@feb90000"; + i2c0 = "/i2c@fd880000"; + pwm6 = "/pwm@febd0020"; + mmc2 = "/mmc@fe2d0000"; + pwm11 = "/pwm@febe0030"; + jpege2 = "/jpege-core@fdba8000"; + hdptx0 = "/phy@fed60000"; + rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; + dp1 = "/dp@fde60000"; + csi2dphy4 = "/csi2-dphy4"; + serial4 = "/serial@feb70000"; + edp1 = "/edp@fded0000"; + csi2dcphy0 = "/csi2-dcphy0"; + pwm4 = "/pwm@febd0000"; + mmc0 = "/mmc@fe2e0000"; + jpege0 = "/jpege-core@fdba0000"; + rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; + i2c7 = "/i2c@fec90000"; + csi2dphy2 = "/csi2-dphy2"; + serial2 = "/serial@feb50000"; + pwm2 = "/pwm@fd8b0020"; + rkvenc1 = "/rkvenc-core@fdbe0000"; + gpio4 = "/pinctrl/gpio@fec50000"; + hdcp0 = "/hdcp@fde40000"; + rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; + i2c5 = "/i2c@fead0000"; + csi2dphy0 = "/csi2-dphy0"; + serial0 = "/serial@fd890000"; + rkvdec1 = "/rkvdec-core@fdc48000"; + pwm0 = "/pwm@fd8b0000"; + spi4 = "/spi@fecb0000"; + gpio2 = "/pinctrl/gpio@fec30000"; + hdptxhdmi0 = "/hdmiphy@fed60000"; + serial9 = "/serial@febc0000"; + }; + + spdif-tx@fdde8000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x259>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc5 0x04>; + clocks = <0x02 0x25c 0x02 0x258>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfdde8000 0x00 0x1000>; + phandle = <0x47d>; + dmas = <0xf1 0x08>; + }; + + i2s@fe490000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x12d 0x12e>; + pinctrl-0 = <0x12a 0x12b>; + clock-names = "i2s_clk\0i2s_hclk"; + assigned-clocks = <0x02 0x24>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xb6 0x04>; + clocks = <0x02 0x27 0x02 0x22>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; + pinctrl-1 = <0x12c>; + status = "disabled"; + reg = <0x00 0xfe490000 0x00 0x1000>; + phandle = <0x298>; + dmas = <0xf1 0x00 0xf1 0x01>; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd5d0000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d0000 0x00 0x4000>; + phandle = <0x18b>; + + usb2-phy@0 { + clock-output-names = "usb480m_phy0"; + clock-names = "phyclk"; + resets = <0x02 0xc0047 0x02 0x488>; + interrupts = <0x00 0x189 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + rockchip,usbctrl-grf = <0x74>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0x00 0x10>; + phandle = <0x18d>; + reset-names = "phy\0apb"; + + otg-port { + #phy-cells = <0x00>; + rockchip,typec-vbus-det; + status = "okay"; + phandle = <0x66>; + }; + }; + }; + + i2c@feac0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x14b>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb3 0x02 0xab>; + interrupts = <0x00 0x141 0x04>; + clocks = <0x02 0x90 0x02 0x88>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfeac0000 0x00 0x1000>; + phandle = <0x2a7>; + reset-names = "i2c\0apb"; + + pc9202@3c { + pinctrl-names = "default"; + pinctrl-0 = <0x14c>; + index = <0x01>; + compatible = "firefly,pc9202"; + status = "okay"; + wd-en-gpio = <0x7b 0x14 0x00>; + driver-names = "wdt_base"; + reg = <0x3c>; + }; + }; + + rkcif-mipi-lvds5-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x476>; + }; + + firmware { + + optee { + method = "smc"; + compatible = "linaro,optee-tz"; + phandle = <0x222>; + }; + + sdei { + method = "smc"; + compatible = "arm,sdei-1.0"; + phandle = <0x221>; + }; + + scmi { + shmem = <0x46>; + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "arm,scmi-smc"; + phandle = <0x220>; + arm,smc-id = <0x82000010>; + + protocol@16 { + #reset-cells = <0x01>; + reg = <0x16>; + phandle = <0x11a>; + }; + + protocol@14 { + assigned-clocks = <0x0e 0x00 0x0e 0x02 0x0e 0x03>; + assigned-clock-rates = <0x30a32c00 0x30a32c00 0x30a32c00>; + #clock-cells = <0x01>; + reg = <0x14>; + phandle = <0x0e>; + }; + }; + }; + + rkvenc-core@fdbd0000 { + power-domains = <0x60 0x10>; + iommus = <0xc2>; + rockchip,ccu = <0xc3>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; + assigned-clocks = <0x02 0x1c5 0x02 0x1c6>; + rockchip,task-capacity = <0x08>; + rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; + assigned-clock-rates = <0x1dcd6500 0x2faf0800>; + resets = <0x02 0x2f5 0x02 0x2f4 0x02 0x2f6>; + interrupts = <0x00 0x65 0x04>; + clocks = <0x02 0x1c5 0x02 0x1c4 0x02 0x1c6>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x07>; + compatible = "rockchip,rkv-encoder-v2-core"; + status = "okay"; + interrupt-names = "irq_rkvenc0"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbd0000 0x00 0x6000>; + phandle = <0x272>; + reset-names = "video_a\0video_h\0video_core"; + operating-points-v2 = <0xc4>; + }; + + iommu@fdcc7f00 { + power-domains = <0x60 0x1c>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x88 0x04>; + clocks = <0x02 0x120 0x02 0x121>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "isp1_mmu"; + reg = <0x00 0xfdcc7f00 0x00 0x100>; + phandle = <0xd1>; + }; + + rkcif-mipi-lvds-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22b>; + }; + + syscon@fd5c8000 { + compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; + reg = <0x00 0xfd5c8000 0x00 0x4000>; + phandle = <0x18c>; + }; + + gpu@fb000000 { + power-domains = <0x60 0x0c>; + downdifferential = <0x0a>; + mali-supply = <0x62>; + clock-names = "clk_mali\0clk_gpu_coregroup\0clk_gpu_stacks\0clk_gpu"; + assigned-clocks = <0x0e 0x05>; + assigned-clock-rates = <0xbebc200>; + interrupts = <0x00 0x5e 0x04 0x00 0x5d 0x04 0x00 0x5c 0x04>; + clocks = <0x0e 0x05 0x02 0x115 0x02 0x116 0x02 0x114>; + upthreshold = <0x1e>; + compatible = "arm,mali-bifrost"; + dynamic-power-coefficient = <0xba6>; + status = "okay"; + interrupt-names = "GPU\0MMU\0JOB"; + mem-supply = <0x62>; + reg = <0x00 0xfb000000 0x00 0x200000>; + phandle = <0x5f>; + operating-points-v2 = <0x61>; + #cooling-cells = <0x02>; + }; + + csi2-dphy4 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x213>; + }; + + mipi4-csi2-hw@fdd50000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x328>; + interrupts = <0x00 0x97 0x04 0x00 0x98 0x04>; + clocks = <0x02 0x1d3>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd50000 0x00 0x10000>; + phandle = <0x4b>; + reset-names = "srst_csihost_p"; + }; + + qos@fdf82000 { + compatible = "syscon"; + reg = <0x00 0xfdf82000 0x00 0x20>; + phandle = <0x9d>; + }; + + rkcif-mipi-lvds2-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x55>; + phandle = <0x235>; + }; + + rkisp1-vir0 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23f>; + }; + + qos@fdf41100 { + compatible = "syscon"; + reg = <0x00 0xfdf41100 0x00 0x20>; + phandle = <0xa7>; + }; + + test-power { + status = "okay"; + }; + + usb-5v { + pinctrl-names = "default"; + regulator-boot-on; + gpio = <0xfe 0x03 0x00>; + pinctrl-0 = <0x1ef>; + regulator-always-on; + enable-active-high; + regulator-name = "usb_5v"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4b1>; + }; + + phy@feda0000 { + clock-names = "pclk\0ref"; + resets = <0x02 0xc0043 0x02 0x3e 0x02 0x3f 0x02 0xc0044>; + clocks = <0x02 0x108 0x02 0x2b6>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dcphy"; + status = "okay"; + rockchip,grf = <0x190>; + reg = <0x00 0xfeda0000 0x00 0x10000>; + phandle = <0x2f>; + reset-names = "m_phy\0apb\0grf\0s_phy"; + }; + + mod-sleep-regulator { + pinctrl-names = "default"; + regulator-boot-on; + gpio = <0x7b 0x15 0x00>; + pinctrl-0 = <0x1ee>; + regulator-always-on; + enable-active-high; + regulator-name = "mod_sleep"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4ae>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + qos@fdf66c00 { + compatible = "syscon"; + reg = <0x00 0xfdf66c00 0x00 0x20>; + phandle = <0x99>; + }; + + crypto@fe370000 { + clock-names = "aclk\0hclk\0sclk\0pka"; + resets = <0x11a 0x0f>; + interrupts = <0x00 0xd1 0x04>; + clocks = <0x0e 0x0b 0x0e 0x0c 0x0e 0x14 0x0e 0x15>; + compatible = "rockchip,rk3588-crypto"; + status = "disabled"; + reg = <0x00 0xfe370000 0x00 0x2000>; + phandle = <0x296>; + reset-names = "crypto-rst"; + }; + + i2s@fddf4000 { + power-domains = <0x60 0x1a>; + rockchip,always-on; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x249>; + assigned-clock-parents = <0x02 0x07>; + resets = <0x02 0x3ef>; + interrupts = <0x00 0xba 0x04>; + clocks = <0x02 0x24c 0x02 0x24c 0x02 0x252>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "okay"; + reg = <0x00 0xfddf4000 0x00 0x1000>; + phandle = <0x1e0>; + dmas = <0xf2 0x04>; + reset-names = "tx-m"; + rockchip,hdmi-path; + }; + + mipi0-csi2-hw@fdd10000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x324>; + interrupts = <0x00 0x8f 0x04 0x00 0x90 0x04>; + clocks = <0x02 0x1cf>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd10000 0x00 0x10000>; + phandle = <0x47>; + reset-names = "srst_csihost_p"; + }; + + mipi4-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x228>; + }; + + jpege-ccu { + compatible = "rockchip,vpu-jpege-ccu"; + status = "okay"; + phandle = <0xbd>; + }; + + dsi@fde30000 { + power-domains = <0x60 0x18>; + #address-cells = <0x01>; + phy-names = "dcphy"; + clock-names = "pclk\0sys_clk"; + resets = <0x02 0x355>; + interrupts = <0x00 0xa8 0x04>; + clocks = <0x02 0x279 0x02 0x27b>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dsi2"; + status = "disabled"; + rockchip,grf = <0xd7>; + phys = <0x30>; + reg = <0x00 0xfde30000 0x00 0x10000>; + phandle = <0x283>; + reset-names = "apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x284>; + + endpoint@1 { + remote-endpoint = <0x3a>; + status = "disabled"; + reg = <0x01>; + phandle = <0xef>; + }; + + endpoint@0 { + remote-endpoint = <0xf4>; + status = "disabled"; + reg = <0x00>; + phandle = <0xea>; + }; + }; + }; + }; + + iommu@fcb00000 { + interrupts = <0x00 0x17d 0x04 0x00 0x17f 0x04 0x00 0x182 0x04 0x00 0x17b 0x04>; + #iommu-cells = <0x01>; + compatible = "arm,smmu-v3"; + status = "disabled"; + interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; + reg = <0x00 0xfcb00000 0x00 0x200000>; + phandle = <0x257>; + }; + + rkcif-mipi-lvds3 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x57>; + }; + + vcc-hub-regulator { + regulator-boot-on; + gpio = <0x182 0x01 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_hub"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4af>; + }; + + syscon@fd5ac000 { + compatible = "rockchip,rk3588-usb-grf\0syscon"; + reg = <0x00 0xfd5ac000 0x00 0x4000>; + phandle = <0x74>; + }; + + qos@fdf40200 { + compatible = "syscon"; + reg = <0x00 0xfdf40200 0x00 0x20>; + phandle = <0xa9>; + }; + + rkisp@fdcb0000 { + power-domains = <0x60 0x1b>; + iommus = <0xd0>; + clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; + interrupts = <0x00 0x83 0x04 0x00 0x85 0x04 0x00 0x86 0x04>; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd>; + compatible = "rockchip,rk3588-rkisp"; + status = "okay"; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + reg = <0x00 0xfdcb0000 0x00 0x7f00>; + phandle = <0x58>; + }; + + serial@feba0000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x166>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x152 0x04>; + clocks = <0x02 0xcf 0x02 0xb1>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeba0000 0x00 0x100>; + phandle = <0x2cf>; + dmas = <0xf2 0x07 0xf2 0x08>; + reg-shift = <0x02>; + }; + + rkcif-mipi-lvds1-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x232>; + }; + + chosen { + linux,initrd-end = <0x00 0xaac72ae>; + bootargs = "storagemedia=emmc androidboot.storagemedia=emmc androidboot.mode=normal storagenode=/mmc@fe2e0000 androidboot.verifiedbootstate=orange ro rootwait earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0 root=PARTLABEL=rootfs rootfstype=ext4 overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 net.ifnames=0 rcupdate.rcu_expedited=1 rcu_nocbs=all comm-05/28/2025 androidboot.fwver=ddr-v1.15-d5483af87d,spl-v1.13,bl31-v1.44,bl32-v1.15,uboot--boot"; + linux,initrd-start = <0x00 0xa200000>; + phandle = <0x48d>; + }; + + hdmi@fde80000 { + power-domains = <0x60 0x1a>; + reg-io-width = <0x04>; + pinctrl-names = "default"; + phy-names = "hdmi"; + pinctrl-0 = <0xf9 0xfa 0xfb 0xfc>; + clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; + resets = <0x02 0x3d0 0x02 0x49c>; + interrupts = <0x00 0xa9 0x04 0x00 0xaa 0x04 0x00 0xab 0x04 0x00 0xac 0x04 0x00 0x168 0x04>; + clocks = <0x02 0x221 0x02 0x265 0x02 0x222 0x02 0x223 0x02 0x246 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x35>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-dw-hdmi"; + status = "okay"; + rockchip,grf = <0xc8>; + phys = <0xfd>; + enable-gpios = <0xfe 0x08 0x00>; + reg = <0x00 0xfde80000 0x00 0x10000 0x00 0xfde90000 0x00 0x10000>; + phandle = <0x1d4>; + reset-names = "ref\0hdp"; + rockchip,vo1_grf = <0xd8>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x288>; + + endpoint@1 { + remote-endpoint = <0xff>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe2>; + }; + + endpoint@2 { + remote-endpoint = <0x100>; + status = "disabled"; + reg = <0x02>; + phandle = <0xe8>; + }; + + endpoint@0 { + remote-endpoint = <0x3c>; + status = "okay"; + reg = <0x00>; + phandle = <0xdc>; + }; + }; + }; + }; + + cluster2-opp-table { + rockchip,pvtm-offset = <0x18>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0x27 0x28 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,pvtm-low-len-sel = <0x03>; + rockchip,high-temp-max-freq = <0x21b100>; + opp-shared; + rockchip,reboot-freq = <0x1b7740>; + rockchip,pvtm-freq = <0x188940>; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x29>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; + phandle = <0x1a>; + rockchip,idle-threshold-freq = <0x21b100>; + rockchip,pvtm-temp-prop = <0x10e 0x10e>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0xf6180>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-2016000000 { + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + }; + + opp-1200000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1416000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-supported-hw = <0x06 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-1008000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2256000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8677d400>; + opp-supported-hw = <0xf9 0x13>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1200000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1008000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-816000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2400000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8f0d1800>; + opp-supported-hw = <0xf9 0x80>; + clock-latency-ns = <0x9c40>; + }; + + opp-1800000000 { + opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2208000000 { + opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; + opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-hz = <0x00 0x839b6800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + opp-microvolt-L3 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-1608000000 { + opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-408000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1800000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + }; + + opp-2352000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8c30ac00>; + opp-supported-hw = <0xf9 0x48>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1608000000 { + opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2016000000 { + opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; + opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; + opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + }; + + opp-1416000000 { + opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-hz = <0x00 0x54667200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; + opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-408000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0xf9 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-2304000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x89544000>; + opp-supported-hw = <0xf9 0x24>; + clock-latency-ns = <0x9c40>; + }; + }; + + rkcif-dvp { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-dvp"; + status = "disabled"; + phandle = <0x51>; + }; + + rkisp0-vir2 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "okay"; + phandle = <0x23d>; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + remote-endpoint = <0x59>; + reg = <0x00>; + phandle = <0x56>; + }; + }; + }; + + i2c@fea90000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x148>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb0 0x02 0xa8>; + interrupts = <0x00 0x13e 0x04>; + clocks = <0x02 0x8d 0x02 0x85>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfea90000 0x00 0x1000>; + phandle = <0x2a4>; + reset-names = "i2c\0apb"; + + rk8602@42 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + rockchip,suspend-voltage-selector = <0x01>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_npu_s0"; + regulator-ramp-delay = <0x8fc>; + compatible = "rockchip,rk8602"; + reg = <0x42>; + phandle = <0xb3>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + syscon@fd58a000 { + compatible = "rockchip,rk3588-pmu1-grf\0syscon"; + reg = <0x00 0xfd58a000 0x00 0x2000>; + phandle = <0x104>; + }; + + syscon@fd5ec000 { + compatible = "rockchip,mipi-dcphy-grf\0syscon"; + reg = <0x00 0xfd5ec000 0x00 0x4000>; + phandle = <0x191>; + }; + + venc-opp-table { + nvmem-cells = <0xc6 0xc7>; + rockchip,leakage-voltage-sel = <0x01 0x0f 0x00 0x10 0x19 0x01 0x1a 0xfe 0x02>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,grf = <0xc8>; + nvmem-cell-names = "leakage\0opp-info"; + phandle = <0xc4>; + + opp-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-microvolt-L0 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + }; + }; + + iommu@fdc38700 { + power-domains = <0x60 0x0e>; + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x60 0x04>; + clocks = <0x02 0x190 0x02 0x18f>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvdec0_mmu"; + reg = <0x00 0xfdc38700 0x00 0x40 0x00 0xfdc38740 0x00 0x40>; + phandle = <0xc9>; + rockchip,master-handle-irq; + }; + + qos@fdf35200 { + compatible = "syscon"; + reg = <0x00 0xfdf35200 0x00 0x20>; + phandle = <0x88>; + }; + + qos@fdf71000 { + compatible = "syscon"; + reg = <0x00 0xfdf71000 0x00 0x20>; + phandle = <0x86>; + }; + + syscon@fd598000 { + compatible = "rockchip,rk3588-dsu-grf\0syscon"; + reg = <0x00 0xfd598000 0x00 0x100>; + phandle = <0x23>; + }; + + csi2-dphy2 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x211>; + }; + + syscon@fd5b4000 { + compatible = "rockchip,mipi-dphy-grf\0syscon"; + reg = <0x00 0xfd5b4000 0x00 0x1000>; + phandle = <0x192>; + }; + + uio@fe1b0000 { + compatible = "rockchip,uio-gmac"; + status = "disabled"; + reg = <0x00 0xfe1b0000 0x00 0x10000>; + phandle = <0x488>; + rockchip,ethernet = <0x1bd>; + }; + + iommu@fdb70f00 { + power-domains = <0x60 0x1e>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x73 0x04>; + clocks = <0x02 0x18a 0x02 0x189>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "rga3_1_mmu"; + reg = <0x00 0xfdb70f00 0x00 0x100>; + phandle = <0xba>; + }; + + vcc5v0-usb { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_usb"; + compatible = "regulator-fixed"; + phandle = <0x1dd>; + vin-supply = <0x1cd>; + }; + + fiq-debugger { + pinctrl-names = "default"; + rockchip,irq-mode-enable = <0x01>; + rockchip,baudrate = <0x1c200>; + pinctrl-0 = <0x1ce>; + interrupts = <0x00 0x1a7 0x08>; + rockchip,wake-irq = <0x00>; + compatible = "rockchip,fiq-debugger"; + status = "okay"; + phandle = <0x490>; + rockchip,serial-id = <0x02>; + }; + + phy@fed70000 { + clock-names = "ref\0apb"; + resets = <0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041>; + clocks = <0x02 0x2b5 0x02 0x268>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy"; + status = "disabled"; + rockchip,grf = <0x1c7>; + reg = <0x00 0xfed70000 0x00 0x2000>; + phandle = <0x1af>; + reset-names = "apb\0init\0cmn\0lane"; + }; + + ethernet@fe1b0000 { + power-domains = <0x60 0x21>; + pinctrl-names = "default"; + phy-mode = "rgmii-rxid"; + snps,mixed-burst; + snps,mtl-rx-config = <0x1bf>; + snps,reset-active-low; + pinctrl-0 = <0x1c1 0x1c2 0x1c3 0x1c4 0x1c5>; + clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; + snps,mtl-tx-config = <0x1c0>; + local-mac-address = [da 2f 1a d4 a9 85]; + resets = <0x02 0x20a>; + interrupts = <0x00 0xe3 0x04 0x00 0xe2 0x04>; + clocks = <0x02 0x144 0x02 0x145 0x02 0x167 0x02 0x16c 0x02 0x142>; + clock_in_out = "output"; + snps,tso; + compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; + status = "okay"; + rockchip,grf = <0xc8>; + interrupt-names = "macirq\0eth_wake_irq"; + snps,reset-gpio = <0x10d 0x02 0x01>; + reg = <0x00 0xfe1b0000 0x00 0x10000>; + rockchip,php_grf = <0x76>; + phandle = <0x1bd>; + phy-handle = <0x1c6>; + reset-names = "stmmaceth"; + tx_delay = <0x31>; + snps,axi-config = <0x1be>; + snps,reset-delays-us = <0x00 0x4e20 0x186a0>; + + mdio { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "snps,dwmac-mdio"; + phandle = <0x489>; + + phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x01>; + phandle = <0x1c6>; + }; + }; + + tx-queues-config { + phandle = <0x1c0>; + snps,tx-queues-to-use = <0x01>; + + queue0 { + }; + }; + + stmmac-axi-config { + snps,wr_osr_lmt = <0x04>; + phandle = <0x1be>; + snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; + snps,rd_osr_lmt = <0x08>; + }; + + rx-queues-config { + snps,rx-queues-to-use = <0x01>; + phandle = <0x1bf>; + + queue0 { + }; + }; + }; + + pvtm@fda60000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-litcore-pvtm"; + reg = <0x00 0xfda60000 0x00 0x100>; + + pvtm@2 { + clock-names = "clk\0pclk"; + clocks = <0x02 0x2ca 0x02 0x1b>; + reg = <0x02>; + }; + }; + + rkispp@fdcd8000 { + power-domains = <0x60 0x1d>; + iommus = <0xd3>; + clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; + assigned-clocks = <0x02 0x1d9>; + assigned-clock-rates = <0x5f5e100>; + interrupts = <0x00 0x8d 0x04>; + clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; + compatible = "rockchip,rk3588-rkispp"; + status = "disabled"; + interrupt-names = "fec_irq"; + reg = <0x00 0xfdcd8000 0x00 0xf00>; + phandle = <0x5c>; + }; + + qos@fdf66000 { + compatible = "syscon"; + reg = <0x00 0xfdf66000 0x00 0x20>; + phandle = <0x93>; + }; + + syscon@fd592000 { + compatible = "rockchip,rk3588-bigcore1-grf\0syscon"; + reg = <0x00 0xfd592000 0x00 0x100>; + phandle = <0x29>; + }; + + rkcif-mipi-lvds1 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x53>; + }; + + av1d@fdc70000 { + power-domains = <0x60 0x17>; + iommus = <0xce>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + reg-names = "vcd\0cache\0afbc"; + assigned-clocks = <0x02 0x49 0x02 0x4b>; + rockchip,normal-rates = <0x17d78400 0x17d78400>; + assigned-clock-rates = <0x17d78400 0x17d78400>; + resets = <0x02 0x442 0x02 0x445>; + interrupts = <0x00 0x6c 0x04 0x00 0x6b 0x04 0x00 0x6a 0x04>; + clocks = <0x02 0x49 0x02 0x4b>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x0b>; + compatible = "rockchip,av1-decoder"; + status = "okay"; + interrupt-names = "irq_av1d\0irq_cache\0irq_afbc"; + reg = <0x00 0xfdc70000 0x00 0x800 0x00 0xfdc80000 0x00 0x400 0x00 0xfdc90000 0x00 0x400>; + phandle = <0x276>; + reset-names = "video_a\0video_h"; + }; + + qos@fdf40500 { + compatible = "syscon"; + reg = <0x00 0xfdf40500 0x00 0x20>; + phandle = <0xa3>; + }; + + vcc-hub-reset-regulator { + regulator-boot-on; + gpio = <0x182 0x04 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_hub_reset"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a0>; + }; + + qos@fdf72200 { + compatible = "syscon"; + reg = <0x00 0xfdf72200 0x00 0x20>; + phandle = <0x83>; + }; + + serial@feb70000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x163>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14f 0x04>; + clocks = <0x02 0xc3 0x02 0xae>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb70000 0x00 0x100>; + phandle = <0x2cc>; + dmas = <0xf1 0x09 0xf1 0x0a>; + reg-shift = <0x02>; + }; + + rkcif-mipi-lvds2-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "okay"; + rockchip,cif = <0x55>; + phandle = <0x233>; + + port { + + endpoint { + remote-endpoint = <0x56>; + phandle = <0x59>; + }; + }; + }; + + i2c@feca0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x186>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb7 0x02 0xaf>; + interrupts = <0x00 0x145 0x04>; + clocks = <0x02 0x94 0x02 0x8c>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfeca0000 0x00 0x1000>; + phandle = <0x2e5>; + reset-names = "i2c\0apb"; + }; + + vcc-sdcard-pwr-en-regulator { + regulator-boot-on; + gpio = <0xfe 0x07 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_sdcard_pwr_en"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4a5>; + }; + + rkcif-mipi-lvds1-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x230>; + }; + + qos@fdf63000 { + compatible = "syscon"; + reg = <0x00 0xfdf63000 0x00 0x20>; + phandle = <0x8c>; + }; + + phy@fee00000 { + rockchip,pipe-grf = <0x76>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2bd>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20005 0x02 0x4d6>; + clocks = <0x02 0x2bd 0x02 0x185 0x02 0x166>; + #phy-cells = <0x01>; + compatible = "rockchip,rk3588-naneng-combphy"; + status = "okay"; + rockchip,pipe-phy-grf = <0x194>; + reg = <0x00 0xfee00000 0x00 0x100>; + phandle = <0x108>; + reset-names = "combphy-apb\0combphy"; + }; + + can@fea50000 { + pinctrl-names = "default"; + pinctrl-0 = <0x145>; + clock-names = "baudclk\0apb_pclk"; + resets = <0x02 0xb9 0x02 0xb8>; + interrupts = <0x00 0x155 0x04>; + clocks = <0x02 0x70 0x02 0x6f>; + compatible = "rockchip,can-2.0"; + status = "disabled"; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + reg = <0x00 0xfea50000 0x00 0x1000>; + phandle = <0x2a0>; + reset-names = "can\0can-apb"; + }; + + pdm@fe4b0000 { + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x139 0x13a>; + pinctrl-0 = <0x134 0x135 0x136 0x137>; + clock-names = "pdm_clk\0pdm_hclk"; + clocks = <0x02 0x29f 0x02 0x29e>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-pdm"; + pinctrl-1 = <0x138>; + status = "disabled"; + reg = <0x00 0xfe4b0000 0x00 0x1000>; + phandle = <0x29a>; + dmas = <0x7c 0x04>; + }; + + rkisp-unite-mmu@fdcb7f00 { + power-domains = <0x60 0x1c>; + clock-names = "aclk0\0iface0\0aclk1\0iface1"; + interrupts = <0x00 0x84 0x04 0x00 0x88 0x04>; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x120 0x02 0x121>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "isp0_mmu\0isp1_mmu"; + reg = <0x00 0xfdcb7f00 0x00 0x100 0x00 0xfdcc7f00 0x00 0x100>; + phandle = <0xcf>; + }; + + syscon@fd5a6000 { + clocks = <0x72>; + compatible = "rockchip,rk3588-vo-grf\0syscon"; + reg = <0x00 0xfd5a6000 0x00 0x2000>; + phandle = <0xf5>; + }; + + cpus { + #address-cells = <0x01>; + #size-cells = <0x00>; + + l2-cache-b0 { + cache-size = <0x80000>; + cache-sets = <0x400>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x17>; + }; + + l2-cache-l3 { + cache-size = <0x20000>; + cache-sets = <0x200>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x15>; + }; + + cpu@300 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x212>; + clocks = <0x0e 0x00>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a55"; + d-cache-size = <0x8000>; + next-level-cache = <0x15>; + i-cache-size = <0x8000>; + reg = <0x300>; + enable-method = "psci"; + phandle = <0x09>; + d-cache-sets = <0x80>; + operating-points-v2 = <0x0f>; + i-cache-sets = <0x80>; + }; + + l2-cache-l1 { + cache-size = <0x20000>; + cache-sets = <0x200>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x13>; + }; + + cpu@600 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x400>; + cpu-supply = <0x1c>; + clocks = <0x0e 0x03>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a76"; + dynamic-power-coefficient = <0x12c>; + d-cache-size = <0x10000>; + next-level-cache = <0x1b>; + i-cache-size = <0x10000>; + mem-supply = <0x1c>; + reg = <0x600>; + enable-method = "psci"; + phandle = <0x0c>; + d-cache-sets = <0x100>; + operating-points-v2 = <0x1a>; + i-cache-sets = <0x100>; + #cooling-cells = <0x02>; + }; + + l2-cache-b3 { + cache-size = <0x80000>; + cache-sets = <0x400>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x1d>; + }; + + idle-states { + entry-method = "psci"; + + cpu-sleep { + entry-latency-us = <0x64>; + local-timer-stop; + exit-latency-us = <0x78>; + arm,psci-suspend-param = <0x10000>; + compatible = "arm,idle-state"; + phandle = <0x10>; + min-residency-us = <0x3e8>; + }; + }; + + cpu-map { + + cluster2 { + + core1 { + cpu = <0x0d>; + }; + + core0 { + cpu = <0x0c>; + }; + }; + + cluster0 { + + core3 { + cpu = <0x09>; + }; + + core1 { + cpu = <0x07>; + }; + + core2 { + cpu = <0x08>; + }; + + core0 { + cpu = <0x06>; + }; + }; + + cluster1 { + + core1 { + cpu = <0x0b>; + }; + + core0 { + cpu = <0x0a>; + }; + }; + }; + + l3-cache { + cache-size = <0x300000>; + cache-sets = <0x1000>; + compatible = "cache"; + cache-line-size = <0x40>; + phandle = <0x1e>; + }; + + cpu@200 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x212>; + clocks = <0x0e 0x00>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a55"; + d-cache-size = <0x8000>; + next-level-cache = <0x14>; + i-cache-size = <0x8000>; + reg = <0x200>; + enable-method = "psci"; + phandle = <0x08>; + d-cache-sets = <0x80>; + operating-points-v2 = <0x0f>; + i-cache-sets = <0x80>; + }; + + l2-cache-b1 { + cache-size = <0x80000>; + cache-sets = <0x400>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x19>; + }; + + cpu@500 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x400>; + clocks = <0x0e 0x02>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a76"; + d-cache-size = <0x10000>; + next-level-cache = <0x19>; + i-cache-size = <0x10000>; + reg = <0x500>; + enable-method = "psci"; + phandle = <0x0b>; + d-cache-sets = <0x100>; + operating-points-v2 = <0x16>; + i-cache-sets = <0x100>; + }; + + cpu@0 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x212>; + cpu-supply = <0x12>; + clocks = <0x0e 0x00>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a55"; + dynamic-power-coefficient = <0x64>; + d-cache-size = <0x8000>; + next-level-cache = <0x11>; + i-cache-size = <0x8000>; + mem-supply = <0x12>; + reg = <0x00>; + enable-method = "psci"; + phandle = <0x06>; + d-cache-sets = <0x80>; + operating-points-v2 = <0x0f>; + i-cache-sets = <0x80>; + #cooling-cells = <0x02>; + }; + + l2-cache-l2 { + cache-size = <0x20000>; + cache-sets = <0x200>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x14>; + }; + + l2-cache-l0 { + cache-size = <0x20000>; + cache-sets = <0x200>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x11>; + }; + + cpu@100 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x212>; + clocks = <0x0e 0x00>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a55"; + d-cache-size = <0x8000>; + next-level-cache = <0x13>; + i-cache-size = <0x8000>; + reg = <0x100>; + enable-method = "psci"; + phandle = <0x07>; + d-cache-sets = <0x80>; + operating-points-v2 = <0x0f>; + i-cache-sets = <0x80>; + }; + + cpu@400 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x400>; + cpu-supply = <0x18>; + clocks = <0x0e 0x02>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a76"; + dynamic-power-coefficient = <0x12c>; + d-cache-size = <0x10000>; + next-level-cache = <0x17>; + i-cache-size = <0x10000>; + mem-supply = <0x18>; + reg = <0x400>; + enable-method = "psci"; + phandle = <0x0a>; + d-cache-sets = <0x100>; + operating-points-v2 = <0x16>; + i-cache-sets = <0x100>; + #cooling-cells = <0x02>; + }; + + l2-cache-b2 { + cache-size = <0x80000>; + cache-sets = <0x400>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x1b>; + }; + + cpu@700 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x400>; + clocks = <0x0e 0x03>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a76"; + d-cache-size = <0x10000>; + next-level-cache = <0x1d>; + i-cache-size = <0x10000>; + reg = <0x700>; + enable-method = "psci"; + phandle = <0x0d>; + d-cache-sets = <0x100>; + operating-points-v2 = <0x1a>; + i-cache-sets = <0x100>; + }; + }; + + vcc-hub3-reset-regulator { + gpio = <0x182 0x06 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_hub3_reset"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a1>; + }; + + rkispp1-vir0 { + rockchip,hw = <0x5c>; + compatible = "rockchip,rk3588-rkispp-vir"; + status = "disabled"; + phandle = <0x244>; + }; + + saradc@fec10000 { + vref-supply = <0x177>; + clock-names = "saradc\0apb_pclk"; + resets = <0x02 0xbe>; + interrupts = <0x00 0x18e 0x04>; + clocks = <0x02 0x9d 0x02 0x9c>; + #io-channel-cells = <0x01>; + compatible = "rockchip,rk3588-saradc"; + status = "okay"; + reg = <0x00 0xfec10000 0x00 0x10000>; + phandle = <0x1d9>; + reset-names = "saradc-apb"; + }; + + rkisp0-vir0 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23b>; + }; + + __symbols__ { + i2s2m0_lrck = "/pinctrl/i2s2/i2s2m0-lrck"; + i2c3 = "/i2c@feab0000"; + scmi_shmem = "/sram@10f000/sram@0"; + rkispp0_vir0 = "/rkispp0-vir0"; + qos_jpeg_enc0 = "/qos@fdf66400"; + i2s1m1_sdi1 = "/pinctrl/i2s1/i2s1m1-sdi1"; + dp_altmode_mux = "/i2c@fec80000/fusb302@22/connector/ports/port@1/endpoint"; + pmic_pins = "/pinctrl/pmic/pmic-pins"; + usb_host1_ohci = "/usb@fc8c0000"; + pwm9 = "/pwm@febe0010"; + i2c6m4_xfer = "/pinctrl/i2c6/i2c6m4-xfer"; + leds_gpio = "/pinctrl/leds/leds-gpio"; + i2c3m3_xfer = "/pinctrl/i2c3/i2c3m3-xfer"; + qos_usb3_1 = "/qos@fdf3e000"; + hdmi_debug4 = "/pinctrl/hdmi/hdmi-debug4"; + i2c0m2_xfer = "/pinctrl/i2c0/i2c0m2-xfer"; + gmac0_rgmii_bus = "/pinctrl/gmac0/gmac0-rgmii-bus"; + pcie30x2m2_pins = "/pinctrl/pcie30x2/pcie30x2m2-pins"; + sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; + spi0m3_cs0 = "/pinctrl/spi0/spi0m3-cs0"; + hwlock = "/hwspinlock@fe5a0000"; + pcie3x2 = "/pcie@fe160000"; + i2s2m1_mclk = "/pinctrl/i2s2/i2s2m1-mclk"; + mipim0_camera3_clk = "/pinctrl/mipi/mipim0-camera3-clk"; + mclkin_i2s0 = "/clocks/mclkin-i2s0"; + edp1_in_vp1 = "/edp@fded0000/ports/port@0/endpoint@1"; + rkvenc0_mmu = "/iommu@fdbdf000"; + pwm14 = "/pwm@febf0020"; + rk806_dvs2_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_rst"; + mipi2_csi2 = "/mipi2-csi2"; + can2m1_pins = "/pinctrl/can2/can2m1-pins"; + pcie2x1l1 = "/pcie@fe180000"; + hdmi0_in_vp2 = "/hdmi@fde80000/ports/port@0/endpoint@2"; + qos_rkvenc0_m2wo = "/qos@fdf60400"; + pwm3m2_pins = "/pinctrl/pwm3/pwm3m2-pins"; + optee = "/firmware/optee"; + l2_cache_b2 = "/cpus/l2-cache-b2"; + pwm0m1_pins = "/pinctrl/pwm0/pwm0m1-pins"; + vdpu = "/vdpu@fdb50400"; + i2s3_sdo = "/pinctrl/i2s3/i2s3-sdo"; + usbdp_phy0_u3 = "/phy@fed80000/u3-port"; + thermal_zones = "/thermal-zones"; + hdmim2_rx_scl = "/pinctrl/hdmi/hdmim2-rx-scl"; + hdmim2_rx_sda = "/pinctrl/hdmi/hdmim2-rx-sda"; + uart9m0_rtsn = "/pinctrl/uart9/uart9m0-rtsn"; + spi1m2_cs0 = "/pinctrl/spi1/spi1m2-cs0"; + pcie2x1l1_intc = "/pcie@fe180000/legacy-interrupt-controller"; + spdif1m1_tx = "/pinctrl/spdif1/spdif1m1-tx"; + venc_opp_info = "/otp@fecc0000/venc-opp-info@67"; + qos_iep = "/qos@fdf66000"; + pcfg_pull_none_drv_level_3 = "/pinctrl/pcfg-pull-none-drv-level-3"; + spi3m2_cs1 = "/pinctrl/spi3/spi3m2-cs1"; + uart4m2_xfer = "/pinctrl/uart4/uart4m2-xfer"; + vp1 = "/vop@fdd90000/ports/port@1"; + bigcore1_grf = "/syscon@fd592000"; + uart1m1_xfer = "/pinctrl/uart1/uart1m1-xfer"; + uart5m1_ctsn = "/pinctrl/uart5/uart5m1-ctsn"; + fspim1_pins = "/pinctrl/fspi/fspim1-pins"; + cpu_l1 = "/cpus/cpu@100"; + uart8 = "/serial@febb0000"; + rkisp1_vir3 = "/rkisp1-vir3"; + qos_vop_m1 = "/qos@fdf82200"; + pcie_clk2 = "/pcie-clk2"; + cluster2_opp_table = "/cluster2-opp-table"; + usb_grf = "/syscon@fd5ac000"; + pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; + jpege0_mmu = "/iommu@fdba0800"; + spi2m1_cs0 = "/pinctrl/spi2/spi2m1-cs0"; + u2phy3 = "/syscon@fd5dc000/usb2-phy@c000"; + power_led = "/leds/power"; + aclk_usb = "/clocks/aclk_usb@fd7c08a8"; + csi2_dphy1 = "/csi2-dphy1"; + spi2 = "/spi@feb20000"; + uart2_rtsn = "/pinctrl/uart2/uart2-rtsn"; + spi4m1_cs1 = "/pinctrl/spi4/spi4m1-cs1"; + pcfg_pull_up_drv_level_15 = "/pinctrl/pcfg-pull-up-drv-level-15"; + vo1_grf = "/syscon@fd5a8000"; + pcie_essd = "/pcie-essd"; + i2c4m3_xfer = "/pinctrl/i2c4/i2c4m3-xfer"; + gpio0 = "/pinctrl/gpio@fd8a0000"; + saradc = "/saradc@fec10000"; + i2s1m0_sdi3 = "/pinctrl/i2s1/i2s1m0-sdi3"; + i2c1m2_xfer = "/pinctrl/i2c1/i2c1m2-xfer"; + csidphy0_out = "/csi2-dphy0/ports/port@1/endpoint@0"; + emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; + mclkout_i2s3 = "/clocks/mclkout-i2s3@fd58c318"; + xc7160_out0 = "/i2c@fec80000/XC7160b@1b/port/endpoint"; + rkcif_mipi_lvds1_sditf_vir1 = "/rkcif-mipi-lvds1-sditf-vir1"; + dsi1 = "/dsi@fde30000"; + venc_opp_table = "/venc-opp-table"; + qos_isp0_mwo = "/qos@fdf40500"; + pmu_pins = "/pinctrl/pmu/pmu-pins"; + gmac0_miim = "/pinctrl/gmac0/gmac0-miim"; + spi3m0_cs0 = "/pinctrl/spi3/spi3m0-cs0"; + mipi_dcphy0 = "/mipi-dcphy-dummy"; + minidump_mem = "/reserved-memory/minidump-mem@c000000"; + avdd_1v2_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG3"; + pwm7m3_pins = "/pinctrl/pwm7/pwm7m3-pins"; + route_edp1 = "/display-subsystem/route/route-edp1"; + hdmi1 = "/hdmi@fdea0000"; + crypto = "/crypto@fe370000"; + hdmi1_in_vp2 = "/hdmi@fdea0000/ports/port@0/endpoint@2"; + dfi = "/dfi@fe060000"; + can0m0_pins = "/pinctrl/can0/can0m0-pins"; + pcfg_pull_up_drv_level_2 = "/pinctrl/pcfg-pull-up-drv-level-2"; + pinctrl = "/pinctrl"; + rgmii_phy0 = "/ethernet@fe1b0000/mdio/phy@1"; + pcfg_pull_down_drv_level_6 = "/pinctrl/pcfg-pull-down-drv-level-6"; + dp0m0_pins = "/pinctrl/dp0/dp0m0-pins"; + i2s0_sdo3 = "/pinctrl/i2s0/i2s0-sdo3"; + vcc_sata_pwr_en = "/vcc-sata-pwr-en-regulator"; + pwm1m1_pins = "/pinctrl/pwm1/pwm1m1-pins"; + pcie30_avdd1v8 = "/pcie30-avdd1v8"; + usb2phy3_grf = "/syscon@fd5dc000"; + u2phy2_host = "/syscon@fd5d8000/usb2-phy@8000/host-port"; + hym8563_int = "/pinctrl/hym8563/hym8563-int"; + mailbox1 = "/mailbox@fec70000"; + pdm0m1_sdi3 = "/pinctrl/pdm0/pdm0m1-sdi3"; + combphy1_ps = "/phy@fee10000"; + hdptxphy0_grf = "/syscon@fd5e0000"; + sdei = "/firmware/sdei"; + vp0_out_dp1 = "/vop@fdd90000/ports/port@0/endpoint@3"; + uart5m2_xfer = "/pinctrl/uart5/uart5m2-xfer"; + uart9m2_ctsn = "/pinctrl/uart9/uart9m2-ctsn"; + uart2m1_xfer = "/pinctrl/uart2/uart2m1-xfer"; + dp0_out = "/dp@fde50000/ports/port@1/endpoint"; + uart6m1_ctsn = "/pinctrl/uart6/uart6m1-ctsn"; + route_rgb = "/display-subsystem/route/route-rgb"; + csidphy0_out1 = "/csi2-dphy0/ports/port@1/endpoint@0"; + i2c1 = "/i2c@fea90000"; + pinctrl_rk806 = "/spi@feb20000/rk806single@0/pinctrl_rk806"; + cpu_code = "/otp@fecc0000/cpu-code@2"; + pwm7 = "/pwm@febd0030"; + mipi5_csi2_hw = "/mipi5-csi2-hw@fdd60000"; + gpu_leakage = "/otp@fecc0000/gpu-leakage@1b"; + hdmi_debug2 = "/pinctrl/hdmi/hdmi-debug2"; + pdm0m0_clk = "/pinctrl/pdm0/pdm0m0-clk"; + gmac0_ppsclk = "/pinctrl/gmac0/gmac0-ppsclk"; + i2c8m4_xfer = "/pinctrl/i2c8/i2c8m4-xfer"; + vdd_npu_s0 = "/i2c@fea90000/rk8602@42"; + i2c5m3_xfer = "/pinctrl/i2c5/i2c5m3-xfer"; + gmac0 = "/ethernet@fe1b0000"; + i2c2m2_xfer = "/pinctrl/i2c2/i2c2m2-xfer"; + rockchip_system_monitor = "/rockchip-system-monitor"; + pcie30x4m2_pins = "/pinctrl/pcie30x4/pcie30x4m2-pins"; + pwm12 = "/pwm@febf0000"; + emmc_cmd = "/pinctrl/emmc/emmc-cmd"; + i2s1_8ch = "/i2s@fe480000"; + pcie30x1m1_pins = "/pinctrl/pcie30x1/pcie30x1m1-pins"; + uart4_ctsn = "/pinctrl/uart4/uart4-ctsn"; + vdd_cpu_big0_mem_s0 = "/i2c@fd880000/rk8602@42"; + pcfg_pull_none = "/pinctrl/pcfg-pull-none"; + i2s1m0_mclk = "/pinctrl/i2s1/i2s1m0-mclk"; + vp1_out_edp1 = "/vop@fdd90000/ports/port@1/endpoint@4"; + hdmi0_in_vp0 = "/hdmi@fde80000/ports/port@0/endpoint@0"; + vcc_4g = "/vcc-4g-regulator"; + firefly_leds = "/leds"; + jpege3 = "/jpege-core@fdbac000"; + l2_cache_b0 = "/cpus/l2-cache-b0"; + pmu1_grf = "/syscon@fd58a000"; + aclk_rkvenc1_pre = "/clocks/aclk_rkvenc1_pre@fd7c08c0"; + can1m0_pins = "/pinctrl/can1/can1m0-pins"; + spi0m3_pins = "/pinctrl/spi0/spi0m3-pins"; + pwm5m2_pins = "/pinctrl/pwm5/pwm5m2-pins"; + mipidphy0_in_ucam1 = "/csi2-dphy0/ports/port@0/endpoint@1"; + i2s0_lrck = "/pinctrl/i2s0/i2s0-lrck"; + clk32k_out0 = "/pinctrl/clk32k/clk32k-out0"; + dp1m0_pins = "/pinctrl/dp1/dp1m0-pins"; + pwm2m1_pins = "/pinctrl/pwm2/pwm2m1-pins"; + usbc0 = "/i2c@fec80000/fusb302@22"; + eth1_pins = "/pinctrl/eth1/eth1-pins"; + pcfg_pull_none_drv_level_1 = "/pinctrl/pcfg-pull-none-drv-level-1"; + csi2_dphy0_hw = "/csi2-dphy0-hw@fedc0000"; + pdm1m1_sdi3 = "/pinctrl/pdm1/pdm1m1-sdi3"; + dsi0_in_vp3 = "/dsi@fde20000/ports/port@0/endpoint@1"; + hdmim1_tx1_cec = "/pinctrl/hdmi/hdmim1-tx1-cec"; + usbc0_role_sw = "/i2c@fec80000/fusb302@22/ports/port@0/endpoint@0"; + uart6 = "/serial@feb90000"; + rkisp1_vir1 = "/rkisp1-vir1"; + sdhci = "/mmc@fe2e0000"; + uart6m2_xfer = "/pinctrl/uart6/uart6m2-xfer"; + target = "/thermal-zones/soc-thermal/trips/trip-point-1"; + rkcif_mipi_lvds_sditf_vir3 = "/rkcif-mipi-lvds-sditf-vir3"; + pcfg_pull_none_drv_level_0_smt = "/pinctrl/pcfg-pull-none-drv-level-0-smt"; + uart3m1_xfer = "/pinctrl/uart3/uart3m1-xfer"; + uart7m1_ctsn = "/pinctrl/uart7/uart7m1-ctsn"; + uart0m0_xfer = "/pinctrl/uart0/uart0m0-xfer"; + rgb_in_vp3 = "/syscon@fd58c000/rgb/ports/port@0/endpoint@2"; + rkcif_mipi_lvds5_sditf_vir2 = "/rkcif-mipi-lvds5-sditf-vir2"; + u2phy1 = "/syscon@fd5d4000/usb2-phy@4000"; + i2s5_8ch = "/i2s@fddf0000"; + i2s2m0_sdo = "/pinctrl/i2s2/i2s2m0-sdo"; + gpu = "/gpu@fb000000"; + spi0 = "/spi@feb00000"; + iep = "/iep@fdbb0000"; + pcfg_pull_up_drv_level_13 = "/pinctrl/pcfg-pull-up-drv-level-13"; + spdif_tx5 = "/spdif-tx@fddb8000"; + hdptxphy_hdmi_clk1 = "/hdmiphy@fed70000/clk-port"; + drm_logo = "/reserved-memory/drm-logo@00000000"; + i2s1m0_sdi1 = "/pinctrl/i2s1/i2s1m0-sdi1"; + rk806_dvs3_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_null"; + gmac1_ppsclk = "/pinctrl/gmac1/gmac1-ppsclk"; + usb_host0_ohci = "/usb@fc840000"; + mclkout_i2s1 = "/clocks/mclkout-i2s1@fd58c318"; + i2c6m3_xfer = "/pinctrl/i2c6/i2c6m3-xfer"; + i2c3m2_xfer = "/pinctrl/i2c3/i2c3m2-xfer"; + vop_opp_info = "/otp@fecc0000/vop-opp-info@61"; + cif_dvp_bus16 = "/pinctrl/cif/cif-dvp-bus16"; + i2c0m1_xfer = "/pinctrl/i2c0/i2c0m1-xfer"; + pcie30x2m1_pins = "/pinctrl/pcie30x2/pcie30x2m1-pins"; + mipidcphy0_grf = "/syscon@fd5e8000"; + vdd_cpu_big1_mem_s0 = "/i2c@fd880000/rk8603@43"; + pcie30phy = "/phy@fee80000"; + dmc = "/dmc"; + i2s2m0_mclk = "/pinctrl/i2s2/i2s2m0-mclk"; + mipidcphy1 = "/phy@fedb0000"; + dp1_sound = "/dp1-sound"; + hdmi1_in_vp0 = "/hdmi@fdea0000/ports/port@0/endpoint@0"; + scmi = "/firmware/scmi"; + pcfg_pull_up_drv_level_0 = "/pinctrl/pcfg-pull-up-drv-level-0"; + gmac1_clkinout = "/pinctrl/gmac1/gmac1-clkinout"; + pcfg_pull_down_drv_level_4 = "/pinctrl/pcfg-pull-down-drv-level-4"; + i2s0_sdo1 = "/pinctrl/i2s0/i2s0-sdo1"; + l3_cache = "/cpus/l3-cache"; + i2s3_idle = "/pinctrl/i2s3/i2s3-idle"; + pcfg_pull_none_drv_level_4_smt = "/pinctrl/pcfg-pull-none-drv-level-4-smt"; + litcpu_pins = "/pinctrl/litcpu/litcpu-pins"; + mipi1_csi2 = "/mipi1-csi2"; + can2m0_pins = "/pinctrl/can2/can2m0-pins"; + pwm6m2_pins = "/pinctrl/pwm6/pwm6m2-pins"; + usbdp_phy0 = "/phy@fed80000"; + pdm0m1_sdi1 = "/pinctrl/pdm0/pdm0m1-sdi1"; + pwm3m1_pins = "/pinctrl/pwm3/pwm3m1-pins"; + vdd_log_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG3"; + i2s9_8ch = "/i2s@fddfc000"; + pwm0m0_pins = "/pinctrl/pwm0/pwm0m0-pins"; + vcc_hub3_reset = "/vcc-hub3-reset-regulator"; + dsi1_in_vp3 = "/dsi@fde30000/ports/port@0/endpoint@1"; + otp_cpu_version = "/otp@fecc0000/cpu-version@1c"; + pcie2x1l0_intc = "/pcie@fe170000/legacy-interrupt-controller"; + spdif0m1_tx = "/pinctrl/spdif0/spdif0m1-tx"; + pcfg_pull_down_drv_level_15 = "/pinctrl/pcfg-pull-down-drv-level-15"; + XC7160 = "/i2c@fec80000/XC7160b@1b"; + rkcif_mipi_lvds4_sditf_vir3 = "/rkcif-mipi-lvds4-sditf-vir3"; + uart7m2_xfer = "/pinctrl/uart7/uart7m2-xfer"; + uart4m1_xfer = "/pinctrl/uart4/uart4m1-xfer"; + hdmim1_tx1_scl = "/pinctrl/hdmi/hdmim1-tx1-scl"; + hdmim1_tx1_sda = "/pinctrl/hdmi/hdmim1-tx1-sda"; + uart8m1_ctsn = "/pinctrl/uart8/uart8m1-ctsn"; + i2s2_2ch = "/i2s@fe490000"; + pwm5 = "/pwm@febd0010"; + uart1m0_xfer = "/pinctrl/uart1/uart1m0-xfer"; + uart5m0_ctsn = "/pinctrl/uart5/uart5m0-ctsn"; + fspim0_cs1 = "/pinctrl/fspi/fspim0-cs1"; + fspim0_pins = "/pinctrl/fspi/fspim0-pins"; + rkisp0_vir3 = "/rkisp0-vir3"; + l2_cache_l3 = "/cpus/l2-cache-l3"; + rk806_dvs3_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_dvs"; + hdmi_debug0 = "/pinctrl/hdmi/hdmi-debug0"; + hdmim1_tx1_hpd = "/pinctrl/hdmi/hdmim1-tx1-hpd"; + vp1_out_dp0 = "/vop@fdd90000/ports/port@1/endpoint@0"; + qos_isp0_mro = "/qos@fdf40400"; + spi0m2_cs1 = "/pinctrl/spi0/spi0m2-cs1"; + vdd_gpu_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; + tsadc_shut = "/pinctrl/tsadc/tsadc-shut"; + pwm10 = "/pwm@febe0020"; + i2c7m3_xfer = "/pinctrl/i2c7/i2c7m3-xfer"; + rktimer = "/timer@feae0000"; + cpub0_leakage = "/otp@fecc0000/cpub0-leakage@17"; + i2c4m2_xfer = "/pinctrl/i2c4/i2c4m2-xfer"; + hclk_rkvdec1_pre = "/clocks/hclk_rkvdec1_pre@fd7c08a4"; + pcie30phy_pins = "/pinctrl/pcie30phy/pcie30phy-pins"; + jpege1 = "/jpege-core@fdba4000"; + pcfg_pull_none_drv_level_14 = "/pinctrl/pcfg-pull-none-drv-level-14"; + i2c1m1_xfer = "/pinctrl/i2c1/i2c1m1-xfer"; + rkcif_dvp_sditf = "/rkcif-dvp-sditf"; + rkcif_mipi_lvds4_sditf = "/rkcif-mipi-lvds4-sditf"; + vp2_out_dp1 = "/vop@fdd90000/ports/port@2/endpoint@5"; + vp2_out_dsi0 = "/vop@fdd90000/ports/port@2/endpoint@3"; + its1 = "/interrupt-controller@fe600000/msi-controller@fe660000"; + cpu_b3 = "/cpus/cpu@700"; + vcc_hub_reset = "/vcc-hub-reset-regulator"; + spi1m1_cs1 = "/pinctrl/spi1/spi1m1-cs1"; + vdd_npu_mem_s0 = "/i2c@fea90000/rk8602@42"; + pwm7m2_pins = "/pinctrl/pwm7/pwm7m2-pins"; + pdm1m1_sdi1 = "/pinctrl/pdm1/pdm1m1-sdi1"; + vbus5v0_typec_pwr_en = "/vbus5v0-typec-pwr-en-regulator"; + pwm4m1_pins = "/pinctrl/pwm4/pwm4m1-pins"; + dmc_opp_table = "/dmc-opp-table"; + pcie30x4_button_rstn = "/pinctrl/pcie30x4/pcie30x4-button-rstn"; + uart4 = "/serial@feb70000"; + pwm1m0_pins = "/pinctrl/pwm1/pwm1m0-pins"; + spi0m0_cs0 = "/pinctrl/spi0/spi0m0-cs0"; + pldo6_s3 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG6"; + mipim1_camera2_clk = "/pinctrl/mipi/mipim1-camera2-clk"; + mipim0_camera0_clk = "/pinctrl/mipi/mipim0-camera0-clk"; + rkcif_mipi_lvds_sditf_vir1 = "/rkcif-mipi-lvds-sditf-vir1"; + pcfg_pull_up_drv_level_9 = "/pinctrl/pcfg-pull-up-drv-level-9"; + dmac2 = "/dma-controller@fed10000"; + pdm0m0_sdi3 = "/pinctrl/pdm0/pdm0m0-sdi3"; + qos_gpu_m2 = "/qos@fdf35400"; + i2s0_sdi3 = "/pinctrl/i2s0/i2s0-sdi3"; + cluster0_opp_table = "/cluster0-opp-table"; + spi2m0_cs1 = "/pinctrl/spi2/spi2m0-cs1"; + otp_id = "/otp@fecc0000/id@7"; + uart5m1_xfer = "/pinctrl/uart5/uart5m1-xfer"; + uart9m1_ctsn = "/pinctrl/uart9/uart9m1-ctsn"; + qos_rga3_0 = "/qos@fdf67000"; + usbdp_phy0_dp = "/phy@fed80000/dp-port"; + uart2m0_xfer = "/pinctrl/uart2/uart2m0-xfer"; + uart6m0_ctsn = "/pinctrl/uart6/uart6m0-ctsn"; + npu_pins = "/pinctrl/npu/npu-pins"; + pcfg_pull_up_drv_level_11 = "/pinctrl/pcfg-pull-up-drv-level-11"; + spdif_tx3 = "/spdif-tx@fdde0000"; + rkispp0 = "/rkispp@fdcd0000"; + xin32k = "/clocks/xin32k"; + vcc_1v8_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG10"; + qos_usb2host_1 = "/qos@fdf3e600"; + bt_sco = "/bt-sco"; + pcfg_output_high_pull_none = "/pinctrl/pcfg-output-high-pull-none"; + adc_keys = "/adc-keys"; + rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; + i2c8 = "/i2c@feca0000"; + dp0 = "/dp@fde50000"; + mipi_te1 = "/pinctrl/mipi/mipi-te1"; + i2c8m3_xfer = "/pinctrl/i2c8/i2c8m3-xfer"; + i2c5m2_xfer = "/pinctrl/i2c5/i2c5m2-xfer"; + pcie30x2_button_rstn = "/pinctrl/pcie30x2/pcie30x2-button-rstn"; + syssram = "/sram@ff001000"; + pcfg_pull_down_drv_level_2 = "/pinctrl/pcfg-pull-down-drv-level-2"; + qos_hdmirx = "/qos@fdf81200"; + i2c2m1_xfer = "/pinctrl/i2c2/i2c2m1-xfer"; + pcie30x4m1_pins = "/pinctrl/pcie30x4/pcie30x4m1-pins"; + vdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG5"; + hw_decompress = "/decompress@fea80000"; + pcie30x1m0_pins = "/pinctrl/pcie30x1/pcie30x1m0-pins"; + mipim0_camera4_clk = "/pinctrl/mipi/mipim0-camera4-clk"; + gmac1_txer = "/pinctrl/gmac1/gmac1-txer"; + uart3_ctsn = "/pinctrl/uart3/uart3-ctsn"; + vcc_sdcard_pwr_en = "/vcc-sdcard-pwr-en-regulator"; + mipi0_csi2_hw = "/mipi0-csi2-hw@fdd10000"; + rkvenc1_mmu = "/iommu@fdbef000"; + edp0 = "/edp@fdec0000"; + rkvenc_ccu = "/rkvenc-ccu"; + rk806_dvs3_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_rst"; + power = "/power-management@fd8d8000/power-controller"; + vad = "/vad@fe4d0000"; + spi3m3_pins = "/pinctrl/spi3/spi3m3-pins"; + pwm8m2_pins = "/pinctrl/pwm8/pwm8m2-pins"; + spi0m2_pins = "/pinctrl/spi0/spi0m2-pins"; + pwm5m1_pins = "/pinctrl/pwm5/pwm5m1-pins"; + vcc_3v3_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG4"; + aclk_isp1_pre = "/clocks/aclk_isp1_pre@fd7c0868"; + pwm2m0_pins = "/pinctrl/pwm2/pwm2m0-pins"; + i2s1m1_sdo2 = "/pinctrl/i2s1/i2s1m1-sdo2"; + pcfg_pull_down_drv_level_13 = "/pinctrl/pcfg-pull-down-drv-level-13"; + eth0_pins = "/pinctrl/eth0/eth0-pins"; + rkcif_mipi_lvds4_sditf_vir1 = "/rkcif-mipi-lvds4-sditf-vir1"; + pwm3 = "/pwm@fd8b0030"; + pdm1m0_sdi3 = "/pinctrl/pdm1/pdm1m0-sdi3"; + rkcif_mmu = "/iommu@fdce0800"; + usbc0_int = "/pinctrl/usb-typec/usbc0-int"; + gmac0_tx_bus2 = "/pinctrl/gmac0/gmac0-tx-bus2"; + sata2 = "/sata@fe230000"; + uart9m2_xfer = "/pinctrl/uart9/uart9m2-xfer"; + dp0_in_vp2 = "/dp@fde50000/ports/port@0/endpoint@2"; + hdmiin_sound = "/hdmiin-sound"; + rkisp0_vir1 = "/rkisp0-vir1"; + uart6_gpios = "/pinctrl/wireless-bluetooth/uart6-gpios"; + spi3m3_cs1 = "/pinctrl/spi3/spi3m3-cs1"; + l2_cache_l1 = "/cpus/l2-cache-l1"; + pcfg_pull_none_drv_level_8 = "/pinctrl/pcfg-pull-none-drv-level-8"; + uart6m1_xfer = "/pinctrl/uart6/uart6m1-xfer"; + pwm11m3_pins = "/pinctrl/pwm11/pwm11m3-pins"; + vp2_out_hdmi0 = "/vop@fdd90000/ports/port@2/endpoint@2"; + qos_hdcp1 = "/qos@fdf81000"; + scmi_reset = "/firmware/scmi/protocol@16"; + vdd_cpu_lit_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; + i2s0_mclk = "/pinctrl/i2s0/i2s0-mclk"; + uart3m0_xfer = "/pinctrl/uart3/uart3m0-xfer"; + uart7m0_ctsn = "/pinctrl/uart7/uart7m0-ctsn"; + usbhost_dwc3_0 = "/usbhost3_0/usb@fcd00000"; + hdmim0_rx_hpdin = "/pinctrl/hdmi/hdmim0-rx-hpdin"; + edp0_out = "/edp@fdec0000/ports/port@1/endpoint"; + rkisp0 = "/rkisp@fdcb0000"; + dsu_grf = "/syscon@fd598000"; + vcc_fan_pwr_en = "/vcc-fan-pwr-en-regulator"; + gmac1_rx_bus2 = "/pinctrl/gmac1/gmac1-rx-bus2"; + uart1m2_rtsn = "/pinctrl/uart1/uart1m2-rtsn"; + csi2_dcphy0 = "/csi2-dcphy0"; + usb2phy0_grf = "/syscon@fd5d0000"; + scmi_clk = "/firmware/scmi/protocol@14"; + emmc_clk = "/pinctrl/emmc/emmc-clk"; + jpege1_mmu = "/iommu@fdba4800"; + qos_rkvenc1_m1ro = "/qos@fdf61200"; + spi2m2_cs0 = "/pinctrl/spi2/spi2m2-cs0"; + vcc5v0_host = "/vcc5v0-host"; + cru = "/clock-controller@fd7c0000"; + hdmim0_tx0_cec = "/pinctrl/hdmi/hdmim0-tx0-cec"; + pcfg_pull_none_drv_level_12 = "/pinctrl/pcfg-pull-none-drv-level-12"; + rk806_dvs2_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_null"; + cpub01_opp_info = "/otp@fecc0000/cpub01-opp-info@43"; + i2s3_sdi = "/pinctrl/i2s3/i2s3-sdi"; + aclk_rkvdec0_pre = "/clocks/aclk_rkvdec0_pre@fd7c08a0"; + cpu_b1 = "/cpus/cpu@500"; + i2c6m2_xfer = "/pinctrl/i2c6/i2c6m2-xfer"; + rknpu_mmu = "/iommu@fdab9000"; + rkcif_mipi_lvds_sditf = "/rkcif-mipi-lvds-sditf"; + i2c3m1_xfer = "/pinctrl/i2c3/i2c3m1-xfer"; + i2c0m0_xfer = "/pinctrl/i2c0/i2c0m0-xfer"; + pcie30x2m0_pins = "/pinctrl/pcie30x2/pcie30x2m0-pins"; + qos_isp1_mwo = "/qos@fdf41000"; + mipi2_csi2_output1 = "/mipi2-csi2/ports/port@1/endpoint@0"; + gmac1_stmmac_axi_setup = "/ethernet@fe1c0000/stmmac-axi-config"; + vcc5v0_usbdcin = "/vcc5v0-usbdcin"; + spi3m1_cs0 = "/pinctrl/spi3/spi3m1-cs0"; + reboot_mode = "/syscon@fd588000/reboot-mode"; + rga3_0_mmu = "/iommu@fdb60f00"; + uart2 = "/serial@feb50000"; + imx415_out0 = "/i2c@fec80000/imx415@37/port/endpoint"; + rkcif_mipi_lvds3_sditf_vir2 = "/rkcif-mipi-lvds3-sditf-vir2"; + pwm9m2_pins = "/pinctrl/pwm9/pwm9m2-pins"; + fec0_mmu = "/iommu@fdcd0f00"; + mipi0_csi2 = "/mipi0-csi2"; + spi1m2_pins = "/pinctrl/spi1/spi1m2-pins"; + pcfg_pull_up_drv_level_7 = "/pinctrl/pcfg-pull-up-drv-level-7"; + pwm6m1_pins = "/pinctrl/pwm6/pwm6m1-pins"; + tsadc_shut_org = "/pinctrl/tsadc/tsadc-shut-org"; + qos_rkvdec1 = "/qos@fdf63000"; + dmac0 = "/dma-controller@fea10000"; + vp2_out_edp1 = "/vop@fdd90000/ports/port@2/endpoint@6"; + pdm0m0_sdi1 = "/pinctrl/pdm0/pdm0m0-sdi1"; + qos_gpu_m0 = "/qos@fdf35000"; + pwm3m0_pins = "/pinctrl/pwm3/pwm3m0-pins"; + i2s0_sdi1 = "/pinctrl/i2s0/i2s0-sdi1"; + qos_av1 = "/qos@fdf64000"; + pcfg_output_low = "/pinctrl/pcfg-output-low"; + spdif_tx1 = "/spdif-tx@fe4f0000"; + hdptxphy1_grf = "/syscon@fd5e4000"; + spi4m0_cs0 = "/pinctrl/spi4/spi4m0-cs0"; + dp1_in_vp2 = "/dp@fde60000/ports/port@0/endpoint@2"; + jpegd_mmu = "/iommu@fdb90480"; + sata0m1_pins = "/pinctrl/sata0/sata0m1-pins"; + uart7m1_xfer = "/pinctrl/uart7/uart7m1-xfer"; + vp1_out_hdmi1 = "/vop@fdd90000/ports/port@1/endpoint@5"; + dp1_out = "/dp@fde60000/ports/port@1/endpoint"; + otp = "/otp@fecc0000"; + uart4m0_xfer = "/pinctrl/uart4/uart4m0-xfer"; + uart8m0_ctsn = "/pinctrl/uart8/uart8m0-ctsn"; + hdcp1 = "/hdcp@fde70000"; + rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; + i2c6 = "/i2c@fec80000"; + qos_jpeg_enc3 = "/qos@fdf66a00"; + i2s2m1_idle = "/pinctrl/i2s2/i2s2m1-idle"; + refclk_pins = "/pinctrl/refclk/refclk-pins"; + pcie3x4_intc = "/pcie@fe150000/legacy-interrupt-controller"; + hdptxphy_hdmi1 = "/hdmiphy@fed70000"; + mipi2_lvds2_sditf = "/rkcif-mipi-lvds2-sditf/port/endpoint"; + pdm1 = "/pdm@fe4c0000"; + vdd_cpu_lit_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; + pdm0m1_clk = "/pinctrl/pdm0/pdm0m1-clk"; + pcfg_pull_down_drv_level_0 = "/pinctrl/pcfg-pull-down-drv-level-0"; + qos_vicap_m0 = "/qos@fdf40600"; + gic = "/interrupt-controller@fe600000"; + vdd_cpu_big1_s0 = "/i2c@fd880000/rk8603@43"; + uart0_rtsn = "/pinctrl/uart0/uart0-rtsn"; + i2c7m2_xfer = "/pinctrl/i2c7/i2c7m2-xfer"; + mclkin_i2s3 = "/clocks/mclkin-i2s3"; + hdmim0_tx0_scl = "/pinctrl/hdmi/hdmim0-tx0-scl"; + hdmim0_tx0_sda = "/pinctrl/hdmi/hdmim0-tx0-sda"; + i2c4m1_xfer = "/pinctrl/i2c4/i2c4m1-xfer"; + spdif1m0_tx = "/pinctrl/spdif1/spdif1m0-tx"; + sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; + i2c1m0_xfer = "/pinctrl/i2c1/i2c1m0-xfer"; + rkcif_mipi_lvds2_sditf_vir3 = "/rkcif-mipi-lvds2-sditf-vir3"; + hdptxphy1 = "/phy@fed70000"; + route_dp1 = "/display-subsystem/route/route-dp1"; + hdmim0_tx0_hpd = "/pinctrl/hdmi/hdmim0-tx0-hpd"; + i2s1m1_sdo0 = "/pinctrl/i2s1/i2s1m1-sdo0"; + pdm1m0_clk = "/pinctrl/pdm1/pdm1m0-clk"; + pcfg_pull_down_drv_level_11 = "/pinctrl/pcfg-pull-down-drv-level-11"; + usbdrd3_1 = "/usbdrd3_1"; + spi2m2_pins = "/pinctrl/spi2/spi2m2-pins"; + pwm7m1_pins = "/pinctrl/pwm7/pwm7m1-pins"; + rkcif_mipi_lvds1_sditf = "/rkcif-mipi-lvds1-sditf"; + pwm1 = "/pwm@fd8b0010"; + pdm1m0_sdi1 = "/pinctrl/pdm1/pdm1m0-sdi1"; + threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; + pwm4m0_pins = "/pinctrl/pwm4/pwm4m0-pins"; + gmac0_mtl_rx_setup = "/ethernet@fe1b0000/rx-queues-config"; + sata0 = "/sata@fe210000"; + dp0_in_vp0 = "/dp@fde50000/ports/port@0/endpoint@0"; + can2 = "/can@fea70000"; + pcfg_pull_none_drv_level_6 = "/pinctrl/pcfg-pull-none-drv-level-6"; + usbdrd_dwc3_0 = "/usbdrd3_0/usb@fc000000"; + rkvenc0 = "/rkvenc-core@fdbd0000"; + bt_reset_gpio = "/pinctrl/wireless-bluetooth/bt-reset-gpio"; + sata1m1_pins = "/pinctrl/sata1/sata1m1-pins"; + spll = "/clocks/spll"; + uart8m1_xfer = "/pinctrl/uart8/uart8m1-xfer"; + sata_pins = "/pinctrl/sata/sata-pins"; + pcfg_pull_none_drv_level_1_smt = "/pinctrl/pcfg-pull-none-drv-level-1-smt"; + qos_npu1 = "/qos@fdf70000"; + uart5m0_xfer = "/pinctrl/uart5/uart5m0-xfer"; + uart9m0_ctsn = "/pinctrl/uart9/uart9m0-ctsn"; + pwm10m2_pins = "/pinctrl/pwm10/pwm10m2-pins"; + rk806_dvs1_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_pwrdn"; + pipe_phy0_grf = "/syscon@fd5bc000"; + es8388 = "/i2c@fec80000/es8388@11"; + spdif_rx2 = "/spdif-rx@fde18000"; + usb_host1_ehci = "/usb@fc880000"; + xin24m = "/clocks/xin24m"; + pcie20x1_2_button_rstn = "/pinctrl/pcie20x1/pcie20x1-2-button-rstn"; + mipi2_csi2_hw = "/mipi2-csi2-hw@fdd30000"; + acdcdig_dsm = "/codec-digital@fe500000"; + vop_grf = "/syscon@fd5a4000"; + rk806_dvs1_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_slp"; + i2s6_8ch = "/i2s@fddf4000"; + i2s2m1_sdo = "/pinctrl/i2s2/i2s2m1-sdo"; + pcie30x1_1_button_rstn = "/pinctrl/pcie30x1/pcie30x1-1-button-rstn"; + pcfg_output_low_pull_down = "/pinctrl/pcfg-output-low-pull-down"; + pcfg_pull_none_drv_level_10 = "/pinctrl/pcfg-pull-none-drv-level-10"; + pdm0m1_clk1 = "/pinctrl/pdm0/pdm0m1-clk1"; + mipidphy0_grf = "/syscon@fd5b4000"; + route_dsi1 = "/display-subsystem/route/route-dsi1"; + route_hdmi0 = "/display-subsystem/route/route-hdmi0"; + rkvdec_ccu = "/rkvdec-ccu@fdc30000"; + csi2_dphy4 = "/csi2-dphy4"; + gmac1_rgmii_bus = "/pinctrl/gmac1/gmac1-rgmii-bus"; + qos_sdio = "/qos@fdf39000"; + tsadc = "/tsadc@fec00000"; + pcfg_output_high_pull_up = "/pinctrl/pcfg-output-high-pull-up"; + hclk_usb = "/clocks/hclk_usb@fd7c08a8"; + avcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG1"; + edp0_in_vp2 = "/edp@fdec0000/ports/port@0/endpoint@2"; + mdio1 = "/ethernet@fe1c0000/mdio"; + gpio3 = "/pinctrl/gpio@fec40000"; + gpu_opp_table = "/gpu-opp-table"; + cif_mipi2_in0 = "/rkcif-mipi-lvds2/port/endpoint"; + pcfg_output_high = "/pinctrl/pcfg-output-high"; + i2c8m2_xfer = "/pinctrl/i2c8/i2c8m2-xfer"; + vdpu_mmu = "/iommu@fdb50800"; + i2c5m1_xfer = "/pinctrl/i2c5/i2c5m1-xfer"; + combphy0_ps = "/phy@fee00000"; + rgb = "/syscon@fd58c000/rgb"; + hclk_vo1 = "/clocks/hclk_vo1@fd7c08ec"; + i2c2m0_xfer = "/pinctrl/i2c2/i2c2m0-xfer"; + uart0 = "/serial@fd890000"; + mipidcphy1_grf = "/syscon@fd5ec000"; + pcie30x4m0_pins = "/pinctrl/pcie30x4/pcie30x4m0-pins"; + vdd_ddr_pll_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG2"; + gmac0_txer = "/pinctrl/gmac0/gmac0-txer"; + uart2_ctsn = "/pinctrl/uart2/uart2-ctsn"; + pcfg_pull_up_drv_level_5 = "/pinctrl/pcfg-pull-up-drv-level-5"; + pcfg_pull_down_drv_level_9 = "/pinctrl/pcfg-pull-down-drv-level-9"; + pcfg_pull_none_drv_level_5_smt = "/pinctrl/pcfg-pull-none-drv-level-5-smt"; + i2s2m0_sdi = "/pinctrl/i2s2/i2s2m0-sdi"; + qos_rga2_mwo = "/qos@fdf66e00"; + spi3m2_pins = "/pinctrl/spi3/spi3m2-pins"; + pwm8m1_pins = "/pinctrl/pwm8/pwm8m1-pins"; + dsi1_in = "/dsi@fde30000/ports/port@0"; + vp3_out_dsi0 = "/vop@fdd90000/ports/port@3/endpoint@0"; + pclk_vo0_grf = "/clocks/pclk_vo0_grf@fd7c08dc"; + spi0m1_pins = "/pinctrl/spi0/spi0m1-pins"; + pwm5m0_pins = "/pinctrl/pwm5/pwm5m0-pins"; + bt1120_pins = "/pinctrl/bt1120/bt1120-pins"; + dp1_in_vp0 = "/dp@fde60000/ports/port@0/endpoint@0"; + i2s1m0_sdo2 = "/pinctrl/i2s1/i2s1m0-sdo2"; + mipi2_csi2_input0 = "/mipi2-csi2/ports/port@0/endpoint@0"; + u2phy0_otg = "/syscon@fd5d0000/usb2-phy@0/otg-port"; + vp0_out_edp0 = "/vop@fdd90000/ports/port@0/endpoint@1"; + qos_fisheye0 = "/qos@fdf40000"; + i2c4 = "/i2c@feac0000"; + sata2m1_pins = "/pinctrl/sata2/sata2m1-pins"; + uart9m1_xfer = "/pinctrl/uart9/uart9m1-xfer"; + qos_jpeg_enc1 = "/qos@fdf66600"; + i2s1m1_sdi2 = "/pinctrl/i2s1/i2s1m1-sdi2"; + i2s3_2ch = "/i2s@fe4a0000"; + uart6m0_xfer = "/pinctrl/uart6/uart6m0-xfer"; + cpul_leakage = "/otp@fecc0000/cpul-leakage@19"; + pwm11m2_pins = "/pinctrl/pwm11/pwm11m2-pins"; + fspim1_cs1 = "/pinctrl/fspi/fspim1-cs1"; + vdd_vdenc_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; + pdm1m1_clk1 = "/pinctrl/pdm1/pdm1m1-clk1"; + hdmi_debug5 = "/pinctrl/hdmi/hdmi-debug5"; + uart1m1_rtsn = "/pinctrl/uart1/uart1m1-rtsn"; + qos_isp1_mro = "/qos@fdf41100"; + ddrphych3_pins = "/pinctrl/ddrphych3/ddrphych3-pins"; + spi0m3_cs1 = "/pinctrl/spi0/spi0m3-cs1"; + qos_rkvenc0_m1ro = "/qos@fdf60200"; + qos_jpeg_dec = "/qos@fdf66200"; + mclkin_i2s1 = "/clocks/mclkin-i2s1"; + edp1_in_vp2 = "/edp@fded0000/ports/port@0/endpoint@2"; + pcie30_avdd0v75 = "/pcie30-avdd0v75"; + isp0_mmu = "/iommu@fdcb7f00"; + qos_npu0_mwr = "/qos@fdf72000"; + rkvdec0 = "/rkvdec-core@fdc38000"; + rkvdec0_mmu = "/iommu@fdc38700"; + rk806_dvs1_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_null"; + pwm15 = "/pwm@febf0030"; + vop_mmu = "/iommu@fdd97e00"; + rkcif_mipi_lvds2_sditf_vir1 = "/rkcif-mipi-lvds2-sditf-vir1"; + pcie2x1l2 = "/pcie@fe190000"; + i2c6m1_xfer = "/pinctrl/i2c6/i2c6m1-xfer"; + package_serial_number_low = "/otp@fecc0000/package-serial-number-low@6"; + iep_mmu = "/iommu@fdbb0800"; + l2_cache_b3 = "/cpus/l2-cache-b3"; + i2c3m0_xfer = "/pinctrl/i2c3/i2c3m0-xfer"; + vcc_1v1_nldo_s3 = "/vcc-1v1-nldo-s3"; + spi1m2_cs1 = "/pinctrl/spi1/spi1m2-cs1"; + pdm0m1_idle = "/pinctrl/pdm0/pdm0m1-idle"; + can0 = "/can@fea50000"; + spi4m2_pins = "/pinctrl/spi4/spi4m2-pins"; + pcfg_pull_none_drv_level_4 = "/pinctrl/pcfg-pull-none-drv-level-4"; + pwm9m1_pins = "/pinctrl/pwm9/pwm9m1-pins"; + arm_pmu = "/arm-pmu"; + vp2 = "/vop@fdd90000/ports/port@2"; + rk806single = "/spi@feb20000/rk806single@0"; + spi1m1_pins = "/pinctrl/spi1/spi1m1-pins"; + pwm6m0_pins = "/pinctrl/pwm6/pwm6m0-pins"; + gmac0_mtl_tx_setup = "/ethernet@fe1b0000/tx-queues-config"; + rng = "/rng@fe378000"; + cpu_l2 = "/cpus/cpu@200"; + uart9 = "/serial@febc0000"; + spi0m1_cs0 = "/pinctrl/spi0/spi0m1-cs0"; + rk806_dvs3_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_gpio"; + rkcif_mipi_lvds5_sditf = "/rkcif-mipi-lvds5-sditf"; + usbdpphy0_grf = "/syscon@fd5c8000"; + mipim1_camera3_clk = "/pinctrl/mipi/mipim1-camera3-clk"; + pcie_clk3 = "/pcie-clk3"; + mipim0_camera1_clk = "/pinctrl/mipi/mipim0-camera1-clk"; + vp0_out_hdmi0 = "/vop@fdd90000/ports/port@0/endpoint@2"; + rkcif = "/rkcif@fdce0000"; + gmac0_rgmii_clk = "/pinctrl/gmac0/gmac0-rgmii-clk"; + wdt_en_base = "/pinctrl/wdt-pc9202/wdt-en-base"; + vp3_out_rgb = "/vop@fdd90000/ports/port@3/endpoint@2"; + spdif_rx0 = "/spdif-rx@fde08000"; + sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; + hdmim2_tx0_scl = "/pinctrl/hdmi/hdmim2-tx0-scl"; + hdmim2_tx0_sda = "/pinctrl/hdmi/hdmim2-tx0-sda"; + spi2m1_cs1 = "/pinctrl/spi2/spi2m1-cs1"; + pwm15m3_pins = "/pinctrl/pwm15/pwm15m3-pins"; + sata0m0_pins = "/pinctrl/sata0/sata0m0-pins"; + uart7m0_xfer = "/pinctrl/uart7/uart7m0-xfer"; + csi2_dphy2 = "/csi2-dphy2"; + spi3 = "/spi@feb30000"; + edp0_in_vp0 = "/edp@fdec0000/ports/port@0/endpoint@0"; + gpio1 = "/pinctrl/gpio@fec20000"; + tsadcm1_shut = "/pinctrl/tsadc/tsadcm1-shut"; + usbdp_phy0_dp_altmode_mux = "/phy@fed80000/port/endpoint@1"; + i2s2m0_idle = "/pinctrl/i2s2/i2s2m0-idle"; + spi1m0_cs0 = "/pinctrl/spi1/spi1m0-cs0"; + rkcif_mipi_lvds1_sditf_vir2 = "/rkcif-mipi-lvds1-sditf-vir2"; + i2s3_sclk = "/pinctrl/i2s3/i2s3-sclk"; + hdmim1_rx_hpdin = "/pinctrl/hdmi/hdmim1-rx-hpdin"; + spi3m0_cs1 = "/pinctrl/spi3/spi3m0-cs1"; + mipi_dcphy1 = "/mipi-dcphy-dummy"; + vcc5v0_sys = "/vcc5v0-sys"; + aclk_hdcp0_pre = "/clocks/aclk_hdcp0_pre@fd7c08dc"; + usb_con = "/i2c@fec80000/fusb302@22/connector"; + hdmirx_ctrler = "/hdmirx-controller@fdee0000"; + i2c7m1_xfer = "/pinctrl/i2c7/i2c7m1-xfer"; + pcfg_pull_up_drv_level_3 = "/pinctrl/pcfg-pull-up-drv-level-3"; + rgmii_phy1 = "/ethernet@fe1c0000/mdio/phy@1"; + i2c4m0_xfer = "/pinctrl/i2c4/i2c4m0-xfer"; + pcfg_pull_down_drv_level_7 = "/pinctrl/pcfg-pull-down-drv-level-7"; + spdif0m0_tx = "/pinctrl/spdif0/spdif0m0-tx"; + wdt = "/watchdog@feaf0000"; + vdd_0v85_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG4"; + cspmu = "/cspmu@fd10c000"; + gmac_uio0 = "/uio@fe1b0000"; + av1d_mmu = "/iommu@fdca0000"; + mailbox2 = "/mailbox@fece0000"; + mipi4_csi2_hw = "/mipi4-csi2-hw@fdd50000"; + pdm1m1_idle = "/pinctrl/pdm1/pdm1m1-idle"; + rga3_core0 = "/rga@fdb60000"; + i2s1m0_sdo0 = "/pinctrl/i2s1/i2s1m0-sdo0"; + bigcore1_thermal = "/thermal-zones/bigcore1-thermal"; + pcfg_output_low_pull_up = "/pinctrl/pcfg-output-low-pull-up"; + spi2m1_pins = "/pinctrl/spi2/spi2m1-pins"; + pwm7m0_pins = "/pinctrl/pwm7/pwm7m0-pins"; + i2c2 = "/i2c@feaa0000"; + npu_grf = "/syscon@fd5a2000"; + i2s1m1_sdi0 = "/pinctrl/i2s1/i2s1m1-sdi0"; + mipi5_csi2 = "/mipi5-csi2"; + pwm8 = "/pwm@febe0000"; + log_leakage = "/otp@fecc0000/log-leakage@1a"; + cpub23_opp_info = "/otp@fecc0000/cpub23-opp-info@49"; + vdd_vdenc_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; + rga2 = "/rga@fdb80000"; + emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; + qos_usb3_0 = "/qos@fdf3e200"; + sata1m0_pins = "/pinctrl/sata1/sata1m0-pins"; + uart8m0_xfer = "/pinctrl/uart8/uart8m0-xfer"; + pwm13m2_pins = "/pinctrl/pwm13/pwm13m2-pins"; + hdmi_debug3 = "/pinctrl/hdmi/hdmi-debug3"; + cam0_or_cam1_switch_pin = "/pinctrl/cam/cam0-or-cam1-switch-pin"; + mcum1_pins = "/pinctrl/mcu/mcum1-pins"; + pwm10m1_pins = "/pinctrl/pwm10/pwm10m1-pins"; + edp1_out = "/edp@fded0000/ports/port@1/endpoint"; + hclk_sdio_pre = "/clocks/hclk_sdio_pre@fd7c092c"; + usb_host0_ehci = "/usb@fc800000"; + edp1_in_vp0 = "/edp@fded0000/ports/port@0/endpoint@0"; + gmac1 = "/ethernet@fe1c0000"; + i2s10_8ch = "/i2s@fde00000"; + hdmi1_in = "/hdmi@fdea0000/ports/port@0"; + usb2phy1_grf = "/syscon@fd5d4000"; + pdm0m0_clk1 = "/pinctrl/pdm0/pdm0m0-clk1"; + jpege2_mmu = "/iommu@fdba8800"; + pwm13 = "/pwm@febf0010"; + pcie2x1l0 = "/pcie@fe170000"; + hdmi0_in_vp1 = "/hdmi@fde80000/ports/port@0/endpoint@1"; + hdmim0_tx1_cec = "/pinctrl/hdmi/hdmim0-tx1-cec"; + l2_cache_b1 = "/cpus/l2-cache-b1"; + cif_dvp_bus8 = "/pinctrl/cif/cif-dvp-bus8"; + qos_rga2_mro = "/qos@fdf66c00"; + aclk_rkvdec1_pre = "/clocks/aclk_rkvdec1_pre@fd7c08a4"; + i2c8m1_xfer = "/pinctrl/i2c8/i2c8m1-xfer"; + vdd_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG5"; + hdmirx_det = "/pinctrl/hdmirx/hdmirx-det"; + pca9555 = "/i2c@feab0000/gpio@21"; + qos_sdmmc = "/qos@fdf3d800"; + clk32k_out1 = "/pinctrl/clk32k/clk32k-out1"; + i2c5m0_xfer = "/pinctrl/i2c5/i2c5m0-xfer"; + cif_dvp_clk = "/pinctrl/cif/cif-dvp-clk"; + rknpu = "/npu@fdab0000"; + pcfg_pull_none_drv_level_2 = "/pinctrl/pcfg-pull-none-drv-level-2"; + spi3m2_cs0 = "/pinctrl/spi3/spi3m2-cs0"; + vp0 = "/vop@fdd90000/ports/port@0"; + rga3_1_mmu = "/iommu@fdb70f00"; + jtagm2_pins = "/pinctrl/jtag/jtagm2-pins"; + cpu_l0 = "/cpus/cpu@0"; + uart7 = "/serial@feba0000"; + rkisp1_vir2 = "/rkisp1-vir2"; + fec1_mmu = "/iommu@fdcd8f00"; + qos_vop_m0 = "/qos@fdf82000"; + pcie_clk1 = "/pcie-clk1"; + gmac1_ptp_ref_clk = "/pinctrl/gmac1/gmac1-ptp-ref-clk"; + spi3m1_pins = "/pinctrl/spi3/spi3m1-pins"; + pwm8m0_pins = "/pinctrl/pwm8/pwm8m0-pins"; + hdmi0_sound = "/hdmi0-sound"; + ioc = "/syscon@fd5f0000"; + spi0m0_pins = "/pinctrl/spi0/spi0m0-pins"; + avsd = "/avsd-plus@fdb51000"; + rkcif_mipi_lvds5_sditf_vir3 = "/rkcif-mipi-lvds5-sditf-vir3"; + u2phy2 = "/syscon@fd5d8000/usb2-phy@8000"; + sfc = "/spi@fe2b0000"; + csi2_dphy0 = "/csi2-dphy0"; + spi1 = "/spi@feb10000"; + spi4m1_cs0 = "/pinctrl/spi4/spi4m1-cs0"; + gpu_grf = "/syscon@fd5a0000"; + pcfg_pull_up_drv_level_14 = "/pinctrl/pcfg-pull-up-drv-level-14"; + wireless_bluetooth = "/wireless-bluetooth"; + pclk_av1_pre = "/clocks/pclk_av1_pre@fd7c0910"; + sata2m0_pins = "/pinctrl/sata2/sata2m0-pins"; + uart9m0_xfer = "/pinctrl/uart9/uart9m0-xfer"; + pwm14m2_pins = "/pinctrl/pwm14/pwm14m2-pins"; + i2s1m0_sdi2 = "/pinctrl/i2s1/i2s1m0-sdi2"; + pwm11m1_pins = "/pinctrl/pwm11/pwm11m1-pins"; + bt_sound = "/bt-sound"; + qos_rkvenc1_m0ro = "/qos@fdf61000"; + mclkout_i2s2 = "/clocks/mclkout-i2s2@fd58c318"; + dsi0 = "/dsi@fde20000"; + pdm1m0_clk1 = "/pinctrl/pdm1/pdm1m0-clk1"; + uart1m0_rtsn = "/pinctrl/uart1/uart1m0-rtsn"; + ddrphych2_pins = "/pinctrl/ddrphych2/ddrphych2-pins"; + route_edp0 = "/display-subsystem/route/route-edp0"; + hdmi0 = "/hdmi@fde80000"; + es8388_sound = "/es8388-sound"; + hdmi1_in_vp1 = "/hdmi@fdea0000/ports/port@0/endpoint@1"; + pcfg_pull_up_drv_level_1 = "/pinctrl/pcfg-pull-up-drv-level-1"; + pcfg_pull_down_drv_level_5 = "/pinctrl/pcfg-pull-down-drv-level-5"; + i2s0_sdo2 = "/pinctrl/i2s0/i2s0-sdo2"; + vop_out = "/vop@fdd90000/ports"; + vdd_0v75_s3 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG1"; + hdmim1_rx = "/pinctrl/hdmi/hdmim1-rx"; + pcfg_pull_down_smt = "/pinctrl/pcfg-pull-down-smt"; + hdmim0_tx1_scl = "/pinctrl/hdmi/hdmim0-tx1-scl"; + hdmim0_tx1_sda = "/pinctrl/hdmi/hdmim0-tx1-sda"; + cpul_opp_info = "/otp@fecc0000/cpul-opp-info@3d"; + clk32k_in = "/pinctrl/clk32k/clk32k-in"; + usbdp_phy1 = "/phy@fed90000"; + mailbox0 = "/mailbox@fec60000"; + i2c6m0_xfer = "/pinctrl/i2c6/i2c6m0-xfer"; + pdm0m1_sdi2 = "/pinctrl/pdm0/pdm0m1-sdi2"; + sdmmc = "/mmc@fe2c0000"; + hclk_nvm = "/clocks/hclk_nvm@fd7c087c"; + hdmim0_tx1_hpd = "/pinctrl/hdmi/hdmim0-tx1-hpd"; + vp0_out_dp0 = "/vop@fdd90000/ports/port@0/endpoint@0"; + vddq_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG9"; + vcc_3v3_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG8"; + gmac0_ppstring = "/pinctrl/gmac0/gmac0-ppstring"; + i2c0 = "/i2c@fd880000"; + pdm1m1_clk = "/pinctrl/pdm1/pdm1m1-clk"; + pdm0m0_idle = "/pinctrl/pdm0/pdm0m0-idle"; + soc_thermal = "/thermal-zones/soc-thermal"; + cluster1_opp_table = "/cluster1-opp-table"; + i2s0_idle = "/pinctrl/i2s0/i2s0-idle"; + spi4m1_pins = "/pinctrl/spi4/spi4m1-pins"; + npu_opp_info = "/otp@fecc0000/npu-opp-info@55"; + pwm9m0_pins = "/pinctrl/pwm9/pwm9m0-pins"; + pwm6 = "/pwm@febd0020"; + spi1m0_pins = "/pinctrl/spi1/spi1m0-pins"; + hym8563 = "/i2c@fd880000/hym8563@51"; + i2s1m1_sclk = "/pinctrl/i2s1/i2s1m1-sclk"; + rk806_dvs2_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_gpio"; + hp_det = "/pinctrl/headphone/hp-det"; + hdmi_debug1 = "/pinctrl/hdmi/hdmi-debug1"; + vp1_out_dp1 = "/vop@fdd90000/ports/port@1/endpoint@3"; + qos_mcu_npu = "/qos@fdf72400"; + auddsm_pins = "/pinctrl/auddsm/auddsm-pins"; + i2s3_lrck = "/pinctrl/i2s3/i2s3-lrck"; + pcfg_pull_none_drv_level_2_smt = "/pinctrl/pcfg-pull-none-drv-level-2-smt"; + pwm15m2_pins = "/pinctrl/pwm15/pwm15m2-pins"; + pipe_phy1_grf = "/syscon@fd5c0000"; + pwm12m1_pins = "/pinctrl/pwm12/pwm12m1-pins"; + pwm11 = "/pwm@febe0030"; + rkisp_unite = "/rkisp-unite@fdcb0000"; + rkcif_mipi_lvds2_sditf = "/rkcif-mipi-lvds2-sditf"; + vp1_out_edp0 = "/vop@fdd90000/ports/port@1/endpoint@1"; + hclk_isp1_pre = "/clocks/hclk_isp1_pre@fd7c0868"; + rk806_dvs2_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_slp"; + i2s7_8ch = "/i2s@fddf8000"; + uart5m1_rtsn = "/pinctrl/uart5/uart5m1-rtsn"; + mipidphy1_grf = "/syscon@fd5b5000"; + usbhost3_0 = "/usbhost3_0"; + jpege2 = "/jpege-core@fdba8000"; + pcfg_pull_none_drv_level_15 = "/pinctrl/pcfg-pull-none-drv-level-15"; + pcie3x2_intc = "/pcie@fe160000/legacy-interrupt-controller"; + vp2_out_dsi1 = "/vop@fdd90000/ports/port@2/endpoint@4"; + mipidphy0_in_ucam0 = "/csi2-dphy0/ports/port@0/endpoint@0"; + av1d = "/av1d@fdc70000"; + uart1m2_ctsn = "/pinctrl/uart1/uart1m2-ctsn"; + sdiom1_pins = "/pinctrl/sdio/sdiom1-pins"; + rockchip_suspend = "/rockchip-suspend"; + rk806_dvs2_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_pwrdn"; + pcfg_pull_none_drv_level_0 = "/pinctrl/pcfg-pull-none-drv-level-0"; + npu_thermal = "/thermal-zones/npu-thermal"; + i2c7m0_xfer = "/pinctrl/i2c7/i2c7m0-xfer"; + pdm1m1_sdi2 = "/pinctrl/pdm1/pdm1m1-sdi2"; + cpu_pins = "/pinctrl/cpu/cpu-pins"; + dsi0_in_vp2 = "/dsi@fde20000/ports/port@0/endpoint@0"; + bt_wake_gpio = "/pinctrl/wireless-bluetooth/bt-wake-gpio"; + uart5 = "/serial@feb80000"; + dwc3_0_role_switch = "/usbdrd3_0/usb@fc000000/port/endpoint@0"; + rkisp1_vir0 = "/rkisp1-vir0"; + fiq_debugger = "/fiq-debugger"; + usbdp_phy1_u3 = "/phy@fed90000/u3-port"; + spi0m0_cs1 = "/pinctrl/spi0/spi0m0-cs1"; + sdio = "/mmc@fe2d0000"; + rkcif_mipi_lvds_sditf_vir2 = "/rkcif-mipi-lvds-sditf-vir2"; + spdif1m2_tx = "/pinctrl/spdif1/spdif1m2-tx"; + qos_gpu_m3 = "/qos@fdf35600"; + pdm1m0_idle = "/pinctrl/pdm1/pdm1m0-idle"; + pcfg_pull_none_drv_level_6_smt = "/pinctrl/pcfg-pull-none-drv-level-6-smt"; + user_led = "/leds/user"; + rkcif_mipi_lvds5_sditf_vir1 = "/rkcif-mipi-lvds5-sditf-vir1"; + i2s2m1_sdi = "/pinctrl/i2s2/i2s2m1-sdi"; + uart8_xfer = "/pinctrl/uart8/uart8-xfer"; + u2phy0 = "/syscon@fd5d0000/usb2-phy@0"; + pclk_vo1_grf = "/clocks/pclk_vo1_grf@fd7c08ec"; + vdd_gpu_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; + spi2m0_pins = "/pinctrl/spi2/spi2m0-pins"; + qos_rga3_1 = "/qos@fdf36000"; + i2s2m1_sclk = "/pinctrl/i2s2/i2s2m1-sclk"; + pcfg_pull_up_drv_level_12 = "/pinctrl/pcfg-pull-up-drv-level-12"; + spdif_tx4 = "/spdif-tx@fdde8000"; + gmac1_mtl_rx_setup = "/ethernet@fe1c0000/rx-queues-config"; + rkispp1 = "/rkispp@fdcd8000"; + hdmim2_tx1_cec = "/pinctrl/hdmi/hdmim2-tx1-cec"; + u2phy1_otg = "/syscon@fd5d4000/usb2-phy@4000/otg-port"; + hdptxphy_hdmi_clk0 = "/hdmiphy@fed60000/clk-port"; + i2s1m0_sdi0 = "/pinctrl/i2s1/i2s1m0-sdi0"; + mipi4_csi2 = "/mipi4-csi2"; + mclkout_i2s0 = "/clocks/mclkout-i2s0@fd58c318"; + vcc5v0_host3 = "/vcc5v0-host3"; + rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; + vdd_cpu_big0_s0 = "/i2c@fd880000/rk8602@42"; + dp1 = "/dp@fde60000"; + emmc_data_strobe = "/pinctrl/emmc/emmc-data-strobe"; + pwm13m1_pins = "/pinctrl/pwm13/pwm13m1-pins"; + vop_pins = "/pinctrl/vop/vop-pins"; + pcie20x1m1_pins = "/pinctrl/pcie20x1/pcie20x1m1-pins"; + fspim2_cs1 = "/pinctrl/fspi/fspim2-cs1"; + vcc_hub = "/vcc-hub-regulator"; + mcum0_pins = "/pinctrl/mcu/mcum0-pins"; + pwm10m0_pins = "/pinctrl/pwm10/pwm10m0-pins"; + uart9m2_rtsn = "/pinctrl/uart9/uart9m2-rtsn"; + mipidcphy0 = "/phy@feda0000"; + uart6m1_rtsn = "/pinctrl/uart6/uart6m1-rtsn"; + vcc3v3_pcie30 = "/vcc3v3-pcie30"; + pcfg_pull_down_drv_level_3 = "/pinctrl/pcfg-pull-down-drv-level-3"; + mipim1_camera0_clk = "/pinctrl/mipi/mipim1-camera0-clk"; + i2s0_sdo0 = "/pinctrl/i2s0/i2s0-sdo0"; + vop = "/vop@fdd90000"; + gmac0_ptp_refclk = "/pinctrl/gmac0/gmac0-ptp-refclk"; + usbdp_phy0_orientation_switch = "/phy@fed80000/port/endpoint@0"; + vepu = "/vepu@fdb50000"; + cif_clk = "/pinctrl/cif/cif-clk"; + pcie30_phy_grf = "/syscon@fd5b8000"; + isp1_mmu = "/iommu@fdcc7f00"; + pdm0m1_sdi0 = "/pinctrl/pdm0/pdm0m1-sdi0"; + rkvdec1_mmu = "/iommu@fdc48700"; + edp1 = "/edp@fded0000"; + cam0_cam1_switch = "/cam0-cam1-switch"; + gmac1_ppstrig = "/pinctrl/gmac1/gmac1-ppstrig"; + i2c8m0_xfer = "/pinctrl/i2c8/i2c8m0-xfer"; + dsi1_in_vp2 = "/dsi@fde30000/ports/port@0/endpoint@0"; + hdmim2_rx_hpdin = "/pinctrl/hdmi/hdmim2-rx-hpdin"; + i2s1m1_sdo3 = "/pinctrl/i2s1/i2s1m1-sdo3"; + pcfg_pull_down_drv_level_14 = "/pinctrl/pcfg-pull-down-drv-level-14"; + gmac0_rx_bus2 = "/pinctrl/gmac0/gmac0-rx-bus2"; + rkcif_mipi_lvds4_sditf_vir2 = "/rkcif-mipi-lvds4-sditf-vir2"; + center_thermal = "/thermal-zones/center-thermal"; + uart0_ctsn = "/pinctrl/uart0/uart0-ctsn"; + uart4_rtsn = "/pinctrl/uart4/uart4-rtsn"; + pwm4 = "/pwm@febd0000"; + vdd2_ddr_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG6"; + jtagm1_pins = "/pinctrl/jtag/jtagm1-pins"; + rkisp0_vir2 = "/rkisp0-vir2"; + i2c1m4_xfer = "/pinctrl/i2c1/i2c1m4-xfer"; + l2_cache_l2 = "/cpus/l2-cache-l2"; + pcfg_pull_none_drv_level_9 = "/pinctrl/pcfg-pull-none-drv-level-9"; + qos_vdpu = "/qos@fdf67200"; + vp2_out_hdmi1 = "/vop@fdd90000/ports/port@2/endpoint@7"; + spi3m0_pins = "/pinctrl/spi3/spi3m0-pins"; + pcfg_output_low_pull_none = "/pinctrl/pcfg-output-low-pull-none"; + spi0m2_cs0 = "/pinctrl/spi0/spi0m2-cs0"; + rkisp1 = "/rkisp@fdcc0000"; + usbdpphy1_grf = "/syscon@fd5cc000"; + mipim1_camera4_clk = "/pinctrl/mipi/mipim1-camera4-clk"; + mipim0_camera2_clk = "/pinctrl/mipi/mipim0-camera2-clk"; + csi2_dcphy1 = "/csi2-dcphy1"; + hdmim2_tx1_scl = "/pinctrl/hdmi/hdmim2-tx1-scl"; + hdmim2_tx1_sda = "/pinctrl/hdmi/hdmim2-tx1-sda"; + spi2m2_cs1 = "/pinctrl/spi2/spi2m2-cs1"; + chosen = "/chosen"; + soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; + rk806_dvs1_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_rst"; + mpp_srv = "/mpp-srv"; + hclk_rkvenc1_pre = "/clocks/hclk_rkvenc1_pre@fd7c08c0"; + dp0m2_pins = "/pinctrl/dp0/dp0m2-pins"; + debug = "/debug@fd104000"; + jpege0 = "/jpege-core@fdba0000"; + pcfg_pull_none_drv_level_13 = "/pinctrl/pcfg-pull-none-drv-level-13"; + pwm14m1_pins = "/pinctrl/pwm14/pwm14m1-pins"; + pwm11m0_pins = "/pinctrl/pwm11/pwm11m0-pins"; + vp2_out_dp0 = "/vop@fdd90000/ports/port@2/endpoint@0"; + qos_rkvenc0_m0ro = "/qos@fdf60000"; + its0 = "/interrupt-controller@fe600000/msi-controller@fe640000"; + cpu_b2 = "/cpus/cpu@600"; + uart7m1_rtsn = "/pinctrl/uart7/uart7m1-rtsn"; + usb_5v_ctrl = "/pinctrl/usb-typec/usb-5v-ctrl"; + tsadc_gpio_func = "/pinctrl/gpio-func/tsadc-gpio-func"; + spi1m1_cs0 = "/pinctrl/spi1/spi1m1-cs0"; + pcfg_pull_down = "/pinctrl/pcfg-pull-down"; + dmc_opp_info = "/otp@fecc0000/dmc-opp-info@5b"; + ddrphych1_pins = "/pinctrl/ddrphych1/ddrphych1-pins"; + dsi0_in = "/dsi@fde20000/ports/port@0"; + pdm1m1_sdi0 = "/pinctrl/pdm1/pdm1m1-sdi0"; + spi3m1_cs1 = "/pinctrl/spi3/spi3m1-cs1"; + bigcore0_grf = "/syscon@fd590000"; + cpub1_leakage = "/otp@fecc0000/cpub1-leakage@18"; + uart3 = "/serial@feb60000"; + aclk_hdcp1_pre = "/clocks/aclk_hdcp1_pre@fd7c08ec"; + pcfg_pull_up = "/pinctrl/pcfg-pull-up"; + rkcif_mipi_lvds3_sditf_vir3 = "/rkcif-mipi-lvds3-sditf-vir3"; + codec_leakage = "/otp@fecc0000/codec-leakage@29"; + pcfg_pull_up_drv_level_8 = "/pinctrl/pcfg-pull-up-drv-level-8"; + dmac1 = "/dma-controller@fea30000"; + pdm0m0_sdi2 = "/pinctrl/pdm0/pdm0m0-sdi2"; + i2s1m1_lrck = "/pinctrl/i2s1/i2s1m1-lrck"; + qos_gpu_m1 = "/qos@fdf35200"; + i2s0_sdi2 = "/pinctrl/i2s0/i2s0-sdi2"; + spi2m0_cs0 = "/pinctrl/spi2/spi2m0-cs0"; + gpu_opp_info = "/otp@fecc0000/gpu-opp-info@4f"; + csi2_dphy1_hw = "/csi2-dphy1-hw@fedc8000"; + pcfg_pull_up_drv_level_10 = "/pinctrl/pcfg-pull-up-drv-level-10"; + spdif_tx2 = "/spdif-tx@fddb0000"; + npu_opp_table = "/npu-opp-table"; + spi4m0_cs1 = "/pinctrl/spi4/spi4m0-cs1"; + vo0_grf = "/syscon@fd5a6000"; + i2c2m4_xfer = "/pinctrl/i2c2/i2c2m4-xfer"; + qos_usb2host_0 = "/qos@fdf3e400"; + spi4m0_pins = "/pinctrl/spi4/spi4m0-pins"; + gmac1_mtl_tx_setup = "/ethernet@fe1c0000/tx-queues-config"; + rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; + i2s1m0_sclk = "/pinctrl/i2s1/i2s1m0-sclk"; + i2c7 = "/i2c@fec90000"; + mipi2_csi2_output = "/mipi2-csi2/ports/port@1/endpoint@0"; + mipi_te0 = "/pinctrl/mipi/mipi-te0"; + sata_reset = "/pinctrl/sata/sata-reset"; + dp1m2_pins = "/pinctrl/dp1/dp1m2-pins"; + pwm15m1_pins = "/pinctrl/pwm15/pwm15m1-pins"; + pcfg_pull_down_drv_level_1 = "/pinctrl/pcfg-pull-down-drv-level-1"; + pwm12m0_pins = "/pinctrl/pwm12/pwm12m0-pins"; + qos_vicap_m1 = "/qos@fdf40800"; + sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; + uart8m1_rtsn = "/pinctrl/uart8/uart8m1-rtsn"; + usb2phy2_grf = "/syscon@fd5d8000"; + rkvdec1_sram = "/sram@ff001000/rkvdec-sram@78000"; + uart5m0_rtsn = "/pinctrl/uart5/uart5m0-rtsn"; + jpege3_mmu = "/iommu@fdbac800"; + vcc_2v0_pldo_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG7"; + i2s3_mclk = "/pinctrl/i2s3/i2s3-mclk"; + mclkout_i2s1m1 = "/clocks/mclkout-i2s1@fd58a000"; + spdif_tx1_dc = "/spdif-tx1-dc"; + uart0m2_xfer = "/pinctrl/uart0/uart0m2-xfer"; + wifi_host_wake_irq = "/pinctrl/wireless-wlan/wifi-host-wake-irq"; + i2s1m1_sdo1 = "/pinctrl/i2s1/i2s1m1-sdo1"; + uart1m1_ctsn = "/pinctrl/uart1/uart1m1-ctsn"; + pcfg_pull_down_drv_level_12 = "/pinctrl/pcfg-pull-down-drv-level-12"; + sdiom0_pins = "/pinctrl/sdio/sdiom0-pins"; + pcfg_pull_up_smt = "/pinctrl/pcfg-pull-up-smt"; + php_grf = "/syscon@fd5b0000"; + pwm2 = "/pwm@fd8b0020"; + pdm1m0_sdi2 = "/pinctrl/pdm1/pdm1m0-sdi2"; + i2s2m1_lrck = "/pinctrl/i2s2/i2s2m1-lrck"; + gmac0_stmmac_axi_setup = "/ethernet@fe1b0000/stmmac-axi-config"; + mipi1_csi2_hw = "/mipi1-csi2-hw@fdd20000"; + sata1 = "/sata@fe220000"; + rkispp1_vir0 = "/rkispp1-vir0"; + dp0_in_vp1 = "/dp@fde50000/ports/port@0/endpoint@1"; + CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; + rkisp0_vir0 = "/rkisp0-vir0"; + spi3m3_cs0 = "/pinctrl/spi3/spi3m3-cs0"; + specification_serial_number = "/otp@fecc0000/specification-serial-number@6"; + l2_cache_l0 = "/cpus/l2-cache-l0"; + pcfg_pull_none_drv_level_7 = "/pinctrl/pcfg-pull-none-drv-level-7"; + qos_hdcp0 = "/qos@fdf80000"; + qos_npu0_mro = "/qos@fdf72200"; + usbdrd_dwc3_1 = "/usbdrd3_1/usb@fc400000"; + rkvenc1 = "/rkvenc-core@fdbe0000"; + display_subsystem = "/display-subsystem"; + i2c3m4_xfer = "/pinctrl/i2c3/i2c3m4-xfer"; + pcie30x2m3_pins = "/pinctrl/pcie30x2/pcie30x2m3-pins"; + qos_npu2 = "/qos@fdf71000"; + i2s0_8ch = "/i2s@fe470000"; + i2s2m0_sclk = "/pinctrl/i2s2/i2s2m0-sclk"; + pmu = "/power-management@fd8d8000"; + gmac1_tx_bus2 = "/pinctrl/gmac1/gmac1-tx-bus2"; + pcfg_pull_none_drv_level_11 = "/pinctrl/pcfg-pull-none-drv-level-11"; + route_hdmi1 = "/display-subsystem/route/route-hdmi1"; + csi2_dphy5 = "/csi2-dphy5"; + spi4m2_cs0 = "/pinctrl/spi4/spi4m2-cs0"; + mipi3_csi2 = "/mipi3-csi2"; + pmu0_grf = "/syscon@fd588000"; + fan = "/pwm-fan"; + cpu_b0 = "/cpus/cpu@400"; + vccio_sd_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG5"; + qos_rkvenc1_m2wo = "/qos@fdf61400"; + gpio4 = "/pinctrl/gpio@fec50000"; + hdmim0_rx_cec = "/pinctrl/hdmi/hdmim0-rx-cec"; + pwm3m3_pins = "/pinctrl/pwm3/pwm3m3-pins"; + aclk_vdpu_low_pre = "/clocks/aclk_vdpu_low_pre@fd7c08b0"; + mmu600_php = "/iommu@fcb00000"; + cif_mipi2_in1 = "/rkcif-mipi-lvds2/port/endpoint"; + pwm0m2_pins = "/pinctrl/pwm0/pwm0m2-pins"; + pwm13m0_pins = "/pinctrl/pwm13/pwm13m0-pins"; + pcie20x1m0_pins = "/pinctrl/pcie20x1/pcie20x1m0-pins"; + bt656_pins = "/pinctrl/bt656/bt656-pins"; + hdmi1_sound = "/hdmi1-sound"; + uart9m1_rtsn = "/pinctrl/uart9/uart9m1-rtsn"; + uart6m0_rtsn = "/pinctrl/uart6/uart6m0-rtsn"; + pcie2x1l2_intc = "/pcie@fe190000/legacy-interrupt-controller"; + mod_sleep = "/mod-sleep-regulator"; + gpu_thermal = "/thermal-zones/gpu-thermal"; + hdmim1_tx0_cec = "/pinctrl/hdmi/hdmim1-tx0-cec"; + uart1 = "/serial@feb40000"; + rkcif_mipi_lvds3_sditf_vir1 = "/rkcif-mipi-lvds3-sditf-vir1"; + pcfg_pull_up_drv_level_6 = "/pinctrl/pcfg-pull-up-drv-level-6"; + qos_rkvdec0 = "/qos@fdf62000"; + vp2_out_edp0 = "/vop@fdd90000/ports/port@2/endpoint@1"; + uart1m2_xfer = "/pinctrl/uart1/uart1m2-xfer"; + pdm0m0_sdi0 = "/pinctrl/pdm0/pdm0m0-sdi0"; + fspim2_pins = "/pinctrl/fspi/fspim2-pins"; + i2s0_sdi0 = "/pinctrl/i2s0/i2s0-sdi0"; + gpu_pins = "/pinctrl/gpu/gpu-pins"; + imx415 = "/i2c@fec80000/imx415@37"; + vp3_out_dsi1 = "/vop@fdd90000/ports/port@3/endpoint@1"; + i2s4_8ch = "/i2s@fddc0000"; + ramoops = "/reserved-memory/ramoops@110000"; + dp0_sound = "/dp0-sound"; + spdif_tx0 = "/spdif-tx@fe4e0000"; + dp1_in_vp1 = "/dp@fde60000/ports/port@0/endpoint@1"; + i2s1m0_sdo3 = "/pinctrl/i2s1/i2s1m0-sdo3"; + mipi2_csi2_input1 = "/mipi2-csi2/ports/port@0/endpoint@0"; + vcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG2"; + vp1_out_hdmi0 = "/vop@fdd90000/ports/port@1/endpoint@2"; + vcc12v_dcin = "/vcc12v-dcin"; + vp0_out_edp1 = "/vop@fdd90000/ports/port@0/endpoint@4"; + uart3_rtsn = "/pinctrl/uart3/uart3-rtsn"; + gmac1_rgmii_clk = "/pinctrl/gmac1/gmac1-rgmii-clk"; + package_serial_number_high = "/otp@fecc0000/package-serial-number-high@5"; + hdcp0 = "/hdcp@fde40000"; + qos_fisheye1 = "/qos@fdf40200"; + rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; + i2c5 = "/i2c@fead0000"; + jtagm0_pins = "/pinctrl/jtag/jtagm0-pins"; + i2c4m4_xfer = "/pinctrl/i2c4/i2c4m4-xfer"; + spdif_tx1_sound = "/spdif-tx1-sound"; + qos_jpeg_enc2 = "/qos@fdf66800"; + hdmi0_in = "/hdmi@fde80000/ports/port@0"; + i2s1m1_sdi3 = "/pinctrl/i2s1/i2s1m1-sdi3"; + i2c1m3_xfer = "/pinctrl/i2c1/i2c1m3-xfer"; + hdptxphy_hdmi0 = "/hdmiphy@fed60000"; + sdmmc_pwren = "/pinctrl/sdmmc/sdmmc-pwren"; + usbdp_phy1_dp = "/phy@fed90000/dp-port"; + npu_leakage = "/otp@fecc0000/npu-leakage@28"; + aclk_jpeg_decoder_pre = "/clocks/aclk_jpeg_decoder_pre@fd7c08b0"; + pdm0 = "/pdm@fe4b0000"; + gmac1_miim = "/pinctrl/gmac1/gmac1-miim"; + pcfg_output_high_pull_down = "/pinctrl/pcfg-output-high-pull-down"; + hdmi_debug6 = "/pinctrl/hdmi/hdmi-debug6"; + pcie3x4 = "/pcie@fe150000"; + can0m1_pins = "/pinctrl/can0/can0m1-pins"; + mclkin_i2s2 = "/clocks/mclkin-i2s2"; + jpege_ccu = "/jpege-ccu"; + pcfg_pull_none_drv_level_3_smt = "/pinctrl/pcfg-pull-none-drv-level-3-smt"; + hdmim1_rx_cec = "/pinctrl/hdmi/hdmim1-rx-cec"; + pipe_phy2_grf = "/syscon@fd5c4000"; + dp0m1_pins = "/pinctrl/dp0/dp0m1-pins"; + rkvdec1 = "/rkvdec-core@fdc48000"; + pwm1m2_pins = "/pinctrl/pwm1/pwm1m2-pins"; + pwm14m0_pins = "/pinctrl/pwm14/pwm14m0-pins"; + little_core_thermal = "/thermal-zones/littlecore-thermal"; + rk806_dvs3_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_slp"; + usb_5v = "/usb-5v"; + i2s8_8ch = "/i2s@fddc8000"; + drm_cubic_lut = "/reserved-memory/drm-cubic-lut@00000000"; + rkcif_mipi_lvds2_sditf_vir2 = "/rkcif-mipi-lvds2-sditf-vir2"; + hdptxphy0 = "/phy@fed60000"; + pcie30x1_0_button_rstn = "/pinctrl/pcie30x1/pcie30x1-0-button-rstn"; + u2phy3_host = "/syscon@fd5dc000/usb2-phy@c000/host-port"; + route_dp0 = "/display-subsystem/route/route-dp0"; + hdmim0_rx_scl = "/pinctrl/hdmi/hdmim0-rx-scl"; + hdmim0_rx_sda = "/pinctrl/hdmi/hdmim0-rx-sda"; + uart7m0_rtsn = "/pinctrl/uart7/uart7m0-rtsn"; + pcfg_pull_down_drv_level_10 = "/pinctrl/pcfg-pull-down-drv-level-10"; + usbdrd3_0 = "/usbdrd3_0"; + ddrphych0_pins = "/pinctrl/ddrphych0/ddrphych0-pins"; + bt_irq_gpio = "/pinctrl/wireless-bluetooth/bt-irq-gpio"; + pwm0 = "/pwm@fd8b0000"; + uart2m2_xfer = "/pinctrl/uart2/uart2m2-xfer"; + pdm1m0_sdi0 = "/pinctrl/pdm1/pdm1m0-sdi0"; + hdmim1_tx0_scl = "/pinctrl/hdmi/hdmim1-tx0-scl"; + hdmim1_tx0_sda = "/pinctrl/hdmi/hdmim1-tx0-sda"; + can1 = "/can@fea60000"; + rkvtunnel = "/rkvtunnel"; + pcfg_pull_none_drv_level_5 = "/pinctrl/pcfg-pull-none-drv-level-5"; + rkcif_mipi_lvds3_sditf = "/rkcif-mipi-lvds3-sditf"; + combphy2_psu = "/phy@fee20000"; + vp3 = "/vop@fdd90000/ports/port@3"; + rk806_dvs2_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_dvs"; + mmu600_pcie = "/iommu@fc900000"; + hdmim1_tx0_hpd = "/pinctrl/hdmi/hdmim1-tx0-hpd"; + i2s1m0_lrck = "/pinctrl/i2s1/i2s1m0-lrck"; + cpu_l3 = "/cpus/cpu@300"; + spi0m1_cs1 = "/pinctrl/spi0/spi0m1-cs1"; + vp0_out_hdmi1 = "/vop@fdd90000/ports/port@0/endpoint@5"; + spdif_rx1 = "/spdif-rx@fde10000"; + gmac0_clkinout = "/pinctrl/gmac0/gmac0-clkinout"; + rkcif_dvp = "/rkcif-dvp"; + i2c5m4_xfer = "/pinctrl/i2c5/i2c5m4-xfer"; + wireless_wlan = "/wireless-wlan"; + rkcif_mipi_lvds = "/rkcif-mipi-lvds"; + avdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG3"; + i2c2m3_xfer = "/pinctrl/i2c2/i2c2m3-xfer"; + pcie30x4m3_pins = "/pinctrl/pcie30x4/pcie30x4m3-pins"; + hclk_rkvdec0_pre = "/clocks/hclk_rkvdec0_pre@fd7c08a0"; + route_dsi0 = "/display-subsystem/route/route-dsi0"; + rk806_dvs3_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_pwrdn"; + csi2_dphy3 = "/csi2-dphy3"; + pcie30x1m2_pins = "/pinctrl/pcie30x1/pcie30x1m2-pins"; + spi4 = "/spi@fecb0000"; + litcore_grf = "/syscon@fd594000"; + isp0_vir2 = "/rkisp0-vir2/port/endpoint@0"; + i2s1m1_mclk = "/pinctrl/i2s1/i2s1m1-mclk"; + sys_grf = "/syscon@fd58c000"; + edp0_in_vp1 = "/edp@fdec0000/ports/port@0/endpoint@1"; + mdio0 = "/ethernet@fe1b0000/mdio"; + rkisp_unite_mmu = "/rkisp-unite-mmu@fdcb7f00"; + gpio2 = "/pinctrl/gpio@fec30000"; + spi1m0_cs1 = "/pinctrl/spi1/spi1m0-cs1"; + aclk_av1_pre = "/clocks/aclk_av1_pre@fd7c0910"; + can1m1_pins = "/pinctrl/can1/can1m1-pins"; + rkcif_mipi_lvds1_sditf_vir3 = "/rkcif-mipi-lvds1-sditf-vir3"; + hdmim2_rx_cec = "/pinctrl/hdmi/hdmim2-rx-cec"; + mipi3_csi2_hw = "/mipi3-csi2-hw@fdd40000"; + dp1m1_pins = "/pinctrl/dp1/dp1m1-pins"; + pwm2m2_pins = "/pinctrl/pwm2/pwm2m2-pins"; + pwm15m0_pins = "/pinctrl/pwm15/pwm15m0-pins"; + hclk_vo0 = "/clocks/hclk_vo0@fd7c08dc"; + bigcore0_thermal = "/thermal-zones/bigcore0-thermal"; + hdmim1_rx_scl = "/pinctrl/hdmi/hdmim1-rx-scl"; + hdmim1_rx_sda = "/pinctrl/hdmi/hdmim1-rx-sda"; + uart8m0_rtsn = "/pinctrl/uart8/uart8m0-rtsn"; + pcfg_pull_up_drv_level_4 = "/pinctrl/pcfg-pull-up-drv-level-4"; + mipim1_camera1_clk = "/pinctrl/mipi/mipim1-camera1-clk"; + rkvdec0_sram = "/sram@ff001000/rkvdec-sram@0"; + pcfg_pull_down_drv_level_8 = "/pinctrl/pcfg-pull-down-drv-level-8"; + gmac_uio1 = "/uio@fe1c0000"; + usbc0_orien_sw = "/i2c@fec80000/fusb302@22/connector/ports/port@0/endpoint"; + jpegd = "/jpegd@fdb90000"; + uart3m2_xfer = "/pinctrl/uart3/uart3m2-xfer"; + minidump_smem = "/reserved-memory/minidump-smem@1f0000"; + i2s0_sclk = "/pinctrl/i2s0/i2s0-sclk"; + uart0m1_xfer = "/pinctrl/uart0/uart0m1-xfer"; + rga3_core1 = "/rga@fdb70000"; + i2s1m0_sdo1 = "/pinctrl/i2s1/i2s1m0-sdo1"; + uart1m0_ctsn = "/pinctrl/uart1/uart1m0-ctsn"; + vcc5v0_usb = "/vcc5v0-usb"; + minidump = "/minidump"; + }; + + rkvdec-ccu@fdc30000 { + power-domains = <0x60 0x0e>; + rockchip,ccu-mode = <0x01>; + clock-names = "aclk_ccu"; + reg-names = "ccu"; + assigned-clocks = <0x02 0x18e>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x282>; + clocks = <0x02 0x18e>; + compatible = "rockchip,rkv-decoder-v2-ccu"; + status = "okay"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdc30000 0x00 0x100>; + phandle = <0xca>; + reset-names = "video_ccu"; + }; + + qos@fdf60000 { + compatible = "syscon"; + reg = <0x00 0xfdf60000 0x00 0x20>; + phandle = <0x8d>; + }; + + iommu@fdb50800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x76 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_vdpu_mmu"; + reg = <0x00 0xfdb50800 0x00 0x40>; + phandle = <0xb7>; + }; + + rga@fdb60000 { + power-domains = <0x60 0x16>; + iommus = <0xb9>; + clock-names = "aclk_rga3_0\0hclk_rga3_0\0clk_rga3_0"; + interrupts = <0x00 0x72 0x04>; + clocks = <0x02 0x1ba 0x02 0x1b9 0x02 0x1bb>; + compatible = "rockchip,rga3_core0"; + status = "okay"; + interrupt-names = "rga3_core0_irq"; + reg = <0x00 0xfdb60000 0x00 0x1000>; + phandle = <0x269>; + }; + + qos@fdf67200 { + compatible = "syscon"; + reg = <0x00 0xfdf67200 0x00 0x20>; + phandle = <0x28b>; + }; + + vepu@fdb50000 { + power-domains = <0x60 0x15>; + iommus = <0xb7>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1c0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + interrupts = <0x00 0x78 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-encoder-v2"; + rockchip,resetgroup-node = <0x00>; + status = "disabled"; + interrupt-names = "irq_vepu"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb50000 0x00 0x400>; + phandle = <0x266>; + reset-names = "shared_video_a\0shared_video_h"; + }; + + mipi3-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x227>; + }; + + hdmi0-sound { + rockchip,jack-det; + rockchip,cpu = <0x1d3>; + rockchip,codec = <0x1d4>; + rockchip,card-name = "rockchip-hdmi0"; + compatible = "rockchip,hdmi"; + status = "okay"; + phandle = <0x49b>; + rockchip,mclk-fs = <0x80>; + }; + + reserved-memory { + #address-cells = <0x02>; + #size-cells = <0x02>; + ranges; + + minidump-smem@1f0000 { + status = "disabled"; + reg = <0x00 0x1f0000 0x00 0x100>; + phandle = <0x1cf>; + no-map; + }; + + minidump-mem@c000000 { + status = "disabled"; + reg = <0x00 0xc000000 0x00 0x2000000>; + phandle = <0x1d0>; + no-map; + }; + + cma { + linux,cma-default; + compatible = "shared-dma-pool"; + size = <0x00 0x800000>; + reg = <0x00 0x10000000 0x00 0x10000000>; + reusable; + }; + + drm-logo@00000000 { + compatible = "rockchip,drm-logo"; + reg = <0x00 0xedf00000 0x00 0x2e0000>; + phandle = <0x37>; + }; + + ramoops@110000 { + boot-log-count = <0x01>; + record-size = <0x14000>; + pmsg-size = <0x30000>; + compatible = "ramoops"; + console-size = <0x80000>; + reg = <0x00 0x110000 0x00 0xe0000>; + phandle = <0x493>; + boot-log-size = <0x8000>; + ftrace-size = <0x00>; + }; + + drm-cubic-lut@00000000 { + compatible = "rockchip,drm-cubic-lut"; + reg = <0x00 0x00 0x00 0x00>; + phandle = <0x492>; + }; + }; + + pcie@fe160000 { + power-domains = <0x60 0x22>; + vpcie3v3-supply = <0x1ba>; + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x10 0x1f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x10>; + resets = <0x02 0x20e 0x02 0x21d>; + interrupts = <0x00 0x102 0x04 0x00 0x101 0x04 0x00 0x100 0x04 0x00 0xff 0x04 0x00 0xfe 0x04>; + clocks = <0x02 0x14f 0x02 0x154 0x02 0x14a 0x02 0x159 0x02 0x15f 0x02 0x184>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1b9 0x00 0x00 0x00 0x00 0x02 0x1b9 0x01 0x00 0x00 0x00 0x03 0x1b9 0x02 0x00 0x00 0x00 0x04 0x1b9 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x03>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + reset-gpios = <0x10d 0x08 0x00>; + num-lanes = <0x02>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf1000000 0x00 0xf1000000 0x00 0x100000 0x81000000 0x00 0xf1100000 0x00 0xf1100000 0x00 0x100000 0x82000000 0x00 0xf1200000 0x00 0xf1200000 0x00 0xe00000 0xc3000000 0x09 0x40000000 0x09 0x40000000 0x00 0x40000000>; + msi-map = <0x1000 0x1b6 0x1000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x1b7>; + num-viewport = <0x08>; + reg = <0x00 0xfe160000 0x00 0x10000 0x0a 0x40400000 0x00 0x400000>; + linux,pci-domain = <0x01>; + phandle = <0x486>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x10>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xff 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x1b9>; + interrupt-controller; + }; + }; + + spdif-tx@fddb8000 { + power-domains = <0x60 0x19>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x20b>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc6 0x04>; + clocks = <0x02 0x20f 0x02 0x20a>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfddb8000 0x00 0x1000>; + phandle = <0x1e2>; + dmas = <0xf1 0x16>; + }; + + pvtm@fdb30000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-gpu-pvtm"; + reg = <0x00 0xfdb30000 0x00 0x100>; + + pvtm@4 { + clock-names = "clk"; + resets = <0x02 0x430 0x02 0x42f>; + clocks = <0x02 0x118>; + reg = <0x04>; + reset-names = "rts\0rst-p"; + }; + }; + + spdif-tx1-dc { + #sound-dai-cells = <0x00>; + compatible = "linux,spdif-dit"; + status = "disabled"; + phandle = <0x1d8>; + }; + + csi2-dphy0 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "okay"; + phys = <0x2f 0x30>; + firefly-compatible; + phandle = <0x20f>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x32>; + reg = <0x01>; + phandle = <0x184>; + }; + + endpoint@0 { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x31>; + reg = <0x00>; + phandle = <0x183>; + }; + }; + + port@1 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + + endpoint@0 { + remote-endpoint = <0x33>; + reg = <0x00>; + phandle = <0x4d>; + }; + }; + }; + }; + + rkisp-unite@fdcb0000 { + power-domains = <0x60 0x1c>; + iommus = <0xcf>; + clock-names = "aclk_isp0\0hclk_isp0\0clk_isp_core0\0clk_isp_core_marvin0\0clk_isp_core_vicap0\0aclk_isp1\0hclk_isp1\0clk_isp_core1\0clk_isp_core_marvin1\0clk_isp_core_vicap1"; + interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd 0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; + compatible = "rockchip,rk3588-rkisp-unite"; + status = "disabled"; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + reg = <0x00 0xfdcb0000 0x00 0x10000 0x00 0xfdcc0000 0x00 0x10000>; + phandle = <0x277>; + }; + + sata@fe230000 { + phy-names = "sata-phy"; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x113 0x04>; + clocks = <0x02 0x173 0x02 0x170 0x02 0x176 0x02 0x165 0x02 0x180>; + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + status = "disabled"; + interrupt-names = "hostc"; + phys = <0x70 0x01>; + reg = <0x00 0xfe230000 0x00 0x1000>; + phandle = <0x291>; + ports-implemented = <0x01>; + }; + + syscon@fd5a0000 { + compatible = "rockchip,rk3588-gpu-grf\0syscon"; + reg = <0x00 0xfd5a0000 0x00 0x100>; + phandle = <0x65>; + }; + + bt-sound { + simple-audio-card,name = "rockchip,bt"; + simple-audio-card,format = "dsp_a"; + simple-audio-card,bitclock-inversion = <0x00>; + compatible = "simple-audio-card"; + status = "disabled"; + phandle = <0x49a>; + simple-audio-card,mclk-fs = <0x100>; + + simple-audio-card,cpu { + sound-dai = <0x1d1>; + }; + + simple-audio-card,codec { + sound-dai = <0x1d2 0x01>; + }; + }; + + iommu@fdb90480 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x82 0x04>; + clocks = <0x02 0x1b4 0x02 0x1b5>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpegd_mmu"; + reg = <0x00 0xfdb90480 0x00 0x40>; + phandle = <0xbb>; + }; + + hdcp@fde70000 { + power-domains = <0x60 0x1a>; + clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; + resets = <0x02 0x3c8 0x02 0x3c6 0x02 0x3c5 0x02 0x3c4 0x02 0x3ca>; + interrupts = <0x00 0xa0 0x04>; + clocks = <0x02 0x217 0x02 0x219 0x02 0x218 0x02 0x216 0x02 0x228 0x02 0x229>; + compatible = "rockchip,rk3588-hdcp"; + status = "disabled"; + reg = <0x00 0xfde70000 0x00 0x80>; + phandle = <0x287>; + reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; + rockchip,vo-grf = <0xd8>; + }; + + spdif-tx@fe4f0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x143>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x45>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc2 0x04>; + clocks = <0x02 0x47 0x02 0x44>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfe4f0000 0x00 0x1000>; + phandle = <0x1d7>; + dmas = <0xf1 0x05>; + }; + + rkcif-mipi-lvds-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22d>; + }; + + es8388-sound { + pinctrl-names = "default"; + rockchip,cpu = <0x1da>; + pinctrl-0 = <0x1dc>; + rockchip,codec = <0x1db>; + hp-det-gpio = <0x79 0x13 0x00>; + rockchip,card-name = "rockchip-es8388"; + rockchip,format = "i2s"; + rockchip,audio-routing = "Headphone\0LOUT1\0Headphone\0ROUT1\0Speaker\0LOUT2\0Speaker\0ROUT2\0Headphone\0Headphone Power\0Headphone\0Headphone Power\0LINPUT2\0Main Mic\0RINPUT2\0Main Mic\0LINPUT1\0Headset Mic\0RINPUT1\0Headset Mic"; + compatible = "firefly,multicodecs-card"; + linein-type = <0x01>; + status = "okay"; + phandle = <0x49f>; + hp-con-gpio = <0x182 0x0b 0x00>; + firefly,not-use-dapm; + rockchip,mclk-fs = <0x180>; + }; + + spi@feb30000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x15d 0x15e 0x15f>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x149 0x04>; + clocks = <0x02 0xa6 0x02 0xa1>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfeb30000 0x00 0x1000>; + phandle = <0x2c8>; + dmas = <0xf1 0x11 0xf1 0x12>; + }; + + phy@fee80000 { + rockchip,pipe-grf = <0x76>; + clock-names = "pclk"; + rockchip,pcie30-phymode = <0x01>; + resets = <0x02 0x2000a>; + clocks = <0x02 0x188>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-pcie3-phy"; + status = "okay"; + reg = <0x00 0xfee80000 0x00 0x20000>; + phandle = <0x1b7>; + reset-names = "phy"; + rockchip,phy-grf = <0x1cc>; + }; + + vcc12v-dcin { + regulator-max-microvolt = <0xb71b00>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b00>; + regulator-name = "vcc12v_dcin"; + compatible = "regulator-fixed"; + phandle = <0x1cd>; + }; + + qos@fdf61200 { + compatible = "syscon"; + reg = <0x00 0xfdf61200 0x00 0x20>; + phandle = <0x91>; + }; + + i2s@fde00000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x234>; + assigned-clock-parents = <0x02 0x05>; + rockchip,capture-only; + resets = <0x02 0x417>; + interrupts = <0x00 0xbe 0x04>; + clocks = <0x02 0x237 0x02 0x237 0x02 0x233>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "disabled"; + reg = <0x00 0xfde00000 0x00 0x1000>; + phandle = <0x47e>; + dmas = <0xf2 0x18>; + reset-names = "rx-m"; + }; + + qos@fdf40800 { + compatible = "syscon"; + reg = <0x00 0xfdf40800 0x00 0x20>; + phandle = <0xa5>; + }; + + i2s@fddfc000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x23f>; + assigned-clock-parents = <0x02 0x05>; + rockchip,capture-only; + resets = <0x02 0x413>; + interrupts = <0x00 0xbd 0x04>; + clocks = <0x02 0x242 0x02 0x242 0x02 0x23e>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "disabled"; + reg = <0x00 0xfddfc000 0x00 0x1000>; + phandle = <0x27f>; + dmas = <0xf2 0x17>; + reset-names = "rx-m"; + }; + + usbdrd3_0 { + #address-cells = <0x02>; + clock-names = "ref\0suspend\0bus"; + clocks = <0x02 0x1a3 0x02 0x1a2 0x02 0x1a1>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + ranges; + status = "okay"; + phandle = <0x252>; + + usb@fc000000 { + power-domains = <0x60 0x1f>; + snps,dis-u1-entry-quirk; + snps,dis_enblslpm_quirk; + phy-names = "usb2-phy\0usb3-phy"; + snps,dis-u2-freeclk-exists-quirk; + usb-role-switch; + phy_type = "utmi_wide"; + quirk-skip-phy-init; + resets = <0x02 0x2a4>; + interrupts = <0x00 0xdc 0x04>; + snps,dis-u2-entry-quirk; + compatible = "snps,dwc3"; + snps,parkmode-disable-hs-quirk; + snps,dis-del-phy-power-chg-quirk; + status = "okay"; + snps,parkmode-disable-ss-quirk; + phys = <0x66 0x67>; + reg = <0x00 0xfc000000 0x00 0x400000>; + phandle = <0x253>; + dr_mode = "host"; + reset-names = "usb3-otg"; + snps,dis-tx-ipgap-linecheck-quirk; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + remote-endpoint = <0x68>; + reg = <0x00>; + phandle = <0x17d>; + }; + }; + }; + }; + + rkcif-mipi-lvds5-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x478>; + }; + + rkcif-dvp-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x51>; + phandle = <0x22a>; + }; + + iommu@fdd97e00 { + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x9c 0x04>; + clocks = <0x02 0x270 0x02 0x26f>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "vop_mmu"; + reg = <0x00 0xfdd97e00 0x00 0x100 0x00 0xfdd97f00 0x00 0x100>; + phandle = <0xd6>; + rockchip,disable-device-link-resume; + }; + + rkvtunnel { + compatible = "rockchip,video-tunnel"; + status = "disabled"; + phandle = <0x245>; + }; + + syscon@fd5e0000 { + compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; + reg = <0x00 0xfd5e0000 0x00 0x100>; + phandle = <0x18a>; + }; + + i2c@fead0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x14d>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb4 0x02 0xac>; + interrupts = <0x00 0x142 0x04>; + clocks = <0x02 0x91 0x02 0x89>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfead0000 0x00 0x1000>; + phandle = <0x2a8>; + reset-names = "i2c\0apb"; + }; + + iommu@fdba4800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x7b 0x04>; + clocks = <0x02 0x1ae 0x02 0x1af>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege1_mmu"; + reg = <0x00 0xfdba4800 0x00 0x40>; + phandle = <0xbe>; + }; + + spdif-rx@fde10000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x260>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x3ff>; + interrupts = <0x00 0xc8 0x04>; + clocks = <0x02 0x260 0x02 0x25f>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + status = "disabled"; + reg = <0x00 0xfde10000 0x00 0x1000>; + phandle = <0x47f>; + dmas = <0x7c 0x16>; + reset-names = "spdifrx-m"; + }; + + npu@fdab0000 { + power-domains = <0x60 0x09 0x60 0x0a 0x60 0x0b>; + iommus = <0xb2>; + clock-names = "clk_npu\0aclk0\0aclk1\0aclk2\0hclk0\0hclk1\0hclk2\0pclk"; + assigned-clocks = <0x0e 0x06>; + power-domain-names = "npu0\0npu1\0npu2"; + rknpu-supply = <0xb3>; + assigned-clock-rates = <0xbebc200>; + resets = <0x02 0x1e6 0x02 0x1b0 0x02 0x1c0 0x02 0x1e8 0x02 0x1b2 0x02 0x1c2>; + interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; + clocks = <0x0e 0x06 0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125 0x02 0x131>; + compatible = "rockchip,rk3588-rknpu"; + status = "okay"; + interrupt-names = "npu0_irq\0npu1_irq\0npu2_irq"; + mem-supply = <0xb3>; + reg = <0x00 0xfdab0000 0x00 0x10000 0x00 0xfdac0000 0x00 0x10000 0x00 0xfdad0000 0x00 0x10000>; + phandle = <0x265>; + reset-names = "srst_a0\0srst_a1\0srst_a2\0srst_h0\0srst_h1\0srst_h2"; + operating-points-v2 = <0xb1>; + }; + + hdmiphy@fed60000 { + clock-names = "ref\0apb"; + resets = <0x02 0x48e 0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d 0x02 0x48c 0x02 0x48d>; + clocks = <0x02 0x2b5 0x02 0x267>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy-hdmi"; + status = "okay"; + rockchip,grf = <0x18a>; + reg = <0x00 0xfed60000 0x00 0x2000>; + phandle = <0xfd>; + reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; + + clk-port { + #clock-cells = <0x00>; + status = "okay"; + phandle = <0x35>; + }; + }; + + dmc-opp-table { + nvmem-cells = <0x44 0x45 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,leakage-voltage-sel = <0x01 0x1f 0x00 0x20 0x2c 0x01 0x2d 0x39 0x02 0x3a 0xfe 0x03>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + phandle = <0x41>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,supported-hw; + + opp-1560000000 { + opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xadf34 0xadf34 0xb71b0>; + opp-hz = <0x00 0x5cfbb600>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xb1008 0xb1008 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb1008 0xb1008 0xb71b0>; + }; + + opp-j-m-1560000000 { + opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0x5cfbb600>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L3 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-j-m-528000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0x1f78a400>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-2750000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb1008 0xb1008 0xb71b0>; + opp-hz = <0x00 0xa3e9ab80>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-1068000000 { + opp-microvolt = <0xb1008 0xb1008 0xd59f8 0xb40dc 0xb40dc 0xb71b0>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-hz = <0x00 0x3fa86300>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; + opp-microvolt-L1 = <0xaae60 0xaae60 0xd59f8 0xadf34 0xadf34 0xb71b0>; + }; + + opp-j-m-2750000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0xa3e9ab80>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-528000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xd59f8 0xb1008 0xb1008 0xb71b0>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; + opp-hz = <0x00 0x1f78a400>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa4cb8 0xa4cb8 0xb71b0>; + opp-microvolt-L1 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; + }; + + opp-j-m-1068000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0x3fa86300>; + opp-supported-hw = <0x06 0xffff>; + }; + }; + + rkvenc-core@fdbe0000 { + power-domains = <0x60 0x11>; + iommus = <0xc5>; + rockchip,ccu = <0xc3>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; + assigned-clocks = <0x02 0x1ca 0x02 0x1cb>; + rockchip,task-capacity = <0x08>; + rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; + assigned-clock-rates = <0x1dcd6500 0x2faf0800>; + resets = <0x02 0x305 0x02 0x304 0x02 0x306>; + interrupts = <0x00 0x68 0x04>; + clocks = <0x02 0x1ca 0x02 0x1c9 0x02 0x1cb>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x07>; + compatible = "rockchip,rkv-encoder-v2-core"; + status = "okay"; + interrupt-names = "irq_rkvenc1"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbe0000 0x00 0x6000>; + phandle = <0x273>; + reset-names = "video_a\0video_h\0video_core"; + operating-points-v2 = <0xc4>; + }; + + debug@fd104000 { + compatible = "rockchip,debug"; + reg = <0x00 0xfd104000 0x00 0x1000 0x00 0xfd105000 0x00 0x1000 0x00 0xfd106000 0x00 0x1000 0x00 0xfd107000 0x00 0x1000 0x00 0xfd124000 0x00 0x1000 0x00 0xfd125000 0x00 0x1000 0x00 0xfd126000 0x00 0x1000 0x00 0xfd127000 0x00 0x1000>; + phandle = <0x48f>; + }; + + watchdog@feaf0000 { + clock-names = "tclk\0pclk"; + interrupts = <0x00 0x13b 0x04>; + clocks = <0x02 0x6c 0x02 0x6b>; + compatible = "snps,dw-wdt"; + status = "okay"; + reg = <0x00 0xfeaf0000 0x00 0x100>; + phandle = <0x2aa>; + }; + + syscon@fd5d8000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d8000 0x00 0x4000>; + phandle = <0x25d>; + + usb2-phy@8000 { + clock-output-names = "usb480m_phy2"; + clock-names = "phyclk"; + resets = <0x02 0xc0049 0x02 0x48a>; + interrupts = <0x00 0x187 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0x8000 0x10>; + phandle = <0x69>; + reset-names = "phy\0apb"; + + host-port { + phy-supply = <0x75>; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x6c>; + }; + }; + }; + + cluster0-opp-table { + rockchip,pvtm-offset = <0x64>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,dsu-grf = <0x23>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0x1f 0x20 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x555 0x00 0x556 0x56b 0x01 0x56c 0x581 0x02 0x582 0x597 0x03 0x598 0x5ad 0x04 0x5ae 0x5c3 0x05 0x5c4 0x270f 0x06>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,opp-shared-dsu; + rockchip,high-temp-max-freq = <0x188940>; + opp-shared; + rockchip,reboot-freq = <0x159b40>; + rockchip,pvtm-freq = <0x159b40>; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x22>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x582 0x00 0x583 0x59a 0x01 0x59b 0x5b2 0x02 0x5b3 0x5ca 0x03 0x5cb 0x5e2 0x04 0x5e3 0x5fa 0x05 0x5fb 0x270f 0x06>; + phandle = <0x0f>; + rockchip,pvtm-temp-prop = <0xf4 0xf4>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0xf6180>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-1200000000 { + opp-microvolt = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L2 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xe7ef0 0xa7d8c 0xa7d8c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; + }; + + opp-j-m-1416000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L2 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-microvolt-L0 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-supported-hw = <0x06 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + }; + + opp-1008000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1704000000 { + opp-microvolt = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-microvolt-L6 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + opp-microvolt-L4 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L2 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-hz = <0x00 0x6590fa00>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L5 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L3 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + }; + + opp-j-m-1200000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1008000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-816000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-1800000000 { + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L6 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L4 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L2 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L3 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-1608000000 { + opp-microvolt = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-microvolt-L6 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + }; + + opp-j-1296000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x4d3f6400>; + opp-microvolt-L0 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-supported-hw = <0x04 0xffff>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + }; + + opp-j-m-408000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1608000000 { + opp-microvolt = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L6 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L4 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + opp-microvolt-L2 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L5 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L3 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-1416000000 { + opp-microvolt = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-microvolt-L6 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; + opp-microvolt-L2 = <0xb40dc 0xb40dc 0xe7ef0 0xb40dc 0xb40dc 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-suspend; + opp-microvolt-L3 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + }; + + opp-408000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + }; + + vcc-4g-regulator { + regulator-boot-on; + gpio = <0x182 0x00 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_4g"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4b0>; + }; + + spi@fecb0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x187 0x188 0x189>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x14a 0x04>; + clocks = <0x02 0xa7 0x02 0xa2>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfecb0000 0x00 0x1000>; + phandle = <0x2e6>; + dmas = <0xf2 0x0d 0xf2 0x0e>; + }; + + spdif-rx@fde08000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x25e>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x3fd>; + interrupts = <0x00 0xc7 0x04>; + clocks = <0x02 0x25e 0x02 0x25d>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + status = "disabled"; + reg = <0x00 0xfde08000 0x00 0x1000>; + phandle = <0x280>; + dmas = <0x7c 0x15>; + reset-names = "spdifrx-m"; + }; + + mipi3-csi2-hw@fdd40000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x327>; + interrupts = <0x00 0x95 0x04 0x00 0x96 0x04>; + clocks = <0x02 0x1d2>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd40000 0x00 0x10000>; + phandle = <0x4a>; + reset-names = "srst_csihost_p"; + }; + + memory { + device_type = "memory"; + reg = <0x00 0x200000 0x00 0x8200000 0x00 0x9400000 0x00 0xe6c00000 0x01 0x00 0x01 0x00 0x02 0xf0000000 0x00 0x10000000 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>; + }; + + jpege-core@fdba4000 { + power-domains = <0x60 0x15>; + iommus = <0xbe>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1ae>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2cc 0x02 0x2cd>; + interrupts = <0x00 0x7c 0x04>; + clocks = <0x02 0x1ae 0x02 0x1af>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege1"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdba4000 0x00 0x400>; + phandle = <0x26e>; + reset-names = "video_a\0video_h"; + }; + + wireless-wlan { + pinctrl-names = "default"; + pinctrl-0 = <0x1ea>; + WIFI,host_wake_irq = <0x182 0x0a 0x00>; + wifi_chip_type = "rtl8822ce"; + compatible = "wlan-platdata"; + status = "okay"; + phandle = <0x4ab>; + }; + + rkcif-mipi-lvds4-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x475>; + }; + + dp@fde50000 { + power-domains = <0x60 0x19>; + clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; + assigned-clocks = <0x02 0x2cc>; + assigned-clock-rates = <0xf42400>; + resets = <0x02 0x388>; + interrupts = <0x00 0xa1 0x04>; + clocks = <0x02 0x1e6 0x02 0x2cc 0x02 0x1fb 0x02 0x207 0x04 0x02 0x1ea>; + #sound-dai-cells = <0x01>; + compatible = "rockchip,rk3588-dp"; + status = "disabled"; + phys = <0xf6>; + reg = <0x00 0xfde50000 0x00 0x4000>; + phandle = <0x1d6>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x38>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe0>; + }; + + endpoint@2 { + remote-endpoint = <0xf8>; + status = "disabled"; + reg = <0x02>; + phandle = <0xe6>; + }; + + endpoint@0 { + remote-endpoint = <0xf7>; + status = "disabled"; + reg = <0x00>; + phandle = <0xda>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x286>; + }; + }; + }; + }; + + rockchip-system-monitor { + rockchip,thermal-zone = "soc-thermal"; + compatible = "rockchip,system-monitor"; + phandle = <0x247>; + }; + + vcc3v3-pcie30 { + regulator-max-microvolt = <0x325aa0>; + enable-active-high; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc3v3_pcie30"; + startup-delay-us = <0x1388>; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x1b8>; + vin-supply = <0x1cd>; + gpios = <0x182 0x04 0x00>; + }; + + phy@fedb0000 { + clock-names = "pclk\0ref"; + resets = <0x02 0xc0045 0x02 0x43 0x02 0x44 0x02 0xc0046>; + clocks = <0x02 0x109 0x02 0x2b6>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dcphy"; + status = "okay"; + rockchip,grf = <0x191>; + reg = <0x00 0xfedb0000 0x00 0x10000>; + phandle = <0x30>; + reset-names = "m_phy\0apb\0grf\0s_phy"; + }; + + rkvdec-core@fdc38000 { + power-domains = <0x60 0x0e>; + iommus = <0xc9>; + rockchip,ccu = <0xca>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; + reg-names = "regs\0link"; + assigned-clocks = <0x02 0x190 0x02 0x193 0x02 0x191 0x02 0x192>; + rockchip,core-mask = <0x10001>; + rockchip,task-capacity = <0x10>; + rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; + assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; + resets = <0x02 0x284 0x02 0x283 0x02 0x289 0x02 0x287 0x02 0x288>; + interrupts = <0x00 0x5f 0x04>; + rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; + clocks = <0x02 0x190 0x02 0x18f 0x02 0x193 0x02 0x191 0x02 0x192>; + rockchip,rcb-min-width = <0x200>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x09>; + compatible = "rockchip,rkv-decoder-v2"; + status = "okay"; + interrupt-names = "irq_rkvdec0"; + rockchip,skip-pmu-idle-request; + rockchip,rcb-iova = <0xfff00000 0x100000>; + reg = <0x00 0xfdc38100 0x00 0x400 0x00 0xfdc38000 0x00 0x100>; + phandle = <0x274>; + reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; + rockchip,sram = <0xcb>; + }; + + minidump { + smem-region = <0x1cf>; + minidump-region = <0x1d0>; + compatible = "rockchip,minidump"; + status = "disabled"; + phandle = <0x491>; + }; +}; diff --git a/scripts/make/qemu.mk b/scripts/make/qemu.mk index 8f73b1d3..50b5058d 100644 --- a/scripts/make/qemu.mk +++ b/scripts/make/qemu.mk @@ -36,7 +36,7 @@ qemu_args-$(NET) += \ -device virtio-net-$(vdev-suffix),netdev=net0 ifeq ($(NET_DEV), user) - qemu_args-$(NET) += -netdev user,id=net0,hostfwd=tcp::5555-:5555,hostfwd=udp::5555-:5555 + qemu_args-$(NET) += -netdev user,id=net0,hostfwd=tcp::5555-:22,hostfwd=udp::5555-:5555 else ifeq ($(NET_DEV), tap) qemu_args-$(NET) += -netdev tap,id=net0,script=scripts/net/qemu-ifup.sh,downscript=no,vhost=$(VHOST),vhostforce=$(VHOST) QEMU := sudo $(QEMU) @@ -68,7 +68,7 @@ ifeq ($(ARCH), aarch64) ifeq ($(GICV3),y) qemu_args-y += -machine virt,virtualization=on,gic-version=3 else - qemu_args-y += -machine virt,virtualization=on,gic-version=2 + qemu_args-y += -machine virt,virtualization=on,gic-version=3 endif endif diff --git a/scripts/make/rk3588.mk b/scripts/make/rk3588.mk index 49c0a444..ecd40280 100644 --- a/scripts/make/rk3588.mk +++ b/scripts/make/rk3588.mk @@ -1,13 +1,27 @@ RK3588_GITHUB_URL = https://github.com/arceos-hypervisor/platform_tools/releases/download/latest/rk3588.zip -RK3588_MKIMG_FILE = ./tools/rk3588/mkimg -check-download: -ifeq ("$(wildcard $(RK3588_MKIMG_FILE))","") +RK3588_MKIMAGE = ./tools/rk3588/mkimage + +OUT_IMG := $(OUT_DIR)/$(APP_NAME)_$(PLAT_NAME).img + +.PHONY: build_image + +build_image: build +ifeq ($(wildcard $(RK3588_MKIMAGE)),) @echo "file not found, downloading from $(RK3588_GITHUB_URL)..."; wget $(RK3588_GITHUB_URL); unzip -o rk3588.zip -d tools; - rm rk3588.zip; + rm rk3588.zip; endif + $(RK3588_MKIMAGE) -n axvisor -A arm64 -O linux -T kernel -C none -a 0x00480000 -e 0x00480000 -d $(OUT_BIN) $(OUT_IMG) + @echo 'Built the uboot image ${OUT_IMG} successfully!' -kernel: check-download build - $(RK3588_MKIMG_FILE) --dtb rk3588-firefly-itx-3588j.dtb --img $(OUT_BIN) - @echo 'Built the FIT-uImage boot.img' +define upload_image + @echo "Uploading image to RK3588..." + cp $(OUT_IMG) /srv/tftp/axvisor + @echo "Image uploaded to /srv/tftp/axvisor" + @echo "You can now boot the image using the RK3588 board." + @echo "Coping this command to uboot console:" + @echo "" + @echo 'setenv serverip 192.168.50.138;setenv ipaddr 192.168.50.8;tftp 0x00480000 192.168.50.138:axvisor;tftp 0x10000000 192.168.50.138:rk3588_dtb.bin;bootm 0x00480000 - 0x10000000;' + @echo "" +endef \ No newline at end of file diff --git a/src/hal.rs b/src/hal.rs index 3a73f51c..2893c04f 100644 --- a/src/hal.rs +++ b/src/hal.rs @@ -74,7 +74,7 @@ impl AxVCpuHal for AxVCpuHalImpl { #[cfg(target_arch = "aarch64")] fn irq_hanlder() { - let irq_num = axhal::irq::fetch_irq(); + let irq_num = Self::irq_fetch(); debug!("IRQ handler {irq_num}"); axhal::irq::handler_irq(irq_num); } diff --git a/src/vmm/config.rs b/src/vmm/config.rs index 32d2e181..ba21db7e 100644 --- a/src/vmm/config.rs +++ b/src/vmm/config.rs @@ -1,4 +1,10 @@ -use axvm::config::{AxVMConfig, AxVMCrateConfig}; +use alloc::string::ToString; +use alloc::vec::Vec; + +use axaddrspace::MappingFlags; +use axvm::config::{ + AxVMConfig, AxVMCrateConfig, PassThroughDeviceConfig, VmMemConfig, VmMemMappingType, +}; use crate::vmm::{VM, images::load_vm_images, vm_list::push_vm}; @@ -22,13 +28,127 @@ pub mod config { include!(concat!(env!("OUT_DIR"), "/vm_configs.rs")); } +pub fn get_vm_dtb(vm_cfg: &AxVMConfig) -> Option<&'static [u8]> { + let vm_imags = config::get_memory_images() + .iter() + .find(|&v| v.id == vm_cfg.id()) + .expect("VM images is missed, Perhaps add `VM_CONFIGS=PATH/CONFIGS/FILE` command."); + vm_imags.dtb +} + +pub fn parse_vm_dtb(vm_cfg: &mut AxVMConfig, dtb: &[u8]) { + use fdt_parser::{Fdt, Status}; + + let fdt = Fdt::from_bytes(dtb) + .expect("Failed to parse DTB image, perhaps the DTB is invalid or corrupted"); + + let mut dram_regions = Vec::new(); + for mem in fdt.memory() { + for region in mem.regions() { + if region.size == 0 { + continue; + } + dram_regions.push((region.address as usize, region.size as usize)); + } + } + + for mem in fdt.memory() { + for region in mem.regions() { + // Skip empty regions + if region.size == 0 { + continue; + } + warn!("DTB memory region: {:?}", region); + vm_cfg.add_memory_region(VmMemConfig { + gpa: region.address as usize, + size: region.size as usize, + flags: (MappingFlags::READ | MappingFlags::WRITE | MappingFlags::EXECUTE).bits(), + map_type: VmMemMappingType::MapIentical, + }); + } + } + + for reserved in fdt.reserved_memory() { + warn!("Find reserved memory: {:?}", reserved.name()); + } + + for mem_reserved in fdt.memory_reservation_block() { + warn!("Find memory reservation block: {:?}", mem_reserved); + } + + for node in fdt.all_nodes() { + trace!("DTB node: {:?}", node.name()); + let name = node.name(); + if name.starts_with("memory") { + // Skip the memory node, as we handle memory regions separately. + continue; + } + + if let Some(status) = node.status() { + if status == Status::Disabled { + // Skip disabled nodes + trace!("DTB node: {} is disabled", name); + // continue; + } + } + + if let Some(regs) = node.reg() { + for reg in regs { + if reg.address < 0x1000 { + // Skip registers with address less than 0x10000. + trace!( + "Skipping DTB node {} with register address {:#x} < 0x10000", + node.name(), + reg.address + ); + continue; + } + + if let Some(size) = reg.size { + let start = reg.address as usize; + let end = start + size as usize; + if vm_cfg.contains_memory_range(&(start..end)) { + trace!( + "Skipping DTB node {} with register address {:#x} and size {:#x} as it overlaps with existing memory regions", + node.name(), + reg.address, + size + ); + continue; + } + + let pt_dev = PassThroughDeviceConfig { + name: node.name().to_string(), + base_gpa: reg.address as _, + base_hpa: reg.address as _, + length: size as _, + irq_id: 0, + }; + trace!("Adding {:x?}", pt_dev); + vm_cfg.add_pass_through_device(pt_dev); + } + } + } + } +} + pub fn init_guest_vms() { let gvm_raw_configs = config::static_vm_configs(); for raw_cfg_str in gvm_raw_configs { let vm_create_config = AxVMCrateConfig::from_toml(raw_cfg_str).expect("Failed to resolve VM config"); - let vm_config = AxVMConfig::from(vm_create_config.clone()); + let mut vm_config = AxVMConfig::from(vm_create_config.clone()); + + // Overlay VM config with the given DTB. + if let Some(dtb) = get_vm_dtb(&vm_config) { + parse_vm_dtb(&mut vm_config, dtb); + } else { + warn!( + "VM[{}] DTB not found in memory, skipping...", + vm_config.id() + ); + } info!("Creating VM[{}] {:?}", vm_config.id(), vm_config.name()); diff --git a/src/vmm/hvc.rs b/src/vmm/hvc.rs new file mode 100644 index 00000000..770456b5 --- /dev/null +++ b/src/vmm/hvc.rs @@ -0,0 +1,152 @@ +use axaddrspace::{GuestPhysAddr, MappingFlags}; +use axerrno::{AxResult, ax_err, ax_err_type}; +use axhvc::{HyperCallCode, HyperCallResult}; + +use crate::vmm::ivc::{self, IVCChannel}; +use crate::vmm::{VCpuRef, VMRef}; + +pub struct HyperCall { + vcpu: VCpuRef, + vm: VMRef, + code: HyperCallCode, + args: [u64; 6], +} + +impl HyperCall { + pub fn new(vcpu: VCpuRef, vm: VMRef, code: u64, args: [u64; 6]) -> AxResult { + let code = HyperCallCode::try_from(code as u32).map_err(|e| { + warn!("Invalid hypercall code: {} e {:?}", code, e); + ax_err_type!(InvalidInput) + })?; + + Ok(Self { + vcpu, + vm, + code, + args, + }) + } + + pub fn execute(&self) -> HyperCallResult { + match self.code { + HyperCallCode::HIVCPublishChannel => { + // This is just a placeholder for the shared memory base address, + // it should be allocated dynamically. + const SHM_BASE_GPA_RAW: usize = 0xd000_0000; + let shm_base_gpa = GuestPhysAddr::from_usize(SHM_BASE_GPA_RAW); + + let key = self.args[0] as usize; + let shm_base_gpa_ptr = GuestPhysAddr::from_usize(self.args[1] as usize); + let shm_size_ptr = GuestPhysAddr::from_usize(self.args[2] as usize); + + let shm_region_size = self.vm.read_from_guest_of::(shm_size_ptr)?; + + info!("VM[{}] HyperCall {:?}", self.vm.id(), self.code); + let ivc_channel = + IVCChannel::alloc(self.vm.id(), key, shm_region_size, shm_base_gpa)?; + + let actual_size = ivc_channel.size(); + + self.vm.map_region( + shm_base_gpa, + ivc_channel.base_hpa(), + actual_size, + MappingFlags::READ | MappingFlags::WRITE, + )?; + + self.vm + .write_to_guest_of(shm_base_gpa_ptr, &shm_base_gpa.as_usize())?; + self.vm.write_to_guest_of(shm_size_ptr, &actual_size)?; + + ivc::insert_channel(self.vm.id(), ivc_channel)?; + + Ok(0) + } + HyperCallCode::HIVCUnPublishChannel => { + let key = self.args[0] as usize; + + info!( + "VM[{}] HyperCall {:?} with key {:#x}", + self.vm.id(), + self.code, + key + ); + let channel = ivc::remove_channel(self.vm.id(), key)?; + + self.vm + .unmap_region(channel.base_gpa_in_publisher(), channel.size())?; + + for (subscriber_id, subscriber_base_gpa) in channel.subscribers() { + warn!( + "TODO, you should unmap subscriber VM[{}] base GPA: {:?} size {:#x}", + subscriber_id, + subscriber_base_gpa, + channel.size() + ); + } + + Ok(0) + } + HyperCallCode::HIVCSubscribChannel => { + // This is just a placeholder for the shared memory base address, + // it should be allocated dynamically. + const SHM_BASE_GPA_RAW: usize = 0xe000_0000; + let shm_base_gpa = GuestPhysAddr::from_usize(SHM_BASE_GPA_RAW); + + let publisher_vm_id = self.args[0] as usize; + let key = self.args[1] as usize; + let shm_base_gpa_ptr = GuestPhysAddr::from_usize(self.args[2] as usize); + let shm_size_ptr = GuestPhysAddr::from_usize(self.args[3] as usize); + + info!( + "VM[{}] HyperCall {:?} to VM[{}]", + self.vm.id(), + self.code, + publisher_vm_id + ); + let (base_hpa, actual_size) = ivc::subscribe_to_channel_of_publisher( + publisher_vm_id, + key, + self.vm.id(), + shm_base_gpa, + )?; + + self.vm + .map_region(shm_base_gpa, base_hpa, actual_size, MappingFlags::READ)?; + + self.vm + .write_to_guest_of(shm_base_gpa_ptr, &shm_base_gpa.as_usize())?; + self.vm.write_to_guest_of(shm_size_ptr, &actual_size)?; + + info!( + "VM[{}] HyperCall HIVC_REGISTER_SUBSCRIBER success, base GPA: {:#x}, size: {}", + self.vm.id(), + shm_base_gpa, + actual_size + ); + + Ok(0) + } + HyperCallCode::HIVCUnSubscribChannel => { + let publisher_vm_id = self.args[0] as usize; + let key = self.args[1] as usize; + + info!( + "VM[{}] HyperCall {:?} from VM[{}]", + self.vm.id(), + self.code, + publisher_vm_id + ); + let (base_gpa, size) = + ivc::unsubscribe_from_channel_of_publisher(publisher_vm_id, key, self.vm.id())?; + self.vm.unmap_region(base_gpa, size)?; + + Ok(0) + } + _ => { + warn!("Unsupported hypercall code: {:?}", self.code); + return ax_err!(Unsupported); + } + } + } +} diff --git a/src/vmm/ivc.rs b/src/vmm/ivc.rs new file mode 100644 index 00000000..7d16d387 --- /dev/null +++ b/src/vmm/ivc.rs @@ -0,0 +1,238 @@ +//! Inter-VM communication (IVC) module. +use alloc::collections::BTreeMap; +use alloc::vec::Vec; + +use std::os::arceos::modules::axhal::paging::PagingHandlerImpl; +use std::sync::Mutex; + +use axaddrspace::{GuestPhysAddr, HostPhysAddr}; +use axerrno::AxResult; +use page_table_multiarch::PagingHandler; + +/// A global btree map to store IVC channels, +/// indexed by (publisher_vm_id, channel_key). +static IVC_CHANNELS: Mutex>> = + Mutex::new(BTreeMap::new()); + +pub fn insert_channel( + publisher_vm_id: usize, + channel: IVCChannel, +) -> AxResult<()> { + let mut channels = IVC_CHANNELS.lock(); + if channels + .insert((publisher_vm_id, channel.key), channel) + .is_some() + { + Err(axerrno::ax_err_type!( + AlreadyExists, + "IVC channel already exists" + )) + } else { + Ok(()) + } +} + +pub fn remove_channel( + publisher_vm_id: usize, + key: usize, +) -> AxResult> { + IVC_CHANNELS + .lock() + .remove(&(publisher_vm_id, key)) + .ok_or_else(|| { + axerrno::ax_err_type!( + NotFound, + format!( + "IVC channel for publisher VM {} with key {} not found", + publisher_vm_id, key + ) + ) + }) +} + +/// Subcribe to a channel of a publisher VM with the given key, +/// return the shared region base address and size. +pub fn subscribe_to_channel_of_publisher<'a>( + publisher_vm_id: usize, + key: usize, + subscriber_vm_id: usize, + subscriber_gpa: GuestPhysAddr, +) -> AxResult<(HostPhysAddr, usize)> { + let mut channels = IVC_CHANNELS.lock(); + if let Some(channel) = channels.get_mut(&(publisher_vm_id, key)) { + // Add the subscriber VM ID to the channel. + channel.add_subscriber(subscriber_vm_id, subscriber_gpa); + Ok((channel.base_hpa(), channel.size())) + } else { + Err(axerrno::ax_err_type!( + NotFound, + format!( + "IVC channel for publisher VM [{}] key {:#x} not found", + publisher_vm_id, key + ) + )) + } +} + +/// Unsubscribe from a channel of a publisher VM with the given key, +/// return the shared region base address and size. +pub fn unsubscribe_from_channel_of_publisher( + publisher_vm_id: usize, + key: usize, + subscriber_vm_id: usize, +) -> AxResult<(GuestPhysAddr, usize)> { + let mut channels = IVC_CHANNELS.lock(); + if let Some(channel) = channels.get_mut(&(publisher_vm_id, key)) { + // Remove the subscriber VM ID from the channel. + if let Some(subscriber_gpa) = channel.remove_subscriber(subscriber_vm_id) { + Ok((subscriber_gpa, channel.size())) + } else { + Err(axerrno::ax_err_type!( + NotFound, + format!( + "VM[{}] tries to subcriber non-existed channel publisher VM[{}] Key {:#x}", + subscriber_vm_id, publisher_vm_id, key + ) + )) + } + } else { + Err(axerrno::ax_err_type!( + NotFound, + format!("IVC channel for publisher VM {} not found", publisher_vm_id) + )) + } +} + +pub struct IVCChannel { + publisher_vm_id: usize, + key: usize, + /// A list of subscriber VM IDs that are subscribed to this channel. + /// The key is the subscriber VM ID, and the value is the base address of the shared region in + /// guest physical address of the subscriber VM. + subscriber_vms: BTreeMap, + shared_region_base: HostPhysAddr, + shared_region_size: usize, + /// The base address of the shared memory region in guest physical address of the publisher VM. + base_gpa: GuestPhysAddr, + _phatom: core::marker::PhantomData, +} + +#[repr(C)] +pub struct IVCChannelHeader { + pub publisher_id: u64, + pub key: u64, + pub content_size: u64, +} + +impl IVCChannel { + #[allow(unused)] + pub fn header(&self) -> &IVCChannelHeader { + unsafe { + // Map the shared region base to the header structure. + &*H::phys_to_virt(self.shared_region_base).as_mut_ptr_of::() + } + } + + pub fn header_mut(&mut self) -> &mut IVCChannelHeader { + unsafe { + // Map the shared region base to the mutable header structure. + &mut *H::phys_to_virt(self.shared_region_base).as_mut_ptr_of::() + } + } + + #[allow(unused)] + pub fn data_region(&self) -> *const u8 { + unsafe { + // Return a pointer to the data region, which starts after the header. + H::phys_to_virt(self.shared_region_base) + .as_mut_ptr() + .add(core::mem::size_of::()) + } + } +} + +impl core::fmt::Debug for IVCChannel { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + write!( + f, + "IVCChannel(publisher[{}], subscribers {:?}, base: {:?}, size: {:#x})", + self.publisher_vm_id, + self.subscriber_vms, + self.shared_region_base, + self.shared_region_size + ) + } +} + +impl Drop for IVCChannel { + fn drop(&mut self) { + // Free the shared region frame when the channel is dropped. + debug!( + "Dropping IVCChannel for VM[{}], shared region base: {:?}", + self.publisher_vm_id, self.shared_region_base + ); + H::dealloc_frame(self.shared_region_base); + } +} + +impl IVCChannel { + pub fn alloc( + publisher_vm_id: usize, + key: usize, + shared_region_size: usize, + base_gpa: GuestPhysAddr, + ) -> AxResult { + // TODO: support larger shared region sizes with alloc_frames API. + let shared_region_size = shared_region_size.min(4096); + let shared_region_base = H::alloc_frame().ok_or_else(|| { + axerrno::ax_err_type!(NoMemory, "Failed to allocate shared region frame") + })?; + + let mut channel = IVCChannel { + publisher_vm_id, + key, + subscriber_vms: BTreeMap::new(), + shared_region_base, + shared_region_size, + base_gpa, + _phatom: core::marker::PhantomData, + }; + + channel.header_mut().publisher_id = publisher_vm_id as u64; + channel.header_mut().key = key as u64; + channel.header_mut().content_size = 0; + + debug!("Allocated IVCChannel: {:?}", channel); + + Ok(channel) + } + + pub fn base_hpa(&self) -> HostPhysAddr { + self.shared_region_base + } + + pub fn base_gpa_in_publisher(&self) -> GuestPhysAddr { + self.base_gpa + } + + pub fn size(&self) -> usize { + self.shared_region_size + } + + pub fn add_subscriber(&mut self, subscriber_vm_id: usize, subscriber_gpa: GuestPhysAddr) { + if !self.subscriber_vms.contains_key(&subscriber_vm_id) { + self.subscriber_vms.insert(subscriber_vm_id, subscriber_gpa); + } + } + + pub fn remove_subscriber(&mut self, subscriber_vm_id: usize) -> Option { + self.subscriber_vms.remove(&subscriber_vm_id) + } + + pub fn subscribers(&self) -> Vec<(usize, GuestPhysAddr)> { + self.subscriber_vms + .iter() + .map(|(vm_id, gpa)| (*vm_id, *gpa)) + .collect() + } +} diff --git a/src/vmm/mod.rs b/src/vmm/mod.rs index 0e9ab075..1aca330e 100644 --- a/src/vmm/mod.rs +++ b/src/vmm/mod.rs @@ -1,5 +1,7 @@ mod config; +mod hvc; mod images; +mod ivc; #[allow(unused)] //TODO: remove this with "irq" feature. mod timer; mod vcpus; diff --git a/src/vmm/vcpus.rs b/src/vmm/vcpus.rs index 1a084c01..bb21ac5d 100644 --- a/src/vmm/vcpus.rs +++ b/src/vmm/vcpus.rs @@ -292,6 +292,23 @@ fn vcpu_run() { Ok(exit_reason) => match exit_reason { AxVCpuExitReason::Hypercall { nr, args } => { debug!("Hypercall [{}] args {:x?}", nr, args); + use crate::vmm::hvc::HyperCall; + + match HyperCall::new(vcpu.clone(), vm.clone(), nr, args) { + Ok(hypercall) => { + let ret_val = match hypercall.execute() { + Ok(ret_val) => ret_val as isize, + Err(err) => { + warn!("Hypercall [{:#x}] failed: {:?}", nr, err); + -1 + } + }; + vcpu.set_return_value(ret_val as usize); + } + Err(err) => { + warn!("Hypercall [{:#x}] failed: {:?}", nr, err); + } + } } AxVCpuExitReason::FailEntry { hardware_entry_failure_reason, diff --git a/tool/dev_env.py b/tool/dev_env.py index 84c3c3d5..2dd2a40b 100755 --- a/tool/dev_env.py +++ b/tool/dev_env.py @@ -37,6 +37,7 @@ def main(): "arm_vgic", "arm_gicv2", "axdevice_crates", + "axhvc", ] for one in repos: