From bd76a51bffd2cfb48ecf6789f5f6d5854881053f Mon Sep 17 00:00:00 2001 From: ZCShou <72115@163.com> Date: Tue, 30 Sep 2025 01:00:50 +0000 Subject: [PATCH 1/4] clean configs/platforms due to no adaptation --- configs/platforms/aarch64-bsta1000b-hv.toml | 71 ------------ configs/platforms/aarch64-qemu-virt-hv.toml | 119 -------------------- configs/platforms/aarch64-rk3588j-hv.toml | 75 ------------ configs/platforms/riscv64-qemu-virt.toml | 77 ------------- configs/platforms/x86_64-qemu-q35.toml | 57 ---------- 5 files changed, 399 deletions(-) delete mode 100644 configs/platforms/aarch64-bsta1000b-hv.toml delete mode 100644 configs/platforms/aarch64-qemu-virt-hv.toml delete mode 100644 configs/platforms/aarch64-rk3588j-hv.toml delete mode 100644 configs/platforms/riscv64-qemu-virt.toml delete mode 100644 configs/platforms/x86_64-qemu-q35.toml diff --git a/configs/platforms/aarch64-bsta1000b-hv.toml b/configs/platforms/aarch64-bsta1000b-hv.toml deleted file mode 100644 index 03ba9994..00000000 --- a/configs/platforms/aarch64-bsta1000b-hv.toml +++ /dev/null @@ -1,71 +0,0 @@ -# Architecture identifier. -arch = "aarch64" # str -# Platform identifier. -platform = "aarch64-bsta1000b-hv" # str - -# -# Platform configs -# -[plat] -# Platform family. -family = "aarch64-bsta1000b" # str - -# Base address of the whole physical memory. -phys-memory-base = 0x1_9800_0000 -# Size of the whole physical memory. -phys-memory-size = 0x5800_0000 -# Base physical address of the kernel image. -kernel-base-paddr = 0x1_a000_0000 -# Base virtual address of the kernel image. -kernel-base-vaddr = "0x0000_0001_a000_0000" -# Linear mapping offset, for quick conversions between physical and virtual -# addresses. -phys-virt-offset = "0x0000_0000_0000_0000" -# Offset of bus address and phys address. some boards, the bus address is -# different from the physical address. -phys-bus-offset = 0 -# Kernel address space base. -kernel-aspace-base = "0x0000_0000_0000_0000" -# Kernel address space size. -kernel-aspace-size = "0x0000_ffff_ffff_f000" - -# -# Device specifications -# -[devices] -# MMIO regions with format (`base_paddr`, `size`). -mmio-regions = [ - [0x20008000, 0x1000], # uart8250 UART0 - [0x32000000, 0x8000], # arm,gic-400 - [0x32011000, 0x1000], # CPU CSR - [0x33002000, 0x1000], # Top CRM - [0x70035000, 0x1000], # CRM reg - [0x70038000, 0x1000], # aon pinmux -] # [(uint, uint)] -# VirtIO MMIO regions with format (`base_paddr`, `size`). -virtio-mmio-regions = [] # [(uint, uint)] - -# Base physical address of the PCIe ECAM space. -pci-ecam-base = 0x30E0_2000 - -# UART Address -uart-paddr = 0x2000_8000 # uint -# UART IRQ number -uart-irq = 0xd5 # uint - -# GIC CPU Interface base address -gicc-paddr = 0x3200_2000 # uint -# GIC Distributor base address -gicd-paddr = 0x3200_1000 # uint - -# BST A1000B board registers -cpu-csr-base = 0x3201_1000 # uint -a1000base-topcrm = 0x3300_2000 # uint -a1000base-safetycrm = 0x7003_5000 # uint -a1000base-aoncfg = 0x7003_8000 # uint - -# PSCI -psci-method = "smc" # str - -# RTC (PL031) Address (Need to read from DTB). -rtc-paddr = 0x0 # uint diff --git a/configs/platforms/aarch64-qemu-virt-hv.toml b/configs/platforms/aarch64-qemu-virt-hv.toml deleted file mode 100644 index 7192d01a..00000000 --- a/configs/platforms/aarch64-qemu-virt-hv.toml +++ /dev/null @@ -1,119 +0,0 @@ -# Architecture identifier. -arch = "aarch64" # str -# Platform identifier. -platform = "aarch64-qemu-virt-hv" # str - -# -# Platform configs -# -[plat] -# Platform family. -family = "aarch64-qemu-virt" # str - -# Base address of the whole physical memory. -phys-memory-base = 0x4000_0000 # uint -# Size of the whole physical memory. (2GB) -phys-memory-size = 0x1_0000_0000 # uint -# Base physical address of the kernel image. -kernel-base-paddr = 0x4008_0000 # uint -# Base virtual address of the kernel image. -kernel-base-vaddr = "0x0000_0000_4008_0000" # uint -# Linear mapping offset, for quick conversions between physical and virtual -# addresses. -phys-virt-offset = "0x0000_0000_0000_0000" # uint -# Offset of bus address and phys address. some boards, the bus address is -# different from the physical address. -phys-bus-offset = 0 # uint -# Kernel address space base. -kernel-aspace-base = "0x0000_0000_0000_0000" # uint -# Kernel address space size. -kernel-aspace-size = "0x0000_ffff_ffff_f000" # uint - -# -# Device specifications -# -[devices] -# MMIO regions with format (`base_paddr`, `size`). -mmio-regions = [ - [0x0900_0000, 0x1000], # PL011 UART1 - [0x0904_0000, 0x1000], # PL011 UART2 - [0x0910_0000, 0x1000], # PL031 RTC - [0x0800_0000, 0x2_0000], # GICv2/v3 GICD - [0x0808_0000, 0x2_0000], # GICv3 GITS - [0x080a_0000, 0xf6_0000], # GICv3 GICR - [0x0a00_0000, 0x4000], # VirtIO - [0x1000_0000, 0x2eff_0000], # PCI memory ranges (ranges 1: 32-bit MMIO space) - [0x40_1000_0000, 0x1000_0000], # PCI config space -] # [(uint, uint)] -# VirtIO MMIO regions with format (`base_paddr`, `size`). -virtio-mmio-regions = [ - [0x0a00_0000, 0x200], - [0x0a00_0200, 0x200], - [0x0a00_0400, 0x200], - [0x0a00_0600, 0x200], - [0x0a00_0800, 0x200], - [0x0a00_0a00, 0x200], - [0x0a00_0c00, 0x200], - [0x0a00_0e00, 0x200], - [0x0a00_1000, 0x200], - [0x0a00_1200, 0x200], - [0x0a00_1400, 0x200], - [0x0a00_1600, 0x200], - [0x0a00_1800, 0x200], - [0x0a00_1a00, 0x200], - [0x0a00_1c00, 0x200], - [0x0a00_1e00, 0x200], - [0x0a00_3000, 0x200], - [0x0a00_2200, 0x200], - [0x0a00_2400, 0x200], - [0x0a00_2600, 0x200], - [0x0a00_2800, 0x200], - [0x0a00_2a00, 0x200], - [0x0a00_2c00, 0x200], - [0x0a00_2e00, 0x200], - [0x0a00_3000, 0x200], - [0x0a00_3200, 0x200], - [0x0a00_3400, 0x200], - [0x0a00_3600, 0x200], - [0x0a00_3800, 0x200], - [0x0a00_3a00, 0x200], - [0x0a00_3c00, 0x200], - [0x0a00_3e00, 0x200], -] # [(uint, uint)] -# Base physical address of the PCIe ECAM space. -pci-ecam-base = 0x40_1000_0000 # uint -# End PCI bus number (`bus-range` property in device tree). -pci-bus-end = 0xff # uint -# PCI device memory ranges (`ranges` property in device tree). -pci-ranges = [ - [0x3ef_f0000, 0x1_0000], # PIO space - [0x1000_0000, 0x2eff_0000], # 32-bit MMIO space - [0x80_0000_0000, 0x80_0000_0000], # 64-bit MMIO space -] # [(uint, uint)] -# UART Address -uart-paddr = 0x0900_0000 # uint -# UART IRQ number -uart-irq = 1 # uint - -# GIC CPU Interface base address -gicc-paddr = 0x0801_0000 # uint -# GIC Distributor base address -gicd-paddr = 0x0800_0000 # uint -gicv-paddr = 0x0804_0000 # uint -gich-paddr = 0x0803_0000 # uint - -# GIC Redistributor base address -gicr-paddr = 0x080a_0000 - -# PSCI -psci-method = "smc" # str - -# pl031@9010000 { -# clock-names = "apb_pclk"; -# clocks = <0x8000>; -# interrupts = <0x00 0x02 0x04>; -# reg = <0x00 0x9010000 0x00 0x1000>; -# compatible = "arm,pl031\0arm,primecell"; -# }; -# RTC (PL031) Address -rtc-paddr = 0x901_0000 # uint diff --git a/configs/platforms/aarch64-rk3588j-hv.toml b/configs/platforms/aarch64-rk3588j-hv.toml deleted file mode 100644 index f2e847f2..00000000 --- a/configs/platforms/aarch64-rk3588j-hv.toml +++ /dev/null @@ -1,75 +0,0 @@ -# Architecture identifier. -arch = "aarch64" # str -# Platform identifier. -platform = "aarch64-rk3588j" # str - -# -# Platform configs -# -[plat] -# Platform family. -family = "aarch64-rk3588j" - -# Base address of the whole physical memory. -phys-memory-base = 0x20_0000 # uint -# Size of the whole physical memory. -phys-memory-size = 0x800_0000 # uint -# Base physical address of the kernel image. -kernel-base-paddr = 0x48_0000 # uint -# Base virtual address of the kernel image. -kernel-base-vaddr = "0x0000_0000_0048_0000" -# Linear mapping offset, for quick conversions between physical and virtual -# addresses. -phys-virt-offset = "0x0000_0000_0000_0000" -# Kernel address space base. -kernel-aspace-base = "0x0000_0000_0000_0000" -# Kernel address space size. -kernel-aspace-size = "0x0000_ffff_ffff_f000" - -# -# Device specifications -# -[devices] -# MMIO regions with format (`base_paddr`, `size`). -mmio-regions = [ - [0xfeb50000, 0x1000], # uart8250 UART0 - [0xfe600000, 0x10000], # gic-v3 gicd - [0xfe640000, 0x40000], # gic-v3 gits - [0xfe680000, 0x100000], # gic-v3 gicr - [0xa41000000, 0x400000], - [0xa40c00000, 0x400000], - [0xf4000000,0x1000000], - [0xf3000000,0x1000000], -] # [(uint, uint)] -# VirtIO MMIO regions with format (`base_paddr`, `size`). -virtio-mmio-regions = [] # [(uint, uint)] - -# Base physical address of the PCIe ECAM space. -pci-ecam-base = 0xf4000000 # uint -# End PCI bus number (`bus-range` property in device tree). -pci-bus-end = 0xff # uint -# PCI device memory ranges (`ranges` property in device tree). -pci-ranges = [] # [(uint, uint)] -# UART Address -uart-paddr = 0xfeb5_0000 # uint -uart-irq = 0x14d # uint - -# GICC Address -gicc-paddr = 0xfe610000 # uint -# GICD Address -gicd-paddr = 0xfe600000 # uint -# GICR Address -gicr-paddr = 0xfe680000 # uint - -# PSCI -psci-method = "smc" # str - -# pl031@9010000 { -# clock-names = "apb_pclk"; -# clocks = <0x8000>; -# interrupts = <0x00 0x02 0x04>; -# reg = <0x00 0x9010000 0x00 0x1000>; -# compatible = "arm,pl031\0arm,primecell"; -# }; -# RTC (PL031) Address -rtc-paddr = 0x901_0000 # uint \ No newline at end of file diff --git a/configs/platforms/riscv64-qemu-virt.toml b/configs/platforms/riscv64-qemu-virt.toml deleted file mode 100644 index f272f515..00000000 --- a/configs/platforms/riscv64-qemu-virt.toml +++ /dev/null @@ -1,77 +0,0 @@ -# Architecture identifier. -arch = "riscv64" # str -# Platform identifier. -platform = "riscv64-qemu-virt" # str - -# -# Platform configs -# -[plat] -# Platform family. -family = "riscv64-qemu-virt" # str - -# Base address of the whole physical memory. -phys-memory-base = 0x8000_0000 # uint -# Size of the whole physical memory. (128M) -phys-memory-size = 0x800_0000 # uint -# Base physical address of the kernel image. -kernel-base-paddr = 0x8020_0000 # uint -# Base virtual address of the kernel image. -kernel-base-vaddr = "0xffff_ffc0_8020_0000" # uint -# Linear mapping offset, for quick conversions between physical and virtual -# addresses. -phys-virt-offset = "0xffff_ffc0_0000_0000" # uint -# Offset of bus address and phys address. some boards, the bus address is -# different from the physical address. -phys-bus-offset = 0 # uint -# Kernel address space base. -kernel-aspace-base = "0xffff_ffc0_0000_0000" # uint -# Kernel address space size. -kernel-aspace-size = "0x0000_003f_ffff_f000" # uint - -# -# Device specifications -# -[devices] -# MMIO regions with format (`base_paddr`, `size`). -mmio-regions = [ - [0x0010_1000, 0x1000], # RTC - [0x0c00_0000, 0x21_0000], # PLIC - [0x1000_0000, 0x1000], # UART - [0x1000_1000, 0x8000], # VirtIO - [0x3000_0000, 0x1000_0000], # PCI config space - [0x4000_0000, 0x4000_0000], # PCI memory ranges (ranges 1: 32-bit MMIO space) -] # [(uint, uint)] -# VirtIO MMIO regions with format (`base_paddr`, `size`). -virtio-mmio-regions = [ - [0x1000_1000, 0x1000], - [0x1000_2000, 0x1000], - [0x1000_3000, 0x1000], - [0x1000_4000, 0x1000], - [0x1000_5000, 0x1000], - [0x1000_6000, 0x1000], - [0x1000_7000, 0x1000], - [0x1000_8000, 0x1000], -] # [(uint, uint)] -# Base physical address of the PCIe ECAM space. -pci-ecam-base = 0x3000_0000 # uint -# End PCI bus number (`bus-range` property in device tree). -pci-bus-end = 0xff # uint -# PCI device memory ranges (`ranges` property in device tree). -pci-ranges = [ - [0x0300_0000, 0x1_0000], # PIO space - [0x4000_0000, 0x4000_0000], # 32-bit MMIO space - [0x4_0000_0000, 0x4_0000_0000], # 64-bit MMIO space -] # [(uint, uint)] - -# Timer interrupt frequency in Hz. -timer-frequency = 10_000_000 # uint - -# rtc@101000 { -# interrupts = <0x0b>; -# interrupt-parent = <0x03>; -# reg = <0x00 0x101000 0x00 0x1000>; -# compatible = "google,goldfish-rtc"; -# }; -# RTC (goldfish) Address -rtc-paddr = 0x10_1000 # uint diff --git a/configs/platforms/x86_64-qemu-q35.toml b/configs/platforms/x86_64-qemu-q35.toml deleted file mode 100644 index b47b9d1e..00000000 --- a/configs/platforms/x86_64-qemu-q35.toml +++ /dev/null @@ -1,57 +0,0 @@ -# Architecture identifier. -arch = "x86_64" # str -# Platform identifier. -platform = "x86_64-qemu-q35" # str - -# -# Platform configs -# -[plat] -# Platform family. -family = "x86-pc" # str - -# Base address of the whole physical memory. -phys-memory-base = 0 # uint -# Size of the whole physical memory. (128M) -phys-memory-size = 0x800_0000 # uint -# Base physical address of the kernel image. -kernel-base-paddr = 0x20_0000 # uint -# Base virtual address of the kernel image. -kernel-base-vaddr = "0xffff_8000_0020_0000" # uint -# Linear mapping offset, for quick conversions between physical and virtual -# addresses. -phys-virt-offset = "0xffff_8000_0000_0000" # uint -# Offset of bus address and phys address. some boards, the bus address is -# different from the physical address. -phys-bus-offset = 0 # uint -# Kernel address space base. -kernel-aspace-base = "0xffff_8000_0000_0000" # uint -# Kernel address space size. -kernel-aspace-size = "0x0000_7fff_ffff_f000" # uint - -# -# Device specifications -# -[devices] -# MMIO regions with format (`base_paddr`, `size`). -mmio-regions = [ - [0xb000_0000, 0x1000_0000], # PCI config space - [0xfe00_0000, 0xc0_0000], # PCI devices - [0x7000000000, 0x4000], # PCI devices - [0xfec0_0000, 0x1000], # IO APIC - [0xfed0_0000, 0x1000], # HPET - [0xfee0_0000, 0x1000], # Local APIC - [0x380000000000, 0x4000] # PCI devices -] # [(uint, uint)] - -# VirtIO MMIO regions with format (`base_paddr`, `size`). -virtio-mmio-regions = [] # [(uint, uint)] -# Base physical address of the PCIe ECAM space (should read from ACPI 'MCFG' table). -pci-ecam-base = 0xb000_0000 # uint -# End PCI bus number. -pci-bus-end = 0xff # uint -# PCI device memory ranges (not used on x86). -pci-ranges = [] # [(uint, uint)] - -# Timer interrupt frequencyin Hz. (4.0GHz) -timer-frequency = 4_000_000_000 # uint From 64467918df1262959a7d47b3bfe5e746567f439d Mon Sep 17 00:00:00 2001 From: ZCShou <72115@163.com> Date: Tue, 30 Sep 2025 01:01:28 +0000 Subject: [PATCH 2/4] clean guest config due to no adaptation --- configs/vms_bkp/aarch64-qemu-gicv3.dts | 397 - configs/vms_bkp/aio-rk3588-jd4-vm1.dts | 12818 --------------- configs/vms_bkp/aio-rk3588-jd4-vm2.dts | 656 - configs/vms_bkp/aio-rk3588-jd4.dts | 12893 --------------- configs/vms_bkp/arceos-aarch64-e2000_smp1.dts | 155 - .../vms_bkp/arceos-aarch64-e2000_smp1.toml | 71 - configs/vms_bkp/arceos-aarch64-e2000_smp2.dts | 155 - .../vms_bkp/arceos-aarch64-e2000_smp2.toml | 71 - .../vms_bkp/arceos-aarch64-rk3568-smp1.toml | 73 - .../vms_bkp/arceos-aarch64-rk3568-smp2.toml | 73 - .../vms_bkp/arceos-aarch64-rk3568_smp1.dts | 87 - .../vms_bkp/arceos-aarch64-rk3568_smp2.dts | 101 - configs/vms_bkp/arceos-aarch64-smp.toml | 55 - configs/vms_bkp/arceos-aarch64.toml | 59 - configs/vms_bkp/arceos-riscv64-smp.toml | 59 - configs/vms_bkp/arceos-riscv64.toml | 59 - .../vms_bkp/arceos-rk3588-aarch64-vm2.toml | 49 - configs/vms_bkp/arceos-x86_64.toml | 78 - configs/vms_bkp/hvconfig-nimbos-aarch64.toml | 4 - configs/vms_bkp/linux-a1000-aarch64-smp8.toml | 58 - configs/vms_bkp/linux-aarch64-e2000_smp1.dts | 1302 -- configs/vms_bkp/linux-aarch64-e2000_smp1.toml | 114 - configs/vms_bkp/linux-aarch64-e2000_smp2.dts | 1302 -- configs/vms_bkp/linux-aarch64-e2000_smp2.toml | 115 - configs/vms_bkp/linux-aarch64-rk3568_smp1.dts | 6108 ------- .../vms_bkp/linux-aarch64-rk3568_smp1.toml | 86 - configs/vms_bkp/linux-aarch64-rk3568_smp2.dts | 6108 ------- .../vms_bkp/linux-aarch64-rk3568_smp2.toml | 86 - .../vms_bkp/linux-qemu-aarch64-gicv3-a.toml | 82 - .../vms_bkp/linux-qemu-aarch64-gicv3-b.toml | 83 - configs/vms_bkp/linux-qemu-aarch64-mem.toml | 70 - configs/vms_bkp/linux-qemu-aarch64-smp2.toml | 68 - configs/vms_bkp/linux-qemu-aarch64-vm2.toml | 68 - configs/vms_bkp/linux-qemu-aarch64.toml | 76 - configs/vms_bkp/linux-qemu-smp2.dts | 364 - configs/vms_bkp/linux-qemu.dts | 354 - configs/vms_bkp/linux-qemu_gicv3-b.dts | 414 - .../vms_bkp/linux-rk3588-aarch64-smp-vm1.toml | 75 - .../vms_bkp/linux-rk3588-aarch64-smp-vm2.toml | 74 - configs/vms_bkp/linux-rk3588-aarch64-smp.toml | 71 - configs/vms_bkp/linux-rk3588-aarch64.toml | 100 - configs/vms_bkp/qemu_gicv3.dts | 410 - configs/vms_bkp/rk3588jd4.dts | 13141 ---------------- configs/vms_bkp/starry-aarch64.toml | 62 - configs/vms_bkp/starry-riscv64.toml | 64 - configs/vms_bkp/starry-x86_64.toml | 62 - 46 files changed, 58830 deletions(-) delete mode 100644 configs/vms_bkp/aarch64-qemu-gicv3.dts delete mode 100644 configs/vms_bkp/aio-rk3588-jd4-vm1.dts delete mode 100644 configs/vms_bkp/aio-rk3588-jd4-vm2.dts delete mode 100644 configs/vms_bkp/aio-rk3588-jd4.dts delete mode 100644 configs/vms_bkp/arceos-aarch64-e2000_smp1.dts delete mode 100644 configs/vms_bkp/arceos-aarch64-e2000_smp1.toml delete mode 100644 configs/vms_bkp/arceos-aarch64-e2000_smp2.dts delete mode 100644 configs/vms_bkp/arceos-aarch64-e2000_smp2.toml delete mode 100644 configs/vms_bkp/arceos-aarch64-rk3568-smp1.toml delete mode 100644 configs/vms_bkp/arceos-aarch64-rk3568-smp2.toml delete mode 100644 configs/vms_bkp/arceos-aarch64-rk3568_smp1.dts delete mode 100644 configs/vms_bkp/arceos-aarch64-rk3568_smp2.dts delete mode 100644 configs/vms_bkp/arceos-aarch64-smp.toml delete mode 100644 configs/vms_bkp/arceos-aarch64.toml delete mode 100644 configs/vms_bkp/arceos-riscv64-smp.toml delete mode 100644 configs/vms_bkp/arceos-riscv64.toml delete mode 100644 configs/vms_bkp/arceos-rk3588-aarch64-vm2.toml delete mode 100644 configs/vms_bkp/arceos-x86_64.toml delete mode 100644 configs/vms_bkp/hvconfig-nimbos-aarch64.toml delete mode 100644 configs/vms_bkp/linux-a1000-aarch64-smp8.toml delete mode 100644 configs/vms_bkp/linux-aarch64-e2000_smp1.dts delete mode 100644 configs/vms_bkp/linux-aarch64-e2000_smp1.toml delete mode 100644 configs/vms_bkp/linux-aarch64-e2000_smp2.dts delete mode 100644 configs/vms_bkp/linux-aarch64-e2000_smp2.toml delete mode 100644 configs/vms_bkp/linux-aarch64-rk3568_smp1.dts delete mode 100644 configs/vms_bkp/linux-aarch64-rk3568_smp1.toml delete mode 100644 configs/vms_bkp/linux-aarch64-rk3568_smp2.dts delete mode 100644 configs/vms_bkp/linux-aarch64-rk3568_smp2.toml delete mode 100644 configs/vms_bkp/linux-qemu-aarch64-gicv3-a.toml delete mode 100644 configs/vms_bkp/linux-qemu-aarch64-gicv3-b.toml delete mode 100644 configs/vms_bkp/linux-qemu-aarch64-mem.toml delete mode 100644 configs/vms_bkp/linux-qemu-aarch64-smp2.toml delete mode 100644 configs/vms_bkp/linux-qemu-aarch64-vm2.toml delete mode 100644 configs/vms_bkp/linux-qemu-aarch64.toml delete mode 100644 configs/vms_bkp/linux-qemu-smp2.dts delete mode 100644 configs/vms_bkp/linux-qemu.dts delete mode 100644 configs/vms_bkp/linux-qemu_gicv3-b.dts delete mode 100644 configs/vms_bkp/linux-rk3588-aarch64-smp-vm1.toml delete mode 100644 configs/vms_bkp/linux-rk3588-aarch64-smp-vm2.toml delete mode 100644 configs/vms_bkp/linux-rk3588-aarch64-smp.toml delete mode 100644 configs/vms_bkp/linux-rk3588-aarch64.toml delete mode 100644 configs/vms_bkp/qemu_gicv3.dts delete mode 100644 configs/vms_bkp/rk3588jd4.dts delete mode 100644 configs/vms_bkp/starry-aarch64.toml delete mode 100644 configs/vms_bkp/starry-riscv64.toml delete mode 100644 configs/vms_bkp/starry-x86_64.toml diff --git a/configs/vms_bkp/aarch64-qemu-gicv3.dts b/configs/vms_bkp/aarch64-qemu-gicv3.dts deleted file mode 100644 index a37731fb..00000000 --- a/configs/vms_bkp/aarch64-qemu-gicv3.dts +++ /dev/null @@ -1,397 +0,0 @@ -/dts-v1/; - -/ { - interrupt-parent = <0x8002>; - dma-coherent; - model = "linux,dummy-virt"; - #size-cells = <0x02>; - #address-cells = <0x02>; - compatible = "linux,dummy-virt"; - - psci { - migrate = <0xc4000005>; - cpu_on = <0xc4000003>; - cpu_off = <0x84000002>; - cpu_suspend = <0xc4000001>; - method = "smc"; - compatible = "arm,psci-1.0\0arm,psci-0.2\0arm,psci"; - }; - - memory@80000000 { - reg = <0x00 0x80000000 0x00 0x40000000>; - device_type = "memory"; - }; - - platform-bus@c000000 { - interrupt-parent = <0x8002>; - ranges = <0x00 0x00 0xc000000 0x2000000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "qemu,platform\0simple-bus"; - }; - - fw-cfg@9020000 { - dma-coherent; - reg = <0x00 0x9020000 0x00 0x18>; - compatible = "qemu,fw-cfg-mmio"; - }; - - virtio_mmio@a000000 { - dma-coherent; - interrupts = <0x00 0x10 0x01>; - reg = <0x00 0xa000000 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000200 { - dma-coherent; - interrupts = <0x00 0x11 0x01>; - reg = <0x00 0xa000200 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000400 { - dma-coherent; - interrupts = <0x00 0x12 0x01>; - reg = <0x00 0xa000400 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000600 { - dma-coherent; - interrupts = <0x00 0x13 0x01>; - reg = <0x00 0xa000600 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000800 { - dma-coherent; - interrupts = <0x00 0x14 0x01>; - reg = <0x00 0xa000800 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000a00 { - dma-coherent; - interrupts = <0x00 0x15 0x01>; - reg = <0x00 0xa000a00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000c00 { - dma-coherent; - interrupts = <0x00 0x16 0x01>; - reg = <0x00 0xa000c00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000e00 { - dma-coherent; - interrupts = <0x00 0x17 0x01>; - reg = <0x00 0xa000e00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001000 { - dma-coherent; - interrupts = <0x00 0x18 0x01>; - reg = <0x00 0xa001000 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001200 { - dma-coherent; - interrupts = <0x00 0x19 0x01>; - reg = <0x00 0xa001200 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001400 { - dma-coherent; - interrupts = <0x00 0x1a 0x01>; - reg = <0x00 0xa001400 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001600 { - dma-coherent; - interrupts = <0x00 0x1b 0x01>; - reg = <0x00 0xa001600 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001800 { - dma-coherent; - interrupts = <0x00 0x1c 0x01>; - reg = <0x00 0xa001800 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001a00 { - dma-coherent; - interrupts = <0x00 0x1d 0x01>; - reg = <0x00 0xa001a00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001c00 { - dma-coherent; - interrupts = <0x00 0x1e 0x01>; - reg = <0x00 0xa001c00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001e00 { - dma-coherent; - interrupts = <0x00 0x1f 0x01>; - reg = <0x00 0xa001e00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002000 { - dma-coherent; - interrupts = <0x00 0x20 0x01>; - reg = <0x00 0xa002000 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002200 { - dma-coherent; - interrupts = <0x00 0x21 0x01>; - reg = <0x00 0xa002200 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002400 { - dma-coherent; - interrupts = <0x00 0x22 0x01>; - reg = <0x00 0xa002400 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002600 { - dma-coherent; - interrupts = <0x00 0x23 0x01>; - reg = <0x00 0xa002600 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002800 { - dma-coherent; - interrupts = <0x00 0x24 0x01>; - reg = <0x00 0xa002800 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002a00 { - dma-coherent; - interrupts = <0x00 0x25 0x01>; - reg = <0x00 0xa002a00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002c00 { - dma-coherent; - interrupts = <0x00 0x26 0x01>; - reg = <0x00 0xa002c00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002e00 { - dma-coherent; - interrupts = <0x00 0x27 0x01>; - reg = <0x00 0xa002e00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003000 { - dma-coherent; - interrupts = <0x00 0x28 0x01>; - reg = <0x00 0xa003000 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003200 { - dma-coherent; - interrupts = <0x00 0x29 0x01>; - reg = <0x00 0xa003200 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003400 { - dma-coherent; - interrupts = <0x00 0x2a 0x01>; - reg = <0x00 0xa003400 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003600 { - dma-coherent; - interrupts = <0x00 0x2b 0x01>; - reg = <0x00 0xa003600 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003800 { - dma-coherent; - interrupts = <0x00 0x2c 0x01>; - reg = <0x00 0xa003800 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003a00 { - dma-coherent; - interrupts = <0x00 0x2d 0x01>; - reg = <0x00 0xa003a00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003c00 { - dma-coherent; - interrupts = <0x00 0x2e 0x01>; - reg = <0x00 0xa003c00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003e00 { - dma-coherent; - interrupts = <0x00 0x2f 0x01>; - reg = <0x00 0xa003e00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - gpio-keys { - compatible = "gpio-keys"; - - poweroff { - gpios = <0x8004 0x03 0x00>; - linux,code = <0x74>; - label = "GPIO Key Poweroff"; - }; - }; - - pl061@9030000 { - phandle = <0x8004>; - clock-names = "apb_pclk"; - clocks = <0x8000>; - interrupts = <0x00 0x07 0x04>; - gpio-controller; - #gpio-cells = <0x02>; - compatible = "arm,pl061\0arm,primecell"; - reg = <0x00 0x9030000 0x00 0x1000>; - }; - - // pcie@10000000 { - // interrupt-map-mask = <0x1800 0x00 0x00 0x07>; - // interrupt-map = <0x00 0x00 0x00 0x01 0x8002 0x00 0x00 0x00 0x03 0x04 0x00 0x00 0x00 0x02 0x8002 0x00 0x00 0x00 0x04 0x04 0x00 0x00 0x00 0x03 0x8002 0x00 0x00 0x00 0x05 0x04 0x00 0x00 0x00 0x04 0x8002 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x01 0x8002 0x00 0x00 0x00 0x04 0x04 0x800 0x00 0x00 0x02 0x8002 0x00 0x00 0x00 0x05 0x04 0x800 0x00 0x00 0x03 0x8002 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x04 0x8002 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x01 0x8002 0x00 0x00 0x00 0x05 0x04 0x1000 0x00 0x00 0x02 0x8002 0x00 0x00 0x00 0x06 0x04 0x1000 0x00 0x00 0x03 0x8002 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x04 0x8002 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x01 0x8002 0x00 0x00 0x00 0x06 0x04 0x1800 0x00 0x00 0x02 0x8002 0x00 0x00 0x00 0x03 0x04 0x1800 0x00 0x00 0x03 0x8002 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x04 0x8002 0x00 0x00 0x00 0x05 0x04>; - // #interrupt-cells = <0x01>; - // ranges = <0x1000000 0x00 0x00 0x00 0x3eff0000 0x00 0x10000 0x2000000 0x00 0x10000000 0x00 0x10000000 0x00 0x2eff0000 0x3000000 0x80 0x00 0x80 0x00 0x80 0x00>; - // reg = <0x40 0x10000000 0x00 0x10000000>; - // msi-map = <0x00 0x8003 0x00 0x10000>; - // dma-coherent; - // bus-range = <0x00 0xff>; - // linux,pci-domain = <0x00>; - // #size-cells = <0x02>; - // #address-cells = <0x03>; - // device_type = "pci"; - // compatible = "pci-host-ecam-generic"; - // }; - - pl031@9010000 { - clock-names = "apb_pclk"; - clocks = <0x8000>; - interrupts = <0x00 0x02 0x04>; - reg = <0x00 0x9010000 0x00 0x1000>; - compatible = "arm,pl031\0arm,primecell"; - }; - - pl011@9000000 { - clock-names = "uartclk\0apb_pclk"; - clocks = <0x8000 0x8000>; - interrupts = <0x00 0x01 0x04>; - reg = <0x00 0x9000000 0x00 0x1000>; - compatible = "arm,pl011\0arm,primecell"; - }; - - pmu { - interrupts = <0x01 0x07 0x04>; - compatible = "arm,armv8-pmuv3"; - }; - - intc@8000000 { - phandle = <0x8002>; - interrupts = <0x01 0x09 0x04>; - reg = <0x00 0x8000000 0x00 0x10000 0x00 0x80a0000 0x00 0xf60000>; - #redistributor-regions = <0x01>; - compatible = "arm,gic-v3"; - ranges; - #size-cells = <0x02>; - #address-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x03>; - - its@8080000 { - phandle = <0x8003>; - reg = <0x00 0x8080000 0x00 0x20000>; - #msi-cells = <0x01>; - msi-controller; - compatible = "arm,gic-v3-its"; - }; - }; - - flash@0 { - bank-width = <0x04>; - reg = <0x00 0x00 0x00 0x4000000 0x00 0x4000000 0x00 0x4000000>; - compatible = "cfi-flash"; - }; - - cpus { - #size-cells = <0x00>; - #address-cells = <0x01>; - - cpu-map { - - socket0 { - - cluster0 { - - core0 { - cpu = <0x8001>; - }; - }; - }; - }; - - cpu@0 { - phandle = <0x8001>; - reg = <0x00>; - compatible = "arm,cortex-a72"; - device_type = "cpu"; - }; - }; - - timer { - interrupts = <0x01 0x0d 0x04 0x01 0x0e 0x04 0x01 0x0b 0x04 0x01 0x0a 0x04>; - always-on; - compatible = "arm,armv8-timer\0arm,armv7-timer"; - }; - - apb-pclk { - phandle = <0x8000>; - clock-output-names = "clk24mhz"; - clock-frequency = <0x16e3600>; - #clock-cells = <0x00>; - compatible = "fixed-clock"; - }; - - aliases { - serial0 = "/pl011@9000000"; - }; - - chosen { - bootargs = "root=/dev/vda rw init=/init"; - stdout-path = "/pl011@9000000"; - rng-seed = <0xc63e7c7f 0x25869631 0xfa243fbb 0xe48363de 0xfd9dc3ce 0x5127dfe3 0x88de6403 0xb04a0eef>; - kaslr-seed = <0xdcf4331d 0x73a35db>; - }; -}; diff --git a/configs/vms_bkp/aio-rk3588-jd4-vm1.dts b/configs/vms_bkp/aio-rk3588-jd4-vm1.dts deleted file mode 100644 index a588f4bb..00000000 --- a/configs/vms_bkp/aio-rk3588-jd4-vm1.dts +++ /dev/null @@ -1,12818 +0,0 @@ -/dts-v1/; - -/ { - #address-cells = <0x02>; - model = "Firefly AIO-3588JD4"; - serial-number = "a0deeea630de3975"; - #size-cells = <0x02>; - interrupt-parent = <0x01>; - compatible = "rockchip,aio-3588jd4\0rockchip,rk3588"; - - pcie30-avdd1v8 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "pcie30_avdd1v8"; - compatible = "regulator-fixed"; - phandle = <0x4a6>; - vin-supply = <0x1de>; - }; - - syscon@fd5bc000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfd5bc000 0x00 0x100>; - phandle = <0x194>; - }; - - vcc5v0-host3 { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - gpio = <0x182 0x07 0x00>; - regulator-always-on; - enable-active-high; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_host3"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x4a2>; - vin-supply = <0x1dd>; - }; - - pwm@febd0030 { - pinctrl-names = "active"; - pinctrl-0 = <0x16c>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15a 0x04 0x00 0x15b 0x04>; - clocks = <0x02 0x54 0x02 0x53>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebd0030 0x00 0x10>; - phandle = <0x2d4>; - }; - - rkisp@fdcc0000 { - power-domains = <0x60 0x1c>; - iommus = <0xd1>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; - interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; - clocks = <0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; - compatible = "rockchip,rk3588-rkisp"; - status = "disabled"; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - reg = <0x00 0xfdcc0000 0x00 0x7f00>; - phandle = <0x5a>; - }; - - qos@fdf66600 { - compatible = "syscon"; - reg = <0x00 0xfdf66600 0x00 0x20>; - phandle = <0x96>; - }; - - serial@febb0000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x167>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x153 0x04>; - clocks = <0x02 0xd3 0x02 0xb2>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfebb0000 0x00 0x100>; - phandle = <0x2d0>; - dmas = <0xf2 0x09 0xf2 0x0a>; - reg-shift = <0x02>; - }; - - qos@fdf41000 { - compatible = "syscon"; - reg = <0x00 0xfdf41000 0x00 0x20>; - phandle = <0xa6>; - }; - - csi2-dcphy1 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x20e>; - }; - - rkispp0-vir0 { - rockchip,hw = <0x5b>; - compatible = "rockchip,rk3588-rkispp-vir"; - status = "disabled"; - phandle = <0x243>; - }; - - wireless-bluetooth { - pinctrl-names = "default\0rts_gpio"; - pinctrl-0 = <0x1e5 0x1e6 0x1e7 0x1e8>; - clock-names = "ext_clock"; - BT,power_gpio = <0x7b 0x16 0x00>; - clocks = <0x1e4>; - BT,wake_gpio = <0x7b 0x15 0x00>; - uart_rts_gpios = <0xfe 0x02 0x01>; - compatible = "bluetooth-platdata"; - BT,wake_host_irq = <0x7b 0x00 0x00>; - pinctrl-1 = <0x1e9>; - status = "disabled"; - phandle = <0x4aa>; - }; - - pwm@febd0020 { - pinctrl-names = "active"; - pinctrl-0 = <0x16b>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15a 0x04>; - clocks = <0x02 0x54 0x02 0x53>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebd0020 0x00 0x10>; - phandle = <0x2d3>; - }; - - qos@fdf39000 { - compatible = "syscon"; - reg = <0x00 0xfdf39000 0x00 0x20>; - phandle = <0xaf>; - }; - - cam0-cam1-switch { - regulator-max-microvolt = <0x1b7740>; - pinctrl-names = "default"; - regulator-boot-on; - gpio = <0x181 0x11 0x00>; - pinctrl-0 = <0x1f0>; - regulator-always-on; - enable-active-high; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "cam0_cam1_switch"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4b2>; - }; - - qos@fdf3e400 { - compatible = "syscon"; - reg = <0x00 0xfdf3e400 0x00 0x20>; - phandle = <0xad>; - }; - - mipi2-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "okay"; - firefly-compatible; - phandle = <0x226>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@0 { - remote-endpoint = <0x4d>; - reg = <0x00>; - phandle = <0x33>; - }; - }; - - port@1 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x01>; - - endpoint@0 { - remote-endpoint = <0x4e>; - reg = <0x00>; - phandle = <0x54>; - }; - }; - }; - }; - - iommu@fdc48700 { - power-domains = <0x60 0x0f>; - rockchip,shootdown-entire; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x62 0x04>; - clocks = <0x02 0x195 0x02 0x194>; - rockchip,enable-cmd-retry; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "irq_rkvdec1_mmu"; - reg = <0x00 0xfdc48700 0x00 0x40 0x00 0xfdc48740 0x00 0x40>; - phandle = <0xcc>; - rockchip,master-handle-irq; - }; - - clocks { - #address-cells = <0x02>; - #size-cells = <0x02>; - compatible = "simple-bus"; - ranges; - - hclk_nvm@fd7c087c { - clock-names = "link"; - clocks = <0x02 0x141>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c087c 0x00 0x10>; - phandle = <0x03>; - }; - - mclkin-i2s0 { - clock-output-names = "i2s0_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x204>; - }; - - hclk_rkvenc1_pre@fd7c08c0 { - clock-names = "link"; - clocks = <0x02 0x1c4>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08c0 0x00 0x10>; - phandle = <0x1fe>; - }; - - mclkout-i2s1@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s1_mclkout_to_io"; - clocks = <0x02 0x291>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x208>; - rockchip,bit-shift = <0x01>; - }; - - mclkout-i2s1@fd58a000 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s1m1_mclkout_to_io"; - clocks = <0x02 0x291>; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58a000 0x00 0x04>; - phandle = <0x209>; - rockchip,bit-shift = <0x06>; - }; - - aclk_hdcp0_pre@fd7c08dc { - clock-names = "link"; - clocks = <0x02 0x26c>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08dc 0x00 0x10>; - phandle = <0x1ff>; - }; - - xin32k { - clock-output-names = "xin32k"; - #clock-cells = <0x00>; - clock-frequency = <0x8000>; - compatible = "fixed-clock"; - phandle = <0x1f2>; - }; - - aclk_usb@fd7c08a8 { - clock-names = "link"; - clocks = <0x02 0x263>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a8 0x00 0x10>; - phandle = <0x6a>; - }; - - hclk_usb@fd7c08a8 { - clock-names = "link"; - clocks = <0x02 0x264>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a8 0x00 0x10>; - phandle = <0x1f5>; - }; - - hclk_vo0@fd7c08dc { - clock-names = "link"; - clocks = <0x02 0x26d>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08dc 0x00 0x10>; - phandle = <0x04>; - }; - - pclk_av1_pre@fd7c0910 { - clock-names = "link"; - clocks = <0x02 0x1be>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0910 0x00 0x10>; - phandle = <0x201>; - }; - - mclkout-i2s2@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s2_mclkout_to_io"; - clocks = <0x02 0x28>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x20a>; - rockchip,bit-shift = <0x02>; - }; - - aclk_vdpu_low_pre@fd7c08b0 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08b0 0x00 0x10>; - phandle = <0x1f4>; - }; - - mclkin-i2s3 { - clock-output-names = "i2s3_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x207>; - }; - - spll { - clock-output-names = "spll"; - #clock-cells = <0x00>; - clock-frequency = <0x29d7ab80>; - compatible = "fixed-clock"; - phandle = <0x1f1>; - }; - - xin24m { - clock-output-names = "xin24m"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - compatible = "fixed-clock"; - phandle = <0x1f3>; - }; - - aclk_av1_pre@fd7c0910 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0910 0x00 0x10>; - phandle = <0x202>; - }; - - pclk_vo0_grf@fd7c08dc { - clock-names = "link"; - clocks = <0x04>; - #clock-cells = <0x00>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08dc 0x00 0x04>; - phandle = <0x72>; - }; - - aclk_jpeg_decoder_pre@fd7c08b0 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08b0 0x00 0x10>; - phandle = <0x1fc>; - }; - - aclk_hdcp1_pre@fd7c08ec { - clock-names = "link"; - clocks = <0x02 0x263>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08ec 0x00 0x10>; - phandle = <0x200>; - }; - - mclkin-i2s1 { - clock-output-names = "i2s1_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x205>; - }; - - hclk_vo1@fd7c08ec { - clock-names = "link"; - clocks = <0x02 0x264>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08ec 0x00 0x10>; - phandle = <0x05>; - }; - - mclkout-i2s3@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s3_mclkout_to_io"; - clocks = <0x02 0x2e>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x20b>; - rockchip,bit-shift = <0x07>; - }; - - aclk_rkvdec0_pre@fd7c08a0 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a0 0x00 0x10>; - phandle = <0x1f8>; - }; - - aclk_isp1_pre@fd7c0868 { - clock-names = "link"; - clocks = <0x02 0x1e0>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0868 0x00 0x10>; - phandle = <0x1f7>; - }; - - pclk_vo1_grf@fd7c08ec { - clock-names = "link"; - clocks = <0x05>; - #clock-cells = <0x00>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08ec 0x00 0x04>; - phandle = <0x73>; - }; - - aclk_rkvdec1_pre@fd7c08a4 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a4 0x00 0x10>; - phandle = <0x1fa>; - }; - - hclk_rkvdec0_pre@fd7c08a0 { - clock-names = "link"; - clocks = <0x02 0x1be>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a0 0x00 0x10>; - phandle = <0x1f9>; - }; - - hclk_sdio_pre@fd7c092c { - clock-names = "link"; - clocks = <0x03>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c092c 0x00 0x10>; - phandle = <0x203>; - }; - - hclk_rkvdec1_pre@fd7c08a4 { - clock-names = "link"; - clocks = <0x02 0x1be>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a4 0x00 0x10>; - phandle = <0x1fb>; - }; - - hclk_isp1_pre@fd7c0868 { - clock-names = "link"; - clocks = <0x02 0x1e1>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0868 0x00 0x10>; - phandle = <0x1f6>; - }; - - mclkout-i2s0@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s0_mclkout_to_io"; - clocks = <0x02 0x39>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x179>; - rockchip,bit-shift = <0x00>; - }; - - mclkin-i2s2 { - clock-output-names = "i2s2_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x206>; - }; - - aclk_rkvenc1_pre@fd7c08c0 { - clock-names = "link"; - clocks = <0x02 0x1c5>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08c0 0x00 0x10>; - phandle = <0x1fd>; - }; - }; - - clock-controller@fd7c0000 { - #reset-cells = <0x01>; - assigned-clocks = <0x02 0x09 0x02 0x05 0x02 0x08 0x02 0x07 0x02 0xd8 0x02 0xda 0x02 0xd9 0x02 0x10e 0x02 0x10f 0x02 0x110 0x02 0x299 0x02 0x29a 0x02 0x7b 0x02 0xec 0x02 0x114 0x02 0x208 0x02 0x20e 0x02 0x21f 0x02 0x77>; - assigned-clock-rates = <0x4190ab00 0x2ee00000 0x32a9f880 0x46cf7100 0x29d7ab80 0x17d78400 0x1dcd6500 0x2cb41780 0x5f5e100 0x17d78400 0x5f5e100 0xbebc200 0x165a0bc0 0x8f0d180 0xbebc200 0xb71b00 0xb71b00 0x5e69ec0 0x1312d00>; - #clock-cells = <0x01>; - compatible = "rockchip,rk3588-cru"; - rockchip,grf = <0x76>; - reg = <0x00 0xfd7c0000 0x00 0x5c000>; - phandle = <0x02>; - }; - - qos@fdf81000 { - compatible = "syscon"; - reg = <0x00 0xfdf81000 0x00 0x20>; - phandle = <0xa0>; - }; - - qos@fdf36000 { - compatible = "syscon"; - reg = <0x00 0xfdf36000 0x00 0x20>; - phandle = <0xaa>; - }; - - i2s@fe4a0000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x132 0x133>; - pinctrl-0 = <0x12f 0x130>; - clock-names = "i2s_clk\0i2s_hclk"; - assigned-clocks = <0x02 0x2a>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xb7 0x04>; - clocks = <0x02 0x2d 0x02 0x23>; - dma-names = "tx\0rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; - pinctrl-1 = <0x131>; - status = "disabled"; - reg = <0x00 0xfe4a0000 0x00 0x1000>; - phandle = <0x299>; - dmas = <0xf1 0x02 0xf1 0x03>; - rockchip,clk-trcm = <0x01>; - }; - - syscon@fd5c4000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfd5c4000 0x00 0x100>; - phandle = <0x195>; - }; - - sram@ff001000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "mmio-sram"; - ranges = <0x00 0x00 0xff001000 0xef000>; - reg = <0x00 0xff001000 0x00 0xef000>; - phandle = <0x2eb>; - - rkvdec-sram@0 { - reg = <0x00 0x78000>; - phandle = <0xcb>; - }; - - rkvdec-sram@78000 { - reg = <0x78000 0x77000>; - phandle = <0xcd>; - }; - }; - - pwm@febd0010 { - pinctrl-names = "active"; - pinctrl-0 = <0x16a>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15a 0x04>; - clocks = <0x02 0x54 0x02 0x53>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "okay"; - reg = <0x00 0xfebd0010 0x00 0x10>; - phandle = <0x1ed>; - }; - - rkisp1-vir3 { - rockchip,hw = <0x5a>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x242>; - }; - - pcie-clk2 { - regulator-boot-on; - regulator-always-on; - regulator-name = "pcie_clk2"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x495>; - gpios = <0x181 0x16 0x01>; - }; - - serial@feb40000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x160>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14c 0x04>; - clocks = <0x02 0xb7 0x02 0xab>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "okay"; - reg = <0x00 0xfeb40000 0x00 0x100>; - phandle = <0x2c9>; - dmas = <0x7c 0x08 0x7c 0x09>; - reg-shift = <0x02>; - }; - - pinctrl { - #address-cells = <0x02>; - #size-cells = <0x02>; - compatible = "rockchip,rk3588-pinctrl"; - ranges; - rockchip,grf = <0x196>; - phandle = <0x197>; - - eth0 { - - eth0-pins { - rockchip,pins = <0x02 0x13 0x01 0x198>; - phandle = <0x46c>; - }; - }; - - i2c3 { - - i2c3m3-xfer { - rockchip,pins = <0x02 0x0a 0x09 0x19d 0x02 0x0b 0x09 0x19d>; - phandle = <0x361>; - }; - - i2c3m2-xfer { - rockchip,pins = <0x04 0x04 0x09 0x19d 0x04 0x05 0x09 0x19d>; - phandle = <0x14a>; - }; - - i2c3m1-xfer { - rockchip,pins = <0x03 0x0f 0x09 0x19d 0x03 0x10 0x09 0x19d>; - phandle = <0x35f>; - }; - - i2c3m0-xfer { - rockchip,pins = <0x01 0x11 0x09 0x19d 0x01 0x10 0x09 0x19d>; - phandle = <0x35e>; - }; - - i2c3m4-xfer { - rockchip,pins = <0x04 0x18 0x09 0x19d 0x04 0x19 0x09 0x19d>; - phandle = <0x360>; - }; - }; - - pwm9 { - - pwm9m2-pins { - rockchip,pins = <0x03 0x19 0x0b 0x198>; - phandle = <0x3d7>; - }; - - pwm9m1-pins { - rockchip,pins = <0x04 0x19 0x0b 0x198>; - phandle = <0x3d6>; - }; - - pwm9m0-pins { - rockchip,pins = <0x03 0x08 0x0b 0x198>; - phandle = <0x16e>; - }; - }; - - pcfg-pull-none-drv-level-7 { - drive-strength = <0x07>; - bias-disable; - phandle = <0x451>; - }; - - mipi { - - mipi-te1 { - rockchip,pins = <0x03 0x13 0x02 0x198>; - phandle = <0x39f>; - }; - - mipim1-camera2-clk { - rockchip,pins = <0x03 0x07 0x04 0x198>; - phandle = <0x39b>; - }; - - mipim0-camera0-clk { - rockchip,pins = <0x04 0x09 0x01 0x198>; - phandle = <0x395>; - }; - - mipim0-camera4-clk { - rockchip,pins = <0x01 0x1f 0x02 0x198>; - phandle = <0x399>; - }; - - mipim1-camera3-clk { - rockchip,pins = <0x03 0x08 0x04 0x198>; - phandle = <0x39c>; - }; - - mipim0-camera1-clk { - rockchip,pins = <0x01 0x0e 0x02 0x198>; - phandle = <0x396>; - }; - - mipim1-camera0-clk { - rockchip,pins = <0x03 0x05 0x04 0x198>; - phandle = <0x39a>; - }; - - mipim1-camera4-clk { - rockchip,pins = <0x03 0x09 0x04 0x198>; - phandle = <0x39d>; - }; - - mipim0-camera2-clk { - rockchip,pins = <0x01 0x0f 0x02 0x198>; - phandle = <0x397>; - }; - - mipi-te0 { - rockchip,pins = <0x03 0x12 0x02 0x198>; - phandle = <0x39e>; - }; - - mipim1-camera1-clk { - rockchip,pins = <0x03 0x06 0x04 0x198>; - phandle = <0x180>; - }; - - mipim0-camera3-clk { - rockchip,pins = <0x01 0x1e 0x02 0x198>; - phandle = <0x398>; - }; - }; - - pwm14 { - - pwm14m2-pins { - rockchip,pins = <0x01 0x1e 0x0b 0x198>; - phandle = <0x3e1>; - }; - - pwm14m1-pins { - rockchip,pins = <0x04 0x0a 0x0b 0x198>; - phandle = <0x3e0>; - }; - - pwm14m0-pins { - rockchip,pins = <0x03 0x12 0x0b 0x198>; - phandle = <0x173>; - }; - }; - - pcfg-pull-none-drv-level-4-smt { - drive-strength = <0x04>; - bias-disable; - input-schmitt-enable; - phandle = <0x303>; - }; - - headphone { - - hp-det { - rockchip,pins = <0x02 0x13 0x00 0x198>; - phandle = <0x1dc>; - }; - }; - - npu { - - npu-pins { - rockchip,pins = <0x00 0x16 0x02 0x198>; - phandle = <0x3a0>; - }; - }; - - wireless-bluetooth { - - bt-reset-gpio { - rockchip,pins = <0x00 0x16 0x00 0x198>; - phandle = <0x1e6>; - }; - - bt-irq-gpio { - rockchip,pins = <0x00 0x00 0x00 0x198>; - phandle = <0x1e8>; - }; - - bt-wake-gpio { - rockchip,pins = <0x00 0x15 0x00 0x198>; - phandle = <0x1e7>; - }; - - uart6-gpios { - rockchip,pins = <0x01 0x02 0x00 0x198>; - phandle = <0x1e9>; - }; - }; - - pcie30x1 { - - pcie30x1-1-button-rstn { - rockchip,pins = <0x04 0x0a 0x04 0x198>; - phandle = <0x3a9>; - }; - - pcie30x1m1-pins { - rockchip,pins = <0x04 0x03 0x04 0x198 0x04 0x05 0x04 0x198 0x04 0x04 0x04 0x198 0x04 0x00 0x04 0x198 0x04 0x02 0x04 0x198 0x04 0x01 0x04 0x198>; - phandle = <0x3a6>; - }; - - pcie30x1m0-pins { - rockchip,pins = <0x00 0x10 0x0c 0x198 0x00 0x15 0x0c 0x198 0x00 0x14 0x0c 0x198 0x00 0x0d 0x0c 0x198 0x00 0x0f 0x0c 0x198 0x00 0x0e 0x0c 0x198>; - phandle = <0x3a5>; - }; - - pcie30x1-0-button-rstn { - rockchip,pins = <0x04 0x09 0x04 0x198>; - phandle = <0x3a8>; - }; - - pcie30x1m2-pins { - rockchip,pins = <0x01 0x0d 0x04 0x198 0x01 0x0c 0x04 0x198 0x01 0x0b 0x04 0x198 0x01 0x00 0x04 0x198 0x01 0x07 0x04 0x198 0x01 0x01 0x04 0x198>; - phandle = <0x3a7>; - }; - }; - - uart8 { - - uart8m0-rtsn { - rockchip,pins = <0x04 0x0a 0x0a 0x198>; - phandle = <0x443>; - }; - - uart8m1-ctsn { - rockchip,pins = <0x03 0x05 0x0a 0x198>; - phandle = <0x444>; - }; - - uart8m0-ctsn { - rockchip,pins = <0x04 0x0b 0x0a 0x198>; - phandle = <0x442>; - }; - - uart8m1-xfer { - rockchip,pins = <0x03 0x03 0x0a 0x19e 0x03 0x02 0x0a 0x19e>; - phandle = <0x167>; - }; - - uart8m0-xfer { - rockchip,pins = <0x04 0x09 0x0a 0x19e 0x04 0x08 0x0a 0x19e>; - phandle = <0x441>; - }; - - uart8-xfer { - rockchip,pins = <0x04 0x09 0x0a 0x19e>; - phandle = <0x446>; - }; - - uart8m1-rtsn { - rockchip,pins = <0x03 0x04 0x0a 0x198>; - phandle = <0x445>; - }; - }; - - spi2 { - - spi2m0-cs1 { - rockchip,pins = <0x01 0x08 0x08 0x19a>; - phandle = <0x404>; - }; - - spi2m2-cs0 { - rockchip,pins = <0x00 0x09 0x01 0x19f>; - phandle = <0x154>; - }; - - spi2m1-cs1 { - rockchip,pins = <0x04 0x08 0x08 0x19a>; - phandle = <0x407>; - }; - - spi2m2-pins { - rockchip,pins = <0x00 0x05 0x01 0x19f 0x00 0x0b 0x01 0x19f 0x00 0x06 0x01 0x19f>; - phandle = <0x155>; - }; - - spi2m1-pins { - rockchip,pins = <0x04 0x06 0x08 0x19a 0x04 0x04 0x08 0x19a 0x04 0x05 0x08 0x19a>; - phandle = <0x405>; - }; - - spi2m2-cs1 { - rockchip,pins = <0x00 0x08 0x01 0x19f>; - phandle = <0x408>; - }; - - spi2m0-cs0 { - rockchip,pins = <0x01 0x07 0x08 0x19a>; - phandle = <0x403>; - }; - - spi2m0-pins { - rockchip,pins = <0x01 0x06 0x08 0x19a 0x01 0x04 0x08 0x19a 0x01 0x05 0x08 0x19a>; - phandle = <0x402>; - }; - - spi2m1-cs0 { - rockchip,pins = <0x04 0x07 0x08 0x19a>; - phandle = <0x406>; - }; - }; - - pcfg-pull-up-drv-level-15 { - drive-strength = <0x0f>; - phandle = <0x462>; - bias-pull-up; - }; - - pcfg-pull-down-drv-level-13 { - drive-strength = <0x0d>; - bias-pull-down; - phandle = <0x469>; - }; - - pcfg-pull-up-drv-level-2 { - drive-strength = <0x02>; - phandle = <0x199>; - bias-pull-up; - }; - - i2s1 { - - i2s1m0-sdo1 { - rockchip,pins = <0x04 0x0a 0x03 0x198>; - phandle = <0x127>; - }; - - i2s1m1-sdi1 { - rockchip,pins = <0x00 0x16 0x01 0x198>; - phandle = <0x380>; - }; - - i2s1m0-sdi3 { - rockchip,pins = <0x04 0x08 0x03 0x198>; - phandle = <0x125>; - }; - - i2s1m0-mclk { - rockchip,pins = <0x04 0x00 0x03 0x19d>; - phandle = <0x37b>; - }; - - i2s1m0-sdi1 { - rockchip,pins = <0x04 0x06 0x03 0x198>; - phandle = <0x123>; - }; - - i2s1m1-sdo2 { - rockchip,pins = <0x00 0x1c 0x01 0x198>; - phandle = <0x385>; - }; - - i2s1m1-sdo0 { - rockchip,pins = <0x00 0x19 0x01 0x198>; - phandle = <0x383>; - }; - - i2s1m0-sdo2 { - rockchip,pins = <0x04 0x0b 0x03 0x198>; - phandle = <0x128>; - }; - - i2s1m1-sdi2 { - rockchip,pins = <0x00 0x17 0x01 0x198>; - phandle = <0x381>; - }; - - i2s1m0-sdo0 { - rockchip,pins = <0x04 0x09 0x03 0x198>; - phandle = <0x126>; - }; - - i2s1m1-sdi0 { - rockchip,pins = <0x00 0x15 0x01 0x198>; - phandle = <0x37f>; - }; - - i2s1m0-sdi2 { - rockchip,pins = <0x04 0x07 0x03 0x198>; - phandle = <0x124>; - }; - - i2s1m1-sclk { - rockchip,pins = <0x00 0x0e 0x01 0x19d>; - phandle = <0x37e>; - }; - - i2s1m0-sdi0 { - rockchip,pins = <0x04 0x05 0x03 0x198>; - phandle = <0x122>; - }; - - i2s1m1-sdo3 { - rockchip,pins = <0x00 0x1d 0x01 0x198>; - phandle = <0x386>; - }; - - i2s1m1-lrck { - rockchip,pins = <0x00 0x0f 0x01 0x19d>; - phandle = <0x37c>; - }; - - i2s1m0-sclk { - rockchip,pins = <0x04 0x01 0x03 0x19d>; - phandle = <0x121>; - }; - - i2s1m1-sdo1 { - rockchip,pins = <0x00 0x1a 0x01 0x198>; - phandle = <0x384>; - }; - - i2s1m0-sdo3 { - rockchip,pins = <0x04 0x0c 0x03 0x198>; - phandle = <0x129>; - }; - - i2s1m1-sdi3 { - rockchip,pins = <0x00 0x18 0x01 0x198>; - phandle = <0x382>; - }; - - i2s1m0-lrck { - rockchip,pins = <0x04 0x02 0x03 0x19d>; - phandle = <0x120>; - }; - - i2s1m1-mclk { - rockchip,pins = <0x00 0x0d 0x01 0x19d>; - phandle = <0x37d>; - }; - }; - - ddrphych2 { - - ddrphych2-pins { - rockchip,pins = <0x04 0x08 0x07 0x198 0x04 0x09 0x07 0x198 0x04 0x0a 0x07 0x198 0x04 0x0b 0x07 0x198>; - phandle = <0x31a>; - }; - }; - - pcfg-pull-none-drv-level-12 { - drive-strength = <0x0c>; - bias-disable; - phandle = <0x456>; - }; - - i2c1 { - - i2c1m2-xfer { - rockchip,pins = <0x00 0x1c 0x09 0x19d 0x00 0x1d 0x09 0x19d>; - phandle = <0x148>; - }; - - i2c1m1-xfer { - rockchip,pins = <0x00 0x08 0x02 0x19d 0x00 0x09 0x02 0x19d>; - phandle = <0x357>; - }; - - i2c1m0-xfer { - rockchip,pins = <0x00 0x0d 0x09 0x19d 0x00 0x0e 0x09 0x19d>; - phandle = <0x356>; - }; - - i2c1m4-xfer { - rockchip,pins = <0x01 0x1a 0x09 0x19d 0x01 0x1b 0x09 0x19d>; - phandle = <0x359>; - }; - - i2c1m3-xfer { - rockchip,pins = <0x02 0x1c 0x09 0x19d 0x02 0x1d 0x09 0x19d>; - phandle = <0x358>; - }; - }; - - pwm7 { - - pwm7m3-pins { - rockchip,pins = <0x04 0x16 0x0b 0x198>; - phandle = <0x3d3>; - }; - - pwm7m2-pins { - rockchip,pins = <0x01 0x13 0x0b 0x198>; - phandle = <0x3d2>; - }; - - pwm7m1-pins { - rockchip,pins = <0x04 0x1c 0x0b 0x198>; - phandle = <0x3d1>; - }; - - pwm7m0-pins { - rockchip,pins = <0x00 0x18 0x0b 0x198>; - phandle = <0x16c>; - }; - }; - - pcfg-pull-none-drv-level-5 { - drive-strength = <0x05>; - bias-disable; - phandle = <0x2f1>; - }; - - gmac0 { - - gmac0-clkinout { - rockchip,pins = <0x04 0x13 0x01 0x198>; - phandle = <0x46d>; - }; - - gmac0-miim { - rockchip,pins = <0x04 0x14 0x01 0x198 0x04 0x15 0x01 0x198>; - phandle = <0x1c1>; - }; - - gmac0-tx-bus2 { - rockchip,pins = <0x02 0x0e 0x01 0x19a 0x02 0x0f 0x01 0x19a 0x02 0x10 0x01 0x198>; - phandle = <0x1c2>; - }; - - gmac0-rgmii-bus { - rockchip,pins = <0x02 0x06 0x01 0x198 0x02 0x07 0x01 0x198 0x02 0x09 0x01 0x19a 0x02 0x0a 0x01 0x19a>; - phandle = <0x1c5>; - }; - - gmac0-ppsclk { - rockchip,pins = <0x02 0x14 0x01 0x198>; - phandle = <0x46e>; - }; - - gmac0-txer { - rockchip,pins = <0x04 0x16 0x01 0x198>; - phandle = <0x471>; - }; - - gmac0-ptp-refclk { - rockchip,pins = <0x02 0x0c 0x01 0x198>; - phandle = <0x470>; - }; - - gmac0-rx-bus2 { - rockchip,pins = <0x02 0x11 0x01 0x198 0x02 0x12 0x01 0x198 0x04 0x12 0x01 0x198>; - phandle = <0x1c3>; - }; - - gmac0-rgmii-clk { - rockchip,pins = <0x02 0x08 0x01 0x198 0x02 0x0b 0x01 0x198>; - phandle = <0x1c4>; - }; - - gmac0-ppstring { - rockchip,pins = <0x02 0x0d 0x01 0x198>; - phandle = <0x46f>; - }; - }; - - pwm12 { - - pwm12m1-pins { - rockchip,pins = <0x04 0x0d 0x0b 0x198>; - phandle = <0x3dd>; - }; - - pwm12m0-pins { - rockchip,pins = <0x03 0x0d 0x0b 0x198>; - phandle = <0x171>; - }; - }; - - usb-typec { - - usbc0-int { - rockchip,pins = <0x00 0x1b 0x00 0x198>; - phandle = <0x17b>; - }; - - usb-5v-ctrl { - rockchip,pins = <0x01 0x03 0x00 0x198>; - phandle = <0x1ef>; - }; - }; - - uart6 { - - uart6m1-ctsn { - rockchip,pins = <0x01 0x03 0x0a 0x198>; - phandle = <0x436>; - }; - - uart6m2-xfer { - rockchip,pins = <0x01 0x19 0x0a 0x19e 0x01 0x18 0x0a 0x19e>; - phandle = <0x437>; - }; - - uart6m0-ctsn { - rockchip,pins = <0x02 0x09 0x0a 0x198>; - phandle = <0x439>; - }; - - uart6m1-xfer { - rockchip,pins = <0x01 0x00 0x0a 0x19e 0x01 0x01 0x0a 0x19e>; - phandle = <0x165>; - }; - - uart6m0-xfer { - rockchip,pins = <0x02 0x06 0x0a 0x19e 0x02 0x07 0x0a 0x19e>; - phandle = <0x438>; - }; - - uart6m1-rtsn { - rockchip,pins = <0x01 0x02 0x0a 0x198>; - phandle = <0x1e5>; - }; - - uart6m0-rtsn { - rockchip,pins = <0x02 0x08 0x0a 0x198>; - phandle = <0x43a>; - }; - }; - - pcfg-pull-down-drv-level-8 { - drive-strength = <0x08>; - bias-pull-down; - phandle = <0x464>; - }; - - gpu { - - gpu-pins { - rockchip,pins = <0x00 0x15 0x02 0x198>; - phandle = <0x333>; - }; - }; - - spi0 { - - spi0m2-cs1 { - rockchip,pins = <0x01 0x0d 0x08 0x19a>; - phandle = <0x3f8>; - }; - - spi0m0-cs0 { - rockchip,pins = <0x00 0x19 0x08 0x19a>; - phandle = <0x14e>; - }; - - spi0m3-pins { - rockchip,pins = <0x03 0x1b 0x08 0x19a 0x03 0x19 0x08 0x19a 0x03 0x1a 0x08 0x19a>; - phandle = <0x3f9>; - }; - - spi0m3-cs1 { - rockchip,pins = <0x03 0x1d 0x08 0x19a>; - phandle = <0x3fb>; - }; - - spi0m2-pins { - rockchip,pins = <0x01 0x0b 0x08 0x19a 0x01 0x09 0x08 0x19a 0x01 0x0a 0x08 0x19a>; - phandle = <0x3f6>; - }; - - spi0m1-cs0 { - rockchip,pins = <0x04 0x0a 0x08 0x19a>; - phandle = <0x3f4>; - }; - - spi0m1-pins { - rockchip,pins = <0x04 0x02 0x08 0x19a 0x04 0x00 0x08 0x19a 0x04 0x01 0x08 0x19a>; - phandle = <0x3f3>; - }; - - spi0m0-cs1 { - rockchip,pins = <0x00 0x0f 0x08 0x19a>; - phandle = <0x14f>; - }; - - spi0m2-cs0 { - rockchip,pins = <0x01 0x0c 0x08 0x19a>; - phandle = <0x3f7>; - }; - - spi0m0-pins { - rockchip,pins = <0x00 0x16 0x08 0x19a 0x00 0x17 0x08 0x19a 0x00 0x10 0x08 0x19a>; - phandle = <0x150>; - }; - - spi0m1-cs1 { - rockchip,pins = <0x04 0x09 0x08 0x19a>; - phandle = <0x3f5>; - }; - - spi0m3-cs0 { - rockchip,pins = <0x03 0x1c 0x08 0x19a>; - phandle = <0x3fa>; - }; - }; - - fspi { - - fspim0-cs1 { - rockchip,pins = <0x02 0x1f 0x02 0x199>; - phandle = <0x329>; - }; - - fspim1-pins { - rockchip,pins = <0x02 0x0b 0x03 0x199 0x02 0x0c 0x03 0x199 0x02 0x06 0x03 0x199 0x02 0x07 0x03 0x199 0x02 0x08 0x03 0x199 0x02 0x09 0x03 0x199>; - phandle = <0x32c>; - }; - - fspim0-pins { - rockchip,pins = <0x02 0x00 0x02 0x199 0x02 0x1e 0x02 0x199 0x02 0x18 0x02 0x199 0x02 0x19 0x02 0x199 0x02 0x1a 0x02 0x199 0x02 0x1b 0x02 0x199>; - phandle = <0x328>; - }; - - fspim1-cs1 { - rockchip,pins = <0x02 0x0d 0x03 0x199>; - phandle = <0x32d>; - }; - - fspim2-cs1 { - rockchip,pins = <0x03 0x15 0x02 0x199>; - phandle = <0x32b>; - }; - - fspim2-pins { - rockchip,pins = <0x03 0x05 0x05 0x199 0x03 0x14 0x02 0x199 0x03 0x00 0x05 0x199 0x03 0x01 0x05 0x199 0x03 0x02 0x05 0x199 0x03 0x03 0x05 0x199>; - phandle = <0x32a>; - }; - }; - - pcfg-pull-up-drv-level-13 { - drive-strength = <0x0d>; - phandle = <0x460>; - bias-pull-up; - }; - - clk32k { - - clk32k-out0 { - rockchip,pins = <0x00 0x0a 0x02 0x198>; - phandle = <0x315>; - }; - - clk32k-in { - rockchip,pins = <0x00 0x0a 0x01 0x198>; - phandle = <0x314>; - }; - - clk32k-out1 { - rockchip,pins = <0x02 0x15 0x01 0x198>; - phandle = <0x316>; - }; - }; - - pcfg-pull-down-drv-level-11 { - drive-strength = <0x0b>; - bias-pull-down; - phandle = <0x467>; - }; - - pcie30phy { - - pcie30phy-pins { - rockchip,pins = <0x01 0x14 0x04 0x198 0x01 0x19 0x04 0x198>; - phandle = <0x3a4>; - }; - }; - - pcfg-pull-up-drv-level-0 { - drive-strength = <0x00>; - phandle = <0x2f3>; - bias-pull-up; - }; - - ddrphych0 { - - ddrphych0-pins { - rockchip,pins = <0x04 0x00 0x07 0x198 0x04 0x01 0x07 0x198 0x04 0x02 0x07 0x198 0x04 0x03 0x07 0x198>; - phandle = <0x318>; - }; - }; - - pcfg-pull-none-drv-level-10 { - drive-strength = <0x0a>; - bias-disable; - phandle = <0x454>; - }; - - pwm5 { - - pwm5m2-pins { - rockchip,pins = <0x04 0x14 0x0b 0x198>; - phandle = <0x3ce>; - }; - - pwm5m1-pins { - rockchip,pins = <0x00 0x16 0x0b 0x198>; - phandle = <0x16a>; - }; - - pwm5m0-pins { - rockchip,pins = <0x00 0x09 0x03 0x198>; - phandle = <0x3cd>; - }; - }; - - pcfg-pull-none-drv-level-3 { - drive-strength = <0x03>; - bias-disable; - phandle = <0x2ef>; - }; - - pwm10 { - - pwm10m2-pins { - rockchip,pins = <0x03 0x1b 0x0b 0x198>; - phandle = <0x3d9>; - }; - - pwm10m1-pins { - rockchip,pins = <0x04 0x1b 0x0b 0x198>; - phandle = <0x3d8>; - }; - - pwm10m0-pins { - rockchip,pins = <0x03 0x00 0x0b 0x198>; - phandle = <0x16f>; - }; - }; - - pcfg-pull-down-smt { - input-schmitt-enable; - bias-pull-down; - phandle = <0x2ff>; - }; - - gpio@fec50000 { - gpio-controller; - interrupts = <0x00 0x119 0x04>; - clocks = <0x02 0x83 0x02 0x84>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfec50000 0x00 0x100>; - phandle = <0x10d>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x80 0x20>; - interrupt-controller; - }; - - pcfg-pull-down { - bias-pull-down; - phandle = <0x2ec>; - }; - - uart4 { - - uart4m2-xfer { - rockchip,pins = <0x01 0x0a 0x0a 0x19e 0x01 0x0b 0x0a 0x19e>; - phandle = <0x42d>; - }; - - uart4-ctsn { - rockchip,pins = <0x01 0x17 0x0a 0x198>; - phandle = <0x42e>; - }; - - uart4m1-xfer { - rockchip,pins = <0x03 0x18 0x0a 0x19e 0x03 0x19 0x0a 0x19e>; - phandle = <0x163>; - }; - - uart4m0-xfer { - rockchip,pins = <0x01 0x1b 0x0a 0x19e 0x01 0x1a 0x0a 0x19e>; - phandle = <0x42c>; - }; - - uart4-rtsn { - rockchip,pins = <0x01 0x15 0x0a 0x198>; - phandle = <0x42f>; - }; - }; - - spdif0 { - - spdif0m0-tx { - rockchip,pins = <0x01 0x0e 0x03 0x198>; - phandle = <0x142>; - }; - - spdif0m1-tx { - rockchip,pins = <0x04 0x0c 0x06 0x198>; - phandle = <0x3f0>; - }; - }; - - pcfg-pull-down-drv-level-6 { - drive-strength = <0x06>; - bias-pull-down; - phandle = <0x2fd>; - }; - - pcfg-pull-up-drv-level-9 { - drive-strength = <0x09>; - phandle = <0x45c>; - bias-pull-up; - }; - - pcfg-pull-none-drv-level-1-smt { - drive-strength = <0x01>; - bias-disable; - input-schmitt-enable; - phandle = <0x19c>; - }; - - pcfg-pull-up-drv-level-11 { - drive-strength = <0x0b>; - phandle = <0x45e>; - bias-pull-up; - }; - - mcu { - - mcum1-pins { - rockchip,pins = <0x03 0x1c 0x06 0x198 0x03 0x1d 0x06 0x198>; - phandle = <0x394>; - }; - - mcum0-pins { - rockchip,pins = <0x04 0x1c 0x05 0x198 0x04 0x1d 0x05 0x198>; - phandle = <0x393>; - }; - }; - - i2c8 { - - i2c8m4-xfer { - rockchip,pins = <0x03 0x12 0x09 0x19d 0x03 0x13 0x09 0x19d>; - phandle = <0x373>; - }; - - i2c8m3-xfer { - rockchip,pins = <0x04 0x10 0x09 0x19d 0x04 0x11 0x09 0x19d>; - phandle = <0x372>; - }; - - i2c8m2-xfer { - rockchip,pins = <0x01 0x1e 0x09 0x19d 0x01 0x1f 0x09 0x19d>; - phandle = <0x371>; - }; - - i2c8m1-xfer { - rockchip,pins = <0x02 0x08 0x09 0x19d 0x02 0x09 0x09 0x19d>; - phandle = <0x374>; - }; - - i2c8m0-xfer { - rockchip,pins = <0x04 0x1a 0x09 0x19d 0x04 0x1b 0x09 0x19d>; - phandle = <0x186>; - }; - }; - - dp0 { - - dp0m0-pins { - rockchip,pins = <0x04 0x0c 0x05 0x198>; - phandle = <0x31c>; - }; - - dp0m2-pins { - rockchip,pins = <0x01 0x00 0x05 0x198>; - phandle = <0x31e>; - }; - - dp0m1-pins { - rockchip,pins = <0x00 0x14 0x0a 0x198>; - phandle = <0x31d>; - }; - }; - - pcfg-pull-none-drv-level-5-smt { - drive-strength = <0x05>; - bias-disable; - input-schmitt-enable; - phandle = <0x19b>; - }; - - pwm3 { - - pwm3m2-pins { - rockchip,pins = <0x01 0x12 0x0b 0x198>; - phandle = <0x3ca>; - }; - - pwm3m1-pins { - rockchip,pins = <0x03 0x0a 0x0b 0x198>; - phandle = <0x3c9>; - }; - - pwm3m0-pins { - rockchip,pins = <0x00 0x1c 0x03 0x198>; - phandle = <0x81>; - }; - - pwm3m3-pins { - rockchip,pins = <0x01 0x07 0x0b 0x198>; - phandle = <0x3cb>; - }; - }; - - pcfg-pull-none-drv-level-1 { - drive-strength = <0x01>; - bias-disable; - phandle = <0x2ee>; - }; - - sata2 { - - sata2m1-pins { - rockchip,pins = <0x01 0x0f 0x06 0x198>; - phandle = <0x3ed>; - }; - - sata2m0-pins { - rockchip,pins = <0x04 0x09 0x06 0x198>; - phandle = <0x3ec>; - }; - }; - - cam { - - cam0-or-cam1-switch-pin { - rockchip,pins = <0x03 0x11 0x00 0x198>; - phandle = <0x1f0>; - }; - }; - - uart2 { - - uart2-rtsn { - rockchip,pins = <0x03 0x0b 0x0a 0x198>; - phandle = <0x427>; - }; - - uart2m1-xfer { - rockchip,pins = <0x04 0x19 0x0a 0x19e 0x04 0x18 0x0a 0x19e>; - phandle = <0x161>; - }; - - uart2m0-xfer { - rockchip,pins = <0x00 0x0e 0x0a 0x19e 0x00 0x0d 0x0a 0x19e>; - phandle = <0x1ce>; - }; - - uart2-ctsn { - rockchip,pins = <0x03 0x0c 0x0a 0x198>; - phandle = <0x426>; - }; - - uart2m2-xfer { - rockchip,pins = <0x03 0x0a 0x0a 0x19e 0x03 0x09 0x0a 0x19e>; - phandle = <0x425>; - }; - }; - - pcfg-pull-down-drv-level-4 { - drive-strength = <0x04>; - bias-pull-down; - phandle = <0x2fb>; - }; - - pcfg-pull-up-drv-level-7 { - drive-strength = <0x07>; - phandle = <0x45a>; - bias-pull-up; - }; - - i2c6 { - - i2c6m4-xfer { - rockchip,pins = <0x03 0x01 0x09 0x19d 0x03 0x00 0x09 0x19d>; - phandle = <0x36c>; - }; - - i2c6m3-xfer { - rockchip,pins = <0x04 0x09 0x09 0x19d 0x04 0x08 0x09 0x19d>; - phandle = <0x36b>; - }; - - i2c6m2-xfer { - rockchip,pins = <0x02 0x13 0x09 0x19d 0x02 0x12 0x09 0x19d>; - phandle = <0x36d>; - }; - - i2c6m1-xfer { - rockchip,pins = <0x01 0x13 0x09 0x19d 0x01 0x12 0x09 0x19d>; - phandle = <0x36a>; - }; - - i2c6m0-xfer { - rockchip,pins = <0x00 0x18 0x09 0x19d 0x00 0x17 0x09 0x19d>; - phandle = <0x178>; - }; - }; - - pdm1 { - - pdm1m1-sdi3 { - rockchip,pins = <0x01 0x0a 0x02 0x198>; - phandle = <0x3c1>; - }; - - pdm1m0-clk { - rockchip,pins = <0x04 0x1d 0x02 0x198>; - phandle = <0x140>; - }; - - pdm1m1-sdi1 { - rockchip,pins = <0x01 0x08 0x02 0x198>; - phandle = <0x3bf>; - }; - - pdm1m0-sdi3 { - rockchip,pins = <0x04 0x18 0x02 0x198>; - phandle = <0x13e>; - }; - - pdm1m0-sdi1 { - rockchip,pins = <0x04 0x1a 0x02 0x198>; - phandle = <0x13c>; - }; - - pdm1m1-clk { - rockchip,pins = <0x01 0x0c 0x02 0x198>; - phandle = <0x3bb>; - }; - - pdm1m1-clk1 { - rockchip,pins = <0x01 0x0b 0x02 0x198>; - phandle = <0x3bc>; - }; - - pdm1m1-idle { - rockchip,pins = <0x01 0x0c 0x00 0x198 0x01 0x0b 0x00 0x198>; - phandle = <0x3bd>; - }; - - pdm1m0-clk1 { - rockchip,pins = <0x04 0x1c 0x02 0x198>; - phandle = <0x141>; - }; - - pdm1m1-sdi2 { - rockchip,pins = <0x01 0x09 0x02 0x198>; - phandle = <0x3c0>; - }; - - pdm1m0-idle { - rockchip,pins = <0x04 0x1d 0x00 0x198 0x04 0x1c 0x00 0x198>; - phandle = <0x13f>; - }; - - pdm1m1-sdi0 { - rockchip,pins = <0x01 0x07 0x02 0x198>; - phandle = <0x3be>; - }; - - pdm1m0-sdi2 { - rockchip,pins = <0x04 0x19 0x02 0x198>; - phandle = <0x13d>; - }; - - pdm1m0-sdi0 { - rockchip,pins = <0x04 0x1b 0x02 0x198>; - phandle = <0x13b>; - }; - }; - - cpu { - - cpu-pins { - rockchip,pins = <0x00 0x19 0x02 0x198 0x00 0x1d 0x02 0x198>; - phandle = <0x317>; - }; - }; - - gpio-func { - - tsadc-gpio-func { - rockchip,pins = <0x00 0x01 0x00 0x198>; - phandle = <0x175>; - }; - }; - - pcie20x1 { - - pcie20x1-2-button-rstn { - rockchip,pins = <0x04 0x0b 0x04 0x198>; - phandle = <0x3a3>; - }; - - pcie20x1m1-pins { - rockchip,pins = <0x04 0x0f 0x04 0x198 0x04 0x11 0x04 0x198 0x04 0x10 0x04 0x198>; - phandle = <0x3a2>; - }; - - pcie20x1m0-pins { - rockchip,pins = <0x03 0x17 0x04 0x198 0x03 0x19 0x04 0x198 0x03 0x18 0x04 0x198>; - phandle = <0x3a1>; - }; - }; - - leds { - - leds-gpio { - rockchip,pins = <0x00 0x15 0x00 0x198>; - phandle = <0x1ee>; - }; - }; - - pwm1 { - - pwm1m1-pins { - rockchip,pins = <0x01 0x1b 0x0b 0x198>; - phandle = <0x3c5>; - }; - - pwm1m0-pins { - rockchip,pins = <0x00 0x10 0x03 0x198>; - phandle = <0x7f>; - }; - - pwm1m2-pins { - rockchip,pins = <0x01 0x03 0x0b 0x198>; - phandle = <0x3c6>; - }; - }; - - sata0 { - - sata0m1-pins { - rockchip,pins = <0x01 0x0b 0x06 0x198>; - phandle = <0x3e9>; - }; - - sata0m0-pins { - rockchip,pins = <0x04 0x0e 0x06 0x198>; - phandle = <0x3e8>; - }; - }; - - refclk { - - refclk-pins { - rockchip,pins = <0x00 0x00 0x01 0x198>; - phandle = <0x3e5>; - }; - }; - - pcie30x4 { - - pcie30x4m2-pins { - rockchip,pins = <0x03 0x14 0x04 0x198 0x03 0x16 0x04 0x198 0x03 0x15 0x04 0x198>; - phandle = <0x3b1>; - }; - - pcie30x4m1-pins { - rockchip,pins = <0x04 0x0c 0x04 0x198 0x04 0x0e 0x04 0x198 0x04 0x0d 0x04 0x198>; - phandle = <0x3b0>; - }; - - pcie30x4-button-rstn { - rockchip,pins = <0x03 0x1d 0x04 0x198>; - phandle = <0x3b3>; - }; - - pcie30x4m0-pins { - rockchip,pins = <0x00 0x16 0x0c 0x198 0x00 0x18 0x0c 0x198 0x00 0x17 0x0c 0x198>; - phandle = <0x3af>; - }; - - pcie30x4m3-pins { - rockchip,pins = <0x01 0x08 0x04 0x198 0x01 0x0a 0x04 0x198 0x01 0x09 0x04 0x198>; - phandle = <0x3b2>; - }; - }; - - can2 { - - can2m1-pins { - rockchip,pins = <0x00 0x1c 0x0a 0x198 0x00 0x1d 0x0a 0x198>; - phandle = <0x30f>; - }; - - can2m0-pins { - rockchip,pins = <0x03 0x14 0x09 0x198 0x03 0x15 0x09 0x198>; - phandle = <0x147>; - }; - }; - - litcpu { - - litcpu-pins { - rockchip,pins = <0x00 0x1b 0x01 0x198>; - phandle = <0x392>; - }; - }; - - sata { - - sata-reset { - rockchip,pins = <0x04 0x11 0x00 0x198>; - phandle = <0x3e7>; - }; - - sata-pins { - rockchip,pins = <0x00 0x16 0x0d 0x198 0x00 0x1c 0x0d 0x198 0x00 0x1d 0x0d 0x198>; - phandle = <0x3e6>; - }; - }; - - tsadc { - - tsadc-shut { - rockchip,pins = <0x00 0x01 0x02 0x198>; - phandle = <0x176>; - }; - - tsadc-shut-org { - rockchip,pins = <0x00 0x01 0x01 0x198>; - phandle = <0x418>; - }; - - tsadcm1-shut { - rockchip,pins = <0x00 0x02 0x02 0x198>; - phandle = <0x417>; - }; - }; - - uart0 { - - uart0m1-xfer { - rockchip,pins = <0x00 0x08 0x04 0x19e 0x00 0x09 0x04 0x19e>; - phandle = <0x7d>; - }; - - uart0m0-xfer { - rockchip,pins = <0x00 0x14 0x04 0x19e 0x00 0x15 0x04 0x19e>; - phandle = <0x419>; - }; - - uart0-rtsn { - rockchip,pins = <0x00 0x16 0x04 0x198>; - phandle = <0x41c>; - }; - - uart0-ctsn { - rockchip,pins = <0x00 0x19 0x04 0x198>; - phandle = <0x41b>; - }; - - uart0m2-xfer { - rockchip,pins = <0x04 0x04 0x0a 0x19e 0x04 0x03 0x0a 0x19e>; - phandle = <0x41a>; - }; - }; - - pcfg-pull-down-drv-level-2 { - drive-strength = <0x02>; - bias-pull-down; - phandle = <0x2f9>; - }; - - pcfg-pull-up-drv-level-5 { - drive-strength = <0x05>; - phandle = <0x2f6>; - bias-pull-up; - }; - - gpio@fec20000 { - gpio-controller; - interrupts = <0x00 0x116 0x04>; - clocks = <0x02 0x7d 0x02 0x7e>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfec20000 0x00 0x100>; - phandle = <0xfe>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x20 0x20>; - interrupt-controller; - }; - - pcfg-pull-none-drv-level-15 { - drive-strength = <0x0f>; - bias-disable; - phandle = <0x459>; - }; - - eth1 { - - eth1-pins { - rockchip,pins = <0x03 0x06 0x01 0x198>; - phandle = <0x327>; - }; - }; - - i2c4 { - - i2c4m3-xfer { - rockchip,pins = <0x01 0x03 0x09 0x19d 0x01 0x02 0x09 0x19d>; - phandle = <0x364>; - }; - - i2c4m2-xfer { - rockchip,pins = <0x00 0x15 0x09 0x19d 0x00 0x14 0x09 0x19d>; - phandle = <0x363>; - }; - - i2c4m1-xfer { - rockchip,pins = <0x02 0x0d 0x09 0x19d 0x02 0x0c 0x09 0x19d>; - phandle = <0x14b>; - }; - - i2c4m0-xfer { - rockchip,pins = <0x03 0x06 0x09 0x19d 0x03 0x05 0x09 0x19d>; - phandle = <0x362>; - }; - - i2c4m4-xfer { - rockchip,pins = <0x01 0x17 0x09 0x19d 0x01 0x16 0x09 0x19d>; - phandle = <0x365>; - }; - }; - - emmc { - - emmc-data-strobe { - rockchip,pins = <0x02 0x02 0x01 0x198>; - phandle = <0x326>; - }; - - emmc-clk { - rockchip,pins = <0x02 0x01 0x01 0x199>; - phandle = <0x324>; - }; - - emmc-bus8 { - rockchip,pins = <0x02 0x18 0x01 0x199 0x02 0x19 0x01 0x199 0x02 0x1a 0x01 0x199 0x02 0x1b 0x01 0x199 0x02 0x1c 0x01 0x199 0x02 0x1d 0x01 0x199 0x02 0x1e 0x01 0x199 0x02 0x1f 0x01 0x199>; - phandle = <0x323>; - }; - - emmc-cmd { - rockchip,pins = <0x02 0x00 0x01 0x199>; - phandle = <0x325>; - }; - - emmc-rstnout { - rockchip,pins = <0x02 0x03 0x01 0x198>; - phandle = <0x322>; - }; - }; - - pcfg-pull-none-drv-level-8 { - drive-strength = <0x08>; - bias-disable; - phandle = <0x452>; - }; - - pwm15 { - - pwm15m0-pins { - rockchip,pins = <0x03 0x13 0x0b 0x198>; - phandle = <0x174>; - }; - - pwm15m3-pins { - rockchip,pins = <0x01 0x1f 0x0b 0x198>; - phandle = <0x3e4>; - }; - - pwm15m2-pins { - rockchip,pins = <0x01 0x16 0x0b 0x198>; - phandle = <0x3e3>; - }; - - pwm15m1-pins { - rockchip,pins = <0x04 0x0b 0x0b 0x198>; - phandle = <0x3e2>; - }; - }; - - pcie30x2 { - - pcie30x2m2-pins { - rockchip,pins = <0x03 0x1a 0x04 0x198 0x03 0x1c 0x04 0x198 0x03 0x1b 0x04 0x198>; - phandle = <0x3ac>; - }; - - pcie30x2m1-pins { - rockchip,pins = <0x04 0x06 0x04 0x198 0x04 0x08 0x04 0x198 0x04 0x07 0x04 0x198>; - phandle = <0x3ab>; - }; - - pcie30x2-button-rstn { - rockchip,pins = <0x03 0x11 0x04 0x198>; - phandle = <0x3ae>; - }; - - pcie30x2m0-pins { - rockchip,pins = <0x00 0x19 0x0c 0x198 0x00 0x1c 0x0c 0x198 0x00 0x1a 0x0c 0x198>; - phandle = <0x3aa>; - }; - - pcie30x2m3-pins { - rockchip,pins = <0x01 0x1f 0x04 0x198 0x01 0x0f 0x04 0x198 0x01 0x0e 0x04 0x198>; - phandle = <0x3ad>; - }; - }; - - can0 { - - can0m0-pins { - rockchip,pins = <0x00 0x10 0x0b 0x198 0x00 0x0f 0x0b 0x198>; - phandle = <0x145>; - }; - - can0m1-pins { - rockchip,pins = <0x04 0x1d 0x09 0x198 0x04 0x1c 0x09 0x198>; - phandle = <0x30d>; - }; - }; - - pcfg-output-high { - output-high; - phandle = <0x305>; - }; - - uart9 { - - uart9m0-rtsn { - rockchip,pins = <0x04 0x14 0x0a 0x198>; - phandle = <0x44e>; - }; - - uart9m2-ctsn { - rockchip,pins = <0x03 0x1b 0x0a 0x198>; - phandle = <0x44a>; - }; - - uart9m1-ctsn { - rockchip,pins = <0x04 0x01 0x0a 0x198>; - phandle = <0x447>; - }; - - uart9m2-xfer { - rockchip,pins = <0x03 0x1c 0x0a 0x19e 0x03 0x1d 0x0a 0x19e>; - phandle = <0x449>; - }; - - uart9m0-ctsn { - rockchip,pins = <0x04 0x15 0x0a 0x198>; - phandle = <0x44d>; - }; - - uart9m1-xfer { - rockchip,pins = <0x04 0x0d 0x0a 0x19e 0x04 0x0c 0x0a 0x19e>; - phandle = <0x168>; - }; - - uart9m0-xfer { - rockchip,pins = <0x02 0x14 0x0a 0x19e 0x02 0x12 0x0a 0x19e>; - phandle = <0x44c>; - }; - - uart9m2-rtsn { - rockchip,pins = <0x03 0x1a 0x0a 0x198>; - phandle = <0x44b>; - }; - - uart9m1-rtsn { - rockchip,pins = <0x04 0x00 0x0a 0x198>; - phandle = <0x448>; - }; - }; - - pcfg-pull-none-drv-level-2-smt { - drive-strength = <0x02>; - bias-disable; - input-schmitt-enable; - phandle = <0x301>; - }; - - pcfg-pull-up { - phandle = <0x19e>; - bias-pull-up; - }; - - spi3 { - - spi3m3-cs1 { - rockchip,pins = <0x03 0x15 0x08 0x19a>; - phandle = <0x40e>; - }; - - spi3m1-cs0 { - rockchip,pins = <0x04 0x10 0x08 0x19a>; - phandle = <0x15d>; - }; - - spi3m3-pins { - rockchip,pins = <0x03 0x18 0x08 0x19a 0x03 0x16 0x08 0x19a 0x03 0x17 0x08 0x19a>; - phandle = <0x40c>; - }; - - spi3m0-cs1 { - rockchip,pins = <0x04 0x13 0x08 0x19f>; - phandle = <0x411>; - }; - - spi3m2-cs0 { - rockchip,pins = <0x00 0x1c 0x08 0x19a>; - phandle = <0x40a>; - }; - - spi3m2-pins { - rockchip,pins = <0x00 0x1b 0x08 0x19a 0x00 0x18 0x08 0x19a 0x00 0x1a 0x08 0x19a>; - phandle = <0x409>; - }; - - spi3m1-cs1 { - rockchip,pins = <0x04 0x11 0x08 0x19a>; - phandle = <0x15e>; - }; - - spi3m1-pins { - rockchip,pins = <0x04 0x0f 0x08 0x19a 0x04 0x0d 0x08 0x19a 0x04 0x0e 0x08 0x19a>; - phandle = <0x15f>; - }; - - spi3m3-cs0 { - rockchip,pins = <0x03 0x14 0x08 0x19a>; - phandle = <0x40d>; - }; - - spi3m0-pins { - rockchip,pins = <0x04 0x16 0x08 0x19f 0x04 0x14 0x08 0x19f 0x04 0x15 0x08 0x19f>; - phandle = <0x40f>; - }; - - spi3m2-cs1 { - rockchip,pins = <0x00 0x1d 0x08 0x19a>; - phandle = <0x40b>; - }; - - spi3m0-cs0 { - rockchip,pins = <0x04 0x12 0x08 0x19f>; - phandle = <0x410>; - }; - }; - - pcfg-pull-down-drv-level-14 { - drive-strength = <0x0e>; - bias-pull-down; - phandle = <0x46a>; - }; - - bt656 { - - bt656-pins { - rockchip,pins = <0x04 0x08 0x02 0x1a0 0x04 0x00 0x02 0x1a0 0x04 0x01 0x02 0x1a0 0x04 0x02 0x02 0x1a0 0x04 0x03 0x02 0x1a0 0x04 0x04 0x02 0x1a0 0x04 0x05 0x02 0x1a0 0x04 0x06 0x02 0x1a0 0x04 0x07 0x02 0x1a0>; - phandle = <0x450>; - }; - }; - - pcfg-pull-down-drv-level-0 { - drive-strength = <0x00>; - bias-pull-down; - phandle = <0x2f7>; - }; - - pcfg-pull-up-drv-level-3 { - drive-strength = <0x03>; - phandle = <0x2f4>; - bias-pull-up; - }; - - i2s2 { - - i2s2m0-lrck { - rockchip,pins = <0x02 0x10 0x02 0x19d>; - phandle = <0x389>; - }; - - i2s2m1-mclk { - rockchip,pins = <0x03 0x0c 0x03 0x19d>; - phandle = <0x387>; - }; - - i2s2m0-mclk { - rockchip,pins = <0x02 0x0e 0x02 0x19d>; - phandle = <0x38a>; - }; - - i2s2m1-sdo { - rockchip,pins = <0x03 0x0b 0x03 0x198>; - phandle = <0x12b>; - }; - - i2s2m0-sdi { - rockchip,pins = <0x02 0x13 0x02 0x198>; - phandle = <0x38c>; - }; - - i2s2m1-idle { - rockchip,pins = <0x03 0x0e 0x00 0x198 0x03 0x0d 0x00 0x198>; - phandle = <0x12c>; - }; - - i2s2m1-sdi { - rockchip,pins = <0x03 0x0a 0x03 0x198>; - phandle = <0x12a>; - }; - - i2s2m0-idle { - rockchip,pins = <0x02 0x10 0x00 0x198 0x02 0x0f 0x00 0x198>; - phandle = <0x388>; - }; - - i2s2m1-sclk { - rockchip,pins = <0x03 0x0d 0x03 0x19d>; - phandle = <0x12e>; - }; - - i2s2m1-lrck { - rockchip,pins = <0x03 0x0e 0x03 0x19d>; - phandle = <0x12d>; - }; - - i2s2m0-sclk { - rockchip,pins = <0x02 0x0f 0x02 0x19d>; - phandle = <0x38b>; - }; - - i2s2m0-sdo { - rockchip,pins = <0x04 0x13 0x02 0x198>; - phandle = <0x38d>; - }; - }; - - pcfg-pull-none-drv-level-6-smt { - drive-strength = <0x06>; - bias-disable; - input-schmitt-enable; - phandle = <0x304>; - }; - - ddrphych3 { - - ddrphych3-pins { - rockchip,pins = <0x04 0x0c 0x07 0x198 0x04 0x0d 0x07 0x198 0x04 0x0e 0x07 0x198 0x04 0x0f 0x07 0x198>; - phandle = <0x31b>; - }; - }; - - pcfg-pull-none-drv-level-13 { - drive-strength = <0x0d>; - bias-disable; - phandle = <0x457>; - }; - - i2c2 { - - i2c2m2-xfer { - rockchip,pins = <0x02 0x03 0x09 0x19d 0x02 0x02 0x09 0x19d>; - phandle = <0x35a>; - }; - - i2c2m1-xfer { - rockchip,pins = <0x02 0x11 0x09 0x19d 0x02 0x10 0x09 0x19d>; - phandle = <0x35d>; - }; - - i2c2m0-xfer { - rockchip,pins = <0x00 0x0f 0x09 0x19d 0x00 0x10 0x09 0x19d>; - phandle = <0x149>; - }; - - i2c2m4-xfer { - rockchip,pins = <0x01 0x01 0x09 0x19d 0x01 0x00 0x09 0x19d>; - phandle = <0x35c>; - }; - - i2c2m3-xfer { - rockchip,pins = <0x01 0x15 0x09 0x19d 0x01 0x14 0x09 0x19d>; - phandle = <0x35b>; - }; - }; - - auddsm { - - auddsm-pins { - rockchip,pins = <0x03 0x01 0x04 0x198 0x03 0x02 0x04 0x198 0x03 0x03 0x04 0x198 0x03 0x04 0x04 0x198>; - phandle = <0x144>; - }; - }; - - pwm8 { - - pwm8m2-pins { - rockchip,pins = <0x03 0x18 0x0b 0x198>; - phandle = <0x3d5>; - }; - - pwm8m1-pins { - rockchip,pins = <0x04 0x18 0x0b 0x198>; - phandle = <0x3d4>; - }; - - pwm8m0-pins { - rockchip,pins = <0x03 0x07 0x0b 0x198>; - phandle = <0x16d>; - }; - }; - - pmic { - - pmic-pins { - rockchip,pins = <0x00 0x07 0x00 0x19e 0x00 0x02 0x01 0x198 0x00 0x03 0x01 0x198 0x00 0x11 0x01 0x198 0x00 0x12 0x01 0x198 0x00 0x13 0x01 0x198 0x00 0x1e 0x01 0x198>; - phandle = <0x156>; - }; - }; - - pcfg-pull-none-drv-level-6 { - drive-strength = <0x06>; - bias-disable; - phandle = <0x2f2>; - }; - - jtag { - - jtagm2-pins { - rockchip,pins = <0x00 0x0d 0x02 0x198 0x00 0x0e 0x02 0x198>; - phandle = <0x391>; - }; - - jtagm1-pins { - rockchip,pins = <0x04 0x18 0x05 0x198 0x04 0x19 0x05 0x198>; - phandle = <0x390>; - }; - - jtagm0-pins { - rockchip,pins = <0x04 0x1a 0x05 0x198 0x04 0x1b 0x05 0x198>; - phandle = <0x38f>; - }; - }; - - gpio@fd8a0000 { - gpio-controller; - interrupts = <0x00 0x115 0x04>; - clocks = <0x02 0x284 0x02 0x285>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfd8a0000 0x00 0x100>; - phandle = <0x7b>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x00 0x20>; - interrupt-controller; - }; - - gmac1 { - - gmac1-rgmii-clk { - rockchip,pins = <0x03 0x05 0x01 0x198 0x03 0x04 0x01 0x198>; - phandle = <0x111>; - }; - - gmac1-rx-bus2 { - rockchip,pins = <0x03 0x07 0x01 0x198 0x03 0x08 0x01 0x198 0x03 0x09 0x01 0x198>; - phandle = <0x110>; - }; - - gmac1-txer { - rockchip,pins = <0x03 0x0a 0x01 0x198>; - phandle = <0x332>; - }; - - gmac1-clkinout { - rockchip,pins = <0x03 0x0e 0x01 0x198>; - phandle = <0x32e>; - }; - - gmac1-ptp-ref-clk { - rockchip,pins = <0x03 0x0f 0x01 0x198>; - phandle = <0x331>; - }; - - gmac1-ppsclk { - rockchip,pins = <0x03 0x11 0x01 0x198>; - phandle = <0x32f>; - }; - - gmac1-ppstrig { - rockchip,pins = <0x03 0x10 0x01 0x198>; - phandle = <0x330>; - }; - - gmac1-rgmii-bus { - rockchip,pins = <0x03 0x02 0x01 0x198 0x03 0x03 0x01 0x198 0x03 0x00 0x01 0x19a 0x03 0x01 0x01 0x19a>; - phandle = <0x112>; - }; - - gmac1-tx-bus2 { - rockchip,pins = <0x03 0x0b 0x01 0x19a 0x03 0x0c 0x01 0x19a 0x03 0x0d 0x01 0x198>; - phandle = <0x10f>; - }; - - gmac1-miim { - rockchip,pins = <0x03 0x12 0x01 0x198 0x03 0x13 0x01 0x198>; - phandle = <0x10e>; - }; - }; - - pcfg-pull-none { - bias-disable; - phandle = <0x198>; - }; - - pwm13 { - - pwm13m2-pins { - rockchip,pins = <0x01 0x0f 0x0b 0x198>; - phandle = <0x3df>; - }; - - pwm13m1-pins { - rockchip,pins = <0x04 0x0e 0x0b 0x198>; - phandle = <0x3de>; - }; - - pwm13m0-pins { - rockchip,pins = <0x03 0x0e 0x0b 0x198>; - phandle = <0x172>; - }; - }; - - pcfg-output-high-pull-down { - output-high; - bias-pull-down; - phandle = <0x307>; - }; - - uart7 { - - uart7m1-ctsn { - rockchip,pins = <0x03 0x13 0x0a 0x198>; - phandle = <0x43b>; - }; - - uart7m2-xfer { - rockchip,pins = <0x01 0x0c 0x0a 0x19e 0x01 0x0d 0x0a 0x19e>; - phandle = <0x43d>; - }; - - uart7m0-ctsn { - rockchip,pins = <0x04 0x16 0x0a 0x198>; - phandle = <0x43f>; - }; - - uart7m1-xfer { - rockchip,pins = <0x03 0x11 0x0a 0x19e 0x03 0x10 0x0a 0x19e>; - phandle = <0x166>; - }; - - uart7m0-xfer { - rockchip,pins = <0x02 0x0c 0x0a 0x19e 0x02 0x0d 0x0a 0x19e>; - phandle = <0x43e>; - }; - - uart7m1-rtsn { - rockchip,pins = <0x03 0x12 0x0a 0x198>; - phandle = <0x43c>; - }; - - uart7m0-rtsn { - rockchip,pins = <0x04 0x12 0x0a 0x198>; - phandle = <0x440>; - }; - }; - - pcfg-pull-down-drv-level-9 { - drive-strength = <0x09>; - bias-pull-down; - phandle = <0x465>; - }; - - spi1 { - - spi1m1-cs1 { - rockchip,pins = <0x03 0x13 0x08 0x19a>; - phandle = <0x152>; - }; - - spi1m2-cs1 { - rockchip,pins = <0x01 0x1d 0x08 0x19a>; - phandle = <0x3fe>; - }; - - spi1m0-cs0 { - rockchip,pins = <0x02 0x13 0x08 0x19f>; - phandle = <0x400>; - }; - - spi1m2-pins { - rockchip,pins = <0x01 0x1a 0x08 0x19a 0x01 0x18 0x08 0x19a 0x01 0x19 0x08 0x19a>; - phandle = <0x3fc>; - }; - - spi1m1-pins { - rockchip,pins = <0x03 0x11 0x08 0x19a 0x03 0x10 0x08 0x19a 0x03 0x0f 0x08 0x19a>; - phandle = <0x153>; - }; - - spi1m1-cs0 { - rockchip,pins = <0x03 0x12 0x08 0x19a>; - phandle = <0x151>; - }; - - spi1m0-pins { - rockchip,pins = <0x02 0x10 0x08 0x19f 0x02 0x11 0x08 0x19f 0x02 0x12 0x08 0x19f>; - phandle = <0x3ff>; - }; - - spi1m0-cs1 { - rockchip,pins = <0x02 0x14 0x08 0x19f>; - phandle = <0x401>; - }; - - spi1m2-cs0 { - rockchip,pins = <0x01 0x1b 0x08 0x19a>; - phandle = <0x3fd>; - }; - }; - - pcfg-pull-up-drv-level-14 { - drive-strength = <0x0e>; - phandle = <0x461>; - bias-pull-up; - }; - - pcfg-output-low-pull-down { - bias-pull-down; - phandle = <0x30b>; - output-low; - }; - - pcfg-pull-down-drv-level-12 { - drive-strength = <0x0c>; - bias-pull-down; - phandle = <0x468>; - }; - - pcfg-pull-up-drv-level-1 { - drive-strength = <0x01>; - phandle = <0x19f>; - bias-pull-up; - }; - - pcfg-pull-none-smt { - bias-disable; - input-schmitt-enable; - phandle = <0x19d>; - }; - - sdmmc { - - sdmmc-det { - rockchip,pins = <0x00 0x04 0x01 0x19e>; - phandle = <0x116>; - }; - - sdmmc-pwren { - rockchip,pins = <0x00 0x05 0x02 0x198>; - phandle = <0x3ef>; - }; - - sdmmc-bus4 { - rockchip,pins = <0x04 0x18 0x01 0x199 0x04 0x19 0x01 0x199 0x04 0x1a 0x01 0x199 0x04 0x1b 0x01 0x199>; - phandle = <0x117>; - }; - - sdmmc-cmd { - rockchip,pins = <0x04 0x1c 0x01 0x199>; - phandle = <0x115>; - }; - - sdmmc-clk { - rockchip,pins = <0x04 0x1d 0x01 0x199>; - phandle = <0x114>; - }; - }; - - i2s0 { - - i2s0-sclk { - rockchip,pins = <0x01 0x13 0x01 0x19d>; - phandle = <0x11c>; - }; - - i2s0-sdo3 { - rockchip,pins = <0x01 0x1a 0x01 0x198>; - phandle = <0x37a>; - }; - - i2s0-lrck { - rockchip,pins = <0x01 0x15 0x01 0x19d>; - phandle = <0x11b>; - }; - - i2s0-sdo1 { - rockchip,pins = <0x01 0x18 0x01 0x198>; - phandle = <0x378>; - }; - - i2s0-sdi3 { - rockchip,pins = <0x01 0x19 0x02 0x198>; - phandle = <0x377>; - }; - - i2s0-mclk { - rockchip,pins = <0x01 0x12 0x01 0x19d>; - phandle = <0x17a>; - }; - - i2s0-sdi1 { - rockchip,pins = <0x01 0x1b 0x02 0x198>; - phandle = <0x375>; - }; - - i2s0-sdo2 { - rockchip,pins = <0x01 0x19 0x01 0x198>; - phandle = <0x379>; - }; - - i2s0-idle { - rockchip,pins = <0x01 0x15 0x00 0x198 0x01 0x13 0x00 0x198>; - phandle = <0x11f>; - }; - - i2s0-sdo0 { - rockchip,pins = <0x01 0x17 0x01 0x198>; - phandle = <0x11e>; - }; - - i2s0-sdi2 { - rockchip,pins = <0x01 0x1a 0x02 0x198>; - phandle = <0x376>; - }; - - i2s0-sdi0 { - rockchip,pins = <0x01 0x1c 0x02 0x198>; - phandle = <0x11d>; - }; - }; - - ddrphych1 { - - ddrphych1-pins { - rockchip,pins = <0x04 0x04 0x07 0x198 0x04 0x05 0x07 0x198 0x04 0x06 0x07 0x198 0x04 0x07 0x07 0x198>; - phandle = <0x319>; - }; - }; - - pcfg-pull-none-drv-level-11 { - drive-strength = <0x0b>; - bias-disable; - phandle = <0x455>; - }; - - i2c0 { - - i2c0m2-xfer { - rockchip,pins = <0x00 0x19 0x03 0x19d 0x00 0x1a 0x03 0x19d>; - phandle = <0x77>; - }; - - i2c0m1-xfer { - rockchip,pins = <0x04 0x15 0x09 0x19d 0x04 0x16 0x09 0x19d>; - phandle = <0x355>; - }; - - i2c0m0-xfer { - rockchip,pins = <0x00 0x0b 0x02 0x19d 0x00 0x06 0x02 0x19d>; - phandle = <0x354>; - }; - }; - - pwm6 { - - pwm6m2-pins { - rockchip,pins = <0x04 0x15 0x0b 0x198>; - phandle = <0x3d0>; - }; - - pwm6m1-pins { - rockchip,pins = <0x04 0x11 0x0b 0x198>; - phandle = <0x3cf>; - }; - - pwm6m0-pins { - rockchip,pins = <0x00 0x17 0x0b 0x198>; - phandle = <0x16b>; - }; - }; - - hym8563 { - - hym8563-int { - rockchip,pins = <0x00 0x08 0x00 0x198>; - phandle = <0x7a>; - }; - }; - - pcfg-pull-none-drv-level-4 { - drive-strength = <0x04>; - bias-disable; - phandle = <0x2f0>; - }; - - pcfg-output-high-pull-up { - output-high; - phandle = <0x306>; - bias-pull-up; - }; - - pwm11 { - - pwm11m3-pins { - rockchip,pins = <0x03 0x1d 0x0b 0x198>; - phandle = <0x3dc>; - }; - - pwm11m2-pins { - rockchip,pins = <0x01 0x14 0x0b 0x198>; - phandle = <0x3db>; - }; - - pwm11m1-pins { - rockchip,pins = <0x04 0x0c 0x0b 0x198>; - phandle = <0x3da>; - }; - - pwm11m0-pins { - rockchip,pins = <0x03 0x01 0x0b 0x198>; - phandle = <0x170>; - }; - }; - - bt1120 { - - bt1120-pins { - rockchip,pins = <0x04 0x08 0x02 0x198 0x04 0x00 0x02 0x198 0x04 0x01 0x02 0x198 0x04 0x02 0x02 0x198 0x04 0x03 0x02 0x198 0x04 0x04 0x02 0x198 0x04 0x05 0x02 0x198 0x04 0x06 0x02 0x198 0x04 0x07 0x02 0x198 0x04 0x0a 0x02 0x198 0x04 0x0b 0x02 0x198 0x04 0x0c 0x02 0x198 0x04 0x0d 0x02 0x198 0x04 0x0e 0x02 0x198 0x04 0x0f 0x02 0x198 0x04 0x10 0x02 0x198 0x04 0x11 0x02 0x198>; - phandle = <0x71>; - }; - }; - - pcfg-output-low-pull-up { - phandle = <0x30a>; - bias-pull-up; - output-low; - }; - - uart5 { - - uart5m1-ctsn { - rockchip,pins = <0x02 0x02 0x0a 0x198>; - phandle = <0x433>; - }; - - uart5m2-xfer { - rockchip,pins = <0x02 0x1c 0x0a 0x19e 0x02 0x1d 0x0a 0x19e>; - phandle = <0x435>; - }; - - uart5m0-ctsn { - rockchip,pins = <0x04 0x1a 0x0a 0x198>; - phandle = <0x431>; - }; - - uart5m1-xfer { - rockchip,pins = <0x03 0x15 0x0a 0x19e 0x03 0x14 0x0a 0x19e>; - phandle = <0x164>; - }; - - uart5m0-xfer { - rockchip,pins = <0x04 0x1c 0x0a 0x19e 0x04 0x1d 0x0a 0x19e>; - phandle = <0x430>; - }; - - uart5m1-rtsn { - rockchip,pins = <0x02 0x03 0x0a 0x198>; - phandle = <0x434>; - }; - - uart5m0-rtsn { - rockchip,pins = <0x04 0x1b 0x0a 0x198>; - phandle = <0x432>; - }; - }; - - sdio { - - sdiom1-pins { - rockchip,pins = <0x03 0x05 0x02 0x198 0x03 0x04 0x02 0x19e 0x03 0x00 0x02 0x19e 0x03 0x01 0x02 0x19e 0x03 0x02 0x02 0x19e 0x03 0x03 0x02 0x19e>; - phandle = <0x119>; - }; - - sdiom0-pins { - rockchip,pins = <0x02 0x0b 0x02 0x198 0x02 0x0a 0x02 0x19e 0x02 0x06 0x02 0x19e 0x02 0x07 0x02 0x19e 0x02 0x08 0x02 0x19e 0x02 0x09 0x02 0x19e>; - phandle = <0x3ee>; - }; - }; - - spdif1 { - - spdif1m0-tx { - rockchip,pins = <0x01 0x0f 0x03 0x198>; - phandle = <0x143>; - }; - - spdif1m2-tx { - rockchip,pins = <0x04 0x11 0x03 0x198>; - phandle = <0x3f2>; - }; - - spdif1m1-tx { - rockchip,pins = <0x04 0x09 0x02 0x198>; - phandle = <0x3f1>; - }; - }; - - pcfg-pull-down-drv-level-7 { - drive-strength = <0x07>; - bias-pull-down; - phandle = <0x463>; - }; - - gpio@fec30000 { - gpio-controller; - interrupts = <0x00 0x117 0x04>; - clocks = <0x02 0x7f 0x02 0x80>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfec30000 0x00 0x100>; - phandle = <0x79>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x40 0x20>; - interrupt-controller; - }; - - pcfg-pull-up-drv-level-12 { - drive-strength = <0x0c>; - phandle = <0x45f>; - bias-pull-up; - }; - - pcfg-pull-down-drv-level-10 { - drive-strength = <0x0a>; - bias-pull-down; - phandle = <0x466>; - }; - - dp1 { - - dp1m1-pins { - rockchip,pins = <0x00 0x15 0x0a 0x198>; - phandle = <0x320>; - }; - - dp1m0-pins { - rockchip,pins = <0x03 0x1d 0x05 0x198>; - phandle = <0x31f>; - }; - - dp1m2-pins { - rockchip,pins = <0x01 0x01 0x05 0x198>; - phandle = <0x321>; - }; - }; - - vop { - - vop-pins { - rockchip,pins = <0x01 0x02 0x01 0x198>; - phandle = <0x44f>; - }; - }; - - pwm4 { - - pwm4m1-pins { - rockchip,pins = <0x04 0x13 0x0b 0x198>; - phandle = <0x3cc>; - }; - - pwm4m0-pins { - rockchip,pins = <0x00 0x15 0x0b 0x198>; - phandle = <0x169>; - }; - }; - - pcfg-pull-none-drv-level-2 { - drive-strength = <0x02>; - bias-disable; - phandle = <0x1a0>; - }; - - pcfg-pull-none-drv-level-3-smt { - drive-strength = <0x03>; - bias-disable; - input-schmitt-enable; - phandle = <0x302>; - }; - - uart3 { - - uart3m2-xfer { - rockchip,pins = <0x04 0x06 0x0a 0x19e 0x04 0x05 0x0a 0x19e>; - phandle = <0x429>; - }; - - uart3m1-xfer { - rockchip,pins = <0x03 0x0e 0x0a 0x19e 0x03 0x0d 0x0a 0x19e>; - phandle = <0x162>; - }; - - uart3-ctsn { - rockchip,pins = <0x01 0x13 0x0a 0x198>; - phandle = <0x42a>; - }; - - uart3m0-xfer { - rockchip,pins = <0x01 0x10 0x0a 0x19e 0x01 0x11 0x0a 0x19e>; - phandle = <0x428>; - }; - - uart3-rtsn { - rockchip,pins = <0x01 0x12 0x0a 0x198>; - phandle = <0x42b>; - }; - }; - - pcfg-pull-down-drv-level-5 { - drive-strength = <0x05>; - bias-pull-down; - phandle = <0x2fc>; - }; - - pcfg-pull-up-drv-level-8 { - drive-strength = <0x08>; - phandle = <0x45b>; - bias-pull-up; - }; - - pcfg-pull-up-drv-level-10 { - drive-strength = <0x0a>; - phandle = <0x45d>; - bias-pull-up; - }; - - pcfg-output-low { - phandle = <0x309>; - output-low; - }; - - i2c7 { - - i2c7m3-xfer { - rockchip,pins = <0x04 0x0a 0x09 0x19d 0x04 0x0b 0x09 0x19d>; - phandle = <0x36f>; - }; - - i2c7m2-xfer { - rockchip,pins = <0x03 0x1a 0x09 0x19d 0x03 0x1b 0x09 0x19d>; - phandle = <0x36e>; - }; - - i2c7m1-xfer { - rockchip,pins = <0x04 0x13 0x09 0x19d 0x04 0x14 0x09 0x19d>; - phandle = <0x370>; - }; - - i2c7m0-xfer { - rockchip,pins = <0x01 0x18 0x09 0x19d 0x01 0x19 0x09 0x19d>; - phandle = <0x185>; - }; - }; - - pwm2 { - - pwm2m2-pins { - rockchip,pins = <0x04 0x12 0x0b 0x198>; - phandle = <0x3c8>; - }; - - pwm2m1-pins { - rockchip,pins = <0x03 0x09 0x0b 0x198>; - phandle = <0x3c7>; - }; - - pwm2m0-pins { - rockchip,pins = <0x00 0x14 0x03 0x198>; - phandle = <0x80>; - }; - }; - - pcfg-pull-none-drv-level-0 { - drive-strength = <0x00>; - bias-disable; - phandle = <0x2ed>; - }; - - sata1 { - - sata1m1-pins { - rockchip,pins = <0x01 0x01 0x06 0x198>; - phandle = <0x3eb>; - }; - - sata1m0-pins { - rockchip,pins = <0x04 0x0d 0x06 0x198>; - phandle = <0x3ea>; - }; - }; - - pmu { - - pmu-pins { - rockchip,pins = <0x00 0x05 0x03 0x198>; - phandle = <0x3c2>; - }; - }; - - hdmirx { - - hdmirx-det { - rockchip,pins = <0x01 0x1d 0x00 0x198>; - phandle = <0x1b4>; - }; - }; - - uart1 { - - uart1m0-ctsn { - rockchip,pins = <0x02 0x11 0x0a 0x198>; - phandle = <0x423>; - }; - - uart1m1-xfer { - rockchip,pins = <0x01 0x0f 0x0a 0x19e 0x01 0x0e 0x0a 0x19e>; - phandle = <0x160>; - }; - - uart1m0-xfer { - rockchip,pins = <0x02 0x0e 0x0a 0x19e 0x02 0x0f 0x0a 0x19e>; - phandle = <0x422>; - }; - - uart1m2-rtsn { - rockchip,pins = <0x00 0x17 0x0a 0x198>; - phandle = <0x421>; - }; - - uart1m1-rtsn { - rockchip,pins = <0x01 0x1e 0x0a 0x198>; - phandle = <0x41e>; - }; - - uart1m0-rtsn { - rockchip,pins = <0x02 0x10 0x0a 0x198>; - phandle = <0x424>; - }; - - uart1m2-ctsn { - rockchip,pins = <0x00 0x18 0x0a 0x198>; - phandle = <0x420>; - }; - - uart1m1-ctsn { - rockchip,pins = <0x01 0x1f 0x0a 0x198>; - phandle = <0x41d>; - }; - - uart1m2-xfer { - rockchip,pins = <0x00 0x1a 0x0a 0x19e 0x00 0x19 0x0a 0x19e>; - phandle = <0x41f>; - }; - }; - - hdmi { - - hdmim1-rx-cec { - rockchip,pins = <0x03 0x19 0x05 0x198>; - phandle = <0x338>; - }; - - hdmim0-rx-scl { - rockchip,pins = <0x00 0x1a 0x0b 0x198>; - phandle = <0x336>; - }; - - hdmim0-rx-sda { - rockchip,pins = <0x00 0x19 0x0b 0x198>; - phandle = <0x337>; - }; - - hdmim0-tx0-cec { - rockchip,pins = <0x04 0x11 0x05 0x198>; - phandle = <0xf9>; - }; - - hdmim2-rx-cec { - rockchip,pins = <0x01 0x0f 0x05 0x198>; - phandle = <0x342>; - }; - - hdmim1-rx-scl { - rockchip,pins = <0x03 0x1a 0x05 0x19d>; - phandle = <0x33a>; - }; - - hdmim1-rx-sda { - rockchip,pins = <0x03 0x1b 0x05 0x19d>; - phandle = <0x33b>; - }; - - hdmim0-tx0-scl { - rockchip,pins = <0x04 0x0f 0x05 0x19b>; - phandle = <0xfb>; - }; - - hdmim0-tx0-sda { - rockchip,pins = <0x04 0x10 0x05 0x19c>; - phandle = <0xfc>; - }; - - hdmim2-rx-scl { - rockchip,pins = <0x01 0x1e 0x05 0x198>; - phandle = <0x344>; - }; - - hdmim2-rx-sda { - rockchip,pins = <0x01 0x1f 0x05 0x198>; - phandle = <0x345>; - }; - - hdmim0-tx0-hpd { - rockchip,pins = <0x01 0x05 0x05 0x198>; - phandle = <0xfa>; - }; - - hdmim2-rx-hpdin { - rockchip,pins = <0x01 0x0e 0x05 0x198>; - phandle = <0x343>; - }; - - hdmi-debug6 { - rockchip,pins = <0x01 0x00 0x07 0x198>; - phandle = <0x350>; - }; - - hdmim2-tx0-scl { - rockchip,pins = <0x03 0x17 0x05 0x19b>; - phandle = <0x346>; - }; - - hdmim2-tx0-sda { - rockchip,pins = <0x03 0x18 0x05 0x19c>; - phandle = <0x347>; - }; - - hdmi-debug4 { - rockchip,pins = <0x01 0x0b 0x07 0x198>; - phandle = <0x34e>; - }; - - hdmim0-tx1-cec { - rockchip,pins = <0x02 0x14 0x04 0x198>; - phandle = <0x351>; - }; - - hdmim0-tx1-scl { - rockchip,pins = <0x02 0x0d 0x04 0x198>; - phandle = <0x352>; - }; - - hdmim0-tx1-sda { - rockchip,pins = <0x02 0x0c 0x04 0x198>; - phandle = <0x353>; - }; - - hdmi-debug2 { - rockchip,pins = <0x01 0x09 0x07 0x198>; - phandle = <0x34c>; - }; - - hdmim0-tx1-hpd { - rockchip,pins = <0x01 0x06 0x05 0x198>; - phandle = <0x1a9>; - }; - - hdmim1-rx { - rockchip,pins = <0x03 0x19 0x05 0x198 0x03 0x1a 0x05 0x19d 0x03 0x1b 0x05 0x19d 0x03 0x1c 0x05 0x198>; - phandle = <0x1b3>; - }; - - hdmim2-tx1-cec { - rockchip,pins = <0x03 0x14 0x05 0x198>; - phandle = <0x1a8>; - }; - - hdmi-debug0 { - rockchip,pins = <0x01 0x07 0x07 0x198>; - phandle = <0x34a>; - }; - - hdmim2-tx1-scl { - rockchip,pins = <0x01 0x04 0x05 0x19b>; - phandle = <0x348>; - }; - - hdmim2-tx1-sda { - rockchip,pins = <0x01 0x03 0x05 0x19c>; - phandle = <0x349>; - }; - - hdmim1-tx0-cec { - rockchip,pins = <0x00 0x19 0x0d 0x198>; - phandle = <0x33c>; - }; - - hdmim1-tx0-scl { - rockchip,pins = <0x00 0x1d 0x0b 0x19b>; - phandle = <0x33e>; - }; - - hdmim1-tx0-sda { - rockchip,pins = <0x00 0x1c 0x0b 0x19c>; - phandle = <0x33f>; - }; - - hdmim1-tx0-hpd { - rockchip,pins = <0x03 0x1c 0x03 0x198>; - phandle = <0x33d>; - }; - - hdmim0-rx-hpdin { - rockchip,pins = <0x04 0x0e 0x05 0x198>; - phandle = <0x335>; - }; - - hdmi-debug5 { - rockchip,pins = <0x01 0x0c 0x07 0x198>; - phandle = <0x34f>; - }; - - hdmi-debug3 { - rockchip,pins = <0x01 0x0a 0x07 0x198>; - phandle = <0x34d>; - }; - - hdmim1-tx1-cec { - rockchip,pins = <0x00 0x1a 0x0d 0x198>; - phandle = <0x340>; - }; - - hdmi-debug1 { - rockchip,pins = <0x01 0x08 0x07 0x198>; - phandle = <0x34b>; - }; - - hdmim1-tx1-scl { - rockchip,pins = <0x03 0x16 0x05 0x19b>; - phandle = <0x1aa>; - }; - - hdmim1-tx1-sda { - rockchip,pins = <0x03 0x15 0x05 0x19c>; - phandle = <0x1ab>; - }; - - hdmim1-tx1-hpd { - rockchip,pins = <0x03 0x0f 0x05 0x198>; - phandle = <0x341>; - }; - - hdmim1-rx-hpdin { - rockchip,pins = <0x03 0x1c 0x05 0x198>; - phandle = <0x339>; - }; - - hdmim0-rx-cec { - rockchip,pins = <0x04 0x0d 0x05 0x198>; - phandle = <0x334>; - }; - }; - - pcfg-pull-down-drv-level-3 { - drive-strength = <0x03>; - bias-pull-down; - phandle = <0x2fa>; - }; - - pcfg-pull-up-drv-level-6 { - drive-strength = <0x06>; - phandle = <0x19a>; - bias-pull-up; - }; - - i2c5 { - - i2c5m3-xfer { - rockchip,pins = <0x01 0x0e 0x09 0x19d 0x01 0x0f 0x09 0x19d>; - phandle = <0x368>; - }; - - i2c5m2-xfer { - rockchip,pins = <0x04 0x06 0x09 0x19d 0x04 0x07 0x09 0x19d>; - phandle = <0x367>; - }; - - i2c5m1-xfer { - rockchip,pins = <0x04 0x0e 0x09 0x19d 0x04 0x0f 0x09 0x19d>; - phandle = <0x366>; - }; - - i2c5m0-xfer { - rockchip,pins = <0x03 0x17 0x09 0x19d 0x03 0x18 0x09 0x19d>; - phandle = <0x14d>; - }; - - i2c5m4-xfer { - rockchip,pins = <0x02 0x0e 0x09 0x19d 0x02 0x0f 0x09 0x19d>; - phandle = <0x369>; - }; - }; - - pcfg-pull-none-drv-level-9 { - drive-strength = <0x09>; - bias-disable; - phandle = <0x453>; - }; - - pdm0 { - - pdm0m1-sdi3 { - rockchip,pins = <0x00 0x1e 0x02 0x198>; - phandle = <0x3ba>; - }; - - pdm0m1-clk { - rockchip,pins = <0x00 0x10 0x02 0x198>; - phandle = <0x3b4>; - }; - - pdm0m1-sdi1 { - rockchip,pins = <0x00 0x18 0x02 0x198>; - phandle = <0x3b8>; - }; - - pdm0m0-sdi3 { - rockchip,pins = <0x01 0x1b 0x03 0x198>; - phandle = <0x137>; - }; - - pdm0m0-sdi1 { - rockchip,pins = <0x01 0x19 0x03 0x198>; - phandle = <0x135>; - }; - - pdm0m1-clk1 { - rockchip,pins = <0x00 0x14 0x02 0x198>; - phandle = <0x3b5>; - }; - - pdm0m1-idle { - rockchip,pins = <0x00 0x10 0x00 0x198 0x00 0x14 0x00 0x198>; - phandle = <0x3b6>; - }; - - pdm0m0-clk1 { - rockchip,pins = <0x01 0x14 0x03 0x198>; - phandle = <0x13a>; - }; - - pdm0m1-sdi2 { - rockchip,pins = <0x00 0x1c 0x02 0x198>; - phandle = <0x3b9>; - }; - - pdm0m0-idle { - rockchip,pins = <0x01 0x16 0x00 0x198 0x01 0x14 0x00 0x198>; - phandle = <0x138>; - }; - - pdm0m1-sdi0 { - rockchip,pins = <0x00 0x17 0x02 0x198>; - phandle = <0x3b7>; - }; - - pdm0m0-sdi2 { - rockchip,pins = <0x01 0x1a 0x03 0x198>; - phandle = <0x136>; - }; - - pdm0m0-sdi0 { - rockchip,pins = <0x01 0x1d 0x03 0x198>; - phandle = <0x134>; - }; - - pdm0m0-clk { - rockchip,pins = <0x01 0x16 0x03 0x198>; - phandle = <0x139>; - }; - }; - - pcfg-output-high-pull-none { - bias-disable; - output-high; - phandle = <0x308>; - }; - - pwm0 { - - pwm0m1-pins { - rockchip,pins = <0x01 0x1a 0x0b 0x198>; - phandle = <0x3c3>; - }; - - pwm0m0-pins { - rockchip,pins = <0x00 0x0f 0x03 0x198>; - phandle = <0x7e>; - }; - - pwm0m2-pins { - rockchip,pins = <0x01 0x02 0x0b 0x198>; - phandle = <0x3c4>; - }; - }; - - cif { - - cif-dvp-clk { - rockchip,pins = <0x04 0x08 0x01 0x198 0x04 0x0a 0x01 0x198 0x04 0x0b 0x01 0x198>; - phandle = <0x311>; - }; - - cif-clk { - rockchip,pins = <0x04 0x0c 0x01 0x198>; - phandle = <0x310>; - }; - - cif-dvp-bus8 { - rockchip,pins = <0x04 0x00 0x01 0x198 0x04 0x01 0x01 0x198 0x04 0x02 0x01 0x198 0x04 0x03 0x01 0x198 0x04 0x04 0x01 0x198 0x04 0x05 0x01 0x198 0x04 0x06 0x01 0x198 0x04 0x07 0x01 0x198>; - phandle = <0x313>; - }; - - cif-dvp-bus16 { - rockchip,pins = <0x03 0x14 0x01 0x198 0x03 0x15 0x01 0x198 0x03 0x16 0x01 0x198 0x03 0x17 0x01 0x198 0x03 0x18 0x01 0x198 0x03 0x19 0x01 0x198 0x03 0x1a 0x01 0x198 0x03 0x1b 0x01 0x198>; - phandle = <0x312>; - }; - }; - - can1 { - - can1m1-pins { - rockchip,pins = <0x04 0x0a 0x0c 0x198 0x04 0x0b 0x0c 0x198>; - phandle = <0x146>; - }; - - can1m0-pins { - rockchip,pins = <0x03 0x0d 0x09 0x198 0x03 0x0e 0x09 0x198>; - phandle = <0x30e>; - }; - }; - - pcfg-output-low-pull-none { - bias-disable; - phandle = <0x30c>; - output-low; - }; - - gpio@fec40000 { - gpio-controller; - interrupts = <0x00 0x118 0x04>; - clocks = <0x02 0x81 0x02 0x82>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfec40000 0x00 0x100>; - phandle = <0x181>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x60 0x20>; - interrupt-controller; - }; - - spi4 { - - spi4m0-cs0 { - rockchip,pins = <0x01 0x13 0x08 0x19a>; - phandle = <0x187>; - }; - - spi4m1-cs0 { - rockchip,pins = <0x03 0x03 0x08 0x19a>; - phandle = <0x413>; - }; - - spi4m2-pins { - rockchip,pins = <0x01 0x02 0x08 0x19a 0x01 0x00 0x08 0x19a 0x01 0x01 0x08 0x19a>; - phandle = <0x415>; - }; - - spi4m0-cs1 { - rockchip,pins = <0x01 0x14 0x08 0x19a>; - phandle = <0x188>; - }; - - spi4m1-pins { - rockchip,pins = <0x03 0x02 0x08 0x19a 0x03 0x00 0x08 0x19a 0x03 0x01 0x08 0x19a>; - phandle = <0x412>; - }; - - spi4m2-cs0 { - rockchip,pins = <0x01 0x03 0x08 0x19a>; - phandle = <0x416>; - }; - - spi4m0-pins { - rockchip,pins = <0x01 0x12 0x08 0x19a 0x01 0x10 0x08 0x19a 0x01 0x11 0x08 0x19a>; - phandle = <0x189>; - }; - - spi4m1-cs1 { - rockchip,pins = <0x03 0x04 0x08 0x19a>; - phandle = <0x414>; - }; - }; - - pcfg-pull-down-drv-level-15 { - drive-strength = <0x0f>; - bias-pull-down; - phandle = <0x46b>; - }; - - pcfg-pull-up-smt { - input-schmitt-enable; - phandle = <0x2fe>; - bias-pull-up; - }; - - pcfg-pull-down-drv-level-1 { - drive-strength = <0x01>; - bias-pull-down; - phandle = <0x2f8>; - }; - - pcfg-pull-up-drv-level-4 { - drive-strength = <0x04>; - phandle = <0x2f5>; - bias-pull-up; - }; - - wireless-wlan { - - wifi-host-wake-irq { - rockchip,pins = <0x00 0x0a 0x00 0x198>; - phandle = <0x1ea>; - }; - }; - - wdt-pc9202 { - - wdt-en-base { - rockchip,pins = <0x00 0x14 0x00 0x198>; - phandle = <0x14c>; - }; - }; - - pcfg-pull-none-drv-level-0-smt { - drive-strength = <0x00>; - bias-disable; - input-schmitt-enable; - phandle = <0x300>; - }; - - i2s3 { - - i2s3-sdi { - rockchip,pins = <0x03 0x04 0x03 0x198>; - phandle = <0x12f>; - }; - - i2s3-idle { - rockchip,pins = <0x03 0x02 0x00 0x198 0x03 0x01 0x00 0x198>; - phandle = <0x131>; - }; - - i2s3-sclk { - rockchip,pins = <0x03 0x01 0x03 0x19d>; - phandle = <0x133>; - }; - - i2s3-lrck { - rockchip,pins = <0x03 0x02 0x03 0x19d>; - phandle = <0x132>; - }; - - i2s3-sdo { - rockchip,pins = <0x03 0x03 0x03 0x198>; - phandle = <0x130>; - }; - - i2s3-mclk { - rockchip,pins = <0x03 0x00 0x03 0x19d>; - phandle = <0x38e>; - }; - }; - - pcfg-pull-none-drv-level-14 { - drive-strength = <0x0e>; - bias-disable; - phandle = <0x458>; - }; - }; - - rkcif-mipi-lvds4-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a1>; - phandle = <0x473>; - }; - - bt-sco { - #sound-dai-cells = <0x01>; - compatible = "delta,dfbmcs320"; - status = "disabled"; - phandle = <0x1d2>; - }; - - phy@fed80000 { - svid = <0xff01>; - orientation-switch; - sbu2-dc-gpios = <0x10d 0x07 0x00>; - clock-names = "refclk\0immortal\0pclk\0utmi"; - resets = <0x02 0x28 0x02 0x29 0x02 0x2a 0x02 0x2b 0x02 0x482>; - clocks = <0x02 0x2b6 0x02 0x27f 0x02 0x269 0x18d>; - compatible = "rockchip,rk3588-usbdp-phy"; - status = "okay"; - reg = <0x00 0xfed80000 0x00 0x10000>; - phandle = <0x2ea>; - rockchip,usb-grf = <0x74>; - reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; - rockchip,u2phy-grf = <0x18b>; - sbu1-dc-gpios = <0x10d 0x06 0x00>; - rockchip,usbdpphy-grf = <0x18c>; - rockchip,vo-grf = <0xf5>; - - dp-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0xf6>; - }; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@1 { - remote-endpoint = <0x18f>; - reg = <0x01>; - phandle = <0x17f>; - }; - - endpoint@0 { - remote-endpoint = <0x18e>; - reg = <0x00>; - phandle = <0x17e>; - }; - }; - - u3-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x67>; - }; - }; - - interrupt-controller@fe600000 { - #address-cells = <0x02>; - interrupts = <0x01 0x09 0x04>; - #size-cells = <0x02>; - compatible = "arm,gic-v3"; - ranges; - #interrupt-cells = <0x03>; - reg = <0x00 0xfe600000 0x00 0x10000 0x00 0xfe680000 0x00 0x100000>; - phandle = <0x01>; - interrupt-controller; - - msi-controller@fe640000 { - msi-controller; - compatible = "arm,gic-v3-its"; - reg = <0x00 0xfe640000 0x00 0x20000>; - phandle = <0x106>; - #msi-cells = <0x01>; - }; - - }; - - pcie-essd { - regulator-max-microvolt = <0x2625a0>; - enable-active-high; - regulator-min-microvolt = <0x2625a0>; - regulator-name = "pcie_essd"; - startup-delay-us = <0x1388>; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x1ba>; - vin-supply = <0x1cd>; - gpios = <0x181 0x0f 0x00>; - }; - - iommu@fdab9000 { - clock-names = "aclk0\0aclk1\0aclk2\0iface0\0iface1\0iface2"; - interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; - clocks = <0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "npu0_mmu\0npu1_mmu\0npu2_mmu"; - reg = <0x00 0xfdab9000 0x00 0x100 0x00 0xfdaba000 0x00 0x100 0x00 0xfdaca000 0x00 0x100 0x00 0xfdada000 0x00 0x100>; - phandle = <0xb2>; - }; - - otp@fecc0000 { - #address-cells = <0x01>; - clock-names = "otpc\0apb\0arb\0phy"; - resets = <0x02 0x12a 0x02 0x129 0x02 0x12b>; - clocks = <0x02 0x96 0x02 0x95 0x02 0x97 0x02 0x99>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-otp"; - reg = <0x00 0xfecc0000 0x00 0x400>; - phandle = <0x2e7>; - reset-names = "otpc\0apb\0arb"; - - id@7 { - reg = <0x07 0x10>; - phandle = <0x2a>; - }; - - cpul-opp-info@3d { - reg = <0x3d 0x06>; - phandle = <0x20>; - }; - - cpub1-leakage@18 { - reg = <0x18 0x01>; - phandle = <0x27>; - }; - - vop-opp-info@61 { - reg = <0x61 0x06>; - phandle = <0x2e8>; - }; - - cpul-leakage@19 { - reg = <0x19 0x01>; - phandle = <0x1f>; - }; - - codec-leakage@29 { - reg = <0x29 0x01>; - phandle = <0xc6>; - }; - - cpu-version@1c { - bits = <0x03 0x03>; - reg = <0x1c 0x01>; - phandle = <0x2b>; - }; - - cpub0-leakage@17 { - reg = <0x17 0x01>; - phandle = <0x24>; - }; - - log-leakage@1a { - reg = <0x1a 0x01>; - phandle = <0x44>; - }; - - cpu-code@2 { - reg = <0x02 0x02>; - phandle = <0x2c>; - }; - - package-serial-number-low@6 { - bits = <0x05 0x03>; - reg = <0x06 0x01>; - phandle = <0xd4>; - }; - - npu-opp-info@55 { - reg = <0x55 0x06>; - phandle = <0xb5>; - }; - - package-serial-number-high@5 { - bits = <0x00 0x01>; - reg = <0x05 0x01>; - phandle = <0xd5>; - }; - - cpub01-opp-info@43 { - reg = <0x43 0x06>; - phandle = <0x25>; - }; - - dmc-opp-info@5b { - reg = <0x5b 0x06>; - phandle = <0x45>; - }; - - npu-leakage@28 { - reg = <0x28 0x01>; - phandle = <0xb4>; - }; - - gpu-leakage@1b { - reg = <0x1b 0x01>; - phandle = <0x63>; - }; - - specification-serial-number@6 { - bits = <0x00 0x05>; - reg = <0x06 0x01>; - phandle = <0x21>; - }; - - venc-opp-info@67 { - reg = <0x67 0x06>; - phandle = <0xc7>; - }; - - gpu-opp-info@4f { - reg = <0x4f 0x06>; - phandle = <0x64>; - }; - - cpub23-opp-info@49 { - reg = <0x49 0x06>; - phandle = <0x28>; - }; - }; - - i2s@fddf0000 { - power-domains = <0x60 0x1a>; - rockchip,always-on; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x243>; - assigned-clock-parents = <0x02 0x07>; - resets = <0x02 0x3e8>; - interrupts = <0x00 0xb9 0x04>; - clocks = <0x02 0x246 0x02 0x246 0x02 0x248>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - rockchip,playback-only; - status = "okay"; - reg = <0x00 0xfddf0000 0x00 0x1000>; - phandle = <0x1d3>; - dmas = <0xf2 0x02>; - reset-names = "tx-m"; - rockchip,hdmi-path; - }; - - dma-controller@fea10000 { - clock-names = "apb_pclk"; - interrupts = <0x00 0x56 0x04 0x00 0x57 0x04>; - clocks = <0x02 0x78>; - arm,pl330-periph-burst; - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xfea10000 0x00 0x4000>; - phandle = <0x7c>; - #dma-cells = <0x01>; - }; - - pwm@febd0000 { - pinctrl-names = "active"; - pinctrl-0 = <0x169>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15a 0x04>; - clocks = <0x02 0x54 0x02 0x53>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebd0000 0x00 0x10>; - phandle = <0x2d2>; - }; - - rkvenc-ccu { - compatible = "rockchip,rkv-encoder-v2-ccu"; - status = "okay"; - phandle = <0xc3>; - }; - - syscon@fd58c000 { - compatible = "rockchip,rk3588-sys-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd58c000 0x00 0x1000>; - phandle = <0xc8>; - - rgb { - pinctrl-names = "default"; - pinctrl-0 = <0x71>; - compatible = "rockchip,rk3588-rgb"; - status = "disabled"; - phandle = <0x25c>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@2 { - remote-endpoint = <0x3d>; - status = "disabled"; - reg = <0x02>; - phandle = <0xf0>; - }; - }; - }; - }; - }; - - spi@fe2b0000 { - #address-cells = <0x01>; - clock-names = "clk_sfc\0hclk_sfc"; - assigned-clocks = <0x02 0x13d>; - assigned-clock-rates = <0x5f5e100>; - interrupts = <0x00 0xce 0x04>; - clocks = <0x02 0x13d 0x02 0x13e>; - #size-cells = <0x00>; - compatible = "rockchip,sfc"; - status = "disabled"; - reg = <0x00 0xfe2b0000 0x00 0x4000>; - phandle = <0x292>; - }; - - qos@fdf82200 { - compatible = "syscon"; - reg = <0x00 0xfdf82200 0x00 0x20>; - phandle = <0x9e>; - }; - - mmc@fe2c0000 { - power-domains = <0x60 0x28>; - fifo-depth = <0x100>; - pinctrl-names = "default"; - pinctrl-0 = <0x114 0x115 0x116 0x117>; - clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; - cap-sd-highspeed; - vqmmc-supply = <0x118>; - no-mmc; - bus-width = <0x04>; - no-sdio; - interrupts = <0x00 0xcb 0x04>; - clocks = <0x0e 0x17 0x0e 0x09 0x02 0x2c2 0x02 0x2c3>; - compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; - status = "okay"; - disable-wp; - reg = <0x00 0xfe2c0000 0x00 0x4000>; - phandle = <0x293>; - sd-uhs-sdr104; - max-frequency = <0x8f0d180>; - cap-mmc-highspeed; - }; - - serial@feb80000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x164>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x150 0x04>; - clocks = <0x02 0xc7 0x02 0xaf>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeb80000 0x00 0x100>; - phandle = <0x2cd>; - dmas = <0xf1 0x0b 0xf1 0x0c>; - reg-shift = <0x02>; - }; - - phy@fee10000 { - rockchip,pipe-grf = <0x76>; - clock-names = "refclk\0apbclk\0phpclk"; - assigned-clocks = <0x02 0x2be>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x02 0x20006 0x02 0x4d7>; - clocks = <0x02 0x2be 0x02 0x186 0x02 0x166>; - #phy-cells = <0x01>; - compatible = "rockchip,rk3588-naneng-combphy"; - status = "disabled"; - rockchip,pipe-phy-grf = <0x1cb>; - reg = <0x00 0xfee10000 0x00 0x100>; - phandle = <0x1bc>; - reset-names = "combphy-apb\0combphy"; - rockchip,pcie1ln-sel-bits = <0x100 0x00 0x00 0x00>; - }; - - can@fea60000 { - pinctrl-names = "default"; - pinctrl-0 = <0x146>; - clock-names = "baudclk\0apb_pclk"; - assigned-clocks = <0x02 0x72>; - assigned-clock-rates = <0xbebc200>; - resets = <0x02 0xbb 0x02 0xba>; - interrupts = <0x00 0x156 0x04>; - clocks = <0x02 0x72 0x02 0x71>; - compatible = "rockchip,can-2.0"; - status = "okay"; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - reg = <0x00 0xfea60000 0x00 0x1000>; - phandle = <0x2a1>; - reset-names = "can\0can-apb"; - }; - - pdm@fe4c0000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x140 0x141>; - pinctrl-0 = <0x13b 0x13c 0x13d 0x13e>; - clock-names = "pdm_clk\0pdm_hclk"; - assigned-clocks = <0x02 0x3b>; - assigned-clock-parents = <0x02 0x05>; - clocks = <0x02 0x3b 0x02 0x3a>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-pdm"; - pinctrl-1 = <0x13f>; - status = "disabled"; - reg = <0x00 0xfe4c0000 0x00 0x1000>; - phandle = <0x29b>; - dmas = <0xf1 0x04>; - }; - - rkcif-mipi-lvds3-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x57>; - phandle = <0x239>; - }; - - qos@fdf66e00 { - compatible = "syscon"; - reg = <0x00 0xfdf66e00 0x00 0x20>; - phandle = <0x9a>; - }; - - usb@fc800000 { - power-domains = <0x60 0x1f>; - phy-names = "usb2-phy"; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - companion = <0x6b>; - interrupts = <0x00 0xd7 0x04>; - clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; - compatible = "rockchip,rk3588-ehci\0generic-ehci"; - status = "okay"; - phys = <0x6c>; - reg = <0x00 0xfc800000 0x00 0x40000>; - phandle = <0x254>; - }; - - i2c@fd880000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x77>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xc0022 0x02 0xc0021>; - interrupts = <0x00 0x13d 0x04>; - clocks = <0x02 0x287 0x02 0x286>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfd880000 0x00 0x1000>; - phandle = <0x25f>; - reset-names = "i2c\0apb"; - - hym8563@51 { - pinctrl-names = "default"; - clock-output-names = "hym8563"; - pinctrl-0 = <0x7a>; - wakeup-source; - interrupts = <0x08 0x08>; - #clock-cells = <0x00>; - interrupt-parent = <0x7b>; - clock-frequency = <0x8000>; - compatible = "haoyu,hym8563"; - status = "okay"; - reg = <0x51>; - phandle = <0x1e4>; - }; - - rk8602@42 { - regulator-max-microvolt = <0x100590>; - regulator-boot-on; - rockchip,suspend-voltage-selector = <0x01>; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_cpu_big0_s0"; - regulator-ramp-delay = <0x8fc>; - compatible = "rockchip,rk8602"; - reg = <0x42>; - phandle = <0x18>; - vin-supply = <0x78>; - regulator-compatible = "rk860x-reg"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk8603@43 { - regulator-max-microvolt = <0x100590>; - regulator-boot-on; - rockchip,suspend-voltage-selector = <0x01>; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_cpu_big1_s0"; - regulator-ramp-delay = <0x8fc>; - compatible = "rockchip,rk8603"; - reg = <0x43>; - phandle = <0x1c>; - vin-supply = <0x78>; - regulator-compatible = "rk860x-reg"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - pc9202@3c { - index = <0x00>; - compatible = "firefly,pc9202"; - status = "okay"; - wd-en-gpio = <0x79 0x15 0x00>; - driver-names = "wdt_core"; - reg = <0x3c>; - }; - }; - - rkcif-mipi-lvds3-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x57>; - phandle = <0x237>; - }; - - serial@fd890000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x7d>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14b 0x04>; - clocks = <0x02 0x2ae 0x02 0x2af>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfd890000 0x00 0x100>; - phandle = <0x260>; - dmas = <0x7c 0x06 0x7c 0x07>; - reg-shift = <0x02>; - }; - - qos@fdf70000 { - compatible = "syscon"; - reg = <0x00 0xfdf70000 0x00 0x20>; - phandle = <0x85>; - }; - - gpu-opp-table { - rockchip,pvtm-offset = <0x1c>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,pvtm-hw = <0x04>; - nvmem-cells = <0x63 0x64 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; - rockchip,pvtm-thermal-zone = "gpu-thermal"; - rockchip,high-temp-max-freq = "\0\f5"; - rockchip,opp-clocks = <0x02 0x114>; - rockchip,pvtm-freq = "\0\f5"; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0x65>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; - phandle = <0x61>; - rockchip,pvtm-temp-prop = <0xffffff79 0xffffff79>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0x61a80>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-j-m-700000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x29b92700>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-300000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x11e1a300>; - opp-supported-hw = <0xf9 0xffff>; - }; - - opp-500000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x1dcd6500>; - opp-supported-hw = <0xf9 0xffff>; - }; - - opp-m-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-supported-hw = <0x02 0xffff>; - }; - - opp-j-850000000 { - opp-microvolt = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-hz = <0x00 0x32a9f880>; - opp-supported-hw = <0x04 0xffff>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L3 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - }; - - opp-j-m-400000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x17d78400>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-700000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - opp-hz = <0x00 0x29b92700>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-900000000 { - opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-hz = <0x00 0x35a4e900>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - }; - - opp-m-1000000000 { - opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - opp-hz = <0x00 0x3b9aca00>; - opp-supported-hw = <0x02 0xffff>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - }; - - opp-400000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x17d78400>; - opp-supported-hw = <0xf9 0xffff>; - }; - - opp-j-m-300000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x11e1a300>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-600000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - }; - - opp-m-900000000 { - opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-hz = <0x00 0x35a4e900>; - opp-supported-hw = <0x02 0xffff>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - }; - - opp-1000000000 { - opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - opp-hz = <0x00 0x3b9aca00>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - }; - - opp-j-m-500000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x1dcd6500>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L4 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L2 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L3 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; - opp-microvolt-L1 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - }; - }; - - csi2-dphy1-hw@fedc8000 { - clock-names = "pclk"; - resets = <0x02 0x19 0x02 0x18>; - clocks = <0x02 0x10d>; - compatible = "rockchip,rk3588-csi2-dphy-hw"; - status = "okay"; - rockchip,grf = <0x193>; - reg = <0x00 0xfedc8000 0x00 0x8000>; - phandle = <0x2e>; - reset-names = "srst_csiphy1\0srst_p_csiphy1"; - rockchip,sys_grf = <0xc8>; - }; - - hdcp@fde40000 { - power-domains = <0x60 0x19>; - clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; - resets = <0x02 0x37f 0x02 0x37d 0x02 0x37c 0x02 0x37b 0x02 0x381>; - interrupts = <0x00 0x9f 0x04>; - clocks = <0x02 0x1ed 0x02 0x1ef 0x02 0x1ee 0x02 0x1ec 0x02 0x1f1 0x02 0x1f2>; - compatible = "rockchip,rk3588-hdcp"; - status = "disabled"; - reg = <0x00 0xfde40000 0x00 0x80>; - phandle = <0x285>; - reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; - rockchip,vo-grf = <0xf5>; - }; - - iommu@fdbac800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x7f 0x04>; - clocks = <0x02 0x1b2 0x02 0x1b3>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpege3_mmu"; - reg = <0x00 0xfdbac800 0x00 0x40>; - phandle = <0xc0>; - }; - - qos@fdf40400 { - compatible = "syscon"; - reg = <0x00 0xfdf40400 0x00 0x20>; - phandle = <0xa2>; - }; - - rga@fdb70000 { - power-domains = <0x60 0x1e>; - iommus = <0xba>; - clock-names = "aclk_rga3_1\0hclk_rga3_1\0clk_rga3_1"; - interrupts = <0x00 0x73 0x04>; - clocks = <0x02 0x18a 0x02 0x189 0x02 0x18b>; - compatible = "rockchip,rga3_core1"; - status = "okay"; - interrupt-names = "rga3_core1_irq"; - reg = <0x00 0xfdb70000 0x00 0x1000>; - phandle = <0x26a>; - }; - - spi@feb00000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x02>; - pinctrl-0 = <0x14e 0x14f 0x150>; - clock-names = "spiclk\0apb_pclk"; - interrupts = <0x00 0x146 0x04>; - clocks = <0x02 0xa3 0x02 0x9e>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "disabled"; - reg = <0x00 0xfeb00000 0x00 0x1000>; - phandle = <0x2ab>; - dmas = <0x7c 0x0e 0x7c 0x0f>; - }; - - pcie@fe170000 { - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x20 0x2f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x08>; - resets = <0x02 0x20f 0x02 0x21e>; - interrupts = <0x00 0xf3 0x04 0x00 0xf2 0x04 0x00 0xf1 0x04 0x00 0xf0 0x04 0x00 0xef 0x04>; - clocks = <0x02 0x150 0x02 0x155 0x02 0x14b 0x02 0x15b 0x02 0x160 0x02 0x2c4>; - interrupt-map = <0x00 0x00 0x00 0x01 0x1bb 0x00 0x00 0x00 0x00 0x02 0x1bb 0x01 0x00 0x00 0x00 0x03 0x1bb 0x02 0x00 0x00 0x00 0x04 0x1bb 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x02>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - num-lanes = <0x01>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf2000000 0x00 0xf2000000 0x00 0x100000 0x81000000 0x00 0xf2100000 0x00 0xf2100000 0x00 0x100000 0x82000000 0x00 0xf2200000 0x00 0xf2200000 0x00 0xe00000 0xc3000000 0x09 0x80000000 0x09 0x80000000 0x00 0x40000000>; - msi-map = <0x2000 0x106 0x2000 0x1000>; - #interrupt-cells = <0x01>; - status = "disabled"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x1bc 0x02>; - num-viewport = <0x04>; - reg = <0x00 0xfe170000 0x00 0x10000 0x0a 0x40800000 0x00 0x400000>; - linux,pci-domain = <0x02>; - phandle = <0x487>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x08>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0xf0 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x1bb>; - interrupt-controller; - }; - }; - - i2s@fe470000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x11b 0x11c>; - pinctrl-0 = <0x11b 0x11c 0x11d 0x11e>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x31 0x02 0x35>; - assigned-clock-parents = <0x02 0x05 0x02 0x05>; - resets = <0x02 0x77 0x02 0x7a>; - interrupts = <0x00 0xb4 0x04>; - clocks = <0x02 0x33 0x02 0x37 0x02 0x30>; - dma-names = "tx\0rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - pinctrl-1 = <0x11f>; - status = "okay"; - reg = <0x00 0xfe470000 0x00 0x1000>; - phandle = <0x1da>; - dmas = <0x7c 0x00 0x7c 0x01>; - reset-names = "tx-m\0rx-m"; - rockchip,clk-trcm = <0x01>; - }; - - syscon@fd594000 { - compatible = "rockchip,rk3588-litcore-grf\0syscon"; - reg = <0x00 0xfd594000 0x00 0x100>; - phandle = <0x22>; - }; - - csi2-dphy5 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x214>; - }; - - usb@fc840000 { - power-domains = <0x60 0x1f>; - phy-names = "usb2-phy"; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - interrupts = <0x00 0xd8 0x04>; - clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; - compatible = "rockchip,rk3588-ohci\0generic-ohci"; - status = "okay"; - phys = <0x6c>; - reg = <0x00 0xfc840000 0x00 0x40000>; - phandle = <0x6b>; - }; - - syscon@fd5b0000 { - compatible = "rockchip,rk3588-php-grf\0syscon"; - reg = <0x00 0xfd5b0000 0x00 0x1000>; - phandle = <0x76>; - }; - - rkcif-mipi-lvds2-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x55>; - phandle = <0x236>; - }; - - rkisp1-vir1 { - rockchip,hw = <0x5a>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x240>; - }; - - i2c@feaa0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x149>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb1 0x02 0xa9>; - interrupts = <0x00 0x13f 0x04>; - clocks = <0x02 0x8e 0x02 0x86>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "disabled"; - reg = <0x00 0xfeaa0000 0x00 0x1000>; - phandle = <0x2a5>; - reset-names = "i2c\0apb"; - }; - - dmc { - downdifferential = <0x14>; - clock-names = "dmc_clk"; - interrupts = <0x00 0x49 0x04>; - clocks = <0x0e 0x04>; - upthreshold = <0x28>; - center-supply = <0x42>; - devfreq-events = <0x40>; - compatible = "rockchip,rk3588-dmc"; - status = "disabled"; - interrupt-names = "complete"; - mem-supply = <0x43>; - phandle = <0x21f>; - operating-points-v2 = <0x41>; - system-status-level = <0x01 0x04 0x08 0x08 0x02 0x01 0x10 0x04 0x10000 0x04 0x80000 0x04 0x1000 0x08 0x4000 0x08 0x2000 0x08 0xc00 0x08 0x40000 0x08 0x200000 0x08>; - auto-freq-en = <0x01>; - }; - - hdmi1-sound { - rockchip,jack-det; - rockchip,cpu = <0x1e0>; - rockchip,codec = <0x1e1>; - rockchip,card-name = "rockchip-hdmi1"; - compatible = "rockchip,hdmi"; - status = "disabled"; - phandle = <0x4a8>; - rockchip,mclk-fs = <0x80>; - }; - - qos@fdf3d800 { - compatible = "syscon"; - reg = <0x00 0xfdf3d800 0x00 0x20>; - phandle = <0xb0>; - }; - - mipi-dcphy-dummy { - phandle = <0x223>; - }; - - jpege-core@fdbac000 { - power-domains = <0x60 0x15>; - iommus = <0xc0>; - rockchip,ccu = <0xbd>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1b2>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2d0 0x02 0x2d1>; - interrupts = <0x00 0x80 0x04>; - clocks = <0x02 0x1b2 0x02 0x1b3>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-jpege-core"; - status = "okay"; - interrupt-names = "irq_jpege3"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdbac000 0x00 0x400>; - phandle = <0x270>; - reset-names = "video_a\0video_h"; - }; - - iommu@fdce0800 { - power-domains = <0x60 0x1b>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x71 0x04>; - clocks = <0x02 0x1e4 0x02 0x1e5>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "cif_mmu"; - reg = <0x00 0xfdce0800 0x00 0x100 0x00 0xfdce0900 0x00 0x100>; - phandle = <0x50>; - }; - - qos@fdf35400 { - compatible = "syscon"; - reg = <0x00 0xfdf35400 0x00 0x20>; - phandle = <0x89>; - }; - - syscon@fd5a8000 { - clocks = <0x73>; - compatible = "rockchip,rk3588-vo-grf\0syscon"; - reg = <0x00 0xfd5a8000 0x00 0x100>; - phandle = <0xd8>; - }; - - dp0-sound { - rockchip,jack-det; - rockchip,cpu = <0x1d5>; - rockchip,codec = <0x1d6 0x01>; - rockchip,card-name = "rockchip-dp0"; - compatible = "rockchip,hdmi"; - status = "disabled"; - phandle = <0x49c>; - rockchip,mclk-fs = <0x200>; - }; - - rkcif-mipi-lvds4 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x1a1>; - }; - - usb@fc880000 { - power-domains = <0x60 0x1f>; - phy-names = "usb2-phy"; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - companion = <0x6e>; - interrupts = <0x00 0xda 0x04>; - clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; - compatible = "rockchip,rk3588-ehci\0generic-ehci"; - status = "okay"; - phys = <0x6f>; - reg = <0x00 0xfc880000 0x00 0x40000>; - phandle = <0x255>; - }; - - qos@fdf62000 { - compatible = "syscon"; - reg = <0x00 0xfdf62000 0x00 0x20>; - phandle = <0x8b>; - }; - - syscon@fd5f0000 { - compatible = "rockchip,rk3588-ioc\0syscon"; - reg = <0x00 0xfd5f0000 0x00 0x10000>; - phandle = <0x196>; - }; - - mipi1-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x225>; - }; - - hdmiphy@fed70000 { - clock-names = "ref\0apb"; - resets = <0x02 0x491 0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041 0x02 0x48f 0x02 0x490>; - clocks = <0x02 0x2b5 0x02 0x268>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-hdptx-phy-hdmi"; - status = "disabled"; - rockchip,grf = <0x1c7>; - reg = <0x00 0xfed70000 0x00 0x2000>; - phandle = <0x1ac>; - reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; - - clk-port { - #clock-cells = <0x00>; - status = "okay"; - phandle = <0x36>; - }; - }; - - i2c@fec80000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x178>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb5 0x02 0xad>; - interrupts = <0x00 0x143 0x04>; - clocks = <0x02 0x92 0x02 0x8a>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfec80000 0x00 0x1000>; - phandle = <0x2df>; - reset-names = "i2c\0apb"; - - imx415@37 { - power-domains = <0x60 0x1b>; - pinctrl-names = "default"; - pinctrl-0 = <0x180>; - clock-names = "xvclk"; - clocks = <0x02 0x100>; - firefly,clkout-enabled-index = <0x00>; - rockchip,camera-module-name = "CMK-OT2022-PX1"; - reset-gpios = <0x182 0x05 0x01>; - rockchip,camera-module-index = <0x00>; - compatible = "sony,imx415"; - rockchip,camera-module-facing = "back"; - power-gpios = <0x181 0x1d 0x00>; - reg = <0x37>; - rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20"; - phandle = <0x2e3>; - - port { - - endpoint { - data-lanes = <0x01 0x02 0x03 0x04>; - remote-endpoint = <0x184>; - phandle = <0x32>; - }; - }; - }; - - es8388@11 { - pinctrl-names = "default"; - pinctrl-0 = <0x17a>; - clock-names = "mclk"; - assigned-clocks = <0x179>; - assigned-clock-rates = <0xbb8000>; - clocks = <0x179>; - #sound-dai-cells = <0x00>; - compatible = "everest,es8388\0everest,es8323"; - status = "okay"; - reg = <0x11>; - phandle = <0x1db>; - }; - - XC7160b@1b { - power-domains = <0x60 0x1b>; - pinctrl-names = "default"; - pinctrl-0 = <0x180>; - clock-names = "xvclk"; - pwdn-gpios = <0xfe 0x04 0x00>; - clocks = <0x02 0x100>; - firefly,clkout-enabled-index = <0x00>; - rockchip,camera-module-name = "NC"; - reset-gpios = <0x182 0x05 0x00>; - rockchip,camera-module-index = <0x00>; - compatible = "firefly,xc7160"; - rockchip,camera-module-facing = "back"; - power-gpios = <0x181 0x1d 0x01>; - reg = <0x1b>; - rockchip,camera-module-lens-name = "NC"; - phandle = <0x2e2>; - - port { - - endpoint { - data-lanes = <0x01 0x02 0x03 0x04>; - remote-endpoint = <0x183>; - phandle = <0x31>; - }; - }; - }; - - fusb302@22 { - pinctrl-names = "default"; - pinctrl-0 = <0x17b>; - interrupts = <0x1b 0x08>; - vbus-supply = <0x17c>; - interrupt-parent = <0x7b>; - compatible = "fcs,fusb302"; - status = "disabled"; - reg = <0x22>; - phandle = <0x2e0>; - - connector { - sink-pdos = <0x4019064>; - power-role = "dual"; - source-pdos = <0x401912c>; - data-role = "dual"; - label = "USB-C"; - try-power-role = "sink"; - compatible = "usb-c-connector"; - op-sink-microwatt = <0xf4240>; - phandle = <0x2e1>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - - endpoint { - remote-endpoint = <0x17e>; - phandle = <0x18e>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - remote-endpoint = <0x17f>; - phandle = <0x18f>; - }; - }; - }; - - altmodes { - #address-cells = <0x01>; - #size-cells = <0x00>; - - altmode@0 { - svid = <0xff01>; - vdo = <0xffffffff>; - reg = <0x00>; - }; - }; - }; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - - endpoint@0 { - remote-endpoint = <0x17d>; - phandle = <0x68>; - }; - }; - }; - }; - }; - - syscon@fd5e8000 { - compatible = "rockchip,mipi-dcphy-grf\0syscon"; - reg = <0x00 0xfd5e8000 0x00 0x4000>; - phandle = <0x190>; - }; - - vbus5v0-typec-pwr-en-regulator { - gpio = <0x182 0x0c 0x00>; - enable-active-high; - regulator-name = "vbus5v0_typec_pwr_en"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x17c>; - }; - - mipi2-csi2-hw@fdd30000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x326>; - interrupts = <0x00 0x93 0x04 0x00 0x94 0x04>; - clocks = <0x02 0x1d1>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd30000 0x00 0x10000>; - phandle = <0x49>; - reset-names = "srst_csihost_p"; - }; - - spdif-rx@fde18000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x262>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x401>; - interrupts = <0x00 0xc9 0x04>; - clocks = <0x02 0x262 0x02 0x261>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; - status = "disabled"; - reg = <0x00 0xfde18000 0x00 0x1000>; - phandle = <0x480>; - dmas = <0x7c 0x17>; - reset-names = "spdifrx-m"; - }; - - syscon@fd5a2000 { - compatible = "rockchip,rk3588-npu-grf\0syscon"; - reg = <0x00 0xfd5a2000 0x00 0x100>; - phandle = <0xb6>; - }; - - rkisp0-vir3 { - rockchip,hw = <0x58>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x23e>; - }; - - qos@fdf66200 { - compatible = "syscon"; - reg = <0x00 0xfdf66200 0x00 0x20>; - phandle = <0x94>; - }; - - rkcif@fdce0000 { - power-domains = <0x60 0x1b>; - iommus = <0x50>; - nvmem-cells = <0x21 0xd4 0xd5>; - clock-names = "aclk_cif\0hclk_cif\0dclk_cif\0iclk_host0\0iclk_host1"; - reg-names = "cif_regs"; - assigned-clocks = <0x02 0x1e3>; - assigned-clock-rates = <0x23c34600>; - resets = <0x02 0x317 0x02 0x318 0x02 0x316 0x02 0x334 0x02 0x335 0x02 0x336 0x02 0x337 0x02 0x338 0x02 0x339>; - interrupts = <0x00 0x9b 0x04>; - clocks = <0x02 0x1e4 0x02 0x1e5 0x02 0x1e3 0x02 0x1cd 0x02 0x1ce>; - compatible = "rockchip,rk3588-cif"; - status = "okay"; - rockchip,grf = <0xc8>; - interrupt-names = "cif-intr"; - nvmem-cell-names = "specification\0package_low\0package_high"; - reg = <0x00 0xfdce0000 0x00 0x800>; - phandle = <0x4f>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_d\0rst_cif_host0\0rst_cif_host1\0rst_cif_host2\0rst_cif_host3\0rst_cif_host4\0rst_cif_host5"; - }; - - edp@fdec0000 { - power-domains = <0x60 0x1a>; - phy-names = "dp"; - clock-names = "dp\0pclk\0spdif\0hclk"; - resets = <0x02 0x3e1 0x02 0x3e0>; - interrupts = <0x00 0xa3 0x04>; - clocks = <0x02 0x211 0x02 0x210 0x02 0x212 0x05>; - compatible = "rockchip,rk3588-edp"; - status = "disabled"; - rockchip,grf = <0xd8>; - phys = <0x101>; - reg = <0x00 0xfdec0000 0x00 0x1000>; - phandle = <0x289>; - reset-names = "dp\0apb"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - remote-endpoint = <0x103>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe1>; - }; - - endpoint@2 { - remote-endpoint = <0x3b>; - status = "disabled"; - reg = <0x02>; - phandle = <0xe7>; - }; - - endpoint@0 { - remote-endpoint = <0x102>; - status = "disabled"; - reg = <0x00>; - phandle = <0xdb>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - phandle = <0x28a>; - }; - }; - }; - }; - - qos@fdf72400 { - compatible = "syscon"; - reg = <0x00 0xfdf72400 0x00 0x20>; - phandle = <0x84>; - }; - - dp@fde60000 { - power-domains = <0x60 0x19>; - clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; - assigned-clocks = <0x02 0x2cd>; - assigned-clock-rates = <0xf42400>; - resets = <0x02 0x389>; - interrupts = <0x00 0xa2 0x04>; - clocks = <0x02 0x1e7 0x02 0x2cd 0x02 0x201 0x02 0x20d 0x04 0x02 0x1eb>; - #sound-dai-cells = <0x01>; - compatible = "rockchip,rk3588-dp"; - status = "disabled"; - phys = <0x1a5>; - reg = <0x00 0xfde60000 0x00 0x4000>; - phandle = <0x1e3>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - remote-endpoint = <0x3e>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe3>; - }; - - endpoint@2 { - remote-endpoint = <0x1a7>; - status = "disabled"; - reg = <0x02>; - phandle = <0xeb>; - }; - - endpoint@0 { - remote-endpoint = <0x1a6>; - status = "disabled"; - reg = <0x00>; - phandle = <0xdd>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - phandle = <0x481>; - }; - }; - }; - }; - - vcc5v0-usbdcin { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_usbdcin"; - compatible = "regulator-fixed"; - phandle = <0x48c>; - vin-supply = <0x1cd>; - }; - - rkvdec-core@fdc48000 { - power-domains = <0x60 0x0f>; - iommus = <0xcc>; - rockchip,ccu = <0xca>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; - reg-names = "regs\0link"; - assigned-clocks = <0x02 0x195 0x02 0x198 0x02 0x196 0x02 0x197>; - rockchip,core-mask = <0x20002>; - rockchip,task-capacity = <0x10>; - rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; - assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; - resets = <0x02 0x293 0x02 0x292 0x02 0x298 0x02 0x296 0x02 0x297>; - interrupts = <0x00 0x61 0x04>; - rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; - clocks = <0x02 0x195 0x02 0x194 0x02 0x198 0x02 0x196 0x02 0x197>; - rockchip,rcb-min-width = <0x200>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x09>; - compatible = "rockchip,rkv-decoder-v2"; - status = "okay"; - interrupt-names = "irq_rkvdec1"; - rockchip,skip-pmu-idle-request; - rockchip,rcb-iova = <0xffe00000 0x100000>; - reg = <0x00 0xfdc48100 0x00 0x400 0x00 0xfdc48000 0x00 0x100>; - phandle = <0x275>; - reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; - rockchip,sram = <0xcd>; - }; - - vcc-1v1-nldo-s3 { - regulator-max-microvolt = <0x10c8e0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x10c8e0>; - regulator-name = "vcc_1v1_nldo_s3"; - compatible = "regulator-fixed"; - phandle = <0x15c>; - vin-supply = <0x78>; - }; - - power-management@fd8d8000 { - compatible = "rockchip,rk3588-pmu\0syscon\0simple-mfd"; - reg = <0x00 0xfd8d8000 0x00 0x400>; - phandle = <0xd9>; - - power-controller { - #address-cells = <0x01>; - #size-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-power-controller"; - status = "okay"; - phandle = <0x60>; - - power-domain@37 { - clocks = <0x02 0x199 0x02 0x140>; - reg = <0x25>; - pm_qos = <0xaf>; - }; - - power-domain@27 { - #address-cells = <0x01>; - clocks = <0x02 0x1e1 0x02 0x1e2 0x02 0x1df 0x02 0x1de 0x02 0x1e5 0x02 0x1e4>; - #size-cells = <0x00>; - reg = <0x1b>; - pm_qos = <0xa2 0xa3 0xa4 0xa5>; - - power-domain@29 { - clocks = <0x02 0x1d6 0x02 0x1d5 0x02 0x1d9 0x02 0x1d8 0x02 0x1e2>; - reg = <0x1d>; - pm_qos = <0xa8 0xa9>; - }; - - power-domain@28 { - clocks = <0x02 0x121 0x02 0x120 0x02 0x1e1 0x02 0x1e2>; - reg = <0x1c>; - pm_qos = <0xa6 0xa7>; - }; - }; - - power-domain@33 { - clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; - reg = <0x21>; - }; - - power-domain@13 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x0d>; - - power-domain@15 { - clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc 0x02 0x195>; - reg = <0x0f>; - pm_qos = <0x8c>; - }; - - power-domain@16 { - #address-cells = <0x01>; - clocks = <0x02 0x1c4 0x02 0x1c5>; - #size-cells = <0x00>; - reg = <0x10>; - pm_qos = <0x8d 0x8e 0x8f>; - - power-domain@17 { - clocks = <0x02 0x1c9 0x02 0x1c4 0x02 0x1c5 0x02 0x1ca>; - reg = <0x11>; - pm_qos = <0x90 0x91 0x92>; - }; - }; - - power-domain@14 { - clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190 0x02 0x18e>; - reg = <0x0e>; - pm_qos = <0x8b>; - }; - }; - - power-domain@31 { - clocks = <0x02 0x166 0x02 0x1a1 0x02 0x1a4 0x02 0x19d 0x02 0x19e 0x02 0x19f 0x02 0x1a0>; - reg = <0x1f>; - pm_qos = <0xab 0xac 0xad 0xae>; - }; - - power-domain@21 { - #address-cells = <0x01>; - clocks = <0x02 0x1be 0x02 0x1bd 0x02 0x1bc 0x02 0x1bf 0x02 0x1aa 0x02 0x1a9 0x02 0x1ac 0x02 0x1ad 0x02 0x1ae 0x02 0x1af 0x02 0x1b0 0x02 0x1b1 0x02 0x1b2 0x02 0x1b3 0x02 0x1b4 0x02 0x1b5 0x02 0x1b7 0x02 0x1b6>; - #size-cells = <0x00>; - reg = <0x15>; - pm_qos = <0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a>; - - power-domain@15 { - clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc>; - reg = <0x0f>; - pm_qos = <0x8c>; - }; - - power-domain@23 { - clocks = <0x02 0x4b 0x02 0x49 0x02 0x1be>; - reg = <0x17>; - pm_qos = <0x9b>; - }; - - power-domain@14 { - clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190>; - reg = <0x0e>; - pm_qos = <0x8b>; - }; - - power-domain@22 { - clocks = <0x02 0x1ba 0x02 0x1b9>; - reg = <0x16>; - pm_qos = <0x9c>; - }; - }; - - power-domain@38 { - clocks = <0x02 0x3c 0x02 0x3d>; - reg = <0x26>; - }; - - power-domain@8 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x08>; - - power-domain@9 { - #address-cells = <0x01>; - clocks = <0x02 0x12f 0x02 0x131 0x02 0x130 0x02 0x126>; - #size-cells = <0x00>; - reg = <0x09>; - pm_qos = <0x82 0x83 0x84>; - - power-domain@11 { - clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; - reg = <0x0b>; - pm_qos = <0x86>; - }; - - power-domain@10 { - clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; - reg = <0x0a>; - pm_qos = <0x85>; - }; - }; - }; - - power-domain@26 { - clocks = <0x02 0x22e 0x02 0x22f 0x02 0x22d 0x02 0x218 0x02 0x217 0x02 0x22b 0x02 0x264>; - reg = <0x1a>; - pm_qos = <0xa0 0xa1>; - }; - - power-domain@34 { - clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; - reg = <0x22>; - }; - - power-domain@24 { - #address-cells = <0x01>; - clocks = <0x02 0x26e 0x02 0x26d 0x02 0x270>; - #size-cells = <0x00>; - reg = <0x18>; - pm_qos = <0x9d 0x9e>; - - power-domain@25 { - clocks = <0x02 0x1f6 0x02 0x1f7 0x02 0x1f5 0x02 0x1f3 0x02 0x1ee 0x02 0x1ed 0x02 0x26d>; - reg = <0x19>; - pm_qos = <0x9f>; - }; - }; - - power-domain@12 { - clocks = <0x02 0x114 0x02 0x115 0x02 0x116>; - reg = <0x0c>; - pm_qos = <0x87 0x88 0x89 0x8a>; - }; - - power-domain@40 { - reg = <0x28>; - pm_qos = <0xb0>; - }; - - power-domain@30 { - clocks = <0x02 0x189 0x02 0x18a>; - reg = <0x1e>; - pm_qos = <0xaa>; - }; - }; - }; - - csi2-dphy3 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x212>; - }; - - qos@fdf3e000 { - compatible = "syscon"; - reg = <0x00 0xfdf3e000 0x00 0x20>; - phandle = <0xac>; - }; - - pwm@fd8b0030 { - pinctrl-names = "active"; - pinctrl-0 = <0x81>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x158 0x04 0x00 0x159 0x04>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfd8b0030 0x00 0x10>; - phandle = <0x264>; - }; - - rkcif-mipi-lvds2-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x55>; - phandle = <0x234>; - }; - - syscon@fd5cc000 { - compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; - reg = <0x00 0xfd5cc000 0x00 0x4000>; - phandle = <0x1c9>; - }; - - vdpu@fdb50400 { - power-domains = <0x60 0x15>; - iommus = <0xb7>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1c0>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2c8 0x02 0x2c9>; - interrupts = <0x00 0x77 0x04>; - clocks = <0x02 0x1c0 0x02 0x1c1>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x00>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-decoder-v2"; - rockchip,resetgroup-node = <0x00>; - status = "okay"; - interrupt-names = "irq_vdpu"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdb50400 0x00 0x400>; - phandle = <0x267>; - reset-names = "shared_video_a\0shared_video_h"; - }; - - qos@fdf60200 { - compatible = "syscon"; - reg = <0x00 0xfdf60200 0x00 0x20>; - phandle = <0x8e>; - }; - - pwm@febe0030 { - pinctrl-names = "active"; - pinctrl-0 = <0x170>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15c 0x04 0x00 0x15d 0x04>; - clocks = <0x02 0x57 0x02 0x56>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebe0030 0x00 0x10>; - phandle = <0x2d8>; - }; - - display-subsystem { - memory-region-names = "drm-logo"; - clock-names = "hdmi0_phy_pll\0hdmi1_phy_pll"; - ports = <0x34>; - memory-region = <0x37>; - clocks = <0x35 0x36>; - compatible = "rockchip,display-subsystem"; - phandle = <0x215>; - - route { - - route-edp1 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - logo,mode = "center"; - status = "disabled"; - phandle = <0x21a>; - }; - - route-hdmi1 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3f>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x21e>; - }; - - route-dp1 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3e>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x21d>; - }; - - route-dsi1 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3a>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x218>; - }; - - route-edp0 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3b>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x219>; - }; - - route-hdmi0 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3c>; - logo,mode = "center"; - status = "okay"; - phandle = <0x21b>; - }; - - route-dp0 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x38>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x216>; - }; - - route-rgb { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3d>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x21c>; - }; - - route-dsi0 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x39>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x217>; - }; - }; - }; - - serial@febc0000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x168>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x154 0x04>; - clocks = <0x02 0xd7 0x02 0xb3>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfebc0000 0x00 0x100>; - phandle = <0x2d1>; - dmas = <0xf2 0x0b 0xf2 0x0c>; - reg-shift = <0x02>; - }; - - adc-keys { - io-channels = <0x1d9 0x01>; - poll-interval = <0x64>; - keyup-threshold-microvolt = <0x1b7740>; - compatible = "adc-keys"; - status = "okay"; - phandle = <0x49e>; - io-channel-names = "buttons"; - - recovery-key { - press-threshold-microvolt = <0x4268>; - label = "F12"; - linux,code = <0x58>; - }; - }; - - pvtm@fdaf0000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-npu-pvtm"; - reg = <0x00 0xfdaf0000 0x00 0x100>; - - pvtm@3 { - clock-names = "clk\0pclk"; - resets = <0x02 0x1de 0x02 0x1dc>; - clocks = <0x02 0x12b 0x02 0x129>; - reg = <0x03>; - reset-names = "rts\0rst-p"; - }; - }; - - codec-digital@fe500000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default"; - pinctrl-0 = <0x144>; - clock-names = "dac\0pclk"; - resets = <0x02 0x84>; - clocks = <0x02 0x29 0x02 0x2f>; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-codec-digital\0rockchip,codec-digital-v1"; - status = "disabled"; - rockchip,grf = <0xc8>; - reg = <0x00 0xfe500000 0x00 0x1000>; - phandle = <0x29e>; - reset-names = "reset"; - rockchip,pwm-output-mode; - }; - - pwm@fd8b0020 { - pinctrl-names = "active"; - pinctrl-0 = <0x80>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x158 0x04>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfd8b0020 0x00 0x10>; - phandle = <0x263>; - }; - - rkcif-mipi-lvds2 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "okay"; - phandle = <0x55>; - - port { - - endpoint { - remote-endpoint = <0x54>; - phandle = <0x4e>; - }; - }; - }; - - pwm@febe0020 { - pinctrl-names = "active"; - pinctrl-0 = <0x16f>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15c 0x04>; - clocks = <0x02 0x57 0x02 0x56>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebe0020 0x00 0x10>; - phandle = <0x2d7>; - }; - - vcc-fan-pwr-en-regulator { - regulator-boot-on; - gpio = <0x182 0x0b 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_fan_pwr_en"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x4a4>; - }; - - iommu@fdba0800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x79 0x04>; - clocks = <0x02 0x1ac 0x02 0x1ad>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpege0_mmu"; - reg = <0x00 0xfdba0800 0x00 0x40>; - phandle = <0xbc>; - }; - - rkcif-mipi-lvds1-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x53>; - phandle = <0x231>; - }; - - arm-pmu { - interrupt-affinity = <0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d>; - interrupts = <0x01 0x07 0x08>; - compatible = "arm,armv8-pmuv3"; - phandle = <0x20c>; - }; - - pvtm@fda40000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-bigcore0-pvtm"; - reg = <0x00 0xfda40000 0x00 0x100>; - - pvtm@0 { - clock-names = "clk\0pclk"; - clocks = <0x02 0x2c6 0x02 0x15>; - reg = <0x00>; - }; - }; - - pwm@fd8b0010 { - pinctrl-names = "active"; - pinctrl-0 = <0x7f>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x158 0x04>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfd8b0010 0x00 0x10>; - phandle = <0x262>; - }; - - i2s@fddc0000 { - power-domains = <0x60 0x19>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x1f9>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x38d>; - interrupts = <0x00 0xb8 0x04>; - clocks = <0x02 0x1fb 0x02 0x1fb 0x02 0x1f0>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - rockchip,playback-only; - status = "disabled"; - reg = <0x00 0xfddc0000 0x00 0x1000>; - phandle = <0x27d>; - dmas = <0xf2 0x00>; - reset-names = "tx-m"; - }; - - qos@fdf61400 { - compatible = "syscon"; - reg = <0x00 0xfdf61400 0x00 0x20>; - phandle = <0x92>; - }; - - syscon@fd5d4000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5d4000 0x00 0x4000>; - phandle = <0x1c8>; - - usb2-phy@4000 { - clock-output-names = "usb480m_phy1"; - clock-names = "phyclk"; - resets = <0x02 0xc0048 0x02 0x489>; - interrupts = <0x00 0x18a 0x04>; - clocks = <0x02 0x2b5>; - #clock-cells = <0x00>; - rockchip,usbctrl-grf = <0x74>; - compatible = "rockchip,rk3588-usb2phy"; - status = "okay"; - reg = <0x4000 0x10>; - phandle = <0x1ca>; - reset-names = "phy\0apb"; - - otg-port { - phy-supply = <0x75>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x1a3>; - }; - }; - }; - - rkisp0-vir1 { - rockchip,hw = <0x58>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x23c>; - }; - - pwm@febe0010 { - pinctrl-names = "active"; - pinctrl-0 = <0x16e>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15c 0x04>; - clocks = <0x02 0x57 0x02 0x56>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebe0010 0x00 0x10>; - phandle = <0x2d6>; - }; - - thermal-zones { - phandle = <0x248>; - - bigcore1-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x02>; - phandle = <0x24d>; - }; - - soc-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x00>; - sustainable-power = <0x834>; - phandle = <0x249>; - - trips { - - trip-point-0 { - temperature = <0x124f8>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x24a>; - }; - - trip-point-1 { - temperature = <0x14c08>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x5e>; - }; - - soc-crit { - temperature = <0x1c138>; - hysteresis = <0x7d0>; - type = "critical"; - phandle = <0x24b>; - }; - }; - - cooling-maps { - map0 { - trip = <0x5e>; - cooling-device = <0x06 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; - - map3 { - trip = <0x5e>; - cooling-device = <0x5f 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; - }; - }; - - npu-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x06>; - phandle = <0x251>; - }; - - center-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x04>; - phandle = <0x24f>; - }; - - gpu-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x05>; - phandle = <0x250>; - }; - - littlecore-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x03>; - phandle = <0x24e>; - }; - - bigcore0-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x01>; - phandle = <0x24c>; - }; - }; - - iommu@fdbdf000 { - power-domains = <0x60 0x10>; - rockchip,shootdown-entire; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x63 0x04 0x00 0x64 0x04>; - clocks = <0x02 0x1c5 0x02 0x1c4>; - rockchip,enable-cmd-retry; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "irq_rkvenc0_mmu0\0irq_rkvenc0_mmu1"; - reg = <0x00 0xfdbdf000 0x00 0x40 0x00 0xfdbdf040 0x00 0x40>; - phandle = <0xc2>; - }; - - iommu@fdcd0f00 { - power-domains = <0x60 0x1d>; - clock-names = "aclk\0iface\0pclk"; - interrupts = <0x00 0x8c 0x04>; - clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "disabled"; - interrupt-names = "fec0_mmu"; - reg = <0x00 0xfdcd0f00 0x00 0x100>; - phandle = <0xd2>; - }; - - vcc5v0-host { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - gpio = <0x182 0x02 0x00>; - regulator-always-on; - enable-active-high; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_host"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x75>; - vin-supply = <0x1dd>; - }; - - qos@fdf66a00 { - compatible = "syscon"; - reg = <0x00 0xfdf66a00 0x00 0x20>; - phandle = <0x98>; - }; - - phy@fed90000 { - clock-names = "refclk\0immortal\0pclk\0utmi"; - resets = <0x02 0x2f 0x02 0x30 0x02 0x31 0x02 0x32 0x02 0x484>; - clocks = <0x02 0x2b6 0x02 0x280 0x02 0x26a 0x1ca>; - compatible = "rockchip,rk3588-usbdp-phy"; - status = "okay"; - rockchip,dp-lane-mux = <0x02 0x03>; - reg = <0x00 0xfed90000 0x00 0x10000>; - phandle = <0x48b>; - rockchip,usb-grf = <0x74>; - reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; - rockchip,u2phy-grf = <0x1c8>; - rockchip,usbdpphy-grf = <0x1c9>; - rockchip,vo-grf = <0xf5>; - - dp-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x1a5>; - }; - - u3-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x1a4>; - }; - }; - - jpege-core@fdba0000 { - power-domains = <0x60 0x15>; - iommus = <0xbc>; - rockchip,ccu = <0xbd>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1ac>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2ca 0x02 0x2cb>; - interrupts = <0x00 0x7a 0x04>; - clocks = <0x02 0x1ac 0x02 0x1ad>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-jpege-core"; - status = "okay"; - interrupt-names = "irq_jpege0"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdba0000 0x00 0x400>; - phandle = <0x26d>; - reset-names = "video_a\0video_h"; - }; - - vcc5v0-sys { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_sys"; - compatible = "regulator-fixed"; - phandle = <0x78>; - vin-supply = <0x1cd>; - }; - - pwm@fd8b0000 { - pinctrl-names = "active"; - pinctrl-0 = <0x7e>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x158 0x04>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfd8b0000 0x00 0x10>; - phandle = <0x261>; - }; - - vop@fdd90000 { - power-domains = <0x60 0x18>; - iommus = <0xd6>; - rockchip,vop-grf = <0xd7>; - clock-names = "aclk_vop\0hclk_vop\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0pclk_vop\0dclk_src_vp0\0dclk_src_vp1\0dclk_src_vp2"; - reg-names = "regs\0gamma_lut"; - assigned-clocks = <0x02 0x270>; - assigned-clock-rates = <0x2cb41780>; - resets = <0x02 0x349 0x02 0x348 0x02 0x34d 0x02 0x350 0x02 0x351 0x02 0x352>; - interrupts = <0x00 0x9c 0x04>; - clocks = <0x02 0x270 0x02 0x26f 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x02 0x26e 0x02 0x271 0x02 0x272 0x02 0x273>; - compatible = "rockchip,rk3588-vop"; - rockchip,pmu = <0xd9>; - status = "okay"; - rockchip,grf = <0xc8>; - reg = <0x00 0xfdd90000 0x00 0x4200 0x00 0xfdd95000 0x00 0x1000>; - phandle = <0x278>; - rockchip,vo1-grf = <0xd8>; - reset-names = "axi\0ahb\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x34>; - - port@0 { - rockchip,primary-plane = <0x02>; - rockchip,plane-mask = <0x05>; - #address-cells = <0x01>; - assigned-clocks = <0x02 0x270>; - assigned-clock-rates = <0x2faf0800>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x279>; - - endpoint@5 { - remote-endpoint = <0xdf>; - reg = <0x05>; - phandle = <0x1ad>; - }; - - endpoint@3 { - remote-endpoint = <0xdd>; - reg = <0x03>; - phandle = <0x1a6>; - }; - - endpoint@1 { - remote-endpoint = <0xdb>; - reg = <0x01>; - phandle = <0x102>; - }; - - endpoint@4 { - remote-endpoint = <0xde>; - reg = <0x04>; - phandle = <0x1b0>; - }; - - endpoint@2 { - remote-endpoint = <0xdc>; - reg = <0x02>; - phandle = <0x3c>; - }; - - endpoint@0 { - remote-endpoint = <0xda>; - reg = <0x00>; - phandle = <0xf7>; - }; - }; - - port@3 { - rockchip,primary-plane = <0x09>; - rockchip,plane-mask = <0x280>; - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x03>; - phandle = <0x27c>; - - endpoint@1 { - remote-endpoint = <0xef>; - reg = <0x01>; - phandle = <0x3a>; - }; - - endpoint@2 { - remote-endpoint = <0xf0>; - reg = <0x02>; - phandle = <0x3d>; - }; - - endpoint@0 { - remote-endpoint = <0xee>; - reg = <0x00>; - phandle = <0x39>; - }; - }; - - port@1 { - rockchip,primary-plane = <0x03>; - rockchip,plane-mask = <0x0a>; - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x01>; - phandle = <0x27a>; - - endpoint@5 { - remote-endpoint = <0xe5>; - reg = <0x05>; - phandle = <0x3f>; - }; - - endpoint@3 { - remote-endpoint = <0xe3>; - reg = <0x03>; - phandle = <0x3e>; - }; - - endpoint@1 { - remote-endpoint = <0xe1>; - reg = <0x01>; - phandle = <0x103>; - }; - - endpoint@4 { - remote-endpoint = <0xe4>; - reg = <0x04>; - phandle = <0x1b1>; - }; - - endpoint@2 { - remote-endpoint = <0xe2>; - reg = <0x02>; - phandle = <0xff>; - }; - - endpoint@0 { - remote-endpoint = <0xe0>; - reg = <0x00>; - phandle = <0x38>; - }; - }; - - port@2 { - rockchip,primary-plane = <0x08>; - rockchip,plane-mask = <0x140>; - #address-cells = <0x01>; - assigned-clocks = <0x02 0x273>; - assigned-clock-parents = <0x02 0x04>; - #size-cells = <0x00>; - reg = <0x02>; - phandle = <0x27b>; - - endpoint@5 { - remote-endpoint = <0xeb>; - reg = <0x05>; - phandle = <0x1a7>; - }; - - endpoint@3 { - remote-endpoint = <0xe9>; - reg = <0x03>; - phandle = <0xf3>; - }; - - endpoint@1 { - remote-endpoint = <0xe7>; - reg = <0x01>; - phandle = <0x3b>; - }; - - endpoint@6 { - remote-endpoint = <0xec>; - reg = <0x06>; - phandle = <0x1b2>; - }; - - endpoint@4 { - remote-endpoint = <0xea>; - reg = <0x04>; - phandle = <0xf4>; - }; - - endpoint@2 { - remote-endpoint = <0xe8>; - reg = <0x02>; - phandle = <0x100>; - }; - - endpoint@0 { - remote-endpoint = <0xe6>; - reg = <0x00>; - phandle = <0xf8>; - }; - - endpoint@7 { - remote-endpoint = <0xed>; - reg = <0x07>; - phandle = <0x1ae>; - }; - }; - }; - }; - - csi2-dphy1 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x210>; - }; - - pwm@febe0000 { - pinctrl-names = "active"; - pinctrl-0 = <0x16d>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15c 0x04>; - clocks = <0x02 0x57 0x02 0x56>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebe0000 0x00 0x10>; - phandle = <0x2d5>; - }; - - usb@fc8c0000 { - power-domains = <0x60 0x1f>; - phy-names = "usb2-phy"; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - interrupts = <0x00 0xdb 0x04>; - clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; - compatible = "rockchip,rk3588-ohci\0generic-ohci"; - status = "okay"; - phys = <0x6f>; - reg = <0x00 0xfc8c0000 0x00 0x40000>; - phandle = <0x6e>; - }; - - qos@fdf40000 { - compatible = "syscon"; - reg = <0x00 0xfdf40000 0x00 0x20>; - phandle = <0xa8>; - }; - - mipi0-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x224>; - }; - - cluster1-opp-table { - rockchip,pvtm-offset = <0x18>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,pvtm-hw = <0x06>; - nvmem-cells = <0x24 0x25 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; - rockchip,pvtm-thermal-zone = "soc-thermal"; - rockchip,pvtm-low-len-sel = <0x03>; - rockchip,high-temp-max-freq = <0x21b100>; - opp-shared; - rockchip,reboot-freq = <0x1b7740>; - rockchip,pvtm-freq = <0x188940>; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0x26>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; - phandle = <0x16>; - rockchip,idle-threshold-freq = <0x21b100>; - rockchip,pvtm-temp-prop = <0x10e 0x10e>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0xf6180>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-j-m-2016000000 { - opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - opp-hz = <0x00 0x7829b800>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - }; - - opp-1200000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1416000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x54667200>; - opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - opp-supported-hw = <0x06 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - }; - - opp-1008000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2256000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8677d400>; - opp-supported-hw = <0xf9 0x13>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1200000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1008000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-816000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2400000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8f0d1800>; - opp-supported-hw = <0xf9 0x80>; - clock-latency-ns = <0x9c40>; - }; - - opp-1800000000 { - opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2208000000 { - opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; - opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; - opp-microvolt-L2 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; - opp-hz = <0x00 0x839b6800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L3 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; - }; - - opp-1608000000 { - opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-408000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1800000000 { - opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - }; - - opp-2352000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8c30ac00>; - opp-supported-hw = <0xf9 0x48>; - clock-latency-ns = <0x9c40>; - }; - - opp-816000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1608000000 { - opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; - - opp-600000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2016000000 { - opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; - opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; - opp-hz = <0x00 0x7829b800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; - opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - }; - - opp-1416000000 { - opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-hz = <0x00 0x54667200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; - opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-408000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0xf9 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - }; - - opp-2304000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x89544000>; - opp-supported-hw = <0xf9 0x24>; - clock-latency-ns = <0x9c40>; - }; - }; - - mmc@fe2d0000 { - power-domains = <0x60 0x25>; - fifo-depth = <0x100>; - pinctrl-names = "default"; - pinctrl-0 = <0x119>; - clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; - interrupts = <0x00 0xcc 0x04>; - clocks = <0x02 0x199 0x02 0x19a 0x02 0x2c0 0x02 0x2c1>; - compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; - status = "disabled"; - reg = <0x00 0xfe2d0000 0x00 0x4000>; - phandle = <0x294>; - max-frequency = <0xbebc200>; - }; - - rkcif-mipi-lvds-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x52>; - phandle = <0x22e>; - }; - - serial@feb90000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x165>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x151 0x04>; - clocks = <0x02 0xcb 0x02 0xb0>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "okay"; - reg = <0x00 0xfeb90000 0x00 0x100>; - phandle = <0x2ce>; - dmas = <0xf1 0x0d 0xf1 0x0e>; - reg-shift = <0x02>; - }; - - i2s@fddf8000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x239>; - assigned-clock-parents = <0x02 0x05>; - rockchip,capture-only; - resets = <0x02 0x3c3>; - interrupts = <0x00 0xbb 0x04>; - clocks = <0x02 0x23c 0x02 0x23c 0x02 0x238>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - status = "okay"; - reg = <0x00 0xfddf8000 0x00 0x1000>; - phandle = <0x1ec>; - dmas = <0xf2 0x15>; - reset-names = "rx-m"; - }; - - phy@fee20000 { - rockchip,pipe-grf = <0x76>; - clock-names = "refclk\0apbclk\0phpclk"; - assigned-clocks = <0x02 0x2bf>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x02 0x20007 0x02 0x4d8>; - clocks = <0x02 0x2bf 0x02 0x187 0x02 0x166>; - #phy-cells = <0x01>; - compatible = "rockchip,rk3588-naneng-combphy"; - status = "disabled"; - rockchip,pipe-phy-grf = <0x195>; - reg = <0x00 0xfee20000 0x00 0x100>; - phandle = <0x70>; - reset-names = "combphy-apb\0combphy"; - rockchip,pcie1ln-sel-bits = <0x100 0x01 0x01 0x00>; - }; - - csi2-dphy0-hw@fedc0000 { - clock-names = "pclk"; - resets = <0x02 0x17 0x02 0x16>; - clocks = <0x02 0x10c>; - compatible = "rockchip,rk3588-csi2-dphy-hw"; - status = "okay"; - rockchip,grf = <0x192>; - reg = <0x00 0xfedc0000 0x00 0x8000>; - phandle = <0x2d>; - reset-names = "srst_csiphy0\0srst_p_csiphy0"; - rockchip,sys_grf = <0xc8>; - }; - - can@fea70000 { - pinctrl-names = "default"; - pinctrl-0 = <0x147>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x02 0xbd 0x02 0xbc>; - interrupts = <0x00 0x157 0x04>; - clocks = <0x02 0x74 0x02 0x73>; - compatible = "rockchip,can-2.0"; - status = "disabled"; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - reg = <0x00 0xfea70000 0x00 0x1000>; - phandle = <0x2a2>; - reset-names = "can\0can-apb"; - }; - - mailbox@fec60000 { - clock-names = "pclk_mailbox"; - interrupts = <0x00 0x3d 0x04 0x00 0x3e 0x04 0x00 0x3f 0x04 0x00 0x40 0x04>; - clocks = <0x02 0x4c>; - #mbox-cells = <0x01>; - compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; - status = "disabled"; - reg = <0x00 0xfec60000 0x00 0x200>; - phandle = <0x2dd>; - }; - - usbdrd3_1 { - #address-cells = <0x02>; - clock-names = "ref\0suspend\0bus"; - clocks = <0x02 0x1a6 0x02 0x1a5 0x02 0x1a4>; - #size-cells = <0x02>; - compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; - ranges; - status = "okay"; - phandle = <0x47a>; - - usb@fc400000 { - power-domains = <0x60 0x1f>; - snps,dis-u1-entry-quirk; - snps,dis_enblslpm_quirk; - phy-names = "usb2-phy\0usb3-phy"; - snps,dis-u2-freeclk-exists-quirk; - phy_type = "utmi_wide"; - resets = <0x02 0x2a7>; - interrupts = <0x00 0xdd 0x04>; - snps,dis-u2-entry-quirk; - compatible = "snps,dwc3"; - snps,parkmode-disable-hs-quirk; - snps,dis-del-phy-power-chg-quirk; - status = "okay"; - snps,parkmode-disable-ss-quirk; - phys = <0x1a3 0x1a4>; - reg = <0x00 0xfc400000 0x00 0x400000>; - phandle = <0x47b>; - dr_mode = "host"; - reset-names = "usb3-otg"; - snps,dis-tx-ipgap-linecheck-quirk; - }; - }; - - sata@fe210000 { - phy-names = "sata-phy"; - clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; - interrupts = <0x00 0x111 0x04>; - clocks = <0x02 0x171 0x02 0x16e 0x02 0x174 0x02 0x163 0x02 0x17e>; - compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; - status = "okay"; - interrupt-names = "hostc"; - phys = <0x108 0x01>; - reg = <0x00 0xfe210000 0x00 0x1000>; - phandle = <0x290>; - ports-implemented = <0x01>; - }; - - leds { - compatible = "gpio-leds"; - status = "okay"; - phandle = <0x497>; - - user { - linux,default-trigger = "ir-user-click"; - label = ":user"; - default-state = "off"; - phandle = <0x499>; - gpios = <0x182 0x03 0x00>; - }; - - power { - linux,default-trigger = "ir-power-click"; - label = ":power"; - default-state = "on"; - status = "disabled"; - phandle = <0x498>; - gpios = <0x7b 0x15 0x00>; - }; - }; - - rkcif-mipi-lvds5-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a2>; - phandle = <0x479>; - }; - - qos@fdf80000 { - compatible = "syscon"; - reg = <0x00 0xfdf80000 0x00 0x20>; - phandle = <0x9f>; - }; - - spdif-tx@fdde0000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x254>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc4 0x04>; - clocks = <0x02 0x257 0x02 0x253>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfdde0000 0x00 0x1000>; - phandle = <0x27e>; - dmas = <0xf1 0x07>; - }; - - qos@fdf35000 { - compatible = "syscon"; - reg = <0x00 0xfdf35000 0x00 0x20>; - phandle = <0x87>; - }; - - psci { - method = "smc"; - compatible = "arm,psci-1.0"; - }; - - rkcif-mipi-lvds { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x52>; - }; - - rga@fdb80000 { - power-domains = <0x60 0x15>; - clock-names = "aclk_rga2\0hclk_rga2\0clk_rga2"; - interrupts = <0x00 0x74 0x04>; - clocks = <0x02 0x1b7 0x02 0x1b6 0x02 0x1b8>; - compatible = "rockchip,rga2_core0"; - status = "okay"; - interrupt-names = "rga2_irq"; - reg = <0x00 0xfdb80000 0x00 0x1000>; - phandle = <0x26b>; - }; - - qos@fdf66800 { - compatible = "syscon"; - reg = <0x00 0xfdf66800 0x00 0x20>; - phandle = <0x97>; - }; - - spi@feb10000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x02>; - pinctrl-0 = <0x151 0x152 0x153>; - clock-names = "spiclk\0apb_pclk"; - interrupts = <0x00 0x147 0x04>; - clocks = <0x02 0xa4 0x02 0x9f>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "disabled"; - reg = <0x00 0xfeb10000 0x00 0x1000>; - phandle = <0x2ac>; - dmas = <0x7c 0x10 0x7c 0x11>; - }; - - rkcif-mipi-lvds4-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a1>; - phandle = <0x472>; - }; - - hdmi@fdea0000 { - power-domains = <0x60 0x1a>; - reg-io-width = <0x04>; - pinctrl-names = "default"; - phy-names = "hdmi"; - pinctrl-0 = <0x1a8 0x1a9 0x1aa 0x1ab>; - clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; - resets = <0x02 0x3d7 0x02 0x49d>; - interrupts = <0x00 0xad 0x04 0x00 0xae 0x04 0x00 0xaf 0x04 0x00 0xb0 0x04 0x00 0x169 0x04>; - clocks = <0x02 0x224 0x02 0x266 0x02 0x225 0x02 0x226 0x02 0x24c 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x36>; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-dw-hdmi"; - status = "disabled"; - rockchip,grf = <0xc8>; - phys = <0x1ac>; - reg = <0x00 0xfdea0000 0x00 0x10000 0x00 0xfdeb0000 0x00 0x10000>; - phandle = <0x1e1>; - reset-names = "ref\0hdp"; - rockchip,vo1_grf = <0xd8>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x482>; - - endpoint@1 { - remote-endpoint = <0x3f>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe5>; - }; - - endpoint@2 { - remote-endpoint = <0x1ae>; - status = "disabled"; - reg = <0x02>; - phandle = <0xed>; - }; - - endpoint@0 { - remote-endpoint = <0x1ad>; - status = "disabled"; - reg = <0x00>; - phandle = <0xdf>; - }; - }; - }; - }; - - pcie@fe180000 { - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x30 0x3f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x08>; - resets = <0x02 0x210 0x02 0x21f>; - interrupts = <0x00 0xf8 0x04 0x00 0xf7 0x04 0x00 0xf6 0x04 0x00 0xf5 0x04 0x00 0xf4 0x04>; - clocks = <0x02 0x151 0x02 0x156 0x02 0x14c 0x02 0x15c 0x02 0x161 0x02 0x2c5>; - interrupt-map = <0x00 0x00 0x00 0x01 0x105 0x00 0x00 0x00 0x00 0x02 0x105 0x01 0x00 0x00 0x00 0x03 0x105 0x02 0x00 0x00 0x00 0x04 0x105 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x02>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - num-lanes = <0x01>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf3000000 0x00 0xf3000000 0x00 0x100000 0x81000000 0x00 0xf3100000 0x00 0xf3100000 0x00 0x100000 0x82000000 0x00 0xf3200000 0x00 0xf3200000 0x00 0xe00000 0xc3000000 0x09 0xc0000000 0x09 0xc0000000 0x00 0x40000000>; - msi-map = <0x3000 0x106 0x3000 0x1000>; - #interrupt-cells = <0x01>; - status = "disabled"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x70 0x02>; - num-viewport = <0x04>; - reg = <0x00 0xfe180000 0x00 0x10000 0x0a 0x40c00000 0x00 0x400000>; - linux,pci-domain = <0x03>; - phandle = <0x28c>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x08>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0xf5 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x105>; - interrupt-controller; - }; - }; - - i2s@fe480000 { - pinctrl-names = "default"; - pinctrl-0 = <0x120 0x121 0x122 0x123 0x124 0x125 0x126 0x127 0x128 0x129>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - resets = <0x02 0xc002a 0x02 0xc002d>; - interrupts = <0x00 0xb5 0x04>; - clocks = <0x02 0x28c 0x02 0x290 0x02 0x288>; - dma-names = "tx\0rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - status = "disabled"; - reg = <0x00 0xfe480000 0x00 0x1000>; - phandle = <0x1d1>; - dmas = <0x7c 0x02 0x7c 0x03>; - reset-names = "tx-m\0rx-m"; - rockchip,clk-trcm = <0x01>; - }; - - syscon@fd5c0000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfd5c0000 0x00 0x100>; - phandle = <0x1cb>; - }; - - i2c@feab0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x14a>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb2 0x02 0xaa>; - interrupts = <0x00 0x140 0x04>; - clocks = <0x02 0x8f 0x02 0x87>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfeab0000 0x00 0x1000>; - phandle = <0x2a6>; - reset-names = "i2c\0apb"; - - gpio@21 { - gpio-controller; - gpio-group-num = <0xc8>; - compatible = "nxp,pca9555"; - status = "okay"; - reg = <0x21>; - phandle = <0x182>; - #gpio-cells = <0x02>; - }; - }; - - iommu@fdcb7f00 { - power-domains = <0x60 0x1b>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x84 0x04>; - clocks = <0x02 0x1de 0x02 0x1df>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "isp0_mmu"; - reg = <0x00 0xfdcb7f00 0x00 0x100>; - phandle = <0xd0>; - }; - - qos@fdf3e600 { - compatible = "syscon"; - reg = <0x00 0xfdf3e600 0x00 0x20>; - phandle = <0xae>; - }; - - syscon@fd5b8000 { - compatible = "rockchip,pcie30-phy-grf\0syscon"; - reg = <0x00 0xfd5b8000 0x00 0x10000>; - phandle = <0x1cc>; - }; - - qos@fdf81200 { - compatible = "syscon"; - reg = <0x00 0xfdf81200 0x00 0x20>; - phandle = <0xa1>; - }; - - mipi5-csi2-hw@fdd60000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x329>; - interrupts = <0x00 0x99 0x04 0x00 0x9a 0x04>; - clocks = <0x02 0x1d4>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd60000 0x00 0x10000>; - phandle = <0x4c>; - reset-names = "srst_csihost_p"; - }; - - qos@fdf72000 { - compatible = "syscon"; - reg = <0x00 0xfdf72000 0x00 0x20>; - phandle = <0x82>; - }; - - timer@feae0000 { - clock-names = "pclk\0timer"; - interrupts = <0x00 0x121 0x04>; - clocks = <0x02 0x5c 0x02 0x5f>; - compatible = "rockchip,rk3588-timer\0rockchip,rk3288-timer"; - reg = <0x00 0xfeae0000 0x00 0x20>; - phandle = <0x2a9>; - }; - - rkcif-mipi-lvds-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x52>; - phandle = <0x22c>; - }; - - syscon@fd5b5000 { - compatible = "rockchip,mipi-dphy-grf\0syscon"; - reg = <0x00 0xfd5b5000 0x00 0x1000>; - phandle = <0x193>; - }; - - i2c@fec90000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x185>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb6 0x02 0xae>; - interrupts = <0x00 0x144 0x04>; - clocks = <0x02 0x93 0x02 0x8b>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "disabled"; - reg = <0x00 0xfec90000 0x00 0x1000>; - phandle = <0x2e4>; - reset-names = "i2c\0apb"; - }; - - avsd-plus@fdb51000 { - power-domains = <0x60 0x15>; - iommus = <0xb7>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1c0>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2c8 0x02 0x2c9>; - interrupts = <0x00 0x77 0x04>; - clocks = <0x02 0x1c0 0x02 0x1c1>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x00>; - rockchip,disable-auto-freq; - compatible = "rockchip,avs-plus-decoder"; - rockchip,resetgroup-node = <0x00>; - status = "disabled"; - interrupt-names = "irq_avsd"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdb51000 0x00 0x200>; - phandle = <0x268>; - reset-names = "shared_video_a\0shared_video_h"; - }; - - dp1-sound { - rockchip,jack-det; - rockchip,cpu = <0x1e2>; - rockchip,codec = <0x1e3 0x01>; - rockchip,card-name = "rockchip,dp1"; - compatible = "rockchip,hdmi"; - status = "disabled"; - phandle = <0x4a9>; - rockchip,mclk-fs = <0x200>; - }; - - mipi1-csi2-hw@fdd20000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x325>; - interrupts = <0x00 0x91 0x04 0x00 0x92 0x04>; - clocks = <0x02 0x1d0>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd20000 0x00 0x10000>; - phandle = <0x48>; - reset-names = "srst_csihost_p"; - }; - - iep@fdbb0000 { - power-domains = <0x60 0x15>; - iommus = <0xc1>; - clock-names = "aclk\0hclk\0sclk"; - assigned-clocks = <0x02 0x1aa>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2d5 0x02 0x2d4 0x02 0x2d6>; - interrupts = <0x00 0x75 0x04>; - clocks = <0x02 0x1aa 0x02 0x1a9 0x02 0x1ab>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x06>; - rockchip,disable-auto-freq; - compatible = "rockchip,iep-v2"; - status = "okay"; - interrupt-names = "irq_iep"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdbb0000 0x00 0x500>; - phandle = <0x271>; - reset-names = "rst_a\0rst_h\0rst_s"; - }; - - dsi@fde20000 { - power-domains = <0x60 0x18>; - #address-cells = <0x01>; - phy-names = "dcphy"; - clock-names = "pclk\0sys_clk"; - resets = <0x02 0x354>; - interrupts = <0x00 0xa7 0x04>; - clocks = <0x02 0x278 0x02 0x27a>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-mipi-dsi2"; - status = "disabled"; - rockchip,grf = <0xd7>; - phys = <0x2f>; - reg = <0x00 0xfde20000 0x00 0x10000>; - phandle = <0x281>; - reset-names = "apb"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x282>; - - endpoint@1 { - remote-endpoint = <0x39>; - status = "disabled"; - reg = <0x01>; - phandle = <0xee>; - }; - - endpoint@0 { - remote-endpoint = <0xf3>; - status = "disabled"; - reg = <0x00>; - phandle = <0xe9>; - }; - }; - }; - }; - - rkcif-mipi-lvds5-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a2>; - phandle = <0x477>; - }; - - edp@fded0000 { - power-domains = <0x60 0x1a>; - phy-names = "dp"; - clock-names = "dp\0pclk\0spdif\0hclk"; - resets = <0x02 0x3e4 0x02 0x3e3>; - interrupts = <0x00 0xa4 0x04>; - clocks = <0x02 0x214 0x02 0x213 0x02 0x215 0x05>; - compatible = "rockchip,rk3588-edp"; - status = "disabled"; - rockchip,grf = <0xd8>; - phys = <0x1af>; - reg = <0x00 0xfded0000 0x00 0x1000>; - phandle = <0x483>; - reset-names = "dp\0apb"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - remote-endpoint = <0x1b1>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe4>; - }; - - endpoint@2 { - remote-endpoint = <0x1b2>; - status = "disabled"; - reg = <0x02>; - phandle = <0xec>; - }; - - endpoint@0 { - remote-endpoint = <0x1b0>; - status = "disabled"; - reg = <0x00>; - phandle = <0xde>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - phandle = <0x484>; - }; - }; - }; - }; - - qos@fdf67000 { - compatible = "syscon"; - reg = <0x00 0xfdf67000 0x00 0x20>; - phandle = <0x9c>; - }; - - qos@fdf64000 { - compatible = "syscon"; - reg = <0x00 0xfdf64000 0x00 0x20>; - phandle = <0x9b>; - }; - - npu-opp-table { - rockchip,pvtm-offset = <0x50>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,init-freq = <0xf4240>; - rockchip,pvtm-hw = <0x06>; - nvmem-cells = <0xb4 0xb5 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; - rockchip,pvtm-thermal-zone = "npu-thermal"; - rockchip,high-temp-max-freq = "\0\f5"; - rockchip,opp-clocks = <0x02 0x12a 0x02 0x12f>; - rockchip,pvtm-freq = "\0\f5"; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0xb6>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; - phandle = <0xb1>; - rockchip,pvtm-temp-prop = <0xffffff8f 0xffffff8f>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0x7a120>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-j-m-700000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x29b92700>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-300000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x11e1a300>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-500000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x1dcd6500>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-j-m-400000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x17d78400>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-700000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x29b92700>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-j-m-950000000 { - opp-microvolt = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - opp-microvolt-L4 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L2 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-hz = <0x00 0x389fd980>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L5 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-microvolt-L3 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L1 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-900000000 { - opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-hz = <0x00 0x35a4e900>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - }; - - opp-j-m-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-400000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x17d78400>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-j-m-300000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x11e1a300>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-600000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-1000000000 { - opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - opp-hz = <0x00 0x3b9aca00>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - }; - - opp-j-m-500000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x1dcd6500>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L4 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; - opp-microvolt-L2 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L3 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; - }; - }; - - syscon@fd590000 { - compatible = "rockchip,rk3588-bigcore0-grf\0syscon"; - reg = <0x00 0xfd590000 0x00 0x100>; - phandle = <0x26>; - }; - - syscon@fd5dc000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5dc000 0x00 0x4000>; - phandle = <0x25e>; - - usb2-phy@c000 { - clock-output-names = "usb480m_phy3"; - clock-names = "phyclk"; - resets = <0x02 0xc004a 0x02 0x48b>; - interrupts = <0x00 0x188 0x04>; - clocks = <0x02 0x2b5>; - #clock-cells = <0x00>; - compatible = "rockchip,rk3588-usb2phy"; - status = "okay"; - reg = <0xc000 0x10>; - phandle = <0x6d>; - reset-names = "phy\0apb"; - - host-port { - phy-supply = <0x75>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x6f>; - }; - }; - }; - - pcie-clk3 { - regulator-boot-on; - regulator-always-on; - regulator-name = "pcie_clk3"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x496>; - gpios = <0xfe 0x09 0x01>; - }; - - pwm@febf0030 { - pinctrl-names = "active"; - pinctrl-0 = <0x174>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15e 0x04 0x00 0x15f 0x04>; - clocks = <0x02 0x5a 0x02 0x59>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebf0030 0x00 0x10>; - phandle = <0x2dc>; - }; - - hwspinlock@fe5a0000 { - compatible = "rockchip,hwspinlock"; - reg = <0x00 0xfe5a0000 0x00 0x100>; - phandle = <0x29f>; - #hwlock-cells = <0x01>; - }; - - rkcif-mipi-lvds4-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a1>; - phandle = <0x474>; - }; - - sram@10f000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "mmio-sram"; - ranges = <0x00 0x00 0x10f000 0x100>; - reg = <0x00 0x10f000 0x00 0x100>; - - sram@0 { - compatible = "arm,scmi-shmem"; - reg = <0x00 0x100>; - phandle = <0x46>; - }; - }; - - hdmirx-controller@fdee0000 { - power-domains = <0x60 0x1a>; - pinctrl-names = "default"; - pinctrl-0 = <0x1b3 0x1b4>; - clock-names = "aclk\0audio\0cr_para\0pclk\0ref\0hclk_s_hdmirx\0hclk_vo1"; - reg-names = "hdmirx_regs"; - resets = <0x02 0x3d9 0x02 0x3da 0x02 0x3db 0x02 0x3b7>; - interrupts = <0x00 0xb1 0x04 0x00 0x1b4 0x04 0x00 0xb3 0x04>; - clocks = <0x02 0x21a 0x02 0x21f 0x02 0x2b2 0x02 0x21b 0x02 0x21c 0x02 0x232 0x05>; - hpd-trigger-level = <0x01>; - #sound-dai-cells = <0x01>; - compatible = "rockchip,rk3588-hdmirx-ctrler\0rockchip,hdmirx-ctrler"; - status = "disabled"; - rockchip,grf = <0xc8>; - interrupt-names = "cec\0hdmi\0dma"; - hdmirx-det-gpios = <0xfe 0x1d 0x01>; - reg = <0x00 0xfdee0000 0x00 0x6000>; - phandle = <0x1eb>; - reset-names = "rst_a\0rst_p\0rst_ref\0rst_biu"; - rockchip,vo1_grf = <0xd8>; - }; - - qos@fdf61000 { - compatible = "syscon"; - reg = <0x00 0xfdf61000 0x00 0x20>; - phandle = <0x90>; - }; - - qos@fdf40600 { - compatible = "syscon"; - reg = <0x00 0xfdf40600 0x00 0x20>; - phandle = <0xa4>; - }; - - syscon@fd588000 { - compatible = "rockchip,rk3588-pmu0-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd588000 0x00 0x2000>; - phandle = <0x25a>; - - reboot-mode { - mode-normal = <0x5242c300>; - mode-loader = <0x5242c301>; - mode-quiescent = <0x5242c30e>; - mode-bootloader = <0x5242c301>; - mode-recovery = <0x5242c303>; - mode-watchdog = <0x5242c308>; - mode-ums = <0x5242c30c>; - mode-fastboot = <0x5242c309>; - offset = <0x80>; - compatible = "syscon-reboot-mode"; - mode-winusb = <0x5242c30f>; - phandle = <0x25b>; - mode-charge = <0x5242c30b>; - mode-panic = <0x5242c307>; - }; - }; - - syscon@fd5a4000 { - compatible = "rockchip,rk3588-vop-grf\0syscon"; - reg = <0x00 0xfd5a4000 0x00 0x2000>; - phandle = <0xd7>; - }; - - iommu@fdb60f00 { - power-domains = <0x60 0x16>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x72 0x04>; - clocks = <0x02 0x1ba 0x02 0x1b9>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "rga3_0_mmu"; - reg = <0x00 0xfdb60f00 0x00 0x100>; - phandle = <0xb9>; - }; - - pwm@febf0020 { - pinctrl-names = "active"; - pinctrl-0 = <0x173>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15e 0x04>; - clocks = <0x02 0x5a 0x02 0x59>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebf0020 0x00 0x10>; - phandle = <0x2db>; - }; - - rkispp@fdcd0000 { - power-domains = <0x60 0x1d>; - iommus = <0xd2>; - clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; - assigned-clocks = <0x02 0x1d6>; - assigned-clock-rates = <0x5f5e100>; - interrupts = <0x00 0x8b 0x04>; - clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; - compatible = "rockchip,rk3588-rkispp"; - status = "disabled"; - interrupt-names = "fec_irq"; - reg = <0x00 0xfdcd0000 0x00 0xf00>; - phandle = <0x5b>; - }; - - tsadc@fec00000 { - pinctrl-names = "gpio\0otpout"; - pinctrl-0 = <0x175>; - clock-names = "tsadc\0apb_pclk"; - rockchip,hw-tshut-polarity = <0x00>; - assigned-clocks = <0x02 0xaa>; - assigned-clock-rates = <0x1e8480>; - resets = <0x02 0xc1 0x02 0xc0>; - interrupts = <0x00 0x18d 0x04>; - rockchip,hw-tshut-mode = <0x00>; - clocks = <0x02 0xaa 0x02 0xa9>; - #thermal-sensor-cells = <0x01>; - compatible = "rockchip,rk3588-tsadc"; - pinctrl-1 = <0x176>; - status = "okay"; - reg = <0x00 0xfec00000 0x00 0x400>; - phandle = <0x5d>; - reset-names = "tsadc\0tsadc-apb"; - rockchip,hw-tshut-temp = <0x1d4c0>; - }; - - iommu@fdbb0800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x75 0x04>; - clocks = <0x02 0x1aa 0x02 0x1a9>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_iep_mmu"; - reg = <0x00 0xfdbb0800 0x00 0x100>; - phandle = <0xc1>; - }; - - phy@fed60000 { - clock-names = "ref\0apb"; - resets = <0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d>; - clocks = <0x02 0x2b5 0x02 0x267>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-hdptx-phy"; - status = "disabled"; - rockchip,grf = <0x18a>; - reg = <0x00 0xfed60000 0x00 0x2000>; - phandle = <0x101>; - reset-names = "apb\0init\0cmn\0lane"; - }; - - pvtm@fda50000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-bigcore1-pvtm"; - reg = <0x00 0xfda50000 0x00 0x100>; - - pvtm@1 { - clock-names = "clk\0pclk"; - clocks = <0x02 0x2c8 0x02 0x17>; - reg = <0x01>; - }; - }; - - csi2-dcphy0 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x20d>; - }; - - mailbox@fece0000 { - clock-names = "pclk_mailbox"; - interrupts = <0x00 0x4d 0x04 0x00 0x4e 0x04 0x00 0x4f 0x04 0x00 0x50 0x04>; - clocks = <0x02 0x4e>; - #mbox-cells = <0x01>; - compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; - status = "disabled"; - reg = <0x00 0xfece0000 0x00 0x200>; - phandle = <0x2e9>; - }; - - rkcif-mipi-lvds3-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x57>; - phandle = <0x23a>; - }; - - rkcif-mipi-lvds1-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x53>; - phandle = <0x22f>; - }; - - dfi@fe060000 { - rockchip,pmu_grf = <0x104>; - compatible = "rockchip,rk3588-dfi"; - status = "disabled"; - reg = <0x00 0xfe060000 0x00 0x10000>; - phandle = <0x40>; - }; - - iommu@fdca0000 { - power-domains = <0x60 0x17>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x6d 0x04>; - clocks = <0x02 0x49 0x02 0x4b>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-av1"; - status = "okay"; - interrupt-names = "irq_av1d_mmu"; - reg = <0x00 0xfdca0000 0x00 0x600>; - phandle = <0xce>; - }; - - mipi5-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x229>; - }; - - qos@fdf35600 { - compatible = "syscon"; - reg = <0x00 0xfdf35600 0x00 0x20>; - phandle = <0x8a>; - }; - - syscon@fd5e4000 { - compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; - reg = <0x00 0xfd5e4000 0x00 0x100>; - phandle = <0x1c7>; - }; - - iommu@fdba8800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x7d 0x04>; - clocks = <0x02 0x1b0 0x02 0x1b1>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpege2_mmu"; - reg = <0x00 0xfdba8800 0x00 0x40>; - phandle = <0xbf>; - }; - - mpp-srv { - rockchip,resetgroup-count = <0x01>; - rockchip,taskqueue-count = <0x0c>; - compatible = "rockchip,mpp-service"; - status = "okay"; - phandle = <0xb8>; - }; - - cspmu@fd10c000 { - compatible = "rockchip,cspmu"; - reg = <0x00 0xfd10c000 0x00 0x1000 0x00 0xfd10d000 0x00 0x1000 0x00 0xfd10e000 0x00 0x1000 0x00 0xfd10f000 0x00 0x1000 0x00 0xfd12c000 0x00 0x1000 0x00 0xfd12d000 0x00 0x1000 0x00 0xfd12e000 0x00 0x1000 0x00 0xfd12f000 0x00 0x1000>; - phandle = <0x48e>; - }; - - pwm@febf0010 { - pinctrl-names = "active"; - pinctrl-0 = <0x172>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15e 0x04>; - clocks = <0x02 0x5a 0x02 0x59>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebf0010 0x00 0x10>; - phandle = <0x2da>; - }; - - iommu@fdbef000 { - power-domains = <0x60 0x11>; - rockchip,shootdown-entire; - interrupts = <0x00 0x66 0x04 0x00 0x67 0x04>; - clocks = <0x02 0x1ca 0x02 0x1c9>; - rockchip,enable-cmd-retry; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "irq_rkvenc1_mmu0\0irq_rkvenc1_mmu1"; - reg = <0x00 0xfdbef000 0x00 0x40 0x00 0xfdbef040 0x00 0x40>; - phandle = <0xc5>; - lock-names = "aclk\0iface"; - }; - - serial@feb60000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x162>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14e 0x04>; - clocks = <0x02 0xbf 0x02 0xad>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeb60000 0x00 0x100>; - phandle = <0x2cb>; - dmas = <0x7c 0x0c 0x7c 0x0d>; - reg-shift = <0x02>; - }; - - hdmiin-sound { - rockchip,jack-det; - rockchip,cpu = <0x1ec>; - rockchip,codec = <0x1eb 0x00>; - rockchip,bitclock-master = <0x1eb>; - rockchip,card-name = "rockchip,hdmiin"; - rockchip,format = "i2s"; - compatible = "rockchip,hdmi"; - phandle = <0x4ac>; - rockchip,frame-master = <0x1eb>; - rockchip,mclk-fs = <0x80>; - }; - - i2s@fddc8000 { - power-domains = <0x60 0x19>; - clock-names = "mclk_tx\0hclk"; - assigned-clocks = <0x02 0x1ff>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x391>; - interrupts = <0x00 0xbc 0x04>; - clocks = <0x02 0x201 0x02 0x1fe>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - rockchip,playback-only; - status = "disabled"; - reg = <0x00 0xfddc8000 0x00 0x1000>; - phandle = <0x47c>; - dmas = <0xf2 0x16>; - reset-names = "tx-m"; - }; - - pcie30-avdd0v75 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b0>; - regulator-name = "pcie30_avdd0v75"; - compatible = "regulator-fixed"; - phandle = <0x4a7>; - vin-supply = <0x1df>; - }; - - timer { - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - compatible = "arm,armv8-timer"; - }; - - rockchip-suspend { - rockchip,sleep-debug-en = <0x01>; - rockchip,sleep-mode-config = <0x5000604>; - compatible = "rockchip,pm-rk3588"; - status = "okay"; - rockchip,wakeup-config = <0x100>; - phandle = <0x246>; - }; - - decompress@fea80000 { - clock-names = "aclk\0dclk\0pclk"; - resets = <0x02 0x118>; - interrupts = <0x00 0x55 0x04>; - clocks = <0x02 0x75 0x02 0x77 0x02 0x76>; - compatible = "rockchip,hw-decompress"; - status = "disabled"; - reg = <0x00 0xfea80000 0x00 0x1000>; - phandle = <0x2a3>; - reset-names = "dresetn"; - }; - - dma-controller@fea30000 { - clock-names = "apb_pclk"; - interrupts = <0x00 0x58 0x04 0x00 0x59 0x04>; - clocks = <0x02 0x79>; - arm,pl330-periph-burst; - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xfea30000 0x00 0x4000>; - phandle = <0xf1>; - #dma-cells = <0x01>; - }; - - pwm@febf0000 { - pinctrl-names = "active"; - pinctrl-0 = <0x171>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15e 0x04>; - clocks = <0x02 0x5a 0x02 0x59>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebf0000 0x00 0x10>; - phandle = <0x2d9>; - }; - - iommu@fdcd8f00 { - power-domains = <0x60 0x1d>; - clock-names = "aclk\0iface\0pclk"; - interrupts = <0x00 0x8e 0x04>; - clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "disabled"; - interrupt-names = "fec1_mmu"; - reg = <0x00 0xfdcd8f00 0x00 0x100>; - phandle = <0xd3>; - }; - - spdif-tx@fddb0000 { - power-domains = <0x60 0x19>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x205>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc3 0x04>; - clocks = <0x02 0x209 0x02 0x204>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfddb0000 0x00 0x1000>; - phandle = <0x1d5>; - dmas = <0xf1 0x06>; - }; - - rkisp1-vir2 { - rockchip,hw = <0x5a>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x241>; - }; - - pcie-clk1 { - regulator-boot-on; - regulator-always-on; - regulator-name = "pcie_clk1"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x494>; - vin-supply = <0x1cd>; - gpios = <0x181 0x15 0x01>; - }; - - jpege-core@fdba8000 { - power-domains = <0x60 0x15>; - iommus = <0xbf>; - rockchip,ccu = <0xbd>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1b0>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2ce 0x02 0x2cf>; - interrupts = <0x00 0x7e 0x04>; - clocks = <0x02 0x1b0 0x02 0x1b1>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-jpege-core"; - status = "okay"; - interrupt-names = "irq_jpege2"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdba8000 0x00 0x400>; - phandle = <0x26f>; - reset-names = "video_a\0video_h"; - }; - - qos@fdf66400 { - compatible = "syscon"; - reg = <0x00 0xfdf66400 0x00 0x20>; - phandle = <0x95>; - }; - - spdif-tx1-sound { - simple-audio-card,name = "rockchip,spdif-tx1"; - compatible = "simple-audio-card"; - status = "disabled"; - phandle = <0x49d>; - simple-audio-card,mclk-fs = <0x80>; - - simple-audio-card,cpu { - sound-dai = <0x1d7>; - }; - - simple-audio-card,codec { - sound-dai = <0x1d8>; - }; - }; - - mmc@fe2e0000 { - mmc-hs400-enhanced-strobe; - clock-names = "core\0bus\0axi\0block\0timer"; - assigned-clocks = <0x02 0x13b 0x02 0x13c 0x02 0x13a>; - bus-width = <0x08>; - non-removable; - no-sdio; - assigned-clock-rates = <0xbebc200 0x16e3600 0xbebc200>; - resets = <0x02 0x1f6 0x02 0x1f4 0x02 0x1f5 0x02 0x1f7 0x02 0x1f8>; - mmc-hs400-1_8v; - interrupts = <0x00 0xcd 0x04>; - clocks = <0x02 0x13a 0x02 0x138 0x02 0x139 0x02 0x13b 0x02 0x13c>; - no-sd; - compatible = "rockchip,rk3588-dwcmshc\0rockchip,dwcmshc-sdhci"; - status = "okay"; - reg = <0x00 0xfe2e0000 0x00 0x10000>; - phandle = <0x295>; - max-frequency = <0xbebc200>; - reset-names = "core\0bus\0axi\0block\0timer"; - }; - - dma-controller@fed10000 { - clock-names = "apb_pclk"; - interrupts = <0x00 0x5a 0x04 0x00 0x5b 0x04>; - clocks = <0x02 0x7a>; - arm,pl330-periph-burst; - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xfed10000 0x00 0x4000>; - phandle = <0xf2>; - #dma-cells = <0x01>; - }; - - iommu@fc900000 { - interrupts = <0x00 0x171 0x04 0x00 0x173 0x04 0x00 0x176 0x04 0x00 0x16f 0x04>; - #iommu-cells = <0x01>; - compatible = "arm,smmu-v3"; - status = "disabled"; - interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; - reg = <0x00 0xfc900000 0x00 0x200000>; - phandle = <0x256>; - }; - - mailbox@fec70000 { - clock-names = "pclk_mailbox"; - interrupts = <0x00 0x45 0x04 0x00 0x46 0x04 0x00 0x47 0x04 0x00 0x48 0x04>; - clocks = <0x02 0x4d>; - #mbox-cells = <0x01>; - compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; - status = "disabled"; - reg = <0x00 0xfec70000 0x00 0x200>; - phandle = <0x2de>; - }; - - pcie@fe150000 { - power-domains = <0x60 0x22>; - vpcie3v3-supply = <0x1b8>; - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x00 0x0f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x10>; - resets = <0x02 0x20d 0x02 0x21c>; - interrupts = <0x00 0x107 0x04 0x00 0x106 0x04 0x00 0x105 0x04 0x00 0x104 0x04 0x00 0x103 0x04>; - clocks = <0x02 0x14e 0x02 0x153 0x02 0x149 0x02 0x158 0x02 0x15e 0x02 0x183>; - interrupt-map = <0x00 0x00 0x00 0x01 0x1b5 0x00 0x00 0x00 0x00 0x02 0x1b5 0x01 0x00 0x00 0x00 0x03 0x1b5 0x02 0x00 0x00 0x00 0x04 0x1b5 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x03>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - reset-gpios = <0x10d 0x0e 0x00>; - num-lanes = <0x01>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf0000000 0x00 0xf0000000 0x00 0x100000 0x81000000 0x00 0xf0100000 0x00 0xf0100000 0x00 0x100000 0x82000000 0x00 0xf0200000 0x00 0xf0200000 0x00 0xe00000 0xc3000000 0x09 0x00 0x09 0x00 0x00 0x40000000>; - msi-map = <0x00 0x1b6 0x00 0x1000>; - #interrupt-cells = <0x01>; - status = "okay"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x1b7>; - num-viewport = <0x08>; - reg = <0x00 0xfe150000 0x00 0x10000 0x0a 0x40000000 0x00 0x400000>; - linux,pci-domain = <0x00>; - phandle = <0x485>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x10>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0x104 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x1b5>; - interrupt-controller; - }; - }; - - rng@fe378000 { - clock-names = "hclk_trng"; - resets = <0x11a 0x30>; - interrupts = <0x00 0x190 0x04>; - clocks = <0x0e 0x0c>; - compatible = "rockchip,trngv1"; - status = "okay"; - reg = <0x00 0xfe378000 0x00 0x200>; - phandle = <0x297>; - reset-names = "reset"; - }; - - sata@fe220000 { - phy-names = "sata-phy"; - clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; - interrupts = <0x00 0x112 0x04>; - clocks = <0x02 0x172 0x02 0x16f 0x02 0x175 0x02 0x164 0x02 0x17f>; - compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; - status = "disabled"; - interrupt-names = "hostc"; - phys = <0x1bc 0x01>; - reg = <0x00 0xfe220000 0x00 0x1000>; - phandle = <0x48a>; - ports-implemented = <0x01>; - }; - - rkcif-mipi-lvds5 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x1a2>; - }; - - vcc-sata-pwr-en-regulator { - regulator-max-microvolt = <0x325aa0>; - regulator-boot-on; - gpio = <0x182 0x0c 0x00>; - regulator-always-on; - enable-active-high; - regulator-min-microvolt = <0x325aa0>; - regulator-name = "vcc_sata_pwr_en"; - startup-delay-us = <0x1388>; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4a3>; - vin-supply = <0x1cd>; - }; - - pwm-fan { - cooling-levels = <0x32 0x32 0x64 0x96 0xc8 0xff>; - rockchip,temp-trips = <0xc350 0x01 0xd6d8 0x02 0xea60 0x03 0xfde8 0x04 0x11170 0x05>; - compatible = "pwm-fan"; - phandle = <0x4ad>; - pwms = <0x1ed 0x00 0xc350 0x00>; - #cooling-cells = <0x02>; - fan-supply = <0x78>; - }; - - qos@fdf3e200 { - compatible = "syscon"; - reg = <0x00 0xfdf3e200 0x00 0x20>; - phandle = <0xab>; - }; - - spdif-tx@fe4e0000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default"; - pinctrl-0 = <0x142>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x3f>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc1 0x04>; - clocks = <0x02 0x41 0x02 0x3e>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfe4e0000 0x00 0x1000>; - phandle = <0x29d>; - dmas = <0x7c 0x05>; - }; - - vad@fe4d0000 { - rockchip,det-channel = <0x00>; - rockchip,audio-src = <0x00>; - clock-names = "hclk"; - reg-names = "vad"; - interrupts = <0x00 0xca 0x04>; - clocks = <0x02 0x2a0>; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-vad"; - status = "disabled"; - rockchip,mode = <0x00>; - reg = <0x00 0xfe4d0000 0x00 0x1000>; - phandle = <0x29c>; - }; - - jpegd@fdb90000 { - power-domains = <0x60 0x15>; - iommus = <0xbb>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1b4>; - rockchip,normal-rates = <0x23c34600 0x00>; - assigned-clock-rates = <0x23c34600>; - resets = <0x02 0x2d2 0x02 0x2d3>; - interrupts = <0x00 0x81 0x04>; - clocks = <0x02 0x1b4 0x02 0x1b5>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x01>; - compatible = "rockchip,rkv-jpeg-decoder-v1"; - status = "okay"; - interrupt-names = "irq_jpegd"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdb90000 0x00 0x400>; - phandle = <0x26c>; - reset-names = "video_a\0video_h"; - }; - - cpuinfo { - nvmem-cells = <0x2a 0x2b 0x2c>; - compatible = "rockchip,cpuinfo"; - nvmem-cell-names = "id\0cpu-version\0cpu-code"; - }; - - qos@fdf60400 { - compatible = "syscon"; - reg = <0x00 0xfdf60400 0x00 0x20>; - phandle = <0x8f>; - }; - - spi@feb20000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x01>; - pinctrl-0 = <0x154 0x155>; - clock-names = "spiclk\0apb_pclk"; - assigned-clocks = <0x02 0xa5>; - assigned-clock-rates = <0xbebc200>; - interrupts = <0x00 0x148 0x04>; - clocks = <0x02 0xa5 0x02 0xa0>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "okay"; - reg = <0x00 0xfeb20000 0x00 0x1000>; - phandle = <0x2ad>; - dmas = <0xf1 0x0f 0xf1 0x10>; - - rk806single@0 { - vcc11-supply = <0x15b>; - pinctrl-names = "default\0pmic-power-off"; - vcc12-supply = <0x78>; - vcc13-supply = <0x15c>; - vcc14-supply = <0x15c>; - pinctrl-0 = <0x156 0x157 0x158 0x159>; - interrupts = <0x07 0x08>; - spi-max-frequency = <0xf4240>; - interrupt-parent = <0x7b>; - low_voltage_threshold = <0xbb8>; - vcca-supply = <0x78>; - vcc1-supply = <0x78>; - pmic-reset-func = <0x01>; - vcc2-supply = <0x78>; - hotdie_temperture_threshold = <0x73>; - compatible = "rockchip,rk806"; - vcc3-supply = <0x78>; - pinctrl-1 = <0x15a>; - vcc4-supply = <0x78>; - vcc5-supply = <0x78>; - reg = <0x00>; - phandle = <0x2ae>; - vcc6-supply = <0x78>; - shutdown_voltage_threshold = <0xa8c>; - vcc7-supply = <0x78>; - vcc8-supply = <0x78>; - shutdown_temperture_threshold = <0xa0>; - vcc9-supply = <0x78>; - vcc10-supply = <0x78>; - - pinctrl_rk806 { - gpio-controller; - phandle = <0x2af>; - #gpio-cells = <0x02>; - - rk806_dvs2_rst { - function = "pin_fun3"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b4>; - }; - - rk806_dvs3_null { - function = "pin_fun0"; - pins = "gpio_pwrctrl3"; - phandle = <0x159>; - }; - - rk806_dvs3_dvs { - function = "pin_fun4"; - pins = "gpio_pwrctrl3"; - phandle = <0x2ba>; - }; - - rk806_dvs3_rst { - function = "pin_fun3"; - pins = "gpio_pwrctrl3"; - phandle = <0x2b9>; - }; - - rk806_dvs2_null { - function = "pin_fun0"; - pins = "gpio_pwrctrl2"; - phandle = <0x158>; - }; - - rk806_dvs1_pwrdn { - function = "pin_fun2"; - pins = "gpio_pwrctrl1"; - phandle = <0x15a>; - }; - - rk806_dvs1_slp { - function = "pin_fun1"; - pins = "gpio_pwrctrl1"; - phandle = <0x2b0>; - }; - - rk806_dvs1_null { - function = "pin_fun0"; - pins = "gpio_pwrctrl2"; - phandle = <0x157>; - }; - - rk806_dvs3_gpio { - function = "pin_fun5"; - pins = "gpio_pwrctrl3"; - phandle = <0x2bb>; - }; - - rk806_dvs2_gpio { - function = "pin_fun5"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b6>; - }; - - rk806_dvs2_slp { - function = "pin_fun1"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b2>; - }; - - rk806_dvs2_pwrdn { - function = "pin_fun2"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b3>; - }; - - rk806_dvs1_rst { - function = "pin_fun3"; - pins = "gpio_pwrctrl1"; - phandle = <0x2b1>; - }; - - rk806_dvs3_slp { - function = "pin_fun1"; - pins = "gpio_pwrctrl3"; - phandle = <0x2b7>; - }; - - rk806_dvs2_dvs { - function = "pin_fun4"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b5>; - }; - - rk806_dvs3_pwrdn { - function = "pin_fun2"; - pins = "gpio_pwrctrl3"; - phandle = <0x2b8>; - }; - }; - - pwrkey { - status = "okay"; - }; - - regulators { - - PLDO_REG2 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "vcc_1v8_s0"; - phandle = <0x177>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - DCDC_REG4 { - regulator-max-microvolt = <0xe7ef0>; - regulator-boot-on; - regulator-init-microvolt = <0xb71b0>; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_vdenc_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x2bc>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG2 { - regulator-max-microvolt = <0xe7ef0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_cpu_lit_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x12>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - NLDO_REG4 { - regulator-max-microvolt = <0xcf850>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xcf850>; - regulator-name = "vdd_0v85_s0"; - phandle = <0x2c6>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG9 { - regulator-boot-on; - regulator-always-on; - regulator-name = "vddq_ddr_s0"; - phandle = <0x2bf>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - NLDO_REG2 { - regulator-max-microvolt = <0xcf850>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xcf850>; - regulator-name = "vdd_ddr_pll_s0"; - phandle = <0x2c5>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xcf850>; - }; - }; - - PLDO_REG5 { - regulator-max-microvolt = <0x325aa0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "vccio_sd_s0"; - phandle = <0x118>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG7 { - regulator-max-microvolt = <0x1e8480>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1e8480>; - regulator-name = "vdd_2v0_pldo_s3"; - phandle = <0x15b>; - - regulator-state-mem { - regulator-suspend-microvolt = <0x1e8480>; - regulator-on-in-suspend; - }; - }; - - PLDO_REG3 { - regulator-max-microvolt = <0x124f80>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x124f80>; - regulator-name = "avdd_1v2_s0"; - phandle = <0x2c1>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG5 { - regulator-max-microvolt = <0xdbba0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xa4cb8>; - regulator-name = "vdd_ddr_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x42>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xcf850>; - }; - }; - - DCDC_REG10 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "vcc_1v8_s3"; - phandle = <0x2c0>; - - regulator-state-mem { - regulator-suspend-microvolt = <0x1b7740>; - regulator-on-in-suspend; - }; - }; - - PLDO_REG1 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "avcc_1v8_s0"; - phandle = <0x1de>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG3 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xa4cb8>; - regulator-name = "vdd_log_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x43>; - - regulator-state-mem { - regulator-suspend-microvolt = <0xb71b0>; - regulator-on-in-suspend; - }; - }; - - DCDC_REG1 { - regulator-max-microvolt = <0xe7ef0>; - regulator-boot-on; - regulator-enable-ramp-delay = <0x190>; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_gpu_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x62>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - NLDO_REG5 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b0>; - regulator-name = "vdd_0v75_s0"; - phandle = <0x2c7>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - NLDO_REG3 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b0>; - regulator-name = "avdd_0v75_s0"; - phandle = <0x1df>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - PLDO_REG6 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "pldo6_s3"; - phandle = <0x2c3>; - - regulator-state-mem { - regulator-suspend-microvolt = <0x1b7740>; - regulator-on-in-suspend; - }; - }; - - DCDC_REG8 { - regulator-max-microvolt = <0x325aa0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x325aa0>; - regulator-name = "vcc_3v3_s3"; - phandle = <0x2be>; - - regulator-state-mem { - regulator-suspend-microvolt = <0x325aa0>; - regulator-on-in-suspend; - }; - }; - - NLDO_REG1 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b0>; - regulator-name = "vdd_0v75_s3"; - phandle = <0x2c4>; - - regulator-state-mem { - regulator-suspend-microvolt = <0xb71b0>; - regulator-on-in-suspend; - }; - }; - - PLDO_REG4 { - regulator-max-microvolt = <0x325aa0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x325aa0>; - regulator-name = "vcc_3v3_s0"; - phandle = <0x2c2>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG6 { - regulator-boot-on; - regulator-always-on; - regulator-name = "vdd2_ddr_s3"; - phandle = <0x2bd>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - }; - }; - }; - - usbhost3_0 { - #address-cells = <0x02>; - clock-names = "ref\0suspend\0bus\0utmi\0php\0pipe"; - clocks = <0x02 0x179 0x02 0x178 0x02 0x177 0x02 0x17a 0x02 0x166 0x02 0x181>; - #size-cells = <0x02>; - compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; - ranges; - status = "disabled"; - phandle = <0x258>; - - usb@fcd00000 { - snps,dis_enblslpm_quirk; - phy-names = "usb3-phy"; - snps,dis-u2-freeclk-exists-quirk; - phy_type = "utmi_wide"; - resets = <0x02 0x237>; - interrupts = <0x00 0xde 0x04>; - snps,dis_rxdet_inp3_quirk; - compatible = "snps,dwc3"; - snps,parkmode-disable-hs-quirk; - snps,dis-del-phy-power-chg-quirk; - status = "disabled"; - snps,parkmode-disable-ss-quirk; - phys = <0x70 0x04>; - reg = <0x00 0xfcd00000 0x00 0x400000>; - phandle = <0x259>; - dr_mode = "host"; - reset-names = "usb3-host"; - snps,dis-tx-ipgap-linecheck-quirk; - }; - }; - - pcie@fe190000 { - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x40 0x4f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x08>; - resets = <0x02 0x211 0x02 0x220>; - interrupts = <0x00 0xfd 0x04 0x00 0xfc 0x04 0x00 0xfb 0x04 0x00 0xfa 0x04 0x00 0xf9 0x04>; - clocks = <0x02 0x152 0x02 0x157 0x02 0x14d 0x02 0x15d 0x02 0x162 0x02 0x182>; - interrupt-map = <0x00 0x00 0x00 0x01 0x107 0x00 0x00 0x00 0x00 0x02 0x107 0x01 0x00 0x00 0x00 0x03 0x107 0x02 0x00 0x00 0x00 0x04 0x107 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x02>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - num-lanes = <0x01>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf4000000 0x00 0xf4000000 0x00 0x100000 0x81000000 0x00 0xf4100000 0x00 0xf4100000 0x00 0x100000 0x82000000 0x00 0xf4200000 0x00 0xf4200000 0x00 0xe00000 0xc3000000 0x0a 0x00 0x0a 0x00 0x00 0x40000000>; - msi-map = <0x4000 0x106 0x4000 0x1000>; - #interrupt-cells = <0x01>; - status = "disabled"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x108 0x02>; - num-viewport = <0x04>; - reg = <0x00 0xfe190000 0x00 0x10000 0x0a 0x41000000 0x00 0x400000>; - linux,pci-domain = <0x04>; - phandle = <0x28d>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x08>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0xfa 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x107>; - interrupt-controller; - }; - }; - - rkcif-mipi-lvds3-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x57>; - phandle = <0x238>; - }; - - aliases { - i2c3 = "/i2c@feab0000"; - ethernet0 = "/ethernet@fe1b0000"; - pwm9 = "/pwm@febe0010"; - pwm14 = "/pwm@febf0020"; - spi2 = "/spi@feb20000"; - usbdp0 = "/phy@fed80000"; - gpio0 = "/pinctrl/gpio@fd8a0000"; - dsi1 = "/dsi@fde30000"; - hdmi1 = "/hdmi@fdea0000"; - serial7 = "/serial@feba0000"; - i2c1 = "/i2c@fea90000"; - pwm7 = "/pwm@febd0030"; - pwm12 = "/pwm@febf0000"; - jpege3 = "/jpege-core@fdbac000"; - spi0 = "/spi@feb00000"; - hdptx1 = "/phy@fed70000"; - csi2dphy5 = "/csi2-dphy5"; - serial5 = "/serial@feb80000"; - csi2dcphy1 = "/csi2-dcphy1"; - pwm5 = "/pwm@febd0010"; - mmc1 = "/mmc@fe2c0000"; - pwm10 = "/pwm@febe0020"; - jpege1 = "/jpege-core@fdba4000"; - rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; - i2c8 = "/i2c@feca0000"; - dp0 = "/dp@fde50000"; - csi2dphy3 = "/csi2-dphy3"; - serial3 = "/serial@feb60000"; - edp0 = "/edp@fdec0000"; - pwm3 = "/pwm@fd8b0030"; - hdcp1 = "/hdcp@fde70000"; - rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; - i2c6 = "/i2c@fec80000"; - csi2dphy1 = "/csi2-dphy1"; - serial1 = "/serial@feb40000"; - pwm1 = "/pwm@fd8b0010"; - rkvenc0 = "/rkvenc-core@fdbd0000"; - spi5 = "/spi@fe2b0000"; - gpio3 = "/pinctrl/gpio@fec40000"; - hdptxhdmi1 = "/hdmiphy@fed70000"; - rkcif_mipi_lvds0 = "/rkcif-mipi-lvds"; - i2c4 = "/i2c@feac0000"; - rkvdec0 = "/rkvdec-core@fdc38000"; - pwm15 = "/pwm@febf0030"; - hdmirx0 = "/hdmirx-controller@fdee0000"; - spi3 = "/spi@feb30000"; - usbdp1 = "/phy@fed90000"; - gpio1 = "/pinctrl/gpio@fec20000"; - serial8 = "/serial@febb0000"; - i2c2 = "/i2c@feaa0000"; - pwm8 = "/pwm@febe0000"; - pwm13 = "/pwm@febf0010"; - spi1 = "/spi@feb10000"; - dsi0 = "/dsi@fde20000"; - hdmi0 = "/hdmi@fde80000"; - serial6 = "/serial@feb90000"; - i2c0 = "/i2c@fd880000"; - pwm6 = "/pwm@febd0020"; - mmc2 = "/mmc@fe2d0000"; - pwm11 = "/pwm@febe0030"; - jpege2 = "/jpege-core@fdba8000"; - hdptx0 = "/phy@fed60000"; - rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; - dp1 = "/dp@fde60000"; - csi2dphy4 = "/csi2-dphy4"; - serial4 = "/serial@feb70000"; - edp1 = "/edp@fded0000"; - csi2dcphy0 = "/csi2-dcphy0"; - pwm4 = "/pwm@febd0000"; - mmc0 = "/mmc@fe2e0000"; - jpege0 = "/jpege-core@fdba0000"; - rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; - i2c7 = "/i2c@fec90000"; - csi2dphy2 = "/csi2-dphy2"; - pwm2 = "/pwm@fd8b0020"; - rkvenc1 = "/rkvenc-core@fdbe0000"; - gpio4 = "/pinctrl/gpio@fec50000"; - hdcp0 = "/hdcp@fde40000"; - rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; - i2c5 = "/i2c@fead0000"; - csi2dphy0 = "/csi2-dphy0"; - serial0 = "/serial@fd890000"; - rkvdec1 = "/rkvdec-core@fdc48000"; - pwm0 = "/pwm@fd8b0000"; - spi4 = "/spi@fecb0000"; - gpio2 = "/pinctrl/gpio@fec30000"; - hdptxhdmi0 = "/hdmiphy@fed60000"; - serial9 = "/serial@febc0000"; - }; - - spdif-tx@fdde8000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x259>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc5 0x04>; - clocks = <0x02 0x25c 0x02 0x258>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfdde8000 0x00 0x1000>; - phandle = <0x47d>; - dmas = <0xf1 0x08>; - }; - - i2s@fe490000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x12d 0x12e>; - pinctrl-0 = <0x12a 0x12b>; - clock-names = "i2s_clk\0i2s_hclk"; - assigned-clocks = <0x02 0x24>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xb6 0x04>; - clocks = <0x02 0x27 0x02 0x22>; - dma-names = "tx\0rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; - pinctrl-1 = <0x12c>; - status = "disabled"; - reg = <0x00 0xfe490000 0x00 0x1000>; - phandle = <0x298>; - dmas = <0xf1 0x00 0xf1 0x01>; - rockchip,clk-trcm = <0x01>; - }; - - syscon@fd5d0000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5d0000 0x00 0x4000>; - phandle = <0x18b>; - - usb2-phy@0 { - clock-output-names = "usb480m_phy0"; - clock-names = "phyclk"; - resets = <0x02 0xc0047 0x02 0x488>; - interrupts = <0x00 0x189 0x04>; - clocks = <0x02 0x2b5>; - #clock-cells = <0x00>; - rockchip,usbctrl-grf = <0x74>; - compatible = "rockchip,rk3588-usb2phy"; - status = "okay"; - reg = <0x00 0x10>; - phandle = <0x18d>; - reset-names = "phy\0apb"; - - otg-port { - #phy-cells = <0x00>; - rockchip,typec-vbus-det; - status = "okay"; - phandle = <0x66>; - }; - }; - }; - - i2c@feac0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x14b>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb3 0x02 0xab>; - interrupts = <0x00 0x141 0x04>; - clocks = <0x02 0x90 0x02 0x88>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfeac0000 0x00 0x1000>; - phandle = <0x2a7>; - reset-names = "i2c\0apb"; - - pc9202@3c { - pinctrl-names = "default"; - pinctrl-0 = <0x14c>; - index = <0x01>; - compatible = "firefly,pc9202"; - status = "okay"; - wd-en-gpio = <0x7b 0x14 0x00>; - driver-names = "wdt_base"; - reg = <0x3c>; - }; - }; - - rkcif-mipi-lvds5-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a2>; - phandle = <0x476>; - }; - - firmware { - - optee { - method = "smc"; - compatible = "linaro,optee-tz"; - phandle = <0x222>; - }; - - sdei { - method = "smc"; - compatible = "arm,sdei-1.0"; - phandle = <0x221>; - }; - - scmi { - shmem = <0x46>; - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "arm,scmi-smc"; - phandle = <0x220>; - arm,smc-id = <0x82000010>; - - protocol@16 { - #reset-cells = <0x01>; - reg = <0x16>; - phandle = <0x11a>; - }; - - protocol@14 { - assigned-clocks = <0x0e 0x00 0x0e 0x02 0x0e 0x03>; - assigned-clock-rates = <0x30a32c00 0x30a32c00 0x30a32c00>; - #clock-cells = <0x01>; - reg = <0x14>; - phandle = <0x0e>; - }; - }; - }; - - rkvenc-core@fdbd0000 { - power-domains = <0x60 0x10>; - iommus = <0xc2>; - rockchip,ccu = <0xc3>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - assigned-clocks = <0x02 0x1c5 0x02 0x1c6>; - rockchip,task-capacity = <0x08>; - rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; - assigned-clock-rates = <0x1dcd6500 0x2faf0800>; - resets = <0x02 0x2f5 0x02 0x2f4 0x02 0x2f6>; - interrupts = <0x00 0x65 0x04>; - clocks = <0x02 0x1c5 0x02 0x1c4 0x02 0x1c6>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x07>; - compatible = "rockchip,rkv-encoder-v2-core"; - status = "okay"; - interrupt-names = "irq_rkvenc0"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdbd0000 0x00 0x6000>; - phandle = <0x272>; - reset-names = "video_a\0video_h\0video_core"; - operating-points-v2 = <0xc4>; - }; - - iommu@fdcc7f00 { - power-domains = <0x60 0x1c>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x88 0x04>; - clocks = <0x02 0x120 0x02 0x121>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "disabled"; - interrupt-names = "isp1_mmu"; - reg = <0x00 0xfdcc7f00 0x00 0x100>; - phandle = <0xd1>; - }; - - rkcif-mipi-lvds-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x52>; - phandle = <0x22b>; - }; - - syscon@fd5c8000 { - compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; - reg = <0x00 0xfd5c8000 0x00 0x4000>; - phandle = <0x18c>; - }; - - gpu@fb000000 { - power-domains = <0x60 0x0c>; - downdifferential = <0x0a>; - mali-supply = <0x62>; - clock-names = "clk_mali\0clk_gpu_coregroup\0clk_gpu_stacks\0clk_gpu"; - assigned-clocks = <0x0e 0x05>; - assigned-clock-rates = <0xbebc200>; - interrupts = <0x00 0x5e 0x04 0x00 0x5d 0x04 0x00 0x5c 0x04>; - clocks = <0x0e 0x05 0x02 0x115 0x02 0x116 0x02 0x114>; - upthreshold = <0x1e>; - compatible = "arm,mali-bifrost"; - dynamic-power-coefficient = <0xba6>; - status = "okay"; - interrupt-names = "GPU\0MMU\0JOB"; - mem-supply = <0x62>; - reg = <0x00 0xfb000000 0x00 0x200000>; - phandle = <0x5f>; - operating-points-v2 = <0x61>; - #cooling-cells = <0x02>; - }; - - csi2-dphy4 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x213>; - }; - - mipi4-csi2-hw@fdd50000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x328>; - interrupts = <0x00 0x97 0x04 0x00 0x98 0x04>; - clocks = <0x02 0x1d3>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd50000 0x00 0x10000>; - phandle = <0x4b>; - reset-names = "srst_csihost_p"; - }; - - qos@fdf82000 { - compatible = "syscon"; - reg = <0x00 0xfdf82000 0x00 0x20>; - phandle = <0x9d>; - }; - - rkcif-mipi-lvds2-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x55>; - phandle = <0x235>; - }; - - rkisp1-vir0 { - rockchip,hw = <0x5a>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x23f>; - }; - - qos@fdf41100 { - compatible = "syscon"; - reg = <0x00 0xfdf41100 0x00 0x20>; - phandle = <0xa7>; - }; - - test-power { - status = "okay"; - }; - - usb-5v { - pinctrl-names = "default"; - regulator-boot-on; - gpio = <0xfe 0x03 0x00>; - pinctrl-0 = <0x1ef>; - regulator-always-on; - enable-active-high; - regulator-name = "usb_5v"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4b1>; - }; - - phy@feda0000 { - clock-names = "pclk\0ref"; - resets = <0x02 0xc0043 0x02 0x3e 0x02 0x3f 0x02 0xc0044>; - clocks = <0x02 0x108 0x02 0x2b6>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-mipi-dcphy"; - status = "okay"; - rockchip,grf = <0x190>; - reg = <0x00 0xfeda0000 0x00 0x10000>; - phandle = <0x2f>; - reset-names = "m_phy\0apb\0grf\0s_phy"; - }; - - mod-sleep-regulator { - pinctrl-names = "default"; - regulator-boot-on; - gpio = <0x7b 0x15 0x00>; - pinctrl-0 = <0x1ee>; - regulator-always-on; - enable-active-high; - regulator-name = "mod_sleep"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4ae>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - qos@fdf66c00 { - compatible = "syscon"; - reg = <0x00 0xfdf66c00 0x00 0x20>; - phandle = <0x99>; - }; - - crypto@fe370000 { - clock-names = "aclk\0hclk\0sclk\0pka"; - resets = <0x11a 0x0f>; - interrupts = <0x00 0xd1 0x04>; - clocks = <0x0e 0x0b 0x0e 0x0c 0x0e 0x14 0x0e 0x15>; - compatible = "rockchip,rk3588-crypto"; - status = "disabled"; - reg = <0x00 0xfe370000 0x00 0x2000>; - phandle = <0x296>; - reset-names = "crypto-rst"; - }; - - i2s@fddf4000 { - power-domains = <0x60 0x1a>; - rockchip,always-on; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x249>; - assigned-clock-parents = <0x02 0x07>; - resets = <0x02 0x3ef>; - interrupts = <0x00 0xba 0x04>; - clocks = <0x02 0x24c 0x02 0x24c 0x02 0x252>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - rockchip,playback-only; - status = "okay"; - reg = <0x00 0xfddf4000 0x00 0x1000>; - phandle = <0x1e0>; - dmas = <0xf2 0x04>; - reset-names = "tx-m"; - rockchip,hdmi-path; - }; - - mipi0-csi2-hw@fdd10000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x324>; - interrupts = <0x00 0x8f 0x04 0x00 0x90 0x04>; - clocks = <0x02 0x1cf>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd10000 0x00 0x10000>; - phandle = <0x47>; - reset-names = "srst_csihost_p"; - }; - - mipi4-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x228>; - }; - - jpege-ccu { - compatible = "rockchip,vpu-jpege-ccu"; - status = "okay"; - phandle = <0xbd>; - }; - - dsi@fde30000 { - power-domains = <0x60 0x18>; - #address-cells = <0x01>; - phy-names = "dcphy"; - clock-names = "pclk\0sys_clk"; - resets = <0x02 0x355>; - interrupts = <0x00 0xa8 0x04>; - clocks = <0x02 0x279 0x02 0x27b>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-mipi-dsi2"; - status = "disabled"; - rockchip,grf = <0xd7>; - phys = <0x30>; - reg = <0x00 0xfde30000 0x00 0x10000>; - phandle = <0x283>; - reset-names = "apb"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x284>; - - endpoint@1 { - remote-endpoint = <0x3a>; - status = "disabled"; - reg = <0x01>; - phandle = <0xef>; - }; - - endpoint@0 { - remote-endpoint = <0xf4>; - status = "disabled"; - reg = <0x00>; - phandle = <0xea>; - }; - }; - }; - }; - - iommu@fcb00000 { - interrupts = <0x00 0x17d 0x04 0x00 0x17f 0x04 0x00 0x182 0x04 0x00 0x17b 0x04>; - #iommu-cells = <0x01>; - compatible = "arm,smmu-v3"; - status = "disabled"; - interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; - reg = <0x00 0xfcb00000 0x00 0x200000>; - phandle = <0x257>; - }; - - rkcif-mipi-lvds3 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x57>; - }; - - vcc-hub-regulator { - regulator-boot-on; - gpio = <0x182 0x01 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_hub"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4af>; - }; - - syscon@fd5ac000 { - compatible = "rockchip,rk3588-usb-grf\0syscon"; - reg = <0x00 0xfd5ac000 0x00 0x4000>; - phandle = <0x74>; - }; - - qos@fdf40200 { - compatible = "syscon"; - reg = <0x00 0xfdf40200 0x00 0x20>; - phandle = <0xa9>; - }; - - rkisp@fdcb0000 { - power-domains = <0x60 0x1b>; - iommus = <0xd0>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; - interrupts = <0x00 0x83 0x04 0x00 0x85 0x04 0x00 0x86 0x04>; - clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd>; - compatible = "rockchip,rk3588-rkisp"; - status = "okay"; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - reg = <0x00 0xfdcb0000 0x00 0x7f00>; - phandle = <0x58>; - }; - - serial@feba0000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x166>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x152 0x04>; - clocks = <0x02 0xcf 0x02 0xb1>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeba0000 0x00 0x100>; - phandle = <0x2cf>; - dmas = <0xf2 0x07 0xf2 0x08>; - reg-shift = <0x02>; - }; - - rkcif-mipi-lvds1-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x53>; - phandle = <0x232>; - }; - - chosen { - linux,initrd-end = <0x00 0xaac8000>; - bootargs = "storagemedia=emmc androidboot.storagemedia=emmc androidboot.mode=normal storagenode=/mmc@fe2e0000 androidboot.verifiedbootstate=orange ro rootwait console=ttyS1,115200n8 irqchip.gicv3_pseudo_nmi=0 root=PARTLABEL=rootfs rootfstype=ext4 overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 net.ifnames=0 rcupdate.rcu_expedited=0 comm-05/28/2025 androidboot.fwver=ddr-v1.15-d5483af87d,spl-v1.13,bl31-v1.44,bl32-v1.15,uboot--boot clk_ignore_unused libata.force=1.00:disable"; - linux,initrd-start = <0x00 0xa200000>; - phandle = <0x48d>; - }; - - hdmi@fde80000 { - power-domains = <0x60 0x1a>; - reg-io-width = <0x04>; - pinctrl-names = "default"; - phy-names = "hdmi"; - pinctrl-0 = <0xf9 0xfa 0xfb 0xfc>; - clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; - resets = <0x02 0x3d0 0x02 0x49c>; - interrupts = <0x00 0xa9 0x04 0x00 0xaa 0x04 0x00 0xab 0x04 0x00 0xac 0x04 0x00 0x168 0x04>; - clocks = <0x02 0x221 0x02 0x265 0x02 0x222 0x02 0x223 0x02 0x246 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x35>; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-dw-hdmi"; - status = "okay"; - rockchip,grf = <0xc8>; - phys = <0xfd>; - enable-gpios = <0xfe 0x08 0x00>; - reg = <0x00 0xfde80000 0x00 0x10000 0x00 0xfde90000 0x00 0x10000>; - phandle = <0x1d4>; - reset-names = "ref\0hdp"; - rockchip,vo1_grf = <0xd8>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x288>; - - endpoint@1 { - remote-endpoint = <0xff>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe2>; - }; - - endpoint@2 { - remote-endpoint = <0x100>; - status = "disabled"; - reg = <0x02>; - phandle = <0xe8>; - }; - - endpoint@0 { - remote-endpoint = <0x3c>; - status = "okay"; - reg = <0x00>; - phandle = <0xdc>; - }; - }; - }; - }; - - cluster2-opp-table { - rockchip,pvtm-offset = <0x18>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,pvtm-hw = <0x06>; - nvmem-cells = <0x27 0x28 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; - rockchip,pvtm-thermal-zone = "soc-thermal"; - rockchip,pvtm-low-len-sel = <0x03>; - rockchip,high-temp-max-freq = <0x21b100>; - opp-shared; - rockchip,reboot-freq = <0x1b7740>; - rockchip,pvtm-freq = <0x188940>; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0x29>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; - phandle = <0x1a>; - rockchip,idle-threshold-freq = <0x21b100>; - rockchip,pvtm-temp-prop = <0x10e 0x10e>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0xf6180>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-j-m-2016000000 { - opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - opp-hz = <0x00 0x7829b800>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - }; - - opp-1200000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1416000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x54667200>; - opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - opp-supported-hw = <0x06 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - }; - - opp-1008000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2256000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8677d400>; - opp-supported-hw = <0xf9 0x13>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1200000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1008000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-816000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2400000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8f0d1800>; - opp-supported-hw = <0xf9 0x80>; - clock-latency-ns = <0x9c40>; - }; - - opp-1800000000 { - opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2208000000 { - opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; - opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; - opp-hz = <0x00 0x839b6800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L3 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-1608000000 { - opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-408000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1800000000 { - opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - }; - - opp-2352000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8c30ac00>; - opp-supported-hw = <0xf9 0x48>; - clock-latency-ns = <0x9c40>; - }; - - opp-816000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1608000000 { - opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; - - opp-600000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2016000000 { - opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; - opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; - opp-hz = <0x00 0x7829b800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; - opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - }; - - opp-1416000000 { - opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-hz = <0x00 0x54667200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; - opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-408000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0xf9 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - }; - - opp-2304000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x89544000>; - opp-supported-hw = <0xf9 0x24>; - clock-latency-ns = <0x9c40>; - }; - }; - - rkcif-dvp { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-dvp"; - status = "disabled"; - phandle = <0x51>; - }; - - rkisp0-vir2 { - rockchip,hw = <0x58>; - compatible = "rockchip,rkisp-vir"; - status = "okay"; - phandle = <0x23d>; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - remote-endpoint = <0x59>; - reg = <0x00>; - phandle = <0x56>; - }; - }; - }; - - i2c@fea90000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x148>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb0 0x02 0xa8>; - interrupts = <0x00 0x13e 0x04>; - clocks = <0x02 0x8d 0x02 0x85>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfea90000 0x00 0x1000>; - phandle = <0x2a4>; - reset-names = "i2c\0apb"; - - rk8602@42 { - regulator-max-microvolt = <0xe7ef0>; - regulator-boot-on; - rockchip,suspend-voltage-selector = <0x01>; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_npu_s0"; - regulator-ramp-delay = <0x8fc>; - compatible = "rockchip,rk8602"; - reg = <0x42>; - phandle = <0xb3>; - vin-supply = <0x78>; - regulator-compatible = "rk860x-reg"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - - syscon@fd58a000 { - compatible = "rockchip,rk3588-pmu1-grf\0syscon"; - reg = <0x00 0xfd58a000 0x00 0x2000>; - phandle = <0x104>; - }; - - syscon@fd5ec000 { - compatible = "rockchip,mipi-dcphy-grf\0syscon"; - reg = <0x00 0xfd5ec000 0x00 0x4000>; - phandle = <0x191>; - }; - - venc-opp-table { - nvmem-cells = <0xc6 0xc7>; - rockchip,leakage-voltage-sel = <0x01 0x0f 0x00 0x10 0x19 0x01 0x1a 0xfe 0x02>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,grf = <0xc8>; - nvmem-cell-names = "leakage\0opp-info"; - phandle = <0xc4>; - - opp-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-microvolt-L0 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - }; - }; - - iommu@fdc38700 { - power-domains = <0x60 0x0e>; - rockchip,shootdown-entire; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x60 0x04>; - clocks = <0x02 0x190 0x02 0x18f>; - rockchip,enable-cmd-retry; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "irq_rkvdec0_mmu"; - reg = <0x00 0xfdc38700 0x00 0x40 0x00 0xfdc38740 0x00 0x40>; - phandle = <0xc9>; - rockchip,master-handle-irq; - }; - - qos@fdf35200 { - compatible = "syscon"; - reg = <0x00 0xfdf35200 0x00 0x20>; - phandle = <0x88>; - }; - - qos@fdf71000 { - compatible = "syscon"; - reg = <0x00 0xfdf71000 0x00 0x20>; - phandle = <0x86>; - }; - - syscon@fd598000 { - compatible = "rockchip,rk3588-dsu-grf\0syscon"; - reg = <0x00 0xfd598000 0x00 0x100>; - phandle = <0x23>; - }; - - csi2-dphy2 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x211>; - }; - - syscon@fd5b4000 { - compatible = "rockchip,mipi-dphy-grf\0syscon"; - reg = <0x00 0xfd5b4000 0x00 0x1000>; - phandle = <0x192>; - }; - - uio@fe1b0000 { - compatible = "rockchip,uio-gmac"; - status = "disabled"; - reg = <0x00 0xfe1b0000 0x00 0x10000>; - phandle = <0x488>; - rockchip,ethernet = <0x1bd>; - }; - - iommu@fdb70f00 { - power-domains = <0x60 0x1e>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x73 0x04>; - clocks = <0x02 0x18a 0x02 0x189>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "rga3_1_mmu"; - reg = <0x00 0xfdb70f00 0x00 0x100>; - phandle = <0xba>; - }; - - vcc5v0-usb { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_usb"; - compatible = "regulator-fixed"; - phandle = <0x1dd>; - vin-supply = <0x1cd>; - }; - - fiq-debugger { - pinctrl-names = "default"; - rockchip,irq-mode-enable = <0x01>; - rockchip,baudrate = <0x1c200>; - pinctrl-0 = <0x1ce>; - interrupts = <0x00 0x1a7 0x08>; - rockchip,wake-irq = <0x00>; - compatible = "rockchip,fiq-debugger"; - status = "disabled"; - phandle = <0x490>; - rockchip,serial-id = <0x02>; - }; - - phy@fed70000 { - clock-names = "ref\0apb"; - resets = <0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041>; - clocks = <0x02 0x2b5 0x02 0x268>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-hdptx-phy"; - status = "disabled"; - rockchip,grf = <0x1c7>; - reg = <0x00 0xfed70000 0x00 0x2000>; - phandle = <0x1af>; - reset-names = "apb\0init\0cmn\0lane"; - }; - - ethernet@fe1b0000 { - power-domains = <0x60 0x21>; - pinctrl-names = "default"; - phy-mode = "rgmii-rxid"; - snps,mixed-burst; - snps,mtl-rx-config = <0x1bf>; - snps,reset-active-low; - pinctrl-0 = <0x1c1 0x1c2 0x1c3 0x1c4 0x1c5>; - clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; - snps,mtl-tx-config = <0x1c0>; - local-mac-address = [a6 50 47 45 20 4f]; - resets = <0x02 0x20a>; - interrupts = <0x00 0xe3 0x04 0x00 0xe2 0x04>; - clocks = <0x02 0x144 0x02 0x145 0x02 0x167 0x02 0x16c 0x02 0x142>; - clock_in_out = "output"; - snps,tso; - compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; - status = "okay"; - rockchip,grf = <0xc8>; - interrupt-names = "macirq\0eth_wake_irq"; - snps,reset-gpio = <0x10d 0x02 0x01>; - reg = <0x00 0xfe1b0000 0x00 0x10000>; - rockchip,php_grf = <0x76>; - phandle = <0x1bd>; - phy-handle = <0x1c6>; - reset-names = "stmmaceth"; - tx_delay = <0x31>; - snps,axi-config = <0x1be>; - snps,reset-delays-us = <0x00 0x4e20 0x186a0>; - - mdio { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "snps,dwmac-mdio"; - phandle = <0x489>; - - phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x01>; - phandle = <0x1c6>; - }; - }; - - tx-queues-config { - phandle = <0x1c0>; - snps,tx-queues-to-use = <0x01>; - - queue0 { - }; - }; - - stmmac-axi-config { - snps,wr_osr_lmt = <0x04>; - phandle = <0x1be>; - snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; - snps,rd_osr_lmt = <0x08>; - }; - - rx-queues-config { - snps,rx-queues-to-use = <0x01>; - phandle = <0x1bf>; - - queue0 { - }; - }; - }; - - pvtm@fda60000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-litcore-pvtm"; - reg = <0x00 0xfda60000 0x00 0x100>; - - pvtm@2 { - clock-names = "clk\0pclk"; - clocks = <0x02 0x2ca 0x02 0x1b>; - reg = <0x02>; - }; - }; - - rkispp@fdcd8000 { - power-domains = <0x60 0x1d>; - iommus = <0xd3>; - clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; - assigned-clocks = <0x02 0x1d9>; - assigned-clock-rates = <0x5f5e100>; - interrupts = <0x00 0x8d 0x04>; - clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; - compatible = "rockchip,rk3588-rkispp"; - status = "disabled"; - interrupt-names = "fec_irq"; - reg = <0x00 0xfdcd8000 0x00 0xf00>; - phandle = <0x5c>; - }; - - qos@fdf66000 { - compatible = "syscon"; - reg = <0x00 0xfdf66000 0x00 0x20>; - phandle = <0x93>; - }; - - syscon@fd592000 { - compatible = "rockchip,rk3588-bigcore1-grf\0syscon"; - reg = <0x00 0xfd592000 0x00 0x100>; - phandle = <0x29>; - }; - - rkcif-mipi-lvds1 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x53>; - }; - - av1d@fdc70000 { - power-domains = <0x60 0x17>; - iommus = <0xce>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - reg-names = "vcd\0cache\0afbc"; - assigned-clocks = <0x02 0x49 0x02 0x4b>; - rockchip,normal-rates = <0x17d78400 0x17d78400>; - assigned-clock-rates = <0x17d78400 0x17d78400>; - resets = <0x02 0x442 0x02 0x445>; - interrupts = <0x00 0x6c 0x04 0x00 0x6b 0x04 0x00 0x6a 0x04>; - clocks = <0x02 0x49 0x02 0x4b>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x0b>; - compatible = "rockchip,av1-decoder"; - status = "okay"; - interrupt-names = "irq_av1d\0irq_cache\0irq_afbc"; - reg = <0x00 0xfdc70000 0x00 0x800 0x00 0xfdc80000 0x00 0x400 0x00 0xfdc90000 0x00 0x400>; - phandle = <0x276>; - reset-names = "video_a\0video_h"; - }; - - qos@fdf40500 { - compatible = "syscon"; - reg = <0x00 0xfdf40500 0x00 0x20>; - phandle = <0xa3>; - }; - - vcc-hub-reset-regulator { - regulator-boot-on; - gpio = <0x182 0x04 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_hub_reset"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x4a0>; - }; - - qos@fdf72200 { - compatible = "syscon"; - reg = <0x00 0xfdf72200 0x00 0x20>; - phandle = <0x83>; - }; - - serial@feb70000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x163>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14f 0x04>; - clocks = <0x02 0xc3 0x02 0xae>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeb70000 0x00 0x100>; - phandle = <0x2cc>; - dmas = <0xf1 0x09 0xf1 0x0a>; - reg-shift = <0x02>; - }; - - rkcif-mipi-lvds2-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "okay"; - rockchip,cif = <0x55>; - phandle = <0x233>; - - port { - - endpoint { - remote-endpoint = <0x56>; - phandle = <0x59>; - }; - }; - }; - - i2c@feca0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x186>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb7 0x02 0xaf>; - interrupts = <0x00 0x145 0x04>; - clocks = <0x02 0x94 0x02 0x8c>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "disabled"; - reg = <0x00 0xfeca0000 0x00 0x1000>; - phandle = <0x2e5>; - reset-names = "i2c\0apb"; - }; - - vcc-sdcard-pwr-en-regulator { - regulator-boot-on; - gpio = <0xfe 0x07 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_sdcard_pwr_en"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4a5>; - }; - - rkcif-mipi-lvds1-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x53>; - phandle = <0x230>; - }; - - qos@fdf63000 { - compatible = "syscon"; - reg = <0x00 0xfdf63000 0x00 0x20>; - phandle = <0x8c>; - }; - - phy@fee00000 { - rockchip,pipe-grf = <0x76>; - clock-names = "refclk\0apbclk\0phpclk"; - assigned-clocks = <0x02 0x2bd>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x02 0x20005 0x02 0x4d6>; - clocks = <0x02 0x2bd 0x02 0x185 0x02 0x166>; - #phy-cells = <0x01>; - compatible = "rockchip,rk3588-naneng-combphy"; - status = "okay"; - rockchip,pipe-phy-grf = <0x194>; - reg = <0x00 0xfee00000 0x00 0x100>; - phandle = <0x108>; - reset-names = "combphy-apb\0combphy"; - }; - - can@fea50000 { - pinctrl-names = "default"; - pinctrl-0 = <0x145>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x02 0xb9 0x02 0xb8>; - interrupts = <0x00 0x155 0x04>; - clocks = <0x02 0x70 0x02 0x6f>; - compatible = "rockchip,can-2.0"; - status = "disabled"; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - reg = <0x00 0xfea50000 0x00 0x1000>; - phandle = <0x2a0>; - reset-names = "can\0can-apb"; - }; - - pdm@fe4b0000 { - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x139 0x13a>; - pinctrl-0 = <0x134 0x135 0x136 0x137>; - clock-names = "pdm_clk\0pdm_hclk"; - clocks = <0x02 0x29f 0x02 0x29e>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-pdm"; - pinctrl-1 = <0x138>; - status = "disabled"; - reg = <0x00 0xfe4b0000 0x00 0x1000>; - phandle = <0x29a>; - dmas = <0x7c 0x04>; - }; - - rkisp-unite-mmu@fdcb7f00 { - power-domains = <0x60 0x1c>; - clock-names = "aclk0\0iface0\0aclk1\0iface1"; - interrupts = <0x00 0x84 0x04 0x00 0x88 0x04>; - clocks = <0x02 0x1de 0x02 0x1df 0x02 0x120 0x02 0x121>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "disabled"; - interrupt-names = "isp0_mmu\0isp1_mmu"; - reg = <0x00 0xfdcb7f00 0x00 0x100 0x00 0xfdcc7f00 0x00 0x100>; - phandle = <0xcf>; - }; - - syscon@fd5a6000 { - clocks = <0x72>; - compatible = "rockchip,rk3588-vo-grf\0syscon"; - reg = <0x00 0xfd5a6000 0x00 0x2000>; - phandle = <0xf5>; - }; - - cpus { - #address-cells = <0x01>; - #size-cells = <0x00>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x00>; - enable-method = "psci"; - clocks = <0x0e 0x00>; - cpu-idle-states = <0x10>; - operating-points-v2 = <0x0f>; - capacity-dmips-mhz = <0x212>; - - cpu-supply = <0x12>; - mem-supply = <0x12>; - dynamic-power-coefficient = <0x64>; - - i-cache-line-size = <0x40>; - i-cache-size = <0x8000>; - i-cache-sets = <0x80>; - - d-cache-line-size = <0x40>; - d-cache-size = <0x8000>; - d-cache-sets = <0x80>; - - next-level-cache = <0x11>; - #cooling-cells = <0x02>; - phandle = <0x06>; - }; - - cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x100>; - enable-method = "psci"; - capacity-dmips-mhz = <0x212>; - clocks = <0x0e 0x00>; - operating-points-v2 = <0x0f>; - cpu-idle-states = <0x10>; - i-cache-size = <0x8000>; - i-cache-line-size = <0x40>; - i-cache-sets = <0x80>; - d-cache-size = <0x8000>; - d-cache-line-size = <0x40>; - d-cache-sets = <0x80>; - next-level-cache = <0x13>; - phandle = <0x07>; - }; - - l2-cache-l0 { - compatible = "cache"; - cache-size = <0x20000>; - cache-sets = <0x200>; - cache-line-size = <0x40>; - next-level-cache = <0x1e>; - phandle = <0x11>; - }; - - l2-cache-l1 { - compatible = "cache"; - cache-size = <0x20000>; - cache-line-size = <0x40>; - cache-sets = <0x200>; - next-level-cache = <0x1e>; - phandle = <0x13>; - }; - - l3-cache { - compatible = "cache"; - cache-size = <0x300000>; - cache-sets = <0x1000>; - cache-line-size = <0x40>; - phandle = <0x1e>; - }; - - idle-states { - entry-method = "psci"; - - cpu-sleep { - compatible = "arm,idle-state"; - entry-latency-us = <0x64>; - exit-latency-us = <0x78>; - min-residency-us = <0x3e8>; - local-timer-stop; - arm,psci-suspend-param = <0x10000>; - phandle = <0x10>; - }; - }; - - cpu-map { - cluster0 { - core0 { - cpu = <0x06>; - }; - - core1 { - cpu = <0x07>; - }; - }; - }; - }; - - vcc-hub3-reset-regulator { - gpio = <0x182 0x06 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_hub3_reset"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x4a1>; - }; - - rkispp1-vir0 { - rockchip,hw = <0x5c>; - compatible = "rockchip,rk3588-rkispp-vir"; - status = "disabled"; - phandle = <0x244>; - }; - - saradc@fec10000 { - vref-supply = <0x177>; - clock-names = "saradc\0apb_pclk"; - resets = <0x02 0xbe>; - interrupts = <0x00 0x18e 0x04>; - clocks = <0x02 0x9d 0x02 0x9c>; - #io-channel-cells = <0x01>; - compatible = "rockchip,rk3588-saradc"; - status = "okay"; - reg = <0x00 0xfec10000 0x00 0x10000>; - phandle = <0x1d9>; - reset-names = "saradc-apb"; - }; - - rkisp0-vir0 { - rockchip,hw = <0x58>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x23b>; - }; - - __symbols__ { - i2s2m0_lrck = "/pinctrl/i2s2/i2s2m0-lrck"; - i2c3 = "/i2c@feab0000"; - scmi_shmem = "/sram@10f000/sram@0"; - rkispp0_vir0 = "/rkispp0-vir0"; - qos_jpeg_enc0 = "/qos@fdf66400"; - i2s1m1_sdi1 = "/pinctrl/i2s1/i2s1m1-sdi1"; - dp_altmode_mux = "/i2c@fec80000/fusb302@22/connector/ports/port@1/endpoint"; - pmic_pins = "/pinctrl/pmic/pmic-pins"; - usb_host1_ohci = "/usb@fc8c0000"; - pwm9 = "/pwm@febe0010"; - i2c6m4_xfer = "/pinctrl/i2c6/i2c6m4-xfer"; - leds_gpio = "/pinctrl/leds/leds-gpio"; - i2c3m3_xfer = "/pinctrl/i2c3/i2c3m3-xfer"; - qos_usb3_1 = "/qos@fdf3e000"; - hdmi_debug4 = "/pinctrl/hdmi/hdmi-debug4"; - i2c0m2_xfer = "/pinctrl/i2c0/i2c0m2-xfer"; - gmac0_rgmii_bus = "/pinctrl/gmac0/gmac0-rgmii-bus"; - pcie30x2m2_pins = "/pinctrl/pcie30x2/pcie30x2m2-pins"; - sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; - spi0m3_cs0 = "/pinctrl/spi0/spi0m3-cs0"; - hwlock = "/hwspinlock@fe5a0000"; - pcie3x2 = "/pcie@fe160000"; - i2s2m1_mclk = "/pinctrl/i2s2/i2s2m1-mclk"; - mipim0_camera3_clk = "/pinctrl/mipi/mipim0-camera3-clk"; - mclkin_i2s0 = "/clocks/mclkin-i2s0"; - edp1_in_vp1 = "/edp@fded0000/ports/port@0/endpoint@1"; - rkvenc0_mmu = "/iommu@fdbdf000"; - pwm14 = "/pwm@febf0020"; - rk806_dvs2_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_rst"; - mipi2_csi2 = "/mipi2-csi2"; - can2m1_pins = "/pinctrl/can2/can2m1-pins"; - pcie2x1l1 = "/pcie@fe180000"; - hdmi0_in_vp2 = "/hdmi@fde80000/ports/port@0/endpoint@2"; - qos_rkvenc0_m2wo = "/qos@fdf60400"; - pwm3m2_pins = "/pinctrl/pwm3/pwm3m2-pins"; - optee = "/firmware/optee"; - l2_cache_b2 = "/cpus/l2-cache-b2"; - pwm0m1_pins = "/pinctrl/pwm0/pwm0m1-pins"; - vdpu = "/vdpu@fdb50400"; - i2s3_sdo = "/pinctrl/i2s3/i2s3-sdo"; - usbdp_phy0_u3 = "/phy@fed80000/u3-port"; - thermal_zones = "/thermal-zones"; - hdmim2_rx_scl = "/pinctrl/hdmi/hdmim2-rx-scl"; - hdmim2_rx_sda = "/pinctrl/hdmi/hdmim2-rx-sda"; - uart9m0_rtsn = "/pinctrl/uart9/uart9m0-rtsn"; - spi1m2_cs0 = "/pinctrl/spi1/spi1m2-cs0"; - pcie2x1l1_intc = "/pcie@fe180000/legacy-interrupt-controller"; - spdif1m1_tx = "/pinctrl/spdif1/spdif1m1-tx"; - venc_opp_info = "/otp@fecc0000/venc-opp-info@67"; - qos_iep = "/qos@fdf66000"; - pcfg_pull_none_drv_level_3 = "/pinctrl/pcfg-pull-none-drv-level-3"; - spi3m2_cs1 = "/pinctrl/spi3/spi3m2-cs1"; - uart4m2_xfer = "/pinctrl/uart4/uart4m2-xfer"; - vp1 = "/vop@fdd90000/ports/port@1"; - bigcore1_grf = "/syscon@fd592000"; - uart1m1_xfer = "/pinctrl/uart1/uart1m1-xfer"; - uart5m1_ctsn = "/pinctrl/uart5/uart5m1-ctsn"; - fspim1_pins = "/pinctrl/fspi/fspim1-pins"; - cpu_l1 = "/cpus/cpu@100"; - uart8 = "/serial@febb0000"; - rkisp1_vir3 = "/rkisp1-vir3"; - qos_vop_m1 = "/qos@fdf82200"; - pcie_clk2 = "/pcie-clk2"; - cluster2_opp_table = "/cluster2-opp-table"; - usb_grf = "/syscon@fd5ac000"; - pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; - jpege0_mmu = "/iommu@fdba0800"; - spi2m1_cs0 = "/pinctrl/spi2/spi2m1-cs0"; - u2phy3 = "/syscon@fd5dc000/usb2-phy@c000"; - power_led = "/leds/power"; - aclk_usb = "/clocks/aclk_usb@fd7c08a8"; - csi2_dphy1 = "/csi2-dphy1"; - spi2 = "/spi@feb20000"; - uart2_rtsn = "/pinctrl/uart2/uart2-rtsn"; - spi4m1_cs1 = "/pinctrl/spi4/spi4m1-cs1"; - pcfg_pull_up_drv_level_15 = "/pinctrl/pcfg-pull-up-drv-level-15"; - vo1_grf = "/syscon@fd5a8000"; - pcie_essd = "/pcie-essd"; - i2c4m3_xfer = "/pinctrl/i2c4/i2c4m3-xfer"; - gpio0 = "/pinctrl/gpio@fd8a0000"; - saradc = "/saradc@fec10000"; - i2s1m0_sdi3 = "/pinctrl/i2s1/i2s1m0-sdi3"; - i2c1m2_xfer = "/pinctrl/i2c1/i2c1m2-xfer"; - csidphy0_out = "/csi2-dphy0/ports/port@1/endpoint@0"; - emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; - mclkout_i2s3 = "/clocks/mclkout-i2s3@fd58c318"; - xc7160_out0 = "/i2c@fec80000/XC7160b@1b/port/endpoint"; - rkcif_mipi_lvds1_sditf_vir1 = "/rkcif-mipi-lvds1-sditf-vir1"; - dsi1 = "/dsi@fde30000"; - venc_opp_table = "/venc-opp-table"; - qos_isp0_mwo = "/qos@fdf40500"; - pmu_pins = "/pinctrl/pmu/pmu-pins"; - gmac0_miim = "/pinctrl/gmac0/gmac0-miim"; - spi3m0_cs0 = "/pinctrl/spi3/spi3m0-cs0"; - mipi_dcphy0 = "/mipi-dcphy-dummy"; - minidump_mem = "/reserved-memory/minidump-mem@c000000"; - avdd_1v2_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG3"; - pwm7m3_pins = "/pinctrl/pwm7/pwm7m3-pins"; - route_edp1 = "/display-subsystem/route/route-edp1"; - hdmi1 = "/hdmi@fdea0000"; - crypto = "/crypto@fe370000"; - hdmi1_in_vp2 = "/hdmi@fdea0000/ports/port@0/endpoint@2"; - dfi = "/dfi@fe060000"; - can0m0_pins = "/pinctrl/can0/can0m0-pins"; - pcfg_pull_up_drv_level_2 = "/pinctrl/pcfg-pull-up-drv-level-2"; - pinctrl = "/pinctrl"; - rgmii_phy0 = "/ethernet@fe1b0000/mdio/phy@1"; - pcfg_pull_down_drv_level_6 = "/pinctrl/pcfg-pull-down-drv-level-6"; - dp0m0_pins = "/pinctrl/dp0/dp0m0-pins"; - i2s0_sdo3 = "/pinctrl/i2s0/i2s0-sdo3"; - vcc_sata_pwr_en = "/vcc-sata-pwr-en-regulator"; - pwm1m1_pins = "/pinctrl/pwm1/pwm1m1-pins"; - pcie30_avdd1v8 = "/pcie30-avdd1v8"; - usb2phy3_grf = "/syscon@fd5dc000"; - u2phy2_host = "/syscon@fd5d8000/usb2-phy@8000/host-port"; - hym8563_int = "/pinctrl/hym8563/hym8563-int"; - mailbox1 = "/mailbox@fec70000"; - pdm0m1_sdi3 = "/pinctrl/pdm0/pdm0m1-sdi3"; - combphy1_ps = "/phy@fee10000"; - hdptxphy0_grf = "/syscon@fd5e0000"; - sdei = "/firmware/sdei"; - vp0_out_dp1 = "/vop@fdd90000/ports/port@0/endpoint@3"; - uart5m2_xfer = "/pinctrl/uart5/uart5m2-xfer"; - uart9m2_ctsn = "/pinctrl/uart9/uart9m2-ctsn"; - uart2m1_xfer = "/pinctrl/uart2/uart2m1-xfer"; - dp0_out = "/dp@fde50000/ports/port@1/endpoint"; - uart6m1_ctsn = "/pinctrl/uart6/uart6m1-ctsn"; - route_rgb = "/display-subsystem/route/route-rgb"; - csidphy0_out1 = "/csi2-dphy0/ports/port@1/endpoint@0"; - i2c1 = "/i2c@fea90000"; - pinctrl_rk806 = "/spi@feb20000/rk806single@0/pinctrl_rk806"; - cpu_code = "/otp@fecc0000/cpu-code@2"; - pwm7 = "/pwm@febd0030"; - mipi5_csi2_hw = "/mipi5-csi2-hw@fdd60000"; - gpu_leakage = "/otp@fecc0000/gpu-leakage@1b"; - hdmi_debug2 = "/pinctrl/hdmi/hdmi-debug2"; - pdm0m0_clk = "/pinctrl/pdm0/pdm0m0-clk"; - gmac0_ppsclk = "/pinctrl/gmac0/gmac0-ppsclk"; - i2c8m4_xfer = "/pinctrl/i2c8/i2c8m4-xfer"; - vdd_npu_s0 = "/i2c@fea90000/rk8602@42"; - i2c5m3_xfer = "/pinctrl/i2c5/i2c5m3-xfer"; - gmac0 = "/ethernet@fe1b0000"; - i2c2m2_xfer = "/pinctrl/i2c2/i2c2m2-xfer"; - rockchip_system_monitor = "/rockchip-system-monitor"; - pcie30x4m2_pins = "/pinctrl/pcie30x4/pcie30x4m2-pins"; - pwm12 = "/pwm@febf0000"; - emmc_cmd = "/pinctrl/emmc/emmc-cmd"; - i2s1_8ch = "/i2s@fe480000"; - pcie30x1m1_pins = "/pinctrl/pcie30x1/pcie30x1m1-pins"; - uart4_ctsn = "/pinctrl/uart4/uart4-ctsn"; - vdd_cpu_big0_mem_s0 = "/i2c@fd880000/rk8602@42"; - pcfg_pull_none = "/pinctrl/pcfg-pull-none"; - i2s1m0_mclk = "/pinctrl/i2s1/i2s1m0-mclk"; - vp1_out_edp1 = "/vop@fdd90000/ports/port@1/endpoint@4"; - hdmi0_in_vp0 = "/hdmi@fde80000/ports/port@0/endpoint@0"; - vcc_4g = "/vcc-4g-regulator"; - firefly_leds = "/leds"; - jpege3 = "/jpege-core@fdbac000"; - l2_cache_b0 = "/cpus/l2-cache-b0"; - pmu1_grf = "/syscon@fd58a000"; - aclk_rkvenc1_pre = "/clocks/aclk_rkvenc1_pre@fd7c08c0"; - can1m0_pins = "/pinctrl/can1/can1m0-pins"; - spi0m3_pins = "/pinctrl/spi0/spi0m3-pins"; - pwm5m2_pins = "/pinctrl/pwm5/pwm5m2-pins"; - mipidphy0_in_ucam1 = "/csi2-dphy0/ports/port@0/endpoint@1"; - i2s0_lrck = "/pinctrl/i2s0/i2s0-lrck"; - clk32k_out0 = "/pinctrl/clk32k/clk32k-out0"; - dp1m0_pins = "/pinctrl/dp1/dp1m0-pins"; - pwm2m1_pins = "/pinctrl/pwm2/pwm2m1-pins"; - usbc0 = "/i2c@fec80000/fusb302@22"; - eth1_pins = "/pinctrl/eth1/eth1-pins"; - pcfg_pull_none_drv_level_1 = "/pinctrl/pcfg-pull-none-drv-level-1"; - csi2_dphy0_hw = "/csi2-dphy0-hw@fedc0000"; - pdm1m1_sdi3 = "/pinctrl/pdm1/pdm1m1-sdi3"; - dsi0_in_vp3 = "/dsi@fde20000/ports/port@0/endpoint@1"; - hdmim1_tx1_cec = "/pinctrl/hdmi/hdmim1-tx1-cec"; - usbc0_role_sw = "/i2c@fec80000/fusb302@22/ports/port@0/endpoint@0"; - uart6 = "/serial@feb90000"; - rkisp1_vir1 = "/rkisp1-vir1"; - sdhci = "/mmc@fe2e0000"; - uart6m2_xfer = "/pinctrl/uart6/uart6m2-xfer"; - target = "/thermal-zones/soc-thermal/trips/trip-point-1"; - rkcif_mipi_lvds_sditf_vir3 = "/rkcif-mipi-lvds-sditf-vir3"; - pcfg_pull_none_drv_level_0_smt = "/pinctrl/pcfg-pull-none-drv-level-0-smt"; - uart3m1_xfer = "/pinctrl/uart3/uart3m1-xfer"; - uart7m1_ctsn = "/pinctrl/uart7/uart7m1-ctsn"; - uart0m0_xfer = "/pinctrl/uart0/uart0m0-xfer"; - rgb_in_vp3 = "/syscon@fd58c000/rgb/ports/port@0/endpoint@2"; - rkcif_mipi_lvds5_sditf_vir2 = "/rkcif-mipi-lvds5-sditf-vir2"; - u2phy1 = "/syscon@fd5d4000/usb2-phy@4000"; - i2s5_8ch = "/i2s@fddf0000"; - i2s2m0_sdo = "/pinctrl/i2s2/i2s2m0-sdo"; - gpu = "/gpu@fb000000"; - spi0 = "/spi@feb00000"; - iep = "/iep@fdbb0000"; - pcfg_pull_up_drv_level_13 = "/pinctrl/pcfg-pull-up-drv-level-13"; - spdif_tx5 = "/spdif-tx@fddb8000"; - hdptxphy_hdmi_clk1 = "/hdmiphy@fed70000/clk-port"; - drm_logo = "/reserved-memory/drm-logo@00000000"; - i2s1m0_sdi1 = "/pinctrl/i2s1/i2s1m0-sdi1"; - rk806_dvs3_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_null"; - gmac1_ppsclk = "/pinctrl/gmac1/gmac1-ppsclk"; - usb_host0_ohci = "/usb@fc840000"; - mclkout_i2s1 = "/clocks/mclkout-i2s1@fd58c318"; - i2c6m3_xfer = "/pinctrl/i2c6/i2c6m3-xfer"; - i2c3m2_xfer = "/pinctrl/i2c3/i2c3m2-xfer"; - vop_opp_info = "/otp@fecc0000/vop-opp-info@61"; - cif_dvp_bus16 = "/pinctrl/cif/cif-dvp-bus16"; - i2c0m1_xfer = "/pinctrl/i2c0/i2c0m1-xfer"; - pcie30x2m1_pins = "/pinctrl/pcie30x2/pcie30x2m1-pins"; - mipidcphy0_grf = "/syscon@fd5e8000"; - vdd_cpu_big1_mem_s0 = "/i2c@fd880000/rk8603@43"; - pcie30phy = "/phy@fee80000"; - dmc = "/dmc"; - i2s2m0_mclk = "/pinctrl/i2s2/i2s2m0-mclk"; - mipidcphy1 = "/phy@fedb0000"; - dp1_sound = "/dp1-sound"; - hdmi1_in_vp0 = "/hdmi@fdea0000/ports/port@0/endpoint@0"; - scmi = "/firmware/scmi"; - pcfg_pull_up_drv_level_0 = "/pinctrl/pcfg-pull-up-drv-level-0"; - gmac1_clkinout = "/pinctrl/gmac1/gmac1-clkinout"; - pcfg_pull_down_drv_level_4 = "/pinctrl/pcfg-pull-down-drv-level-4"; - i2s0_sdo1 = "/pinctrl/i2s0/i2s0-sdo1"; - l3_cache = "/cpus/l3-cache"; - i2s3_idle = "/pinctrl/i2s3/i2s3-idle"; - pcfg_pull_none_drv_level_4_smt = "/pinctrl/pcfg-pull-none-drv-level-4-smt"; - litcpu_pins = "/pinctrl/litcpu/litcpu-pins"; - mipi1_csi2 = "/mipi1-csi2"; - can2m0_pins = "/pinctrl/can2/can2m0-pins"; - pwm6m2_pins = "/pinctrl/pwm6/pwm6m2-pins"; - usbdp_phy0 = "/phy@fed80000"; - pdm0m1_sdi1 = "/pinctrl/pdm0/pdm0m1-sdi1"; - pwm3m1_pins = "/pinctrl/pwm3/pwm3m1-pins"; - vdd_log_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG3"; - i2s9_8ch = "/i2s@fddfc000"; - pwm0m0_pins = "/pinctrl/pwm0/pwm0m0-pins"; - vcc_hub3_reset = "/vcc-hub3-reset-regulator"; - dsi1_in_vp3 = "/dsi@fde30000/ports/port@0/endpoint@1"; - otp_cpu_version = "/otp@fecc0000/cpu-version@1c"; - pcie2x1l0_intc = "/pcie@fe170000/legacy-interrupt-controller"; - spdif0m1_tx = "/pinctrl/spdif0/spdif0m1-tx"; - pcfg_pull_down_drv_level_15 = "/pinctrl/pcfg-pull-down-drv-level-15"; - XC7160 = "/i2c@fec80000/XC7160b@1b"; - rkcif_mipi_lvds4_sditf_vir3 = "/rkcif-mipi-lvds4-sditf-vir3"; - uart7m2_xfer = "/pinctrl/uart7/uart7m2-xfer"; - uart4m1_xfer = "/pinctrl/uart4/uart4m1-xfer"; - hdmim1_tx1_scl = "/pinctrl/hdmi/hdmim1-tx1-scl"; - hdmim1_tx1_sda = "/pinctrl/hdmi/hdmim1-tx1-sda"; - uart8m1_ctsn = "/pinctrl/uart8/uart8m1-ctsn"; - i2s2_2ch = "/i2s@fe490000"; - pwm5 = "/pwm@febd0010"; - uart1m0_xfer = "/pinctrl/uart1/uart1m0-xfer"; - uart5m0_ctsn = "/pinctrl/uart5/uart5m0-ctsn"; - fspim0_cs1 = "/pinctrl/fspi/fspim0-cs1"; - fspim0_pins = "/pinctrl/fspi/fspim0-pins"; - rkisp0_vir3 = "/rkisp0-vir3"; - l2_cache_l3 = "/cpus/l2-cache-l3"; - rk806_dvs3_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_dvs"; - hdmi_debug0 = "/pinctrl/hdmi/hdmi-debug0"; - hdmim1_tx1_hpd = "/pinctrl/hdmi/hdmim1-tx1-hpd"; - vp1_out_dp0 = "/vop@fdd90000/ports/port@1/endpoint@0"; - qos_isp0_mro = "/qos@fdf40400"; - spi0m2_cs1 = "/pinctrl/spi0/spi0m2-cs1"; - vdd_gpu_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; - tsadc_shut = "/pinctrl/tsadc/tsadc-shut"; - pwm10 = "/pwm@febe0020"; - i2c7m3_xfer = "/pinctrl/i2c7/i2c7m3-xfer"; - rktimer = "/timer@feae0000"; - cpub0_leakage = "/otp@fecc0000/cpub0-leakage@17"; - i2c4m2_xfer = "/pinctrl/i2c4/i2c4m2-xfer"; - hclk_rkvdec1_pre = "/clocks/hclk_rkvdec1_pre@fd7c08a4"; - pcie30phy_pins = "/pinctrl/pcie30phy/pcie30phy-pins"; - jpege1 = "/jpege-core@fdba4000"; - pcfg_pull_none_drv_level_14 = "/pinctrl/pcfg-pull-none-drv-level-14"; - i2c1m1_xfer = "/pinctrl/i2c1/i2c1m1-xfer"; - rkcif_dvp_sditf = "/rkcif-dvp-sditf"; - rkcif_mipi_lvds4_sditf = "/rkcif-mipi-lvds4-sditf"; - vp2_out_dp1 = "/vop@fdd90000/ports/port@2/endpoint@5"; - vp2_out_dsi0 = "/vop@fdd90000/ports/port@2/endpoint@3"; - its1 = "/interrupt-controller@fe600000/msi-controller@fe660000"; - cpu_b3 = "/cpus/cpu@700"; - vcc_hub_reset = "/vcc-hub-reset-regulator"; - spi1m1_cs1 = "/pinctrl/spi1/spi1m1-cs1"; - vdd_npu_mem_s0 = "/i2c@fea90000/rk8602@42"; - pwm7m2_pins = "/pinctrl/pwm7/pwm7m2-pins"; - pdm1m1_sdi1 = "/pinctrl/pdm1/pdm1m1-sdi1"; - vbus5v0_typec_pwr_en = "/vbus5v0-typec-pwr-en-regulator"; - pwm4m1_pins = "/pinctrl/pwm4/pwm4m1-pins"; - dmc_opp_table = "/dmc-opp-table"; - pcie30x4_button_rstn = "/pinctrl/pcie30x4/pcie30x4-button-rstn"; - uart4 = "/serial@feb70000"; - pwm1m0_pins = "/pinctrl/pwm1/pwm1m0-pins"; - spi0m0_cs0 = "/pinctrl/spi0/spi0m0-cs0"; - pldo6_s3 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG6"; - mipim1_camera2_clk = "/pinctrl/mipi/mipim1-camera2-clk"; - mipim0_camera0_clk = "/pinctrl/mipi/mipim0-camera0-clk"; - rkcif_mipi_lvds_sditf_vir1 = "/rkcif-mipi-lvds-sditf-vir1"; - pcfg_pull_up_drv_level_9 = "/pinctrl/pcfg-pull-up-drv-level-9"; - dmac2 = "/dma-controller@fed10000"; - pdm0m0_sdi3 = "/pinctrl/pdm0/pdm0m0-sdi3"; - qos_gpu_m2 = "/qos@fdf35400"; - i2s0_sdi3 = "/pinctrl/i2s0/i2s0-sdi3"; - cluster0_opp_table = "/cluster0-opp-table"; - spi2m0_cs1 = "/pinctrl/spi2/spi2m0-cs1"; - otp_id = "/otp@fecc0000/id@7"; - uart5m1_xfer = "/pinctrl/uart5/uart5m1-xfer"; - uart9m1_ctsn = "/pinctrl/uart9/uart9m1-ctsn"; - qos_rga3_0 = "/qos@fdf67000"; - usbdp_phy0_dp = "/phy@fed80000/dp-port"; - uart2m0_xfer = "/pinctrl/uart2/uart2m0-xfer"; - uart6m0_ctsn = "/pinctrl/uart6/uart6m0-ctsn"; - npu_pins = "/pinctrl/npu/npu-pins"; - pcfg_pull_up_drv_level_11 = "/pinctrl/pcfg-pull-up-drv-level-11"; - spdif_tx3 = "/spdif-tx@fdde0000"; - rkispp0 = "/rkispp@fdcd0000"; - xin32k = "/clocks/xin32k"; - vcc_1v8_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG10"; - qos_usb2host_1 = "/qos@fdf3e600"; - bt_sco = "/bt-sco"; - pcfg_output_high_pull_none = "/pinctrl/pcfg-output-high-pull-none"; - adc_keys = "/adc-keys"; - rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; - i2c8 = "/i2c@feca0000"; - dp0 = "/dp@fde50000"; - mipi_te1 = "/pinctrl/mipi/mipi-te1"; - i2c8m3_xfer = "/pinctrl/i2c8/i2c8m3-xfer"; - i2c5m2_xfer = "/pinctrl/i2c5/i2c5m2-xfer"; - pcie30x2_button_rstn = "/pinctrl/pcie30x2/pcie30x2-button-rstn"; - syssram = "/sram@ff001000"; - pcfg_pull_down_drv_level_2 = "/pinctrl/pcfg-pull-down-drv-level-2"; - qos_hdmirx = "/qos@fdf81200"; - i2c2m1_xfer = "/pinctrl/i2c2/i2c2m1-xfer"; - pcie30x4m1_pins = "/pinctrl/pcie30x4/pcie30x4m1-pins"; - vdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG5"; - hw_decompress = "/decompress@fea80000"; - pcie30x1m0_pins = "/pinctrl/pcie30x1/pcie30x1m0-pins"; - mipim0_camera4_clk = "/pinctrl/mipi/mipim0-camera4-clk"; - gmac1_txer = "/pinctrl/gmac1/gmac1-txer"; - uart3_ctsn = "/pinctrl/uart3/uart3-ctsn"; - vcc_sdcard_pwr_en = "/vcc-sdcard-pwr-en-regulator"; - mipi0_csi2_hw = "/mipi0-csi2-hw@fdd10000"; - rkvenc1_mmu = "/iommu@fdbef000"; - edp0 = "/edp@fdec0000"; - rkvenc_ccu = "/rkvenc-ccu"; - rk806_dvs3_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_rst"; - power = "/power-management@fd8d8000/power-controller"; - vad = "/vad@fe4d0000"; - spi3m3_pins = "/pinctrl/spi3/spi3m3-pins"; - pwm8m2_pins = "/pinctrl/pwm8/pwm8m2-pins"; - spi0m2_pins = "/pinctrl/spi0/spi0m2-pins"; - pwm5m1_pins = "/pinctrl/pwm5/pwm5m1-pins"; - vcc_3v3_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG4"; - aclk_isp1_pre = "/clocks/aclk_isp1_pre@fd7c0868"; - pwm2m0_pins = "/pinctrl/pwm2/pwm2m0-pins"; - i2s1m1_sdo2 = "/pinctrl/i2s1/i2s1m1-sdo2"; - pcfg_pull_down_drv_level_13 = "/pinctrl/pcfg-pull-down-drv-level-13"; - eth0_pins = "/pinctrl/eth0/eth0-pins"; - rkcif_mipi_lvds4_sditf_vir1 = "/rkcif-mipi-lvds4-sditf-vir1"; - pwm3 = "/pwm@fd8b0030"; - pdm1m0_sdi3 = "/pinctrl/pdm1/pdm1m0-sdi3"; - rkcif_mmu = "/iommu@fdce0800"; - usbc0_int = "/pinctrl/usb-typec/usbc0-int"; - gmac0_tx_bus2 = "/pinctrl/gmac0/gmac0-tx-bus2"; - sata2 = "/sata@fe230000"; - uart9m2_xfer = "/pinctrl/uart9/uart9m2-xfer"; - dp0_in_vp2 = "/dp@fde50000/ports/port@0/endpoint@2"; - hdmiin_sound = "/hdmiin-sound"; - rkisp0_vir1 = "/rkisp0-vir1"; - uart6_gpios = "/pinctrl/wireless-bluetooth/uart6-gpios"; - spi3m3_cs1 = "/pinctrl/spi3/spi3m3-cs1"; - l2_cache_l1 = "/cpus/l2-cache-l1"; - pcfg_pull_none_drv_level_8 = "/pinctrl/pcfg-pull-none-drv-level-8"; - uart6m1_xfer = "/pinctrl/uart6/uart6m1-xfer"; - pwm11m3_pins = "/pinctrl/pwm11/pwm11m3-pins"; - vp2_out_hdmi0 = "/vop@fdd90000/ports/port@2/endpoint@2"; - qos_hdcp1 = "/qos@fdf81000"; - scmi_reset = "/firmware/scmi/protocol@16"; - vdd_cpu_lit_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; - i2s0_mclk = "/pinctrl/i2s0/i2s0-mclk"; - uart3m0_xfer = "/pinctrl/uart3/uart3m0-xfer"; - uart7m0_ctsn = "/pinctrl/uart7/uart7m0-ctsn"; - usbhost_dwc3_0 = "/usbhost3_0/usb@fcd00000"; - hdmim0_rx_hpdin = "/pinctrl/hdmi/hdmim0-rx-hpdin"; - edp0_out = "/edp@fdec0000/ports/port@1/endpoint"; - rkisp0 = "/rkisp@fdcb0000"; - dsu_grf = "/syscon@fd598000"; - vcc_fan_pwr_en = "/vcc-fan-pwr-en-regulator"; - gmac1_rx_bus2 = "/pinctrl/gmac1/gmac1-rx-bus2"; - uart1m2_rtsn = "/pinctrl/uart1/uart1m2-rtsn"; - csi2_dcphy0 = "/csi2-dcphy0"; - usb2phy0_grf = "/syscon@fd5d0000"; - scmi_clk = "/firmware/scmi/protocol@14"; - emmc_clk = "/pinctrl/emmc/emmc-clk"; - jpege1_mmu = "/iommu@fdba4800"; - qos_rkvenc1_m1ro = "/qos@fdf61200"; - spi2m2_cs0 = "/pinctrl/spi2/spi2m2-cs0"; - vcc5v0_host = "/vcc5v0-host"; - cru = "/clock-controller@fd7c0000"; - hdmim0_tx0_cec = "/pinctrl/hdmi/hdmim0-tx0-cec"; - pcfg_pull_none_drv_level_12 = "/pinctrl/pcfg-pull-none-drv-level-12"; - rk806_dvs2_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_null"; - cpub01_opp_info = "/otp@fecc0000/cpub01-opp-info@43"; - i2s3_sdi = "/pinctrl/i2s3/i2s3-sdi"; - aclk_rkvdec0_pre = "/clocks/aclk_rkvdec0_pre@fd7c08a0"; - cpu_b1 = "/cpus/cpu@500"; - i2c6m2_xfer = "/pinctrl/i2c6/i2c6m2-xfer"; - rknpu_mmu = "/iommu@fdab9000"; - rkcif_mipi_lvds_sditf = "/rkcif-mipi-lvds-sditf"; - i2c3m1_xfer = "/pinctrl/i2c3/i2c3m1-xfer"; - i2c0m0_xfer = "/pinctrl/i2c0/i2c0m0-xfer"; - pcie30x2m0_pins = "/pinctrl/pcie30x2/pcie30x2m0-pins"; - qos_isp1_mwo = "/qos@fdf41000"; - mipi2_csi2_output1 = "/mipi2-csi2/ports/port@1/endpoint@0"; - vcc5v0_usbdcin = "/vcc5v0-usbdcin"; - spi3m1_cs0 = "/pinctrl/spi3/spi3m1-cs0"; - reboot_mode = "/syscon@fd588000/reboot-mode"; - rga3_0_mmu = "/iommu@fdb60f00"; - imx415_out0 = "/i2c@fec80000/imx415@37/port/endpoint"; - rkcif_mipi_lvds3_sditf_vir2 = "/rkcif-mipi-lvds3-sditf-vir2"; - pwm9m2_pins = "/pinctrl/pwm9/pwm9m2-pins"; - fec0_mmu = "/iommu@fdcd0f00"; - mipi0_csi2 = "/mipi0-csi2"; - spi1m2_pins = "/pinctrl/spi1/spi1m2-pins"; - pcfg_pull_up_drv_level_7 = "/pinctrl/pcfg-pull-up-drv-level-7"; - pwm6m1_pins = "/pinctrl/pwm6/pwm6m1-pins"; - tsadc_shut_org = "/pinctrl/tsadc/tsadc-shut-org"; - qos_rkvdec1 = "/qos@fdf63000"; - dmac0 = "/dma-controller@fea10000"; - vp2_out_edp1 = "/vop@fdd90000/ports/port@2/endpoint@6"; - pdm0m0_sdi1 = "/pinctrl/pdm0/pdm0m0-sdi1"; - qos_gpu_m0 = "/qos@fdf35000"; - pwm3m0_pins = "/pinctrl/pwm3/pwm3m0-pins"; - i2s0_sdi1 = "/pinctrl/i2s0/i2s0-sdi1"; - qos_av1 = "/qos@fdf64000"; - pcfg_output_low = "/pinctrl/pcfg-output-low"; - spdif_tx1 = "/spdif-tx@fe4f0000"; - hdptxphy1_grf = "/syscon@fd5e4000"; - spi4m0_cs0 = "/pinctrl/spi4/spi4m0-cs0"; - dp1_in_vp2 = "/dp@fde60000/ports/port@0/endpoint@2"; - jpegd_mmu = "/iommu@fdb90480"; - sata0m1_pins = "/pinctrl/sata0/sata0m1-pins"; - uart7m1_xfer = "/pinctrl/uart7/uart7m1-xfer"; - vp1_out_hdmi1 = "/vop@fdd90000/ports/port@1/endpoint@5"; - dp1_out = "/dp@fde60000/ports/port@1/endpoint"; - otp = "/otp@fecc0000"; - uart4m0_xfer = "/pinctrl/uart4/uart4m0-xfer"; - uart8m0_ctsn = "/pinctrl/uart8/uart8m0-ctsn"; - hdcp1 = "/hdcp@fde70000"; - rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; - i2c6 = "/i2c@fec80000"; - qos_jpeg_enc3 = "/qos@fdf66a00"; - i2s2m1_idle = "/pinctrl/i2s2/i2s2m1-idle"; - refclk_pins = "/pinctrl/refclk/refclk-pins"; - pcie3x4_intc = "/pcie@fe150000/legacy-interrupt-controller"; - hdptxphy_hdmi1 = "/hdmiphy@fed70000"; - mipi2_lvds2_sditf = "/rkcif-mipi-lvds2-sditf/port/endpoint"; - pdm1 = "/pdm@fe4c0000"; - vdd_cpu_lit_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; - pdm0m1_clk = "/pinctrl/pdm0/pdm0m1-clk"; - pcfg_pull_down_drv_level_0 = "/pinctrl/pcfg-pull-down-drv-level-0"; - qos_vicap_m0 = "/qos@fdf40600"; - gic = "/interrupt-controller@fe600000"; - vdd_cpu_big1_s0 = "/i2c@fd880000/rk8603@43"; - uart0_rtsn = "/pinctrl/uart0/uart0-rtsn"; - i2c7m2_xfer = "/pinctrl/i2c7/i2c7m2-xfer"; - mclkin_i2s3 = "/clocks/mclkin-i2s3"; - hdmim0_tx0_scl = "/pinctrl/hdmi/hdmim0-tx0-scl"; - hdmim0_tx0_sda = "/pinctrl/hdmi/hdmim0-tx0-sda"; - i2c4m1_xfer = "/pinctrl/i2c4/i2c4m1-xfer"; - spdif1m0_tx = "/pinctrl/spdif1/spdif1m0-tx"; - sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; - i2c1m0_xfer = "/pinctrl/i2c1/i2c1m0-xfer"; - rkcif_mipi_lvds2_sditf_vir3 = "/rkcif-mipi-lvds2-sditf-vir3"; - hdptxphy1 = "/phy@fed70000"; - route_dp1 = "/display-subsystem/route/route-dp1"; - hdmim0_tx0_hpd = "/pinctrl/hdmi/hdmim0-tx0-hpd"; - i2s1m1_sdo0 = "/pinctrl/i2s1/i2s1m1-sdo0"; - pdm1m0_clk = "/pinctrl/pdm1/pdm1m0-clk"; - pcfg_pull_down_drv_level_11 = "/pinctrl/pcfg-pull-down-drv-level-11"; - usbdrd3_1 = "/usbdrd3_1"; - spi2m2_pins = "/pinctrl/spi2/spi2m2-pins"; - pwm7m1_pins = "/pinctrl/pwm7/pwm7m1-pins"; - rkcif_mipi_lvds1_sditf = "/rkcif-mipi-lvds1-sditf"; - pwm1 = "/pwm@fd8b0010"; - pdm1m0_sdi1 = "/pinctrl/pdm1/pdm1m0-sdi1"; - threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; - pwm4m0_pins = "/pinctrl/pwm4/pwm4m0-pins"; - gmac0_mtl_rx_setup = "/ethernet@fe1b0000/rx-queues-config"; - sata0 = "/sata@fe210000"; - dp0_in_vp0 = "/dp@fde50000/ports/port@0/endpoint@0"; - can2 = "/can@fea70000"; - pcfg_pull_none_drv_level_6 = "/pinctrl/pcfg-pull-none-drv-level-6"; - usbdrd_dwc3_0 = "/usbdrd3_0/usb@fc000000"; - rkvenc0 = "/rkvenc-core@fdbd0000"; - bt_reset_gpio = "/pinctrl/wireless-bluetooth/bt-reset-gpio"; - sata1m1_pins = "/pinctrl/sata1/sata1m1-pins"; - spll = "/clocks/spll"; - uart8m1_xfer = "/pinctrl/uart8/uart8m1-xfer"; - sata_pins = "/pinctrl/sata/sata-pins"; - pcfg_pull_none_drv_level_1_smt = "/pinctrl/pcfg-pull-none-drv-level-1-smt"; - qos_npu1 = "/qos@fdf70000"; - uart5m0_xfer = "/pinctrl/uart5/uart5m0-xfer"; - uart9m0_ctsn = "/pinctrl/uart9/uart9m0-ctsn"; - pwm10m2_pins = "/pinctrl/pwm10/pwm10m2-pins"; - rk806_dvs1_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_pwrdn"; - pipe_phy0_grf = "/syscon@fd5bc000"; - es8388 = "/i2c@fec80000/es8388@11"; - spdif_rx2 = "/spdif-rx@fde18000"; - usb_host1_ehci = "/usb@fc880000"; - xin24m = "/clocks/xin24m"; - pcie20x1_2_button_rstn = "/pinctrl/pcie20x1/pcie20x1-2-button-rstn"; - mipi2_csi2_hw = "/mipi2-csi2-hw@fdd30000"; - acdcdig_dsm = "/codec-digital@fe500000"; - vop_grf = "/syscon@fd5a4000"; - rk806_dvs1_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_slp"; - i2s6_8ch = "/i2s@fddf4000"; - i2s2m1_sdo = "/pinctrl/i2s2/i2s2m1-sdo"; - pcie30x1_1_button_rstn = "/pinctrl/pcie30x1/pcie30x1-1-button-rstn"; - pcfg_output_low_pull_down = "/pinctrl/pcfg-output-low-pull-down"; - pcfg_pull_none_drv_level_10 = "/pinctrl/pcfg-pull-none-drv-level-10"; - pdm0m1_clk1 = "/pinctrl/pdm0/pdm0m1-clk1"; - mipidphy0_grf = "/syscon@fd5b4000"; - route_dsi1 = "/display-subsystem/route/route-dsi1"; - route_hdmi0 = "/display-subsystem/route/route-hdmi0"; - rkvdec_ccu = "/rkvdec-ccu@fdc30000"; - csi2_dphy4 = "/csi2-dphy4"; - gmac1_rgmii_bus = "/pinctrl/gmac1/gmac1-rgmii-bus"; - qos_sdio = "/qos@fdf39000"; - tsadc = "/tsadc@fec00000"; - pcfg_output_high_pull_up = "/pinctrl/pcfg-output-high-pull-up"; - hclk_usb = "/clocks/hclk_usb@fd7c08a8"; - avcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG1"; - edp0_in_vp2 = "/edp@fdec0000/ports/port@0/endpoint@2"; - gpio3 = "/pinctrl/gpio@fec40000"; - gpu_opp_table = "/gpu-opp-table"; - cif_mipi2_in0 = "/rkcif-mipi-lvds2/port/endpoint"; - pcfg_output_high = "/pinctrl/pcfg-output-high"; - i2c8m2_xfer = "/pinctrl/i2c8/i2c8m2-xfer"; - vdpu_mmu = "/iommu@fdb50800"; - i2c5m1_xfer = "/pinctrl/i2c5/i2c5m1-xfer"; - combphy0_ps = "/phy@fee00000"; - rgb = "/syscon@fd58c000/rgb"; - hclk_vo1 = "/clocks/hclk_vo1@fd7c08ec"; - i2c2m0_xfer = "/pinctrl/i2c2/i2c2m0-xfer"; - uart0 = "/serial@fd890000"; - mipidcphy1_grf = "/syscon@fd5ec000"; - pcie30x4m0_pins = "/pinctrl/pcie30x4/pcie30x4m0-pins"; - vdd_ddr_pll_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG2"; - gmac0_txer = "/pinctrl/gmac0/gmac0-txer"; - uart2_ctsn = "/pinctrl/uart2/uart2-ctsn"; - pcfg_pull_up_drv_level_5 = "/pinctrl/pcfg-pull-up-drv-level-5"; - pcfg_pull_down_drv_level_9 = "/pinctrl/pcfg-pull-down-drv-level-9"; - pcfg_pull_none_drv_level_5_smt = "/pinctrl/pcfg-pull-none-drv-level-5-smt"; - i2s2m0_sdi = "/pinctrl/i2s2/i2s2m0-sdi"; - qos_rga2_mwo = "/qos@fdf66e00"; - spi3m2_pins = "/pinctrl/spi3/spi3m2-pins"; - pwm8m1_pins = "/pinctrl/pwm8/pwm8m1-pins"; - dsi1_in = "/dsi@fde30000/ports/port@0"; - vp3_out_dsi0 = "/vop@fdd90000/ports/port@3/endpoint@0"; - pclk_vo0_grf = "/clocks/pclk_vo0_grf@fd7c08dc"; - spi0m1_pins = "/pinctrl/spi0/spi0m1-pins"; - pwm5m0_pins = "/pinctrl/pwm5/pwm5m0-pins"; - bt1120_pins = "/pinctrl/bt1120/bt1120-pins"; - dp1_in_vp0 = "/dp@fde60000/ports/port@0/endpoint@0"; - i2s1m0_sdo2 = "/pinctrl/i2s1/i2s1m0-sdo2"; - mipi2_csi2_input0 = "/mipi2-csi2/ports/port@0/endpoint@0"; - u2phy0_otg = "/syscon@fd5d0000/usb2-phy@0/otg-port"; - vp0_out_edp0 = "/vop@fdd90000/ports/port@0/endpoint@1"; - qos_fisheye0 = "/qos@fdf40000"; - i2c4 = "/i2c@feac0000"; - sata2m1_pins = "/pinctrl/sata2/sata2m1-pins"; - uart9m1_xfer = "/pinctrl/uart9/uart9m1-xfer"; - qos_jpeg_enc1 = "/qos@fdf66600"; - i2s1m1_sdi2 = "/pinctrl/i2s1/i2s1m1-sdi2"; - i2s3_2ch = "/i2s@fe4a0000"; - uart6m0_xfer = "/pinctrl/uart6/uart6m0-xfer"; - cpul_leakage = "/otp@fecc0000/cpul-leakage@19"; - pwm11m2_pins = "/pinctrl/pwm11/pwm11m2-pins"; - fspim1_cs1 = "/pinctrl/fspi/fspim1-cs1"; - vdd_vdenc_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; - pdm1m1_clk1 = "/pinctrl/pdm1/pdm1m1-clk1"; - hdmi_debug5 = "/pinctrl/hdmi/hdmi-debug5"; - uart1m1_rtsn = "/pinctrl/uart1/uart1m1-rtsn"; - qos_isp1_mro = "/qos@fdf41100"; - ddrphych3_pins = "/pinctrl/ddrphych3/ddrphych3-pins"; - spi0m3_cs1 = "/pinctrl/spi0/spi0m3-cs1"; - qos_rkvenc0_m1ro = "/qos@fdf60200"; - qos_jpeg_dec = "/qos@fdf66200"; - mclkin_i2s1 = "/clocks/mclkin-i2s1"; - edp1_in_vp2 = "/edp@fded0000/ports/port@0/endpoint@2"; - pcie30_avdd0v75 = "/pcie30-avdd0v75"; - isp0_mmu = "/iommu@fdcb7f00"; - qos_npu0_mwr = "/qos@fdf72000"; - rkvdec0 = "/rkvdec-core@fdc38000"; - rkvdec0_mmu = "/iommu@fdc38700"; - rk806_dvs1_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_null"; - pwm15 = "/pwm@febf0030"; - vop_mmu = "/iommu@fdd97e00"; - rkcif_mipi_lvds2_sditf_vir1 = "/rkcif-mipi-lvds2-sditf-vir1"; - pcie2x1l2 = "/pcie@fe190000"; - i2c6m1_xfer = "/pinctrl/i2c6/i2c6m1-xfer"; - package_serial_number_low = "/otp@fecc0000/package-serial-number-low@6"; - iep_mmu = "/iommu@fdbb0800"; - l2_cache_b3 = "/cpus/l2-cache-b3"; - i2c3m0_xfer = "/pinctrl/i2c3/i2c3m0-xfer"; - vcc_1v1_nldo_s3 = "/vcc-1v1-nldo-s3"; - spi1m2_cs1 = "/pinctrl/spi1/spi1m2-cs1"; - pdm0m1_idle = "/pinctrl/pdm0/pdm0m1-idle"; - can0 = "/can@fea50000"; - spi4m2_pins = "/pinctrl/spi4/spi4m2-pins"; - pcfg_pull_none_drv_level_4 = "/pinctrl/pcfg-pull-none-drv-level-4"; - pwm9m1_pins = "/pinctrl/pwm9/pwm9m1-pins"; - arm_pmu = "/arm-pmu"; - vp2 = "/vop@fdd90000/ports/port@2"; - rk806single = "/spi@feb20000/rk806single@0"; - spi1m1_pins = "/pinctrl/spi1/spi1m1-pins"; - pwm6m0_pins = "/pinctrl/pwm6/pwm6m0-pins"; - gmac0_mtl_tx_setup = "/ethernet@fe1b0000/tx-queues-config"; - rng = "/rng@fe378000"; - cpu_l2 = "/cpus/cpu@200"; - uart9 = "/serial@febc0000"; - spi0m1_cs0 = "/pinctrl/spi0/spi0m1-cs0"; - rk806_dvs3_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_gpio"; - rkcif_mipi_lvds5_sditf = "/rkcif-mipi-lvds5-sditf"; - usbdpphy0_grf = "/syscon@fd5c8000"; - mipim1_camera3_clk = "/pinctrl/mipi/mipim1-camera3-clk"; - pcie_clk3 = "/pcie-clk3"; - mipim0_camera1_clk = "/pinctrl/mipi/mipim0-camera1-clk"; - vp0_out_hdmi0 = "/vop@fdd90000/ports/port@0/endpoint@2"; - rkcif = "/rkcif@fdce0000"; - gmac0_rgmii_clk = "/pinctrl/gmac0/gmac0-rgmii-clk"; - wdt_en_base = "/pinctrl/wdt-pc9202/wdt-en-base"; - vp3_out_rgb = "/vop@fdd90000/ports/port@3/endpoint@2"; - spdif_rx0 = "/spdif-rx@fde08000"; - sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; - hdmim2_tx0_scl = "/pinctrl/hdmi/hdmim2-tx0-scl"; - hdmim2_tx0_sda = "/pinctrl/hdmi/hdmim2-tx0-sda"; - spi2m1_cs1 = "/pinctrl/spi2/spi2m1-cs1"; - pwm15m3_pins = "/pinctrl/pwm15/pwm15m3-pins"; - sata0m0_pins = "/pinctrl/sata0/sata0m0-pins"; - uart7m0_xfer = "/pinctrl/uart7/uart7m0-xfer"; - csi2_dphy2 = "/csi2-dphy2"; - spi3 = "/spi@feb30000"; - edp0_in_vp0 = "/edp@fdec0000/ports/port@0/endpoint@0"; - gpio1 = "/pinctrl/gpio@fec20000"; - tsadcm1_shut = "/pinctrl/tsadc/tsadcm1-shut"; - usbdp_phy0_dp_altmode_mux = "/phy@fed80000/port/endpoint@1"; - i2s2m0_idle = "/pinctrl/i2s2/i2s2m0-idle"; - spi1m0_cs0 = "/pinctrl/spi1/spi1m0-cs0"; - rkcif_mipi_lvds1_sditf_vir2 = "/rkcif-mipi-lvds1-sditf-vir2"; - i2s3_sclk = "/pinctrl/i2s3/i2s3-sclk"; - hdmim1_rx_hpdin = "/pinctrl/hdmi/hdmim1-rx-hpdin"; - spi3m0_cs1 = "/pinctrl/spi3/spi3m0-cs1"; - mipi_dcphy1 = "/mipi-dcphy-dummy"; - vcc5v0_sys = "/vcc5v0-sys"; - aclk_hdcp0_pre = "/clocks/aclk_hdcp0_pre@fd7c08dc"; - usb_con = "/i2c@fec80000/fusb302@22/connector"; - hdmirx_ctrler = "/hdmirx-controller@fdee0000"; - i2c7m1_xfer = "/pinctrl/i2c7/i2c7m1-xfer"; - pcfg_pull_up_drv_level_3 = "/pinctrl/pcfg-pull-up-drv-level-3"; - i2c4m0_xfer = "/pinctrl/i2c4/i2c4m0-xfer"; - pcfg_pull_down_drv_level_7 = "/pinctrl/pcfg-pull-down-drv-level-7"; - spdif0m0_tx = "/pinctrl/spdif0/spdif0m0-tx"; - wdt = "/watchdog@feaf0000"; - vdd_0v85_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG4"; - cspmu = "/cspmu@fd10c000"; - gmac_uio0 = "/uio@fe1b0000"; - av1d_mmu = "/iommu@fdca0000"; - mailbox2 = "/mailbox@fece0000"; - mipi4_csi2_hw = "/mipi4-csi2-hw@fdd50000"; - pdm1m1_idle = "/pinctrl/pdm1/pdm1m1-idle"; - rga3_core0 = "/rga@fdb60000"; - i2s1m0_sdo0 = "/pinctrl/i2s1/i2s1m0-sdo0"; - bigcore1_thermal = "/thermal-zones/bigcore1-thermal"; - pcfg_output_low_pull_up = "/pinctrl/pcfg-output-low-pull-up"; - spi2m1_pins = "/pinctrl/spi2/spi2m1-pins"; - pwm7m0_pins = "/pinctrl/pwm7/pwm7m0-pins"; - i2c2 = "/i2c@feaa0000"; - npu_grf = "/syscon@fd5a2000"; - i2s1m1_sdi0 = "/pinctrl/i2s1/i2s1m1-sdi0"; - mipi5_csi2 = "/mipi5-csi2"; - pwm8 = "/pwm@febe0000"; - log_leakage = "/otp@fecc0000/log-leakage@1a"; - cpub23_opp_info = "/otp@fecc0000/cpub23-opp-info@49"; - vdd_vdenc_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; - rga2 = "/rga@fdb80000"; - emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; - qos_usb3_0 = "/qos@fdf3e200"; - sata1m0_pins = "/pinctrl/sata1/sata1m0-pins"; - uart8m0_xfer = "/pinctrl/uart8/uart8m0-xfer"; - pwm13m2_pins = "/pinctrl/pwm13/pwm13m2-pins"; - hdmi_debug3 = "/pinctrl/hdmi/hdmi-debug3"; - cam0_or_cam1_switch_pin = "/pinctrl/cam/cam0-or-cam1-switch-pin"; - mcum1_pins = "/pinctrl/mcu/mcum1-pins"; - pwm10m1_pins = "/pinctrl/pwm10/pwm10m1-pins"; - edp1_out = "/edp@fded0000/ports/port@1/endpoint"; - hclk_sdio_pre = "/clocks/hclk_sdio_pre@fd7c092c"; - usb_host0_ehci = "/usb@fc800000"; - edp1_in_vp0 = "/edp@fded0000/ports/port@0/endpoint@0"; - i2s10_8ch = "/i2s@fde00000"; - hdmi1_in = "/hdmi@fdea0000/ports/port@0"; - usb2phy1_grf = "/syscon@fd5d4000"; - pdm0m0_clk1 = "/pinctrl/pdm0/pdm0m0-clk1"; - jpege2_mmu = "/iommu@fdba8800"; - pwm13 = "/pwm@febf0010"; - pcie2x1l0 = "/pcie@fe170000"; - hdmi0_in_vp1 = "/hdmi@fde80000/ports/port@0/endpoint@1"; - hdmim0_tx1_cec = "/pinctrl/hdmi/hdmim0-tx1-cec"; - l2_cache_b1 = "/cpus/l2-cache-b1"; - cif_dvp_bus8 = "/pinctrl/cif/cif-dvp-bus8"; - qos_rga2_mro = "/qos@fdf66c00"; - aclk_rkvdec1_pre = "/clocks/aclk_rkvdec1_pre@fd7c08a4"; - i2c8m1_xfer = "/pinctrl/i2c8/i2c8m1-xfer"; - vdd_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG5"; - hdmirx_det = "/pinctrl/hdmirx/hdmirx-det"; - pca9555 = "/i2c@feab0000/gpio@21"; - qos_sdmmc = "/qos@fdf3d800"; - clk32k_out1 = "/pinctrl/clk32k/clk32k-out1"; - i2c5m0_xfer = "/pinctrl/i2c5/i2c5m0-xfer"; - cif_dvp_clk = "/pinctrl/cif/cif-dvp-clk"; - rknpu = "/npu@fdab0000"; - pcfg_pull_none_drv_level_2 = "/pinctrl/pcfg-pull-none-drv-level-2"; - spi3m2_cs0 = "/pinctrl/spi3/spi3m2-cs0"; - vp0 = "/vop@fdd90000/ports/port@0"; - rga3_1_mmu = "/iommu@fdb70f00"; - jtagm2_pins = "/pinctrl/jtag/jtagm2-pins"; - cpu_l0 = "/cpus/cpu@0"; - uart7 = "/serial@feba0000"; - rkisp1_vir2 = "/rkisp1-vir2"; - fec1_mmu = "/iommu@fdcd8f00"; - qos_vop_m0 = "/qos@fdf82000"; - pcie_clk1 = "/pcie-clk1"; - gmac1_ptp_ref_clk = "/pinctrl/gmac1/gmac1-ptp-ref-clk"; - spi3m1_pins = "/pinctrl/spi3/spi3m1-pins"; - pwm8m0_pins = "/pinctrl/pwm8/pwm8m0-pins"; - hdmi0_sound = "/hdmi0-sound"; - ioc = "/syscon@fd5f0000"; - spi0m0_pins = "/pinctrl/spi0/spi0m0-pins"; - avsd = "/avsd-plus@fdb51000"; - rkcif_mipi_lvds5_sditf_vir3 = "/rkcif-mipi-lvds5-sditf-vir3"; - u2phy2 = "/syscon@fd5d8000/usb2-phy@8000"; - sfc = "/spi@fe2b0000"; - csi2_dphy0 = "/csi2-dphy0"; - spi1 = "/spi@feb10000"; - spi4m1_cs0 = "/pinctrl/spi4/spi4m1-cs0"; - gpu_grf = "/syscon@fd5a0000"; - pcfg_pull_up_drv_level_14 = "/pinctrl/pcfg-pull-up-drv-level-14"; - wireless_bluetooth = "/wireless-bluetooth"; - pclk_av1_pre = "/clocks/pclk_av1_pre@fd7c0910"; - sata2m0_pins = "/pinctrl/sata2/sata2m0-pins"; - uart9m0_xfer = "/pinctrl/uart9/uart9m0-xfer"; - pwm14m2_pins = "/pinctrl/pwm14/pwm14m2-pins"; - i2s1m0_sdi2 = "/pinctrl/i2s1/i2s1m0-sdi2"; - pwm11m1_pins = "/pinctrl/pwm11/pwm11m1-pins"; - bt_sound = "/bt-sound"; - qos_rkvenc1_m0ro = "/qos@fdf61000"; - mclkout_i2s2 = "/clocks/mclkout-i2s2@fd58c318"; - dsi0 = "/dsi@fde20000"; - pdm1m0_clk1 = "/pinctrl/pdm1/pdm1m0-clk1"; - uart1m0_rtsn = "/pinctrl/uart1/uart1m0-rtsn"; - ddrphych2_pins = "/pinctrl/ddrphych2/ddrphych2-pins"; - route_edp0 = "/display-subsystem/route/route-edp0"; - hdmi0 = "/hdmi@fde80000"; - es8388_sound = "/es8388-sound"; - hdmi1_in_vp1 = "/hdmi@fdea0000/ports/port@0/endpoint@1"; - pcfg_pull_up_drv_level_1 = "/pinctrl/pcfg-pull-up-drv-level-1"; - pcfg_pull_down_drv_level_5 = "/pinctrl/pcfg-pull-down-drv-level-5"; - i2s0_sdo2 = "/pinctrl/i2s0/i2s0-sdo2"; - vop_out = "/vop@fdd90000/ports"; - vdd_0v75_s3 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG1"; - hdmim1_rx = "/pinctrl/hdmi/hdmim1-rx"; - pcfg_pull_down_smt = "/pinctrl/pcfg-pull-down-smt"; - hdmim0_tx1_scl = "/pinctrl/hdmi/hdmim0-tx1-scl"; - hdmim0_tx1_sda = "/pinctrl/hdmi/hdmim0-tx1-sda"; - cpul_opp_info = "/otp@fecc0000/cpul-opp-info@3d"; - clk32k_in = "/pinctrl/clk32k/clk32k-in"; - usbdp_phy1 = "/phy@fed90000"; - mailbox0 = "/mailbox@fec60000"; - i2c6m0_xfer = "/pinctrl/i2c6/i2c6m0-xfer"; - pdm0m1_sdi2 = "/pinctrl/pdm0/pdm0m1-sdi2"; - sdmmc = "/mmc@fe2c0000"; - hclk_nvm = "/clocks/hclk_nvm@fd7c087c"; - hdmim0_tx1_hpd = "/pinctrl/hdmi/hdmim0-tx1-hpd"; - vp0_out_dp0 = "/vop@fdd90000/ports/port@0/endpoint@0"; - vddq_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG9"; - vcc_3v3_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG8"; - gmac0_ppstring = "/pinctrl/gmac0/gmac0-ppstring"; - i2c0 = "/i2c@fd880000"; - pdm1m1_clk = "/pinctrl/pdm1/pdm1m1-clk"; - pdm0m0_idle = "/pinctrl/pdm0/pdm0m0-idle"; - soc_thermal = "/thermal-zones/soc-thermal"; - cluster1_opp_table = "/cluster1-opp-table"; - i2s0_idle = "/pinctrl/i2s0/i2s0-idle"; - spi4m1_pins = "/pinctrl/spi4/spi4m1-pins"; - npu_opp_info = "/otp@fecc0000/npu-opp-info@55"; - pwm9m0_pins = "/pinctrl/pwm9/pwm9m0-pins"; - pwm6 = "/pwm@febd0020"; - spi1m0_pins = "/pinctrl/spi1/spi1m0-pins"; - hym8563 = "/i2c@fd880000/hym8563@51"; - i2s1m1_sclk = "/pinctrl/i2s1/i2s1m1-sclk"; - rk806_dvs2_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_gpio"; - hp_det = "/pinctrl/headphone/hp-det"; - hdmi_debug1 = "/pinctrl/hdmi/hdmi-debug1"; - vp1_out_dp1 = "/vop@fdd90000/ports/port@1/endpoint@3"; - qos_mcu_npu = "/qos@fdf72400"; - auddsm_pins = "/pinctrl/auddsm/auddsm-pins"; - i2s3_lrck = "/pinctrl/i2s3/i2s3-lrck"; - pcfg_pull_none_drv_level_2_smt = "/pinctrl/pcfg-pull-none-drv-level-2-smt"; - pwm15m2_pins = "/pinctrl/pwm15/pwm15m2-pins"; - pipe_phy1_grf = "/syscon@fd5c0000"; - pwm12m1_pins = "/pinctrl/pwm12/pwm12m1-pins"; - pwm11 = "/pwm@febe0030"; - rkisp_unite = "/rkisp-unite@fdcb0000"; - rkcif_mipi_lvds2_sditf = "/rkcif-mipi-lvds2-sditf"; - vp1_out_edp0 = "/vop@fdd90000/ports/port@1/endpoint@1"; - hclk_isp1_pre = "/clocks/hclk_isp1_pre@fd7c0868"; - rk806_dvs2_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_slp"; - i2s7_8ch = "/i2s@fddf8000"; - uart5m1_rtsn = "/pinctrl/uart5/uart5m1-rtsn"; - mipidphy1_grf = "/syscon@fd5b5000"; - usbhost3_0 = "/usbhost3_0"; - jpege2 = "/jpege-core@fdba8000"; - pcfg_pull_none_drv_level_15 = "/pinctrl/pcfg-pull-none-drv-level-15"; - pcie3x2_intc = "/pcie@fe160000/legacy-interrupt-controller"; - vp2_out_dsi1 = "/vop@fdd90000/ports/port@2/endpoint@4"; - mipidphy0_in_ucam0 = "/csi2-dphy0/ports/port@0/endpoint@0"; - av1d = "/av1d@fdc70000"; - uart1m2_ctsn = "/pinctrl/uart1/uart1m2-ctsn"; - sdiom1_pins = "/pinctrl/sdio/sdiom1-pins"; - rockchip_suspend = "/rockchip-suspend"; - rk806_dvs2_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_pwrdn"; - pcfg_pull_none_drv_level_0 = "/pinctrl/pcfg-pull-none-drv-level-0"; - npu_thermal = "/thermal-zones/npu-thermal"; - i2c7m0_xfer = "/pinctrl/i2c7/i2c7m0-xfer"; - pdm1m1_sdi2 = "/pinctrl/pdm1/pdm1m1-sdi2"; - cpu_pins = "/pinctrl/cpu/cpu-pins"; - dsi0_in_vp2 = "/dsi@fde20000/ports/port@0/endpoint@0"; - bt_wake_gpio = "/pinctrl/wireless-bluetooth/bt-wake-gpio"; - uart5 = "/serial@feb80000"; - dwc3_0_role_switch = "/usbdrd3_0/usb@fc000000/port/endpoint@0"; - rkisp1_vir0 = "/rkisp1-vir0"; - fiq_debugger = "/fiq-debugger"; - usbdp_phy1_u3 = "/phy@fed90000/u3-port"; - spi0m0_cs1 = "/pinctrl/spi0/spi0m0-cs1"; - sdio = "/mmc@fe2d0000"; - rkcif_mipi_lvds_sditf_vir2 = "/rkcif-mipi-lvds-sditf-vir2"; - spdif1m2_tx = "/pinctrl/spdif1/spdif1m2-tx"; - qos_gpu_m3 = "/qos@fdf35600"; - pdm1m0_idle = "/pinctrl/pdm1/pdm1m0-idle"; - pcfg_pull_none_drv_level_6_smt = "/pinctrl/pcfg-pull-none-drv-level-6-smt"; - user_led = "/leds/user"; - rkcif_mipi_lvds5_sditf_vir1 = "/rkcif-mipi-lvds5-sditf-vir1"; - i2s2m1_sdi = "/pinctrl/i2s2/i2s2m1-sdi"; - uart8_xfer = "/pinctrl/uart8/uart8-xfer"; - u2phy0 = "/syscon@fd5d0000/usb2-phy@0"; - pclk_vo1_grf = "/clocks/pclk_vo1_grf@fd7c08ec"; - vdd_gpu_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; - spi2m0_pins = "/pinctrl/spi2/spi2m0-pins"; - qos_rga3_1 = "/qos@fdf36000"; - i2s2m1_sclk = "/pinctrl/i2s2/i2s2m1-sclk"; - pcfg_pull_up_drv_level_12 = "/pinctrl/pcfg-pull-up-drv-level-12"; - spdif_tx4 = "/spdif-tx@fdde8000"; - rkispp1 = "/rkispp@fdcd8000"; - hdmim2_tx1_cec = "/pinctrl/hdmi/hdmim2-tx1-cec"; - u2phy1_otg = "/syscon@fd5d4000/usb2-phy@4000/otg-port"; - hdptxphy_hdmi_clk0 = "/hdmiphy@fed60000/clk-port"; - i2s1m0_sdi0 = "/pinctrl/i2s1/i2s1m0-sdi0"; - mipi4_csi2 = "/mipi4-csi2"; - mclkout_i2s0 = "/clocks/mclkout-i2s0@fd58c318"; - vcc5v0_host3 = "/vcc5v0-host3"; - rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; - vdd_cpu_big0_s0 = "/i2c@fd880000/rk8602@42"; - dp1 = "/dp@fde60000"; - emmc_data_strobe = "/pinctrl/emmc/emmc-data-strobe"; - pwm13m1_pins = "/pinctrl/pwm13/pwm13m1-pins"; - vop_pins = "/pinctrl/vop/vop-pins"; - pcie20x1m1_pins = "/pinctrl/pcie20x1/pcie20x1m1-pins"; - fspim2_cs1 = "/pinctrl/fspi/fspim2-cs1"; - vcc_hub = "/vcc-hub-regulator"; - mcum0_pins = "/pinctrl/mcu/mcum0-pins"; - pwm10m0_pins = "/pinctrl/pwm10/pwm10m0-pins"; - uart9m2_rtsn = "/pinctrl/uart9/uart9m2-rtsn"; - mipidcphy0 = "/phy@feda0000"; - uart6m1_rtsn = "/pinctrl/uart6/uart6m1-rtsn"; - vcc3v3_pcie30 = "/vcc3v3-pcie30"; - pcfg_pull_down_drv_level_3 = "/pinctrl/pcfg-pull-down-drv-level-3"; - mipim1_camera0_clk = "/pinctrl/mipi/mipim1-camera0-clk"; - i2s0_sdo0 = "/pinctrl/i2s0/i2s0-sdo0"; - vop = "/vop@fdd90000"; - gmac0_ptp_refclk = "/pinctrl/gmac0/gmac0-ptp-refclk"; - usbdp_phy0_orientation_switch = "/phy@fed80000/port/endpoint@0"; - vepu = "/vepu@fdb50000"; - cif_clk = "/pinctrl/cif/cif-clk"; - pcie30_phy_grf = "/syscon@fd5b8000"; - isp1_mmu = "/iommu@fdcc7f00"; - pdm0m1_sdi0 = "/pinctrl/pdm0/pdm0m1-sdi0"; - rkvdec1_mmu = "/iommu@fdc48700"; - edp1 = "/edp@fded0000"; - cam0_cam1_switch = "/cam0-cam1-switch"; - gmac1_ppstrig = "/pinctrl/gmac1/gmac1-ppstrig"; - i2c8m0_xfer = "/pinctrl/i2c8/i2c8m0-xfer"; - dsi1_in_vp2 = "/dsi@fde30000/ports/port@0/endpoint@0"; - hdmim2_rx_hpdin = "/pinctrl/hdmi/hdmim2-rx-hpdin"; - i2s1m1_sdo3 = "/pinctrl/i2s1/i2s1m1-sdo3"; - pcfg_pull_down_drv_level_14 = "/pinctrl/pcfg-pull-down-drv-level-14"; - gmac0_rx_bus2 = "/pinctrl/gmac0/gmac0-rx-bus2"; - rkcif_mipi_lvds4_sditf_vir2 = "/rkcif-mipi-lvds4-sditf-vir2"; - center_thermal = "/thermal-zones/center-thermal"; - uart0_ctsn = "/pinctrl/uart0/uart0-ctsn"; - uart4_rtsn = "/pinctrl/uart4/uart4-rtsn"; - pwm4 = "/pwm@febd0000"; - vdd2_ddr_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG6"; - jtagm1_pins = "/pinctrl/jtag/jtagm1-pins"; - rkisp0_vir2 = "/rkisp0-vir2"; - i2c1m4_xfer = "/pinctrl/i2c1/i2c1m4-xfer"; - l2_cache_l2 = "/cpus/l2-cache-l2"; - pcfg_pull_none_drv_level_9 = "/pinctrl/pcfg-pull-none-drv-level-9"; - qos_vdpu = "/qos@fdf67200"; - vp2_out_hdmi1 = "/vop@fdd90000/ports/port@2/endpoint@7"; - spi3m0_pins = "/pinctrl/spi3/spi3m0-pins"; - pcfg_output_low_pull_none = "/pinctrl/pcfg-output-low-pull-none"; - spi0m2_cs0 = "/pinctrl/spi0/spi0m2-cs0"; - rkisp1 = "/rkisp@fdcc0000"; - usbdpphy1_grf = "/syscon@fd5cc000"; - mipim1_camera4_clk = "/pinctrl/mipi/mipim1-camera4-clk"; - mipim0_camera2_clk = "/pinctrl/mipi/mipim0-camera2-clk"; - csi2_dcphy1 = "/csi2-dcphy1"; - hdmim2_tx1_scl = "/pinctrl/hdmi/hdmim2-tx1-scl"; - hdmim2_tx1_sda = "/pinctrl/hdmi/hdmim2-tx1-sda"; - spi2m2_cs1 = "/pinctrl/spi2/spi2m2-cs1"; - chosen = "/chosen"; - soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; - rk806_dvs1_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_rst"; - mpp_srv = "/mpp-srv"; - hclk_rkvenc1_pre = "/clocks/hclk_rkvenc1_pre@fd7c08c0"; - dp0m2_pins = "/pinctrl/dp0/dp0m2-pins"; - debug = "/debug@fd104000"; - jpege0 = "/jpege-core@fdba0000"; - pcfg_pull_none_drv_level_13 = "/pinctrl/pcfg-pull-none-drv-level-13"; - pwm14m1_pins = "/pinctrl/pwm14/pwm14m1-pins"; - pwm11m0_pins = "/pinctrl/pwm11/pwm11m0-pins"; - vp2_out_dp0 = "/vop@fdd90000/ports/port@2/endpoint@0"; - qos_rkvenc0_m0ro = "/qos@fdf60000"; - its0 = "/interrupt-controller@fe600000/msi-controller@fe640000"; - cpu_b2 = "/cpus/cpu@600"; - uart7m1_rtsn = "/pinctrl/uart7/uart7m1-rtsn"; - usb_5v_ctrl = "/pinctrl/usb-typec/usb-5v-ctrl"; - tsadc_gpio_func = "/pinctrl/gpio-func/tsadc-gpio-func"; - spi1m1_cs0 = "/pinctrl/spi1/spi1m1-cs0"; - pcfg_pull_down = "/pinctrl/pcfg-pull-down"; - dmc_opp_info = "/otp@fecc0000/dmc-opp-info@5b"; - ddrphych1_pins = "/pinctrl/ddrphych1/ddrphych1-pins"; - dsi0_in = "/dsi@fde20000/ports/port@0"; - pdm1m1_sdi0 = "/pinctrl/pdm1/pdm1m1-sdi0"; - spi3m1_cs1 = "/pinctrl/spi3/spi3m1-cs1"; - bigcore0_grf = "/syscon@fd590000"; - cpub1_leakage = "/otp@fecc0000/cpub1-leakage@18"; - uart3 = "/serial@feb60000"; - aclk_hdcp1_pre = "/clocks/aclk_hdcp1_pre@fd7c08ec"; - pcfg_pull_up = "/pinctrl/pcfg-pull-up"; - rkcif_mipi_lvds3_sditf_vir3 = "/rkcif-mipi-lvds3-sditf-vir3"; - codec_leakage = "/otp@fecc0000/codec-leakage@29"; - pcfg_pull_up_drv_level_8 = "/pinctrl/pcfg-pull-up-drv-level-8"; - dmac1 = "/dma-controller@fea30000"; - pdm0m0_sdi2 = "/pinctrl/pdm0/pdm0m0-sdi2"; - i2s1m1_lrck = "/pinctrl/i2s1/i2s1m1-lrck"; - qos_gpu_m1 = "/qos@fdf35200"; - i2s0_sdi2 = "/pinctrl/i2s0/i2s0-sdi2"; - spi2m0_cs0 = "/pinctrl/spi2/spi2m0-cs0"; - gpu_opp_info = "/otp@fecc0000/gpu-opp-info@4f"; - csi2_dphy1_hw = "/csi2-dphy1-hw@fedc8000"; - pcfg_pull_up_drv_level_10 = "/pinctrl/pcfg-pull-up-drv-level-10"; - spdif_tx2 = "/spdif-tx@fddb0000"; - npu_opp_table = "/npu-opp-table"; - spi4m0_cs1 = "/pinctrl/spi4/spi4m0-cs1"; - vo0_grf = "/syscon@fd5a6000"; - i2c2m4_xfer = "/pinctrl/i2c2/i2c2m4-xfer"; - qos_usb2host_0 = "/qos@fdf3e400"; - spi4m0_pins = "/pinctrl/spi4/spi4m0-pins"; - rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; - i2s1m0_sclk = "/pinctrl/i2s1/i2s1m0-sclk"; - i2c7 = "/i2c@fec90000"; - mipi2_csi2_output = "/mipi2-csi2/ports/port@1/endpoint@0"; - mipi_te0 = "/pinctrl/mipi/mipi-te0"; - sata_reset = "/pinctrl/sata/sata-reset"; - dp1m2_pins = "/pinctrl/dp1/dp1m2-pins"; - pwm15m1_pins = "/pinctrl/pwm15/pwm15m1-pins"; - pcfg_pull_down_drv_level_1 = "/pinctrl/pcfg-pull-down-drv-level-1"; - pwm12m0_pins = "/pinctrl/pwm12/pwm12m0-pins"; - qos_vicap_m1 = "/qos@fdf40800"; - sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; - uart8m1_rtsn = "/pinctrl/uart8/uart8m1-rtsn"; - usb2phy2_grf = "/syscon@fd5d8000"; - rkvdec1_sram = "/sram@ff001000/rkvdec-sram@78000"; - uart5m0_rtsn = "/pinctrl/uart5/uart5m0-rtsn"; - jpege3_mmu = "/iommu@fdbac800"; - vcc_2v0_pldo_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG7"; - i2s3_mclk = "/pinctrl/i2s3/i2s3-mclk"; - mclkout_i2s1m1 = "/clocks/mclkout-i2s1@fd58a000"; - spdif_tx1_dc = "/spdif-tx1-dc"; - uart0m2_xfer = "/pinctrl/uart0/uart0m2-xfer"; - wifi_host_wake_irq = "/pinctrl/wireless-wlan/wifi-host-wake-irq"; - i2s1m1_sdo1 = "/pinctrl/i2s1/i2s1m1-sdo1"; - uart1m1_ctsn = "/pinctrl/uart1/uart1m1-ctsn"; - pcfg_pull_down_drv_level_12 = "/pinctrl/pcfg-pull-down-drv-level-12"; - sdiom0_pins = "/pinctrl/sdio/sdiom0-pins"; - pcfg_pull_up_smt = "/pinctrl/pcfg-pull-up-smt"; - php_grf = "/syscon@fd5b0000"; - pwm2 = "/pwm@fd8b0020"; - pdm1m0_sdi2 = "/pinctrl/pdm1/pdm1m0-sdi2"; - i2s2m1_lrck = "/pinctrl/i2s2/i2s2m1-lrck"; - gmac0_stmmac_axi_setup = "/ethernet@fe1b0000/stmmac-axi-config"; - mipi1_csi2_hw = "/mipi1-csi2-hw@fdd20000"; - sata1 = "/sata@fe220000"; - rkispp1_vir0 = "/rkispp1-vir0"; - dp0_in_vp1 = "/dp@fde50000/ports/port@0/endpoint@1"; - CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; - rkisp0_vir0 = "/rkisp0-vir0"; - spi3m3_cs0 = "/pinctrl/spi3/spi3m3-cs0"; - specification_serial_number = "/otp@fecc0000/specification-serial-number@6"; - l2_cache_l0 = "/cpus/l2-cache-l0"; - pcfg_pull_none_drv_level_7 = "/pinctrl/pcfg-pull-none-drv-level-7"; - qos_hdcp0 = "/qos@fdf80000"; - qos_npu0_mro = "/qos@fdf72200"; - usbdrd_dwc3_1 = "/usbdrd3_1/usb@fc400000"; - rkvenc1 = "/rkvenc-core@fdbe0000"; - display_subsystem = "/display-subsystem"; - i2c3m4_xfer = "/pinctrl/i2c3/i2c3m4-xfer"; - pcie30x2m3_pins = "/pinctrl/pcie30x2/pcie30x2m3-pins"; - qos_npu2 = "/qos@fdf71000"; - i2s0_8ch = "/i2s@fe470000"; - i2s2m0_sclk = "/pinctrl/i2s2/i2s2m0-sclk"; - pmu = "/power-management@fd8d8000"; - gmac1_tx_bus2 = "/pinctrl/gmac1/gmac1-tx-bus2"; - pcfg_pull_none_drv_level_11 = "/pinctrl/pcfg-pull-none-drv-level-11"; - route_hdmi1 = "/display-subsystem/route/route-hdmi1"; - csi2_dphy5 = "/csi2-dphy5"; - spi4m2_cs0 = "/pinctrl/spi4/spi4m2-cs0"; - mipi3_csi2 = "/mipi3-csi2"; - pmu0_grf = "/syscon@fd588000"; - fan = "/pwm-fan"; - cpu_b0 = "/cpus/cpu@400"; - vccio_sd_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG5"; - qos_rkvenc1_m2wo = "/qos@fdf61400"; - gpio4 = "/pinctrl/gpio@fec50000"; - hdmim0_rx_cec = "/pinctrl/hdmi/hdmim0-rx-cec"; - pwm3m3_pins = "/pinctrl/pwm3/pwm3m3-pins"; - aclk_vdpu_low_pre = "/clocks/aclk_vdpu_low_pre@fd7c08b0"; - mmu600_php = "/iommu@fcb00000"; - cif_mipi2_in1 = "/rkcif-mipi-lvds2/port/endpoint"; - pwm0m2_pins = "/pinctrl/pwm0/pwm0m2-pins"; - pwm13m0_pins = "/pinctrl/pwm13/pwm13m0-pins"; - pcie20x1m0_pins = "/pinctrl/pcie20x1/pcie20x1m0-pins"; - bt656_pins = "/pinctrl/bt656/bt656-pins"; - hdmi1_sound = "/hdmi1-sound"; - uart9m1_rtsn = "/pinctrl/uart9/uart9m1-rtsn"; - uart6m0_rtsn = "/pinctrl/uart6/uart6m0-rtsn"; - pcie2x1l2_intc = "/pcie@fe190000/legacy-interrupt-controller"; - mod_sleep = "/mod-sleep-regulator"; - gpu_thermal = "/thermal-zones/gpu-thermal"; - hdmim1_tx0_cec = "/pinctrl/hdmi/hdmim1-tx0-cec"; - uart1 = "/serial@feb40000"; - rkcif_mipi_lvds3_sditf_vir1 = "/rkcif-mipi-lvds3-sditf-vir1"; - pcfg_pull_up_drv_level_6 = "/pinctrl/pcfg-pull-up-drv-level-6"; - qos_rkvdec0 = "/qos@fdf62000"; - vp2_out_edp0 = "/vop@fdd90000/ports/port@2/endpoint@1"; - uart1m2_xfer = "/pinctrl/uart1/uart1m2-xfer"; - pdm0m0_sdi0 = "/pinctrl/pdm0/pdm0m0-sdi0"; - fspim2_pins = "/pinctrl/fspi/fspim2-pins"; - i2s0_sdi0 = "/pinctrl/i2s0/i2s0-sdi0"; - gpu_pins = "/pinctrl/gpu/gpu-pins"; - imx415 = "/i2c@fec80000/imx415@37"; - vp3_out_dsi1 = "/vop@fdd90000/ports/port@3/endpoint@1"; - i2s4_8ch = "/i2s@fddc0000"; - ramoops = "/reserved-memory/ramoops@110000"; - dp0_sound = "/dp0-sound"; - spdif_tx0 = "/spdif-tx@fe4e0000"; - dp1_in_vp1 = "/dp@fde60000/ports/port@0/endpoint@1"; - i2s1m0_sdo3 = "/pinctrl/i2s1/i2s1m0-sdo3"; - mipi2_csi2_input1 = "/mipi2-csi2/ports/port@0/endpoint@0"; - vcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG2"; - vp1_out_hdmi0 = "/vop@fdd90000/ports/port@1/endpoint@2"; - vcc12v_dcin = "/vcc12v-dcin"; - vp0_out_edp1 = "/vop@fdd90000/ports/port@0/endpoint@4"; - uart3_rtsn = "/pinctrl/uart3/uart3-rtsn"; - gmac1_rgmii_clk = "/pinctrl/gmac1/gmac1-rgmii-clk"; - package_serial_number_high = "/otp@fecc0000/package-serial-number-high@5"; - hdcp0 = "/hdcp@fde40000"; - qos_fisheye1 = "/qos@fdf40200"; - rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; - i2c5 = "/i2c@fead0000"; - jtagm0_pins = "/pinctrl/jtag/jtagm0-pins"; - i2c4m4_xfer = "/pinctrl/i2c4/i2c4m4-xfer"; - spdif_tx1_sound = "/spdif-tx1-sound"; - qos_jpeg_enc2 = "/qos@fdf66800"; - hdmi0_in = "/hdmi@fde80000/ports/port@0"; - i2s1m1_sdi3 = "/pinctrl/i2s1/i2s1m1-sdi3"; - i2c1m3_xfer = "/pinctrl/i2c1/i2c1m3-xfer"; - hdptxphy_hdmi0 = "/hdmiphy@fed60000"; - sdmmc_pwren = "/pinctrl/sdmmc/sdmmc-pwren"; - usbdp_phy1_dp = "/phy@fed90000/dp-port"; - npu_leakage = "/otp@fecc0000/npu-leakage@28"; - aclk_jpeg_decoder_pre = "/clocks/aclk_jpeg_decoder_pre@fd7c08b0"; - pdm0 = "/pdm@fe4b0000"; - gmac1_miim = "/pinctrl/gmac1/gmac1-miim"; - pcfg_output_high_pull_down = "/pinctrl/pcfg-output-high-pull-down"; - hdmi_debug6 = "/pinctrl/hdmi/hdmi-debug6"; - pcie3x4 = "/pcie@fe150000"; - can0m1_pins = "/pinctrl/can0/can0m1-pins"; - mclkin_i2s2 = "/clocks/mclkin-i2s2"; - jpege_ccu = "/jpege-ccu"; - pcfg_pull_none_drv_level_3_smt = "/pinctrl/pcfg-pull-none-drv-level-3-smt"; - hdmim1_rx_cec = "/pinctrl/hdmi/hdmim1-rx-cec"; - pipe_phy2_grf = "/syscon@fd5c4000"; - dp0m1_pins = "/pinctrl/dp0/dp0m1-pins"; - rkvdec1 = "/rkvdec-core@fdc48000"; - pwm1m2_pins = "/pinctrl/pwm1/pwm1m2-pins"; - pwm14m0_pins = "/pinctrl/pwm14/pwm14m0-pins"; - little_core_thermal = "/thermal-zones/littlecore-thermal"; - rk806_dvs3_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_slp"; - usb_5v = "/usb-5v"; - i2s8_8ch = "/i2s@fddc8000"; - drm_cubic_lut = "/reserved-memory/drm-cubic-lut@00000000"; - rkcif_mipi_lvds2_sditf_vir2 = "/rkcif-mipi-lvds2-sditf-vir2"; - hdptxphy0 = "/phy@fed60000"; - pcie30x1_0_button_rstn = "/pinctrl/pcie30x1/pcie30x1-0-button-rstn"; - u2phy3_host = "/syscon@fd5dc000/usb2-phy@c000/host-port"; - route_dp0 = "/display-subsystem/route/route-dp0"; - hdmim0_rx_scl = "/pinctrl/hdmi/hdmim0-rx-scl"; - hdmim0_rx_sda = "/pinctrl/hdmi/hdmim0-rx-sda"; - uart7m0_rtsn = "/pinctrl/uart7/uart7m0-rtsn"; - pcfg_pull_down_drv_level_10 = "/pinctrl/pcfg-pull-down-drv-level-10"; - usbdrd3_0 = "/usbdrd3_0"; - ddrphych0_pins = "/pinctrl/ddrphych0/ddrphych0-pins"; - bt_irq_gpio = "/pinctrl/wireless-bluetooth/bt-irq-gpio"; - pwm0 = "/pwm@fd8b0000"; - uart2m2_xfer = "/pinctrl/uart2/uart2m2-xfer"; - pdm1m0_sdi0 = "/pinctrl/pdm1/pdm1m0-sdi0"; - hdmim1_tx0_scl = "/pinctrl/hdmi/hdmim1-tx0-scl"; - hdmim1_tx0_sda = "/pinctrl/hdmi/hdmim1-tx0-sda"; - can1 = "/can@fea60000"; - rkvtunnel = "/rkvtunnel"; - pcfg_pull_none_drv_level_5 = "/pinctrl/pcfg-pull-none-drv-level-5"; - rkcif_mipi_lvds3_sditf = "/rkcif-mipi-lvds3-sditf"; - combphy2_psu = "/phy@fee20000"; - vp3 = "/vop@fdd90000/ports/port@3"; - rk806_dvs2_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_dvs"; - mmu600_pcie = "/iommu@fc900000"; - hdmim1_tx0_hpd = "/pinctrl/hdmi/hdmim1-tx0-hpd"; - i2s1m0_lrck = "/pinctrl/i2s1/i2s1m0-lrck"; - cpu_l3 = "/cpus/cpu@300"; - spi0m1_cs1 = "/pinctrl/spi0/spi0m1-cs1"; - vp0_out_hdmi1 = "/vop@fdd90000/ports/port@0/endpoint@5"; - spdif_rx1 = "/spdif-rx@fde10000"; - gmac0_clkinout = "/pinctrl/gmac0/gmac0-clkinout"; - rkcif_dvp = "/rkcif-dvp"; - i2c5m4_xfer = "/pinctrl/i2c5/i2c5m4-xfer"; - wireless_wlan = "/wireless-wlan"; - rkcif_mipi_lvds = "/rkcif-mipi-lvds"; - avdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG3"; - i2c2m3_xfer = "/pinctrl/i2c2/i2c2m3-xfer"; - pcie30x4m3_pins = "/pinctrl/pcie30x4/pcie30x4m3-pins"; - hclk_rkvdec0_pre = "/clocks/hclk_rkvdec0_pre@fd7c08a0"; - route_dsi0 = "/display-subsystem/route/route-dsi0"; - rk806_dvs3_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_pwrdn"; - csi2_dphy3 = "/csi2-dphy3"; - pcie30x1m2_pins = "/pinctrl/pcie30x1/pcie30x1m2-pins"; - spi4 = "/spi@fecb0000"; - litcore_grf = "/syscon@fd594000"; - isp0_vir2 = "/rkisp0-vir2/port/endpoint@0"; - i2s1m1_mclk = "/pinctrl/i2s1/i2s1m1-mclk"; - sys_grf = "/syscon@fd58c000"; - edp0_in_vp1 = "/edp@fdec0000/ports/port@0/endpoint@1"; - mdio0 = "/ethernet@fe1b0000/mdio"; - rkisp_unite_mmu = "/rkisp-unite-mmu@fdcb7f00"; - gpio2 = "/pinctrl/gpio@fec30000"; - spi1m0_cs1 = "/pinctrl/spi1/spi1m0-cs1"; - aclk_av1_pre = "/clocks/aclk_av1_pre@fd7c0910"; - can1m1_pins = "/pinctrl/can1/can1m1-pins"; - rkcif_mipi_lvds1_sditf_vir3 = "/rkcif-mipi-lvds1-sditf-vir3"; - hdmim2_rx_cec = "/pinctrl/hdmi/hdmim2-rx-cec"; - mipi3_csi2_hw = "/mipi3-csi2-hw@fdd40000"; - dp1m1_pins = "/pinctrl/dp1/dp1m1-pins"; - pwm2m2_pins = "/pinctrl/pwm2/pwm2m2-pins"; - pwm15m0_pins = "/pinctrl/pwm15/pwm15m0-pins"; - hclk_vo0 = "/clocks/hclk_vo0@fd7c08dc"; - bigcore0_thermal = "/thermal-zones/bigcore0-thermal"; - hdmim1_rx_scl = "/pinctrl/hdmi/hdmim1-rx-scl"; - hdmim1_rx_sda = "/pinctrl/hdmi/hdmim1-rx-sda"; - uart8m0_rtsn = "/pinctrl/uart8/uart8m0-rtsn"; - pcfg_pull_up_drv_level_4 = "/pinctrl/pcfg-pull-up-drv-level-4"; - mipim1_camera1_clk = "/pinctrl/mipi/mipim1-camera1-clk"; - rkvdec0_sram = "/sram@ff001000/rkvdec-sram@0"; - pcfg_pull_down_drv_level_8 = "/pinctrl/pcfg-pull-down-drv-level-8"; - usbc0_orien_sw = "/i2c@fec80000/fusb302@22/connector/ports/port@0/endpoint"; - jpegd = "/jpegd@fdb90000"; - uart3m2_xfer = "/pinctrl/uart3/uart3m2-xfer"; - minidump_smem = "/reserved-memory/minidump-smem@1f0000"; - i2s0_sclk = "/pinctrl/i2s0/i2s0-sclk"; - uart0m1_xfer = "/pinctrl/uart0/uart0m1-xfer"; - rga3_core1 = "/rga@fdb70000"; - i2s1m0_sdo1 = "/pinctrl/i2s1/i2s1m0-sdo1"; - uart1m0_ctsn = "/pinctrl/uart1/uart1m0-ctsn"; - vcc5v0_usb = "/vcc5v0-usb"; - minidump = "/minidump"; - }; - - rkvdec-ccu@fdc30000 { - power-domains = <0x60 0x0e>; - rockchip,ccu-mode = <0x01>; - clock-names = "aclk_ccu"; - reg-names = "ccu"; - assigned-clocks = <0x02 0x18e>; - assigned-clock-rates = <0x23c34600>; - resets = <0x02 0x282>; - clocks = <0x02 0x18e>; - compatible = "rockchip,rkv-decoder-v2-ccu"; - status = "okay"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdc30000 0x00 0x100>; - phandle = <0xca>; - reset-names = "video_ccu"; - }; - - qos@fdf60000 { - compatible = "syscon"; - reg = <0x00 0xfdf60000 0x00 0x20>; - phandle = <0x8d>; - }; - - iommu@fdb50800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x76 0x04>; - clocks = <0x02 0x1c0 0x02 0x1c1>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_vdpu_mmu"; - reg = <0x00 0xfdb50800 0x00 0x40>; - phandle = <0xb7>; - }; - - rga@fdb60000 { - power-domains = <0x60 0x16>; - iommus = <0xb9>; - clock-names = "aclk_rga3_0\0hclk_rga3_0\0clk_rga3_0"; - interrupts = <0x00 0x72 0x04>; - clocks = <0x02 0x1ba 0x02 0x1b9 0x02 0x1bb>; - compatible = "rockchip,rga3_core0"; - status = "okay"; - interrupt-names = "rga3_core0_irq"; - reg = <0x00 0xfdb60000 0x00 0x1000>; - phandle = <0x269>; - }; - - qos@fdf67200 { - compatible = "syscon"; - reg = <0x00 0xfdf67200 0x00 0x20>; - phandle = <0x28b>; - }; - - vepu@fdb50000 { - power-domains = <0x60 0x15>; - iommus = <0xb7>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1c0>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2c8 0x02 0x2c9>; - interrupts = <0x00 0x78 0x04>; - clocks = <0x02 0x1c0 0x02 0x1c1>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x00>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-encoder-v2"; - rockchip,resetgroup-node = <0x00>; - status = "disabled"; - interrupt-names = "irq_vepu"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdb50000 0x00 0x400>; - phandle = <0x266>; - reset-names = "shared_video_a\0shared_video_h"; - }; - - mipi3-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x227>; - }; - - hdmi0-sound { - rockchip,jack-det; - rockchip,cpu = <0x1d3>; - rockchip,codec = <0x1d4>; - rockchip,card-name = "rockchip-hdmi0"; - compatible = "rockchip,hdmi"; - status = "okay"; - phandle = <0x49b>; - rockchip,mclk-fs = <0x80>; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - minidump-smem@1f0000 { - status = "disabled"; - reg = <0x00 0x1f0000 0x00 0x100>; - phandle = <0x1cf>; - no-map; - }; - - minidump-mem@c000000 { - status = "disabled"; - reg = <0x00 0xc000000 0x00 0x2000000>; - phandle = <0x1d0>; - no-map; - }; - - cma { - linux,cma-default; - compatible = "shared-dma-pool"; - size = <0x00 0x800000>; - reusable; - }; - - drm-logo@00000000 { - compatible = "rockchip,drm-logo"; - reg = <0x00 0xedf00000 0x00 0x2e0000>; - phandle = <0x37>; - }; - - ramoops@110000 { - boot-log-count = <0x01>; - record-size = <0x14000>; - pmsg-size = <0x30000>; - compatible = "ramoops"; - console-size = <0x80000>; - reg = <0x00 0x110000 0x00 0xe0000>; - phandle = <0x493>; - boot-log-size = <0x8000>; - ftrace-size = <0x00>; - }; - - drm-cubic-lut@00000000 { - compatible = "rockchip,drm-cubic-lut"; - reg = <0x00 0x00 0x00 0x00>; - phandle = <0x492>; - }; - }; - - pcie@fe160000 { - power-domains = <0x60 0x22>; - vpcie3v3-supply = <0x1ba>; - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x10 0x1f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x10>; - resets = <0x02 0x20e 0x02 0x21d>; - interrupts = <0x00 0x102 0x04 0x00 0x101 0x04 0x00 0x100 0x04 0x00 0xff 0x04 0x00 0xfe 0x04>; - clocks = <0x02 0x14f 0x02 0x154 0x02 0x14a 0x02 0x159 0x02 0x15f 0x02 0x184>; - interrupt-map = <0x00 0x00 0x00 0x01 0x1b9 0x00 0x00 0x00 0x00 0x02 0x1b9 0x01 0x00 0x00 0x00 0x03 0x1b9 0x02 0x00 0x00 0x00 0x04 0x1b9 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x03>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - reset-gpios = <0x10d 0x08 0x00>; - num-lanes = <0x02>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf1000000 0x00 0xf1000000 0x00 0x100000 0x81000000 0x00 0xf1100000 0x00 0xf1100000 0x00 0x100000 0x82000000 0x00 0xf1200000 0x00 0xf1200000 0x00 0xe00000 0xc3000000 0x09 0x40000000 0x09 0x40000000 0x00 0x40000000>; - msi-map = <0x1000 0x1b6 0x1000 0x1000>; - #interrupt-cells = <0x01>; - status = "disabled"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x1b7>; - num-viewport = <0x08>; - reg = <0x00 0xfe160000 0x00 0x10000 0x0a 0x40400000 0x00 0x400000>; - linux,pci-domain = <0x01>; - phandle = <0x486>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x10>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0xff 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x1b9>; - interrupt-controller; - }; - }; - - spdif-tx@fddb8000 { - power-domains = <0x60 0x19>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x20b>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc6 0x04>; - clocks = <0x02 0x20f 0x02 0x20a>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfddb8000 0x00 0x1000>; - phandle = <0x1e2>; - dmas = <0xf1 0x16>; - }; - - pvtm@fdb30000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-gpu-pvtm"; - reg = <0x00 0xfdb30000 0x00 0x100>; - - pvtm@4 { - clock-names = "clk"; - resets = <0x02 0x430 0x02 0x42f>; - clocks = <0x02 0x118>; - reg = <0x04>; - reset-names = "rts\0rst-p"; - }; - }; - - spdif-tx1-dc { - #sound-dai-cells = <0x00>; - compatible = "linux,spdif-dit"; - status = "disabled"; - phandle = <0x1d8>; - }; - - csi2-dphy0 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "okay"; - phys = <0x2f 0x30>; - firefly-compatible; - phandle = <0x20f>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - data-lanes = <0x01 0x02 0x03 0x04>; - remote-endpoint = <0x32>; - reg = <0x01>; - phandle = <0x184>; - }; - - endpoint@0 { - data-lanes = <0x01 0x02 0x03 0x04>; - remote-endpoint = <0x31>; - reg = <0x00>; - phandle = <0x183>; - }; - }; - - port@1 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x01>; - - endpoint@0 { - remote-endpoint = <0x33>; - reg = <0x00>; - phandle = <0x4d>; - }; - }; - }; - }; - - rkisp-unite@fdcb0000 { - power-domains = <0x60 0x1c>; - iommus = <0xcf>; - clock-names = "aclk_isp0\0hclk_isp0\0clk_isp_core0\0clk_isp_core_marvin0\0clk_isp_core_vicap0\0aclk_isp1\0hclk_isp1\0clk_isp_core1\0clk_isp_core_marvin1\0clk_isp_core_vicap1"; - interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; - clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd 0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; - compatible = "rockchip,rk3588-rkisp-unite"; - status = "disabled"; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - reg = <0x00 0xfdcb0000 0x00 0x10000 0x00 0xfdcc0000 0x00 0x10000>; - phandle = <0x277>; - }; - - sata@fe230000 { - phy-names = "sata-phy"; - clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; - interrupts = <0x00 0x113 0x04>; - clocks = <0x02 0x173 0x02 0x170 0x02 0x176 0x02 0x165 0x02 0x180>; - compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; - status = "disabled"; - interrupt-names = "hostc"; - phys = <0x70 0x01>; - reg = <0x00 0xfe230000 0x00 0x1000>; - phandle = <0x291>; - ports-implemented = <0x01>; - }; - - syscon@fd5a0000 { - compatible = "rockchip,rk3588-gpu-grf\0syscon"; - reg = <0x00 0xfd5a0000 0x00 0x100>; - phandle = <0x65>; - }; - - bt-sound { - simple-audio-card,name = "rockchip,bt"; - simple-audio-card,format = "dsp_a"; - simple-audio-card,bitclock-inversion = <0x00>; - compatible = "simple-audio-card"; - status = "disabled"; - phandle = <0x49a>; - simple-audio-card,mclk-fs = <0x100>; - - simple-audio-card,cpu { - sound-dai = <0x1d1>; - }; - - simple-audio-card,codec { - sound-dai = <0x1d2 0x01>; - }; - }; - - iommu@fdb90480 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x82 0x04>; - clocks = <0x02 0x1b4 0x02 0x1b5>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpegd_mmu"; - reg = <0x00 0xfdb90480 0x00 0x40>; - phandle = <0xbb>; - }; - - hdcp@fde70000 { - power-domains = <0x60 0x1a>; - clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; - resets = <0x02 0x3c8 0x02 0x3c6 0x02 0x3c5 0x02 0x3c4 0x02 0x3ca>; - interrupts = <0x00 0xa0 0x04>; - clocks = <0x02 0x217 0x02 0x219 0x02 0x218 0x02 0x216 0x02 0x228 0x02 0x229>; - compatible = "rockchip,rk3588-hdcp"; - status = "disabled"; - reg = <0x00 0xfde70000 0x00 0x80>; - phandle = <0x287>; - reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; - rockchip,vo-grf = <0xd8>; - }; - - spdif-tx@fe4f0000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default"; - pinctrl-0 = <0x143>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x45>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc2 0x04>; - clocks = <0x02 0x47 0x02 0x44>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfe4f0000 0x00 0x1000>; - phandle = <0x1d7>; - dmas = <0xf1 0x05>; - }; - - rkcif-mipi-lvds-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x52>; - phandle = <0x22d>; - }; - - es8388-sound { - pinctrl-names = "default"; - rockchip,cpu = <0x1da>; - pinctrl-0 = <0x1dc>; - rockchip,codec = <0x1db>; - hp-det-gpio = <0x79 0x13 0x00>; - rockchip,card-name = "rockchip-es8388"; - rockchip,format = "i2s"; - rockchip,audio-routing = "Headphone\0LOUT1\0Headphone\0ROUT1\0Speaker\0LOUT2\0Speaker\0ROUT2\0Headphone\0Headphone Power\0Headphone\0Headphone Power\0LINPUT2\0Main Mic\0RINPUT2\0Main Mic\0LINPUT1\0Headset Mic\0RINPUT1\0Headset Mic"; - compatible = "firefly,multicodecs-card"; - linein-type = <0x01>; - status = "okay"; - phandle = <0x49f>; - hp-con-gpio = <0x182 0x0b 0x00>; - firefly,not-use-dapm; - rockchip,mclk-fs = <0x180>; - }; - - spi@feb30000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x02>; - pinctrl-0 = <0x15d 0x15e 0x15f>; - clock-names = "spiclk\0apb_pclk"; - interrupts = <0x00 0x149 0x04>; - clocks = <0x02 0xa6 0x02 0xa1>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "disabled"; - reg = <0x00 0xfeb30000 0x00 0x1000>; - phandle = <0x2c8>; - dmas = <0xf1 0x11 0xf1 0x12>; - }; - - phy@fee80000 { - rockchip,pipe-grf = <0x76>; - clock-names = "pclk"; - rockchip,pcie30-phymode = <0x01>; - resets = <0x02 0x2000a>; - clocks = <0x02 0x188>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-pcie3-phy"; - status = "okay"; - reg = <0x00 0xfee80000 0x00 0x20000>; - phandle = <0x1b7>; - reset-names = "phy"; - rockchip,phy-grf = <0x1cc>; - }; - - vcc12v-dcin { - regulator-max-microvolt = <0xb71b00>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b00>; - regulator-name = "vcc12v_dcin"; - compatible = "regulator-fixed"; - phandle = <0x1cd>; - }; - - qos@fdf61200 { - compatible = "syscon"; - reg = <0x00 0xfdf61200 0x00 0x20>; - phandle = <0x91>; - }; - - i2s@fde00000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x234>; - assigned-clock-parents = <0x02 0x05>; - rockchip,capture-only; - resets = <0x02 0x417>; - interrupts = <0x00 0xbe 0x04>; - clocks = <0x02 0x237 0x02 0x237 0x02 0x233>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - status = "disabled"; - reg = <0x00 0xfde00000 0x00 0x1000>; - phandle = <0x47e>; - dmas = <0xf2 0x18>; - reset-names = "rx-m"; - }; - - qos@fdf40800 { - compatible = "syscon"; - reg = <0x00 0xfdf40800 0x00 0x20>; - phandle = <0xa5>; - }; - - i2s@fddfc000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x23f>; - assigned-clock-parents = <0x02 0x05>; - rockchip,capture-only; - resets = <0x02 0x413>; - interrupts = <0x00 0xbd 0x04>; - clocks = <0x02 0x242 0x02 0x242 0x02 0x23e>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - status = "disabled"; - reg = <0x00 0xfddfc000 0x00 0x1000>; - phandle = <0x27f>; - dmas = <0xf2 0x17>; - reset-names = "rx-m"; - }; - - usbdrd3_0 { - #address-cells = <0x02>; - clock-names = "ref\0suspend\0bus"; - clocks = <0x02 0x1a3 0x02 0x1a2 0x02 0x1a1>; - #size-cells = <0x02>; - compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; - ranges; - status = "okay"; - phandle = <0x252>; - - usb@fc000000 { - power-domains = <0x60 0x1f>; - snps,dis-u1-entry-quirk; - snps,dis_enblslpm_quirk; - phy-names = "usb2-phy\0usb3-phy"; - snps,dis-u2-freeclk-exists-quirk; - usb-role-switch; - phy_type = "utmi_wide"; - quirk-skip-phy-init; - resets = <0x02 0x2a4>; - interrupts = <0x00 0xdc 0x04>; - snps,dis-u2-entry-quirk; - compatible = "snps,dwc3"; - snps,parkmode-disable-hs-quirk; - snps,dis-del-phy-power-chg-quirk; - status = "okay"; - snps,parkmode-disable-ss-quirk; - phys = <0x66 0x67>; - reg = <0x00 0xfc000000 0x00 0x400000>; - phandle = <0x253>; - dr_mode = "host"; - reset-names = "usb3-otg"; - snps,dis-tx-ipgap-linecheck-quirk; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - remote-endpoint = <0x68>; - reg = <0x00>; - phandle = <0x17d>; - }; - }; - }; - }; - - rkcif-mipi-lvds5-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a2>; - phandle = <0x478>; - }; - - rkcif-dvp-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x51>; - phandle = <0x22a>; - }; - - iommu@fdd97e00 { - rockchip,shootdown-entire; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x9c 0x04>; - clocks = <0x02 0x270 0x02 0x26f>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "vop_mmu"; - reg = <0x00 0xfdd97e00 0x00 0x100 0x00 0xfdd97f00 0x00 0x100>; - phandle = <0xd6>; - rockchip,disable-device-link-resume; - }; - - rkvtunnel { - compatible = "rockchip,video-tunnel"; - status = "disabled"; - phandle = <0x245>; - }; - - syscon@fd5e0000 { - compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; - reg = <0x00 0xfd5e0000 0x00 0x100>; - phandle = <0x18a>; - }; - - i2c@fead0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x14d>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb4 0x02 0xac>; - interrupts = <0x00 0x142 0x04>; - clocks = <0x02 0x91 0x02 0x89>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "disabled"; - reg = <0x00 0xfead0000 0x00 0x1000>; - phandle = <0x2a8>; - reset-names = "i2c\0apb"; - }; - - iommu@fdba4800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x7b 0x04>; - clocks = <0x02 0x1ae 0x02 0x1af>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpege1_mmu"; - reg = <0x00 0xfdba4800 0x00 0x40>; - phandle = <0xbe>; - }; - - spdif-rx@fde10000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x260>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x3ff>; - interrupts = <0x00 0xc8 0x04>; - clocks = <0x02 0x260 0x02 0x25f>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; - status = "disabled"; - reg = <0x00 0xfde10000 0x00 0x1000>; - phandle = <0x47f>; - dmas = <0x7c 0x16>; - reset-names = "spdifrx-m"; - }; - - npu@fdab0000 { - power-domains = <0x60 0x09 0x60 0x0a 0x60 0x0b>; - iommus = <0xb2>; - clock-names = "clk_npu\0aclk0\0aclk1\0aclk2\0hclk0\0hclk1\0hclk2\0pclk"; - assigned-clocks = <0x0e 0x06>; - power-domain-names = "npu0\0npu1\0npu2"; - rknpu-supply = <0xb3>; - assigned-clock-rates = <0xbebc200>; - resets = <0x02 0x1e6 0x02 0x1b0 0x02 0x1c0 0x02 0x1e8 0x02 0x1b2 0x02 0x1c2>; - interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; - clocks = <0x0e 0x06 0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125 0x02 0x131>; - compatible = "rockchip,rk3588-rknpu"; - status = "okay"; - interrupt-names = "npu0_irq\0npu1_irq\0npu2_irq"; - mem-supply = <0xb3>; - reg = <0x00 0xfdab0000 0x00 0x10000 0x00 0xfdac0000 0x00 0x10000 0x00 0xfdad0000 0x00 0x10000>; - phandle = <0x265>; - reset-names = "srst_a0\0srst_a1\0srst_a2\0srst_h0\0srst_h1\0srst_h2"; - operating-points-v2 = <0xb1>; - }; - - hdmiphy@fed60000 { - clock-names = "ref\0apb"; - resets = <0x02 0x48e 0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d 0x02 0x48c 0x02 0x48d>; - clocks = <0x02 0x2b5 0x02 0x267>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-hdptx-phy-hdmi"; - status = "okay"; - rockchip,grf = <0x18a>; - reg = <0x00 0xfed60000 0x00 0x2000>; - phandle = <0xfd>; - reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; - - clk-port { - #clock-cells = <0x00>; - status = "okay"; - phandle = <0x35>; - }; - }; - - dmc-opp-table { - nvmem-cells = <0x44 0x45 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,leakage-voltage-sel = <0x01 0x1f 0x00 0x20 0x2c 0x01 0x2d 0x39 0x02 0x3a 0xfe 0x03>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - phandle = <0x41>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,supported-hw; - - opp-1560000000 { - opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xadf34 0xadf34 0xb71b0>; - opp-hz = <0x00 0x5cfbb600>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L3 = <0xb1008 0xb1008 0xd59f8 0xaae60 0xaae60 0xb71b0>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb1008 0xb1008 0xb71b0>; - }; - - opp-j-m-1560000000 { - opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-hz = <0x00 0x5cfbb600>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L3 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - }; - - opp-j-m-528000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-hz = <0x00 0x1f78a400>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-2750000000 { - opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb1008 0xb1008 0xb71b0>; - opp-hz = <0x00 0xa3e9ab80>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xaae60 0xaae60 0xb71b0>; - opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - }; - - opp-1068000000 { - opp-microvolt = <0xb1008 0xb1008 0xd59f8 0xb40dc 0xb40dc 0xb71b0>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; - opp-hz = <0x00 0x3fa86300>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; - opp-microvolt-L1 = <0xaae60 0xaae60 0xd59f8 0xadf34 0xadf34 0xb71b0>; - }; - - opp-j-m-2750000000 { - opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-hz = <0x00 0xa3e9ab80>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - }; - - opp-528000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xd59f8 0xb1008 0xb1008 0xb71b0>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; - opp-hz = <0x00 0x1f78a400>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa4cb8 0xa4cb8 0xb71b0>; - opp-microvolt-L1 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; - }; - - opp-j-m-1068000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-hz = <0x00 0x3fa86300>; - opp-supported-hw = <0x06 0xffff>; - }; - }; - - rkvenc-core@fdbe0000 { - power-domains = <0x60 0x11>; - iommus = <0xc5>; - rockchip,ccu = <0xc3>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - assigned-clocks = <0x02 0x1ca 0x02 0x1cb>; - rockchip,task-capacity = <0x08>; - rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; - assigned-clock-rates = <0x1dcd6500 0x2faf0800>; - resets = <0x02 0x305 0x02 0x304 0x02 0x306>; - interrupts = <0x00 0x68 0x04>; - clocks = <0x02 0x1ca 0x02 0x1c9 0x02 0x1cb>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x07>; - compatible = "rockchip,rkv-encoder-v2-core"; - status = "okay"; - interrupt-names = "irq_rkvenc1"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdbe0000 0x00 0x6000>; - phandle = <0x273>; - reset-names = "video_a\0video_h\0video_core"; - operating-points-v2 = <0xc4>; - }; - - debug@fd104000 { - compatible = "rockchip,debug"; - reg = <0x00 0xfd104000 0x00 0x1000 0x00 0xfd105000 0x00 0x1000 0x00 0xfd106000 0x00 0x1000 0x00 0xfd107000 0x00 0x1000 0x00 0xfd124000 0x00 0x1000 0x00 0xfd125000 0x00 0x1000 0x00 0xfd126000 0x00 0x1000 0x00 0xfd127000 0x00 0x1000>; - phandle = <0x48f>; - }; - - watchdog@feaf0000 { - clock-names = "tclk\0pclk"; - interrupts = <0x00 0x13b 0x04>; - clocks = <0x02 0x6c 0x02 0x6b>; - compatible = "snps,dw-wdt"; - status = "okay"; - reg = <0x00 0xfeaf0000 0x00 0x100>; - phandle = <0x2aa>; - }; - - syscon@fd5d8000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5d8000 0x00 0x4000>; - phandle = <0x25d>; - - usb2-phy@8000 { - clock-output-names = "usb480m_phy2"; - clock-names = "phyclk"; - resets = <0x02 0xc0049 0x02 0x48a>; - interrupts = <0x00 0x187 0x04>; - clocks = <0x02 0x2b5>; - #clock-cells = <0x00>; - compatible = "rockchip,rk3588-usb2phy"; - status = "okay"; - reg = <0x8000 0x10>; - phandle = <0x69>; - reset-names = "phy\0apb"; - - host-port { - phy-supply = <0x75>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x6c>; - }; - }; - }; - - cluster0-opp-table { - rockchip,pvtm-offset = <0x64>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,dsu-grf = <0x23>; - rockchip,pvtm-hw = <0x06>; - nvmem-cells = <0x1f 0x20 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x555 0x00 0x556 0x56b 0x01 0x56c 0x581 0x02 0x582 0x597 0x03 0x598 0x5ad 0x04 0x5ae 0x5c3 0x05 0x5c4 0x270f 0x06>; - rockchip,pvtm-thermal-zone = "soc-thermal"; - rockchip,opp-shared-dsu; - rockchip,high-temp-max-freq = <0x188940>; - opp-shared; - rockchip,reboot-freq = <0x159b40>; - rockchip,pvtm-freq = <0x159b40>; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0x22>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x582 0x00 0x583 0x59a 0x01 0x59b 0x5b2 0x02 0x5b3 0x5ca 0x03 0x5cb 0x5e2 0x04 0x5e3 0x5fa 0x05 0x5fb 0x270f 0x06>; - phandle = <0x0f>; - rockchip,pvtm-temp-prop = <0xf4 0xf4>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0xf6180>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-1200000000 { - opp-microvolt = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; - opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-microvolt-L2 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xe7ef0 0xa7d8c 0xa7d8c 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; - }; - - opp-j-m-1416000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L2 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - opp-hz = <0x00 0x54667200>; - opp-microvolt-L0 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-supported-hw = <0x06 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - }; - - opp-1008000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1704000000 { - opp-microvolt = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - opp-microvolt-L6 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - opp-microvolt-L4 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L2 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - opp-hz = <0x00 0x6590fa00>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L5 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L3 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - }; - - opp-j-m-1200000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1008000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-816000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-1800000000 { - opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - opp-microvolt-L6 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L4 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - opp-microvolt-L2 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L3 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-1608000000 { - opp-microvolt = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - opp-microvolt-L6 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - }; - - opp-j-1296000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x4d3f6400>; - opp-microvolt-L0 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - opp-supported-hw = <0x04 0xffff>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - }; - - opp-j-m-408000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-816000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1608000000 { - opp-microvolt = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L6 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - opp-microvolt-L4 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - opp-microvolt-L2 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L5 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-microvolt-L3 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - }; - - opp-600000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-1416000000 { - opp-microvolt = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - opp-microvolt-L6 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; - opp-microvolt-L4 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; - opp-microvolt-L2 = <0xb40dc 0xb40dc 0xe7ef0 0xb40dc 0xb40dc 0xe7ef0>; - opp-hz = <0x00 0x54667200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; - opp-suspend; - opp-microvolt-L3 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - }; - - opp-408000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - }; - - vcc-4g-regulator { - regulator-boot-on; - gpio = <0x182 0x00 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_4g"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4b0>; - }; - - spi@fecb0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x02>; - pinctrl-0 = <0x187 0x188 0x189>; - clock-names = "spiclk\0apb_pclk"; - interrupts = <0x00 0x14a 0x04>; - clocks = <0x02 0xa7 0x02 0xa2>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "disabled"; - reg = <0x00 0xfecb0000 0x00 0x1000>; - phandle = <0x2e6>; - dmas = <0xf2 0x0d 0xf2 0x0e>; - }; - - spdif-rx@fde08000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x25e>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x3fd>; - interrupts = <0x00 0xc7 0x04>; - clocks = <0x02 0x25e 0x02 0x25d>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; - status = "disabled"; - reg = <0x00 0xfde08000 0x00 0x1000>; - phandle = <0x280>; - dmas = <0x7c 0x15>; - reset-names = "spdifrx-m"; - }; - - mipi3-csi2-hw@fdd40000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x327>; - interrupts = <0x00 0x95 0x04 0x00 0x96 0x04>; - clocks = <0x02 0x1d2>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd40000 0x00 0x10000>; - phandle = <0x4a>; - reset-names = "srst_csihost_p"; - }; - - // DTB memory region: { address: 0x0940_0000, size: 0xc6c0_0000 } ~3.3G - - memory { - device_type = "memory"; - reg = <0x00 0x9400000 0x00 0xc6c00000>; - }; - - jpege-core@fdba4000 { - power-domains = <0x60 0x15>; - iommus = <0xbe>; - rockchip,ccu = <0xbd>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1ae>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2cc 0x02 0x2cd>; - interrupts = <0x00 0x7c 0x04>; - clocks = <0x02 0x1ae 0x02 0x1af>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-jpege-core"; - status = "okay"; - interrupt-names = "irq_jpege1"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdba4000 0x00 0x400>; - phandle = <0x26e>; - reset-names = "video_a\0video_h"; - }; - - wireless-wlan { - pinctrl-names = "default"; - pinctrl-0 = <0x1ea>; - WIFI,host_wake_irq = <0x182 0x0a 0x00>; - wifi_chip_type = "rtl8822ce"; - compatible = "wlan-platdata"; - status = "okay"; - phandle = <0x4ab>; - }; - - rkcif-mipi-lvds4-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a1>; - phandle = <0x475>; - }; - - dp@fde50000 { - power-domains = <0x60 0x19>; - clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; - assigned-clocks = <0x02 0x2cc>; - assigned-clock-rates = <0xf42400>; - resets = <0x02 0x388>; - interrupts = <0x00 0xa1 0x04>; - clocks = <0x02 0x1e6 0x02 0x2cc 0x02 0x1fb 0x02 0x207 0x04 0x02 0x1ea>; - #sound-dai-cells = <0x01>; - compatible = "rockchip,rk3588-dp"; - status = "disabled"; - phys = <0xf6>; - reg = <0x00 0xfde50000 0x00 0x4000>; - phandle = <0x1d6>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - remote-endpoint = <0x38>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe0>; - }; - - endpoint@2 { - remote-endpoint = <0xf8>; - status = "disabled"; - reg = <0x02>; - phandle = <0xe6>; - }; - - endpoint@0 { - remote-endpoint = <0xf7>; - status = "disabled"; - reg = <0x00>; - phandle = <0xda>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - phandle = <0x286>; - }; - }; - }; - }; - - rockchip-system-monitor { - rockchip,thermal-zone = "soc-thermal"; - compatible = "rockchip,system-monitor"; - phandle = <0x247>; - }; - - vcc3v3-pcie30 { - regulator-max-microvolt = <0x325aa0>; - enable-active-high; - regulator-min-microvolt = <0x325aa0>; - regulator-name = "vcc3v3_pcie30"; - startup-delay-us = <0x1388>; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x1b8>; - vin-supply = <0x1cd>; - gpios = <0x182 0x04 0x00>; - }; - - phy@fedb0000 { - clock-names = "pclk\0ref"; - resets = <0x02 0xc0045 0x02 0x43 0x02 0x44 0x02 0xc0046>; - clocks = <0x02 0x109 0x02 0x2b6>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-mipi-dcphy"; - status = "okay"; - rockchip,grf = <0x191>; - reg = <0x00 0xfedb0000 0x00 0x10000>; - phandle = <0x30>; - reset-names = "m_phy\0apb\0grf\0s_phy"; - }; - - rkvdec-core@fdc38000 { - power-domains = <0x60 0x0e>; - iommus = <0xc9>; - rockchip,ccu = <0xca>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; - reg-names = "regs\0link"; - assigned-clocks = <0x02 0x190 0x02 0x193 0x02 0x191 0x02 0x192>; - rockchip,core-mask = <0x10001>; - rockchip,task-capacity = <0x10>; - rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; - assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; - resets = <0x02 0x284 0x02 0x283 0x02 0x289 0x02 0x287 0x02 0x288>; - interrupts = <0x00 0x5f 0x04>; - rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; - clocks = <0x02 0x190 0x02 0x18f 0x02 0x193 0x02 0x191 0x02 0x192>; - rockchip,rcb-min-width = <0x200>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x09>; - compatible = "rockchip,rkv-decoder-v2"; - status = "okay"; - interrupt-names = "irq_rkvdec0"; - rockchip,skip-pmu-idle-request; - rockchip,rcb-iova = <0xfff00000 0x100000>; - reg = <0x00 0xfdc38100 0x00 0x400 0x00 0xfdc38000 0x00 0x100>; - phandle = <0x274>; - reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; - rockchip,sram = <0xcb>; - }; - - minidump { - smem-region = <0x1cf>; - minidump-region = <0x1d0>; - compatible = "rockchip,minidump"; - status = "disabled"; - phandle = <0x491>; - }; -}; diff --git a/configs/vms_bkp/aio-rk3588-jd4-vm2.dts b/configs/vms_bkp/aio-rk3588-jd4-vm2.dts deleted file mode 100644 index 5fc9d3b2..00000000 --- a/configs/vms_bkp/aio-rk3588-jd4-vm2.dts +++ /dev/null @@ -1,656 +0,0 @@ -/dts-v1/; - -/ { - #address-cells = <0x02>; - model = "Firefly AIO-3588JD4"; - serial-number = "a0deeea630de3975"; - #size-cells = <0x02>; - interrupt-parent = <0x01>; - compatible = "rockchip,aio-3588jd4\0rockchip,rk3588"; - - chosen { - linux,initrd-start = <0x01 0x0a200000>; - linux,initrd-end = <0x01 0xaac8000>; - bootargs = "rw earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0 root=/dev/sda1"; - phandle = <0x48d>; - }; - - // DTB memory region: { address: 0xe000_0000, size: 0x1000_0000 } 256M - // DTB memory region: { address: 0x1_0000_0000, size: 0xe000_0000 } 3.7G - - - memory { - device_type = "memory"; - reg = <0x00 0xe0000000 0x00 0x10000000 0x01 0x00000000 0x00 0xe0000000>; - }; - - cpus { - #address-cells = <0x01>; - #size-cells = <0x00>; - - cpu@200 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x200>; - enable-method = "psci"; - capacity-dmips-mhz = <0x212>; - clocks = <0x0e 0x00>; - operating-points-v2 = <0x0f>; - cpu-idle-states = <0x10>; - i-cache-size = <0x8000>; - i-cache-line-size = <0x40>; - i-cache-sets = <0x80>; - d-cache-size = <0x8000>; - d-cache-line-size = <0x40>; - d-cache-sets = <0x80>; - next-level-cache = <0x14>; - phandle = <0x08>; - }; - - cpu@300 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x300>; - enable-method = "psci"; - capacity-dmips-mhz = <0x212>; - clocks = <0x0e 0x00>; - operating-points-v2 = <0x0f>; - cpu-idle-states = <0x10>; - i-cache-size = <0x8000>; - i-cache-line-size = <0x40>; - i-cache-sets = <0x80>; - d-cache-size = <0x8000>; - d-cache-line-size = <0x40>; - d-cache-sets = <0x80>; - next-level-cache = <0x15>; - phandle = <0x09>; - }; - - l2-cache-l2 { - compatible = "cache"; - cache-size = <0x20000>; - cache-line-size = <0x40>; - cache-sets = <0x200>; - next-level-cache = <0x1e>; - phandle = <0x14>; - }; - - l2-cache-l3 { - compatible = "cache"; - cache-size = <0x20000>; - cache-line-size = <0x40>; - cache-sets = <0x200>; - next-level-cache = <0x1e>; - phandle = <0x15>; - }; - - l3-cache { - compatible = "cache"; - cache-size = <0x300000>; - cache-sets = <0x1000>; - cache-line-size = <0x40>; - phandle = <0x1e>; - }; - - idle-states { - entry-method = "psci"; - - cpu-sleep { - compatible = "arm,idle-state"; - entry-latency-us = <0x64>; - exit-latency-us = <0x78>; - min-residency-us = <0x3e8>; - local-timer-stop; - arm,psci-suspend-param = <0x10000>; - phandle = <0x10>; - }; - }; - - cpu-map { - cluster0 { - core2 { - cpu = <0x08>; - }; - - core3 { - cpu = <0x09>; - }; - }; - }; - }; - - sram@10f000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "mmio-sram"; - ranges = <0x00 0x00 0x10f000 0x100>; - reg = <0x00 0x10f000 0x00 0x100>; - - sram@0 { - compatible = "arm,scmi-shmem"; - reg = <0x00 0x100>; - phandle = <0x46>; - }; - }; - - firmware { - sdei { - method = "smc"; - compatible = "arm,sdei-1.0"; - phandle = <0x221>; - }; - - scmi { - shmem = <0x46>; - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "arm,scmi-smc"; - phandle = <0x220>; - arm,smc-id = <0x82000010>; - - protocol@16 { - #reset-cells = <0x01>; - reg = <0x16>; - phandle = <0x11a>; - }; - - protocol@14 { - assigned-clocks = <0x0e 0x00 0x0e 0x02 0x0e 0x03>; - assigned-clock-rates = <0x30a32c00 0x30a32c00 0x30a32c00>; - #clock-cells = <0x01>; - reg = <0x14>; - phandle = <0x0e>; - }; - }; - }; - - timer { - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - compatible = "arm,armv8-timer"; - }; - - interrupt-controller@fe600000 { - #address-cells = <0x02>; - interrupts = <0x01 0x09 0x04>; - #size-cells = <0x02>; - compatible = "arm,gic-v3"; - ranges; - #interrupt-cells = <0x03>; - reg = <0x00 0xfe600000 0x00 0x10000 0x00 0xfe6c0000 0x00 0x100000>; - phandle = <0x01>; - interrupt-controller; - - }; - - psci { - method = "smc"; - compatible = "arm,psci-1.0"; - }; - - // dummy clocks that are configured by VM1 - clocks { - #address-cells = <0x02>; - #size-cells = <0x02>; - compatible = "simple-bus"; - ranges; - - // serial - serial_baud_24m { - clock-output-names = "serial_baud_24m"; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - #clock-cells = <0>; - phandle = <0xbb>; - }; - - serial_pclk_100m { - clock-output-names = "serial_pclk_100m"; - compatible = "fixed-clock"; - clock-frequency = <100000000>; - #clock-cells = <0>; - phandle = <0xac>; - }; - - // ethernet - gmac_125m { - clock-output-names = "gmac_125m"; - compatible = "fixed-clock"; - clock-frequency = <125000000>; - #clock-cells = <0>; - phandle = <0x144>; - }; - - gmac_50m { - clock-output-names = "gmac_50m"; - compatible = "fixed-clock"; - clock-frequency = <50000000>; - #clock-cells = <0>; - phandle = <0x145>; - }; - - gmac1_pclk_150m { - clock-output-names = "gmac1_pclk_150m"; - compatible = "fixed-clock"; - clock-frequency = <150000000>; - #clock-cells = <0>; - phandle = <0x168>; - }; - - gmac1_aclk_396m { - clock-output-names = "gmac1_aclk_396m"; - compatible = "fixed-clock"; - clock-frequency = <396000000>; - #clock-cells = <0>; - phandle = <0x16d>; - }; - - gmac1_ptp_ref_100m { - clock-output-names = "gmac1_ptp_ref_100m"; - compatible = "fixed-clock"; - clock-frequency = <100000000>; - #clock-cells = <0>; - phandle = <0x143>; - }; - - sata0_aclk_396m { - clock-output-names = "sata0_aclk_396m"; - compatible = "fixed-clock"; - clock-frequency = <396000000>; - #clock-cells = <0>; - phandle = <0x171>; - }; - - sata0_pmalive_24m { - clock-output-names = "sata0_pmalive_24m"; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - #clock-cells = <0>; - phandle = <0x16e>; - }; - - sata0_rxoob_50m { - clock-output-names = "sata0_rxoob_50m"; - compatible = "fixed-clock"; - clock-frequency = <50000000>; - #clock-cells = <0>; - phandle = <0x174>; - }; - - sata0_pipephy_ref_24m { - clock-output-names = "sata0_pipephy_ref_24m"; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - #clock-cells = <0>; - phandle = <0x163>; - }; - - sata0_pipephy_asic_0 { - clock-output-names = "sata0_pipephy_asic_0"; - compatible = "fixed-clock"; - clock-frequency = <0>; - #clock-cells = <0>; - phandle = <0x17e>; - }; - - phy0_refclk_100m { - clock-output-names = "phy0_refclk_100m"; - compatible = "fixed-clock"; - clock-frequency = <100000000>; - #clock-cells = <0>; - phandle = <0x2bd>; - }; - - phy0_apbclk_100m { - clock-output-names = "phy0_apbclk_100m"; - compatible = "fixed-clock"; - clock-frequency = <100000000>; - #clock-cells = <0>; - phandle = <0x185>; - }; - - phy0_phpclk_150m { - clock-output-names = "phy0_phpclk_150m"; - compatible = "fixed-clock"; - clock-frequency = <150000000>; - #clock-cells = <0>; - phandle = <0x166>; - }; - }; - - serial@feb50000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x161>; - interrupts = <0x00 0x14d 0x04>; - // Avoid driver messing with CRU - clock-names = "baudclk\0apb_pclk"; - clocks = <0xbb 0xac>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeb50000 0x00 0x100>; - phandle = <0x2ca>; - dmas = <0x7c 0x0a 0x7c 0x0b>; - reg-shift = <0x02>; - }; - - fiq-debugger { - pinctrl-names = "default"; - rockchip,irq-mode-enable = <0x01>; - rockchip,baudrate = <0x1c200>; - pinctrl-0 = <0x1ce>; - interrupts = <0x00 0x1a7 0x08>; - rockchip,wake-irq = <0x00>; - compatible = "rockchip,fiq-debugger"; - status = "okay"; - phandle = <0x490>; - rockchip,serial-id = <0x02>; - }; - - syscon@fd5b0000 { - compatible = "rockchip,rk3588-php-grf\0syscon"; - reg = <0x00 0xfd5b0000 0x00 0x1000>; - phandle = <0x76>; - }; - - syscon@fd58c000 { - compatible = "rockchip,rk3588-sys-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd58c000 0x00 0x1000>; - phandle = <0xc8>; - }; - - syscon@fd5bc000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfd5bc000 0x00 0x100>; - phandle = <0x194>; - }; - - sata@fe210000 { - phy-names = "sata-phy"; - clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; - interrupts = <0x00 0x111 0x04>; - clocks = <0x171 0x16e 0x174 0x163 0x17e>; - compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; - status = "okay"; - interrupt-names = "hostc"; - phys = <0x108 0x01>; - reg = <0x00 0xfe210000 0x00 0x1000>; - phandle = <0x290>; - ports-implemented = <0x01>; - }; - - phy@fee00000 { - rockchip,pipe-grf = <0x76>; - clock-names = "refclk\0apbclk\0phpclk"; - clocks = <0x2bd 0x185 0x166>; - #phy-cells = <0x01>; - compatible = "rockchip,rk3588-naneng-combphy"; - status = "okay"; - rockchip,pipe-phy-grf = <0x194>; - reg = <0x00 0xfee00000 0x00 0x100>; - phandle = <0x108>; - // resets = <0x02 0x20005 0x02 0x4d6>; - // reset-names = "combphy-apb\0combphy"; - }; - - ethernet@fe1c0000 { - power-domains = <0x60 0x21>; - pinctrl-names = "default"; - phy-mode = "rgmii-rxid"; - snps,mixed-burst; - snps,mtl-rx-config = <0x10b>; - pinctrl-0 = <0x10e 0x10f 0x110 0x111 0x112>; - clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; - snps,mtl-tx-config = <0x10c>; - local-mac-address = [a6 50 47 45 20 ee]; - interrupt-names = "macirq\0eth_wake_irq"; - interrupts = <0x00 0xea 0x04 0x00 0xe9 0x04>; - clocks = <0x144 0x145 0x168 0x16d 0x143>; - clock_in_out = "output"; - snps,tso; - compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; - status = "okay"; - rockchip,grf = <0xc8>; - // reset-names = "stmmaceth"; - // resets = <0x02 0x20b>; - // snps,reset-active-low; - // snps,reset-gpio = <0x10d 0x08 0x01>; - // snps,reset-delays-us = <0x00 0x4e20 0x186a0>; - reg = <0x00 0xfe1c0000 0x00 0x10000>; - rockchip,php_grf = <0x76>; - phandle = <0x109>; - phy-handle = <0x113>; - tx_delay = <0x40>; - snps,axi-config = <0x10a>; - - mdio { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "snps,dwmac-mdio"; - phandle = <0x28f>; - - phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x01>; - phandle = <0x113>; - }; - }; - - tx-queues-config { - phandle = <0x10c>; - snps,tx-queues-to-use = <0x01>; - - queue0 { - }; - }; - - stmmac-axi-config { - snps,wr_osr_lmt = <0x04>; - phandle = <0x10a>; - snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; - snps,rd_osr_lmt = <0x08>; - }; - - rx-queues-config { - snps,rx-queues-to-use = <0x01>; - phandle = <0x10b>; - - queue0 { - }; - }; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - cma { - linux,cma-default; - compatible = "shared-dma-pool"; - size = <0x00 0x800000>; - reusable; - }; - }; - - aliases { - serial2 = "/serial@feb50000"; - ethernet1 = "/ethernet@fe1c0000"; - mmc1 = "/mmc@fe2c0000"; - }; - - __symbols__ { - chosen = "/chosen"; - gic = "/interrupt-controller@fe600000"; - uart2 = "/serial@feb50000"; - - scmi_shmem = "/sram@10f000/sram@0"; - scmi = "/firmware/scmi"; - scmi_reset = "/firmware/scmi/protocol@16"; - scmi_clk = "/firmware/scmi/protocol@14"; - - gmac1 = "/ethernet@fe1c0000"; - mdio1 = "/ethernet@fe1c0000/mdio"; - rgmii_phy1 = "/ethernet@fe1c0000/mdio/phy@1"; - gmac1_mtl_rx_setup = "/ethernet@fe1c0000/rx-queues-config"; - gmac1_mtl_tx_setup = "/ethernet@fe1c0000/tx-queues-config"; - gmac1_stmmac_axi_setup = "/ethernet@fe1c0000/stmmac-axi-config"; - - sata0 = "/sata@fe210000"; - sata0m0_pins = "/pinctrl/sata0/sata0m0-pins"; - sata0m1_pins = "/pinctrl/sata0/sata0m1-pins"; - - }; - - syscon@fd5f0000 { - compatible = "rockchip,rk3588-ioc\0syscon"; - reg = <0x00 0xfd5f0000 0x00 0x10000>; - phandle = <0x196>; - }; - - pinctrl { - #address-cells = <0x02>; - #size-cells = <0x02>; - compatible = "rockchip,rk3588-pinctrl"; - ranges; - rockchip,grf = <0x196>; - phandle = <0x197>; - - uart2 { - - uart2-rtsn { - rockchip,pins = <0x03 0x0b 0x0a 0x198>; - phandle = <0x427>; - }; - - uart2m1-xfer { - rockchip,pins = <0x04 0x19 0x0a 0x19e 0x04 0x18 0x0a 0x19e>; - phandle = <0x161>; - }; - - uart2m0-xfer { - rockchip,pins = <0x00 0x0e 0x0a 0x19e 0x00 0x0d 0x0a 0x19e>; - phandle = <0x1ce>; - }; - - uart2-ctsn { - rockchip,pins = <0x03 0x0c 0x0a 0x198>; - phandle = <0x426>; - }; - - uart2m2-xfer { - rockchip,pins = <0x03 0x0a 0x0a 0x19e 0x03 0x09 0x0a 0x19e>; - phandle = <0x425>; - }; - }; - - gmac1 { - - gmac1-rgmii-clk { - rockchip,pins = <0x03 0x05 0x01 0x198 0x03 0x04 0x01 0x198>; - phandle = <0x111>; - }; - - gmac1-rx-bus2 { - rockchip,pins = <0x03 0x07 0x01 0x198 0x03 0x08 0x01 0x198 0x03 0x09 0x01 0x198>; - phandle = <0x110>; - }; - - gmac1-txer { - rockchip,pins = <0x03 0x0a 0x01 0x198>; - phandle = <0x332>; - }; - - gmac1-clkinout { - rockchip,pins = <0x03 0x0e 0x01 0x198>; - phandle = <0x32e>; - }; - - gmac1-ptp-ref-clk { - rockchip,pins = <0x03 0x0f 0x01 0x198>; - phandle = <0x331>; - }; - - gmac1-ppsclk { - rockchip,pins = <0x03 0x11 0x01 0x198>; - phandle = <0x32f>; - }; - - gmac1-ppstrig { - rockchip,pins = <0x03 0x10 0x01 0x198>; - phandle = <0x330>; - }; - - gmac1-rgmii-bus { - rockchip,pins = <0x03 0x02 0x01 0x198 0x03 0x03 0x01 0x198 0x03 0x00 0x01 0x19a 0x03 0x01 0x01 0x19a>; - phandle = <0x112>; - }; - - gmac1-tx-bus2 { - rockchip,pins = <0x03 0x0b 0x01 0x19a 0x03 0x0c 0x01 0x19a 0x03 0x0d 0x01 0x198>; - phandle = <0x10f>; - }; - - gmac1-miim { - rockchip,pins = <0x03 0x12 0x01 0x198 0x03 0x13 0x01 0x198>; - phandle = <0x10e>; - }; - }; - - sata { - - sata-reset { - rockchip,pins = <0x04 0x11 0x00 0x198>; - phandle = <0x3e7>; - }; - - sata-pins { - rockchip,pins = <0x00 0x16 0x0d 0x198 0x00 0x1c 0x0d 0x198 0x00 0x1d 0x0d 0x198>; - phandle = <0x3e6>; - }; - }; - - sata0 { - - sata0m1-pins { - rockchip,pins = <0x01 0x0b 0x06 0x198>; - phandle = <0x3e9>; - }; - - sata0m0-pins { - rockchip,pins = <0x04 0x0e 0x06 0x198>; - phandle = <0x3e8>; - }; - }; - - // output - - // pull up - - pcfg-pull-up { - phandle = <0x19e>; - bias-pull-up; - }; - - pcfg-pull-up-drv-level-2 { - drive-strength = <0x02>; - phandle = <0x199>; - bias-pull-up; - }; - - pcfg-pull-up-drv-level-6 { - drive-strength = <0x06>; - phandle = <0x19a>; - bias-pull-up; - }; - - // pull down - - // pull none - - pcfg-pull-none { - bias-disable; - phandle = <0x198>; - }; - }; - -}; diff --git a/configs/vms_bkp/aio-rk3588-jd4.dts b/configs/vms_bkp/aio-rk3588-jd4.dts deleted file mode 100644 index b1681d82..00000000 --- a/configs/vms_bkp/aio-rk3588-jd4.dts +++ /dev/null @@ -1,12893 +0,0 @@ -/dts-v1/; - -/ { - #address-cells = <0x02>; - model = "Firefly AIO-3588JD4"; - serial-number = "a0deeea630de3975"; - #size-cells = <0x02>; - interrupt-parent = <0x01>; - compatible = "rockchip,aio-3588jd4\0rockchip,rk3588"; - - pcie30-avdd1v8 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "pcie30_avdd1v8"; - compatible = "regulator-fixed"; - phandle = <0x4a6>; - vin-supply = <0x1de>; - }; - - syscon@fd5bc000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfd5bc000 0x00 0x100>; - phandle = <0x194>; - }; - - vcc5v0-host3 { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - gpio = <0x182 0x07 0x00>; - regulator-always-on; - enable-active-high; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_host3"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x4a2>; - vin-supply = <0x1dd>; - }; - - pwm@febd0030 { - pinctrl-names = "active"; - pinctrl-0 = <0x16c>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15a 0x04 0x00 0x15b 0x04>; - clocks = <0x02 0x54 0x02 0x53>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebd0030 0x00 0x10>; - phandle = <0x2d4>; - }; - - rkisp@fdcc0000 { - power-domains = <0x60 0x1c>; - iommus = <0xd1>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; - interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; - clocks = <0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; - compatible = "rockchip,rk3588-rkisp"; - status = "disabled"; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - reg = <0x00 0xfdcc0000 0x00 0x7f00>; - phandle = <0x5a>; - }; - - qos@fdf66600 { - compatible = "syscon"; - reg = <0x00 0xfdf66600 0x00 0x20>; - phandle = <0x96>; - }; - - serial@febb0000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x167>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x153 0x04>; - clocks = <0x02 0xd3 0x02 0xb2>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfebb0000 0x00 0x100>; - phandle = <0x2d0>; - dmas = <0xf2 0x09 0xf2 0x0a>; - reg-shift = <0x02>; - }; - - qos@fdf41000 { - compatible = "syscon"; - reg = <0x00 0xfdf41000 0x00 0x20>; - phandle = <0xa6>; - }; - - csi2-dcphy1 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x20e>; - }; - - rkispp0-vir0 { - rockchip,hw = <0x5b>; - compatible = "rockchip,rk3588-rkispp-vir"; - status = "disabled"; - phandle = <0x243>; - }; - - wireless-bluetooth { - pinctrl-names = "default\0rts_gpio"; - pinctrl-0 = <0x1e5 0x1e6 0x1e7 0x1e8>; - clock-names = "ext_clock"; - BT,power_gpio = <0x7b 0x16 0x00>; - clocks = <0x1e4>; - BT,wake_gpio = <0x7b 0x15 0x00>; - uart_rts_gpios = <0xfe 0x02 0x01>; - compatible = "bluetooth-platdata"; - BT,wake_host_irq = <0x7b 0x00 0x00>; - pinctrl-1 = <0x1e9>; - status = "disabled"; - phandle = <0x4aa>; - }; - - pwm@febd0020 { - pinctrl-names = "active"; - pinctrl-0 = <0x16b>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15a 0x04>; - clocks = <0x02 0x54 0x02 0x53>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebd0020 0x00 0x10>; - phandle = <0x2d3>; - }; - - qos@fdf39000 { - compatible = "syscon"; - reg = <0x00 0xfdf39000 0x00 0x20>; - phandle = <0xaf>; - }; - - cam0-cam1-switch { - regulator-max-microvolt = <0x1b7740>; - pinctrl-names = "default"; - regulator-boot-on; - gpio = <0x181 0x11 0x00>; - pinctrl-0 = <0x1f0>; - regulator-always-on; - enable-active-high; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "cam0_cam1_switch"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4b2>; - }; - - qos@fdf3e400 { - compatible = "syscon"; - reg = <0x00 0xfdf3e400 0x00 0x20>; - phandle = <0xad>; - }; - - mipi2-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "okay"; - firefly-compatible; - phandle = <0x226>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@0 { - remote-endpoint = <0x4d>; - reg = <0x00>; - phandle = <0x33>; - }; - }; - - port@1 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x01>; - - endpoint@0 { - remote-endpoint = <0x4e>; - reg = <0x00>; - phandle = <0x54>; - }; - }; - }; - }; - - iommu@fdc48700 { - power-domains = <0x60 0x0f>; - rockchip,shootdown-entire; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x62 0x04>; - clocks = <0x02 0x195 0x02 0x194>; - rockchip,enable-cmd-retry; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "irq_rkvdec1_mmu"; - reg = <0x00 0xfdc48700 0x00 0x40 0x00 0xfdc48740 0x00 0x40>; - phandle = <0xcc>; - rockchip,master-handle-irq; - }; - - clock-controller@fd7c0000 { - #reset-cells = <0x01>; - assigned-clocks = <0x02 0x09 0x02 0x05 0x02 0x08 0x02 0x07 0x02 0xd8 0x02 0xda 0x02 0xd9 0x02 0x10e 0x02 0x10f 0x02 0x110 0x02 0x299 0x02 0x29a 0x02 0x7b 0x02 0xec 0x02 0x114 0x02 0x208 0x02 0x20e 0x02 0x21f 0x02 0x77>; - assigned-clock-rates = <0x4190ab00 0x2ee00000 0x32a9f880 0x46cf7100 0x29d7ab80 0x17d78400 0x1dcd6500 0x2cb41780 0x5f5e100 0x17d78400 0x5f5e100 0xbebc200 0x165a0bc0 0x8f0d180 0xbebc200 0xb71b00 0xb71b00 0x5e69ec0 0x1312d00>; - #clock-cells = <0x01>; - compatible = "rockchip,rk3588-cru"; - rockchip,grf = <0x76>; - reg = <0x00 0xfd7c0000 0x00 0x5c000>; - phandle = <0x02>; - }; - - qos@fdf81000 { - compatible = "syscon"; - reg = <0x00 0xfdf81000 0x00 0x20>; - phandle = <0xa0>; - }; - - qos@fdf36000 { - compatible = "syscon"; - reg = <0x00 0xfdf36000 0x00 0x20>; - phandle = <0xaa>; - }; - - i2s@fe4a0000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x132 0x133>; - pinctrl-0 = <0x12f 0x130>; - clock-names = "i2s_clk\0i2s_hclk"; - assigned-clocks = <0x02 0x2a>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xb7 0x04>; - clocks = <0x02 0x2d 0x02 0x23>; - dma-names = "tx\0rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; - pinctrl-1 = <0x131>; - status = "disabled"; - reg = <0x00 0xfe4a0000 0x00 0x1000>; - phandle = <0x299>; - dmas = <0xf1 0x02 0xf1 0x03>; - rockchip,clk-trcm = <0x01>; - }; - - syscon@fd5c4000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfd5c4000 0x00 0x100>; - phandle = <0x195>; - }; - - sram@ff001000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "mmio-sram"; - ranges = <0x00 0x00 0xff001000 0xef000>; - reg = <0x00 0xff001000 0x00 0xef000>; - phandle = <0x2eb>; - - rkvdec-sram@0 { - reg = <0x00 0x78000>; - phandle = <0xcb>; - }; - - rkvdec-sram@78000 { - reg = <0x78000 0x77000>; - phandle = <0xcd>; - }; - }; - - uio@fe1c0000 { - compatible = "rockchip,uio-gmac"; - status = "disabled"; - reg = <0x00 0xfe1c0000 0x00 0x10000>; - phandle = <0x28e>; - rockchip,ethernet = <0x109>; - }; - - pwm@febd0010 { - pinctrl-names = "active"; - pinctrl-0 = <0x16a>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15a 0x04>; - clocks = <0x02 0x54 0x02 0x53>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "okay"; - reg = <0x00 0xfebd0010 0x00 0x10>; - phandle = <0x1ed>; - }; - - rkisp1-vir3 { - rockchip,hw = <0x5a>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x242>; - }; - - pcie-clk2 { - regulator-boot-on; - regulator-always-on; - regulator-name = "pcie_clk2"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x495>; - gpios = <0x181 0x16 0x01>; - }; - - serial@feb40000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x160>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14c 0x04>; - clocks = <0x02 0xb7 0x02 0xab>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "okay"; - reg = <0x00 0xfeb40000 0x00 0x100>; - phandle = <0x2c9>; - dmas = <0x7c 0x08 0x7c 0x09>; - reg-shift = <0x02>; - }; - - pinctrl { - #address-cells = <0x02>; - #size-cells = <0x02>; - compatible = "rockchip,rk3588-pinctrl"; - ranges; - rockchip,grf = <0x196>; - phandle = <0x197>; - - eth0 { - - eth0-pins { - rockchip,pins = <0x02 0x13 0x01 0x198>; - phandle = <0x46c>; - }; - }; - - i2c3 { - - i2c3m3-xfer { - rockchip,pins = <0x02 0x0a 0x09 0x19d 0x02 0x0b 0x09 0x19d>; - phandle = <0x361>; - }; - - i2c3m2-xfer { - rockchip,pins = <0x04 0x04 0x09 0x19d 0x04 0x05 0x09 0x19d>; - phandle = <0x14a>; - }; - - i2c3m1-xfer { - rockchip,pins = <0x03 0x0f 0x09 0x19d 0x03 0x10 0x09 0x19d>; - phandle = <0x35f>; - }; - - i2c3m0-xfer { - rockchip,pins = <0x01 0x11 0x09 0x19d 0x01 0x10 0x09 0x19d>; - phandle = <0x35e>; - }; - - i2c3m4-xfer { - rockchip,pins = <0x04 0x18 0x09 0x19d 0x04 0x19 0x09 0x19d>; - phandle = <0x360>; - }; - }; - - pwm9 { - - pwm9m2-pins { - rockchip,pins = <0x03 0x19 0x0b 0x198>; - phandle = <0x3d7>; - }; - - pwm9m1-pins { - rockchip,pins = <0x04 0x19 0x0b 0x198>; - phandle = <0x3d6>; - }; - - pwm9m0-pins { - rockchip,pins = <0x03 0x08 0x0b 0x198>; - phandle = <0x16e>; - }; - }; - - pcfg-pull-none-drv-level-7 { - drive-strength = <0x07>; - bias-disable; - phandle = <0x451>; - }; - - mipi { - - mipi-te1 { - rockchip,pins = <0x03 0x13 0x02 0x198>; - phandle = <0x39f>; - }; - - mipim1-camera2-clk { - rockchip,pins = <0x03 0x07 0x04 0x198>; - phandle = <0x39b>; - }; - - mipim0-camera0-clk { - rockchip,pins = <0x04 0x09 0x01 0x198>; - phandle = <0x395>; - }; - - mipim0-camera4-clk { - rockchip,pins = <0x01 0x1f 0x02 0x198>; - phandle = <0x399>; - }; - - mipim1-camera3-clk { - rockchip,pins = <0x03 0x08 0x04 0x198>; - phandle = <0x39c>; - }; - - mipim0-camera1-clk { - rockchip,pins = <0x01 0x0e 0x02 0x198>; - phandle = <0x396>; - }; - - mipim1-camera0-clk { - rockchip,pins = <0x03 0x05 0x04 0x198>; - phandle = <0x39a>; - }; - - mipim1-camera4-clk { - rockchip,pins = <0x03 0x09 0x04 0x198>; - phandle = <0x39d>; - }; - - mipim0-camera2-clk { - rockchip,pins = <0x01 0x0f 0x02 0x198>; - phandle = <0x397>; - }; - - mipi-te0 { - rockchip,pins = <0x03 0x12 0x02 0x198>; - phandle = <0x39e>; - }; - - mipim1-camera1-clk { - rockchip,pins = <0x03 0x06 0x04 0x198>; - phandle = <0x180>; - }; - - mipim0-camera3-clk { - rockchip,pins = <0x01 0x1e 0x02 0x198>; - phandle = <0x398>; - }; - }; - - pwm14 { - - pwm14m2-pins { - rockchip,pins = <0x01 0x1e 0x0b 0x198>; - phandle = <0x3e1>; - }; - - pwm14m1-pins { - rockchip,pins = <0x04 0x0a 0x0b 0x198>; - phandle = <0x3e0>; - }; - - pwm14m0-pins { - rockchip,pins = <0x03 0x12 0x0b 0x198>; - phandle = <0x173>; - }; - }; - - pcfg-pull-none-drv-level-4-smt { - drive-strength = <0x04>; - bias-disable; - input-schmitt-enable; - phandle = <0x303>; - }; - - headphone { - - hp-det { - rockchip,pins = <0x02 0x13 0x00 0x198>; - phandle = <0x1dc>; - }; - }; - - npu { - - npu-pins { - rockchip,pins = <0x00 0x16 0x02 0x198>; - phandle = <0x3a0>; - }; - }; - - wireless-bluetooth { - - bt-reset-gpio { - rockchip,pins = <0x00 0x16 0x00 0x198>; - phandle = <0x1e6>; - }; - - bt-irq-gpio { - rockchip,pins = <0x00 0x00 0x00 0x198>; - phandle = <0x1e8>; - }; - - bt-wake-gpio { - rockchip,pins = <0x00 0x15 0x00 0x198>; - phandle = <0x1e7>; - }; - - uart6-gpios { - rockchip,pins = <0x01 0x02 0x00 0x198>; - phandle = <0x1e9>; - }; - }; - - pcie30x1 { - - pcie30x1-1-button-rstn { - rockchip,pins = <0x04 0x0a 0x04 0x198>; - phandle = <0x3a9>; - }; - - pcie30x1m1-pins { - rockchip,pins = <0x04 0x03 0x04 0x198 0x04 0x05 0x04 0x198 0x04 0x04 0x04 0x198 0x04 0x00 0x04 0x198 0x04 0x02 0x04 0x198 0x04 0x01 0x04 0x198>; - phandle = <0x3a6>; - }; - - pcie30x1m0-pins { - rockchip,pins = <0x00 0x10 0x0c 0x198 0x00 0x15 0x0c 0x198 0x00 0x14 0x0c 0x198 0x00 0x0d 0x0c 0x198 0x00 0x0f 0x0c 0x198 0x00 0x0e 0x0c 0x198>; - phandle = <0x3a5>; - }; - - pcie30x1-0-button-rstn { - rockchip,pins = <0x04 0x09 0x04 0x198>; - phandle = <0x3a8>; - }; - - pcie30x1m2-pins { - rockchip,pins = <0x01 0x0d 0x04 0x198 0x01 0x0c 0x04 0x198 0x01 0x0b 0x04 0x198 0x01 0x00 0x04 0x198 0x01 0x07 0x04 0x198 0x01 0x01 0x04 0x198>; - phandle = <0x3a7>; - }; - }; - - uart8 { - - uart8m0-rtsn { - rockchip,pins = <0x04 0x0a 0x0a 0x198>; - phandle = <0x443>; - }; - - uart8m1-ctsn { - rockchip,pins = <0x03 0x05 0x0a 0x198>; - phandle = <0x444>; - }; - - uart8m0-ctsn { - rockchip,pins = <0x04 0x0b 0x0a 0x198>; - phandle = <0x442>; - }; - - uart8m1-xfer { - rockchip,pins = <0x03 0x03 0x0a 0x19e 0x03 0x02 0x0a 0x19e>; - phandle = <0x167>; - }; - - uart8m0-xfer { - rockchip,pins = <0x04 0x09 0x0a 0x19e 0x04 0x08 0x0a 0x19e>; - phandle = <0x441>; - }; - - uart8-xfer { - rockchip,pins = <0x04 0x09 0x0a 0x19e>; - phandle = <0x446>; - }; - - uart8m1-rtsn { - rockchip,pins = <0x03 0x04 0x0a 0x198>; - phandle = <0x445>; - }; - }; - - spi2 { - - spi2m0-cs1 { - rockchip,pins = <0x01 0x08 0x08 0x19a>; - phandle = <0x404>; - }; - - spi2m2-cs0 { - rockchip,pins = <0x00 0x09 0x01 0x19f>; - phandle = <0x154>; - }; - - spi2m1-cs1 { - rockchip,pins = <0x04 0x08 0x08 0x19a>; - phandle = <0x407>; - }; - - spi2m2-pins { - rockchip,pins = <0x00 0x05 0x01 0x19f 0x00 0x0b 0x01 0x19f 0x00 0x06 0x01 0x19f>; - phandle = <0x155>; - }; - - spi2m1-pins { - rockchip,pins = <0x04 0x06 0x08 0x19a 0x04 0x04 0x08 0x19a 0x04 0x05 0x08 0x19a>; - phandle = <0x405>; - }; - - spi2m2-cs1 { - rockchip,pins = <0x00 0x08 0x01 0x19f>; - phandle = <0x408>; - }; - - spi2m0-cs0 { - rockchip,pins = <0x01 0x07 0x08 0x19a>; - phandle = <0x403>; - }; - - spi2m0-pins { - rockchip,pins = <0x01 0x06 0x08 0x19a 0x01 0x04 0x08 0x19a 0x01 0x05 0x08 0x19a>; - phandle = <0x402>; - }; - - spi2m1-cs0 { - rockchip,pins = <0x04 0x07 0x08 0x19a>; - phandle = <0x406>; - }; - }; - - pcfg-pull-up-drv-level-15 { - drive-strength = <0x0f>; - phandle = <0x462>; - bias-pull-up; - }; - - pcfg-pull-down-drv-level-13 { - drive-strength = <0x0d>; - bias-pull-down; - phandle = <0x469>; - }; - - pcfg-pull-up-drv-level-2 { - drive-strength = <0x02>; - phandle = <0x199>; - bias-pull-up; - }; - - i2s1 { - - i2s1m0-sdo1 { - rockchip,pins = <0x04 0x0a 0x03 0x198>; - phandle = <0x127>; - }; - - i2s1m1-sdi1 { - rockchip,pins = <0x00 0x16 0x01 0x198>; - phandle = <0x380>; - }; - - i2s1m0-sdi3 { - rockchip,pins = <0x04 0x08 0x03 0x198>; - phandle = <0x125>; - }; - - i2s1m0-mclk { - rockchip,pins = <0x04 0x00 0x03 0x19d>; - phandle = <0x37b>; - }; - - i2s1m0-sdi1 { - rockchip,pins = <0x04 0x06 0x03 0x198>; - phandle = <0x123>; - }; - - i2s1m1-sdo2 { - rockchip,pins = <0x00 0x1c 0x01 0x198>; - phandle = <0x385>; - }; - - i2s1m1-sdo0 { - rockchip,pins = <0x00 0x19 0x01 0x198>; - phandle = <0x383>; - }; - - i2s1m0-sdo2 { - rockchip,pins = <0x04 0x0b 0x03 0x198>; - phandle = <0x128>; - }; - - i2s1m1-sdi2 { - rockchip,pins = <0x00 0x17 0x01 0x198>; - phandle = <0x381>; - }; - - i2s1m0-sdo0 { - rockchip,pins = <0x04 0x09 0x03 0x198>; - phandle = <0x126>; - }; - - i2s1m1-sdi0 { - rockchip,pins = <0x00 0x15 0x01 0x198>; - phandle = <0x37f>; - }; - - i2s1m0-sdi2 { - rockchip,pins = <0x04 0x07 0x03 0x198>; - phandle = <0x124>; - }; - - i2s1m1-sclk { - rockchip,pins = <0x00 0x0e 0x01 0x19d>; - phandle = <0x37e>; - }; - - i2s1m0-sdi0 { - rockchip,pins = <0x04 0x05 0x03 0x198>; - phandle = <0x122>; - }; - - i2s1m1-sdo3 { - rockchip,pins = <0x00 0x1d 0x01 0x198>; - phandle = <0x386>; - }; - - i2s1m1-lrck { - rockchip,pins = <0x00 0x0f 0x01 0x19d>; - phandle = <0x37c>; - }; - - i2s1m0-sclk { - rockchip,pins = <0x04 0x01 0x03 0x19d>; - phandle = <0x121>; - }; - - i2s1m1-sdo1 { - rockchip,pins = <0x00 0x1a 0x01 0x198>; - phandle = <0x384>; - }; - - i2s1m0-sdo3 { - rockchip,pins = <0x04 0x0c 0x03 0x198>; - phandle = <0x129>; - }; - - i2s1m1-sdi3 { - rockchip,pins = <0x00 0x18 0x01 0x198>; - phandle = <0x382>; - }; - - i2s1m0-lrck { - rockchip,pins = <0x04 0x02 0x03 0x19d>; - phandle = <0x120>; - }; - - i2s1m1-mclk { - rockchip,pins = <0x00 0x0d 0x01 0x19d>; - phandle = <0x37d>; - }; - }; - - ddrphych2 { - - ddrphych2-pins { - rockchip,pins = <0x04 0x08 0x07 0x198 0x04 0x09 0x07 0x198 0x04 0x0a 0x07 0x198 0x04 0x0b 0x07 0x198>; - phandle = <0x31a>; - }; - }; - - pcfg-pull-none-drv-level-12 { - drive-strength = <0x0c>; - bias-disable; - phandle = <0x456>; - }; - - i2c1 { - - i2c1m2-xfer { - rockchip,pins = <0x00 0x1c 0x09 0x19d 0x00 0x1d 0x09 0x19d>; - phandle = <0x148>; - }; - - i2c1m1-xfer { - rockchip,pins = <0x00 0x08 0x02 0x19d 0x00 0x09 0x02 0x19d>; - phandle = <0x357>; - }; - - i2c1m0-xfer { - rockchip,pins = <0x00 0x0d 0x09 0x19d 0x00 0x0e 0x09 0x19d>; - phandle = <0x356>; - }; - - i2c1m4-xfer { - rockchip,pins = <0x01 0x1a 0x09 0x19d 0x01 0x1b 0x09 0x19d>; - phandle = <0x359>; - }; - - i2c1m3-xfer { - rockchip,pins = <0x02 0x1c 0x09 0x19d 0x02 0x1d 0x09 0x19d>; - phandle = <0x358>; - }; - }; - - pwm7 { - - pwm7m3-pins { - rockchip,pins = <0x04 0x16 0x0b 0x198>; - phandle = <0x3d3>; - }; - - pwm7m2-pins { - rockchip,pins = <0x01 0x13 0x0b 0x198>; - phandle = <0x3d2>; - }; - - pwm7m1-pins { - rockchip,pins = <0x04 0x1c 0x0b 0x198>; - phandle = <0x3d1>; - }; - - pwm7m0-pins { - rockchip,pins = <0x00 0x18 0x0b 0x198>; - phandle = <0x16c>; - }; - }; - - pcfg-pull-none-drv-level-5 { - drive-strength = <0x05>; - bias-disable; - phandle = <0x2f1>; - }; - - gmac0 { - - gmac0-clkinout { - rockchip,pins = <0x04 0x13 0x01 0x198>; - phandle = <0x46d>; - }; - - gmac0-miim { - rockchip,pins = <0x04 0x14 0x01 0x198 0x04 0x15 0x01 0x198>; - phandle = <0x1c1>; - }; - - gmac0-tx-bus2 { - rockchip,pins = <0x02 0x0e 0x01 0x19a 0x02 0x0f 0x01 0x19a 0x02 0x10 0x01 0x198>; - phandle = <0x1c2>; - }; - - gmac0-rgmii-bus { - rockchip,pins = <0x02 0x06 0x01 0x198 0x02 0x07 0x01 0x198 0x02 0x09 0x01 0x19a 0x02 0x0a 0x01 0x19a>; - phandle = <0x1c5>; - }; - - gmac0-ppsclk { - rockchip,pins = <0x02 0x14 0x01 0x198>; - phandle = <0x46e>; - }; - - gmac0-txer { - rockchip,pins = <0x04 0x16 0x01 0x198>; - phandle = <0x471>; - }; - - gmac0-ptp-refclk { - rockchip,pins = <0x02 0x0c 0x01 0x198>; - phandle = <0x470>; - }; - - gmac0-rx-bus2 { - rockchip,pins = <0x02 0x11 0x01 0x198 0x02 0x12 0x01 0x198 0x04 0x12 0x01 0x198>; - phandle = <0x1c3>; - }; - - gmac0-rgmii-clk { - rockchip,pins = <0x02 0x08 0x01 0x198 0x02 0x0b 0x01 0x198>; - phandle = <0x1c4>; - }; - - gmac0-ppstring { - rockchip,pins = <0x02 0x0d 0x01 0x198>; - phandle = <0x46f>; - }; - }; - - pwm12 { - - pwm12m1-pins { - rockchip,pins = <0x04 0x0d 0x0b 0x198>; - phandle = <0x3dd>; - }; - - pwm12m0-pins { - rockchip,pins = <0x03 0x0d 0x0b 0x198>; - phandle = <0x171>; - }; - }; - - usb-typec { - - usbc0-int { - rockchip,pins = <0x00 0x1b 0x00 0x198>; - phandle = <0x17b>; - }; - - usb-5v-ctrl { - rockchip,pins = <0x01 0x03 0x00 0x198>; - phandle = <0x1ef>; - }; - }; - - uart6 { - - uart6m1-ctsn { - rockchip,pins = <0x01 0x03 0x0a 0x198>; - phandle = <0x436>; - }; - - uart6m2-xfer { - rockchip,pins = <0x01 0x19 0x0a 0x19e 0x01 0x18 0x0a 0x19e>; - phandle = <0x437>; - }; - - uart6m0-ctsn { - rockchip,pins = <0x02 0x09 0x0a 0x198>; - phandle = <0x439>; - }; - - uart6m1-xfer { - rockchip,pins = <0x01 0x00 0x0a 0x19e 0x01 0x01 0x0a 0x19e>; - phandle = <0x165>; - }; - - uart6m0-xfer { - rockchip,pins = <0x02 0x06 0x0a 0x19e 0x02 0x07 0x0a 0x19e>; - phandle = <0x438>; - }; - - uart6m1-rtsn { - rockchip,pins = <0x01 0x02 0x0a 0x198>; - phandle = <0x1e5>; - }; - - uart6m0-rtsn { - rockchip,pins = <0x02 0x08 0x0a 0x198>; - phandle = <0x43a>; - }; - }; - - pcfg-pull-down-drv-level-8 { - drive-strength = <0x08>; - bias-pull-down; - phandle = <0x464>; - }; - - gpu { - - gpu-pins { - rockchip,pins = <0x00 0x15 0x02 0x198>; - phandle = <0x333>; - }; - }; - - spi0 { - - spi0m2-cs1 { - rockchip,pins = <0x01 0x0d 0x08 0x19a>; - phandle = <0x3f8>; - }; - - spi0m0-cs0 { - rockchip,pins = <0x00 0x19 0x08 0x19a>; - phandle = <0x14e>; - }; - - spi0m3-pins { - rockchip,pins = <0x03 0x1b 0x08 0x19a 0x03 0x19 0x08 0x19a 0x03 0x1a 0x08 0x19a>; - phandle = <0x3f9>; - }; - - spi0m3-cs1 { - rockchip,pins = <0x03 0x1d 0x08 0x19a>; - phandle = <0x3fb>; - }; - - spi0m2-pins { - rockchip,pins = <0x01 0x0b 0x08 0x19a 0x01 0x09 0x08 0x19a 0x01 0x0a 0x08 0x19a>; - phandle = <0x3f6>; - }; - - spi0m1-cs0 { - rockchip,pins = <0x04 0x0a 0x08 0x19a>; - phandle = <0x3f4>; - }; - - spi0m1-pins { - rockchip,pins = <0x04 0x02 0x08 0x19a 0x04 0x00 0x08 0x19a 0x04 0x01 0x08 0x19a>; - phandle = <0x3f3>; - }; - - spi0m0-cs1 { - rockchip,pins = <0x00 0x0f 0x08 0x19a>; - phandle = <0x14f>; - }; - - spi0m2-cs0 { - rockchip,pins = <0x01 0x0c 0x08 0x19a>; - phandle = <0x3f7>; - }; - - spi0m0-pins { - rockchip,pins = <0x00 0x16 0x08 0x19a 0x00 0x17 0x08 0x19a 0x00 0x10 0x08 0x19a>; - phandle = <0x150>; - }; - - spi0m1-cs1 { - rockchip,pins = <0x04 0x09 0x08 0x19a>; - phandle = <0x3f5>; - }; - - spi0m3-cs0 { - rockchip,pins = <0x03 0x1c 0x08 0x19a>; - phandle = <0x3fa>; - }; - }; - - fspi { - - fspim0-cs1 { - rockchip,pins = <0x02 0x1f 0x02 0x199>; - phandle = <0x329>; - }; - - fspim1-pins { - rockchip,pins = <0x02 0x0b 0x03 0x199 0x02 0x0c 0x03 0x199 0x02 0x06 0x03 0x199 0x02 0x07 0x03 0x199 0x02 0x08 0x03 0x199 0x02 0x09 0x03 0x199>; - phandle = <0x32c>; - }; - - fspim0-pins { - rockchip,pins = <0x02 0x00 0x02 0x199 0x02 0x1e 0x02 0x199 0x02 0x18 0x02 0x199 0x02 0x19 0x02 0x199 0x02 0x1a 0x02 0x199 0x02 0x1b 0x02 0x199>; - phandle = <0x328>; - }; - - fspim1-cs1 { - rockchip,pins = <0x02 0x0d 0x03 0x199>; - phandle = <0x32d>; - }; - - fspim2-cs1 { - rockchip,pins = <0x03 0x15 0x02 0x199>; - phandle = <0x32b>; - }; - - fspim2-pins { - rockchip,pins = <0x03 0x05 0x05 0x199 0x03 0x14 0x02 0x199 0x03 0x00 0x05 0x199 0x03 0x01 0x05 0x199 0x03 0x02 0x05 0x199 0x03 0x03 0x05 0x199>; - phandle = <0x32a>; - }; - }; - - pcfg-pull-up-drv-level-13 { - drive-strength = <0x0d>; - phandle = <0x460>; - bias-pull-up; - }; - - clk32k { - - clk32k-out0 { - rockchip,pins = <0x00 0x0a 0x02 0x198>; - phandle = <0x315>; - }; - - clk32k-in { - rockchip,pins = <0x00 0x0a 0x01 0x198>; - phandle = <0x314>; - }; - - clk32k-out1 { - rockchip,pins = <0x02 0x15 0x01 0x198>; - phandle = <0x316>; - }; - }; - - pcfg-pull-down-drv-level-11 { - drive-strength = <0x0b>; - bias-pull-down; - phandle = <0x467>; - }; - - pcie30phy { - - pcie30phy-pins { - rockchip,pins = <0x01 0x14 0x04 0x198 0x01 0x19 0x04 0x198>; - phandle = <0x3a4>; - }; - }; - - pcfg-pull-up-drv-level-0 { - drive-strength = <0x00>; - phandle = <0x2f3>; - bias-pull-up; - }; - - ddrphych0 { - - ddrphych0-pins { - rockchip,pins = <0x04 0x00 0x07 0x198 0x04 0x01 0x07 0x198 0x04 0x02 0x07 0x198 0x04 0x03 0x07 0x198>; - phandle = <0x318>; - }; - }; - - pcfg-pull-none-drv-level-10 { - drive-strength = <0x0a>; - bias-disable; - phandle = <0x454>; - }; - - pwm5 { - - pwm5m2-pins { - rockchip,pins = <0x04 0x14 0x0b 0x198>; - phandle = <0x3ce>; - }; - - pwm5m1-pins { - rockchip,pins = <0x00 0x16 0x0b 0x198>; - phandle = <0x16a>; - }; - - pwm5m0-pins { - rockchip,pins = <0x00 0x09 0x03 0x198>; - phandle = <0x3cd>; - }; - }; - - pcfg-pull-none-drv-level-3 { - drive-strength = <0x03>; - bias-disable; - phandle = <0x2ef>; - }; - - pwm10 { - - pwm10m2-pins { - rockchip,pins = <0x03 0x1b 0x0b 0x198>; - phandle = <0x3d9>; - }; - - pwm10m1-pins { - rockchip,pins = <0x04 0x1b 0x0b 0x198>; - phandle = <0x3d8>; - }; - - pwm10m0-pins { - rockchip,pins = <0x03 0x00 0x0b 0x198>; - phandle = <0x16f>; - }; - }; - - pcfg-pull-down-smt { - input-schmitt-enable; - bias-pull-down; - phandle = <0x2ff>; - }; - - gpio@fec50000 { - gpio-controller; - interrupts = <0x00 0x119 0x04>; - clocks = <0x02 0x83 0x02 0x84>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfec50000 0x00 0x100>; - phandle = <0x10d>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x80 0x20>; - interrupt-controller; - }; - - pcfg-pull-down { - bias-pull-down; - phandle = <0x2ec>; - }; - - uart4 { - - uart4m2-xfer { - rockchip,pins = <0x01 0x0a 0x0a 0x19e 0x01 0x0b 0x0a 0x19e>; - phandle = <0x42d>; - }; - - uart4-ctsn { - rockchip,pins = <0x01 0x17 0x0a 0x198>; - phandle = <0x42e>; - }; - - uart4m1-xfer { - rockchip,pins = <0x03 0x18 0x0a 0x19e 0x03 0x19 0x0a 0x19e>; - phandle = <0x163>; - }; - - uart4m0-xfer { - rockchip,pins = <0x01 0x1b 0x0a 0x19e 0x01 0x1a 0x0a 0x19e>; - phandle = <0x42c>; - }; - - uart4-rtsn { - rockchip,pins = <0x01 0x15 0x0a 0x198>; - phandle = <0x42f>; - }; - }; - - spdif0 { - - spdif0m0-tx { - rockchip,pins = <0x01 0x0e 0x03 0x198>; - phandle = <0x142>; - }; - - spdif0m1-tx { - rockchip,pins = <0x04 0x0c 0x06 0x198>; - phandle = <0x3f0>; - }; - }; - - pcfg-pull-down-drv-level-6 { - drive-strength = <0x06>; - bias-pull-down; - phandle = <0x2fd>; - }; - - pcfg-pull-up-drv-level-9 { - drive-strength = <0x09>; - phandle = <0x45c>; - bias-pull-up; - }; - - pcfg-pull-none-drv-level-1-smt { - drive-strength = <0x01>; - bias-disable; - input-schmitt-enable; - phandle = <0x19c>; - }; - - pcfg-pull-up-drv-level-11 { - drive-strength = <0x0b>; - phandle = <0x45e>; - bias-pull-up; - }; - - mcu { - - mcum1-pins { - rockchip,pins = <0x03 0x1c 0x06 0x198 0x03 0x1d 0x06 0x198>; - phandle = <0x394>; - }; - - mcum0-pins { - rockchip,pins = <0x04 0x1c 0x05 0x198 0x04 0x1d 0x05 0x198>; - phandle = <0x393>; - }; - }; - - i2c8 { - - i2c8m4-xfer { - rockchip,pins = <0x03 0x12 0x09 0x19d 0x03 0x13 0x09 0x19d>; - phandle = <0x373>; - }; - - i2c8m3-xfer { - rockchip,pins = <0x04 0x10 0x09 0x19d 0x04 0x11 0x09 0x19d>; - phandle = <0x372>; - }; - - i2c8m2-xfer { - rockchip,pins = <0x01 0x1e 0x09 0x19d 0x01 0x1f 0x09 0x19d>; - phandle = <0x371>; - }; - - i2c8m1-xfer { - rockchip,pins = <0x02 0x08 0x09 0x19d 0x02 0x09 0x09 0x19d>; - phandle = <0x374>; - }; - - i2c8m0-xfer { - rockchip,pins = <0x04 0x1a 0x09 0x19d 0x04 0x1b 0x09 0x19d>; - phandle = <0x186>; - }; - }; - - dp0 { - - dp0m0-pins { - rockchip,pins = <0x04 0x0c 0x05 0x198>; - phandle = <0x31c>; - }; - - dp0m2-pins { - rockchip,pins = <0x01 0x00 0x05 0x198>; - phandle = <0x31e>; - }; - - dp0m1-pins { - rockchip,pins = <0x00 0x14 0x0a 0x198>; - phandle = <0x31d>; - }; - }; - - pcfg-pull-none-drv-level-5-smt { - drive-strength = <0x05>; - bias-disable; - input-schmitt-enable; - phandle = <0x19b>; - }; - - pwm3 { - - pwm3m2-pins { - rockchip,pins = <0x01 0x12 0x0b 0x198>; - phandle = <0x3ca>; - }; - - pwm3m1-pins { - rockchip,pins = <0x03 0x0a 0x0b 0x198>; - phandle = <0x3c9>; - }; - - pwm3m0-pins { - rockchip,pins = <0x00 0x1c 0x03 0x198>; - phandle = <0x81>; - }; - - pwm3m3-pins { - rockchip,pins = <0x01 0x07 0x0b 0x198>; - phandle = <0x3cb>; - }; - }; - - pcfg-pull-none-drv-level-1 { - drive-strength = <0x01>; - bias-disable; - phandle = <0x2ee>; - }; - - sata2 { - - sata2m1-pins { - rockchip,pins = <0x01 0x0f 0x06 0x198>; - phandle = <0x3ed>; - }; - - sata2m0-pins { - rockchip,pins = <0x04 0x09 0x06 0x198>; - phandle = <0x3ec>; - }; - }; - - cam { - - cam0-or-cam1-switch-pin { - rockchip,pins = <0x03 0x11 0x00 0x198>; - phandle = <0x1f0>; - }; - }; - - uart2 { - - uart2-rtsn { - rockchip,pins = <0x03 0x0b 0x0a 0x198>; - phandle = <0x427>; - }; - - uart2m1-xfer { - rockchip,pins = <0x04 0x19 0x0a 0x19e 0x04 0x18 0x0a 0x19e>; - phandle = <0x161>; - }; - - uart2m0-xfer { - rockchip,pins = <0x00 0x0e 0x0a 0x19e 0x00 0x0d 0x0a 0x19e>; - phandle = <0x1ce>; - }; - - uart2-ctsn { - rockchip,pins = <0x03 0x0c 0x0a 0x198>; - phandle = <0x426>; - }; - - uart2m2-xfer { - rockchip,pins = <0x03 0x0a 0x0a 0x19e 0x03 0x09 0x0a 0x19e>; - phandle = <0x425>; - }; - }; - - pcfg-pull-down-drv-level-4 { - drive-strength = <0x04>; - bias-pull-down; - phandle = <0x2fb>; - }; - - pcfg-pull-up-drv-level-7 { - drive-strength = <0x07>; - phandle = <0x45a>; - bias-pull-up; - }; - - i2c6 { - - i2c6m4-xfer { - rockchip,pins = <0x03 0x01 0x09 0x19d 0x03 0x00 0x09 0x19d>; - phandle = <0x36c>; - }; - - i2c6m3-xfer { - rockchip,pins = <0x04 0x09 0x09 0x19d 0x04 0x08 0x09 0x19d>; - phandle = <0x36b>; - }; - - i2c6m2-xfer { - rockchip,pins = <0x02 0x13 0x09 0x19d 0x02 0x12 0x09 0x19d>; - phandle = <0x36d>; - }; - - i2c6m1-xfer { - rockchip,pins = <0x01 0x13 0x09 0x19d 0x01 0x12 0x09 0x19d>; - phandle = <0x36a>; - }; - - i2c6m0-xfer { - rockchip,pins = <0x00 0x18 0x09 0x19d 0x00 0x17 0x09 0x19d>; - phandle = <0x178>; - }; - }; - - pdm1 { - - pdm1m1-sdi3 { - rockchip,pins = <0x01 0x0a 0x02 0x198>; - phandle = <0x3c1>; - }; - - pdm1m0-clk { - rockchip,pins = <0x04 0x1d 0x02 0x198>; - phandle = <0x140>; - }; - - pdm1m1-sdi1 { - rockchip,pins = <0x01 0x08 0x02 0x198>; - phandle = <0x3bf>; - }; - - pdm1m0-sdi3 { - rockchip,pins = <0x04 0x18 0x02 0x198>; - phandle = <0x13e>; - }; - - pdm1m0-sdi1 { - rockchip,pins = <0x04 0x1a 0x02 0x198>; - phandle = <0x13c>; - }; - - pdm1m1-clk { - rockchip,pins = <0x01 0x0c 0x02 0x198>; - phandle = <0x3bb>; - }; - - pdm1m1-clk1 { - rockchip,pins = <0x01 0x0b 0x02 0x198>; - phandle = <0x3bc>; - }; - - pdm1m1-idle { - rockchip,pins = <0x01 0x0c 0x00 0x198 0x01 0x0b 0x00 0x198>; - phandle = <0x3bd>; - }; - - pdm1m0-clk1 { - rockchip,pins = <0x04 0x1c 0x02 0x198>; - phandle = <0x141>; - }; - - pdm1m1-sdi2 { - rockchip,pins = <0x01 0x09 0x02 0x198>; - phandle = <0x3c0>; - }; - - pdm1m0-idle { - rockchip,pins = <0x04 0x1d 0x00 0x198 0x04 0x1c 0x00 0x198>; - phandle = <0x13f>; - }; - - pdm1m1-sdi0 { - rockchip,pins = <0x01 0x07 0x02 0x198>; - phandle = <0x3be>; - }; - - pdm1m0-sdi2 { - rockchip,pins = <0x04 0x19 0x02 0x198>; - phandle = <0x13d>; - }; - - pdm1m0-sdi0 { - rockchip,pins = <0x04 0x1b 0x02 0x198>; - phandle = <0x13b>; - }; - }; - - cpu { - - cpu-pins { - rockchip,pins = <0x00 0x19 0x02 0x198 0x00 0x1d 0x02 0x198>; - phandle = <0x317>; - }; - }; - - gpio-func { - - tsadc-gpio-func { - rockchip,pins = <0x00 0x01 0x00 0x198>; - phandle = <0x175>; - }; - }; - - pcie20x1 { - - pcie20x1-2-button-rstn { - rockchip,pins = <0x04 0x0b 0x04 0x198>; - phandle = <0x3a3>; - }; - - pcie20x1m1-pins { - rockchip,pins = <0x04 0x0f 0x04 0x198 0x04 0x11 0x04 0x198 0x04 0x10 0x04 0x198>; - phandle = <0x3a2>; - }; - - pcie20x1m0-pins { - rockchip,pins = <0x03 0x17 0x04 0x198 0x03 0x19 0x04 0x198 0x03 0x18 0x04 0x198>; - phandle = <0x3a1>; - }; - }; - - leds { - - leds-gpio { - rockchip,pins = <0x00 0x15 0x00 0x198>; - phandle = <0x1ee>; - }; - }; - - pwm1 { - - pwm1m1-pins { - rockchip,pins = <0x01 0x1b 0x0b 0x198>; - phandle = <0x3c5>; - }; - - pwm1m0-pins { - rockchip,pins = <0x00 0x10 0x03 0x198>; - phandle = <0x7f>; - }; - - pwm1m2-pins { - rockchip,pins = <0x01 0x03 0x0b 0x198>; - phandle = <0x3c6>; - }; - }; - - sata0 { - - sata0m1-pins { - rockchip,pins = <0x01 0x0b 0x06 0x198>; - phandle = <0x3e9>; - }; - - sata0m0-pins { - rockchip,pins = <0x04 0x0e 0x06 0x198>; - phandle = <0x3e8>; - }; - }; - - refclk { - - refclk-pins { - rockchip,pins = <0x00 0x00 0x01 0x198>; - phandle = <0x3e5>; - }; - }; - - pcie30x4 { - - pcie30x4m2-pins { - rockchip,pins = <0x03 0x14 0x04 0x198 0x03 0x16 0x04 0x198 0x03 0x15 0x04 0x198>; - phandle = <0x3b1>; - }; - - pcie30x4m1-pins { - rockchip,pins = <0x04 0x0c 0x04 0x198 0x04 0x0e 0x04 0x198 0x04 0x0d 0x04 0x198>; - phandle = <0x3b0>; - }; - - pcie30x4-button-rstn { - rockchip,pins = <0x03 0x1d 0x04 0x198>; - phandle = <0x3b3>; - }; - - pcie30x4m0-pins { - rockchip,pins = <0x00 0x16 0x0c 0x198 0x00 0x18 0x0c 0x198 0x00 0x17 0x0c 0x198>; - phandle = <0x3af>; - }; - - pcie30x4m3-pins { - rockchip,pins = <0x01 0x08 0x04 0x198 0x01 0x0a 0x04 0x198 0x01 0x09 0x04 0x198>; - phandle = <0x3b2>; - }; - }; - - can2 { - - can2m1-pins { - rockchip,pins = <0x00 0x1c 0x0a 0x198 0x00 0x1d 0x0a 0x198>; - phandle = <0x30f>; - }; - - can2m0-pins { - rockchip,pins = <0x03 0x14 0x09 0x198 0x03 0x15 0x09 0x198>; - phandle = <0x147>; - }; - }; - - litcpu { - - litcpu-pins { - rockchip,pins = <0x00 0x1b 0x01 0x198>; - phandle = <0x392>; - }; - }; - - sata { - - sata-reset { - rockchip,pins = <0x04 0x11 0x00 0x198>; - phandle = <0x3e7>; - }; - - sata-pins { - rockchip,pins = <0x00 0x16 0x0d 0x198 0x00 0x1c 0x0d 0x198 0x00 0x1d 0x0d 0x198>; - phandle = <0x3e6>; - }; - }; - - tsadc { - - tsadc-shut { - rockchip,pins = <0x00 0x01 0x02 0x198>; - phandle = <0x176>; - }; - - tsadc-shut-org { - rockchip,pins = <0x00 0x01 0x01 0x198>; - phandle = <0x418>; - }; - - tsadcm1-shut { - rockchip,pins = <0x00 0x02 0x02 0x198>; - phandle = <0x417>; - }; - }; - - uart0 { - - uart0m1-xfer { - rockchip,pins = <0x00 0x08 0x04 0x19e 0x00 0x09 0x04 0x19e>; - phandle = <0x7d>; - }; - - uart0m0-xfer { - rockchip,pins = <0x00 0x14 0x04 0x19e 0x00 0x15 0x04 0x19e>; - phandle = <0x419>; - }; - - uart0-rtsn { - rockchip,pins = <0x00 0x16 0x04 0x198>; - phandle = <0x41c>; - }; - - uart0-ctsn { - rockchip,pins = <0x00 0x19 0x04 0x198>; - phandle = <0x41b>; - }; - - uart0m2-xfer { - rockchip,pins = <0x04 0x04 0x0a 0x19e 0x04 0x03 0x0a 0x19e>; - phandle = <0x41a>; - }; - }; - - pcfg-pull-down-drv-level-2 { - drive-strength = <0x02>; - bias-pull-down; - phandle = <0x2f9>; - }; - - pcfg-pull-up-drv-level-5 { - drive-strength = <0x05>; - phandle = <0x2f6>; - bias-pull-up; - }; - - gpio@fec20000 { - gpio-controller; - interrupts = <0x00 0x116 0x04>; - clocks = <0x02 0x7d 0x02 0x7e>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfec20000 0x00 0x100>; - phandle = <0xfe>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x20 0x20>; - interrupt-controller; - }; - - pcfg-pull-none-drv-level-15 { - drive-strength = <0x0f>; - bias-disable; - phandle = <0x459>; - }; - - eth1 { - - eth1-pins { - rockchip,pins = <0x03 0x06 0x01 0x198>; - phandle = <0x327>; - }; - }; - - i2c4 { - - i2c4m3-xfer { - rockchip,pins = <0x01 0x03 0x09 0x19d 0x01 0x02 0x09 0x19d>; - phandle = <0x364>; - }; - - i2c4m2-xfer { - rockchip,pins = <0x00 0x15 0x09 0x19d 0x00 0x14 0x09 0x19d>; - phandle = <0x363>; - }; - - i2c4m1-xfer { - rockchip,pins = <0x02 0x0d 0x09 0x19d 0x02 0x0c 0x09 0x19d>; - phandle = <0x14b>; - }; - - i2c4m0-xfer { - rockchip,pins = <0x03 0x06 0x09 0x19d 0x03 0x05 0x09 0x19d>; - phandle = <0x362>; - }; - - i2c4m4-xfer { - rockchip,pins = <0x01 0x17 0x09 0x19d 0x01 0x16 0x09 0x19d>; - phandle = <0x365>; - }; - }; - - emmc { - - emmc-data-strobe { - rockchip,pins = <0x02 0x02 0x01 0x198>; - phandle = <0x326>; - }; - - emmc-clk { - rockchip,pins = <0x02 0x01 0x01 0x199>; - phandle = <0x324>; - }; - - emmc-bus8 { - rockchip,pins = <0x02 0x18 0x01 0x199 0x02 0x19 0x01 0x199 0x02 0x1a 0x01 0x199 0x02 0x1b 0x01 0x199 0x02 0x1c 0x01 0x199 0x02 0x1d 0x01 0x199 0x02 0x1e 0x01 0x199 0x02 0x1f 0x01 0x199>; - phandle = <0x323>; - }; - - emmc-cmd { - rockchip,pins = <0x02 0x00 0x01 0x199>; - phandle = <0x325>; - }; - - emmc-rstnout { - rockchip,pins = <0x02 0x03 0x01 0x198>; - phandle = <0x322>; - }; - }; - - pcfg-pull-none-drv-level-8 { - drive-strength = <0x08>; - bias-disable; - phandle = <0x452>; - }; - - pwm15 { - - pwm15m0-pins { - rockchip,pins = <0x03 0x13 0x0b 0x198>; - phandle = <0x174>; - }; - - pwm15m3-pins { - rockchip,pins = <0x01 0x1f 0x0b 0x198>; - phandle = <0x3e4>; - }; - - pwm15m2-pins { - rockchip,pins = <0x01 0x16 0x0b 0x198>; - phandle = <0x3e3>; - }; - - pwm15m1-pins { - rockchip,pins = <0x04 0x0b 0x0b 0x198>; - phandle = <0x3e2>; - }; - }; - - pcie30x2 { - - pcie30x2m2-pins { - rockchip,pins = <0x03 0x1a 0x04 0x198 0x03 0x1c 0x04 0x198 0x03 0x1b 0x04 0x198>; - phandle = <0x3ac>; - }; - - pcie30x2m1-pins { - rockchip,pins = <0x04 0x06 0x04 0x198 0x04 0x08 0x04 0x198 0x04 0x07 0x04 0x198>; - phandle = <0x3ab>; - }; - - pcie30x2-button-rstn { - rockchip,pins = <0x03 0x11 0x04 0x198>; - phandle = <0x3ae>; - }; - - pcie30x2m0-pins { - rockchip,pins = <0x00 0x19 0x0c 0x198 0x00 0x1c 0x0c 0x198 0x00 0x1a 0x0c 0x198>; - phandle = <0x3aa>; - }; - - pcie30x2m3-pins { - rockchip,pins = <0x01 0x1f 0x04 0x198 0x01 0x0f 0x04 0x198 0x01 0x0e 0x04 0x198>; - phandle = <0x3ad>; - }; - }; - - can0 { - - can0m0-pins { - rockchip,pins = <0x00 0x10 0x0b 0x198 0x00 0x0f 0x0b 0x198>; - phandle = <0x145>; - }; - - can0m1-pins { - rockchip,pins = <0x04 0x1d 0x09 0x198 0x04 0x1c 0x09 0x198>; - phandle = <0x30d>; - }; - }; - - pcfg-output-high { - output-high; - phandle = <0x305>; - }; - - uart9 { - - uart9m0-rtsn { - rockchip,pins = <0x04 0x14 0x0a 0x198>; - phandle = <0x44e>; - }; - - uart9m2-ctsn { - rockchip,pins = <0x03 0x1b 0x0a 0x198>; - phandle = <0x44a>; - }; - - uart9m1-ctsn { - rockchip,pins = <0x04 0x01 0x0a 0x198>; - phandle = <0x447>; - }; - - uart9m2-xfer { - rockchip,pins = <0x03 0x1c 0x0a 0x19e 0x03 0x1d 0x0a 0x19e>; - phandle = <0x449>; - }; - - uart9m0-ctsn { - rockchip,pins = <0x04 0x15 0x0a 0x198>; - phandle = <0x44d>; - }; - - uart9m1-xfer { - rockchip,pins = <0x04 0x0d 0x0a 0x19e 0x04 0x0c 0x0a 0x19e>; - phandle = <0x168>; - }; - - uart9m0-xfer { - rockchip,pins = <0x02 0x14 0x0a 0x19e 0x02 0x12 0x0a 0x19e>; - phandle = <0x44c>; - }; - - uart9m2-rtsn { - rockchip,pins = <0x03 0x1a 0x0a 0x198>; - phandle = <0x44b>; - }; - - uart9m1-rtsn { - rockchip,pins = <0x04 0x00 0x0a 0x198>; - phandle = <0x448>; - }; - }; - - pcfg-pull-none-drv-level-2-smt { - drive-strength = <0x02>; - bias-disable; - input-schmitt-enable; - phandle = <0x301>; - }; - - pcfg-pull-up { - phandle = <0x19e>; - bias-pull-up; - }; - - spi3 { - - spi3m3-cs1 { - rockchip,pins = <0x03 0x15 0x08 0x19a>; - phandle = <0x40e>; - }; - - spi3m1-cs0 { - rockchip,pins = <0x04 0x10 0x08 0x19a>; - phandle = <0x15d>; - }; - - spi3m3-pins { - rockchip,pins = <0x03 0x18 0x08 0x19a 0x03 0x16 0x08 0x19a 0x03 0x17 0x08 0x19a>; - phandle = <0x40c>; - }; - - spi3m0-cs1 { - rockchip,pins = <0x04 0x13 0x08 0x19f>; - phandle = <0x411>; - }; - - spi3m2-cs0 { - rockchip,pins = <0x00 0x1c 0x08 0x19a>; - phandle = <0x40a>; - }; - - spi3m2-pins { - rockchip,pins = <0x00 0x1b 0x08 0x19a 0x00 0x18 0x08 0x19a 0x00 0x1a 0x08 0x19a>; - phandle = <0x409>; - }; - - spi3m1-cs1 { - rockchip,pins = <0x04 0x11 0x08 0x19a>; - phandle = <0x15e>; - }; - - spi3m1-pins { - rockchip,pins = <0x04 0x0f 0x08 0x19a 0x04 0x0d 0x08 0x19a 0x04 0x0e 0x08 0x19a>; - phandle = <0x15f>; - }; - - spi3m3-cs0 { - rockchip,pins = <0x03 0x14 0x08 0x19a>; - phandle = <0x40d>; - }; - - spi3m0-pins { - rockchip,pins = <0x04 0x16 0x08 0x19f 0x04 0x14 0x08 0x19f 0x04 0x15 0x08 0x19f>; - phandle = <0x40f>; - }; - - spi3m2-cs1 { - rockchip,pins = <0x00 0x1d 0x08 0x19a>; - phandle = <0x40b>; - }; - - spi3m0-cs0 { - rockchip,pins = <0x04 0x12 0x08 0x19f>; - phandle = <0x410>; - }; - }; - - pcfg-pull-down-drv-level-14 { - drive-strength = <0x0e>; - bias-pull-down; - phandle = <0x46a>; - }; - - bt656 { - - bt656-pins { - rockchip,pins = <0x04 0x08 0x02 0x1a0 0x04 0x00 0x02 0x1a0 0x04 0x01 0x02 0x1a0 0x04 0x02 0x02 0x1a0 0x04 0x03 0x02 0x1a0 0x04 0x04 0x02 0x1a0 0x04 0x05 0x02 0x1a0 0x04 0x06 0x02 0x1a0 0x04 0x07 0x02 0x1a0>; - phandle = <0x450>; - }; - }; - - pcfg-pull-down-drv-level-0 { - drive-strength = <0x00>; - bias-pull-down; - phandle = <0x2f7>; - }; - - pcfg-pull-up-drv-level-3 { - drive-strength = <0x03>; - phandle = <0x2f4>; - bias-pull-up; - }; - - i2s2 { - - i2s2m0-lrck { - rockchip,pins = <0x02 0x10 0x02 0x19d>; - phandle = <0x389>; - }; - - i2s2m1-mclk { - rockchip,pins = <0x03 0x0c 0x03 0x19d>; - phandle = <0x387>; - }; - - i2s2m0-mclk { - rockchip,pins = <0x02 0x0e 0x02 0x19d>; - phandle = <0x38a>; - }; - - i2s2m1-sdo { - rockchip,pins = <0x03 0x0b 0x03 0x198>; - phandle = <0x12b>; - }; - - i2s2m0-sdi { - rockchip,pins = <0x02 0x13 0x02 0x198>; - phandle = <0x38c>; - }; - - i2s2m1-idle { - rockchip,pins = <0x03 0x0e 0x00 0x198 0x03 0x0d 0x00 0x198>; - phandle = <0x12c>; - }; - - i2s2m1-sdi { - rockchip,pins = <0x03 0x0a 0x03 0x198>; - phandle = <0x12a>; - }; - - i2s2m0-idle { - rockchip,pins = <0x02 0x10 0x00 0x198 0x02 0x0f 0x00 0x198>; - phandle = <0x388>; - }; - - i2s2m1-sclk { - rockchip,pins = <0x03 0x0d 0x03 0x19d>; - phandle = <0x12e>; - }; - - i2s2m1-lrck { - rockchip,pins = <0x03 0x0e 0x03 0x19d>; - phandle = <0x12d>; - }; - - i2s2m0-sclk { - rockchip,pins = <0x02 0x0f 0x02 0x19d>; - phandle = <0x38b>; - }; - - i2s2m0-sdo { - rockchip,pins = <0x04 0x13 0x02 0x198>; - phandle = <0x38d>; - }; - }; - - pcfg-pull-none-drv-level-6-smt { - drive-strength = <0x06>; - bias-disable; - input-schmitt-enable; - phandle = <0x304>; - }; - - ddrphych3 { - - ddrphych3-pins { - rockchip,pins = <0x04 0x0c 0x07 0x198 0x04 0x0d 0x07 0x198 0x04 0x0e 0x07 0x198 0x04 0x0f 0x07 0x198>; - phandle = <0x31b>; - }; - }; - - pcfg-pull-none-drv-level-13 { - drive-strength = <0x0d>; - bias-disable; - phandle = <0x457>; - }; - - i2c2 { - - i2c2m2-xfer { - rockchip,pins = <0x02 0x03 0x09 0x19d 0x02 0x02 0x09 0x19d>; - phandle = <0x35a>; - }; - - i2c2m1-xfer { - rockchip,pins = <0x02 0x11 0x09 0x19d 0x02 0x10 0x09 0x19d>; - phandle = <0x35d>; - }; - - i2c2m0-xfer { - rockchip,pins = <0x00 0x0f 0x09 0x19d 0x00 0x10 0x09 0x19d>; - phandle = <0x149>; - }; - - i2c2m4-xfer { - rockchip,pins = <0x01 0x01 0x09 0x19d 0x01 0x00 0x09 0x19d>; - phandle = <0x35c>; - }; - - i2c2m3-xfer { - rockchip,pins = <0x01 0x15 0x09 0x19d 0x01 0x14 0x09 0x19d>; - phandle = <0x35b>; - }; - }; - - auddsm { - - auddsm-pins { - rockchip,pins = <0x03 0x01 0x04 0x198 0x03 0x02 0x04 0x198 0x03 0x03 0x04 0x198 0x03 0x04 0x04 0x198>; - phandle = <0x144>; - }; - }; - - pwm8 { - - pwm8m2-pins { - rockchip,pins = <0x03 0x18 0x0b 0x198>; - phandle = <0x3d5>; - }; - - pwm8m1-pins { - rockchip,pins = <0x04 0x18 0x0b 0x198>; - phandle = <0x3d4>; - }; - - pwm8m0-pins { - rockchip,pins = <0x03 0x07 0x0b 0x198>; - phandle = <0x16d>; - }; - }; - - pmic { - - pmic-pins { - rockchip,pins = <0x00 0x07 0x00 0x19e 0x00 0x02 0x01 0x198 0x00 0x03 0x01 0x198 0x00 0x11 0x01 0x198 0x00 0x12 0x01 0x198 0x00 0x13 0x01 0x198 0x00 0x1e 0x01 0x198>; - phandle = <0x156>; - }; - }; - - pcfg-pull-none-drv-level-6 { - drive-strength = <0x06>; - bias-disable; - phandle = <0x2f2>; - }; - - jtag { - - jtagm2-pins { - rockchip,pins = <0x00 0x0d 0x02 0x198 0x00 0x0e 0x02 0x198>; - phandle = <0x391>; - }; - - jtagm1-pins { - rockchip,pins = <0x04 0x18 0x05 0x198 0x04 0x19 0x05 0x198>; - phandle = <0x390>; - }; - - jtagm0-pins { - rockchip,pins = <0x04 0x1a 0x05 0x198 0x04 0x1b 0x05 0x198>; - phandle = <0x38f>; - }; - }; - - gpio@fd8a0000 { - gpio-controller; - interrupts = <0x00 0x115 0x04>; - clocks = <0x02 0x284 0x02 0x285>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfd8a0000 0x00 0x100>; - phandle = <0x7b>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x00 0x20>; - interrupt-controller; - }; - - gmac1 { - - gmac1-rgmii-clk { - rockchip,pins = <0x03 0x05 0x01 0x198 0x03 0x04 0x01 0x198>; - phandle = <0x111>; - }; - - gmac1-rx-bus2 { - rockchip,pins = <0x03 0x07 0x01 0x198 0x03 0x08 0x01 0x198 0x03 0x09 0x01 0x198>; - phandle = <0x110>; - }; - - gmac1-txer { - rockchip,pins = <0x03 0x0a 0x01 0x198>; - phandle = <0x332>; - }; - - gmac1-clkinout { - rockchip,pins = <0x03 0x0e 0x01 0x198>; - phandle = <0x32e>; - }; - - gmac1-ptp-ref-clk { - rockchip,pins = <0x03 0x0f 0x01 0x198>; - phandle = <0x331>; - }; - - gmac1-ppsclk { - rockchip,pins = <0x03 0x11 0x01 0x198>; - phandle = <0x32f>; - }; - - gmac1-ppstrig { - rockchip,pins = <0x03 0x10 0x01 0x198>; - phandle = <0x330>; - }; - - gmac1-rgmii-bus { - rockchip,pins = <0x03 0x02 0x01 0x198 0x03 0x03 0x01 0x198 0x03 0x00 0x01 0x19a 0x03 0x01 0x01 0x19a>; - phandle = <0x112>; - }; - - gmac1-tx-bus2 { - rockchip,pins = <0x03 0x0b 0x01 0x19a 0x03 0x0c 0x01 0x19a 0x03 0x0d 0x01 0x198>; - phandle = <0x10f>; - }; - - gmac1-miim { - rockchip,pins = <0x03 0x12 0x01 0x198 0x03 0x13 0x01 0x198>; - phandle = <0x10e>; - }; - }; - - pcfg-pull-none { - bias-disable; - phandle = <0x198>; - }; - - pwm13 { - - pwm13m2-pins { - rockchip,pins = <0x01 0x0f 0x0b 0x198>; - phandle = <0x3df>; - }; - - pwm13m1-pins { - rockchip,pins = <0x04 0x0e 0x0b 0x198>; - phandle = <0x3de>; - }; - - pwm13m0-pins { - rockchip,pins = <0x03 0x0e 0x0b 0x198>; - phandle = <0x172>; - }; - }; - - pcfg-output-high-pull-down { - output-high; - bias-pull-down; - phandle = <0x307>; - }; - - uart7 { - - uart7m1-ctsn { - rockchip,pins = <0x03 0x13 0x0a 0x198>; - phandle = <0x43b>; - }; - - uart7m2-xfer { - rockchip,pins = <0x01 0x0c 0x0a 0x19e 0x01 0x0d 0x0a 0x19e>; - phandle = <0x43d>; - }; - - uart7m0-ctsn { - rockchip,pins = <0x04 0x16 0x0a 0x198>; - phandle = <0x43f>; - }; - - uart7m1-xfer { - rockchip,pins = <0x03 0x11 0x0a 0x19e 0x03 0x10 0x0a 0x19e>; - phandle = <0x166>; - }; - - uart7m0-xfer { - rockchip,pins = <0x02 0x0c 0x0a 0x19e 0x02 0x0d 0x0a 0x19e>; - phandle = <0x43e>; - }; - - uart7m1-rtsn { - rockchip,pins = <0x03 0x12 0x0a 0x198>; - phandle = <0x43c>; - }; - - uart7m0-rtsn { - rockchip,pins = <0x04 0x12 0x0a 0x198>; - phandle = <0x440>; - }; - }; - - pcfg-pull-down-drv-level-9 { - drive-strength = <0x09>; - bias-pull-down; - phandle = <0x465>; - }; - - spi1 { - - spi1m1-cs1 { - rockchip,pins = <0x03 0x13 0x08 0x19a>; - phandle = <0x152>; - }; - - spi1m2-cs1 { - rockchip,pins = <0x01 0x1d 0x08 0x19a>; - phandle = <0x3fe>; - }; - - spi1m0-cs0 { - rockchip,pins = <0x02 0x13 0x08 0x19f>; - phandle = <0x400>; - }; - - spi1m2-pins { - rockchip,pins = <0x01 0x1a 0x08 0x19a 0x01 0x18 0x08 0x19a 0x01 0x19 0x08 0x19a>; - phandle = <0x3fc>; - }; - - spi1m1-pins { - rockchip,pins = <0x03 0x11 0x08 0x19a 0x03 0x10 0x08 0x19a 0x03 0x0f 0x08 0x19a>; - phandle = <0x153>; - }; - - spi1m1-cs0 { - rockchip,pins = <0x03 0x12 0x08 0x19a>; - phandle = <0x151>; - }; - - spi1m0-pins { - rockchip,pins = <0x02 0x10 0x08 0x19f 0x02 0x11 0x08 0x19f 0x02 0x12 0x08 0x19f>; - phandle = <0x3ff>; - }; - - spi1m0-cs1 { - rockchip,pins = <0x02 0x14 0x08 0x19f>; - phandle = <0x401>; - }; - - spi1m2-cs0 { - rockchip,pins = <0x01 0x1b 0x08 0x19a>; - phandle = <0x3fd>; - }; - }; - - pcfg-pull-up-drv-level-14 { - drive-strength = <0x0e>; - phandle = <0x461>; - bias-pull-up; - }; - - pcfg-output-low-pull-down { - bias-pull-down; - phandle = <0x30b>; - output-low; - }; - - pcfg-pull-down-drv-level-12 { - drive-strength = <0x0c>; - bias-pull-down; - phandle = <0x468>; - }; - - pcfg-pull-up-drv-level-1 { - drive-strength = <0x01>; - phandle = <0x19f>; - bias-pull-up; - }; - - pcfg-pull-none-smt { - bias-disable; - input-schmitt-enable; - phandle = <0x19d>; - }; - - sdmmc { - - sdmmc-det { - rockchip,pins = <0x00 0x04 0x01 0x19e>; - phandle = <0x116>; - }; - - sdmmc-pwren { - rockchip,pins = <0x00 0x05 0x02 0x198>; - phandle = <0x3ef>; - }; - - sdmmc-bus4 { - rockchip,pins = <0x04 0x18 0x01 0x199 0x04 0x19 0x01 0x199 0x04 0x1a 0x01 0x199 0x04 0x1b 0x01 0x199>; - phandle = <0x117>; - }; - - sdmmc-cmd { - rockchip,pins = <0x04 0x1c 0x01 0x199>; - phandle = <0x115>; - }; - - sdmmc-clk { - rockchip,pins = <0x04 0x1d 0x01 0x199>; - phandle = <0x114>; - }; - }; - - i2s0 { - - i2s0-sclk { - rockchip,pins = <0x01 0x13 0x01 0x19d>; - phandle = <0x11c>; - }; - - i2s0-sdo3 { - rockchip,pins = <0x01 0x1a 0x01 0x198>; - phandle = <0x37a>; - }; - - i2s0-lrck { - rockchip,pins = <0x01 0x15 0x01 0x19d>; - phandle = <0x11b>; - }; - - i2s0-sdo1 { - rockchip,pins = <0x01 0x18 0x01 0x198>; - phandle = <0x378>; - }; - - i2s0-sdi3 { - rockchip,pins = <0x01 0x19 0x02 0x198>; - phandle = <0x377>; - }; - - i2s0-mclk { - rockchip,pins = <0x01 0x12 0x01 0x19d>; - phandle = <0x17a>; - }; - - i2s0-sdi1 { - rockchip,pins = <0x01 0x1b 0x02 0x198>; - phandle = <0x375>; - }; - - i2s0-sdo2 { - rockchip,pins = <0x01 0x19 0x01 0x198>; - phandle = <0x379>; - }; - - i2s0-idle { - rockchip,pins = <0x01 0x15 0x00 0x198 0x01 0x13 0x00 0x198>; - phandle = <0x11f>; - }; - - i2s0-sdo0 { - rockchip,pins = <0x01 0x17 0x01 0x198>; - phandle = <0x11e>; - }; - - i2s0-sdi2 { - rockchip,pins = <0x01 0x1a 0x02 0x198>; - phandle = <0x376>; - }; - - i2s0-sdi0 { - rockchip,pins = <0x01 0x1c 0x02 0x198>; - phandle = <0x11d>; - }; - }; - - ddrphych1 { - - ddrphych1-pins { - rockchip,pins = <0x04 0x04 0x07 0x198 0x04 0x05 0x07 0x198 0x04 0x06 0x07 0x198 0x04 0x07 0x07 0x198>; - phandle = <0x319>; - }; - }; - - pcfg-pull-none-drv-level-11 { - drive-strength = <0x0b>; - bias-disable; - phandle = <0x455>; - }; - - i2c0 { - - i2c0m2-xfer { - rockchip,pins = <0x00 0x19 0x03 0x19d 0x00 0x1a 0x03 0x19d>; - phandle = <0x77>; - }; - - i2c0m1-xfer { - rockchip,pins = <0x04 0x15 0x09 0x19d 0x04 0x16 0x09 0x19d>; - phandle = <0x355>; - }; - - i2c0m0-xfer { - rockchip,pins = <0x00 0x0b 0x02 0x19d 0x00 0x06 0x02 0x19d>; - phandle = <0x354>; - }; - }; - - pwm6 { - - pwm6m2-pins { - rockchip,pins = <0x04 0x15 0x0b 0x198>; - phandle = <0x3d0>; - }; - - pwm6m1-pins { - rockchip,pins = <0x04 0x11 0x0b 0x198>; - phandle = <0x3cf>; - }; - - pwm6m0-pins { - rockchip,pins = <0x00 0x17 0x0b 0x198>; - phandle = <0x16b>; - }; - }; - - hym8563 { - - hym8563-int { - rockchip,pins = <0x00 0x08 0x00 0x198>; - phandle = <0x7a>; - }; - }; - - pcfg-pull-none-drv-level-4 { - drive-strength = <0x04>; - bias-disable; - phandle = <0x2f0>; - }; - - pcfg-output-high-pull-up { - output-high; - phandle = <0x306>; - bias-pull-up; - }; - - pwm11 { - - pwm11m3-pins { - rockchip,pins = <0x03 0x1d 0x0b 0x198>; - phandle = <0x3dc>; - }; - - pwm11m2-pins { - rockchip,pins = <0x01 0x14 0x0b 0x198>; - phandle = <0x3db>; - }; - - pwm11m1-pins { - rockchip,pins = <0x04 0x0c 0x0b 0x198>; - phandle = <0x3da>; - }; - - pwm11m0-pins { - rockchip,pins = <0x03 0x01 0x0b 0x198>; - phandle = <0x170>; - }; - }; - - bt1120 { - - bt1120-pins { - rockchip,pins = <0x04 0x08 0x02 0x198 0x04 0x00 0x02 0x198 0x04 0x01 0x02 0x198 0x04 0x02 0x02 0x198 0x04 0x03 0x02 0x198 0x04 0x04 0x02 0x198 0x04 0x05 0x02 0x198 0x04 0x06 0x02 0x198 0x04 0x07 0x02 0x198 0x04 0x0a 0x02 0x198 0x04 0x0b 0x02 0x198 0x04 0x0c 0x02 0x198 0x04 0x0d 0x02 0x198 0x04 0x0e 0x02 0x198 0x04 0x0f 0x02 0x198 0x04 0x10 0x02 0x198 0x04 0x11 0x02 0x198>; - phandle = <0x71>; - }; - }; - - pcfg-output-low-pull-up { - phandle = <0x30a>; - bias-pull-up; - output-low; - }; - - uart5 { - - uart5m1-ctsn { - rockchip,pins = <0x02 0x02 0x0a 0x198>; - phandle = <0x433>; - }; - - uart5m2-xfer { - rockchip,pins = <0x02 0x1c 0x0a 0x19e 0x02 0x1d 0x0a 0x19e>; - phandle = <0x435>; - }; - - uart5m0-ctsn { - rockchip,pins = <0x04 0x1a 0x0a 0x198>; - phandle = <0x431>; - }; - - uart5m1-xfer { - rockchip,pins = <0x03 0x15 0x0a 0x19e 0x03 0x14 0x0a 0x19e>; - phandle = <0x164>; - }; - - uart5m0-xfer { - rockchip,pins = <0x04 0x1c 0x0a 0x19e 0x04 0x1d 0x0a 0x19e>; - phandle = <0x430>; - }; - - uart5m1-rtsn { - rockchip,pins = <0x02 0x03 0x0a 0x198>; - phandle = <0x434>; - }; - - uart5m0-rtsn { - rockchip,pins = <0x04 0x1b 0x0a 0x198>; - phandle = <0x432>; - }; - }; - - sdio { - - sdiom1-pins { - rockchip,pins = <0x03 0x05 0x02 0x198 0x03 0x04 0x02 0x19e 0x03 0x00 0x02 0x19e 0x03 0x01 0x02 0x19e 0x03 0x02 0x02 0x19e 0x03 0x03 0x02 0x19e>; - phandle = <0x119>; - }; - - sdiom0-pins { - rockchip,pins = <0x02 0x0b 0x02 0x198 0x02 0x0a 0x02 0x19e 0x02 0x06 0x02 0x19e 0x02 0x07 0x02 0x19e 0x02 0x08 0x02 0x19e 0x02 0x09 0x02 0x19e>; - phandle = <0x3ee>; - }; - }; - - spdif1 { - - spdif1m0-tx { - rockchip,pins = <0x01 0x0f 0x03 0x198>; - phandle = <0x143>; - }; - - spdif1m2-tx { - rockchip,pins = <0x04 0x11 0x03 0x198>; - phandle = <0x3f2>; - }; - - spdif1m1-tx { - rockchip,pins = <0x04 0x09 0x02 0x198>; - phandle = <0x3f1>; - }; - }; - - pcfg-pull-down-drv-level-7 { - drive-strength = <0x07>; - bias-pull-down; - phandle = <0x463>; - }; - - gpio@fec30000 { - gpio-controller; - interrupts = <0x00 0x117 0x04>; - clocks = <0x02 0x7f 0x02 0x80>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfec30000 0x00 0x100>; - phandle = <0x79>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x40 0x20>; - interrupt-controller; - }; - - pcfg-pull-up-drv-level-12 { - drive-strength = <0x0c>; - phandle = <0x45f>; - bias-pull-up; - }; - - pcfg-pull-down-drv-level-10 { - drive-strength = <0x0a>; - bias-pull-down; - phandle = <0x466>; - }; - - dp1 { - - dp1m1-pins { - rockchip,pins = <0x00 0x15 0x0a 0x198>; - phandle = <0x320>; - }; - - dp1m0-pins { - rockchip,pins = <0x03 0x1d 0x05 0x198>; - phandle = <0x31f>; - }; - - dp1m2-pins { - rockchip,pins = <0x01 0x01 0x05 0x198>; - phandle = <0x321>; - }; - }; - - vop { - - vop-pins { - rockchip,pins = <0x01 0x02 0x01 0x198>; - phandle = <0x44f>; - }; - }; - - pwm4 { - - pwm4m1-pins { - rockchip,pins = <0x04 0x13 0x0b 0x198>; - phandle = <0x3cc>; - }; - - pwm4m0-pins { - rockchip,pins = <0x00 0x15 0x0b 0x198>; - phandle = <0x169>; - }; - }; - - pcfg-pull-none-drv-level-2 { - drive-strength = <0x02>; - bias-disable; - phandle = <0x1a0>; - }; - - pcfg-pull-none-drv-level-3-smt { - drive-strength = <0x03>; - bias-disable; - input-schmitt-enable; - phandle = <0x302>; - }; - - uart3 { - - uart3m2-xfer { - rockchip,pins = <0x04 0x06 0x0a 0x19e 0x04 0x05 0x0a 0x19e>; - phandle = <0x429>; - }; - - uart3m1-xfer { - rockchip,pins = <0x03 0x0e 0x0a 0x19e 0x03 0x0d 0x0a 0x19e>; - phandle = <0x162>; - }; - - uart3-ctsn { - rockchip,pins = <0x01 0x13 0x0a 0x198>; - phandle = <0x42a>; - }; - - uart3m0-xfer { - rockchip,pins = <0x01 0x10 0x0a 0x19e 0x01 0x11 0x0a 0x19e>; - phandle = <0x428>; - }; - - uart3-rtsn { - rockchip,pins = <0x01 0x12 0x0a 0x198>; - phandle = <0x42b>; - }; - }; - - pcfg-pull-down-drv-level-5 { - drive-strength = <0x05>; - bias-pull-down; - phandle = <0x2fc>; - }; - - pcfg-pull-up-drv-level-8 { - drive-strength = <0x08>; - phandle = <0x45b>; - bias-pull-up; - }; - - pcfg-pull-up-drv-level-10 { - drive-strength = <0x0a>; - phandle = <0x45d>; - bias-pull-up; - }; - - pcfg-output-low { - phandle = <0x309>; - output-low; - }; - - i2c7 { - - i2c7m3-xfer { - rockchip,pins = <0x04 0x0a 0x09 0x19d 0x04 0x0b 0x09 0x19d>; - phandle = <0x36f>; - }; - - i2c7m2-xfer { - rockchip,pins = <0x03 0x1a 0x09 0x19d 0x03 0x1b 0x09 0x19d>; - phandle = <0x36e>; - }; - - i2c7m1-xfer { - rockchip,pins = <0x04 0x13 0x09 0x19d 0x04 0x14 0x09 0x19d>; - phandle = <0x370>; - }; - - i2c7m0-xfer { - rockchip,pins = <0x01 0x18 0x09 0x19d 0x01 0x19 0x09 0x19d>; - phandle = <0x185>; - }; - }; - - pwm2 { - - pwm2m2-pins { - rockchip,pins = <0x04 0x12 0x0b 0x198>; - phandle = <0x3c8>; - }; - - pwm2m1-pins { - rockchip,pins = <0x03 0x09 0x0b 0x198>; - phandle = <0x3c7>; - }; - - pwm2m0-pins { - rockchip,pins = <0x00 0x14 0x03 0x198>; - phandle = <0x80>; - }; - }; - - pcfg-pull-none-drv-level-0 { - drive-strength = <0x00>; - bias-disable; - phandle = <0x2ed>; - }; - - sata1 { - - sata1m1-pins { - rockchip,pins = <0x01 0x01 0x06 0x198>; - phandle = <0x3eb>; - }; - - sata1m0-pins { - rockchip,pins = <0x04 0x0d 0x06 0x198>; - phandle = <0x3ea>; - }; - }; - - pmu { - - pmu-pins { - rockchip,pins = <0x00 0x05 0x03 0x198>; - phandle = <0x3c2>; - }; - }; - - hdmirx { - - hdmirx-det { - rockchip,pins = <0x01 0x1d 0x00 0x198>; - phandle = <0x1b4>; - }; - }; - - uart1 { - - uart1m0-ctsn { - rockchip,pins = <0x02 0x11 0x0a 0x198>; - phandle = <0x423>; - }; - - uart1m1-xfer { - rockchip,pins = <0x01 0x0f 0x0a 0x19e 0x01 0x0e 0x0a 0x19e>; - phandle = <0x160>; - }; - - uart1m0-xfer { - rockchip,pins = <0x02 0x0e 0x0a 0x19e 0x02 0x0f 0x0a 0x19e>; - phandle = <0x422>; - }; - - uart1m2-rtsn { - rockchip,pins = <0x00 0x17 0x0a 0x198>; - phandle = <0x421>; - }; - - uart1m1-rtsn { - rockchip,pins = <0x01 0x1e 0x0a 0x198>; - phandle = <0x41e>; - }; - - uart1m0-rtsn { - rockchip,pins = <0x02 0x10 0x0a 0x198>; - phandle = <0x424>; - }; - - uart1m2-ctsn { - rockchip,pins = <0x00 0x18 0x0a 0x198>; - phandle = <0x420>; - }; - - uart1m1-ctsn { - rockchip,pins = <0x01 0x1f 0x0a 0x198>; - phandle = <0x41d>; - }; - - uart1m2-xfer { - rockchip,pins = <0x00 0x1a 0x0a 0x19e 0x00 0x19 0x0a 0x19e>; - phandle = <0x41f>; - }; - }; - - hdmi { - - hdmim1-rx-cec { - rockchip,pins = <0x03 0x19 0x05 0x198>; - phandle = <0x338>; - }; - - hdmim0-rx-scl { - rockchip,pins = <0x00 0x1a 0x0b 0x198>; - phandle = <0x336>; - }; - - hdmim0-rx-sda { - rockchip,pins = <0x00 0x19 0x0b 0x198>; - phandle = <0x337>; - }; - - hdmim0-tx0-cec { - rockchip,pins = <0x04 0x11 0x05 0x198>; - phandle = <0xf9>; - }; - - hdmim2-rx-cec { - rockchip,pins = <0x01 0x0f 0x05 0x198>; - phandle = <0x342>; - }; - - hdmim1-rx-scl { - rockchip,pins = <0x03 0x1a 0x05 0x19d>; - phandle = <0x33a>; - }; - - hdmim1-rx-sda { - rockchip,pins = <0x03 0x1b 0x05 0x19d>; - phandle = <0x33b>; - }; - - hdmim0-tx0-scl { - rockchip,pins = <0x04 0x0f 0x05 0x19b>; - phandle = <0xfb>; - }; - - hdmim0-tx0-sda { - rockchip,pins = <0x04 0x10 0x05 0x19c>; - phandle = <0xfc>; - }; - - hdmim2-rx-scl { - rockchip,pins = <0x01 0x1e 0x05 0x198>; - phandle = <0x344>; - }; - - hdmim2-rx-sda { - rockchip,pins = <0x01 0x1f 0x05 0x198>; - phandle = <0x345>; - }; - - hdmim0-tx0-hpd { - rockchip,pins = <0x01 0x05 0x05 0x198>; - phandle = <0xfa>; - }; - - hdmim2-rx-hpdin { - rockchip,pins = <0x01 0x0e 0x05 0x198>; - phandle = <0x343>; - }; - - hdmi-debug6 { - rockchip,pins = <0x01 0x00 0x07 0x198>; - phandle = <0x350>; - }; - - hdmim2-tx0-scl { - rockchip,pins = <0x03 0x17 0x05 0x19b>; - phandle = <0x346>; - }; - - hdmim2-tx0-sda { - rockchip,pins = <0x03 0x18 0x05 0x19c>; - phandle = <0x347>; - }; - - hdmi-debug4 { - rockchip,pins = <0x01 0x0b 0x07 0x198>; - phandle = <0x34e>; - }; - - hdmim0-tx1-cec { - rockchip,pins = <0x02 0x14 0x04 0x198>; - phandle = <0x351>; - }; - - hdmim0-tx1-scl { - rockchip,pins = <0x02 0x0d 0x04 0x198>; - phandle = <0x352>; - }; - - hdmim0-tx1-sda { - rockchip,pins = <0x02 0x0c 0x04 0x198>; - phandle = <0x353>; - }; - - hdmi-debug2 { - rockchip,pins = <0x01 0x09 0x07 0x198>; - phandle = <0x34c>; - }; - - hdmim0-tx1-hpd { - rockchip,pins = <0x01 0x06 0x05 0x198>; - phandle = <0x1a9>; - }; - - hdmim1-rx { - rockchip,pins = <0x03 0x19 0x05 0x198 0x03 0x1a 0x05 0x19d 0x03 0x1b 0x05 0x19d 0x03 0x1c 0x05 0x198>; - phandle = <0x1b3>; - }; - - hdmim2-tx1-cec { - rockchip,pins = <0x03 0x14 0x05 0x198>; - phandle = <0x1a8>; - }; - - hdmi-debug0 { - rockchip,pins = <0x01 0x07 0x07 0x198>; - phandle = <0x34a>; - }; - - hdmim2-tx1-scl { - rockchip,pins = <0x01 0x04 0x05 0x19b>; - phandle = <0x348>; - }; - - hdmim2-tx1-sda { - rockchip,pins = <0x01 0x03 0x05 0x19c>; - phandle = <0x349>; - }; - - hdmim1-tx0-cec { - rockchip,pins = <0x00 0x19 0x0d 0x198>; - phandle = <0x33c>; - }; - - hdmim1-tx0-scl { - rockchip,pins = <0x00 0x1d 0x0b 0x19b>; - phandle = <0x33e>; - }; - - hdmim1-tx0-sda { - rockchip,pins = <0x00 0x1c 0x0b 0x19c>; - phandle = <0x33f>; - }; - - hdmim1-tx0-hpd { - rockchip,pins = <0x03 0x1c 0x03 0x198>; - phandle = <0x33d>; - }; - - hdmim0-rx-hpdin { - rockchip,pins = <0x04 0x0e 0x05 0x198>; - phandle = <0x335>; - }; - - hdmi-debug5 { - rockchip,pins = <0x01 0x0c 0x07 0x198>; - phandle = <0x34f>; - }; - - hdmi-debug3 { - rockchip,pins = <0x01 0x0a 0x07 0x198>; - phandle = <0x34d>; - }; - - hdmim1-tx1-cec { - rockchip,pins = <0x00 0x1a 0x0d 0x198>; - phandle = <0x340>; - }; - - hdmi-debug1 { - rockchip,pins = <0x01 0x08 0x07 0x198>; - phandle = <0x34b>; - }; - - hdmim1-tx1-scl { - rockchip,pins = <0x03 0x16 0x05 0x19b>; - phandle = <0x1aa>; - }; - - hdmim1-tx1-sda { - rockchip,pins = <0x03 0x15 0x05 0x19c>; - phandle = <0x1ab>; - }; - - hdmim1-tx1-hpd { - rockchip,pins = <0x03 0x0f 0x05 0x198>; - phandle = <0x341>; - }; - - hdmim1-rx-hpdin { - rockchip,pins = <0x03 0x1c 0x05 0x198>; - phandle = <0x339>; - }; - - hdmim0-rx-cec { - rockchip,pins = <0x04 0x0d 0x05 0x198>; - phandle = <0x334>; - }; - }; - - pcfg-pull-down-drv-level-3 { - drive-strength = <0x03>; - bias-pull-down; - phandle = <0x2fa>; - }; - - pcfg-pull-up-drv-level-6 { - drive-strength = <0x06>; - phandle = <0x19a>; - bias-pull-up; - }; - - i2c5 { - - i2c5m3-xfer { - rockchip,pins = <0x01 0x0e 0x09 0x19d 0x01 0x0f 0x09 0x19d>; - phandle = <0x368>; - }; - - i2c5m2-xfer { - rockchip,pins = <0x04 0x06 0x09 0x19d 0x04 0x07 0x09 0x19d>; - phandle = <0x367>; - }; - - i2c5m1-xfer { - rockchip,pins = <0x04 0x0e 0x09 0x19d 0x04 0x0f 0x09 0x19d>; - phandle = <0x366>; - }; - - i2c5m0-xfer { - rockchip,pins = <0x03 0x17 0x09 0x19d 0x03 0x18 0x09 0x19d>; - phandle = <0x14d>; - }; - - i2c5m4-xfer { - rockchip,pins = <0x02 0x0e 0x09 0x19d 0x02 0x0f 0x09 0x19d>; - phandle = <0x369>; - }; - }; - - pcfg-pull-none-drv-level-9 { - drive-strength = <0x09>; - bias-disable; - phandle = <0x453>; - }; - - pdm0 { - - pdm0m1-sdi3 { - rockchip,pins = <0x00 0x1e 0x02 0x198>; - phandle = <0x3ba>; - }; - - pdm0m1-clk { - rockchip,pins = <0x00 0x10 0x02 0x198>; - phandle = <0x3b4>; - }; - - pdm0m1-sdi1 { - rockchip,pins = <0x00 0x18 0x02 0x198>; - phandle = <0x3b8>; - }; - - pdm0m0-sdi3 { - rockchip,pins = <0x01 0x1b 0x03 0x198>; - phandle = <0x137>; - }; - - pdm0m0-sdi1 { - rockchip,pins = <0x01 0x19 0x03 0x198>; - phandle = <0x135>; - }; - - pdm0m1-clk1 { - rockchip,pins = <0x00 0x14 0x02 0x198>; - phandle = <0x3b5>; - }; - - pdm0m1-idle { - rockchip,pins = <0x00 0x10 0x00 0x198 0x00 0x14 0x00 0x198>; - phandle = <0x3b6>; - }; - - pdm0m0-clk1 { - rockchip,pins = <0x01 0x14 0x03 0x198>; - phandle = <0x13a>; - }; - - pdm0m1-sdi2 { - rockchip,pins = <0x00 0x1c 0x02 0x198>; - phandle = <0x3b9>; - }; - - pdm0m0-idle { - rockchip,pins = <0x01 0x16 0x00 0x198 0x01 0x14 0x00 0x198>; - phandle = <0x138>; - }; - - pdm0m1-sdi0 { - rockchip,pins = <0x00 0x17 0x02 0x198>; - phandle = <0x3b7>; - }; - - pdm0m0-sdi2 { - rockchip,pins = <0x01 0x1a 0x03 0x198>; - phandle = <0x136>; - }; - - pdm0m0-sdi0 { - rockchip,pins = <0x01 0x1d 0x03 0x198>; - phandle = <0x134>; - }; - - pdm0m0-clk { - rockchip,pins = <0x01 0x16 0x03 0x198>; - phandle = <0x139>; - }; - }; - - pcfg-output-high-pull-none { - bias-disable; - output-high; - phandle = <0x308>; - }; - - pwm0 { - - pwm0m1-pins { - rockchip,pins = <0x01 0x1a 0x0b 0x198>; - phandle = <0x3c3>; - }; - - pwm0m0-pins { - rockchip,pins = <0x00 0x0f 0x03 0x198>; - phandle = <0x7e>; - }; - - pwm0m2-pins { - rockchip,pins = <0x01 0x02 0x0b 0x198>; - phandle = <0x3c4>; - }; - }; - - cif { - - cif-dvp-clk { - rockchip,pins = <0x04 0x08 0x01 0x198 0x04 0x0a 0x01 0x198 0x04 0x0b 0x01 0x198>; - phandle = <0x311>; - }; - - cif-clk { - rockchip,pins = <0x04 0x0c 0x01 0x198>; - phandle = <0x310>; - }; - - cif-dvp-bus8 { - rockchip,pins = <0x04 0x00 0x01 0x198 0x04 0x01 0x01 0x198 0x04 0x02 0x01 0x198 0x04 0x03 0x01 0x198 0x04 0x04 0x01 0x198 0x04 0x05 0x01 0x198 0x04 0x06 0x01 0x198 0x04 0x07 0x01 0x198>; - phandle = <0x313>; - }; - - cif-dvp-bus16 { - rockchip,pins = <0x03 0x14 0x01 0x198 0x03 0x15 0x01 0x198 0x03 0x16 0x01 0x198 0x03 0x17 0x01 0x198 0x03 0x18 0x01 0x198 0x03 0x19 0x01 0x198 0x03 0x1a 0x01 0x198 0x03 0x1b 0x01 0x198>; - phandle = <0x312>; - }; - }; - - can1 { - - can1m1-pins { - rockchip,pins = <0x04 0x0a 0x0c 0x198 0x04 0x0b 0x0c 0x198>; - phandle = <0x146>; - }; - - can1m0-pins { - rockchip,pins = <0x03 0x0d 0x09 0x198 0x03 0x0e 0x09 0x198>; - phandle = <0x30e>; - }; - }; - - pcfg-output-low-pull-none { - bias-disable; - phandle = <0x30c>; - output-low; - }; - - gpio@fec40000 { - gpio-controller; - interrupts = <0x00 0x118 0x04>; - clocks = <0x02 0x81 0x02 0x82>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfec40000 0x00 0x100>; - phandle = <0x181>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x60 0x20>; - interrupt-controller; - }; - - spi4 { - - spi4m0-cs0 { - rockchip,pins = <0x01 0x13 0x08 0x19a>; - phandle = <0x187>; - }; - - spi4m1-cs0 { - rockchip,pins = <0x03 0x03 0x08 0x19a>; - phandle = <0x413>; - }; - - spi4m2-pins { - rockchip,pins = <0x01 0x02 0x08 0x19a 0x01 0x00 0x08 0x19a 0x01 0x01 0x08 0x19a>; - phandle = <0x415>; - }; - - spi4m0-cs1 { - rockchip,pins = <0x01 0x14 0x08 0x19a>; - phandle = <0x188>; - }; - - spi4m1-pins { - rockchip,pins = <0x03 0x02 0x08 0x19a 0x03 0x00 0x08 0x19a 0x03 0x01 0x08 0x19a>; - phandle = <0x412>; - }; - - spi4m2-cs0 { - rockchip,pins = <0x01 0x03 0x08 0x19a>; - phandle = <0x416>; - }; - - spi4m0-pins { - rockchip,pins = <0x01 0x12 0x08 0x19a 0x01 0x10 0x08 0x19a 0x01 0x11 0x08 0x19a>; - phandle = <0x189>; - }; - - spi4m1-cs1 { - rockchip,pins = <0x03 0x04 0x08 0x19a>; - phandle = <0x414>; - }; - }; - - pcfg-pull-down-drv-level-15 { - drive-strength = <0x0f>; - bias-pull-down; - phandle = <0x46b>; - }; - - pcfg-pull-up-smt { - input-schmitt-enable; - phandle = <0x2fe>; - bias-pull-up; - }; - - pcfg-pull-down-drv-level-1 { - drive-strength = <0x01>; - bias-pull-down; - phandle = <0x2f8>; - }; - - pcfg-pull-up-drv-level-4 { - drive-strength = <0x04>; - phandle = <0x2f5>; - bias-pull-up; - }; - - wireless-wlan { - - wifi-host-wake-irq { - rockchip,pins = <0x00 0x0a 0x00 0x198>; - phandle = <0x1ea>; - }; - }; - - wdt-pc9202 { - - wdt-en-base { - rockchip,pins = <0x00 0x14 0x00 0x198>; - phandle = <0x14c>; - }; - }; - - pcfg-pull-none-drv-level-0-smt { - drive-strength = <0x00>; - bias-disable; - input-schmitt-enable; - phandle = <0x300>; - }; - - i2s3 { - - i2s3-sdi { - rockchip,pins = <0x03 0x04 0x03 0x198>; - phandle = <0x12f>; - }; - - i2s3-idle { - rockchip,pins = <0x03 0x02 0x00 0x198 0x03 0x01 0x00 0x198>; - phandle = <0x131>; - }; - - i2s3-sclk { - rockchip,pins = <0x03 0x01 0x03 0x19d>; - phandle = <0x133>; - }; - - i2s3-lrck { - rockchip,pins = <0x03 0x02 0x03 0x19d>; - phandle = <0x132>; - }; - - i2s3-sdo { - rockchip,pins = <0x03 0x03 0x03 0x198>; - phandle = <0x130>; - }; - - i2s3-mclk { - rockchip,pins = <0x03 0x00 0x03 0x19d>; - phandle = <0x38e>; - }; - }; - - pcfg-pull-none-drv-level-14 { - drive-strength = <0x0e>; - bias-disable; - phandle = <0x458>; - }; - }; - - rkcif-mipi-lvds4-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a1>; - phandle = <0x473>; - }; - - bt-sco { - #sound-dai-cells = <0x01>; - compatible = "delta,dfbmcs320"; - status = "disabled"; - phandle = <0x1d2>; - }; - - phy@fed80000 { - svid = <0xff01>; - orientation-switch; - sbu2-dc-gpios = <0x10d 0x07 0x00>; - clock-names = "refclk\0immortal\0pclk\0utmi"; - resets = <0x02 0x28 0x02 0x29 0x02 0x2a 0x02 0x2b 0x02 0x482>; - clocks = <0x02 0x2b6 0x02 0x27f 0x02 0x269 0x18d>; - compatible = "rockchip,rk3588-usbdp-phy"; - status = "okay"; - reg = <0x00 0xfed80000 0x00 0x10000>; - phandle = <0x2ea>; - rockchip,usb-grf = <0x74>; - reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; - rockchip,u2phy-grf = <0x18b>; - sbu1-dc-gpios = <0x10d 0x06 0x00>; - rockchip,usbdpphy-grf = <0x18c>; - rockchip,vo-grf = <0xf5>; - - dp-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0xf6>; - }; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@1 { - remote-endpoint = <0x18f>; - reg = <0x01>; - phandle = <0x17f>; - }; - - endpoint@0 { - remote-endpoint = <0x18e>; - reg = <0x00>; - phandle = <0x17e>; - }; - }; - - u3-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x67>; - }; - }; - - interrupt-controller@fe600000 { - #address-cells = <0x02>; - interrupts = <0x01 0x09 0x04>; - #size-cells = <0x02>; - compatible = "arm,gic-v3"; - ranges; - #interrupt-cells = <0x03>; - reg = <0x00 0xfe600000 0x00 0x10000 0x00 0xfe680000 0x00 0x100000>; - phandle = <0x01>; - interrupt-controller; - - msi-controller@fe640000 { - msi-controller; - compatible = "arm,gic-v3-its"; - reg = <0x00 0xfe640000 0x00 0x20000>; - phandle = <0x106>; - #msi-cells = <0x01>; - }; - - msi-controller@fe660000 { - msi-controller; - compatible = "arm,gic-v3-its"; - reg = <0x00 0xfe660000 0x00 0x20000>; - phandle = <0x1b6>; - #msi-cells = <0x01>; - }; - }; - - ethernet@fe1c0000 { - power-domains = <0x60 0x21>; - pinctrl-names = "default"; - phy-mode = "rgmii-rxid"; - snps,mixed-burst; - snps,mtl-rx-config = <0x10b>; - snps,reset-active-low; - pinctrl-0 = <0x10e 0x10f 0x110 0x111 0x112>; - clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; - snps,mtl-tx-config = <0x10c>; - local-mac-address = [de 2f 1a d4 a9 85]; - resets = <0x02 0x20b>; - interrupts = <0x00 0xea 0x04 0x00 0xe9 0x04>; - clocks = <0x02 0x144 0x02 0x145 0x02 0x168 0x02 0x16d 0x02 0x143>; - clock_in_out = "output"; - snps,tso; - compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; - status = "okay"; - rockchip,grf = <0xc8>; - interrupt-names = "macirq\0eth_wake_irq"; - snps,reset-gpio = <0x10d 0x08 0x01>; - reg = <0x00 0xfe1c0000 0x00 0x10000>; - rockchip,php_grf = <0x76>; - phandle = <0x109>; - phy-handle = <0x113>; - reset-names = "stmmaceth"; - tx_delay = <0x40>; - snps,axi-config = <0x10a>; - snps,reset-delays-us = <0x00 0x4e20 0x186a0>; - - mdio { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "snps,dwmac-mdio"; - phandle = <0x28f>; - - phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x01>; - phandle = <0x113>; - }; - }; - - tx-queues-config { - phandle = <0x10c>; - snps,tx-queues-to-use = <0x01>; - - queue0 { - }; - }; - - stmmac-axi-config { - snps,wr_osr_lmt = <0x04>; - phandle = <0x10a>; - snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; - snps,rd_osr_lmt = <0x08>; - }; - - rx-queues-config { - snps,rx-queues-to-use = <0x01>; - phandle = <0x10b>; - - queue0 { - }; - }; - }; - - pcie-essd { - regulator-max-microvolt = <0x2625a0>; - enable-active-high; - regulator-min-microvolt = <0x2625a0>; - regulator-name = "pcie_essd"; - startup-delay-us = <0x1388>; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x1ba>; - vin-supply = <0x1cd>; - gpios = <0x181 0x0f 0x00>; - }; - - iommu@fdab9000 { - clock-names = "aclk0\0aclk1\0aclk2\0iface0\0iface1\0iface2"; - interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; - clocks = <0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "npu0_mmu\0npu1_mmu\0npu2_mmu"; - reg = <0x00 0xfdab9000 0x00 0x100 0x00 0xfdaba000 0x00 0x100 0x00 0xfdaca000 0x00 0x100 0x00 0xfdada000 0x00 0x100>; - phandle = <0xb2>; - }; - - otp@fecc0000 { - #address-cells = <0x01>; - clock-names = "otpc\0apb\0arb\0phy"; - resets = <0x02 0x12a 0x02 0x129 0x02 0x12b>; - clocks = <0x02 0x96 0x02 0x95 0x02 0x97 0x02 0x99>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-otp"; - reg = <0x00 0xfecc0000 0x00 0x400>; - phandle = <0x2e7>; - reset-names = "otpc\0apb\0arb"; - - id@7 { - reg = <0x07 0x10>; - phandle = <0x2a>; - }; - - cpul-opp-info@3d { - reg = <0x3d 0x06>; - phandle = <0x20>; - }; - - cpub1-leakage@18 { - reg = <0x18 0x01>; - phandle = <0x27>; - }; - - vop-opp-info@61 { - reg = <0x61 0x06>; - phandle = <0x2e8>; - }; - - cpul-leakage@19 { - reg = <0x19 0x01>; - phandle = <0x1f>; - }; - - codec-leakage@29 { - reg = <0x29 0x01>; - phandle = <0xc6>; - }; - - cpu-version@1c { - bits = <0x03 0x03>; - reg = <0x1c 0x01>; - phandle = <0x2b>; - }; - - cpub0-leakage@17 { - reg = <0x17 0x01>; - phandle = <0x24>; - }; - - log-leakage@1a { - reg = <0x1a 0x01>; - phandle = <0x44>; - }; - - cpu-code@2 { - reg = <0x02 0x02>; - phandle = <0x2c>; - }; - - package-serial-number-low@6 { - bits = <0x05 0x03>; - reg = <0x06 0x01>; - phandle = <0xd4>; - }; - - npu-opp-info@55 { - reg = <0x55 0x06>; - phandle = <0xb5>; - }; - - package-serial-number-high@5 { - bits = <0x00 0x01>; - reg = <0x05 0x01>; - phandle = <0xd5>; - }; - - cpub01-opp-info@43 { - reg = <0x43 0x06>; - phandle = <0x25>; - }; - - dmc-opp-info@5b { - reg = <0x5b 0x06>; - phandle = <0x45>; - }; - - npu-leakage@28 { - reg = <0x28 0x01>; - phandle = <0xb4>; - }; - - gpu-leakage@1b { - reg = <0x1b 0x01>; - phandle = <0x63>; - }; - - specification-serial-number@6 { - bits = <0x00 0x05>; - reg = <0x06 0x01>; - phandle = <0x21>; - }; - - venc-opp-info@67 { - reg = <0x67 0x06>; - phandle = <0xc7>; - }; - - gpu-opp-info@4f { - reg = <0x4f 0x06>; - phandle = <0x64>; - }; - - cpub23-opp-info@49 { - reg = <0x49 0x06>; - phandle = <0x28>; - }; - }; - - i2s@fddf0000 { - power-domains = <0x60 0x1a>; - rockchip,always-on; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x243>; - assigned-clock-parents = <0x02 0x07>; - resets = <0x02 0x3e8>; - interrupts = <0x00 0xb9 0x04>; - clocks = <0x02 0x246 0x02 0x246 0x02 0x248>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - rockchip,playback-only; - status = "okay"; - reg = <0x00 0xfddf0000 0x00 0x1000>; - phandle = <0x1d3>; - dmas = <0xf2 0x02>; - reset-names = "tx-m"; - rockchip,hdmi-path; - }; - - dma-controller@fea10000 { - clock-names = "apb_pclk"; - interrupts = <0x00 0x56 0x04 0x00 0x57 0x04>; - clocks = <0x02 0x78>; - arm,pl330-periph-burst; - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xfea10000 0x00 0x4000>; - phandle = <0x7c>; - #dma-cells = <0x01>; - }; - - pwm@febd0000 { - pinctrl-names = "active"; - pinctrl-0 = <0x169>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15a 0x04>; - clocks = <0x02 0x54 0x02 0x53>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebd0000 0x00 0x10>; - phandle = <0x2d2>; - }; - - rkvenc-ccu { - compatible = "rockchip,rkv-encoder-v2-ccu"; - status = "okay"; - phandle = <0xc3>; - }; - - syscon@fd58c000 { - compatible = "rockchip,rk3588-sys-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd58c000 0x00 0x1000>; - phandle = <0xc8>; - - rgb { - pinctrl-names = "default"; - pinctrl-0 = <0x71>; - compatible = "rockchip,rk3588-rgb"; - status = "disabled"; - phandle = <0x25c>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@2 { - remote-endpoint = <0x3d>; - status = "disabled"; - reg = <0x02>; - phandle = <0xf0>; - }; - }; - }; - }; - }; - - spi@fe2b0000 { - #address-cells = <0x01>; - clock-names = "clk_sfc\0hclk_sfc"; - assigned-clocks = <0x02 0x13d>; - assigned-clock-rates = <0x5f5e100>; - interrupts = <0x00 0xce 0x04>; - clocks = <0x02 0x13d 0x02 0x13e>; - #size-cells = <0x00>; - compatible = "rockchip,sfc"; - status = "disabled"; - reg = <0x00 0xfe2b0000 0x00 0x4000>; - phandle = <0x292>; - }; - - qos@fdf82200 { - compatible = "syscon"; - reg = <0x00 0xfdf82200 0x00 0x20>; - phandle = <0x9e>; - }; - - mmc@fe2c0000 { - power-domains = <0x60 0x28>; - fifo-depth = <0x100>; - pinctrl-names = "default"; - pinctrl-0 = <0x114 0x115 0x116 0x117>; - clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; - cap-sd-highspeed; - vqmmc-supply = <0x118>; - no-mmc; - bus-width = <0x04>; - no-sdio; - interrupts = <0x00 0xcb 0x04>; - clocks = <0x0e 0x17 0x0e 0x09 0x02 0x2c2 0x02 0x2c3>; - compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; - status = "okay"; - disable-wp; - reg = <0x00 0xfe2c0000 0x00 0x4000>; - phandle = <0x293>; - sd-uhs-sdr104; - max-frequency = <0x8f0d180>; - cap-mmc-highspeed; - }; - - serial@feb80000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x164>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x150 0x04>; - clocks = <0x02 0xc7 0x02 0xaf>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeb80000 0x00 0x100>; - phandle = <0x2cd>; - dmas = <0xf1 0x0b 0xf1 0x0c>; - reg-shift = <0x02>; - }; - - phy@fee10000 { - rockchip,pipe-grf = <0x76>; - clock-names = "refclk\0apbclk\0phpclk"; - assigned-clocks = <0x02 0x2be>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x02 0x20006 0x02 0x4d7>; - clocks = <0x02 0x2be 0x02 0x186 0x02 0x166>; - #phy-cells = <0x01>; - compatible = "rockchip,rk3588-naneng-combphy"; - status = "disabled"; - rockchip,pipe-phy-grf = <0x1cb>; - reg = <0x00 0xfee10000 0x00 0x100>; - phandle = <0x1bc>; - reset-names = "combphy-apb\0combphy"; - rockchip,pcie1ln-sel-bits = <0x100 0x00 0x00 0x00>; - }; - - can@fea60000 { - pinctrl-names = "default"; - pinctrl-0 = <0x146>; - clock-names = "baudclk\0apb_pclk"; - assigned-clocks = <0x02 0x72>; - assigned-clock-rates = <0xbebc200>; - resets = <0x02 0xbb 0x02 0xba>; - interrupts = <0x00 0x156 0x04>; - clocks = <0x02 0x72 0x02 0x71>; - compatible = "rockchip,can-2.0"; - status = "okay"; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - reg = <0x00 0xfea60000 0x00 0x1000>; - phandle = <0x2a1>; - reset-names = "can\0can-apb"; - }; - - pdm@fe4c0000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x140 0x141>; - pinctrl-0 = <0x13b 0x13c 0x13d 0x13e>; - clock-names = "pdm_clk\0pdm_hclk"; - assigned-clocks = <0x02 0x3b>; - assigned-clock-parents = <0x02 0x05>; - clocks = <0x02 0x3b 0x02 0x3a>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-pdm"; - pinctrl-1 = <0x13f>; - status = "disabled"; - reg = <0x00 0xfe4c0000 0x00 0x1000>; - phandle = <0x29b>; - dmas = <0xf1 0x04>; - }; - - rkcif-mipi-lvds3-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x57>; - phandle = <0x239>; - }; - - qos@fdf66e00 { - compatible = "syscon"; - reg = <0x00 0xfdf66e00 0x00 0x20>; - phandle = <0x9a>; - }; - - usb@fc800000 { - power-domains = <0x60 0x1f>; - phy-names = "usb2-phy"; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - companion = <0x6b>; - interrupts = <0x00 0xd7 0x04>; - clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; - compatible = "rockchip,rk3588-ehci\0generic-ehci"; - status = "okay"; - phys = <0x6c>; - reg = <0x00 0xfc800000 0x00 0x40000>; - phandle = <0x254>; - }; - - i2c@fd880000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x77>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xc0022 0x02 0xc0021>; - interrupts = <0x00 0x13d 0x04>; - clocks = <0x02 0x287 0x02 0x286>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfd880000 0x00 0x1000>; - phandle = <0x25f>; - reset-names = "i2c\0apb"; - - hym8563@51 { - pinctrl-names = "default"; - clock-output-names = "hym8563"; - pinctrl-0 = <0x7a>; - wakeup-source; - interrupts = <0x08 0x08>; - #clock-cells = <0x00>; - interrupt-parent = <0x7b>; - clock-frequency = <0x8000>; - compatible = "haoyu,hym8563"; - status = "okay"; - reg = <0x51>; - phandle = <0x1e4>; - }; - - rk8602@42 { - regulator-max-microvolt = <0x100590>; - regulator-boot-on; - rockchip,suspend-voltage-selector = <0x01>; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_cpu_big0_s0"; - regulator-ramp-delay = <0x8fc>; - compatible = "rockchip,rk8602"; - reg = <0x42>; - phandle = <0x18>; - vin-supply = <0x78>; - regulator-compatible = "rk860x-reg"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk8603@43 { - regulator-max-microvolt = <0x100590>; - regulator-boot-on; - rockchip,suspend-voltage-selector = <0x01>; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_cpu_big1_s0"; - regulator-ramp-delay = <0x8fc>; - compatible = "rockchip,rk8603"; - reg = <0x43>; - phandle = <0x1c>; - vin-supply = <0x78>; - regulator-compatible = "rk860x-reg"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - pc9202@3c { - index = <0x00>; - compatible = "firefly,pc9202"; - status = "okay"; - wd-en-gpio = <0x79 0x15 0x00>; - driver-names = "wdt_core"; - reg = <0x3c>; - }; - }; - - rkcif-mipi-lvds3-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x57>; - phandle = <0x237>; - }; - - serial@fd890000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x7d>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14b 0x04>; - clocks = <0x02 0x2ae 0x02 0x2af>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfd890000 0x00 0x100>; - phandle = <0x260>; - dmas = <0x7c 0x06 0x7c 0x07>; - reg-shift = <0x02>; - }; - - qos@fdf70000 { - compatible = "syscon"; - reg = <0x00 0xfdf70000 0x00 0x20>; - phandle = <0x85>; - }; - - gpu-opp-table { - rockchip,pvtm-offset = <0x1c>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,pvtm-hw = <0x04>; - nvmem-cells = <0x63 0x64 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; - rockchip,pvtm-thermal-zone = "gpu-thermal"; - rockchip,high-temp-max-freq = "\0\f5"; - rockchip,opp-clocks = <0x02 0x114>; - rockchip,pvtm-freq = "\0\f5"; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0x65>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; - phandle = <0x61>; - rockchip,pvtm-temp-prop = <0xffffff79 0xffffff79>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0x61a80>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-j-m-700000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x29b92700>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-300000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x11e1a300>; - opp-supported-hw = <0xf9 0xffff>; - }; - - opp-500000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x1dcd6500>; - opp-supported-hw = <0xf9 0xffff>; - }; - - opp-m-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-supported-hw = <0x02 0xffff>; - }; - - opp-j-850000000 { - opp-microvolt = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-hz = <0x00 0x32a9f880>; - opp-supported-hw = <0x04 0xffff>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L3 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - }; - - opp-j-m-400000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x17d78400>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-700000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - opp-hz = <0x00 0x29b92700>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-900000000 { - opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-hz = <0x00 0x35a4e900>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - }; - - opp-m-1000000000 { - opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - opp-hz = <0x00 0x3b9aca00>; - opp-supported-hw = <0x02 0xffff>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - }; - - opp-400000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x17d78400>; - opp-supported-hw = <0xf9 0xffff>; - }; - - opp-j-m-300000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x11e1a300>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-600000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - }; - - opp-m-900000000 { - opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-hz = <0x00 0x35a4e900>; - opp-supported-hw = <0x02 0xffff>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - }; - - opp-1000000000 { - opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - opp-hz = <0x00 0x3b9aca00>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - }; - - opp-j-m-500000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x1dcd6500>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L4 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L2 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L3 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; - opp-microvolt-L1 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - }; - }; - - csi2-dphy1-hw@fedc8000 { - clock-names = "pclk"; - resets = <0x02 0x19 0x02 0x18>; - clocks = <0x02 0x10d>; - compatible = "rockchip,rk3588-csi2-dphy-hw"; - status = "okay"; - rockchip,grf = <0x193>; - reg = <0x00 0xfedc8000 0x00 0x8000>; - phandle = <0x2e>; - reset-names = "srst_csiphy1\0srst_p_csiphy1"; - rockchip,sys_grf = <0xc8>; - }; - - hdcp@fde40000 { - power-domains = <0x60 0x19>; - clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; - resets = <0x02 0x37f 0x02 0x37d 0x02 0x37c 0x02 0x37b 0x02 0x381>; - interrupts = <0x00 0x9f 0x04>; - clocks = <0x02 0x1ed 0x02 0x1ef 0x02 0x1ee 0x02 0x1ec 0x02 0x1f1 0x02 0x1f2>; - compatible = "rockchip,rk3588-hdcp"; - status = "disabled"; - reg = <0x00 0xfde40000 0x00 0x80>; - phandle = <0x285>; - reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; - rockchip,vo-grf = <0xf5>; - }; - - iommu@fdbac800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x7f 0x04>; - clocks = <0x02 0x1b2 0x02 0x1b3>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpege3_mmu"; - reg = <0x00 0xfdbac800 0x00 0x40>; - phandle = <0xc0>; - }; - - qos@fdf40400 { - compatible = "syscon"; - reg = <0x00 0xfdf40400 0x00 0x20>; - phandle = <0xa2>; - }; - - rga@fdb70000 { - power-domains = <0x60 0x1e>; - iommus = <0xba>; - clock-names = "aclk_rga3_1\0hclk_rga3_1\0clk_rga3_1"; - interrupts = <0x00 0x73 0x04>; - clocks = <0x02 0x18a 0x02 0x189 0x02 0x18b>; - compatible = "rockchip,rga3_core1"; - status = "okay"; - interrupt-names = "rga3_core1_irq"; - reg = <0x00 0xfdb70000 0x00 0x1000>; - phandle = <0x26a>; - }; - - spi@feb00000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x02>; - pinctrl-0 = <0x14e 0x14f 0x150>; - clock-names = "spiclk\0apb_pclk"; - interrupts = <0x00 0x146 0x04>; - clocks = <0x02 0xa3 0x02 0x9e>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "disabled"; - reg = <0x00 0xfeb00000 0x00 0x1000>; - phandle = <0x2ab>; - dmas = <0x7c 0x0e 0x7c 0x0f>; - }; - - pcie@fe170000 { - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x20 0x2f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x08>; - resets = <0x02 0x20f 0x02 0x21e>; - interrupts = <0x00 0xf3 0x04 0x00 0xf2 0x04 0x00 0xf1 0x04 0x00 0xf0 0x04 0x00 0xef 0x04>; - clocks = <0x02 0x150 0x02 0x155 0x02 0x14b 0x02 0x15b 0x02 0x160 0x02 0x2c4>; - interrupt-map = <0x00 0x00 0x00 0x01 0x1bb 0x00 0x00 0x00 0x00 0x02 0x1bb 0x01 0x00 0x00 0x00 0x03 0x1bb 0x02 0x00 0x00 0x00 0x04 0x1bb 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x02>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - num-lanes = <0x01>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf2000000 0x00 0xf2000000 0x00 0x100000 0x81000000 0x00 0xf2100000 0x00 0xf2100000 0x00 0x100000 0x82000000 0x00 0xf2200000 0x00 0xf2200000 0x00 0xe00000 0xc3000000 0x09 0x80000000 0x09 0x80000000 0x00 0x40000000>; - msi-map = <0x2000 0x106 0x2000 0x1000>; - #interrupt-cells = <0x01>; - status = "disabled"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x1bc 0x02>; - num-viewport = <0x04>; - reg = <0x00 0xfe170000 0x00 0x10000 0x0a 0x40800000 0x00 0x400000>; - linux,pci-domain = <0x02>; - phandle = <0x487>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x08>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0xf0 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x1bb>; - interrupt-controller; - }; - }; - - i2s@fe470000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x11b 0x11c>; - pinctrl-0 = <0x11b 0x11c 0x11d 0x11e>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x31 0x02 0x35>; - assigned-clock-parents = <0x02 0x05 0x02 0x05>; - resets = <0x02 0x77 0x02 0x7a>; - interrupts = <0x00 0xb4 0x04>; - clocks = <0x02 0x33 0x02 0x37 0x02 0x30>; - dma-names = "tx\0rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - pinctrl-1 = <0x11f>; - status = "okay"; - reg = <0x00 0xfe470000 0x00 0x1000>; - phandle = <0x1da>; - dmas = <0x7c 0x00 0x7c 0x01>; - reset-names = "tx-m\0rx-m"; - rockchip,clk-trcm = <0x01>; - }; - - syscon@fd594000 { - compatible = "rockchip,rk3588-litcore-grf\0syscon"; - reg = <0x00 0xfd594000 0x00 0x100>; - phandle = <0x22>; - }; - - csi2-dphy5 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x214>; - }; - - usb@fc840000 { - power-domains = <0x60 0x1f>; - phy-names = "usb2-phy"; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - interrupts = <0x00 0xd8 0x04>; - clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; - compatible = "rockchip,rk3588-ohci\0generic-ohci"; - status = "okay"; - phys = <0x6c>; - reg = <0x00 0xfc840000 0x00 0x40000>; - phandle = <0x6b>; - }; - - syscon@fd5b0000 { - compatible = "rockchip,rk3588-php-grf\0syscon"; - reg = <0x00 0xfd5b0000 0x00 0x1000>; - phandle = <0x76>; - }; - - rkcif-mipi-lvds2-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x55>; - phandle = <0x236>; - }; - - rkisp1-vir1 { - rockchip,hw = <0x5a>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x240>; - }; - - i2c@feaa0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x149>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb1 0x02 0xa9>; - interrupts = <0x00 0x13f 0x04>; - clocks = <0x02 0x8e 0x02 0x86>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "disabled"; - reg = <0x00 0xfeaa0000 0x00 0x1000>; - phandle = <0x2a5>; - reset-names = "i2c\0apb"; - }; - - dmc { - downdifferential = <0x14>; - clock-names = "dmc_clk"; - interrupts = <0x00 0x49 0x04>; - clocks = <0x0e 0x04>; - upthreshold = <0x28>; - center-supply = <0x42>; - devfreq-events = <0x40>; - compatible = "rockchip,rk3588-dmc"; - status = "disabled"; - interrupt-names = "complete"; - mem-supply = <0x43>; - phandle = <0x21f>; - operating-points-v2 = <0x41>; - system-status-level = <0x01 0x04 0x08 0x08 0x02 0x01 0x10 0x04 0x10000 0x04 0x80000 0x04 0x1000 0x08 0x4000 0x08 0x2000 0x08 0xc00 0x08 0x40000 0x08 0x200000 0x08>; - auto-freq-en = <0x01>; - }; - - hdmi1-sound { - rockchip,jack-det; - rockchip,cpu = <0x1e0>; - rockchip,codec = <0x1e1>; - rockchip,card-name = "rockchip-hdmi1"; - compatible = "rockchip,hdmi"; - status = "disabled"; - phandle = <0x4a8>; - rockchip,mclk-fs = <0x80>; - }; - - qos@fdf3d800 { - compatible = "syscon"; - reg = <0x00 0xfdf3d800 0x00 0x20>; - phandle = <0xb0>; - }; - - mipi-dcphy-dummy { - phandle = <0x223>; - }; - - jpege-core@fdbac000 { - power-domains = <0x60 0x15>; - iommus = <0xc0>; - rockchip,ccu = <0xbd>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1b2>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2d0 0x02 0x2d1>; - interrupts = <0x00 0x80 0x04>; - clocks = <0x02 0x1b2 0x02 0x1b3>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-jpege-core"; - status = "okay"; - interrupt-names = "irq_jpege3"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdbac000 0x00 0x400>; - phandle = <0x270>; - reset-names = "video_a\0video_h"; - }; - - iommu@fdce0800 { - power-domains = <0x60 0x1b>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x71 0x04>; - clocks = <0x02 0x1e4 0x02 0x1e5>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "cif_mmu"; - reg = <0x00 0xfdce0800 0x00 0x100 0x00 0xfdce0900 0x00 0x100>; - phandle = <0x50>; - }; - - qos@fdf35400 { - compatible = "syscon"; - reg = <0x00 0xfdf35400 0x00 0x20>; - phandle = <0x89>; - }; - - syscon@fd5a8000 { - clocks = <0x73>; - compatible = "rockchip,rk3588-vo-grf\0syscon"; - reg = <0x00 0xfd5a8000 0x00 0x100>; - phandle = <0xd8>; - }; - - dp0-sound { - rockchip,jack-det; - rockchip,cpu = <0x1d5>; - rockchip,codec = <0x1d6 0x01>; - rockchip,card-name = "rockchip-dp0"; - compatible = "rockchip,hdmi"; - status = "disabled"; - phandle = <0x49c>; - rockchip,mclk-fs = <0x200>; - }; - - rkcif-mipi-lvds4 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x1a1>; - }; - - usb@fc880000 { - power-domains = <0x60 0x1f>; - phy-names = "usb2-phy"; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - companion = <0x6e>; - interrupts = <0x00 0xda 0x04>; - clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; - compatible = "rockchip,rk3588-ehci\0generic-ehci"; - status = "okay"; - phys = <0x6f>; - reg = <0x00 0xfc880000 0x00 0x40000>; - phandle = <0x255>; - }; - - qos@fdf62000 { - compatible = "syscon"; - reg = <0x00 0xfdf62000 0x00 0x20>; - phandle = <0x8b>; - }; - - syscon@fd5f0000 { - compatible = "rockchip,rk3588-ioc\0syscon"; - reg = <0x00 0xfd5f0000 0x00 0x10000>; - phandle = <0x196>; - }; - - mipi1-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x225>; - }; - - hdmiphy@fed70000 { - clock-names = "ref\0apb"; - resets = <0x02 0x491 0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041 0x02 0x48f 0x02 0x490>; - clocks = <0x02 0x2b5 0x02 0x268>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-hdptx-phy-hdmi"; - status = "disabled"; - rockchip,grf = <0x1c7>; - reg = <0x00 0xfed70000 0x00 0x2000>; - phandle = <0x1ac>; - reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; - - clk-port { - #clock-cells = <0x00>; - status = "okay"; - phandle = <0x36>; - }; - }; - - i2c@fec80000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x178>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb5 0x02 0xad>; - interrupts = <0x00 0x143 0x04>; - clocks = <0x02 0x92 0x02 0x8a>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfec80000 0x00 0x1000>; - phandle = <0x2df>; - reset-names = "i2c\0apb"; - - imx415@37 { - power-domains = <0x60 0x1b>; - pinctrl-names = "default"; - pinctrl-0 = <0x180>; - clock-names = "xvclk"; - clocks = <0x02 0x100>; - firefly,clkout-enabled-index = <0x00>; - rockchip,camera-module-name = "CMK-OT2022-PX1"; - reset-gpios = <0x182 0x05 0x01>; - rockchip,camera-module-index = <0x00>; - compatible = "sony,imx415"; - rockchip,camera-module-facing = "back"; - power-gpios = <0x181 0x1d 0x00>; - reg = <0x37>; - rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20"; - phandle = <0x2e3>; - - port { - - endpoint { - data-lanes = <0x01 0x02 0x03 0x04>; - remote-endpoint = <0x184>; - phandle = <0x32>; - }; - }; - }; - - es8388@11 { - pinctrl-names = "default"; - pinctrl-0 = <0x17a>; - clock-names = "mclk"; - assigned-clocks = <0x179>; - assigned-clock-rates = <0xbb8000>; - clocks = <0x179>; - #sound-dai-cells = <0x00>; - compatible = "everest,es8388\0everest,es8323"; - status = "okay"; - reg = <0x11>; - phandle = <0x1db>; - }; - - XC7160b@1b { - power-domains = <0x60 0x1b>; - pinctrl-names = "default"; - pinctrl-0 = <0x180>; - clock-names = "xvclk"; - pwdn-gpios = <0xfe 0x04 0x00>; - clocks = <0x02 0x100>; - firefly,clkout-enabled-index = <0x00>; - rockchip,camera-module-name = "NC"; - reset-gpios = <0x182 0x05 0x00>; - rockchip,camera-module-index = <0x00>; - compatible = "firefly,xc7160"; - rockchip,camera-module-facing = "back"; - power-gpios = <0x181 0x1d 0x01>; - reg = <0x1b>; - rockchip,camera-module-lens-name = "NC"; - phandle = <0x2e2>; - - port { - - endpoint { - data-lanes = <0x01 0x02 0x03 0x04>; - remote-endpoint = <0x183>; - phandle = <0x31>; - }; - }; - }; - - fusb302@22 { - pinctrl-names = "default"; - pinctrl-0 = <0x17b>; - interrupts = <0x1b 0x08>; - vbus-supply = <0x17c>; - interrupt-parent = <0x7b>; - compatible = "fcs,fusb302"; - status = "disabled"; - reg = <0x22>; - phandle = <0x2e0>; - - connector { - sink-pdos = <0x4019064>; - power-role = "dual"; - source-pdos = <0x401912c>; - data-role = "dual"; - label = "USB-C"; - try-power-role = "sink"; - compatible = "usb-c-connector"; - op-sink-microwatt = <0xf4240>; - phandle = <0x2e1>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - - endpoint { - remote-endpoint = <0x17e>; - phandle = <0x18e>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - remote-endpoint = <0x17f>; - phandle = <0x18f>; - }; - }; - }; - - altmodes { - #address-cells = <0x01>; - #size-cells = <0x00>; - - altmode@0 { - svid = <0xff01>; - vdo = <0xffffffff>; - reg = <0x00>; - }; - }; - }; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - - endpoint@0 { - remote-endpoint = <0x17d>; - phandle = <0x68>; - }; - }; - }; - }; - }; - - syscon@fd5e8000 { - compatible = "rockchip,mipi-dcphy-grf\0syscon"; - reg = <0x00 0xfd5e8000 0x00 0x4000>; - phandle = <0x190>; - }; - - vbus5v0-typec-pwr-en-regulator { - gpio = <0x182 0x0c 0x00>; - enable-active-high; - regulator-name = "vbus5v0_typec_pwr_en"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x17c>; - }; - - mipi2-csi2-hw@fdd30000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x326>; - interrupts = <0x00 0x93 0x04 0x00 0x94 0x04>; - clocks = <0x02 0x1d1>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd30000 0x00 0x10000>; - phandle = <0x49>; - reset-names = "srst_csihost_p"; - }; - - spdif-rx@fde18000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x262>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x401>; - interrupts = <0x00 0xc9 0x04>; - clocks = <0x02 0x262 0x02 0x261>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; - status = "disabled"; - reg = <0x00 0xfde18000 0x00 0x1000>; - phandle = <0x480>; - dmas = <0x7c 0x17>; - reset-names = "spdifrx-m"; - }; - - syscon@fd5a2000 { - compatible = "rockchip,rk3588-npu-grf\0syscon"; - reg = <0x00 0xfd5a2000 0x00 0x100>; - phandle = <0xb6>; - }; - - rkisp0-vir3 { - rockchip,hw = <0x58>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x23e>; - }; - - qos@fdf66200 { - compatible = "syscon"; - reg = <0x00 0xfdf66200 0x00 0x20>; - phandle = <0x94>; - }; - - rkcif@fdce0000 { - power-domains = <0x60 0x1b>; - iommus = <0x50>; - nvmem-cells = <0x21 0xd4 0xd5>; - clock-names = "aclk_cif\0hclk_cif\0dclk_cif\0iclk_host0\0iclk_host1"; - reg-names = "cif_regs"; - assigned-clocks = <0x02 0x1e3>; - assigned-clock-rates = <0x23c34600>; - resets = <0x02 0x317 0x02 0x318 0x02 0x316 0x02 0x334 0x02 0x335 0x02 0x336 0x02 0x337 0x02 0x338 0x02 0x339>; - interrupts = <0x00 0x9b 0x04>; - clocks = <0x02 0x1e4 0x02 0x1e5 0x02 0x1e3 0x02 0x1cd 0x02 0x1ce>; - compatible = "rockchip,rk3588-cif"; - status = "okay"; - rockchip,grf = <0xc8>; - interrupt-names = "cif-intr"; - nvmem-cell-names = "specification\0package_low\0package_high"; - reg = <0x00 0xfdce0000 0x00 0x800>; - phandle = <0x4f>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_d\0rst_cif_host0\0rst_cif_host1\0rst_cif_host2\0rst_cif_host3\0rst_cif_host4\0rst_cif_host5"; - }; - - edp@fdec0000 { - power-domains = <0x60 0x1a>; - phy-names = "dp"; - clock-names = "dp\0pclk\0spdif\0hclk"; - resets = <0x02 0x3e1 0x02 0x3e0>; - interrupts = <0x00 0xa3 0x04>; - clocks = <0x02 0x211 0x02 0x210 0x02 0x212 0x05>; - compatible = "rockchip,rk3588-edp"; - status = "disabled"; - rockchip,grf = <0xd8>; - phys = <0x101>; - reg = <0x00 0xfdec0000 0x00 0x1000>; - phandle = <0x289>; - reset-names = "dp\0apb"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - remote-endpoint = <0x103>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe1>; - }; - - endpoint@2 { - remote-endpoint = <0x3b>; - status = "disabled"; - reg = <0x02>; - phandle = <0xe7>; - }; - - endpoint@0 { - remote-endpoint = <0x102>; - status = "disabled"; - reg = <0x00>; - phandle = <0xdb>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - phandle = <0x28a>; - }; - }; - }; - }; - - qos@fdf72400 { - compatible = "syscon"; - reg = <0x00 0xfdf72400 0x00 0x20>; - phandle = <0x84>; - }; - - dp@fde60000 { - power-domains = <0x60 0x19>; - clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; - assigned-clocks = <0x02 0x2cd>; - assigned-clock-rates = <0xf42400>; - resets = <0x02 0x389>; - interrupts = <0x00 0xa2 0x04>; - clocks = <0x02 0x1e7 0x02 0x2cd 0x02 0x201 0x02 0x20d 0x04 0x02 0x1eb>; - #sound-dai-cells = <0x01>; - compatible = "rockchip,rk3588-dp"; - status = "disabled"; - phys = <0x1a5>; - reg = <0x00 0xfde60000 0x00 0x4000>; - phandle = <0x1e3>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - remote-endpoint = <0x3e>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe3>; - }; - - endpoint@2 { - remote-endpoint = <0x1a7>; - status = "disabled"; - reg = <0x02>; - phandle = <0xeb>; - }; - - endpoint@0 { - remote-endpoint = <0x1a6>; - status = "disabled"; - reg = <0x00>; - phandle = <0xdd>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - phandle = <0x481>; - }; - }; - }; - }; - - vcc5v0-usbdcin { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_usbdcin"; - compatible = "regulator-fixed"; - phandle = <0x48c>; - vin-supply = <0x1cd>; - }; - - rkvdec-core@fdc48000 { - power-domains = <0x60 0x0f>; - iommus = <0xcc>; - rockchip,ccu = <0xca>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; - reg-names = "regs\0link"; - assigned-clocks = <0x02 0x195 0x02 0x198 0x02 0x196 0x02 0x197>; - rockchip,core-mask = <0x20002>; - rockchip,task-capacity = <0x10>; - rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; - assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; - resets = <0x02 0x293 0x02 0x292 0x02 0x298 0x02 0x296 0x02 0x297>; - interrupts = <0x00 0x61 0x04>; - rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; - clocks = <0x02 0x195 0x02 0x194 0x02 0x198 0x02 0x196 0x02 0x197>; - rockchip,rcb-min-width = <0x200>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x09>; - compatible = "rockchip,rkv-decoder-v2"; - status = "okay"; - interrupt-names = "irq_rkvdec1"; - rockchip,skip-pmu-idle-request; - rockchip,rcb-iova = <0xffe00000 0x100000>; - reg = <0x00 0xfdc48100 0x00 0x400 0x00 0xfdc48000 0x00 0x100>; - phandle = <0x275>; - reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; - rockchip,sram = <0xcd>; - }; - - vcc-1v1-nldo-s3 { - regulator-max-microvolt = <0x10c8e0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x10c8e0>; - regulator-name = "vcc_1v1_nldo_s3"; - compatible = "regulator-fixed"; - phandle = <0x15c>; - vin-supply = <0x78>; - }; - - power-management@fd8d8000 { - compatible = "rockchip,rk3588-pmu\0syscon\0simple-mfd"; - reg = <0x00 0xfd8d8000 0x00 0x400>; - phandle = <0xd9>; - - power-controller { - #address-cells = <0x01>; - #size-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-power-controller"; - status = "okay"; - phandle = <0x60>; - - power-domain@37 { - clocks = <0x02 0x199 0x02 0x140>; - reg = <0x25>; - pm_qos = <0xaf>; - }; - - power-domain@27 { - #address-cells = <0x01>; - clocks = <0x02 0x1e1 0x02 0x1e2 0x02 0x1df 0x02 0x1de 0x02 0x1e5 0x02 0x1e4>; - #size-cells = <0x00>; - reg = <0x1b>; - pm_qos = <0xa2 0xa3 0xa4 0xa5>; - - power-domain@29 { - clocks = <0x02 0x1d6 0x02 0x1d5 0x02 0x1d9 0x02 0x1d8 0x02 0x1e2>; - reg = <0x1d>; - pm_qos = <0xa8 0xa9>; - }; - - power-domain@28 { - clocks = <0x02 0x121 0x02 0x120 0x02 0x1e1 0x02 0x1e2>; - reg = <0x1c>; - pm_qos = <0xa6 0xa7>; - }; - }; - - power-domain@33 { - clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; - reg = <0x21>; - }; - - power-domain@13 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x0d>; - - power-domain@15 { - clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc 0x02 0x195>; - reg = <0x0f>; - pm_qos = <0x8c>; - }; - - power-domain@16 { - #address-cells = <0x01>; - clocks = <0x02 0x1c4 0x02 0x1c5>; - #size-cells = <0x00>; - reg = <0x10>; - pm_qos = <0x8d 0x8e 0x8f>; - - power-domain@17 { - clocks = <0x02 0x1c9 0x02 0x1c4 0x02 0x1c5 0x02 0x1ca>; - reg = <0x11>; - pm_qos = <0x90 0x91 0x92>; - }; - }; - - power-domain@14 { - clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190 0x02 0x18e>; - reg = <0x0e>; - pm_qos = <0x8b>; - }; - }; - - power-domain@31 { - clocks = <0x02 0x166 0x02 0x1a1 0x02 0x1a4 0x02 0x19d 0x02 0x19e 0x02 0x19f 0x02 0x1a0>; - reg = <0x1f>; - pm_qos = <0xab 0xac 0xad 0xae>; - }; - - power-domain@21 { - #address-cells = <0x01>; - clocks = <0x02 0x1be 0x02 0x1bd 0x02 0x1bc 0x02 0x1bf 0x02 0x1aa 0x02 0x1a9 0x02 0x1ac 0x02 0x1ad 0x02 0x1ae 0x02 0x1af 0x02 0x1b0 0x02 0x1b1 0x02 0x1b2 0x02 0x1b3 0x02 0x1b4 0x02 0x1b5 0x02 0x1b7 0x02 0x1b6>; - #size-cells = <0x00>; - reg = <0x15>; - pm_qos = <0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a>; - - power-domain@15 { - clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc>; - reg = <0x0f>; - pm_qos = <0x8c>; - }; - - power-domain@23 { - clocks = <0x02 0x4b 0x02 0x49 0x02 0x1be>; - reg = <0x17>; - pm_qos = <0x9b>; - }; - - power-domain@14 { - clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190>; - reg = <0x0e>; - pm_qos = <0x8b>; - }; - - power-domain@22 { - clocks = <0x02 0x1ba 0x02 0x1b9>; - reg = <0x16>; - pm_qos = <0x9c>; - }; - }; - - power-domain@38 { - clocks = <0x02 0x3c 0x02 0x3d>; - reg = <0x26>; - }; - - power-domain@8 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x08>; - - power-domain@9 { - #address-cells = <0x01>; - clocks = <0x02 0x12f 0x02 0x131 0x02 0x130 0x02 0x126>; - #size-cells = <0x00>; - reg = <0x09>; - pm_qos = <0x82 0x83 0x84>; - - power-domain@11 { - clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; - reg = <0x0b>; - pm_qos = <0x86>; - }; - - power-domain@10 { - clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; - reg = <0x0a>; - pm_qos = <0x85>; - }; - }; - }; - - power-domain@26 { - clocks = <0x02 0x22e 0x02 0x22f 0x02 0x22d 0x02 0x218 0x02 0x217 0x02 0x22b 0x02 0x264>; - reg = <0x1a>; - pm_qos = <0xa0 0xa1>; - }; - - power-domain@34 { - clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; - reg = <0x22>; - }; - - power-domain@24 { - #address-cells = <0x01>; - clocks = <0x02 0x26e 0x02 0x26d 0x02 0x270>; - #size-cells = <0x00>; - reg = <0x18>; - pm_qos = <0x9d 0x9e>; - - power-domain@25 { - clocks = <0x02 0x1f6 0x02 0x1f7 0x02 0x1f5 0x02 0x1f3 0x02 0x1ee 0x02 0x1ed 0x02 0x26d>; - reg = <0x19>; - pm_qos = <0x9f>; - }; - }; - - power-domain@12 { - clocks = <0x02 0x114 0x02 0x115 0x02 0x116>; - reg = <0x0c>; - pm_qos = <0x87 0x88 0x89 0x8a>; - }; - - power-domain@40 { - reg = <0x28>; - pm_qos = <0xb0>; - }; - - power-domain@30 { - clocks = <0x02 0x189 0x02 0x18a>; - reg = <0x1e>; - pm_qos = <0xaa>; - }; - }; - }; - - csi2-dphy3 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x212>; - }; - - qos@fdf3e000 { - compatible = "syscon"; - reg = <0x00 0xfdf3e000 0x00 0x20>; - phandle = <0xac>; - }; - - pwm@fd8b0030 { - pinctrl-names = "active"; - pinctrl-0 = <0x81>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x158 0x04 0x00 0x159 0x04>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfd8b0030 0x00 0x10>; - phandle = <0x264>; - }; - - rkcif-mipi-lvds2-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x55>; - phandle = <0x234>; - }; - - syscon@fd5cc000 { - compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; - reg = <0x00 0xfd5cc000 0x00 0x4000>; - phandle = <0x1c9>; - }; - - vdpu@fdb50400 { - power-domains = <0x60 0x15>; - iommus = <0xb7>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1c0>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2c8 0x02 0x2c9>; - interrupts = <0x00 0x77 0x04>; - clocks = <0x02 0x1c0 0x02 0x1c1>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x00>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-decoder-v2"; - rockchip,resetgroup-node = <0x00>; - status = "okay"; - interrupt-names = "irq_vdpu"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdb50400 0x00 0x400>; - phandle = <0x267>; - reset-names = "shared_video_a\0shared_video_h"; - }; - - qos@fdf60200 { - compatible = "syscon"; - reg = <0x00 0xfdf60200 0x00 0x20>; - phandle = <0x8e>; - }; - - pwm@febe0030 { - pinctrl-names = "active"; - pinctrl-0 = <0x170>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15c 0x04 0x00 0x15d 0x04>; - clocks = <0x02 0x57 0x02 0x56>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebe0030 0x00 0x10>; - phandle = <0x2d8>; - }; - - display-subsystem { - memory-region-names = "drm-logo"; - clock-names = "hdmi0_phy_pll\0hdmi1_phy_pll"; - ports = <0x34>; - memory-region = <0x37>; - clocks = <0x35 0x36>; - compatible = "rockchip,display-subsystem"; - phandle = <0x215>; - - route { - - route-edp1 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - logo,mode = "center"; - status = "disabled"; - phandle = <0x21a>; - }; - - route-hdmi1 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3f>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x21e>; - }; - - route-dp1 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3e>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x21d>; - }; - - route-dsi1 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3a>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x218>; - }; - - route-edp0 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3b>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x219>; - }; - - route-hdmi0 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3c>; - logo,mode = "center"; - status = "okay"; - phandle = <0x21b>; - }; - - route-dp0 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x38>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x216>; - }; - - route-rgb { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3d>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x21c>; - }; - - route-dsi0 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x39>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x217>; - }; - }; - }; - - serial@febc0000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x168>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x154 0x04>; - clocks = <0x02 0xd7 0x02 0xb3>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfebc0000 0x00 0x100>; - phandle = <0x2d1>; - dmas = <0xf2 0x0b 0xf2 0x0c>; - reg-shift = <0x02>; - }; - - adc-keys { - io-channels = <0x1d9 0x01>; - poll-interval = <0x64>; - keyup-threshold-microvolt = <0x1b7740>; - compatible = "adc-keys"; - status = "okay"; - phandle = <0x49e>; - io-channel-names = "buttons"; - - recovery-key { - press-threshold-microvolt = <0x4268>; - label = "F12"; - linux,code = <0x58>; - }; - }; - - pvtm@fdaf0000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-npu-pvtm"; - reg = <0x00 0xfdaf0000 0x00 0x100>; - - pvtm@3 { - clock-names = "clk\0pclk"; - resets = <0x02 0x1de 0x02 0x1dc>; - clocks = <0x02 0x12b 0x02 0x129>; - reg = <0x03>; - reset-names = "rts\0rst-p"; - }; - }; - - codec-digital@fe500000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default"; - pinctrl-0 = <0x144>; - clock-names = "dac\0pclk"; - resets = <0x02 0x84>; - clocks = <0x02 0x29 0x02 0x2f>; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-codec-digital\0rockchip,codec-digital-v1"; - status = "disabled"; - rockchip,grf = <0xc8>; - reg = <0x00 0xfe500000 0x00 0x1000>; - phandle = <0x29e>; - reset-names = "reset"; - rockchip,pwm-output-mode; - }; - - pwm@fd8b0020 { - pinctrl-names = "active"; - pinctrl-0 = <0x80>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x158 0x04>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfd8b0020 0x00 0x10>; - phandle = <0x263>; - }; - - rkcif-mipi-lvds2 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "okay"; - phandle = <0x55>; - - port { - - endpoint { - remote-endpoint = <0x54>; - phandle = <0x4e>; - }; - }; - }; - - pwm@febe0020 { - pinctrl-names = "active"; - pinctrl-0 = <0x16f>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15c 0x04>; - clocks = <0x02 0x57 0x02 0x56>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebe0020 0x00 0x10>; - phandle = <0x2d7>; - }; - - vcc-fan-pwr-en-regulator { - regulator-boot-on; - gpio = <0x182 0x0b 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_fan_pwr_en"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x4a4>; - }; - - iommu@fdba0800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x79 0x04>; - clocks = <0x02 0x1ac 0x02 0x1ad>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpege0_mmu"; - reg = <0x00 0xfdba0800 0x00 0x40>; - phandle = <0xbc>; - }; - - rkcif-mipi-lvds1-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x53>; - phandle = <0x231>; - }; - - arm-pmu { - interrupt-affinity = <0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d>; - interrupts = <0x01 0x07 0x08>; - compatible = "arm,armv8-pmuv3"; - phandle = <0x20c>; - }; - - pvtm@fda40000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-bigcore0-pvtm"; - reg = <0x00 0xfda40000 0x00 0x100>; - - pvtm@0 { - clock-names = "clk\0pclk"; - clocks = <0x02 0x2c6 0x02 0x15>; - reg = <0x00>; - }; - }; - - pwm@fd8b0010 { - pinctrl-names = "active"; - pinctrl-0 = <0x7f>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x158 0x04>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfd8b0010 0x00 0x10>; - phandle = <0x262>; - }; - - i2s@fddc0000 { - power-domains = <0x60 0x19>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x1f9>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x38d>; - interrupts = <0x00 0xb8 0x04>; - clocks = <0x02 0x1fb 0x02 0x1fb 0x02 0x1f0>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - rockchip,playback-only; - status = "disabled"; - reg = <0x00 0xfddc0000 0x00 0x1000>; - phandle = <0x27d>; - dmas = <0xf2 0x00>; - reset-names = "tx-m"; - }; - - qos@fdf61400 { - compatible = "syscon"; - reg = <0x00 0xfdf61400 0x00 0x20>; - phandle = <0x92>; - }; - - syscon@fd5d4000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5d4000 0x00 0x4000>; - phandle = <0x1c8>; - - usb2-phy@4000 { - clock-output-names = "usb480m_phy1"; - clock-names = "phyclk"; - resets = <0x02 0xc0048 0x02 0x489>; - interrupts = <0x00 0x18a 0x04>; - clocks = <0x02 0x2b5>; - #clock-cells = <0x00>; - rockchip,usbctrl-grf = <0x74>; - compatible = "rockchip,rk3588-usb2phy"; - status = "okay"; - reg = <0x4000 0x10>; - phandle = <0x1ca>; - reset-names = "phy\0apb"; - - otg-port { - phy-supply = <0x75>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x1a3>; - }; - }; - }; - - rkisp0-vir1 { - rockchip,hw = <0x58>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x23c>; - }; - - pwm@febe0010 { - pinctrl-names = "active"; - pinctrl-0 = <0x16e>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15c 0x04>; - clocks = <0x02 0x57 0x02 0x56>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebe0010 0x00 0x10>; - phandle = <0x2d6>; - }; - - thermal-zones { - phandle = <0x248>; - - bigcore1-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x02>; - phandle = <0x24d>; - }; - - soc-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x00>; - sustainable-power = <0x834>; - phandle = <0x249>; - - trips { - - trip-point-0 { - temperature = <0x124f8>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x24a>; - }; - - trip-point-1 { - temperature = <0x14c08>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x5e>; - }; - - soc-crit { - temperature = <0x1c138>; - hysteresis = <0x7d0>; - type = "critical"; - phandle = <0x24b>; - }; - }; - - cooling-maps { - - map0 { - trip = <0x5e>; - cooling-device = <0x06 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; - - map3 { - trip = <0x5e>; - cooling-device = <0x5f 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; - }; - }; - - npu-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x06>; - phandle = <0x251>; - }; - - center-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x04>; - phandle = <0x24f>; - }; - - gpu-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x05>; - phandle = <0x250>; - }; - - littlecore-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x03>; - phandle = <0x24e>; - }; - - bigcore0-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x01>; - phandle = <0x24c>; - }; - }; - - iommu@fdbdf000 { - power-domains = <0x60 0x10>; - rockchip,shootdown-entire; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x63 0x04 0x00 0x64 0x04>; - clocks = <0x02 0x1c5 0x02 0x1c4>; - rockchip,enable-cmd-retry; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "irq_rkvenc0_mmu0\0irq_rkvenc0_mmu1"; - reg = <0x00 0xfdbdf000 0x00 0x40 0x00 0xfdbdf040 0x00 0x40>; - phandle = <0xc2>; - }; - - serial@feb50000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x161>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14d 0x04>; - clocks = <0x02 0xbb 0x02 0xac>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeb50000 0x00 0x100>; - phandle = <0x2ca>; - dmas = <0x7c 0x0a 0x7c 0x0b>; - reg-shift = <0x02>; - }; - - iommu@fdcd0f00 { - power-domains = <0x60 0x1d>; - clock-names = "aclk\0iface\0pclk"; - interrupts = <0x00 0x8c 0x04>; - clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "disabled"; - interrupt-names = "fec0_mmu"; - reg = <0x00 0xfdcd0f00 0x00 0x100>; - phandle = <0xd2>; - }; - - vcc5v0-host { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - gpio = <0x182 0x02 0x00>; - regulator-always-on; - enable-active-high; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_host"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x75>; - vin-supply = <0x1dd>; - }; - - qos@fdf66a00 { - compatible = "syscon"; - reg = <0x00 0xfdf66a00 0x00 0x20>; - phandle = <0x98>; - }; - - phy@fed90000 { - clock-names = "refclk\0immortal\0pclk\0utmi"; - resets = <0x02 0x2f 0x02 0x30 0x02 0x31 0x02 0x32 0x02 0x484>; - clocks = <0x02 0x2b6 0x02 0x280 0x02 0x26a 0x1ca>; - compatible = "rockchip,rk3588-usbdp-phy"; - status = "okay"; - rockchip,dp-lane-mux = <0x02 0x03>; - reg = <0x00 0xfed90000 0x00 0x10000>; - phandle = <0x48b>; - rockchip,usb-grf = <0x74>; - reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; - rockchip,u2phy-grf = <0x1c8>; - rockchip,usbdpphy-grf = <0x1c9>; - rockchip,vo-grf = <0xf5>; - - dp-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x1a5>; - }; - - u3-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x1a4>; - }; - }; - - jpege-core@fdba0000 { - power-domains = <0x60 0x15>; - iommus = <0xbc>; - rockchip,ccu = <0xbd>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1ac>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2ca 0x02 0x2cb>; - interrupts = <0x00 0x7a 0x04>; - clocks = <0x02 0x1ac 0x02 0x1ad>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-jpege-core"; - status = "okay"; - interrupt-names = "irq_jpege0"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdba0000 0x00 0x400>; - phandle = <0x26d>; - reset-names = "video_a\0video_h"; - }; - - vcc5v0-sys { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_sys"; - compatible = "regulator-fixed"; - phandle = <0x78>; - vin-supply = <0x1cd>; - }; - - pwm@fd8b0000 { - pinctrl-names = "active"; - pinctrl-0 = <0x7e>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x158 0x04>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfd8b0000 0x00 0x10>; - phandle = <0x261>; - }; - - vop@fdd90000 { - power-domains = <0x60 0x18>; - iommus = <0xd6>; - rockchip,vop-grf = <0xd7>; - clock-names = "aclk_vop\0hclk_vop\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0pclk_vop\0dclk_src_vp0\0dclk_src_vp1\0dclk_src_vp2"; - reg-names = "regs\0gamma_lut"; - assigned-clocks = <0x02 0x270>; - assigned-clock-rates = <0x2cb41780>; - resets = <0x02 0x349 0x02 0x348 0x02 0x34d 0x02 0x350 0x02 0x351 0x02 0x352>; - interrupts = <0x00 0x9c 0x04>; - clocks = <0x02 0x270 0x02 0x26f 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x02 0x26e 0x02 0x271 0x02 0x272 0x02 0x273>; - compatible = "rockchip,rk3588-vop"; - rockchip,pmu = <0xd9>; - status = "okay"; - rockchip,grf = <0xc8>; - reg = <0x00 0xfdd90000 0x00 0x4200 0x00 0xfdd95000 0x00 0x1000>; - phandle = <0x278>; - rockchip,vo1-grf = <0xd8>; - reset-names = "axi\0ahb\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x34>; - - port@0 { - rockchip,primary-plane = <0x02>; - rockchip,plane-mask = <0x05>; - #address-cells = <0x01>; - assigned-clocks = <0x02 0x270>; - assigned-clock-rates = <0x2faf0800>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x279>; - - endpoint@5 { - remote-endpoint = <0xdf>; - reg = <0x05>; - phandle = <0x1ad>; - }; - - endpoint@3 { - remote-endpoint = <0xdd>; - reg = <0x03>; - phandle = <0x1a6>; - }; - - endpoint@1 { - remote-endpoint = <0xdb>; - reg = <0x01>; - phandle = <0x102>; - }; - - endpoint@4 { - remote-endpoint = <0xde>; - reg = <0x04>; - phandle = <0x1b0>; - }; - - endpoint@2 { - remote-endpoint = <0xdc>; - reg = <0x02>; - phandle = <0x3c>; - }; - - endpoint@0 { - remote-endpoint = <0xda>; - reg = <0x00>; - phandle = <0xf7>; - }; - }; - - port@3 { - rockchip,primary-plane = <0x09>; - rockchip,plane-mask = <0x280>; - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x03>; - phandle = <0x27c>; - - endpoint@1 { - remote-endpoint = <0xef>; - reg = <0x01>; - phandle = <0x3a>; - }; - - endpoint@2 { - remote-endpoint = <0xf0>; - reg = <0x02>; - phandle = <0x3d>; - }; - - endpoint@0 { - remote-endpoint = <0xee>; - reg = <0x00>; - phandle = <0x39>; - }; - }; - - port@1 { - rockchip,primary-plane = <0x03>; - rockchip,plane-mask = <0x0a>; - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x01>; - phandle = <0x27a>; - - endpoint@5 { - remote-endpoint = <0xe5>; - reg = <0x05>; - phandle = <0x3f>; - }; - - endpoint@3 { - remote-endpoint = <0xe3>; - reg = <0x03>; - phandle = <0x3e>; - }; - - endpoint@1 { - remote-endpoint = <0xe1>; - reg = <0x01>; - phandle = <0x103>; - }; - - endpoint@4 { - remote-endpoint = <0xe4>; - reg = <0x04>; - phandle = <0x1b1>; - }; - - endpoint@2 { - remote-endpoint = <0xe2>; - reg = <0x02>; - phandle = <0xff>; - }; - - endpoint@0 { - remote-endpoint = <0xe0>; - reg = <0x00>; - phandle = <0x38>; - }; - }; - - port@2 { - rockchip,primary-plane = <0x08>; - rockchip,plane-mask = <0x140>; - #address-cells = <0x01>; - assigned-clocks = <0x02 0x273>; - assigned-clock-parents = <0x02 0x04>; - #size-cells = <0x00>; - reg = <0x02>; - phandle = <0x27b>; - - endpoint@5 { - remote-endpoint = <0xeb>; - reg = <0x05>; - phandle = <0x1a7>; - }; - - endpoint@3 { - remote-endpoint = <0xe9>; - reg = <0x03>; - phandle = <0xf3>; - }; - - endpoint@1 { - remote-endpoint = <0xe7>; - reg = <0x01>; - phandle = <0x3b>; - }; - - endpoint@6 { - remote-endpoint = <0xec>; - reg = <0x06>; - phandle = <0x1b2>; - }; - - endpoint@4 { - remote-endpoint = <0xea>; - reg = <0x04>; - phandle = <0xf4>; - }; - - endpoint@2 { - remote-endpoint = <0xe8>; - reg = <0x02>; - phandle = <0x100>; - }; - - endpoint@0 { - remote-endpoint = <0xe6>; - reg = <0x00>; - phandle = <0xf8>; - }; - - endpoint@7 { - remote-endpoint = <0xed>; - reg = <0x07>; - phandle = <0x1ae>; - }; - }; - }; - }; - - csi2-dphy1 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x210>; - }; - - pwm@febe0000 { - pinctrl-names = "active"; - pinctrl-0 = <0x16d>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15c 0x04>; - clocks = <0x02 0x57 0x02 0x56>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebe0000 0x00 0x10>; - phandle = <0x2d5>; - }; - - clocks { - #address-cells = <0x02>; - #size-cells = <0x02>; - compatible = "simple-bus"; - ranges; - - hclk_nvm@fd7c087c { - clock-names = "link"; - clocks = <0x02 0x141>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c087c 0x00 0x10>; - phandle = <0x03>; - }; - - mclkin-i2s0 { - clock-output-names = "i2s0_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x204>; - }; - - hclk_rkvenc1_pre@fd7c08c0 { - clock-names = "link"; - clocks = <0x02 0x1c4>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08c0 0x00 0x10>; - phandle = <0x1fe>; - }; - - mclkout-i2s1@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s1_mclkout_to_io"; - clocks = <0x02 0x291>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x208>; - rockchip,bit-shift = <0x01>; - }; - - mclkout-i2s1@fd58a000 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s1m1_mclkout_to_io"; - clocks = <0x02 0x291>; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58a000 0x00 0x04>; - phandle = <0x209>; - rockchip,bit-shift = <0x06>; - }; - - aclk_hdcp0_pre@fd7c08dc { - clock-names = "link"; - clocks = <0x02 0x26c>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08dc 0x00 0x10>; - phandle = <0x1ff>; - }; - - xin32k { - clock-output-names = "xin32k"; - #clock-cells = <0x00>; - clock-frequency = <0x8000>; - compatible = "fixed-clock"; - phandle = <0x1f2>; - }; - - aclk_usb@fd7c08a8 { - clock-names = "link"; - clocks = <0x02 0x263>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a8 0x00 0x10>; - phandle = <0x6a>; - }; - - hclk_usb@fd7c08a8 { - clock-names = "link"; - clocks = <0x02 0x264>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a8 0x00 0x10>; - phandle = <0x1f5>; - }; - - hclk_vo0@fd7c08dc { - clock-names = "link"; - clocks = <0x02 0x26d>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08dc 0x00 0x10>; - phandle = <0x04>; - }; - - pclk_av1_pre@fd7c0910 { - clock-names = "link"; - clocks = <0x02 0x1be>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0910 0x00 0x10>; - phandle = <0x201>; - }; - - mclkout-i2s2@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s2_mclkout_to_io"; - clocks = <0x02 0x28>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x20a>; - rockchip,bit-shift = <0x02>; - }; - - aclk_vdpu_low_pre@fd7c08b0 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08b0 0x00 0x10>; - phandle = <0x1f4>; - }; - - mclkin-i2s3 { - clock-output-names = "i2s3_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x207>; - }; - - spll { - clock-output-names = "spll"; - #clock-cells = <0x00>; - clock-frequency = <0x29d7ab80>; - compatible = "fixed-clock"; - phandle = <0x1f1>; - }; - - xin24m { - clock-output-names = "xin24m"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - compatible = "fixed-clock"; - phandle = <0x1f3>; - }; - - aclk_av1_pre@fd7c0910 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0910 0x00 0x10>; - phandle = <0x202>; - }; - - pclk_vo0_grf@fd7c08dc { - clock-names = "link"; - clocks = <0x04>; - #clock-cells = <0x00>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08dc 0x00 0x04>; - phandle = <0x72>; - }; - - aclk_jpeg_decoder_pre@fd7c08b0 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08b0 0x00 0x10>; - phandle = <0x1fc>; - }; - - aclk_hdcp1_pre@fd7c08ec { - clock-names = "link"; - clocks = <0x02 0x263>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08ec 0x00 0x10>; - phandle = <0x200>; - }; - - mclkin-i2s1 { - clock-output-names = "i2s1_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x205>; - }; - - hclk_vo1@fd7c08ec { - clock-names = "link"; - clocks = <0x02 0x264>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08ec 0x00 0x10>; - phandle = <0x05>; - }; - - mclkout-i2s3@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s3_mclkout_to_io"; - clocks = <0x02 0x2e>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x20b>; - rockchip,bit-shift = <0x07>; - }; - - aclk_rkvdec0_pre@fd7c08a0 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a0 0x00 0x10>; - phandle = <0x1f8>; - }; - - aclk_isp1_pre@fd7c0868 { - clock-names = "link"; - clocks = <0x02 0x1e0>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0868 0x00 0x10>; - phandle = <0x1f7>; - }; - - pclk_vo1_grf@fd7c08ec { - clock-names = "link"; - clocks = <0x05>; - #clock-cells = <0x00>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08ec 0x00 0x04>; - phandle = <0x73>; - }; - - aclk_rkvdec1_pre@fd7c08a4 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a4 0x00 0x10>; - phandle = <0x1fa>; - }; - - hclk_rkvdec0_pre@fd7c08a0 { - clock-names = "link"; - clocks = <0x02 0x1be>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a0 0x00 0x10>; - phandle = <0x1f9>; - }; - - hclk_sdio_pre@fd7c092c { - clock-names = "link"; - clocks = <0x03>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c092c 0x00 0x10>; - phandle = <0x203>; - }; - - hclk_rkvdec1_pre@fd7c08a4 { - clock-names = "link"; - clocks = <0x02 0x1be>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a4 0x00 0x10>; - phandle = <0x1fb>; - }; - - hclk_isp1_pre@fd7c0868 { - clock-names = "link"; - clocks = <0x02 0x1e1>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0868 0x00 0x10>; - phandle = <0x1f6>; - }; - - mclkout-i2s0@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s0_mclkout_to_io"; - clocks = <0x02 0x39>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x179>; - rockchip,bit-shift = <0x00>; - }; - - mclkin-i2s2 { - clock-output-names = "i2s2_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x206>; - }; - - aclk_rkvenc1_pre@fd7c08c0 { - clock-names = "link"; - clocks = <0x02 0x1c5>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08c0 0x00 0x10>; - phandle = <0x1fd>; - }; - }; - - usb@fc8c0000 { - power-domains = <0x60 0x1f>; - phy-names = "usb2-phy"; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - interrupts = <0x00 0xdb 0x04>; - clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; - compatible = "rockchip,rk3588-ohci\0generic-ohci"; - status = "okay"; - phys = <0x6f>; - reg = <0x00 0xfc8c0000 0x00 0x40000>; - phandle = <0x6e>; - }; - - qos@fdf40000 { - compatible = "syscon"; - reg = <0x00 0xfdf40000 0x00 0x20>; - phandle = <0xa8>; - }; - - mipi0-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x224>; - }; - - cluster1-opp-table { - rockchip,pvtm-offset = <0x18>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,pvtm-hw = <0x06>; - nvmem-cells = <0x24 0x25 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; - rockchip,pvtm-thermal-zone = "soc-thermal"; - rockchip,pvtm-low-len-sel = <0x03>; - rockchip,high-temp-max-freq = <0x21b100>; - opp-shared; - rockchip,reboot-freq = <0x1b7740>; - rockchip,pvtm-freq = <0x188940>; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0x26>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; - phandle = <0x16>; - rockchip,idle-threshold-freq = <0x21b100>; - rockchip,pvtm-temp-prop = <0x10e 0x10e>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0xf6180>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-j-m-2016000000 { - opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - opp-hz = <0x00 0x7829b800>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - }; - - opp-1200000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1416000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x54667200>; - opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - opp-supported-hw = <0x06 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - }; - - opp-1008000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2256000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8677d400>; - opp-supported-hw = <0xf9 0x13>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1200000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1008000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-816000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2400000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8f0d1800>; - opp-supported-hw = <0xf9 0x80>; - clock-latency-ns = <0x9c40>; - }; - - opp-1800000000 { - opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2208000000 { - opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; - opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; - opp-microvolt-L2 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; - opp-hz = <0x00 0x839b6800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L3 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; - }; - - opp-1608000000 { - opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-408000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1800000000 { - opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - }; - - opp-2352000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8c30ac00>; - opp-supported-hw = <0xf9 0x48>; - clock-latency-ns = <0x9c40>; - }; - - opp-816000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1608000000 { - opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; - - opp-600000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2016000000 { - opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; - opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; - opp-hz = <0x00 0x7829b800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; - opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - }; - - opp-1416000000 { - opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-hz = <0x00 0x54667200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; - opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-408000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0xf9 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - }; - - opp-2304000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x89544000>; - opp-supported-hw = <0xf9 0x24>; - clock-latency-ns = <0x9c40>; - }; - }; - - mmc@fe2d0000 { - power-domains = <0x60 0x25>; - fifo-depth = <0x100>; - pinctrl-names = "default"; - pinctrl-0 = <0x119>; - clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; - interrupts = <0x00 0xcc 0x04>; - clocks = <0x02 0x199 0x02 0x19a 0x02 0x2c0 0x02 0x2c1>; - compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; - status = "disabled"; - reg = <0x00 0xfe2d0000 0x00 0x4000>; - phandle = <0x294>; - max-frequency = <0xbebc200>; - }; - - rkcif-mipi-lvds-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x52>; - phandle = <0x22e>; - }; - - serial@feb90000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x165>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x151 0x04>; - clocks = <0x02 0xcb 0x02 0xb0>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "okay"; - reg = <0x00 0xfeb90000 0x00 0x100>; - phandle = <0x2ce>; - dmas = <0xf1 0x0d 0xf1 0x0e>; - reg-shift = <0x02>; - }; - - i2s@fddf8000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x239>; - assigned-clock-parents = <0x02 0x05>; - rockchip,capture-only; - resets = <0x02 0x3c3>; - interrupts = <0x00 0xbb 0x04>; - clocks = <0x02 0x23c 0x02 0x23c 0x02 0x238>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - status = "okay"; - reg = <0x00 0xfddf8000 0x00 0x1000>; - phandle = <0x1ec>; - dmas = <0xf2 0x15>; - reset-names = "rx-m"; - }; - - phy@fee20000 { - rockchip,pipe-grf = <0x76>; - clock-names = "refclk\0apbclk\0phpclk"; - assigned-clocks = <0x02 0x2bf>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x02 0x20007 0x02 0x4d8>; - clocks = <0x02 0x2bf 0x02 0x187 0x02 0x166>; - #phy-cells = <0x01>; - compatible = "rockchip,rk3588-naneng-combphy"; - status = "disabled"; - rockchip,pipe-phy-grf = <0x195>; - reg = <0x00 0xfee20000 0x00 0x100>; - phandle = <0x70>; - reset-names = "combphy-apb\0combphy"; - rockchip,pcie1ln-sel-bits = <0x100 0x01 0x01 0x00>; - }; - - csi2-dphy0-hw@fedc0000 { - clock-names = "pclk"; - resets = <0x02 0x17 0x02 0x16>; - clocks = <0x02 0x10c>; - compatible = "rockchip,rk3588-csi2-dphy-hw"; - status = "okay"; - rockchip,grf = <0x192>; - reg = <0x00 0xfedc0000 0x00 0x8000>; - phandle = <0x2d>; - reset-names = "srst_csiphy0\0srst_p_csiphy0"; - rockchip,sys_grf = <0xc8>; - }; - - can@fea70000 { - pinctrl-names = "default"; - pinctrl-0 = <0x147>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x02 0xbd 0x02 0xbc>; - interrupts = <0x00 0x157 0x04>; - clocks = <0x02 0x74 0x02 0x73>; - compatible = "rockchip,can-2.0"; - status = "disabled"; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - reg = <0x00 0xfea70000 0x00 0x1000>; - phandle = <0x2a2>; - reset-names = "can\0can-apb"; - }; - - mailbox@fec60000 { - clock-names = "pclk_mailbox"; - interrupts = <0x00 0x3d 0x04 0x00 0x3e 0x04 0x00 0x3f 0x04 0x00 0x40 0x04>; - clocks = <0x02 0x4c>; - #mbox-cells = <0x01>; - compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; - status = "disabled"; - reg = <0x00 0xfec60000 0x00 0x200>; - phandle = <0x2dd>; - }; - - usbdrd3_1 { - #address-cells = <0x02>; - clock-names = "ref\0suspend\0bus"; - clocks = <0x02 0x1a6 0x02 0x1a5 0x02 0x1a4>; - #size-cells = <0x02>; - compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; - ranges; - status = "okay"; - phandle = <0x47a>; - - usb@fc400000 { - power-domains = <0x60 0x1f>; - snps,dis-u1-entry-quirk; - snps,dis_enblslpm_quirk; - phy-names = "usb2-phy\0usb3-phy"; - snps,dis-u2-freeclk-exists-quirk; - phy_type = "utmi_wide"; - resets = <0x02 0x2a7>; - interrupts = <0x00 0xdd 0x04>; - snps,dis-u2-entry-quirk; - compatible = "snps,dwc3"; - snps,parkmode-disable-hs-quirk; - snps,dis-del-phy-power-chg-quirk; - status = "okay"; - snps,parkmode-disable-ss-quirk; - phys = <0x1a3 0x1a4>; - reg = <0x00 0xfc400000 0x00 0x400000>; - phandle = <0x47b>; - dr_mode = "host"; - reset-names = "usb3-otg"; - snps,dis-tx-ipgap-linecheck-quirk; - }; - }; - - sata@fe210000 { - phy-names = "sata-phy"; - clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; - interrupts = <0x00 0x111 0x04>; - clocks = <0x02 0x171 0x02 0x16e 0x02 0x174 0x02 0x163 0x02 0x17e>; - compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; - status = "okay"; - interrupt-names = "hostc"; - phys = <0x108 0x01>; - reg = <0x00 0xfe210000 0x00 0x1000>; - phandle = <0x290>; - ports-implemented = <0x01>; - }; - - leds { - compatible = "gpio-leds"; - status = "okay"; - phandle = <0x497>; - - user { - linux,default-trigger = "ir-user-click"; - label = ":user"; - default-state = "off"; - phandle = <0x499>; - gpios = <0x182 0x03 0x00>; - }; - - power { - linux,default-trigger = "ir-power-click"; - label = ":power"; - default-state = "on"; - status = "disabled"; - phandle = <0x498>; - gpios = <0x7b 0x15 0x00>; - }; - }; - - rkcif-mipi-lvds5-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a2>; - phandle = <0x479>; - }; - - qos@fdf80000 { - compatible = "syscon"; - reg = <0x00 0xfdf80000 0x00 0x20>; - phandle = <0x9f>; - }; - - spdif-tx@fdde0000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x254>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc4 0x04>; - clocks = <0x02 0x257 0x02 0x253>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfdde0000 0x00 0x1000>; - phandle = <0x27e>; - dmas = <0xf1 0x07>; - }; - - qos@fdf35000 { - compatible = "syscon"; - reg = <0x00 0xfdf35000 0x00 0x20>; - phandle = <0x87>; - }; - - psci { - method = "smc"; - compatible = "arm,psci-1.0"; - }; - - rkcif-mipi-lvds { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x52>; - }; - - rga@fdb80000 { - power-domains = <0x60 0x15>; - clock-names = "aclk_rga2\0hclk_rga2\0clk_rga2"; - interrupts = <0x00 0x74 0x04>; - clocks = <0x02 0x1b7 0x02 0x1b6 0x02 0x1b8>; - compatible = "rockchip,rga2_core0"; - status = "okay"; - interrupt-names = "rga2_irq"; - reg = <0x00 0xfdb80000 0x00 0x1000>; - phandle = <0x26b>; - }; - - qos@fdf66800 { - compatible = "syscon"; - reg = <0x00 0xfdf66800 0x00 0x20>; - phandle = <0x97>; - }; - - spi@feb10000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x02>; - pinctrl-0 = <0x151 0x152 0x153>; - clock-names = "spiclk\0apb_pclk"; - interrupts = <0x00 0x147 0x04>; - clocks = <0x02 0xa4 0x02 0x9f>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "disabled"; - reg = <0x00 0xfeb10000 0x00 0x1000>; - phandle = <0x2ac>; - dmas = <0x7c 0x10 0x7c 0x11>; - }; - - rkcif-mipi-lvds4-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a1>; - phandle = <0x472>; - }; - - hdmi@fdea0000 { - power-domains = <0x60 0x1a>; - reg-io-width = <0x04>; - pinctrl-names = "default"; - phy-names = "hdmi"; - pinctrl-0 = <0x1a8 0x1a9 0x1aa 0x1ab>; - clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; - resets = <0x02 0x3d7 0x02 0x49d>; - interrupts = <0x00 0xad 0x04 0x00 0xae 0x04 0x00 0xaf 0x04 0x00 0xb0 0x04 0x00 0x169 0x04>; - clocks = <0x02 0x224 0x02 0x266 0x02 0x225 0x02 0x226 0x02 0x24c 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x36>; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-dw-hdmi"; - status = "disabled"; - rockchip,grf = <0xc8>; - phys = <0x1ac>; - reg = <0x00 0xfdea0000 0x00 0x10000 0x00 0xfdeb0000 0x00 0x10000>; - phandle = <0x1e1>; - reset-names = "ref\0hdp"; - rockchip,vo1_grf = <0xd8>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x482>; - - endpoint@1 { - remote-endpoint = <0x3f>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe5>; - }; - - endpoint@2 { - remote-endpoint = <0x1ae>; - status = "disabled"; - reg = <0x02>; - phandle = <0xed>; - }; - - endpoint@0 { - remote-endpoint = <0x1ad>; - status = "disabled"; - reg = <0x00>; - phandle = <0xdf>; - }; - }; - }; - }; - - pcie@fe180000 { - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x30 0x3f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x08>; - resets = <0x02 0x210 0x02 0x21f>; - interrupts = <0x00 0xf8 0x04 0x00 0xf7 0x04 0x00 0xf6 0x04 0x00 0xf5 0x04 0x00 0xf4 0x04>; - clocks = <0x02 0x151 0x02 0x156 0x02 0x14c 0x02 0x15c 0x02 0x161 0x02 0x2c5>; - interrupt-map = <0x00 0x00 0x00 0x01 0x105 0x00 0x00 0x00 0x00 0x02 0x105 0x01 0x00 0x00 0x00 0x03 0x105 0x02 0x00 0x00 0x00 0x04 0x105 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x02>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - num-lanes = <0x01>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf3000000 0x00 0xf3000000 0x00 0x100000 0x81000000 0x00 0xf3100000 0x00 0xf3100000 0x00 0x100000 0x82000000 0x00 0xf3200000 0x00 0xf3200000 0x00 0xe00000 0xc3000000 0x09 0xc0000000 0x09 0xc0000000 0x00 0x40000000>; - msi-map = <0x3000 0x106 0x3000 0x1000>; - #interrupt-cells = <0x01>; - status = "disabled"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x70 0x02>; - num-viewport = <0x04>; - reg = <0x00 0xfe180000 0x00 0x10000 0x0a 0x40c00000 0x00 0x400000>; - linux,pci-domain = <0x03>; - phandle = <0x28c>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x08>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0xf5 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x105>; - interrupt-controller; - }; - }; - - i2s@fe480000 { - pinctrl-names = "default"; - pinctrl-0 = <0x120 0x121 0x122 0x123 0x124 0x125 0x126 0x127 0x128 0x129>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - resets = <0x02 0xc002a 0x02 0xc002d>; - interrupts = <0x00 0xb5 0x04>; - clocks = <0x02 0x28c 0x02 0x290 0x02 0x288>; - dma-names = "tx\0rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - status = "disabled"; - reg = <0x00 0xfe480000 0x00 0x1000>; - phandle = <0x1d1>; - dmas = <0x7c 0x02 0x7c 0x03>; - reset-names = "tx-m\0rx-m"; - rockchip,clk-trcm = <0x01>; - }; - - syscon@fd5c0000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfd5c0000 0x00 0x100>; - phandle = <0x1cb>; - }; - - i2c@feab0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x14a>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb2 0x02 0xaa>; - interrupts = <0x00 0x140 0x04>; - clocks = <0x02 0x8f 0x02 0x87>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfeab0000 0x00 0x1000>; - phandle = <0x2a6>; - reset-names = "i2c\0apb"; - - gpio@21 { - gpio-controller; - gpio-group-num = <0xc8>; - compatible = "nxp,pca9555"; - status = "okay"; - reg = <0x21>; - phandle = <0x182>; - #gpio-cells = <0x02>; - }; - }; - - iommu@fdcb7f00 { - power-domains = <0x60 0x1b>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x84 0x04>; - clocks = <0x02 0x1de 0x02 0x1df>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "isp0_mmu"; - reg = <0x00 0xfdcb7f00 0x00 0x100>; - phandle = <0xd0>; - }; - - qos@fdf3e600 { - compatible = "syscon"; - reg = <0x00 0xfdf3e600 0x00 0x20>; - phandle = <0xae>; - }; - - syscon@fd5b8000 { - compatible = "rockchip,pcie30-phy-grf\0syscon"; - reg = <0x00 0xfd5b8000 0x00 0x10000>; - phandle = <0x1cc>; - }; - - qos@fdf81200 { - compatible = "syscon"; - reg = <0x00 0xfdf81200 0x00 0x20>; - phandle = <0xa1>; - }; - - mipi5-csi2-hw@fdd60000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x329>; - interrupts = <0x00 0x99 0x04 0x00 0x9a 0x04>; - clocks = <0x02 0x1d4>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd60000 0x00 0x10000>; - phandle = <0x4c>; - reset-names = "srst_csihost_p"; - }; - - qos@fdf72000 { - compatible = "syscon"; - reg = <0x00 0xfdf72000 0x00 0x20>; - phandle = <0x82>; - }; - - timer@feae0000 { - clock-names = "pclk\0timer"; - interrupts = <0x00 0x121 0x04>; - clocks = <0x02 0x5c 0x02 0x5f>; - compatible = "rockchip,rk3588-timer\0rockchip,rk3288-timer"; - reg = <0x00 0xfeae0000 0x00 0x20>; - phandle = <0x2a9>; - }; - - rkcif-mipi-lvds-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x52>; - phandle = <0x22c>; - }; - - syscon@fd5b5000 { - compatible = "rockchip,mipi-dphy-grf\0syscon"; - reg = <0x00 0xfd5b5000 0x00 0x1000>; - phandle = <0x193>; - }; - - i2c@fec90000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x185>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb6 0x02 0xae>; - interrupts = <0x00 0x144 0x04>; - clocks = <0x02 0x93 0x02 0x8b>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "disabled"; - reg = <0x00 0xfec90000 0x00 0x1000>; - phandle = <0x2e4>; - reset-names = "i2c\0apb"; - }; - - avsd-plus@fdb51000 { - power-domains = <0x60 0x15>; - iommus = <0xb7>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1c0>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2c8 0x02 0x2c9>; - interrupts = <0x00 0x77 0x04>; - clocks = <0x02 0x1c0 0x02 0x1c1>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x00>; - rockchip,disable-auto-freq; - compatible = "rockchip,avs-plus-decoder"; - rockchip,resetgroup-node = <0x00>; - status = "disabled"; - interrupt-names = "irq_avsd"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdb51000 0x00 0x200>; - phandle = <0x268>; - reset-names = "shared_video_a\0shared_video_h"; - }; - - dp1-sound { - rockchip,jack-det; - rockchip,cpu = <0x1e2>; - rockchip,codec = <0x1e3 0x01>; - rockchip,card-name = "rockchip,dp1"; - compatible = "rockchip,hdmi"; - status = "disabled"; - phandle = <0x4a9>; - rockchip,mclk-fs = <0x200>; - }; - - mipi1-csi2-hw@fdd20000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x325>; - interrupts = <0x00 0x91 0x04 0x00 0x92 0x04>; - clocks = <0x02 0x1d0>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd20000 0x00 0x10000>; - phandle = <0x48>; - reset-names = "srst_csihost_p"; - }; - - iep@fdbb0000 { - power-domains = <0x60 0x15>; - iommus = <0xc1>; - clock-names = "aclk\0hclk\0sclk"; - assigned-clocks = <0x02 0x1aa>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2d5 0x02 0x2d4 0x02 0x2d6>; - interrupts = <0x00 0x75 0x04>; - clocks = <0x02 0x1aa 0x02 0x1a9 0x02 0x1ab>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x06>; - rockchip,disable-auto-freq; - compatible = "rockchip,iep-v2"; - status = "okay"; - interrupt-names = "irq_iep"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdbb0000 0x00 0x500>; - phandle = <0x271>; - reset-names = "rst_a\0rst_h\0rst_s"; - }; - - dsi@fde20000 { - power-domains = <0x60 0x18>; - #address-cells = <0x01>; - phy-names = "dcphy"; - clock-names = "pclk\0sys_clk"; - resets = <0x02 0x354>; - interrupts = <0x00 0xa7 0x04>; - clocks = <0x02 0x278 0x02 0x27a>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-mipi-dsi2"; - status = "disabled"; - rockchip,grf = <0xd7>; - phys = <0x2f>; - reg = <0x00 0xfde20000 0x00 0x10000>; - phandle = <0x281>; - reset-names = "apb"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x282>; - - endpoint@1 { - remote-endpoint = <0x39>; - status = "disabled"; - reg = <0x01>; - phandle = <0xee>; - }; - - endpoint@0 { - remote-endpoint = <0xf3>; - status = "disabled"; - reg = <0x00>; - phandle = <0xe9>; - }; - }; - }; - }; - - rkcif-mipi-lvds5-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a2>; - phandle = <0x477>; - }; - - edp@fded0000 { - power-domains = <0x60 0x1a>; - phy-names = "dp"; - clock-names = "dp\0pclk\0spdif\0hclk"; - resets = <0x02 0x3e4 0x02 0x3e3>; - interrupts = <0x00 0xa4 0x04>; - clocks = <0x02 0x214 0x02 0x213 0x02 0x215 0x05>; - compatible = "rockchip,rk3588-edp"; - status = "disabled"; - rockchip,grf = <0xd8>; - phys = <0x1af>; - reg = <0x00 0xfded0000 0x00 0x1000>; - phandle = <0x483>; - reset-names = "dp\0apb"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - remote-endpoint = <0x1b1>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe4>; - }; - - endpoint@2 { - remote-endpoint = <0x1b2>; - status = "disabled"; - reg = <0x02>; - phandle = <0xec>; - }; - - endpoint@0 { - remote-endpoint = <0x1b0>; - status = "disabled"; - reg = <0x00>; - phandle = <0xde>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - phandle = <0x484>; - }; - }; - }; - }; - - qos@fdf67000 { - compatible = "syscon"; - reg = <0x00 0xfdf67000 0x00 0x20>; - phandle = <0x9c>; - }; - - qos@fdf64000 { - compatible = "syscon"; - reg = <0x00 0xfdf64000 0x00 0x20>; - phandle = <0x9b>; - }; - - npu-opp-table { - rockchip,pvtm-offset = <0x50>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,init-freq = <0xf4240>; - rockchip,pvtm-hw = <0x06>; - nvmem-cells = <0xb4 0xb5 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; - rockchip,pvtm-thermal-zone = "npu-thermal"; - rockchip,high-temp-max-freq = "\0\f5"; - rockchip,opp-clocks = <0x02 0x12a 0x02 0x12f>; - rockchip,pvtm-freq = "\0\f5"; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0xb6>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; - phandle = <0xb1>; - rockchip,pvtm-temp-prop = <0xffffff8f 0xffffff8f>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0x7a120>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-j-m-700000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x29b92700>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-300000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x11e1a300>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-500000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x1dcd6500>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-j-m-400000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x17d78400>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-700000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x29b92700>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-j-m-950000000 { - opp-microvolt = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - opp-microvolt-L4 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L2 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-hz = <0x00 0x389fd980>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L5 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-microvolt-L3 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L1 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-900000000 { - opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-hz = <0x00 0x35a4e900>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - }; - - opp-j-m-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-400000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x17d78400>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-j-m-300000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x11e1a300>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-600000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-1000000000 { - opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - opp-hz = <0x00 0x3b9aca00>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - }; - - opp-j-m-500000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x1dcd6500>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L4 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; - opp-microvolt-L2 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L3 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; - }; - }; - - syscon@fd590000 { - compatible = "rockchip,rk3588-bigcore0-grf\0syscon"; - reg = <0x00 0xfd590000 0x00 0x100>; - phandle = <0x26>; - }; - - syscon@fd5dc000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5dc000 0x00 0x4000>; - phandle = <0x25e>; - - usb2-phy@c000 { - clock-output-names = "usb480m_phy3"; - clock-names = "phyclk"; - resets = <0x02 0xc004a 0x02 0x48b>; - interrupts = <0x00 0x188 0x04>; - clocks = <0x02 0x2b5>; - #clock-cells = <0x00>; - compatible = "rockchip,rk3588-usb2phy"; - status = "okay"; - reg = <0xc000 0x10>; - phandle = <0x6d>; - reset-names = "phy\0apb"; - - host-port { - phy-supply = <0x75>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x6f>; - }; - }; - }; - - pcie-clk3 { - regulator-boot-on; - regulator-always-on; - regulator-name = "pcie_clk3"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x496>; - gpios = <0xfe 0x09 0x01>; - }; - - pwm@febf0030 { - pinctrl-names = "active"; - pinctrl-0 = <0x174>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15e 0x04 0x00 0x15f 0x04>; - clocks = <0x02 0x5a 0x02 0x59>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebf0030 0x00 0x10>; - phandle = <0x2dc>; - }; - - hwspinlock@fe5a0000 { - compatible = "rockchip,hwspinlock"; - reg = <0x00 0xfe5a0000 0x00 0x100>; - phandle = <0x29f>; - #hwlock-cells = <0x01>; - }; - - rkcif-mipi-lvds4-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a1>; - phandle = <0x474>; - }; - - sram@10f000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "mmio-sram"; - ranges = <0x00 0x00 0x10f000 0x100>; - reg = <0x00 0x10f000 0x00 0x100>; - - sram@0 { - compatible = "arm,scmi-shmem"; - reg = <0x00 0x100>; - phandle = <0x46>; - }; - }; - - hdmirx-controller@fdee0000 { - power-domains = <0x60 0x1a>; - pinctrl-names = "default"; - pinctrl-0 = <0x1b3 0x1b4>; - clock-names = "aclk\0audio\0cr_para\0pclk\0ref\0hclk_s_hdmirx\0hclk_vo1"; - reg-names = "hdmirx_regs"; - resets = <0x02 0x3d9 0x02 0x3da 0x02 0x3db 0x02 0x3b7>; - interrupts = <0x00 0xb1 0x04 0x00 0x1b4 0x04 0x00 0xb3 0x04>; - clocks = <0x02 0x21a 0x02 0x21f 0x02 0x2b2 0x02 0x21b 0x02 0x21c 0x02 0x232 0x05>; - hpd-trigger-level = <0x01>; - #sound-dai-cells = <0x01>; - compatible = "rockchip,rk3588-hdmirx-ctrler\0rockchip,hdmirx-ctrler"; - status = "disabled"; - rockchip,grf = <0xc8>; - interrupt-names = "cec\0hdmi\0dma"; - hdmirx-det-gpios = <0xfe 0x1d 0x01>; - reg = <0x00 0xfdee0000 0x00 0x6000>; - phandle = <0x1eb>; - reset-names = "rst_a\0rst_p\0rst_ref\0rst_biu"; - rockchip,vo1_grf = <0xd8>; - }; - - qos@fdf61000 { - compatible = "syscon"; - reg = <0x00 0xfdf61000 0x00 0x20>; - phandle = <0x90>; - }; - - qos@fdf40600 { - compatible = "syscon"; - reg = <0x00 0xfdf40600 0x00 0x20>; - phandle = <0xa4>; - }; - - syscon@fd588000 { - compatible = "rockchip,rk3588-pmu0-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd588000 0x00 0x2000>; - phandle = <0x25a>; - - reboot-mode { - mode-normal = <0x5242c300>; - mode-loader = <0x5242c301>; - mode-quiescent = <0x5242c30e>; - mode-bootloader = <0x5242c301>; - mode-recovery = <0x5242c303>; - mode-watchdog = <0x5242c308>; - mode-ums = <0x5242c30c>; - mode-fastboot = <0x5242c309>; - offset = <0x80>; - compatible = "syscon-reboot-mode"; - mode-winusb = <0x5242c30f>; - phandle = <0x25b>; - mode-charge = <0x5242c30b>; - mode-panic = <0x5242c307>; - }; - }; - - syscon@fd5a4000 { - compatible = "rockchip,rk3588-vop-grf\0syscon"; - reg = <0x00 0xfd5a4000 0x00 0x2000>; - phandle = <0xd7>; - }; - - iommu@fdb60f00 { - power-domains = <0x60 0x16>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x72 0x04>; - clocks = <0x02 0x1ba 0x02 0x1b9>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "rga3_0_mmu"; - reg = <0x00 0xfdb60f00 0x00 0x100>; - phandle = <0xb9>; - }; - - pwm@febf0020 { - pinctrl-names = "active"; - pinctrl-0 = <0x173>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15e 0x04>; - clocks = <0x02 0x5a 0x02 0x59>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebf0020 0x00 0x10>; - phandle = <0x2db>; - }; - - rkispp@fdcd0000 { - power-domains = <0x60 0x1d>; - iommus = <0xd2>; - clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; - assigned-clocks = <0x02 0x1d6>; - assigned-clock-rates = <0x5f5e100>; - interrupts = <0x00 0x8b 0x04>; - clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; - compatible = "rockchip,rk3588-rkispp"; - status = "disabled"; - interrupt-names = "fec_irq"; - reg = <0x00 0xfdcd0000 0x00 0xf00>; - phandle = <0x5b>; - }; - - tsadc@fec00000 { - pinctrl-names = "gpio\0otpout"; - pinctrl-0 = <0x175>; - clock-names = "tsadc\0apb_pclk"; - rockchip,hw-tshut-polarity = <0x00>; - assigned-clocks = <0x02 0xaa>; - assigned-clock-rates = <0x1e8480>; - resets = <0x02 0xc1 0x02 0xc0>; - interrupts = <0x00 0x18d 0x04>; - rockchip,hw-tshut-mode = <0x00>; - clocks = <0x02 0xaa 0x02 0xa9>; - #thermal-sensor-cells = <0x01>; - compatible = "rockchip,rk3588-tsadc"; - pinctrl-1 = <0x176>; - status = "okay"; - reg = <0x00 0xfec00000 0x00 0x400>; - phandle = <0x5d>; - reset-names = "tsadc\0tsadc-apb"; - rockchip,hw-tshut-temp = <0x1d4c0>; - }; - - iommu@fdbb0800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x75 0x04>; - clocks = <0x02 0x1aa 0x02 0x1a9>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_iep_mmu"; - reg = <0x00 0xfdbb0800 0x00 0x100>; - phandle = <0xc1>; - }; - - phy@fed60000 { - clock-names = "ref\0apb"; - resets = <0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d>; - clocks = <0x02 0x2b5 0x02 0x267>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-hdptx-phy"; - status = "disabled"; - rockchip,grf = <0x18a>; - reg = <0x00 0xfed60000 0x00 0x2000>; - phandle = <0x101>; - reset-names = "apb\0init\0cmn\0lane"; - }; - - pvtm@fda50000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-bigcore1-pvtm"; - reg = <0x00 0xfda50000 0x00 0x100>; - - pvtm@1 { - clock-names = "clk\0pclk"; - clocks = <0x02 0x2c8 0x02 0x17>; - reg = <0x01>; - }; - }; - - csi2-dcphy0 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x20d>; - }; - - mailbox@fece0000 { - clock-names = "pclk_mailbox"; - interrupts = <0x00 0x4d 0x04 0x00 0x4e 0x04 0x00 0x4f 0x04 0x00 0x50 0x04>; - clocks = <0x02 0x4e>; - #mbox-cells = <0x01>; - compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; - status = "disabled"; - reg = <0x00 0xfece0000 0x00 0x200>; - phandle = <0x2e9>; - }; - - rkcif-mipi-lvds3-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x57>; - phandle = <0x23a>; - }; - - rkcif-mipi-lvds1-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x53>; - phandle = <0x22f>; - }; - - dfi@fe060000 { - rockchip,pmu_grf = <0x104>; - compatible = "rockchip,rk3588-dfi"; - status = "disabled"; - reg = <0x00 0xfe060000 0x00 0x10000>; - phandle = <0x40>; - }; - - iommu@fdca0000 { - power-domains = <0x60 0x17>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x6d 0x04>; - clocks = <0x02 0x49 0x02 0x4b>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-av1"; - status = "okay"; - interrupt-names = "irq_av1d_mmu"; - reg = <0x00 0xfdca0000 0x00 0x600>; - phandle = <0xce>; - }; - - mipi5-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x229>; - }; - - qos@fdf35600 { - compatible = "syscon"; - reg = <0x00 0xfdf35600 0x00 0x20>; - phandle = <0x8a>; - }; - - syscon@fd5e4000 { - compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; - reg = <0x00 0xfd5e4000 0x00 0x100>; - phandle = <0x1c7>; - }; - - iommu@fdba8800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x7d 0x04>; - clocks = <0x02 0x1b0 0x02 0x1b1>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpege2_mmu"; - reg = <0x00 0xfdba8800 0x00 0x40>; - phandle = <0xbf>; - }; - - mpp-srv { - rockchip,resetgroup-count = <0x01>; - rockchip,taskqueue-count = <0x0c>; - compatible = "rockchip,mpp-service"; - status = "okay"; - phandle = <0xb8>; - }; - - cspmu@fd10c000 { - compatible = "rockchip,cspmu"; - reg = <0x00 0xfd10c000 0x00 0x1000 0x00 0xfd10d000 0x00 0x1000 0x00 0xfd10e000 0x00 0x1000 0x00 0xfd10f000 0x00 0x1000 0x00 0xfd12c000 0x00 0x1000 0x00 0xfd12d000 0x00 0x1000 0x00 0xfd12e000 0x00 0x1000 0x00 0xfd12f000 0x00 0x1000>; - phandle = <0x48e>; - }; - - pwm@febf0010 { - pinctrl-names = "active"; - pinctrl-0 = <0x172>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15e 0x04>; - clocks = <0x02 0x5a 0x02 0x59>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebf0010 0x00 0x10>; - phandle = <0x2da>; - }; - - iommu@fdbef000 { - power-domains = <0x60 0x11>; - rockchip,shootdown-entire; - interrupts = <0x00 0x66 0x04 0x00 0x67 0x04>; - clocks = <0x02 0x1ca 0x02 0x1c9>; - rockchip,enable-cmd-retry; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "irq_rkvenc1_mmu0\0irq_rkvenc1_mmu1"; - reg = <0x00 0xfdbef000 0x00 0x40 0x00 0xfdbef040 0x00 0x40>; - phandle = <0xc5>; - lock-names = "aclk\0iface"; - }; - - serial@feb60000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x162>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14e 0x04>; - clocks = <0x02 0xbf 0x02 0xad>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeb60000 0x00 0x100>; - phandle = <0x2cb>; - dmas = <0x7c 0x0c 0x7c 0x0d>; - reg-shift = <0x02>; - }; - - hdmiin-sound { - rockchip,jack-det; - rockchip,cpu = <0x1ec>; - rockchip,codec = <0x1eb 0x00>; - rockchip,bitclock-master = <0x1eb>; - rockchip,card-name = "rockchip,hdmiin"; - rockchip,format = "i2s"; - compatible = "rockchip,hdmi"; - phandle = <0x4ac>; - rockchip,frame-master = <0x1eb>; - rockchip,mclk-fs = <0x80>; - }; - - i2s@fddc8000 { - power-domains = <0x60 0x19>; - clock-names = "mclk_tx\0hclk"; - assigned-clocks = <0x02 0x1ff>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x391>; - interrupts = <0x00 0xbc 0x04>; - clocks = <0x02 0x201 0x02 0x1fe>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - rockchip,playback-only; - status = "disabled"; - reg = <0x00 0xfddc8000 0x00 0x1000>; - phandle = <0x47c>; - dmas = <0xf2 0x16>; - reset-names = "tx-m"; - }; - - pcie30-avdd0v75 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b0>; - regulator-name = "pcie30_avdd0v75"; - compatible = "regulator-fixed"; - phandle = <0x4a7>; - vin-supply = <0x1df>; - }; - - timer { - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - compatible = "arm,armv8-timer"; - }; - - rockchip-suspend { - rockchip,sleep-debug-en = <0x01>; - rockchip,sleep-mode-config = <0x5000604>; - compatible = "rockchip,pm-rk3588"; - status = "okay"; - rockchip,wakeup-config = <0x100>; - phandle = <0x246>; - }; - - decompress@fea80000 { - clock-names = "aclk\0dclk\0pclk"; - resets = <0x02 0x118>; - interrupts = <0x00 0x55 0x04>; - clocks = <0x02 0x75 0x02 0x77 0x02 0x76>; - compatible = "rockchip,hw-decompress"; - status = "disabled"; - reg = <0x00 0xfea80000 0x00 0x1000>; - phandle = <0x2a3>; - reset-names = "dresetn"; - }; - - dma-controller@fea30000 { - clock-names = "apb_pclk"; - interrupts = <0x00 0x58 0x04 0x00 0x59 0x04>; - clocks = <0x02 0x79>; - arm,pl330-periph-burst; - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xfea30000 0x00 0x4000>; - phandle = <0xf1>; - #dma-cells = <0x01>; - }; - - pwm@febf0000 { - pinctrl-names = "active"; - pinctrl-0 = <0x171>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15e 0x04>; - clocks = <0x02 0x5a 0x02 0x59>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebf0000 0x00 0x10>; - phandle = <0x2d9>; - }; - - iommu@fdcd8f00 { - power-domains = <0x60 0x1d>; - clock-names = "aclk\0iface\0pclk"; - interrupts = <0x00 0x8e 0x04>; - clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "disabled"; - interrupt-names = "fec1_mmu"; - reg = <0x00 0xfdcd8f00 0x00 0x100>; - phandle = <0xd3>; - }; - - spdif-tx@fddb0000 { - power-domains = <0x60 0x19>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x205>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc3 0x04>; - clocks = <0x02 0x209 0x02 0x204>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfddb0000 0x00 0x1000>; - phandle = <0x1d5>; - dmas = <0xf1 0x06>; - }; - - rkisp1-vir2 { - rockchip,hw = <0x5a>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x241>; - }; - - pcie-clk1 { - regulator-boot-on; - regulator-always-on; - regulator-name = "pcie_clk1"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x494>; - vin-supply = <0x1cd>; - gpios = <0x181 0x15 0x01>; - }; - - jpege-core@fdba8000 { - power-domains = <0x60 0x15>; - iommus = <0xbf>; - rockchip,ccu = <0xbd>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1b0>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2ce 0x02 0x2cf>; - interrupts = <0x00 0x7e 0x04>; - clocks = <0x02 0x1b0 0x02 0x1b1>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-jpege-core"; - status = "okay"; - interrupt-names = "irq_jpege2"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdba8000 0x00 0x400>; - phandle = <0x26f>; - reset-names = "video_a\0video_h"; - }; - - qos@fdf66400 { - compatible = "syscon"; - reg = <0x00 0xfdf66400 0x00 0x20>; - phandle = <0x95>; - }; - - spdif-tx1-sound { - simple-audio-card,name = "rockchip,spdif-tx1"; - compatible = "simple-audio-card"; - status = "disabled"; - phandle = <0x49d>; - simple-audio-card,mclk-fs = <0x80>; - - simple-audio-card,cpu { - sound-dai = <0x1d7>; - }; - - simple-audio-card,codec { - sound-dai = <0x1d8>; - }; - }; - - mmc@fe2e0000 { - mmc-hs400-enhanced-strobe; - clock-names = "core\0bus\0axi\0block\0timer"; - assigned-clocks = <0x02 0x13b 0x02 0x13c 0x02 0x13a>; - bus-width = <0x08>; - non-removable; - no-sdio; - assigned-clock-rates = <0xbebc200 0x16e3600 0xbebc200>; - resets = <0x02 0x1f6 0x02 0x1f4 0x02 0x1f5 0x02 0x1f7 0x02 0x1f8>; - mmc-hs400-1_8v; - interrupts = <0x00 0xcd 0x04>; - clocks = <0x02 0x13a 0x02 0x138 0x02 0x139 0x02 0x13b 0x02 0x13c>; - no-sd; - compatible = "rockchip,rk3588-dwcmshc\0rockchip,dwcmshc-sdhci"; - status = "okay"; - reg = <0x00 0xfe2e0000 0x00 0x10000>; - phandle = <0x295>; - max-frequency = <0xbebc200>; - reset-names = "core\0bus\0axi\0block\0timer"; - }; - - dma-controller@fed10000 { - clock-names = "apb_pclk"; - interrupts = <0x00 0x5a 0x04 0x00 0x5b 0x04>; - clocks = <0x02 0x7a>; - arm,pl330-periph-burst; - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xfed10000 0x00 0x4000>; - phandle = <0xf2>; - #dma-cells = <0x01>; - }; - - iommu@fc900000 { - interrupts = <0x00 0x171 0x04 0x00 0x173 0x04 0x00 0x176 0x04 0x00 0x16f 0x04>; - #iommu-cells = <0x01>; - compatible = "arm,smmu-v3"; - status = "disabled"; - interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; - reg = <0x00 0xfc900000 0x00 0x200000>; - phandle = <0x256>; - }; - - mailbox@fec70000 { - clock-names = "pclk_mailbox"; - interrupts = <0x00 0x45 0x04 0x00 0x46 0x04 0x00 0x47 0x04 0x00 0x48 0x04>; - clocks = <0x02 0x4d>; - #mbox-cells = <0x01>; - compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; - status = "disabled"; - reg = <0x00 0xfec70000 0x00 0x200>; - phandle = <0x2de>; - }; - - pcie@fe150000 { - power-domains = <0x60 0x22>; - vpcie3v3-supply = <0x1b8>; - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x00 0x0f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x10>; - resets = <0x02 0x20d 0x02 0x21c>; - interrupts = <0x00 0x107 0x04 0x00 0x106 0x04 0x00 0x105 0x04 0x00 0x104 0x04 0x00 0x103 0x04>; - clocks = <0x02 0x14e 0x02 0x153 0x02 0x149 0x02 0x158 0x02 0x15e 0x02 0x183>; - interrupt-map = <0x00 0x00 0x00 0x01 0x1b5 0x00 0x00 0x00 0x00 0x02 0x1b5 0x01 0x00 0x00 0x00 0x03 0x1b5 0x02 0x00 0x00 0x00 0x04 0x1b5 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x03>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - reset-gpios = <0x10d 0x0e 0x00>; - num-lanes = <0x01>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf0000000 0x00 0xf0000000 0x00 0x100000 0x81000000 0x00 0xf0100000 0x00 0xf0100000 0x00 0x100000 0x82000000 0x00 0xf0200000 0x00 0xf0200000 0x00 0xe00000 0xc3000000 0x09 0x00 0x09 0x00 0x00 0x40000000>; - msi-map = <0x00 0x1b6 0x00 0x1000>; - #interrupt-cells = <0x01>; - status = "okay"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x1b7>; - num-viewport = <0x08>; - reg = <0x00 0xfe150000 0x00 0x10000 0x0a 0x40000000 0x00 0x400000>; - linux,pci-domain = <0x00>; - phandle = <0x485>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x10>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0x104 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x1b5>; - interrupt-controller; - }; - }; - - rng@fe378000 { - clock-names = "hclk_trng"; - resets = <0x11a 0x30>; - interrupts = <0x00 0x190 0x04>; - clocks = <0x0e 0x0c>; - compatible = "rockchip,trngv1"; - status = "okay"; - reg = <0x00 0xfe378000 0x00 0x200>; - phandle = <0x297>; - reset-names = "reset"; - }; - - sata@fe220000 { - phy-names = "sata-phy"; - clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; - interrupts = <0x00 0x112 0x04>; - clocks = <0x02 0x172 0x02 0x16f 0x02 0x175 0x02 0x164 0x02 0x17f>; - compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; - status = "disabled"; - interrupt-names = "hostc"; - phys = <0x1bc 0x01>; - reg = <0x00 0xfe220000 0x00 0x1000>; - phandle = <0x48a>; - ports-implemented = <0x01>; - }; - - rkcif-mipi-lvds5 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x1a2>; - }; - - vcc-sata-pwr-en-regulator { - regulator-max-microvolt = <0x325aa0>; - regulator-boot-on; - gpio = <0x182 0x0c 0x00>; - regulator-always-on; - enable-active-high; - regulator-min-microvolt = <0x325aa0>; - regulator-name = "vcc_sata_pwr_en"; - startup-delay-us = <0x1388>; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4a3>; - vin-supply = <0x1cd>; - }; - - pwm-fan { - cooling-levels = <0x32 0x32 0x64 0x96 0xc8 0xff>; - rockchip,temp-trips = <0xc350 0x01 0xd6d8 0x02 0xea60 0x03 0xfde8 0x04 0x11170 0x05>; - compatible = "pwm-fan"; - phandle = <0x4ad>; - pwms = <0x1ed 0x00 0xc350 0x00>; - #cooling-cells = <0x02>; - fan-supply = <0x78>; - }; - - qos@fdf3e200 { - compatible = "syscon"; - reg = <0x00 0xfdf3e200 0x00 0x20>; - phandle = <0xab>; - }; - - spdif-tx@fe4e0000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default"; - pinctrl-0 = <0x142>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x3f>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc1 0x04>; - clocks = <0x02 0x41 0x02 0x3e>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfe4e0000 0x00 0x1000>; - phandle = <0x29d>; - dmas = <0x7c 0x05>; - }; - - vad@fe4d0000 { - rockchip,det-channel = <0x00>; - rockchip,audio-src = <0x00>; - clock-names = "hclk"; - reg-names = "vad"; - interrupts = <0x00 0xca 0x04>; - clocks = <0x02 0x2a0>; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-vad"; - status = "disabled"; - rockchip,mode = <0x00>; - reg = <0x00 0xfe4d0000 0x00 0x1000>; - phandle = <0x29c>; - }; - - jpegd@fdb90000 { - power-domains = <0x60 0x15>; - iommus = <0xbb>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1b4>; - rockchip,normal-rates = <0x23c34600 0x00>; - assigned-clock-rates = <0x23c34600>; - resets = <0x02 0x2d2 0x02 0x2d3>; - interrupts = <0x00 0x81 0x04>; - clocks = <0x02 0x1b4 0x02 0x1b5>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x01>; - compatible = "rockchip,rkv-jpeg-decoder-v1"; - status = "okay"; - interrupt-names = "irq_jpegd"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdb90000 0x00 0x400>; - phandle = <0x26c>; - reset-names = "video_a\0video_h"; - }; - - cpuinfo { - nvmem-cells = <0x2a 0x2b 0x2c>; - compatible = "rockchip,cpuinfo"; - nvmem-cell-names = "id\0cpu-version\0cpu-code"; - }; - - qos@fdf60400 { - compatible = "syscon"; - reg = <0x00 0xfdf60400 0x00 0x20>; - phandle = <0x8f>; - }; - - spi@feb20000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x01>; - pinctrl-0 = <0x154 0x155>; - clock-names = "spiclk\0apb_pclk"; - assigned-clocks = <0x02 0xa5>; - assigned-clock-rates = <0xbebc200>; - interrupts = <0x00 0x148 0x04>; - clocks = <0x02 0xa5 0x02 0xa0>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "okay"; - reg = <0x00 0xfeb20000 0x00 0x1000>; - phandle = <0x2ad>; - dmas = <0xf1 0x0f 0xf1 0x10>; - - rk806single@0 { - vcc11-supply = <0x15b>; - pinctrl-names = "default\0pmic-power-off"; - vcc12-supply = <0x78>; - vcc13-supply = <0x15c>; - vcc14-supply = <0x15c>; - pinctrl-0 = <0x156 0x157 0x158 0x159>; - interrupts = <0x07 0x08>; - spi-max-frequency = <0xf4240>; - interrupt-parent = <0x7b>; - low_voltage_threshold = <0xbb8>; - vcca-supply = <0x78>; - vcc1-supply = <0x78>; - pmic-reset-func = <0x01>; - vcc2-supply = <0x78>; - hotdie_temperture_threshold = <0x73>; - compatible = "rockchip,rk806"; - vcc3-supply = <0x78>; - pinctrl-1 = <0x15a>; - vcc4-supply = <0x78>; - vcc5-supply = <0x78>; - reg = <0x00>; - phandle = <0x2ae>; - vcc6-supply = <0x78>; - shutdown_voltage_threshold = <0xa8c>; - vcc7-supply = <0x78>; - vcc8-supply = <0x78>; - shutdown_temperture_threshold = <0xa0>; - vcc9-supply = <0x78>; - vcc10-supply = <0x78>; - - pinctrl_rk806 { - gpio-controller; - phandle = <0x2af>; - #gpio-cells = <0x02>; - - rk806_dvs2_rst { - function = "pin_fun3"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b4>; - }; - - rk806_dvs3_null { - function = "pin_fun0"; - pins = "gpio_pwrctrl3"; - phandle = <0x159>; - }; - - rk806_dvs3_dvs { - function = "pin_fun4"; - pins = "gpio_pwrctrl3"; - phandle = <0x2ba>; - }; - - rk806_dvs3_rst { - function = "pin_fun3"; - pins = "gpio_pwrctrl3"; - phandle = <0x2b9>; - }; - - rk806_dvs2_null { - function = "pin_fun0"; - pins = "gpio_pwrctrl2"; - phandle = <0x158>; - }; - - rk806_dvs1_pwrdn { - function = "pin_fun2"; - pins = "gpio_pwrctrl1"; - phandle = <0x15a>; - }; - - rk806_dvs1_slp { - function = "pin_fun1"; - pins = "gpio_pwrctrl1"; - phandle = <0x2b0>; - }; - - rk806_dvs1_null { - function = "pin_fun0"; - pins = "gpio_pwrctrl2"; - phandle = <0x157>; - }; - - rk806_dvs3_gpio { - function = "pin_fun5"; - pins = "gpio_pwrctrl3"; - phandle = <0x2bb>; - }; - - rk806_dvs2_gpio { - function = "pin_fun5"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b6>; - }; - - rk806_dvs2_slp { - function = "pin_fun1"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b2>; - }; - - rk806_dvs2_pwrdn { - function = "pin_fun2"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b3>; - }; - - rk806_dvs1_rst { - function = "pin_fun3"; - pins = "gpio_pwrctrl1"; - phandle = <0x2b1>; - }; - - rk806_dvs3_slp { - function = "pin_fun1"; - pins = "gpio_pwrctrl3"; - phandle = <0x2b7>; - }; - - rk806_dvs2_dvs { - function = "pin_fun4"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b5>; - }; - - rk806_dvs3_pwrdn { - function = "pin_fun2"; - pins = "gpio_pwrctrl3"; - phandle = <0x2b8>; - }; - }; - - pwrkey { - status = "okay"; - }; - - regulators { - - PLDO_REG2 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "vcc_1v8_s0"; - phandle = <0x177>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - DCDC_REG4 { - regulator-max-microvolt = <0xe7ef0>; - regulator-boot-on; - regulator-init-microvolt = <0xb71b0>; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_vdenc_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x2bc>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG2 { - regulator-max-microvolt = <0xe7ef0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_cpu_lit_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x12>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - NLDO_REG4 { - regulator-max-microvolt = <0xcf850>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xcf850>; - regulator-name = "vdd_0v85_s0"; - phandle = <0x2c6>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG9 { - regulator-boot-on; - regulator-always-on; - regulator-name = "vddq_ddr_s0"; - phandle = <0x2bf>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - NLDO_REG2 { - regulator-max-microvolt = <0xcf850>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xcf850>; - regulator-name = "vdd_ddr_pll_s0"; - phandle = <0x2c5>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xcf850>; - }; - }; - - PLDO_REG5 { - regulator-max-microvolt = <0x325aa0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "vccio_sd_s0"; - phandle = <0x118>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG7 { - regulator-max-microvolt = <0x1e8480>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1e8480>; - regulator-name = "vdd_2v0_pldo_s3"; - phandle = <0x15b>; - - regulator-state-mem { - regulator-suspend-microvolt = <0x1e8480>; - regulator-on-in-suspend; - }; - }; - - PLDO_REG3 { - regulator-max-microvolt = <0x124f80>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x124f80>; - regulator-name = "avdd_1v2_s0"; - phandle = <0x2c1>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG5 { - regulator-max-microvolt = <0xdbba0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xa4cb8>; - regulator-name = "vdd_ddr_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x42>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xcf850>; - }; - }; - - DCDC_REG10 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "vcc_1v8_s3"; - phandle = <0x2c0>; - - regulator-state-mem { - regulator-suspend-microvolt = <0x1b7740>; - regulator-on-in-suspend; - }; - }; - - PLDO_REG1 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "avcc_1v8_s0"; - phandle = <0x1de>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG3 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xa4cb8>; - regulator-name = "vdd_log_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x43>; - - regulator-state-mem { - regulator-suspend-microvolt = <0xb71b0>; - regulator-on-in-suspend; - }; - }; - - DCDC_REG1 { - regulator-max-microvolt = <0xe7ef0>; - regulator-boot-on; - regulator-enable-ramp-delay = <0x190>; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_gpu_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x62>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - NLDO_REG5 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b0>; - regulator-name = "vdd_0v75_s0"; - phandle = <0x2c7>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - NLDO_REG3 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b0>; - regulator-name = "avdd_0v75_s0"; - phandle = <0x1df>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - PLDO_REG6 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "pldo6_s3"; - phandle = <0x2c3>; - - regulator-state-mem { - regulator-suspend-microvolt = <0x1b7740>; - regulator-on-in-suspend; - }; - }; - - DCDC_REG8 { - regulator-max-microvolt = <0x325aa0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x325aa0>; - regulator-name = "vcc_3v3_s3"; - phandle = <0x2be>; - - regulator-state-mem { - regulator-suspend-microvolt = <0x325aa0>; - regulator-on-in-suspend; - }; - }; - - NLDO_REG1 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b0>; - regulator-name = "vdd_0v75_s3"; - phandle = <0x2c4>; - - regulator-state-mem { - regulator-suspend-microvolt = <0xb71b0>; - regulator-on-in-suspend; - }; - }; - - PLDO_REG4 { - regulator-max-microvolt = <0x325aa0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x325aa0>; - regulator-name = "vcc_3v3_s0"; - phandle = <0x2c2>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG6 { - regulator-boot-on; - regulator-always-on; - regulator-name = "vdd2_ddr_s3"; - phandle = <0x2bd>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - }; - }; - }; - - usbhost3_0 { - #address-cells = <0x02>; - clock-names = "ref\0suspend\0bus\0utmi\0php\0pipe"; - clocks = <0x02 0x179 0x02 0x178 0x02 0x177 0x02 0x17a 0x02 0x166 0x02 0x181>; - #size-cells = <0x02>; - compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; - ranges; - status = "disabled"; - phandle = <0x258>; - - usb@fcd00000 { - snps,dis_enblslpm_quirk; - phy-names = "usb3-phy"; - snps,dis-u2-freeclk-exists-quirk; - phy_type = "utmi_wide"; - resets = <0x02 0x237>; - interrupts = <0x00 0xde 0x04>; - snps,dis_rxdet_inp3_quirk; - compatible = "snps,dwc3"; - snps,parkmode-disable-hs-quirk; - snps,dis-del-phy-power-chg-quirk; - status = "disabled"; - snps,parkmode-disable-ss-quirk; - phys = <0x70 0x04>; - reg = <0x00 0xfcd00000 0x00 0x400000>; - phandle = <0x259>; - dr_mode = "host"; - reset-names = "usb3-host"; - snps,dis-tx-ipgap-linecheck-quirk; - }; - }; - - pcie@fe190000 { - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x40 0x4f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x08>; - resets = <0x02 0x211 0x02 0x220>; - interrupts = <0x00 0xfd 0x04 0x00 0xfc 0x04 0x00 0xfb 0x04 0x00 0xfa 0x04 0x00 0xf9 0x04>; - clocks = <0x02 0x152 0x02 0x157 0x02 0x14d 0x02 0x15d 0x02 0x162 0x02 0x182>; - interrupt-map = <0x00 0x00 0x00 0x01 0x107 0x00 0x00 0x00 0x00 0x02 0x107 0x01 0x00 0x00 0x00 0x03 0x107 0x02 0x00 0x00 0x00 0x04 0x107 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x02>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - num-lanes = <0x01>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf4000000 0x00 0xf4000000 0x00 0x100000 0x81000000 0x00 0xf4100000 0x00 0xf4100000 0x00 0x100000 0x82000000 0x00 0xf4200000 0x00 0xf4200000 0x00 0xe00000 0xc3000000 0x0a 0x00 0x0a 0x00 0x00 0x40000000>; - msi-map = <0x4000 0x106 0x4000 0x1000>; - #interrupt-cells = <0x01>; - status = "disabled"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x108 0x02>; - num-viewport = <0x04>; - reg = <0x00 0xfe190000 0x00 0x10000 0x0a 0x41000000 0x00 0x400000>; - linux,pci-domain = <0x04>; - phandle = <0x28d>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x08>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0xfa 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x107>; - interrupt-controller; - }; - }; - - rkcif-mipi-lvds3-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x57>; - phandle = <0x238>; - }; - - aliases { - i2c3 = "/i2c@feab0000"; - ethernet0 = "/ethernet@fe1b0000"; - pwm9 = "/pwm@febe0010"; - pwm14 = "/pwm@febf0020"; - spi2 = "/spi@feb20000"; - usbdp0 = "/phy@fed80000"; - gpio0 = "/pinctrl/gpio@fd8a0000"; - dsi1 = "/dsi@fde30000"; - hdmi1 = "/hdmi@fdea0000"; - serial7 = "/serial@feba0000"; - i2c1 = "/i2c@fea90000"; - pwm7 = "/pwm@febd0030"; - pwm12 = "/pwm@febf0000"; - jpege3 = "/jpege-core@fdbac000"; - spi0 = "/spi@feb00000"; - hdptx1 = "/phy@fed70000"; - csi2dphy5 = "/csi2-dphy5"; - serial5 = "/serial@feb80000"; - csi2dcphy1 = "/csi2-dcphy1"; - pwm5 = "/pwm@febd0010"; - mmc1 = "/mmc@fe2c0000"; - pwm10 = "/pwm@febe0020"; - jpege1 = "/jpege-core@fdba4000"; - rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; - i2c8 = "/i2c@feca0000"; - dp0 = "/dp@fde50000"; - csi2dphy3 = "/csi2-dphy3"; - serial3 = "/serial@feb60000"; - edp0 = "/edp@fdec0000"; - pwm3 = "/pwm@fd8b0030"; - hdcp1 = "/hdcp@fde70000"; - rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; - i2c6 = "/i2c@fec80000"; - csi2dphy1 = "/csi2-dphy1"; - serial1 = "/serial@feb40000"; - pwm1 = "/pwm@fd8b0010"; - rkvenc0 = "/rkvenc-core@fdbd0000"; - spi5 = "/spi@fe2b0000"; - gpio3 = "/pinctrl/gpio@fec40000"; - hdptxhdmi1 = "/hdmiphy@fed70000"; - rkcif_mipi_lvds0 = "/rkcif-mipi-lvds"; - i2c4 = "/i2c@feac0000"; - ethernet1 = "/ethernet@fe1c0000"; - rkvdec0 = "/rkvdec-core@fdc38000"; - pwm15 = "/pwm@febf0030"; - hdmirx0 = "/hdmirx-controller@fdee0000"; - spi3 = "/spi@feb30000"; - usbdp1 = "/phy@fed90000"; - gpio1 = "/pinctrl/gpio@fec20000"; - serial8 = "/serial@febb0000"; - i2c2 = "/i2c@feaa0000"; - pwm8 = "/pwm@febe0000"; - pwm13 = "/pwm@febf0010"; - spi1 = "/spi@feb10000"; - dsi0 = "/dsi@fde20000"; - hdmi0 = "/hdmi@fde80000"; - serial6 = "/serial@feb90000"; - i2c0 = "/i2c@fd880000"; - pwm6 = "/pwm@febd0020"; - mmc2 = "/mmc@fe2d0000"; - pwm11 = "/pwm@febe0030"; - jpege2 = "/jpege-core@fdba8000"; - hdptx0 = "/phy@fed60000"; - rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; - dp1 = "/dp@fde60000"; - csi2dphy4 = "/csi2-dphy4"; - serial4 = "/serial@feb70000"; - edp1 = "/edp@fded0000"; - csi2dcphy0 = "/csi2-dcphy0"; - pwm4 = "/pwm@febd0000"; - mmc0 = "/mmc@fe2e0000"; - jpege0 = "/jpege-core@fdba0000"; - rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; - i2c7 = "/i2c@fec90000"; - csi2dphy2 = "/csi2-dphy2"; - serial2 = "/serial@feb50000"; - pwm2 = "/pwm@fd8b0020"; - rkvenc1 = "/rkvenc-core@fdbe0000"; - gpio4 = "/pinctrl/gpio@fec50000"; - hdcp0 = "/hdcp@fde40000"; - rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; - i2c5 = "/i2c@fead0000"; - csi2dphy0 = "/csi2-dphy0"; - serial0 = "/serial@fd890000"; - rkvdec1 = "/rkvdec-core@fdc48000"; - pwm0 = "/pwm@fd8b0000"; - spi4 = "/spi@fecb0000"; - gpio2 = "/pinctrl/gpio@fec30000"; - hdptxhdmi0 = "/hdmiphy@fed60000"; - serial9 = "/serial@febc0000"; - }; - - spdif-tx@fdde8000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x259>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc5 0x04>; - clocks = <0x02 0x25c 0x02 0x258>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfdde8000 0x00 0x1000>; - phandle = <0x47d>; - dmas = <0xf1 0x08>; - }; - - i2s@fe490000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x12d 0x12e>; - pinctrl-0 = <0x12a 0x12b>; - clock-names = "i2s_clk\0i2s_hclk"; - assigned-clocks = <0x02 0x24>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xb6 0x04>; - clocks = <0x02 0x27 0x02 0x22>; - dma-names = "tx\0rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; - pinctrl-1 = <0x12c>; - status = "disabled"; - reg = <0x00 0xfe490000 0x00 0x1000>; - phandle = <0x298>; - dmas = <0xf1 0x00 0xf1 0x01>; - rockchip,clk-trcm = <0x01>; - }; - - syscon@fd5d0000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5d0000 0x00 0x4000>; - phandle = <0x18b>; - - usb2-phy@0 { - clock-output-names = "usb480m_phy0"; - clock-names = "phyclk"; - resets = <0x02 0xc0047 0x02 0x488>; - interrupts = <0x00 0x189 0x04>; - clocks = <0x02 0x2b5>; - #clock-cells = <0x00>; - rockchip,usbctrl-grf = <0x74>; - compatible = "rockchip,rk3588-usb2phy"; - status = "okay"; - reg = <0x00 0x10>; - phandle = <0x18d>; - reset-names = "phy\0apb"; - - otg-port { - #phy-cells = <0x00>; - rockchip,typec-vbus-det; - status = "okay"; - phandle = <0x66>; - }; - }; - }; - - i2c@feac0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x14b>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb3 0x02 0xab>; - interrupts = <0x00 0x141 0x04>; - clocks = <0x02 0x90 0x02 0x88>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfeac0000 0x00 0x1000>; - phandle = <0x2a7>; - reset-names = "i2c\0apb"; - - pc9202@3c { - pinctrl-names = "default"; - pinctrl-0 = <0x14c>; - index = <0x01>; - compatible = "firefly,pc9202"; - status = "okay"; - wd-en-gpio = <0x7b 0x14 0x00>; - driver-names = "wdt_base"; - reg = <0x3c>; - }; - }; - - rkcif-mipi-lvds5-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a2>; - phandle = <0x476>; - }; - - firmware { - - optee { - method = "smc"; - compatible = "linaro,optee-tz"; - phandle = <0x222>; - }; - - sdei { - method = "smc"; - compatible = "arm,sdei-1.0"; - phandle = <0x221>; - }; - - scmi { - shmem = <0x46>; - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "arm,scmi-smc"; - phandle = <0x220>; - arm,smc-id = <0x82000010>; - - protocol@16 { - #reset-cells = <0x01>; - reg = <0x16>; - phandle = <0x11a>; - }; - - protocol@14 { - assigned-clocks = <0x0e 0x00 0x0e 0x02 0x0e 0x03>; - assigned-clock-rates = <0x30a32c00 0x30a32c00 0x30a32c00>; - #clock-cells = <0x01>; - reg = <0x14>; - phandle = <0x0e>; - }; - }; - }; - - rkvenc-core@fdbd0000 { - power-domains = <0x60 0x10>; - iommus = <0xc2>; - rockchip,ccu = <0xc3>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - assigned-clocks = <0x02 0x1c5 0x02 0x1c6>; - rockchip,task-capacity = <0x08>; - rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; - assigned-clock-rates = <0x1dcd6500 0x2faf0800>; - resets = <0x02 0x2f5 0x02 0x2f4 0x02 0x2f6>; - interrupts = <0x00 0x65 0x04>; - clocks = <0x02 0x1c5 0x02 0x1c4 0x02 0x1c6>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x07>; - compatible = "rockchip,rkv-encoder-v2-core"; - status = "okay"; - interrupt-names = "irq_rkvenc0"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdbd0000 0x00 0x6000>; - phandle = <0x272>; - reset-names = "video_a\0video_h\0video_core"; - operating-points-v2 = <0xc4>; - }; - - iommu@fdcc7f00 { - power-domains = <0x60 0x1c>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x88 0x04>; - clocks = <0x02 0x120 0x02 0x121>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "disabled"; - interrupt-names = "isp1_mmu"; - reg = <0x00 0xfdcc7f00 0x00 0x100>; - phandle = <0xd1>; - }; - - rkcif-mipi-lvds-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x52>; - phandle = <0x22b>; - }; - - syscon@fd5c8000 { - compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; - reg = <0x00 0xfd5c8000 0x00 0x4000>; - phandle = <0x18c>; - }; - - gpu@fb000000 { - power-domains = <0x60 0x0c>; - downdifferential = <0x0a>; - mali-supply = <0x62>; - clock-names = "clk_mali\0clk_gpu_coregroup\0clk_gpu_stacks\0clk_gpu"; - assigned-clocks = <0x0e 0x05>; - assigned-clock-rates = <0xbebc200>; - interrupts = <0x00 0x5e 0x04 0x00 0x5d 0x04 0x00 0x5c 0x04>; - clocks = <0x0e 0x05 0x02 0x115 0x02 0x116 0x02 0x114>; - upthreshold = <0x1e>; - compatible = "arm,mali-bifrost"; - dynamic-power-coefficient = <0xba6>; - status = "okay"; - interrupt-names = "GPU\0MMU\0JOB"; - mem-supply = <0x62>; - reg = <0x00 0xfb000000 0x00 0x200000>; - phandle = <0x5f>; - operating-points-v2 = <0x61>; - #cooling-cells = <0x02>; - }; - - csi2-dphy4 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x213>; - }; - - mipi4-csi2-hw@fdd50000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x328>; - interrupts = <0x00 0x97 0x04 0x00 0x98 0x04>; - clocks = <0x02 0x1d3>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd50000 0x00 0x10000>; - phandle = <0x4b>; - reset-names = "srst_csihost_p"; - }; - - qos@fdf82000 { - compatible = "syscon"; - reg = <0x00 0xfdf82000 0x00 0x20>; - phandle = <0x9d>; - }; - - rkcif-mipi-lvds2-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x55>; - phandle = <0x235>; - }; - - rkisp1-vir0 { - rockchip,hw = <0x5a>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x23f>; - }; - - qos@fdf41100 { - compatible = "syscon"; - reg = <0x00 0xfdf41100 0x00 0x20>; - phandle = <0xa7>; - }; - - test-power { - status = "okay"; - }; - - usb-5v { - pinctrl-names = "default"; - regulator-boot-on; - gpio = <0xfe 0x03 0x00>; - pinctrl-0 = <0x1ef>; - regulator-always-on; - enable-active-high; - regulator-name = "usb_5v"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4b1>; - }; - - phy@feda0000 { - clock-names = "pclk\0ref"; - resets = <0x02 0xc0043 0x02 0x3e 0x02 0x3f 0x02 0xc0044>; - clocks = <0x02 0x108 0x02 0x2b6>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-mipi-dcphy"; - status = "okay"; - rockchip,grf = <0x190>; - reg = <0x00 0xfeda0000 0x00 0x10000>; - phandle = <0x2f>; - reset-names = "m_phy\0apb\0grf\0s_phy"; - }; - - mod-sleep-regulator { - pinctrl-names = "default"; - regulator-boot-on; - gpio = <0x7b 0x15 0x00>; - pinctrl-0 = <0x1ee>; - regulator-always-on; - enable-active-high; - regulator-name = "mod_sleep"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4ae>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - qos@fdf66c00 { - compatible = "syscon"; - reg = <0x00 0xfdf66c00 0x00 0x20>; - phandle = <0x99>; - }; - - crypto@fe370000 { - clock-names = "aclk\0hclk\0sclk\0pka"; - resets = <0x11a 0x0f>; - interrupts = <0x00 0xd1 0x04>; - clocks = <0x0e 0x0b 0x0e 0x0c 0x0e 0x14 0x0e 0x15>; - compatible = "rockchip,rk3588-crypto"; - status = "disabled"; - reg = <0x00 0xfe370000 0x00 0x2000>; - phandle = <0x296>; - reset-names = "crypto-rst"; - }; - - i2s@fddf4000 { - power-domains = <0x60 0x1a>; - rockchip,always-on; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x249>; - assigned-clock-parents = <0x02 0x07>; - resets = <0x02 0x3ef>; - interrupts = <0x00 0xba 0x04>; - clocks = <0x02 0x24c 0x02 0x24c 0x02 0x252>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - rockchip,playback-only; - status = "okay"; - reg = <0x00 0xfddf4000 0x00 0x1000>; - phandle = <0x1e0>; - dmas = <0xf2 0x04>; - reset-names = "tx-m"; - rockchip,hdmi-path; - }; - - mipi0-csi2-hw@fdd10000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x324>; - interrupts = <0x00 0x8f 0x04 0x00 0x90 0x04>; - clocks = <0x02 0x1cf>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd10000 0x00 0x10000>; - phandle = <0x47>; - reset-names = "srst_csihost_p"; - }; - - mipi4-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x228>; - }; - - jpege-ccu { - compatible = "rockchip,vpu-jpege-ccu"; - status = "okay"; - phandle = <0xbd>; - }; - - dsi@fde30000 { - power-domains = <0x60 0x18>; - #address-cells = <0x01>; - phy-names = "dcphy"; - clock-names = "pclk\0sys_clk"; - resets = <0x02 0x355>; - interrupts = <0x00 0xa8 0x04>; - clocks = <0x02 0x279 0x02 0x27b>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-mipi-dsi2"; - status = "disabled"; - rockchip,grf = <0xd7>; - phys = <0x30>; - reg = <0x00 0xfde30000 0x00 0x10000>; - phandle = <0x283>; - reset-names = "apb"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x284>; - - endpoint@1 { - remote-endpoint = <0x3a>; - status = "disabled"; - reg = <0x01>; - phandle = <0xef>; - }; - - endpoint@0 { - remote-endpoint = <0xf4>; - status = "disabled"; - reg = <0x00>; - phandle = <0xea>; - }; - }; - }; - }; - - iommu@fcb00000 { - interrupts = <0x00 0x17d 0x04 0x00 0x17f 0x04 0x00 0x182 0x04 0x00 0x17b 0x04>; - #iommu-cells = <0x01>; - compatible = "arm,smmu-v3"; - status = "disabled"; - interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; - reg = <0x00 0xfcb00000 0x00 0x200000>; - phandle = <0x257>; - }; - - rkcif-mipi-lvds3 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x57>; - }; - - vcc-hub-regulator { - regulator-boot-on; - gpio = <0x182 0x01 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_hub"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4af>; - }; - - syscon@fd5ac000 { - compatible = "rockchip,rk3588-usb-grf\0syscon"; - reg = <0x00 0xfd5ac000 0x00 0x4000>; - phandle = <0x74>; - }; - - qos@fdf40200 { - compatible = "syscon"; - reg = <0x00 0xfdf40200 0x00 0x20>; - phandle = <0xa9>; - }; - - rkisp@fdcb0000 { - power-domains = <0x60 0x1b>; - iommus = <0xd0>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; - interrupts = <0x00 0x83 0x04 0x00 0x85 0x04 0x00 0x86 0x04>; - clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd>; - compatible = "rockchip,rk3588-rkisp"; - status = "okay"; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - reg = <0x00 0xfdcb0000 0x00 0x7f00>; - phandle = <0x58>; - }; - - serial@feba0000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x166>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x152 0x04>; - clocks = <0x02 0xcf 0x02 0xb1>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeba0000 0x00 0x100>; - phandle = <0x2cf>; - dmas = <0xf2 0x07 0xf2 0x08>; - reg-shift = <0x02>; - }; - - rkcif-mipi-lvds1-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x53>; - phandle = <0x232>; - }; - - chosen { - linux,initrd-end = <0x00 0xaac72ae>; - bootargs = "storagemedia=emmc androidboot.storagemedia=emmc androidboot.mode=normal storagenode=/mmc@fe2e0000 androidboot.verifiedbootstate=orange ro rootwait earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0 root=PARTLABEL=rootfs rootfstype=ext4 overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 net.ifnames=0 rcupdate.rcu_expedited=0 comm-05/28/2025 androidboot.fwver=ddr-v1.15-d5483af87d,spl-v1.13,bl31-v1.44,bl32-v1.15,uboot--boot"; - linux,initrd-start = <0x00 0xa200000>; - phandle = <0x48d>; - }; - - hdmi@fde80000 { - power-domains = <0x60 0x1a>; - reg-io-width = <0x04>; - pinctrl-names = "default"; - phy-names = "hdmi"; - pinctrl-0 = <0xf9 0xfa 0xfb 0xfc>; - clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; - resets = <0x02 0x3d0 0x02 0x49c>; - interrupts = <0x00 0xa9 0x04 0x00 0xaa 0x04 0x00 0xab 0x04 0x00 0xac 0x04 0x00 0x168 0x04>; - clocks = <0x02 0x221 0x02 0x265 0x02 0x222 0x02 0x223 0x02 0x246 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x35>; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-dw-hdmi"; - status = "okay"; - rockchip,grf = <0xc8>; - phys = <0xfd>; - enable-gpios = <0xfe 0x08 0x00>; - reg = <0x00 0xfde80000 0x00 0x10000 0x00 0xfde90000 0x00 0x10000>; - phandle = <0x1d4>; - reset-names = "ref\0hdp"; - rockchip,vo1_grf = <0xd8>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x288>; - - endpoint@1 { - remote-endpoint = <0xff>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe2>; - }; - - endpoint@2 { - remote-endpoint = <0x100>; - status = "disabled"; - reg = <0x02>; - phandle = <0xe8>; - }; - - endpoint@0 { - remote-endpoint = <0x3c>; - status = "okay"; - reg = <0x00>; - phandle = <0xdc>; - }; - }; - }; - }; - - cluster2-opp-table { - rockchip,pvtm-offset = <0x18>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,pvtm-hw = <0x06>; - nvmem-cells = <0x27 0x28 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; - rockchip,pvtm-thermal-zone = "soc-thermal"; - rockchip,pvtm-low-len-sel = <0x03>; - rockchip,high-temp-max-freq = <0x21b100>; - opp-shared; - rockchip,reboot-freq = <0x1b7740>; - rockchip,pvtm-freq = <0x188940>; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0x29>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; - phandle = <0x1a>; - rockchip,idle-threshold-freq = <0x21b100>; - rockchip,pvtm-temp-prop = <0x10e 0x10e>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0xf6180>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-j-m-2016000000 { - opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - opp-hz = <0x00 0x7829b800>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - }; - - opp-1200000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1416000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x54667200>; - opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - opp-supported-hw = <0x06 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - }; - - opp-1008000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2256000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8677d400>; - opp-supported-hw = <0xf9 0x13>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1200000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1008000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-816000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2400000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8f0d1800>; - opp-supported-hw = <0xf9 0x80>; - clock-latency-ns = <0x9c40>; - }; - - opp-1800000000 { - opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2208000000 { - opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; - opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; - opp-hz = <0x00 0x839b6800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L3 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-1608000000 { - opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-408000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1800000000 { - opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - }; - - opp-2352000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8c30ac00>; - opp-supported-hw = <0xf9 0x48>; - clock-latency-ns = <0x9c40>; - }; - - opp-816000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1608000000 { - opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; - - opp-600000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2016000000 { - opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; - opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; - opp-hz = <0x00 0x7829b800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; - opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - }; - - opp-1416000000 { - opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-hz = <0x00 0x54667200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; - opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-408000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0xf9 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - }; - - opp-2304000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x89544000>; - opp-supported-hw = <0xf9 0x24>; - clock-latency-ns = <0x9c40>; - }; - }; - - rkcif-dvp { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-dvp"; - status = "disabled"; - phandle = <0x51>; - }; - - rkisp0-vir2 { - rockchip,hw = <0x58>; - compatible = "rockchip,rkisp-vir"; - status = "okay"; - phandle = <0x23d>; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - remote-endpoint = <0x59>; - reg = <0x00>; - phandle = <0x56>; - }; - }; - }; - - i2c@fea90000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x148>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb0 0x02 0xa8>; - interrupts = <0x00 0x13e 0x04>; - clocks = <0x02 0x8d 0x02 0x85>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfea90000 0x00 0x1000>; - phandle = <0x2a4>; - reset-names = "i2c\0apb"; - - rk8602@42 { - regulator-max-microvolt = <0xe7ef0>; - regulator-boot-on; - rockchip,suspend-voltage-selector = <0x01>; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_npu_s0"; - regulator-ramp-delay = <0x8fc>; - compatible = "rockchip,rk8602"; - reg = <0x42>; - phandle = <0xb3>; - vin-supply = <0x78>; - regulator-compatible = "rk860x-reg"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - - syscon@fd58a000 { - compatible = "rockchip,rk3588-pmu1-grf\0syscon"; - reg = <0x00 0xfd58a000 0x00 0x2000>; - phandle = <0x104>; - }; - - syscon@fd5ec000 { - compatible = "rockchip,mipi-dcphy-grf\0syscon"; - reg = <0x00 0xfd5ec000 0x00 0x4000>; - phandle = <0x191>; - }; - - venc-opp-table { - nvmem-cells = <0xc6 0xc7>; - rockchip,leakage-voltage-sel = <0x01 0x0f 0x00 0x10 0x19 0x01 0x1a 0xfe 0x02>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,grf = <0xc8>; - nvmem-cell-names = "leakage\0opp-info"; - phandle = <0xc4>; - - opp-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-microvolt-L0 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - }; - }; - - iommu@fdc38700 { - power-domains = <0x60 0x0e>; - rockchip,shootdown-entire; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x60 0x04>; - clocks = <0x02 0x190 0x02 0x18f>; - rockchip,enable-cmd-retry; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "irq_rkvdec0_mmu"; - reg = <0x00 0xfdc38700 0x00 0x40 0x00 0xfdc38740 0x00 0x40>; - phandle = <0xc9>; - rockchip,master-handle-irq; - }; - - qos@fdf35200 { - compatible = "syscon"; - reg = <0x00 0xfdf35200 0x00 0x20>; - phandle = <0x88>; - }; - - qos@fdf71000 { - compatible = "syscon"; - reg = <0x00 0xfdf71000 0x00 0x20>; - phandle = <0x86>; - }; - - syscon@fd598000 { - compatible = "rockchip,rk3588-dsu-grf\0syscon"; - reg = <0x00 0xfd598000 0x00 0x100>; - phandle = <0x23>; - }; - - csi2-dphy2 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x211>; - }; - - syscon@fd5b4000 { - compatible = "rockchip,mipi-dphy-grf\0syscon"; - reg = <0x00 0xfd5b4000 0x00 0x1000>; - phandle = <0x192>; - }; - - uio@fe1b0000 { - compatible = "rockchip,uio-gmac"; - status = "disabled"; - reg = <0x00 0xfe1b0000 0x00 0x10000>; - phandle = <0x488>; - rockchip,ethernet = <0x1bd>; - }; - - iommu@fdb70f00 { - power-domains = <0x60 0x1e>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x73 0x04>; - clocks = <0x02 0x18a 0x02 0x189>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "rga3_1_mmu"; - reg = <0x00 0xfdb70f00 0x00 0x100>; - phandle = <0xba>; - }; - - vcc5v0-usb { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_usb"; - compatible = "regulator-fixed"; - phandle = <0x1dd>; - vin-supply = <0x1cd>; - }; - - fiq-debugger { - pinctrl-names = "default"; - rockchip,irq-mode-enable = <0x01>; - rockchip,baudrate = <0x1c200>; - pinctrl-0 = <0x1ce>; - interrupts = <0x00 0x1a7 0x08>; - rockchip,wake-irq = <0x00>; - compatible = "rockchip,fiq-debugger"; - status = "okay"; - phandle = <0x490>; - rockchip,serial-id = <0x02>; - }; - - phy@fed70000 { - clock-names = "ref\0apb"; - resets = <0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041>; - clocks = <0x02 0x2b5 0x02 0x268>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-hdptx-phy"; - status = "disabled"; - rockchip,grf = <0x1c7>; - reg = <0x00 0xfed70000 0x00 0x2000>; - phandle = <0x1af>; - reset-names = "apb\0init\0cmn\0lane"; - }; - - ethernet@fe1b0000 { - power-domains = <0x60 0x21>; - pinctrl-names = "default"; - phy-mode = "rgmii-rxid"; - snps,mixed-burst; - snps,mtl-rx-config = <0x1bf>; - snps,reset-active-low; - pinctrl-0 = <0x1c1 0x1c2 0x1c3 0x1c4 0x1c5>; - clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; - snps,mtl-tx-config = <0x1c0>; - local-mac-address = [da 2f 1a d4 a9 85]; - resets = <0x02 0x20a>; - interrupts = <0x00 0xe3 0x04 0x00 0xe2 0x04>; - clocks = <0x02 0x144 0x02 0x145 0x02 0x167 0x02 0x16c 0x02 0x142>; - clock_in_out = "output"; - snps,tso; - compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; - status = "okay"; - rockchip,grf = <0xc8>; - interrupt-names = "macirq\0eth_wake_irq"; - snps,reset-gpio = <0x10d 0x02 0x01>; - reg = <0x00 0xfe1b0000 0x00 0x10000>; - rockchip,php_grf = <0x76>; - phandle = <0x1bd>; - phy-handle = <0x1c6>; - reset-names = "stmmaceth"; - tx_delay = <0x31>; - snps,axi-config = <0x1be>; - snps,reset-delays-us = <0x00 0x4e20 0x186a0>; - - mdio { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "snps,dwmac-mdio"; - phandle = <0x489>; - - phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x01>; - phandle = <0x1c6>; - }; - }; - - tx-queues-config { - phandle = <0x1c0>; - snps,tx-queues-to-use = <0x01>; - - queue0 { - }; - }; - - stmmac-axi-config { - snps,wr_osr_lmt = <0x04>; - phandle = <0x1be>; - snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; - snps,rd_osr_lmt = <0x08>; - }; - - rx-queues-config { - snps,rx-queues-to-use = <0x01>; - phandle = <0x1bf>; - - queue0 { - }; - }; - }; - - pvtm@fda60000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-litcore-pvtm"; - reg = <0x00 0xfda60000 0x00 0x100>; - - pvtm@2 { - clock-names = "clk\0pclk"; - clocks = <0x02 0x2ca 0x02 0x1b>; - reg = <0x02>; - }; - }; - - rkispp@fdcd8000 { - power-domains = <0x60 0x1d>; - iommus = <0xd3>; - clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; - assigned-clocks = <0x02 0x1d9>; - assigned-clock-rates = <0x5f5e100>; - interrupts = <0x00 0x8d 0x04>; - clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; - compatible = "rockchip,rk3588-rkispp"; - status = "disabled"; - interrupt-names = "fec_irq"; - reg = <0x00 0xfdcd8000 0x00 0xf00>; - phandle = <0x5c>; - }; - - qos@fdf66000 { - compatible = "syscon"; - reg = <0x00 0xfdf66000 0x00 0x20>; - phandle = <0x93>; - }; - - syscon@fd592000 { - compatible = "rockchip,rk3588-bigcore1-grf\0syscon"; - reg = <0x00 0xfd592000 0x00 0x100>; - phandle = <0x29>; - }; - - rkcif-mipi-lvds1 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x53>; - }; - - av1d@fdc70000 { - power-domains = <0x60 0x17>; - iommus = <0xce>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - reg-names = "vcd\0cache\0afbc"; - assigned-clocks = <0x02 0x49 0x02 0x4b>; - rockchip,normal-rates = <0x17d78400 0x17d78400>; - assigned-clock-rates = <0x17d78400 0x17d78400>; - resets = <0x02 0x442 0x02 0x445>; - interrupts = <0x00 0x6c 0x04 0x00 0x6b 0x04 0x00 0x6a 0x04>; - clocks = <0x02 0x49 0x02 0x4b>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x0b>; - compatible = "rockchip,av1-decoder"; - status = "okay"; - interrupt-names = "irq_av1d\0irq_cache\0irq_afbc"; - reg = <0x00 0xfdc70000 0x00 0x800 0x00 0xfdc80000 0x00 0x400 0x00 0xfdc90000 0x00 0x400>; - phandle = <0x276>; - reset-names = "video_a\0video_h"; - }; - - qos@fdf40500 { - compatible = "syscon"; - reg = <0x00 0xfdf40500 0x00 0x20>; - phandle = <0xa3>; - }; - - vcc-hub-reset-regulator { - regulator-boot-on; - gpio = <0x182 0x04 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_hub_reset"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x4a0>; - }; - - qos@fdf72200 { - compatible = "syscon"; - reg = <0x00 0xfdf72200 0x00 0x20>; - phandle = <0x83>; - }; - - serial@feb70000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x163>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14f 0x04>; - clocks = <0x02 0xc3 0x02 0xae>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeb70000 0x00 0x100>; - phandle = <0x2cc>; - dmas = <0xf1 0x09 0xf1 0x0a>; - reg-shift = <0x02>; - }; - - rkcif-mipi-lvds2-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "okay"; - rockchip,cif = <0x55>; - phandle = <0x233>; - - port { - - endpoint { - remote-endpoint = <0x56>; - phandle = <0x59>; - }; - }; - }; - - i2c@feca0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x186>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb7 0x02 0xaf>; - interrupts = <0x00 0x145 0x04>; - clocks = <0x02 0x94 0x02 0x8c>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "disabled"; - reg = <0x00 0xfeca0000 0x00 0x1000>; - phandle = <0x2e5>; - reset-names = "i2c\0apb"; - }; - - vcc-sdcard-pwr-en-regulator { - regulator-boot-on; - gpio = <0xfe 0x07 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_sdcard_pwr_en"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4a5>; - }; - - rkcif-mipi-lvds1-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x53>; - phandle = <0x230>; - }; - - qos@fdf63000 { - compatible = "syscon"; - reg = <0x00 0xfdf63000 0x00 0x20>; - phandle = <0x8c>; - }; - - phy@fee00000 { - rockchip,pipe-grf = <0x76>; - clock-names = "refclk\0apbclk\0phpclk"; - assigned-clocks = <0x02 0x2bd>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x02 0x20005 0x02 0x4d6>; - clocks = <0x02 0x2bd 0x02 0x185 0x02 0x166>; - #phy-cells = <0x01>; - compatible = "rockchip,rk3588-naneng-combphy"; - status = "okay"; - rockchip,pipe-phy-grf = <0x194>; - reg = <0x00 0xfee00000 0x00 0x100>; - phandle = <0x108>; - reset-names = "combphy-apb\0combphy"; - }; - - can@fea50000 { - pinctrl-names = "default"; - pinctrl-0 = <0x145>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x02 0xb9 0x02 0xb8>; - interrupts = <0x00 0x155 0x04>; - clocks = <0x02 0x70 0x02 0x6f>; - compatible = "rockchip,can-2.0"; - status = "disabled"; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - reg = <0x00 0xfea50000 0x00 0x1000>; - phandle = <0x2a0>; - reset-names = "can\0can-apb"; - }; - - pdm@fe4b0000 { - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x139 0x13a>; - pinctrl-0 = <0x134 0x135 0x136 0x137>; - clock-names = "pdm_clk\0pdm_hclk"; - clocks = <0x02 0x29f 0x02 0x29e>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-pdm"; - pinctrl-1 = <0x138>; - status = "disabled"; - reg = <0x00 0xfe4b0000 0x00 0x1000>; - phandle = <0x29a>; - dmas = <0x7c 0x04>; - }; - - rkisp-unite-mmu@fdcb7f00 { - power-domains = <0x60 0x1c>; - clock-names = "aclk0\0iface0\0aclk1\0iface1"; - interrupts = <0x00 0x84 0x04 0x00 0x88 0x04>; - clocks = <0x02 0x1de 0x02 0x1df 0x02 0x120 0x02 0x121>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "disabled"; - interrupt-names = "isp0_mmu\0isp1_mmu"; - reg = <0x00 0xfdcb7f00 0x00 0x100 0x00 0xfdcc7f00 0x00 0x100>; - phandle = <0xcf>; - }; - - syscon@fd5a6000 { - clocks = <0x72>; - compatible = "rockchip,rk3588-vo-grf\0syscon"; - reg = <0x00 0xfd5a6000 0x00 0x2000>; - phandle = <0xf5>; - }; - - cpus { - #address-cells = <0x01>; - #size-cells = <0x00>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x00>; - enable-method = "psci"; - clocks = <0x0e 0x00>; - cpu-idle-states = <0x10>; - operating-points-v2 = <0x0f>; - capacity-dmips-mhz = <0x212>; - - cpu-supply = <0x12>; - mem-supply = <0x12>; - dynamic-power-coefficient = <0x64>; - - i-cache-line-size = <0x40>; - i-cache-size = <0x8000>; - i-cache-sets = <0x80>; - - d-cache-line-size = <0x40>; - d-cache-size = <0x8000>; - d-cache-sets = <0x80>; - - next-level-cache = <0x11>; - #cooling-cells = <0x02>; - phandle = <0x06>; - }; - - l2-cache-l0 { - compatible = "cache"; - cache-size = <0x20000>; - cache-sets = <0x200>; - cache-line-size = <0x40>; - next-level-cache = <0x1e>; - phandle = <0x11>; - }; - - l3-cache { - compatible = "cache"; - cache-size = <0x300000>; - cache-sets = <0x1000>; - cache-line-size = <0x40>; - phandle = <0x1e>; - }; - - idle-states { - entry-method = "psci"; - - cpu-sleep { - compatible = "arm,idle-state"; - entry-latency-us = <0x64>; - exit-latency-us = <0x78>; - min-residency-us = <0x3e8>; - local-timer-stop; - arm,psci-suspend-param = <0x10000>; - phandle = <0x10>; - }; - }; - - cpu-map { - cluster0 { - core0 { - cpu = <0x06>; - }; - }; - }; - }; - - vcc-hub3-reset-regulator { - gpio = <0x182 0x06 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_hub3_reset"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x4a1>; - }; - - rkispp1-vir0 { - rockchip,hw = <0x5c>; - compatible = "rockchip,rk3588-rkispp-vir"; - status = "disabled"; - phandle = <0x244>; - }; - - saradc@fec10000 { - vref-supply = <0x177>; - clock-names = "saradc\0apb_pclk"; - resets = <0x02 0xbe>; - interrupts = <0x00 0x18e 0x04>; - clocks = <0x02 0x9d 0x02 0x9c>; - #io-channel-cells = <0x01>; - compatible = "rockchip,rk3588-saradc"; - status = "okay"; - reg = <0x00 0xfec10000 0x00 0x10000>; - phandle = <0x1d9>; - reset-names = "saradc-apb"; - }; - - rkisp0-vir0 { - rockchip,hw = <0x58>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x23b>; - }; - - __symbols__ { - i2s2m0_lrck = "/pinctrl/i2s2/i2s2m0-lrck"; - i2c3 = "/i2c@feab0000"; - scmi_shmem = "/sram@10f000/sram@0"; - rkispp0_vir0 = "/rkispp0-vir0"; - qos_jpeg_enc0 = "/qos@fdf66400"; - i2s1m1_sdi1 = "/pinctrl/i2s1/i2s1m1-sdi1"; - dp_altmode_mux = "/i2c@fec80000/fusb302@22/connector/ports/port@1/endpoint"; - pmic_pins = "/pinctrl/pmic/pmic-pins"; - usb_host1_ohci = "/usb@fc8c0000"; - pwm9 = "/pwm@febe0010"; - i2c6m4_xfer = "/pinctrl/i2c6/i2c6m4-xfer"; - leds_gpio = "/pinctrl/leds/leds-gpio"; - i2c3m3_xfer = "/pinctrl/i2c3/i2c3m3-xfer"; - qos_usb3_1 = "/qos@fdf3e000"; - hdmi_debug4 = "/pinctrl/hdmi/hdmi-debug4"; - i2c0m2_xfer = "/pinctrl/i2c0/i2c0m2-xfer"; - gmac0_rgmii_bus = "/pinctrl/gmac0/gmac0-rgmii-bus"; - pcie30x2m2_pins = "/pinctrl/pcie30x2/pcie30x2m2-pins"; - sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; - spi0m3_cs0 = "/pinctrl/spi0/spi0m3-cs0"; - hwlock = "/hwspinlock@fe5a0000"; - pcie3x2 = "/pcie@fe160000"; - i2s2m1_mclk = "/pinctrl/i2s2/i2s2m1-mclk"; - mipim0_camera3_clk = "/pinctrl/mipi/mipim0-camera3-clk"; - mclkin_i2s0 = "/clocks/mclkin-i2s0"; - edp1_in_vp1 = "/edp@fded0000/ports/port@0/endpoint@1"; - rkvenc0_mmu = "/iommu@fdbdf000"; - pwm14 = "/pwm@febf0020"; - rk806_dvs2_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_rst"; - mipi2_csi2 = "/mipi2-csi2"; - can2m1_pins = "/pinctrl/can2/can2m1-pins"; - pcie2x1l1 = "/pcie@fe180000"; - hdmi0_in_vp2 = "/hdmi@fde80000/ports/port@0/endpoint@2"; - qos_rkvenc0_m2wo = "/qos@fdf60400"; - pwm3m2_pins = "/pinctrl/pwm3/pwm3m2-pins"; - optee = "/firmware/optee"; - l2_cache_b2 = "/cpus/l2-cache-b2"; - pwm0m1_pins = "/pinctrl/pwm0/pwm0m1-pins"; - vdpu = "/vdpu@fdb50400"; - i2s3_sdo = "/pinctrl/i2s3/i2s3-sdo"; - usbdp_phy0_u3 = "/phy@fed80000/u3-port"; - thermal_zones = "/thermal-zones"; - hdmim2_rx_scl = "/pinctrl/hdmi/hdmim2-rx-scl"; - hdmim2_rx_sda = "/pinctrl/hdmi/hdmim2-rx-sda"; - uart9m0_rtsn = "/pinctrl/uart9/uart9m0-rtsn"; - spi1m2_cs0 = "/pinctrl/spi1/spi1m2-cs0"; - pcie2x1l1_intc = "/pcie@fe180000/legacy-interrupt-controller"; - spdif1m1_tx = "/pinctrl/spdif1/spdif1m1-tx"; - venc_opp_info = "/otp@fecc0000/venc-opp-info@67"; - qos_iep = "/qos@fdf66000"; - pcfg_pull_none_drv_level_3 = "/pinctrl/pcfg-pull-none-drv-level-3"; - spi3m2_cs1 = "/pinctrl/spi3/spi3m2-cs1"; - uart4m2_xfer = "/pinctrl/uart4/uart4m2-xfer"; - vp1 = "/vop@fdd90000/ports/port@1"; - bigcore1_grf = "/syscon@fd592000"; - uart1m1_xfer = "/pinctrl/uart1/uart1m1-xfer"; - uart5m1_ctsn = "/pinctrl/uart5/uart5m1-ctsn"; - fspim1_pins = "/pinctrl/fspi/fspim1-pins"; - cpu_l1 = "/cpus/cpu@100"; - uart8 = "/serial@febb0000"; - rkisp1_vir3 = "/rkisp1-vir3"; - qos_vop_m1 = "/qos@fdf82200"; - pcie_clk2 = "/pcie-clk2"; - cluster2_opp_table = "/cluster2-opp-table"; - usb_grf = "/syscon@fd5ac000"; - pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; - jpege0_mmu = "/iommu@fdba0800"; - spi2m1_cs0 = "/pinctrl/spi2/spi2m1-cs0"; - u2phy3 = "/syscon@fd5dc000/usb2-phy@c000"; - power_led = "/leds/power"; - aclk_usb = "/clocks/aclk_usb@fd7c08a8"; - csi2_dphy1 = "/csi2-dphy1"; - spi2 = "/spi@feb20000"; - uart2_rtsn = "/pinctrl/uart2/uart2-rtsn"; - spi4m1_cs1 = "/pinctrl/spi4/spi4m1-cs1"; - pcfg_pull_up_drv_level_15 = "/pinctrl/pcfg-pull-up-drv-level-15"; - vo1_grf = "/syscon@fd5a8000"; - pcie_essd = "/pcie-essd"; - i2c4m3_xfer = "/pinctrl/i2c4/i2c4m3-xfer"; - gpio0 = "/pinctrl/gpio@fd8a0000"; - saradc = "/saradc@fec10000"; - i2s1m0_sdi3 = "/pinctrl/i2s1/i2s1m0-sdi3"; - i2c1m2_xfer = "/pinctrl/i2c1/i2c1m2-xfer"; - csidphy0_out = "/csi2-dphy0/ports/port@1/endpoint@0"; - emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; - mclkout_i2s3 = "/clocks/mclkout-i2s3@fd58c318"; - xc7160_out0 = "/i2c@fec80000/XC7160b@1b/port/endpoint"; - rkcif_mipi_lvds1_sditf_vir1 = "/rkcif-mipi-lvds1-sditf-vir1"; - dsi1 = "/dsi@fde30000"; - venc_opp_table = "/venc-opp-table"; - qos_isp0_mwo = "/qos@fdf40500"; - pmu_pins = "/pinctrl/pmu/pmu-pins"; - gmac0_miim = "/pinctrl/gmac0/gmac0-miim"; - spi3m0_cs0 = "/pinctrl/spi3/spi3m0-cs0"; - mipi_dcphy0 = "/mipi-dcphy-dummy"; - minidump_mem = "/reserved-memory/minidump-mem@c000000"; - avdd_1v2_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG3"; - pwm7m3_pins = "/pinctrl/pwm7/pwm7m3-pins"; - route_edp1 = "/display-subsystem/route/route-edp1"; - hdmi1 = "/hdmi@fdea0000"; - crypto = "/crypto@fe370000"; - hdmi1_in_vp2 = "/hdmi@fdea0000/ports/port@0/endpoint@2"; - dfi = "/dfi@fe060000"; - can0m0_pins = "/pinctrl/can0/can0m0-pins"; - pcfg_pull_up_drv_level_2 = "/pinctrl/pcfg-pull-up-drv-level-2"; - pinctrl = "/pinctrl"; - rgmii_phy0 = "/ethernet@fe1b0000/mdio/phy@1"; - pcfg_pull_down_drv_level_6 = "/pinctrl/pcfg-pull-down-drv-level-6"; - dp0m0_pins = "/pinctrl/dp0/dp0m0-pins"; - i2s0_sdo3 = "/pinctrl/i2s0/i2s0-sdo3"; - vcc_sata_pwr_en = "/vcc-sata-pwr-en-regulator"; - pwm1m1_pins = "/pinctrl/pwm1/pwm1m1-pins"; - pcie30_avdd1v8 = "/pcie30-avdd1v8"; - usb2phy3_grf = "/syscon@fd5dc000"; - u2phy2_host = "/syscon@fd5d8000/usb2-phy@8000/host-port"; - hym8563_int = "/pinctrl/hym8563/hym8563-int"; - mailbox1 = "/mailbox@fec70000"; - pdm0m1_sdi3 = "/pinctrl/pdm0/pdm0m1-sdi3"; - combphy1_ps = "/phy@fee10000"; - hdptxphy0_grf = "/syscon@fd5e0000"; - sdei = "/firmware/sdei"; - vp0_out_dp1 = "/vop@fdd90000/ports/port@0/endpoint@3"; - uart5m2_xfer = "/pinctrl/uart5/uart5m2-xfer"; - uart9m2_ctsn = "/pinctrl/uart9/uart9m2-ctsn"; - uart2m1_xfer = "/pinctrl/uart2/uart2m1-xfer"; - dp0_out = "/dp@fde50000/ports/port@1/endpoint"; - uart6m1_ctsn = "/pinctrl/uart6/uart6m1-ctsn"; - route_rgb = "/display-subsystem/route/route-rgb"; - csidphy0_out1 = "/csi2-dphy0/ports/port@1/endpoint@0"; - i2c1 = "/i2c@fea90000"; - pinctrl_rk806 = "/spi@feb20000/rk806single@0/pinctrl_rk806"; - cpu_code = "/otp@fecc0000/cpu-code@2"; - pwm7 = "/pwm@febd0030"; - mipi5_csi2_hw = "/mipi5-csi2-hw@fdd60000"; - gpu_leakage = "/otp@fecc0000/gpu-leakage@1b"; - hdmi_debug2 = "/pinctrl/hdmi/hdmi-debug2"; - pdm0m0_clk = "/pinctrl/pdm0/pdm0m0-clk"; - gmac0_ppsclk = "/pinctrl/gmac0/gmac0-ppsclk"; - i2c8m4_xfer = "/pinctrl/i2c8/i2c8m4-xfer"; - vdd_npu_s0 = "/i2c@fea90000/rk8602@42"; - i2c5m3_xfer = "/pinctrl/i2c5/i2c5m3-xfer"; - gmac0 = "/ethernet@fe1b0000"; - i2c2m2_xfer = "/pinctrl/i2c2/i2c2m2-xfer"; - rockchip_system_monitor = "/rockchip-system-monitor"; - pcie30x4m2_pins = "/pinctrl/pcie30x4/pcie30x4m2-pins"; - pwm12 = "/pwm@febf0000"; - emmc_cmd = "/pinctrl/emmc/emmc-cmd"; - i2s1_8ch = "/i2s@fe480000"; - pcie30x1m1_pins = "/pinctrl/pcie30x1/pcie30x1m1-pins"; - uart4_ctsn = "/pinctrl/uart4/uart4-ctsn"; - vdd_cpu_big0_mem_s0 = "/i2c@fd880000/rk8602@42"; - pcfg_pull_none = "/pinctrl/pcfg-pull-none"; - i2s1m0_mclk = "/pinctrl/i2s1/i2s1m0-mclk"; - vp1_out_edp1 = "/vop@fdd90000/ports/port@1/endpoint@4"; - hdmi0_in_vp0 = "/hdmi@fde80000/ports/port@0/endpoint@0"; - vcc_4g = "/vcc-4g-regulator"; - firefly_leds = "/leds"; - jpege3 = "/jpege-core@fdbac000"; - l2_cache_b0 = "/cpus/l2-cache-b0"; - pmu1_grf = "/syscon@fd58a000"; - aclk_rkvenc1_pre = "/clocks/aclk_rkvenc1_pre@fd7c08c0"; - can1m0_pins = "/pinctrl/can1/can1m0-pins"; - spi0m3_pins = "/pinctrl/spi0/spi0m3-pins"; - pwm5m2_pins = "/pinctrl/pwm5/pwm5m2-pins"; - mipidphy0_in_ucam1 = "/csi2-dphy0/ports/port@0/endpoint@1"; - i2s0_lrck = "/pinctrl/i2s0/i2s0-lrck"; - clk32k_out0 = "/pinctrl/clk32k/clk32k-out0"; - dp1m0_pins = "/pinctrl/dp1/dp1m0-pins"; - pwm2m1_pins = "/pinctrl/pwm2/pwm2m1-pins"; - usbc0 = "/i2c@fec80000/fusb302@22"; - eth1_pins = "/pinctrl/eth1/eth1-pins"; - pcfg_pull_none_drv_level_1 = "/pinctrl/pcfg-pull-none-drv-level-1"; - csi2_dphy0_hw = "/csi2-dphy0-hw@fedc0000"; - pdm1m1_sdi3 = "/pinctrl/pdm1/pdm1m1-sdi3"; - dsi0_in_vp3 = "/dsi@fde20000/ports/port@0/endpoint@1"; - hdmim1_tx1_cec = "/pinctrl/hdmi/hdmim1-tx1-cec"; - usbc0_role_sw = "/i2c@fec80000/fusb302@22/ports/port@0/endpoint@0"; - uart6 = "/serial@feb90000"; - rkisp1_vir1 = "/rkisp1-vir1"; - sdhci = "/mmc@fe2e0000"; - uart6m2_xfer = "/pinctrl/uart6/uart6m2-xfer"; - target = "/thermal-zones/soc-thermal/trips/trip-point-1"; - rkcif_mipi_lvds_sditf_vir3 = "/rkcif-mipi-lvds-sditf-vir3"; - pcfg_pull_none_drv_level_0_smt = "/pinctrl/pcfg-pull-none-drv-level-0-smt"; - uart3m1_xfer = "/pinctrl/uart3/uart3m1-xfer"; - uart7m1_ctsn = "/pinctrl/uart7/uart7m1-ctsn"; - uart0m0_xfer = "/pinctrl/uart0/uart0m0-xfer"; - rgb_in_vp3 = "/syscon@fd58c000/rgb/ports/port@0/endpoint@2"; - rkcif_mipi_lvds5_sditf_vir2 = "/rkcif-mipi-lvds5-sditf-vir2"; - u2phy1 = "/syscon@fd5d4000/usb2-phy@4000"; - i2s5_8ch = "/i2s@fddf0000"; - i2s2m0_sdo = "/pinctrl/i2s2/i2s2m0-sdo"; - gpu = "/gpu@fb000000"; - spi0 = "/spi@feb00000"; - iep = "/iep@fdbb0000"; - pcfg_pull_up_drv_level_13 = "/pinctrl/pcfg-pull-up-drv-level-13"; - spdif_tx5 = "/spdif-tx@fddb8000"; - hdptxphy_hdmi_clk1 = "/hdmiphy@fed70000/clk-port"; - drm_logo = "/reserved-memory/drm-logo@00000000"; - i2s1m0_sdi1 = "/pinctrl/i2s1/i2s1m0-sdi1"; - rk806_dvs3_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_null"; - gmac1_ppsclk = "/pinctrl/gmac1/gmac1-ppsclk"; - usb_host0_ohci = "/usb@fc840000"; - mclkout_i2s1 = "/clocks/mclkout-i2s1@fd58c318"; - i2c6m3_xfer = "/pinctrl/i2c6/i2c6m3-xfer"; - i2c3m2_xfer = "/pinctrl/i2c3/i2c3m2-xfer"; - vop_opp_info = "/otp@fecc0000/vop-opp-info@61"; - cif_dvp_bus16 = "/pinctrl/cif/cif-dvp-bus16"; - i2c0m1_xfer = "/pinctrl/i2c0/i2c0m1-xfer"; - pcie30x2m1_pins = "/pinctrl/pcie30x2/pcie30x2m1-pins"; - mipidcphy0_grf = "/syscon@fd5e8000"; - vdd_cpu_big1_mem_s0 = "/i2c@fd880000/rk8603@43"; - pcie30phy = "/phy@fee80000"; - dmc = "/dmc"; - i2s2m0_mclk = "/pinctrl/i2s2/i2s2m0-mclk"; - mipidcphy1 = "/phy@fedb0000"; - dp1_sound = "/dp1-sound"; - hdmi1_in_vp0 = "/hdmi@fdea0000/ports/port@0/endpoint@0"; - scmi = "/firmware/scmi"; - pcfg_pull_up_drv_level_0 = "/pinctrl/pcfg-pull-up-drv-level-0"; - gmac1_clkinout = "/pinctrl/gmac1/gmac1-clkinout"; - pcfg_pull_down_drv_level_4 = "/pinctrl/pcfg-pull-down-drv-level-4"; - i2s0_sdo1 = "/pinctrl/i2s0/i2s0-sdo1"; - l3_cache = "/cpus/l3-cache"; - i2s3_idle = "/pinctrl/i2s3/i2s3-idle"; - pcfg_pull_none_drv_level_4_smt = "/pinctrl/pcfg-pull-none-drv-level-4-smt"; - litcpu_pins = "/pinctrl/litcpu/litcpu-pins"; - mipi1_csi2 = "/mipi1-csi2"; - can2m0_pins = "/pinctrl/can2/can2m0-pins"; - pwm6m2_pins = "/pinctrl/pwm6/pwm6m2-pins"; - usbdp_phy0 = "/phy@fed80000"; - pdm0m1_sdi1 = "/pinctrl/pdm0/pdm0m1-sdi1"; - pwm3m1_pins = "/pinctrl/pwm3/pwm3m1-pins"; - vdd_log_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG3"; - i2s9_8ch = "/i2s@fddfc000"; - pwm0m0_pins = "/pinctrl/pwm0/pwm0m0-pins"; - vcc_hub3_reset = "/vcc-hub3-reset-regulator"; - dsi1_in_vp3 = "/dsi@fde30000/ports/port@0/endpoint@1"; - otp_cpu_version = "/otp@fecc0000/cpu-version@1c"; - pcie2x1l0_intc = "/pcie@fe170000/legacy-interrupt-controller"; - spdif0m1_tx = "/pinctrl/spdif0/spdif0m1-tx"; - pcfg_pull_down_drv_level_15 = "/pinctrl/pcfg-pull-down-drv-level-15"; - XC7160 = "/i2c@fec80000/XC7160b@1b"; - rkcif_mipi_lvds4_sditf_vir3 = "/rkcif-mipi-lvds4-sditf-vir3"; - uart7m2_xfer = "/pinctrl/uart7/uart7m2-xfer"; - uart4m1_xfer = "/pinctrl/uart4/uart4m1-xfer"; - hdmim1_tx1_scl = "/pinctrl/hdmi/hdmim1-tx1-scl"; - hdmim1_tx1_sda = "/pinctrl/hdmi/hdmim1-tx1-sda"; - uart8m1_ctsn = "/pinctrl/uart8/uart8m1-ctsn"; - i2s2_2ch = "/i2s@fe490000"; - pwm5 = "/pwm@febd0010"; - uart1m0_xfer = "/pinctrl/uart1/uart1m0-xfer"; - uart5m0_ctsn = "/pinctrl/uart5/uart5m0-ctsn"; - fspim0_cs1 = "/pinctrl/fspi/fspim0-cs1"; - fspim0_pins = "/pinctrl/fspi/fspim0-pins"; - rkisp0_vir3 = "/rkisp0-vir3"; - l2_cache_l3 = "/cpus/l2-cache-l3"; - rk806_dvs3_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_dvs"; - hdmi_debug0 = "/pinctrl/hdmi/hdmi-debug0"; - hdmim1_tx1_hpd = "/pinctrl/hdmi/hdmim1-tx1-hpd"; - vp1_out_dp0 = "/vop@fdd90000/ports/port@1/endpoint@0"; - qos_isp0_mro = "/qos@fdf40400"; - spi0m2_cs1 = "/pinctrl/spi0/spi0m2-cs1"; - vdd_gpu_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; - tsadc_shut = "/pinctrl/tsadc/tsadc-shut"; - pwm10 = "/pwm@febe0020"; - i2c7m3_xfer = "/pinctrl/i2c7/i2c7m3-xfer"; - rktimer = "/timer@feae0000"; - cpub0_leakage = "/otp@fecc0000/cpub0-leakage@17"; - i2c4m2_xfer = "/pinctrl/i2c4/i2c4m2-xfer"; - hclk_rkvdec1_pre = "/clocks/hclk_rkvdec1_pre@fd7c08a4"; - pcie30phy_pins = "/pinctrl/pcie30phy/pcie30phy-pins"; - jpege1 = "/jpege-core@fdba4000"; - pcfg_pull_none_drv_level_14 = "/pinctrl/pcfg-pull-none-drv-level-14"; - i2c1m1_xfer = "/pinctrl/i2c1/i2c1m1-xfer"; - rkcif_dvp_sditf = "/rkcif-dvp-sditf"; - rkcif_mipi_lvds4_sditf = "/rkcif-mipi-lvds4-sditf"; - vp2_out_dp1 = "/vop@fdd90000/ports/port@2/endpoint@5"; - vp2_out_dsi0 = "/vop@fdd90000/ports/port@2/endpoint@3"; - its1 = "/interrupt-controller@fe600000/msi-controller@fe660000"; - cpu_b3 = "/cpus/cpu@700"; - vcc_hub_reset = "/vcc-hub-reset-regulator"; - spi1m1_cs1 = "/pinctrl/spi1/spi1m1-cs1"; - vdd_npu_mem_s0 = "/i2c@fea90000/rk8602@42"; - pwm7m2_pins = "/pinctrl/pwm7/pwm7m2-pins"; - pdm1m1_sdi1 = "/pinctrl/pdm1/pdm1m1-sdi1"; - vbus5v0_typec_pwr_en = "/vbus5v0-typec-pwr-en-regulator"; - pwm4m1_pins = "/pinctrl/pwm4/pwm4m1-pins"; - dmc_opp_table = "/dmc-opp-table"; - pcie30x4_button_rstn = "/pinctrl/pcie30x4/pcie30x4-button-rstn"; - uart4 = "/serial@feb70000"; - pwm1m0_pins = "/pinctrl/pwm1/pwm1m0-pins"; - spi0m0_cs0 = "/pinctrl/spi0/spi0m0-cs0"; - pldo6_s3 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG6"; - mipim1_camera2_clk = "/pinctrl/mipi/mipim1-camera2-clk"; - mipim0_camera0_clk = "/pinctrl/mipi/mipim0-camera0-clk"; - rkcif_mipi_lvds_sditf_vir1 = "/rkcif-mipi-lvds-sditf-vir1"; - pcfg_pull_up_drv_level_9 = "/pinctrl/pcfg-pull-up-drv-level-9"; - dmac2 = "/dma-controller@fed10000"; - pdm0m0_sdi3 = "/pinctrl/pdm0/pdm0m0-sdi3"; - qos_gpu_m2 = "/qos@fdf35400"; - i2s0_sdi3 = "/pinctrl/i2s0/i2s0-sdi3"; - cluster0_opp_table = "/cluster0-opp-table"; - spi2m0_cs1 = "/pinctrl/spi2/spi2m0-cs1"; - otp_id = "/otp@fecc0000/id@7"; - uart5m1_xfer = "/pinctrl/uart5/uart5m1-xfer"; - uart9m1_ctsn = "/pinctrl/uart9/uart9m1-ctsn"; - qos_rga3_0 = "/qos@fdf67000"; - usbdp_phy0_dp = "/phy@fed80000/dp-port"; - uart2m0_xfer = "/pinctrl/uart2/uart2m0-xfer"; - uart6m0_ctsn = "/pinctrl/uart6/uart6m0-ctsn"; - npu_pins = "/pinctrl/npu/npu-pins"; - pcfg_pull_up_drv_level_11 = "/pinctrl/pcfg-pull-up-drv-level-11"; - spdif_tx3 = "/spdif-tx@fdde0000"; - rkispp0 = "/rkispp@fdcd0000"; - xin32k = "/clocks/xin32k"; - vcc_1v8_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG10"; - qos_usb2host_1 = "/qos@fdf3e600"; - bt_sco = "/bt-sco"; - pcfg_output_high_pull_none = "/pinctrl/pcfg-output-high-pull-none"; - adc_keys = "/adc-keys"; - rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; - i2c8 = "/i2c@feca0000"; - dp0 = "/dp@fde50000"; - mipi_te1 = "/pinctrl/mipi/mipi-te1"; - i2c8m3_xfer = "/pinctrl/i2c8/i2c8m3-xfer"; - i2c5m2_xfer = "/pinctrl/i2c5/i2c5m2-xfer"; - pcie30x2_button_rstn = "/pinctrl/pcie30x2/pcie30x2-button-rstn"; - syssram = "/sram@ff001000"; - pcfg_pull_down_drv_level_2 = "/pinctrl/pcfg-pull-down-drv-level-2"; - qos_hdmirx = "/qos@fdf81200"; - i2c2m1_xfer = "/pinctrl/i2c2/i2c2m1-xfer"; - pcie30x4m1_pins = "/pinctrl/pcie30x4/pcie30x4m1-pins"; - vdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG5"; - hw_decompress = "/decompress@fea80000"; - pcie30x1m0_pins = "/pinctrl/pcie30x1/pcie30x1m0-pins"; - mipim0_camera4_clk = "/pinctrl/mipi/mipim0-camera4-clk"; - gmac1_txer = "/pinctrl/gmac1/gmac1-txer"; - uart3_ctsn = "/pinctrl/uart3/uart3-ctsn"; - vcc_sdcard_pwr_en = "/vcc-sdcard-pwr-en-regulator"; - mipi0_csi2_hw = "/mipi0-csi2-hw@fdd10000"; - rkvenc1_mmu = "/iommu@fdbef000"; - edp0 = "/edp@fdec0000"; - rkvenc_ccu = "/rkvenc-ccu"; - rk806_dvs3_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_rst"; - power = "/power-management@fd8d8000/power-controller"; - vad = "/vad@fe4d0000"; - spi3m3_pins = "/pinctrl/spi3/spi3m3-pins"; - pwm8m2_pins = "/pinctrl/pwm8/pwm8m2-pins"; - spi0m2_pins = "/pinctrl/spi0/spi0m2-pins"; - pwm5m1_pins = "/pinctrl/pwm5/pwm5m1-pins"; - vcc_3v3_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG4"; - aclk_isp1_pre = "/clocks/aclk_isp1_pre@fd7c0868"; - pwm2m0_pins = "/pinctrl/pwm2/pwm2m0-pins"; - i2s1m1_sdo2 = "/pinctrl/i2s1/i2s1m1-sdo2"; - pcfg_pull_down_drv_level_13 = "/pinctrl/pcfg-pull-down-drv-level-13"; - eth0_pins = "/pinctrl/eth0/eth0-pins"; - rkcif_mipi_lvds4_sditf_vir1 = "/rkcif-mipi-lvds4-sditf-vir1"; - pwm3 = "/pwm@fd8b0030"; - pdm1m0_sdi3 = "/pinctrl/pdm1/pdm1m0-sdi3"; - rkcif_mmu = "/iommu@fdce0800"; - usbc0_int = "/pinctrl/usb-typec/usbc0-int"; - gmac0_tx_bus2 = "/pinctrl/gmac0/gmac0-tx-bus2"; - sata2 = "/sata@fe230000"; - uart9m2_xfer = "/pinctrl/uart9/uart9m2-xfer"; - dp0_in_vp2 = "/dp@fde50000/ports/port@0/endpoint@2"; - hdmiin_sound = "/hdmiin-sound"; - rkisp0_vir1 = "/rkisp0-vir1"; - uart6_gpios = "/pinctrl/wireless-bluetooth/uart6-gpios"; - spi3m3_cs1 = "/pinctrl/spi3/spi3m3-cs1"; - l2_cache_l1 = "/cpus/l2-cache-l1"; - pcfg_pull_none_drv_level_8 = "/pinctrl/pcfg-pull-none-drv-level-8"; - uart6m1_xfer = "/pinctrl/uart6/uart6m1-xfer"; - pwm11m3_pins = "/pinctrl/pwm11/pwm11m3-pins"; - vp2_out_hdmi0 = "/vop@fdd90000/ports/port@2/endpoint@2"; - qos_hdcp1 = "/qos@fdf81000"; - scmi_reset = "/firmware/scmi/protocol@16"; - vdd_cpu_lit_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; - i2s0_mclk = "/pinctrl/i2s0/i2s0-mclk"; - uart3m0_xfer = "/pinctrl/uart3/uart3m0-xfer"; - uart7m0_ctsn = "/pinctrl/uart7/uart7m0-ctsn"; - usbhost_dwc3_0 = "/usbhost3_0/usb@fcd00000"; - hdmim0_rx_hpdin = "/pinctrl/hdmi/hdmim0-rx-hpdin"; - edp0_out = "/edp@fdec0000/ports/port@1/endpoint"; - rkisp0 = "/rkisp@fdcb0000"; - dsu_grf = "/syscon@fd598000"; - vcc_fan_pwr_en = "/vcc-fan-pwr-en-regulator"; - gmac1_rx_bus2 = "/pinctrl/gmac1/gmac1-rx-bus2"; - uart1m2_rtsn = "/pinctrl/uart1/uart1m2-rtsn"; - csi2_dcphy0 = "/csi2-dcphy0"; - usb2phy0_grf = "/syscon@fd5d0000"; - scmi_clk = "/firmware/scmi/protocol@14"; - emmc_clk = "/pinctrl/emmc/emmc-clk"; - jpege1_mmu = "/iommu@fdba4800"; - qos_rkvenc1_m1ro = "/qos@fdf61200"; - spi2m2_cs0 = "/pinctrl/spi2/spi2m2-cs0"; - vcc5v0_host = "/vcc5v0-host"; - cru = "/clock-controller@fd7c0000"; - hdmim0_tx0_cec = "/pinctrl/hdmi/hdmim0-tx0-cec"; - pcfg_pull_none_drv_level_12 = "/pinctrl/pcfg-pull-none-drv-level-12"; - rk806_dvs2_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_null"; - cpub01_opp_info = "/otp@fecc0000/cpub01-opp-info@43"; - i2s3_sdi = "/pinctrl/i2s3/i2s3-sdi"; - aclk_rkvdec0_pre = "/clocks/aclk_rkvdec0_pre@fd7c08a0"; - cpu_b1 = "/cpus/cpu@500"; - i2c6m2_xfer = "/pinctrl/i2c6/i2c6m2-xfer"; - rknpu_mmu = "/iommu@fdab9000"; - rkcif_mipi_lvds_sditf = "/rkcif-mipi-lvds-sditf"; - i2c3m1_xfer = "/pinctrl/i2c3/i2c3m1-xfer"; - i2c0m0_xfer = "/pinctrl/i2c0/i2c0m0-xfer"; - pcie30x2m0_pins = "/pinctrl/pcie30x2/pcie30x2m0-pins"; - qos_isp1_mwo = "/qos@fdf41000"; - mipi2_csi2_output1 = "/mipi2-csi2/ports/port@1/endpoint@0"; - gmac1_stmmac_axi_setup = "/ethernet@fe1c0000/stmmac-axi-config"; - vcc5v0_usbdcin = "/vcc5v0-usbdcin"; - spi3m1_cs0 = "/pinctrl/spi3/spi3m1-cs0"; - reboot_mode = "/syscon@fd588000/reboot-mode"; - rga3_0_mmu = "/iommu@fdb60f00"; - uart2 = "/serial@feb50000"; - imx415_out0 = "/i2c@fec80000/imx415@37/port/endpoint"; - rkcif_mipi_lvds3_sditf_vir2 = "/rkcif-mipi-lvds3-sditf-vir2"; - pwm9m2_pins = "/pinctrl/pwm9/pwm9m2-pins"; - fec0_mmu = "/iommu@fdcd0f00"; - mipi0_csi2 = "/mipi0-csi2"; - spi1m2_pins = "/pinctrl/spi1/spi1m2-pins"; - pcfg_pull_up_drv_level_7 = "/pinctrl/pcfg-pull-up-drv-level-7"; - pwm6m1_pins = "/pinctrl/pwm6/pwm6m1-pins"; - tsadc_shut_org = "/pinctrl/tsadc/tsadc-shut-org"; - qos_rkvdec1 = "/qos@fdf63000"; - dmac0 = "/dma-controller@fea10000"; - vp2_out_edp1 = "/vop@fdd90000/ports/port@2/endpoint@6"; - pdm0m0_sdi1 = "/pinctrl/pdm0/pdm0m0-sdi1"; - qos_gpu_m0 = "/qos@fdf35000"; - pwm3m0_pins = "/pinctrl/pwm3/pwm3m0-pins"; - i2s0_sdi1 = "/pinctrl/i2s0/i2s0-sdi1"; - qos_av1 = "/qos@fdf64000"; - pcfg_output_low = "/pinctrl/pcfg-output-low"; - spdif_tx1 = "/spdif-tx@fe4f0000"; - hdptxphy1_grf = "/syscon@fd5e4000"; - spi4m0_cs0 = "/pinctrl/spi4/spi4m0-cs0"; - dp1_in_vp2 = "/dp@fde60000/ports/port@0/endpoint@2"; - jpegd_mmu = "/iommu@fdb90480"; - sata0m1_pins = "/pinctrl/sata0/sata0m1-pins"; - uart7m1_xfer = "/pinctrl/uart7/uart7m1-xfer"; - vp1_out_hdmi1 = "/vop@fdd90000/ports/port@1/endpoint@5"; - dp1_out = "/dp@fde60000/ports/port@1/endpoint"; - otp = "/otp@fecc0000"; - uart4m0_xfer = "/pinctrl/uart4/uart4m0-xfer"; - uart8m0_ctsn = "/pinctrl/uart8/uart8m0-ctsn"; - hdcp1 = "/hdcp@fde70000"; - rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; - i2c6 = "/i2c@fec80000"; - qos_jpeg_enc3 = "/qos@fdf66a00"; - i2s2m1_idle = "/pinctrl/i2s2/i2s2m1-idle"; - refclk_pins = "/pinctrl/refclk/refclk-pins"; - pcie3x4_intc = "/pcie@fe150000/legacy-interrupt-controller"; - hdptxphy_hdmi1 = "/hdmiphy@fed70000"; - mipi2_lvds2_sditf = "/rkcif-mipi-lvds2-sditf/port/endpoint"; - pdm1 = "/pdm@fe4c0000"; - vdd_cpu_lit_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; - pdm0m1_clk = "/pinctrl/pdm0/pdm0m1-clk"; - pcfg_pull_down_drv_level_0 = "/pinctrl/pcfg-pull-down-drv-level-0"; - qos_vicap_m0 = "/qos@fdf40600"; - gic = "/interrupt-controller@fe600000"; - vdd_cpu_big1_s0 = "/i2c@fd880000/rk8603@43"; - uart0_rtsn = "/pinctrl/uart0/uart0-rtsn"; - i2c7m2_xfer = "/pinctrl/i2c7/i2c7m2-xfer"; - mclkin_i2s3 = "/clocks/mclkin-i2s3"; - hdmim0_tx0_scl = "/pinctrl/hdmi/hdmim0-tx0-scl"; - hdmim0_tx0_sda = "/pinctrl/hdmi/hdmim0-tx0-sda"; - i2c4m1_xfer = "/pinctrl/i2c4/i2c4m1-xfer"; - spdif1m0_tx = "/pinctrl/spdif1/spdif1m0-tx"; - sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; - i2c1m0_xfer = "/pinctrl/i2c1/i2c1m0-xfer"; - rkcif_mipi_lvds2_sditf_vir3 = "/rkcif-mipi-lvds2-sditf-vir3"; - hdptxphy1 = "/phy@fed70000"; - route_dp1 = "/display-subsystem/route/route-dp1"; - hdmim0_tx0_hpd = "/pinctrl/hdmi/hdmim0-tx0-hpd"; - i2s1m1_sdo0 = "/pinctrl/i2s1/i2s1m1-sdo0"; - pdm1m0_clk = "/pinctrl/pdm1/pdm1m0-clk"; - pcfg_pull_down_drv_level_11 = "/pinctrl/pcfg-pull-down-drv-level-11"; - usbdrd3_1 = "/usbdrd3_1"; - spi2m2_pins = "/pinctrl/spi2/spi2m2-pins"; - pwm7m1_pins = "/pinctrl/pwm7/pwm7m1-pins"; - rkcif_mipi_lvds1_sditf = "/rkcif-mipi-lvds1-sditf"; - pwm1 = "/pwm@fd8b0010"; - pdm1m0_sdi1 = "/pinctrl/pdm1/pdm1m0-sdi1"; - threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; - pwm4m0_pins = "/pinctrl/pwm4/pwm4m0-pins"; - gmac0_mtl_rx_setup = "/ethernet@fe1b0000/rx-queues-config"; - sata0 = "/sata@fe210000"; - dp0_in_vp0 = "/dp@fde50000/ports/port@0/endpoint@0"; - can2 = "/can@fea70000"; - pcfg_pull_none_drv_level_6 = "/pinctrl/pcfg-pull-none-drv-level-6"; - usbdrd_dwc3_0 = "/usbdrd3_0/usb@fc000000"; - rkvenc0 = "/rkvenc-core@fdbd0000"; - bt_reset_gpio = "/pinctrl/wireless-bluetooth/bt-reset-gpio"; - sata1m1_pins = "/pinctrl/sata1/sata1m1-pins"; - spll = "/clocks/spll"; - uart8m1_xfer = "/pinctrl/uart8/uart8m1-xfer"; - sata_pins = "/pinctrl/sata/sata-pins"; - pcfg_pull_none_drv_level_1_smt = "/pinctrl/pcfg-pull-none-drv-level-1-smt"; - qos_npu1 = "/qos@fdf70000"; - uart5m0_xfer = "/pinctrl/uart5/uart5m0-xfer"; - uart9m0_ctsn = "/pinctrl/uart9/uart9m0-ctsn"; - pwm10m2_pins = "/pinctrl/pwm10/pwm10m2-pins"; - rk806_dvs1_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_pwrdn"; - pipe_phy0_grf = "/syscon@fd5bc000"; - es8388 = "/i2c@fec80000/es8388@11"; - spdif_rx2 = "/spdif-rx@fde18000"; - usb_host1_ehci = "/usb@fc880000"; - xin24m = "/clocks/xin24m"; - pcie20x1_2_button_rstn = "/pinctrl/pcie20x1/pcie20x1-2-button-rstn"; - mipi2_csi2_hw = "/mipi2-csi2-hw@fdd30000"; - acdcdig_dsm = "/codec-digital@fe500000"; - vop_grf = "/syscon@fd5a4000"; - rk806_dvs1_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_slp"; - i2s6_8ch = "/i2s@fddf4000"; - i2s2m1_sdo = "/pinctrl/i2s2/i2s2m1-sdo"; - pcie30x1_1_button_rstn = "/pinctrl/pcie30x1/pcie30x1-1-button-rstn"; - pcfg_output_low_pull_down = "/pinctrl/pcfg-output-low-pull-down"; - pcfg_pull_none_drv_level_10 = "/pinctrl/pcfg-pull-none-drv-level-10"; - pdm0m1_clk1 = "/pinctrl/pdm0/pdm0m1-clk1"; - mipidphy0_grf = "/syscon@fd5b4000"; - route_dsi1 = "/display-subsystem/route/route-dsi1"; - route_hdmi0 = "/display-subsystem/route/route-hdmi0"; - rkvdec_ccu = "/rkvdec-ccu@fdc30000"; - csi2_dphy4 = "/csi2-dphy4"; - gmac1_rgmii_bus = "/pinctrl/gmac1/gmac1-rgmii-bus"; - qos_sdio = "/qos@fdf39000"; - tsadc = "/tsadc@fec00000"; - pcfg_output_high_pull_up = "/pinctrl/pcfg-output-high-pull-up"; - hclk_usb = "/clocks/hclk_usb@fd7c08a8"; - avcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG1"; - edp0_in_vp2 = "/edp@fdec0000/ports/port@0/endpoint@2"; - mdio1 = "/ethernet@fe1c0000/mdio"; - gpio3 = "/pinctrl/gpio@fec40000"; - gpu_opp_table = "/gpu-opp-table"; - cif_mipi2_in0 = "/rkcif-mipi-lvds2/port/endpoint"; - pcfg_output_high = "/pinctrl/pcfg-output-high"; - i2c8m2_xfer = "/pinctrl/i2c8/i2c8m2-xfer"; - vdpu_mmu = "/iommu@fdb50800"; - i2c5m1_xfer = "/pinctrl/i2c5/i2c5m1-xfer"; - combphy0_ps = "/phy@fee00000"; - rgb = "/syscon@fd58c000/rgb"; - hclk_vo1 = "/clocks/hclk_vo1@fd7c08ec"; - i2c2m0_xfer = "/pinctrl/i2c2/i2c2m0-xfer"; - uart0 = "/serial@fd890000"; - mipidcphy1_grf = "/syscon@fd5ec000"; - pcie30x4m0_pins = "/pinctrl/pcie30x4/pcie30x4m0-pins"; - vdd_ddr_pll_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG2"; - gmac0_txer = "/pinctrl/gmac0/gmac0-txer"; - uart2_ctsn = "/pinctrl/uart2/uart2-ctsn"; - pcfg_pull_up_drv_level_5 = "/pinctrl/pcfg-pull-up-drv-level-5"; - pcfg_pull_down_drv_level_9 = "/pinctrl/pcfg-pull-down-drv-level-9"; - pcfg_pull_none_drv_level_5_smt = "/pinctrl/pcfg-pull-none-drv-level-5-smt"; - i2s2m0_sdi = "/pinctrl/i2s2/i2s2m0-sdi"; - qos_rga2_mwo = "/qos@fdf66e00"; - spi3m2_pins = "/pinctrl/spi3/spi3m2-pins"; - pwm8m1_pins = "/pinctrl/pwm8/pwm8m1-pins"; - dsi1_in = "/dsi@fde30000/ports/port@0"; - vp3_out_dsi0 = "/vop@fdd90000/ports/port@3/endpoint@0"; - pclk_vo0_grf = "/clocks/pclk_vo0_grf@fd7c08dc"; - spi0m1_pins = "/pinctrl/spi0/spi0m1-pins"; - pwm5m0_pins = "/pinctrl/pwm5/pwm5m0-pins"; - bt1120_pins = "/pinctrl/bt1120/bt1120-pins"; - dp1_in_vp0 = "/dp@fde60000/ports/port@0/endpoint@0"; - i2s1m0_sdo2 = "/pinctrl/i2s1/i2s1m0-sdo2"; - mipi2_csi2_input0 = "/mipi2-csi2/ports/port@0/endpoint@0"; - u2phy0_otg = "/syscon@fd5d0000/usb2-phy@0/otg-port"; - vp0_out_edp0 = "/vop@fdd90000/ports/port@0/endpoint@1"; - qos_fisheye0 = "/qos@fdf40000"; - i2c4 = "/i2c@feac0000"; - sata2m1_pins = "/pinctrl/sata2/sata2m1-pins"; - uart9m1_xfer = "/pinctrl/uart9/uart9m1-xfer"; - qos_jpeg_enc1 = "/qos@fdf66600"; - i2s1m1_sdi2 = "/pinctrl/i2s1/i2s1m1-sdi2"; - i2s3_2ch = "/i2s@fe4a0000"; - uart6m0_xfer = "/pinctrl/uart6/uart6m0-xfer"; - cpul_leakage = "/otp@fecc0000/cpul-leakage@19"; - pwm11m2_pins = "/pinctrl/pwm11/pwm11m2-pins"; - fspim1_cs1 = "/pinctrl/fspi/fspim1-cs1"; - vdd_vdenc_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; - pdm1m1_clk1 = "/pinctrl/pdm1/pdm1m1-clk1"; - hdmi_debug5 = "/pinctrl/hdmi/hdmi-debug5"; - uart1m1_rtsn = "/pinctrl/uart1/uart1m1-rtsn"; - qos_isp1_mro = "/qos@fdf41100"; - ddrphych3_pins = "/pinctrl/ddrphych3/ddrphych3-pins"; - spi0m3_cs1 = "/pinctrl/spi0/spi0m3-cs1"; - qos_rkvenc0_m1ro = "/qos@fdf60200"; - qos_jpeg_dec = "/qos@fdf66200"; - mclkin_i2s1 = "/clocks/mclkin-i2s1"; - edp1_in_vp2 = "/edp@fded0000/ports/port@0/endpoint@2"; - pcie30_avdd0v75 = "/pcie30-avdd0v75"; - isp0_mmu = "/iommu@fdcb7f00"; - qos_npu0_mwr = "/qos@fdf72000"; - rkvdec0 = "/rkvdec-core@fdc38000"; - rkvdec0_mmu = "/iommu@fdc38700"; - rk806_dvs1_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_null"; - pwm15 = "/pwm@febf0030"; - vop_mmu = "/iommu@fdd97e00"; - rkcif_mipi_lvds2_sditf_vir1 = "/rkcif-mipi-lvds2-sditf-vir1"; - pcie2x1l2 = "/pcie@fe190000"; - i2c6m1_xfer = "/pinctrl/i2c6/i2c6m1-xfer"; - package_serial_number_low = "/otp@fecc0000/package-serial-number-low@6"; - iep_mmu = "/iommu@fdbb0800"; - l2_cache_b3 = "/cpus/l2-cache-b3"; - i2c3m0_xfer = "/pinctrl/i2c3/i2c3m0-xfer"; - vcc_1v1_nldo_s3 = "/vcc-1v1-nldo-s3"; - spi1m2_cs1 = "/pinctrl/spi1/spi1m2-cs1"; - pdm0m1_idle = "/pinctrl/pdm0/pdm0m1-idle"; - can0 = "/can@fea50000"; - spi4m2_pins = "/pinctrl/spi4/spi4m2-pins"; - pcfg_pull_none_drv_level_4 = "/pinctrl/pcfg-pull-none-drv-level-4"; - pwm9m1_pins = "/pinctrl/pwm9/pwm9m1-pins"; - arm_pmu = "/arm-pmu"; - vp2 = "/vop@fdd90000/ports/port@2"; - rk806single = "/spi@feb20000/rk806single@0"; - spi1m1_pins = "/pinctrl/spi1/spi1m1-pins"; - pwm6m0_pins = "/pinctrl/pwm6/pwm6m0-pins"; - gmac0_mtl_tx_setup = "/ethernet@fe1b0000/tx-queues-config"; - rng = "/rng@fe378000"; - cpu_l2 = "/cpus/cpu@200"; - uart9 = "/serial@febc0000"; - spi0m1_cs0 = "/pinctrl/spi0/spi0m1-cs0"; - rk806_dvs3_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_gpio"; - rkcif_mipi_lvds5_sditf = "/rkcif-mipi-lvds5-sditf"; - usbdpphy0_grf = "/syscon@fd5c8000"; - mipim1_camera3_clk = "/pinctrl/mipi/mipim1-camera3-clk"; - pcie_clk3 = "/pcie-clk3"; - mipim0_camera1_clk = "/pinctrl/mipi/mipim0-camera1-clk"; - vp0_out_hdmi0 = "/vop@fdd90000/ports/port@0/endpoint@2"; - rkcif = "/rkcif@fdce0000"; - gmac0_rgmii_clk = "/pinctrl/gmac0/gmac0-rgmii-clk"; - wdt_en_base = "/pinctrl/wdt-pc9202/wdt-en-base"; - vp3_out_rgb = "/vop@fdd90000/ports/port@3/endpoint@2"; - spdif_rx0 = "/spdif-rx@fde08000"; - sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; - hdmim2_tx0_scl = "/pinctrl/hdmi/hdmim2-tx0-scl"; - hdmim2_tx0_sda = "/pinctrl/hdmi/hdmim2-tx0-sda"; - spi2m1_cs1 = "/pinctrl/spi2/spi2m1-cs1"; - pwm15m3_pins = "/pinctrl/pwm15/pwm15m3-pins"; - sata0m0_pins = "/pinctrl/sata0/sata0m0-pins"; - uart7m0_xfer = "/pinctrl/uart7/uart7m0-xfer"; - csi2_dphy2 = "/csi2-dphy2"; - spi3 = "/spi@feb30000"; - edp0_in_vp0 = "/edp@fdec0000/ports/port@0/endpoint@0"; - gpio1 = "/pinctrl/gpio@fec20000"; - tsadcm1_shut = "/pinctrl/tsadc/tsadcm1-shut"; - usbdp_phy0_dp_altmode_mux = "/phy@fed80000/port/endpoint@1"; - i2s2m0_idle = "/pinctrl/i2s2/i2s2m0-idle"; - spi1m0_cs0 = "/pinctrl/spi1/spi1m0-cs0"; - rkcif_mipi_lvds1_sditf_vir2 = "/rkcif-mipi-lvds1-sditf-vir2"; - i2s3_sclk = "/pinctrl/i2s3/i2s3-sclk"; - hdmim1_rx_hpdin = "/pinctrl/hdmi/hdmim1-rx-hpdin"; - spi3m0_cs1 = "/pinctrl/spi3/spi3m0-cs1"; - mipi_dcphy1 = "/mipi-dcphy-dummy"; - vcc5v0_sys = "/vcc5v0-sys"; - aclk_hdcp0_pre = "/clocks/aclk_hdcp0_pre@fd7c08dc"; - usb_con = "/i2c@fec80000/fusb302@22/connector"; - hdmirx_ctrler = "/hdmirx-controller@fdee0000"; - i2c7m1_xfer = "/pinctrl/i2c7/i2c7m1-xfer"; - pcfg_pull_up_drv_level_3 = "/pinctrl/pcfg-pull-up-drv-level-3"; - rgmii_phy1 = "/ethernet@fe1c0000/mdio/phy@1"; - i2c4m0_xfer = "/pinctrl/i2c4/i2c4m0-xfer"; - pcfg_pull_down_drv_level_7 = "/pinctrl/pcfg-pull-down-drv-level-7"; - spdif0m0_tx = "/pinctrl/spdif0/spdif0m0-tx"; - wdt = "/watchdog@feaf0000"; - vdd_0v85_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG4"; - cspmu = "/cspmu@fd10c000"; - gmac_uio0 = "/uio@fe1b0000"; - av1d_mmu = "/iommu@fdca0000"; - mailbox2 = "/mailbox@fece0000"; - mipi4_csi2_hw = "/mipi4-csi2-hw@fdd50000"; - pdm1m1_idle = "/pinctrl/pdm1/pdm1m1-idle"; - rga3_core0 = "/rga@fdb60000"; - i2s1m0_sdo0 = "/pinctrl/i2s1/i2s1m0-sdo0"; - bigcore1_thermal = "/thermal-zones/bigcore1-thermal"; - pcfg_output_low_pull_up = "/pinctrl/pcfg-output-low-pull-up"; - spi2m1_pins = "/pinctrl/spi2/spi2m1-pins"; - pwm7m0_pins = "/pinctrl/pwm7/pwm7m0-pins"; - i2c2 = "/i2c@feaa0000"; - npu_grf = "/syscon@fd5a2000"; - i2s1m1_sdi0 = "/pinctrl/i2s1/i2s1m1-sdi0"; - mipi5_csi2 = "/mipi5-csi2"; - pwm8 = "/pwm@febe0000"; - log_leakage = "/otp@fecc0000/log-leakage@1a"; - cpub23_opp_info = "/otp@fecc0000/cpub23-opp-info@49"; - vdd_vdenc_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; - rga2 = "/rga@fdb80000"; - emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; - qos_usb3_0 = "/qos@fdf3e200"; - sata1m0_pins = "/pinctrl/sata1/sata1m0-pins"; - uart8m0_xfer = "/pinctrl/uart8/uart8m0-xfer"; - pwm13m2_pins = "/pinctrl/pwm13/pwm13m2-pins"; - hdmi_debug3 = "/pinctrl/hdmi/hdmi-debug3"; - cam0_or_cam1_switch_pin = "/pinctrl/cam/cam0-or-cam1-switch-pin"; - mcum1_pins = "/pinctrl/mcu/mcum1-pins"; - pwm10m1_pins = "/pinctrl/pwm10/pwm10m1-pins"; - edp1_out = "/edp@fded0000/ports/port@1/endpoint"; - hclk_sdio_pre = "/clocks/hclk_sdio_pre@fd7c092c"; - usb_host0_ehci = "/usb@fc800000"; - edp1_in_vp0 = "/edp@fded0000/ports/port@0/endpoint@0"; - gmac1 = "/ethernet@fe1c0000"; - i2s10_8ch = "/i2s@fde00000"; - hdmi1_in = "/hdmi@fdea0000/ports/port@0"; - usb2phy1_grf = "/syscon@fd5d4000"; - pdm0m0_clk1 = "/pinctrl/pdm0/pdm0m0-clk1"; - jpege2_mmu = "/iommu@fdba8800"; - pwm13 = "/pwm@febf0010"; - pcie2x1l0 = "/pcie@fe170000"; - hdmi0_in_vp1 = "/hdmi@fde80000/ports/port@0/endpoint@1"; - hdmim0_tx1_cec = "/pinctrl/hdmi/hdmim0-tx1-cec"; - l2_cache_b1 = "/cpus/l2-cache-b1"; - cif_dvp_bus8 = "/pinctrl/cif/cif-dvp-bus8"; - qos_rga2_mro = "/qos@fdf66c00"; - aclk_rkvdec1_pre = "/clocks/aclk_rkvdec1_pre@fd7c08a4"; - i2c8m1_xfer = "/pinctrl/i2c8/i2c8m1-xfer"; - vdd_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG5"; - hdmirx_det = "/pinctrl/hdmirx/hdmirx-det"; - pca9555 = "/i2c@feab0000/gpio@21"; - qos_sdmmc = "/qos@fdf3d800"; - clk32k_out1 = "/pinctrl/clk32k/clk32k-out1"; - i2c5m0_xfer = "/pinctrl/i2c5/i2c5m0-xfer"; - cif_dvp_clk = "/pinctrl/cif/cif-dvp-clk"; - rknpu = "/npu@fdab0000"; - pcfg_pull_none_drv_level_2 = "/pinctrl/pcfg-pull-none-drv-level-2"; - spi3m2_cs0 = "/pinctrl/spi3/spi3m2-cs0"; - vp0 = "/vop@fdd90000/ports/port@0"; - rga3_1_mmu = "/iommu@fdb70f00"; - jtagm2_pins = "/pinctrl/jtag/jtagm2-pins"; - cpu_l0 = "/cpus/cpu@0"; - uart7 = "/serial@feba0000"; - rkisp1_vir2 = "/rkisp1-vir2"; - fec1_mmu = "/iommu@fdcd8f00"; - qos_vop_m0 = "/qos@fdf82000"; - pcie_clk1 = "/pcie-clk1"; - gmac1_ptp_ref_clk = "/pinctrl/gmac1/gmac1-ptp-ref-clk"; - spi3m1_pins = "/pinctrl/spi3/spi3m1-pins"; - pwm8m0_pins = "/pinctrl/pwm8/pwm8m0-pins"; - hdmi0_sound = "/hdmi0-sound"; - ioc = "/syscon@fd5f0000"; - spi0m0_pins = "/pinctrl/spi0/spi0m0-pins"; - avsd = "/avsd-plus@fdb51000"; - rkcif_mipi_lvds5_sditf_vir3 = "/rkcif-mipi-lvds5-sditf-vir3"; - u2phy2 = "/syscon@fd5d8000/usb2-phy@8000"; - sfc = "/spi@fe2b0000"; - csi2_dphy0 = "/csi2-dphy0"; - spi1 = "/spi@feb10000"; - spi4m1_cs0 = "/pinctrl/spi4/spi4m1-cs0"; - gpu_grf = "/syscon@fd5a0000"; - pcfg_pull_up_drv_level_14 = "/pinctrl/pcfg-pull-up-drv-level-14"; - wireless_bluetooth = "/wireless-bluetooth"; - pclk_av1_pre = "/clocks/pclk_av1_pre@fd7c0910"; - sata2m0_pins = "/pinctrl/sata2/sata2m0-pins"; - uart9m0_xfer = "/pinctrl/uart9/uart9m0-xfer"; - pwm14m2_pins = "/pinctrl/pwm14/pwm14m2-pins"; - i2s1m0_sdi2 = "/pinctrl/i2s1/i2s1m0-sdi2"; - pwm11m1_pins = "/pinctrl/pwm11/pwm11m1-pins"; - bt_sound = "/bt-sound"; - qos_rkvenc1_m0ro = "/qos@fdf61000"; - mclkout_i2s2 = "/clocks/mclkout-i2s2@fd58c318"; - dsi0 = "/dsi@fde20000"; - pdm1m0_clk1 = "/pinctrl/pdm1/pdm1m0-clk1"; - uart1m0_rtsn = "/pinctrl/uart1/uart1m0-rtsn"; - ddrphych2_pins = "/pinctrl/ddrphych2/ddrphych2-pins"; - route_edp0 = "/display-subsystem/route/route-edp0"; - hdmi0 = "/hdmi@fde80000"; - es8388_sound = "/es8388-sound"; - hdmi1_in_vp1 = "/hdmi@fdea0000/ports/port@0/endpoint@1"; - pcfg_pull_up_drv_level_1 = "/pinctrl/pcfg-pull-up-drv-level-1"; - pcfg_pull_down_drv_level_5 = "/pinctrl/pcfg-pull-down-drv-level-5"; - i2s0_sdo2 = "/pinctrl/i2s0/i2s0-sdo2"; - vop_out = "/vop@fdd90000/ports"; - vdd_0v75_s3 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG1"; - hdmim1_rx = "/pinctrl/hdmi/hdmim1-rx"; - pcfg_pull_down_smt = "/pinctrl/pcfg-pull-down-smt"; - hdmim0_tx1_scl = "/pinctrl/hdmi/hdmim0-tx1-scl"; - hdmim0_tx1_sda = "/pinctrl/hdmi/hdmim0-tx1-sda"; - cpul_opp_info = "/otp@fecc0000/cpul-opp-info@3d"; - clk32k_in = "/pinctrl/clk32k/clk32k-in"; - usbdp_phy1 = "/phy@fed90000"; - mailbox0 = "/mailbox@fec60000"; - i2c6m0_xfer = "/pinctrl/i2c6/i2c6m0-xfer"; - pdm0m1_sdi2 = "/pinctrl/pdm0/pdm0m1-sdi2"; - sdmmc = "/mmc@fe2c0000"; - hclk_nvm = "/clocks/hclk_nvm@fd7c087c"; - hdmim0_tx1_hpd = "/pinctrl/hdmi/hdmim0-tx1-hpd"; - vp0_out_dp0 = "/vop@fdd90000/ports/port@0/endpoint@0"; - vddq_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG9"; - vcc_3v3_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG8"; - gmac0_ppstring = "/pinctrl/gmac0/gmac0-ppstring"; - i2c0 = "/i2c@fd880000"; - pdm1m1_clk = "/pinctrl/pdm1/pdm1m1-clk"; - pdm0m0_idle = "/pinctrl/pdm0/pdm0m0-idle"; - soc_thermal = "/thermal-zones/soc-thermal"; - cluster1_opp_table = "/cluster1-opp-table"; - i2s0_idle = "/pinctrl/i2s0/i2s0-idle"; - spi4m1_pins = "/pinctrl/spi4/spi4m1-pins"; - npu_opp_info = "/otp@fecc0000/npu-opp-info@55"; - pwm9m0_pins = "/pinctrl/pwm9/pwm9m0-pins"; - pwm6 = "/pwm@febd0020"; - spi1m0_pins = "/pinctrl/spi1/spi1m0-pins"; - hym8563 = "/i2c@fd880000/hym8563@51"; - i2s1m1_sclk = "/pinctrl/i2s1/i2s1m1-sclk"; - rk806_dvs2_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_gpio"; - hp_det = "/pinctrl/headphone/hp-det"; - hdmi_debug1 = "/pinctrl/hdmi/hdmi-debug1"; - vp1_out_dp1 = "/vop@fdd90000/ports/port@1/endpoint@3"; - qos_mcu_npu = "/qos@fdf72400"; - auddsm_pins = "/pinctrl/auddsm/auddsm-pins"; - i2s3_lrck = "/pinctrl/i2s3/i2s3-lrck"; - pcfg_pull_none_drv_level_2_smt = "/pinctrl/pcfg-pull-none-drv-level-2-smt"; - pwm15m2_pins = "/pinctrl/pwm15/pwm15m2-pins"; - pipe_phy1_grf = "/syscon@fd5c0000"; - pwm12m1_pins = "/pinctrl/pwm12/pwm12m1-pins"; - pwm11 = "/pwm@febe0030"; - rkisp_unite = "/rkisp-unite@fdcb0000"; - rkcif_mipi_lvds2_sditf = "/rkcif-mipi-lvds2-sditf"; - vp1_out_edp0 = "/vop@fdd90000/ports/port@1/endpoint@1"; - hclk_isp1_pre = "/clocks/hclk_isp1_pre@fd7c0868"; - rk806_dvs2_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_slp"; - i2s7_8ch = "/i2s@fddf8000"; - uart5m1_rtsn = "/pinctrl/uart5/uart5m1-rtsn"; - mipidphy1_grf = "/syscon@fd5b5000"; - usbhost3_0 = "/usbhost3_0"; - jpege2 = "/jpege-core@fdba8000"; - pcfg_pull_none_drv_level_15 = "/pinctrl/pcfg-pull-none-drv-level-15"; - pcie3x2_intc = "/pcie@fe160000/legacy-interrupt-controller"; - vp2_out_dsi1 = "/vop@fdd90000/ports/port@2/endpoint@4"; - mipidphy0_in_ucam0 = "/csi2-dphy0/ports/port@0/endpoint@0"; - av1d = "/av1d@fdc70000"; - uart1m2_ctsn = "/pinctrl/uart1/uart1m2-ctsn"; - sdiom1_pins = "/pinctrl/sdio/sdiom1-pins"; - rockchip_suspend = "/rockchip-suspend"; - rk806_dvs2_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_pwrdn"; - pcfg_pull_none_drv_level_0 = "/pinctrl/pcfg-pull-none-drv-level-0"; - npu_thermal = "/thermal-zones/npu-thermal"; - i2c7m0_xfer = "/pinctrl/i2c7/i2c7m0-xfer"; - pdm1m1_sdi2 = "/pinctrl/pdm1/pdm1m1-sdi2"; - cpu_pins = "/pinctrl/cpu/cpu-pins"; - dsi0_in_vp2 = "/dsi@fde20000/ports/port@0/endpoint@0"; - bt_wake_gpio = "/pinctrl/wireless-bluetooth/bt-wake-gpio"; - uart5 = "/serial@feb80000"; - dwc3_0_role_switch = "/usbdrd3_0/usb@fc000000/port/endpoint@0"; - rkisp1_vir0 = "/rkisp1-vir0"; - fiq_debugger = "/fiq-debugger"; - usbdp_phy1_u3 = "/phy@fed90000/u3-port"; - spi0m0_cs1 = "/pinctrl/spi0/spi0m0-cs1"; - sdio = "/mmc@fe2d0000"; - rkcif_mipi_lvds_sditf_vir2 = "/rkcif-mipi-lvds-sditf-vir2"; - spdif1m2_tx = "/pinctrl/spdif1/spdif1m2-tx"; - qos_gpu_m3 = "/qos@fdf35600"; - pdm1m0_idle = "/pinctrl/pdm1/pdm1m0-idle"; - pcfg_pull_none_drv_level_6_smt = "/pinctrl/pcfg-pull-none-drv-level-6-smt"; - user_led = "/leds/user"; - rkcif_mipi_lvds5_sditf_vir1 = "/rkcif-mipi-lvds5-sditf-vir1"; - i2s2m1_sdi = "/pinctrl/i2s2/i2s2m1-sdi"; - uart8_xfer = "/pinctrl/uart8/uart8-xfer"; - u2phy0 = "/syscon@fd5d0000/usb2-phy@0"; - pclk_vo1_grf = "/clocks/pclk_vo1_grf@fd7c08ec"; - vdd_gpu_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; - spi2m0_pins = "/pinctrl/spi2/spi2m0-pins"; - qos_rga3_1 = "/qos@fdf36000"; - i2s2m1_sclk = "/pinctrl/i2s2/i2s2m1-sclk"; - pcfg_pull_up_drv_level_12 = "/pinctrl/pcfg-pull-up-drv-level-12"; - spdif_tx4 = "/spdif-tx@fdde8000"; - gmac1_mtl_rx_setup = "/ethernet@fe1c0000/rx-queues-config"; - rkispp1 = "/rkispp@fdcd8000"; - hdmim2_tx1_cec = "/pinctrl/hdmi/hdmim2-tx1-cec"; - u2phy1_otg = "/syscon@fd5d4000/usb2-phy@4000/otg-port"; - hdptxphy_hdmi_clk0 = "/hdmiphy@fed60000/clk-port"; - i2s1m0_sdi0 = "/pinctrl/i2s1/i2s1m0-sdi0"; - mipi4_csi2 = "/mipi4-csi2"; - mclkout_i2s0 = "/clocks/mclkout-i2s0@fd58c318"; - vcc5v0_host3 = "/vcc5v0-host3"; - rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; - vdd_cpu_big0_s0 = "/i2c@fd880000/rk8602@42"; - dp1 = "/dp@fde60000"; - emmc_data_strobe = "/pinctrl/emmc/emmc-data-strobe"; - pwm13m1_pins = "/pinctrl/pwm13/pwm13m1-pins"; - vop_pins = "/pinctrl/vop/vop-pins"; - pcie20x1m1_pins = "/pinctrl/pcie20x1/pcie20x1m1-pins"; - fspim2_cs1 = "/pinctrl/fspi/fspim2-cs1"; - vcc_hub = "/vcc-hub-regulator"; - mcum0_pins = "/pinctrl/mcu/mcum0-pins"; - pwm10m0_pins = "/pinctrl/pwm10/pwm10m0-pins"; - uart9m2_rtsn = "/pinctrl/uart9/uart9m2-rtsn"; - mipidcphy0 = "/phy@feda0000"; - uart6m1_rtsn = "/pinctrl/uart6/uart6m1-rtsn"; - vcc3v3_pcie30 = "/vcc3v3-pcie30"; - pcfg_pull_down_drv_level_3 = "/pinctrl/pcfg-pull-down-drv-level-3"; - mipim1_camera0_clk = "/pinctrl/mipi/mipim1-camera0-clk"; - i2s0_sdo0 = "/pinctrl/i2s0/i2s0-sdo0"; - vop = "/vop@fdd90000"; - gmac0_ptp_refclk = "/pinctrl/gmac0/gmac0-ptp-refclk"; - usbdp_phy0_orientation_switch = "/phy@fed80000/port/endpoint@0"; - vepu = "/vepu@fdb50000"; - cif_clk = "/pinctrl/cif/cif-clk"; - pcie30_phy_grf = "/syscon@fd5b8000"; - isp1_mmu = "/iommu@fdcc7f00"; - pdm0m1_sdi0 = "/pinctrl/pdm0/pdm0m1-sdi0"; - rkvdec1_mmu = "/iommu@fdc48700"; - edp1 = "/edp@fded0000"; - cam0_cam1_switch = "/cam0-cam1-switch"; - gmac1_ppstrig = "/pinctrl/gmac1/gmac1-ppstrig"; - i2c8m0_xfer = "/pinctrl/i2c8/i2c8m0-xfer"; - dsi1_in_vp2 = "/dsi@fde30000/ports/port@0/endpoint@0"; - hdmim2_rx_hpdin = "/pinctrl/hdmi/hdmim2-rx-hpdin"; - i2s1m1_sdo3 = "/pinctrl/i2s1/i2s1m1-sdo3"; - pcfg_pull_down_drv_level_14 = "/pinctrl/pcfg-pull-down-drv-level-14"; - gmac0_rx_bus2 = "/pinctrl/gmac0/gmac0-rx-bus2"; - rkcif_mipi_lvds4_sditf_vir2 = "/rkcif-mipi-lvds4-sditf-vir2"; - center_thermal = "/thermal-zones/center-thermal"; - uart0_ctsn = "/pinctrl/uart0/uart0-ctsn"; - uart4_rtsn = "/pinctrl/uart4/uart4-rtsn"; - pwm4 = "/pwm@febd0000"; - vdd2_ddr_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG6"; - jtagm1_pins = "/pinctrl/jtag/jtagm1-pins"; - rkisp0_vir2 = "/rkisp0-vir2"; - i2c1m4_xfer = "/pinctrl/i2c1/i2c1m4-xfer"; - l2_cache_l2 = "/cpus/l2-cache-l2"; - pcfg_pull_none_drv_level_9 = "/pinctrl/pcfg-pull-none-drv-level-9"; - qos_vdpu = "/qos@fdf67200"; - vp2_out_hdmi1 = "/vop@fdd90000/ports/port@2/endpoint@7"; - spi3m0_pins = "/pinctrl/spi3/spi3m0-pins"; - pcfg_output_low_pull_none = "/pinctrl/pcfg-output-low-pull-none"; - spi0m2_cs0 = "/pinctrl/spi0/spi0m2-cs0"; - rkisp1 = "/rkisp@fdcc0000"; - usbdpphy1_grf = "/syscon@fd5cc000"; - mipim1_camera4_clk = "/pinctrl/mipi/mipim1-camera4-clk"; - mipim0_camera2_clk = "/pinctrl/mipi/mipim0-camera2-clk"; - csi2_dcphy1 = "/csi2-dcphy1"; - hdmim2_tx1_scl = "/pinctrl/hdmi/hdmim2-tx1-scl"; - hdmim2_tx1_sda = "/pinctrl/hdmi/hdmim2-tx1-sda"; - spi2m2_cs1 = "/pinctrl/spi2/spi2m2-cs1"; - chosen = "/chosen"; - soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; - rk806_dvs1_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_rst"; - mpp_srv = "/mpp-srv"; - hclk_rkvenc1_pre = "/clocks/hclk_rkvenc1_pre@fd7c08c0"; - dp0m2_pins = "/pinctrl/dp0/dp0m2-pins"; - debug = "/debug@fd104000"; - jpege0 = "/jpege-core@fdba0000"; - pcfg_pull_none_drv_level_13 = "/pinctrl/pcfg-pull-none-drv-level-13"; - pwm14m1_pins = "/pinctrl/pwm14/pwm14m1-pins"; - pwm11m0_pins = "/pinctrl/pwm11/pwm11m0-pins"; - vp2_out_dp0 = "/vop@fdd90000/ports/port@2/endpoint@0"; - qos_rkvenc0_m0ro = "/qos@fdf60000"; - its0 = "/interrupt-controller@fe600000/msi-controller@fe640000"; - cpu_b2 = "/cpus/cpu@600"; - uart7m1_rtsn = "/pinctrl/uart7/uart7m1-rtsn"; - usb_5v_ctrl = "/pinctrl/usb-typec/usb-5v-ctrl"; - tsadc_gpio_func = "/pinctrl/gpio-func/tsadc-gpio-func"; - spi1m1_cs0 = "/pinctrl/spi1/spi1m1-cs0"; - pcfg_pull_down = "/pinctrl/pcfg-pull-down"; - dmc_opp_info = "/otp@fecc0000/dmc-opp-info@5b"; - ddrphych1_pins = "/pinctrl/ddrphych1/ddrphych1-pins"; - dsi0_in = "/dsi@fde20000/ports/port@0"; - pdm1m1_sdi0 = "/pinctrl/pdm1/pdm1m1-sdi0"; - spi3m1_cs1 = "/pinctrl/spi3/spi3m1-cs1"; - bigcore0_grf = "/syscon@fd590000"; - cpub1_leakage = "/otp@fecc0000/cpub1-leakage@18"; - uart3 = "/serial@feb60000"; - aclk_hdcp1_pre = "/clocks/aclk_hdcp1_pre@fd7c08ec"; - pcfg_pull_up = "/pinctrl/pcfg-pull-up"; - rkcif_mipi_lvds3_sditf_vir3 = "/rkcif-mipi-lvds3-sditf-vir3"; - codec_leakage = "/otp@fecc0000/codec-leakage@29"; - pcfg_pull_up_drv_level_8 = "/pinctrl/pcfg-pull-up-drv-level-8"; - dmac1 = "/dma-controller@fea30000"; - pdm0m0_sdi2 = "/pinctrl/pdm0/pdm0m0-sdi2"; - i2s1m1_lrck = "/pinctrl/i2s1/i2s1m1-lrck"; - qos_gpu_m1 = "/qos@fdf35200"; - i2s0_sdi2 = "/pinctrl/i2s0/i2s0-sdi2"; - spi2m0_cs0 = "/pinctrl/spi2/spi2m0-cs0"; - gpu_opp_info = "/otp@fecc0000/gpu-opp-info@4f"; - csi2_dphy1_hw = "/csi2-dphy1-hw@fedc8000"; - pcfg_pull_up_drv_level_10 = "/pinctrl/pcfg-pull-up-drv-level-10"; - spdif_tx2 = "/spdif-tx@fddb0000"; - npu_opp_table = "/npu-opp-table"; - spi4m0_cs1 = "/pinctrl/spi4/spi4m0-cs1"; - vo0_grf = "/syscon@fd5a6000"; - i2c2m4_xfer = "/pinctrl/i2c2/i2c2m4-xfer"; - qos_usb2host_0 = "/qos@fdf3e400"; - spi4m0_pins = "/pinctrl/spi4/spi4m0-pins"; - gmac1_mtl_tx_setup = "/ethernet@fe1c0000/tx-queues-config"; - rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; - i2s1m0_sclk = "/pinctrl/i2s1/i2s1m0-sclk"; - i2c7 = "/i2c@fec90000"; - mipi2_csi2_output = "/mipi2-csi2/ports/port@1/endpoint@0"; - mipi_te0 = "/pinctrl/mipi/mipi-te0"; - sata_reset = "/pinctrl/sata/sata-reset"; - dp1m2_pins = "/pinctrl/dp1/dp1m2-pins"; - pwm15m1_pins = "/pinctrl/pwm15/pwm15m1-pins"; - pcfg_pull_down_drv_level_1 = "/pinctrl/pcfg-pull-down-drv-level-1"; - pwm12m0_pins = "/pinctrl/pwm12/pwm12m0-pins"; - qos_vicap_m1 = "/qos@fdf40800"; - sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; - uart8m1_rtsn = "/pinctrl/uart8/uart8m1-rtsn"; - usb2phy2_grf = "/syscon@fd5d8000"; - rkvdec1_sram = "/sram@ff001000/rkvdec-sram@78000"; - uart5m0_rtsn = "/pinctrl/uart5/uart5m0-rtsn"; - jpege3_mmu = "/iommu@fdbac800"; - vcc_2v0_pldo_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG7"; - i2s3_mclk = "/pinctrl/i2s3/i2s3-mclk"; - mclkout_i2s1m1 = "/clocks/mclkout-i2s1@fd58a000"; - spdif_tx1_dc = "/spdif-tx1-dc"; - uart0m2_xfer = "/pinctrl/uart0/uart0m2-xfer"; - wifi_host_wake_irq = "/pinctrl/wireless-wlan/wifi-host-wake-irq"; - i2s1m1_sdo1 = "/pinctrl/i2s1/i2s1m1-sdo1"; - uart1m1_ctsn = "/pinctrl/uart1/uart1m1-ctsn"; - pcfg_pull_down_drv_level_12 = "/pinctrl/pcfg-pull-down-drv-level-12"; - sdiom0_pins = "/pinctrl/sdio/sdiom0-pins"; - pcfg_pull_up_smt = "/pinctrl/pcfg-pull-up-smt"; - php_grf = "/syscon@fd5b0000"; - pwm2 = "/pwm@fd8b0020"; - pdm1m0_sdi2 = "/pinctrl/pdm1/pdm1m0-sdi2"; - i2s2m1_lrck = "/pinctrl/i2s2/i2s2m1-lrck"; - gmac0_stmmac_axi_setup = "/ethernet@fe1b0000/stmmac-axi-config"; - mipi1_csi2_hw = "/mipi1-csi2-hw@fdd20000"; - sata1 = "/sata@fe220000"; - rkispp1_vir0 = "/rkispp1-vir0"; - dp0_in_vp1 = "/dp@fde50000/ports/port@0/endpoint@1"; - CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; - rkisp0_vir0 = "/rkisp0-vir0"; - spi3m3_cs0 = "/pinctrl/spi3/spi3m3-cs0"; - specification_serial_number = "/otp@fecc0000/specification-serial-number@6"; - l2_cache_l0 = "/cpus/l2-cache-l0"; - pcfg_pull_none_drv_level_7 = "/pinctrl/pcfg-pull-none-drv-level-7"; - qos_hdcp0 = "/qos@fdf80000"; - qos_npu0_mro = "/qos@fdf72200"; - usbdrd_dwc3_1 = "/usbdrd3_1/usb@fc400000"; - rkvenc1 = "/rkvenc-core@fdbe0000"; - display_subsystem = "/display-subsystem"; - i2c3m4_xfer = "/pinctrl/i2c3/i2c3m4-xfer"; - pcie30x2m3_pins = "/pinctrl/pcie30x2/pcie30x2m3-pins"; - qos_npu2 = "/qos@fdf71000"; - i2s0_8ch = "/i2s@fe470000"; - i2s2m0_sclk = "/pinctrl/i2s2/i2s2m0-sclk"; - pmu = "/power-management@fd8d8000"; - gmac1_tx_bus2 = "/pinctrl/gmac1/gmac1-tx-bus2"; - pcfg_pull_none_drv_level_11 = "/pinctrl/pcfg-pull-none-drv-level-11"; - route_hdmi1 = "/display-subsystem/route/route-hdmi1"; - csi2_dphy5 = "/csi2-dphy5"; - spi4m2_cs0 = "/pinctrl/spi4/spi4m2-cs0"; - mipi3_csi2 = "/mipi3-csi2"; - pmu0_grf = "/syscon@fd588000"; - fan = "/pwm-fan"; - cpu_b0 = "/cpus/cpu@400"; - vccio_sd_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG5"; - qos_rkvenc1_m2wo = "/qos@fdf61400"; - gpio4 = "/pinctrl/gpio@fec50000"; - hdmim0_rx_cec = "/pinctrl/hdmi/hdmim0-rx-cec"; - pwm3m3_pins = "/pinctrl/pwm3/pwm3m3-pins"; - aclk_vdpu_low_pre = "/clocks/aclk_vdpu_low_pre@fd7c08b0"; - mmu600_php = "/iommu@fcb00000"; - cif_mipi2_in1 = "/rkcif-mipi-lvds2/port/endpoint"; - pwm0m2_pins = "/pinctrl/pwm0/pwm0m2-pins"; - pwm13m0_pins = "/pinctrl/pwm13/pwm13m0-pins"; - pcie20x1m0_pins = "/pinctrl/pcie20x1/pcie20x1m0-pins"; - bt656_pins = "/pinctrl/bt656/bt656-pins"; - hdmi1_sound = "/hdmi1-sound"; - uart9m1_rtsn = "/pinctrl/uart9/uart9m1-rtsn"; - uart6m0_rtsn = "/pinctrl/uart6/uart6m0-rtsn"; - pcie2x1l2_intc = "/pcie@fe190000/legacy-interrupt-controller"; - mod_sleep = "/mod-sleep-regulator"; - gpu_thermal = "/thermal-zones/gpu-thermal"; - hdmim1_tx0_cec = "/pinctrl/hdmi/hdmim1-tx0-cec"; - uart1 = "/serial@feb40000"; - rkcif_mipi_lvds3_sditf_vir1 = "/rkcif-mipi-lvds3-sditf-vir1"; - pcfg_pull_up_drv_level_6 = "/pinctrl/pcfg-pull-up-drv-level-6"; - qos_rkvdec0 = "/qos@fdf62000"; - vp2_out_edp0 = "/vop@fdd90000/ports/port@2/endpoint@1"; - uart1m2_xfer = "/pinctrl/uart1/uart1m2-xfer"; - pdm0m0_sdi0 = "/pinctrl/pdm0/pdm0m0-sdi0"; - fspim2_pins = "/pinctrl/fspi/fspim2-pins"; - i2s0_sdi0 = "/pinctrl/i2s0/i2s0-sdi0"; - gpu_pins = "/pinctrl/gpu/gpu-pins"; - imx415 = "/i2c@fec80000/imx415@37"; - vp3_out_dsi1 = "/vop@fdd90000/ports/port@3/endpoint@1"; - i2s4_8ch = "/i2s@fddc0000"; - ramoops = "/reserved-memory/ramoops@110000"; - dp0_sound = "/dp0-sound"; - spdif_tx0 = "/spdif-tx@fe4e0000"; - dp1_in_vp1 = "/dp@fde60000/ports/port@0/endpoint@1"; - i2s1m0_sdo3 = "/pinctrl/i2s1/i2s1m0-sdo3"; - mipi2_csi2_input1 = "/mipi2-csi2/ports/port@0/endpoint@0"; - vcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG2"; - vp1_out_hdmi0 = "/vop@fdd90000/ports/port@1/endpoint@2"; - vcc12v_dcin = "/vcc12v-dcin"; - vp0_out_edp1 = "/vop@fdd90000/ports/port@0/endpoint@4"; - uart3_rtsn = "/pinctrl/uart3/uart3-rtsn"; - gmac1_rgmii_clk = "/pinctrl/gmac1/gmac1-rgmii-clk"; - package_serial_number_high = "/otp@fecc0000/package-serial-number-high@5"; - hdcp0 = "/hdcp@fde40000"; - qos_fisheye1 = "/qos@fdf40200"; - rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; - i2c5 = "/i2c@fead0000"; - jtagm0_pins = "/pinctrl/jtag/jtagm0-pins"; - i2c4m4_xfer = "/pinctrl/i2c4/i2c4m4-xfer"; - spdif_tx1_sound = "/spdif-tx1-sound"; - qos_jpeg_enc2 = "/qos@fdf66800"; - hdmi0_in = "/hdmi@fde80000/ports/port@0"; - i2s1m1_sdi3 = "/pinctrl/i2s1/i2s1m1-sdi3"; - i2c1m3_xfer = "/pinctrl/i2c1/i2c1m3-xfer"; - hdptxphy_hdmi0 = "/hdmiphy@fed60000"; - sdmmc_pwren = "/pinctrl/sdmmc/sdmmc-pwren"; - usbdp_phy1_dp = "/phy@fed90000/dp-port"; - npu_leakage = "/otp@fecc0000/npu-leakage@28"; - aclk_jpeg_decoder_pre = "/clocks/aclk_jpeg_decoder_pre@fd7c08b0"; - pdm0 = "/pdm@fe4b0000"; - gmac1_miim = "/pinctrl/gmac1/gmac1-miim"; - pcfg_output_high_pull_down = "/pinctrl/pcfg-output-high-pull-down"; - hdmi_debug6 = "/pinctrl/hdmi/hdmi-debug6"; - pcie3x4 = "/pcie@fe150000"; - can0m1_pins = "/pinctrl/can0/can0m1-pins"; - mclkin_i2s2 = "/clocks/mclkin-i2s2"; - jpege_ccu = "/jpege-ccu"; - pcfg_pull_none_drv_level_3_smt = "/pinctrl/pcfg-pull-none-drv-level-3-smt"; - hdmim1_rx_cec = "/pinctrl/hdmi/hdmim1-rx-cec"; - pipe_phy2_grf = "/syscon@fd5c4000"; - dp0m1_pins = "/pinctrl/dp0/dp0m1-pins"; - rkvdec1 = "/rkvdec-core@fdc48000"; - pwm1m2_pins = "/pinctrl/pwm1/pwm1m2-pins"; - pwm14m0_pins = "/pinctrl/pwm14/pwm14m0-pins"; - little_core_thermal = "/thermal-zones/littlecore-thermal"; - rk806_dvs3_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_slp"; - usb_5v = "/usb-5v"; - i2s8_8ch = "/i2s@fddc8000"; - drm_cubic_lut = "/reserved-memory/drm-cubic-lut@00000000"; - rkcif_mipi_lvds2_sditf_vir2 = "/rkcif-mipi-lvds2-sditf-vir2"; - hdptxphy0 = "/phy@fed60000"; - pcie30x1_0_button_rstn = "/pinctrl/pcie30x1/pcie30x1-0-button-rstn"; - u2phy3_host = "/syscon@fd5dc000/usb2-phy@c000/host-port"; - route_dp0 = "/display-subsystem/route/route-dp0"; - hdmim0_rx_scl = "/pinctrl/hdmi/hdmim0-rx-scl"; - hdmim0_rx_sda = "/pinctrl/hdmi/hdmim0-rx-sda"; - uart7m0_rtsn = "/pinctrl/uart7/uart7m0-rtsn"; - pcfg_pull_down_drv_level_10 = "/pinctrl/pcfg-pull-down-drv-level-10"; - usbdrd3_0 = "/usbdrd3_0"; - ddrphych0_pins = "/pinctrl/ddrphych0/ddrphych0-pins"; - bt_irq_gpio = "/pinctrl/wireless-bluetooth/bt-irq-gpio"; - pwm0 = "/pwm@fd8b0000"; - uart2m2_xfer = "/pinctrl/uart2/uart2m2-xfer"; - pdm1m0_sdi0 = "/pinctrl/pdm1/pdm1m0-sdi0"; - hdmim1_tx0_scl = "/pinctrl/hdmi/hdmim1-tx0-scl"; - hdmim1_tx0_sda = "/pinctrl/hdmi/hdmim1-tx0-sda"; - can1 = "/can@fea60000"; - rkvtunnel = "/rkvtunnel"; - pcfg_pull_none_drv_level_5 = "/pinctrl/pcfg-pull-none-drv-level-5"; - rkcif_mipi_lvds3_sditf = "/rkcif-mipi-lvds3-sditf"; - combphy2_psu = "/phy@fee20000"; - vp3 = "/vop@fdd90000/ports/port@3"; - rk806_dvs2_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_dvs"; - mmu600_pcie = "/iommu@fc900000"; - hdmim1_tx0_hpd = "/pinctrl/hdmi/hdmim1-tx0-hpd"; - i2s1m0_lrck = "/pinctrl/i2s1/i2s1m0-lrck"; - cpu_l3 = "/cpus/cpu@300"; - spi0m1_cs1 = "/pinctrl/spi0/spi0m1-cs1"; - vp0_out_hdmi1 = "/vop@fdd90000/ports/port@0/endpoint@5"; - spdif_rx1 = "/spdif-rx@fde10000"; - gmac0_clkinout = "/pinctrl/gmac0/gmac0-clkinout"; - rkcif_dvp = "/rkcif-dvp"; - i2c5m4_xfer = "/pinctrl/i2c5/i2c5m4-xfer"; - wireless_wlan = "/wireless-wlan"; - rkcif_mipi_lvds = "/rkcif-mipi-lvds"; - avdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG3"; - i2c2m3_xfer = "/pinctrl/i2c2/i2c2m3-xfer"; - pcie30x4m3_pins = "/pinctrl/pcie30x4/pcie30x4m3-pins"; - hclk_rkvdec0_pre = "/clocks/hclk_rkvdec0_pre@fd7c08a0"; - route_dsi0 = "/display-subsystem/route/route-dsi0"; - rk806_dvs3_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_pwrdn"; - csi2_dphy3 = "/csi2-dphy3"; - pcie30x1m2_pins = "/pinctrl/pcie30x1/pcie30x1m2-pins"; - spi4 = "/spi@fecb0000"; - litcore_grf = "/syscon@fd594000"; - isp0_vir2 = "/rkisp0-vir2/port/endpoint@0"; - i2s1m1_mclk = "/pinctrl/i2s1/i2s1m1-mclk"; - sys_grf = "/syscon@fd58c000"; - edp0_in_vp1 = "/edp@fdec0000/ports/port@0/endpoint@1"; - mdio0 = "/ethernet@fe1b0000/mdio"; - rkisp_unite_mmu = "/rkisp-unite-mmu@fdcb7f00"; - gpio2 = "/pinctrl/gpio@fec30000"; - spi1m0_cs1 = "/pinctrl/spi1/spi1m0-cs1"; - aclk_av1_pre = "/clocks/aclk_av1_pre@fd7c0910"; - can1m1_pins = "/pinctrl/can1/can1m1-pins"; - rkcif_mipi_lvds1_sditf_vir3 = "/rkcif-mipi-lvds1-sditf-vir3"; - hdmim2_rx_cec = "/pinctrl/hdmi/hdmim2-rx-cec"; - mipi3_csi2_hw = "/mipi3-csi2-hw@fdd40000"; - dp1m1_pins = "/pinctrl/dp1/dp1m1-pins"; - pwm2m2_pins = "/pinctrl/pwm2/pwm2m2-pins"; - pwm15m0_pins = "/pinctrl/pwm15/pwm15m0-pins"; - hclk_vo0 = "/clocks/hclk_vo0@fd7c08dc"; - bigcore0_thermal = "/thermal-zones/bigcore0-thermal"; - hdmim1_rx_scl = "/pinctrl/hdmi/hdmim1-rx-scl"; - hdmim1_rx_sda = "/pinctrl/hdmi/hdmim1-rx-sda"; - uart8m0_rtsn = "/pinctrl/uart8/uart8m0-rtsn"; - pcfg_pull_up_drv_level_4 = "/pinctrl/pcfg-pull-up-drv-level-4"; - mipim1_camera1_clk = "/pinctrl/mipi/mipim1-camera1-clk"; - rkvdec0_sram = "/sram@ff001000/rkvdec-sram@0"; - pcfg_pull_down_drv_level_8 = "/pinctrl/pcfg-pull-down-drv-level-8"; - gmac_uio1 = "/uio@fe1c0000"; - usbc0_orien_sw = "/i2c@fec80000/fusb302@22/connector/ports/port@0/endpoint"; - jpegd = "/jpegd@fdb90000"; - uart3m2_xfer = "/pinctrl/uart3/uart3m2-xfer"; - minidump_smem = "/reserved-memory/minidump-smem@1f0000"; - i2s0_sclk = "/pinctrl/i2s0/i2s0-sclk"; - uart0m1_xfer = "/pinctrl/uart0/uart0m1-xfer"; - rga3_core1 = "/rga@fdb70000"; - i2s1m0_sdo1 = "/pinctrl/i2s1/i2s1m0-sdo1"; - uart1m0_ctsn = "/pinctrl/uart1/uart1m0-ctsn"; - vcc5v0_usb = "/vcc5v0-usb"; - minidump = "/minidump"; - }; - - rkvdec-ccu@fdc30000 { - power-domains = <0x60 0x0e>; - rockchip,ccu-mode = <0x01>; - clock-names = "aclk_ccu"; - reg-names = "ccu"; - assigned-clocks = <0x02 0x18e>; - assigned-clock-rates = <0x23c34600>; - resets = <0x02 0x282>; - clocks = <0x02 0x18e>; - compatible = "rockchip,rkv-decoder-v2-ccu"; - status = "okay"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdc30000 0x00 0x100>; - phandle = <0xca>; - reset-names = "video_ccu"; - }; - - qos@fdf60000 { - compatible = "syscon"; - reg = <0x00 0xfdf60000 0x00 0x20>; - phandle = <0x8d>; - }; - - iommu@fdb50800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x76 0x04>; - clocks = <0x02 0x1c0 0x02 0x1c1>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_vdpu_mmu"; - reg = <0x00 0xfdb50800 0x00 0x40>; - phandle = <0xb7>; - }; - - rga@fdb60000 { - power-domains = <0x60 0x16>; - iommus = <0xb9>; - clock-names = "aclk_rga3_0\0hclk_rga3_0\0clk_rga3_0"; - interrupts = <0x00 0x72 0x04>; - clocks = <0x02 0x1ba 0x02 0x1b9 0x02 0x1bb>; - compatible = "rockchip,rga3_core0"; - status = "okay"; - interrupt-names = "rga3_core0_irq"; - reg = <0x00 0xfdb60000 0x00 0x1000>; - phandle = <0x269>; - }; - - qos@fdf67200 { - compatible = "syscon"; - reg = <0x00 0xfdf67200 0x00 0x20>; - phandle = <0x28b>; - }; - - vepu@fdb50000 { - power-domains = <0x60 0x15>; - iommus = <0xb7>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1c0>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2c8 0x02 0x2c9>; - interrupts = <0x00 0x78 0x04>; - clocks = <0x02 0x1c0 0x02 0x1c1>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x00>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-encoder-v2"; - rockchip,resetgroup-node = <0x00>; - status = "disabled"; - interrupt-names = "irq_vepu"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdb50000 0x00 0x400>; - phandle = <0x266>; - reset-names = "shared_video_a\0shared_video_h"; - }; - - mipi3-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x227>; - }; - - hdmi0-sound { - rockchip,jack-det; - rockchip,cpu = <0x1d3>; - rockchip,codec = <0x1d4>; - rockchip,card-name = "rockchip-hdmi0"; - compatible = "rockchip,hdmi"; - status = "okay"; - phandle = <0x49b>; - rockchip,mclk-fs = <0x80>; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - minidump-smem@1f0000 { - status = "disabled"; - reg = <0x00 0x1f0000 0x00 0x100>; - phandle = <0x1cf>; - no-map; - }; - - minidump-mem@c000000 { - status = "disabled"; - reg = <0x00 0xc000000 0x00 0x2000000>; - phandle = <0x1d0>; - no-map; - }; - - cma { - linux,cma-default; - compatible = "shared-dma-pool"; - size = <0x00 0x800000>; - reg = <0x00 0x10000000 0x00 0x10000000>; - reusable; - }; - - drm-logo@00000000 { - compatible = "rockchip,drm-logo"; - reg = <0x00 0xedf00000 0x00 0x2e0000>; - phandle = <0x37>; - }; - - ramoops@110000 { - boot-log-count = <0x01>; - record-size = <0x14000>; - pmsg-size = <0x30000>; - compatible = "ramoops"; - console-size = <0x80000>; - reg = <0x00 0x110000 0x00 0xe0000>; - phandle = <0x493>; - boot-log-size = <0x8000>; - ftrace-size = <0x00>; - }; - - drm-cubic-lut@00000000 { - compatible = "rockchip,drm-cubic-lut"; - reg = <0x00 0x00 0x00 0x00>; - phandle = <0x492>; - }; - }; - - pcie@fe160000 { - power-domains = <0x60 0x22>; - vpcie3v3-supply = <0x1ba>; - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x10 0x1f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x10>; - resets = <0x02 0x20e 0x02 0x21d>; - interrupts = <0x00 0x102 0x04 0x00 0x101 0x04 0x00 0x100 0x04 0x00 0xff 0x04 0x00 0xfe 0x04>; - clocks = <0x02 0x14f 0x02 0x154 0x02 0x14a 0x02 0x159 0x02 0x15f 0x02 0x184>; - interrupt-map = <0x00 0x00 0x00 0x01 0x1b9 0x00 0x00 0x00 0x00 0x02 0x1b9 0x01 0x00 0x00 0x00 0x03 0x1b9 0x02 0x00 0x00 0x00 0x04 0x1b9 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x03>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - reset-gpios = <0x10d 0x08 0x00>; - num-lanes = <0x02>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf1000000 0x00 0xf1000000 0x00 0x100000 0x81000000 0x00 0xf1100000 0x00 0xf1100000 0x00 0x100000 0x82000000 0x00 0xf1200000 0x00 0xf1200000 0x00 0xe00000 0xc3000000 0x09 0x40000000 0x09 0x40000000 0x00 0x40000000>; - msi-map = <0x1000 0x1b6 0x1000 0x1000>; - #interrupt-cells = <0x01>; - status = "disabled"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x1b7>; - num-viewport = <0x08>; - reg = <0x00 0xfe160000 0x00 0x10000 0x0a 0x40400000 0x00 0x400000>; - linux,pci-domain = <0x01>; - phandle = <0x486>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x10>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0xff 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x1b9>; - interrupt-controller; - }; - }; - - spdif-tx@fddb8000 { - power-domains = <0x60 0x19>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x20b>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc6 0x04>; - clocks = <0x02 0x20f 0x02 0x20a>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfddb8000 0x00 0x1000>; - phandle = <0x1e2>; - dmas = <0xf1 0x16>; - }; - - pvtm@fdb30000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-gpu-pvtm"; - reg = <0x00 0xfdb30000 0x00 0x100>; - - pvtm@4 { - clock-names = "clk"; - resets = <0x02 0x430 0x02 0x42f>; - clocks = <0x02 0x118>; - reg = <0x04>; - reset-names = "rts\0rst-p"; - }; - }; - - spdif-tx1-dc { - #sound-dai-cells = <0x00>; - compatible = "linux,spdif-dit"; - status = "disabled"; - phandle = <0x1d8>; - }; - - csi2-dphy0 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "okay"; - phys = <0x2f 0x30>; - firefly-compatible; - phandle = <0x20f>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - data-lanes = <0x01 0x02 0x03 0x04>; - remote-endpoint = <0x32>; - reg = <0x01>; - phandle = <0x184>; - }; - - endpoint@0 { - data-lanes = <0x01 0x02 0x03 0x04>; - remote-endpoint = <0x31>; - reg = <0x00>; - phandle = <0x183>; - }; - }; - - port@1 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x01>; - - endpoint@0 { - remote-endpoint = <0x33>; - reg = <0x00>; - phandle = <0x4d>; - }; - }; - }; - }; - - rkisp-unite@fdcb0000 { - power-domains = <0x60 0x1c>; - iommus = <0xcf>; - clock-names = "aclk_isp0\0hclk_isp0\0clk_isp_core0\0clk_isp_core_marvin0\0clk_isp_core_vicap0\0aclk_isp1\0hclk_isp1\0clk_isp_core1\0clk_isp_core_marvin1\0clk_isp_core_vicap1"; - interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; - clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd 0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; - compatible = "rockchip,rk3588-rkisp-unite"; - status = "disabled"; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - reg = <0x00 0xfdcb0000 0x00 0x10000 0x00 0xfdcc0000 0x00 0x10000>; - phandle = <0x277>; - }; - - sata@fe230000 { - phy-names = "sata-phy"; - clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; - interrupts = <0x00 0x113 0x04>; - clocks = <0x02 0x173 0x02 0x170 0x02 0x176 0x02 0x165 0x02 0x180>; - compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; - status = "disabled"; - interrupt-names = "hostc"; - phys = <0x70 0x01>; - reg = <0x00 0xfe230000 0x00 0x1000>; - phandle = <0x291>; - ports-implemented = <0x01>; - }; - - syscon@fd5a0000 { - compatible = "rockchip,rk3588-gpu-grf\0syscon"; - reg = <0x00 0xfd5a0000 0x00 0x100>; - phandle = <0x65>; - }; - - bt-sound { - simple-audio-card,name = "rockchip,bt"; - simple-audio-card,format = "dsp_a"; - simple-audio-card,bitclock-inversion = <0x00>; - compatible = "simple-audio-card"; - status = "disabled"; - phandle = <0x49a>; - simple-audio-card,mclk-fs = <0x100>; - - simple-audio-card,cpu { - sound-dai = <0x1d1>; - }; - - simple-audio-card,codec { - sound-dai = <0x1d2 0x01>; - }; - }; - - iommu@fdb90480 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x82 0x04>; - clocks = <0x02 0x1b4 0x02 0x1b5>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpegd_mmu"; - reg = <0x00 0xfdb90480 0x00 0x40>; - phandle = <0xbb>; - }; - - hdcp@fde70000 { - power-domains = <0x60 0x1a>; - clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; - resets = <0x02 0x3c8 0x02 0x3c6 0x02 0x3c5 0x02 0x3c4 0x02 0x3ca>; - interrupts = <0x00 0xa0 0x04>; - clocks = <0x02 0x217 0x02 0x219 0x02 0x218 0x02 0x216 0x02 0x228 0x02 0x229>; - compatible = "rockchip,rk3588-hdcp"; - status = "disabled"; - reg = <0x00 0xfde70000 0x00 0x80>; - phandle = <0x287>; - reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; - rockchip,vo-grf = <0xd8>; - }; - - spdif-tx@fe4f0000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default"; - pinctrl-0 = <0x143>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x45>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc2 0x04>; - clocks = <0x02 0x47 0x02 0x44>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfe4f0000 0x00 0x1000>; - phandle = <0x1d7>; - dmas = <0xf1 0x05>; - }; - - rkcif-mipi-lvds-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x52>; - phandle = <0x22d>; - }; - - es8388-sound { - pinctrl-names = "default"; - rockchip,cpu = <0x1da>; - pinctrl-0 = <0x1dc>; - rockchip,codec = <0x1db>; - hp-det-gpio = <0x79 0x13 0x00>; - rockchip,card-name = "rockchip-es8388"; - rockchip,format = "i2s"; - rockchip,audio-routing = "Headphone\0LOUT1\0Headphone\0ROUT1\0Speaker\0LOUT2\0Speaker\0ROUT2\0Headphone\0Headphone Power\0Headphone\0Headphone Power\0LINPUT2\0Main Mic\0RINPUT2\0Main Mic\0LINPUT1\0Headset Mic\0RINPUT1\0Headset Mic"; - compatible = "firefly,multicodecs-card"; - linein-type = <0x01>; - status = "okay"; - phandle = <0x49f>; - hp-con-gpio = <0x182 0x0b 0x00>; - firefly,not-use-dapm; - rockchip,mclk-fs = <0x180>; - }; - - spi@feb30000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x02>; - pinctrl-0 = <0x15d 0x15e 0x15f>; - clock-names = "spiclk\0apb_pclk"; - interrupts = <0x00 0x149 0x04>; - clocks = <0x02 0xa6 0x02 0xa1>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "disabled"; - reg = <0x00 0xfeb30000 0x00 0x1000>; - phandle = <0x2c8>; - dmas = <0xf1 0x11 0xf1 0x12>; - }; - - phy@fee80000 { - rockchip,pipe-grf = <0x76>; - clock-names = "pclk"; - rockchip,pcie30-phymode = <0x01>; - resets = <0x02 0x2000a>; - clocks = <0x02 0x188>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-pcie3-phy"; - status = "okay"; - reg = <0x00 0xfee80000 0x00 0x20000>; - phandle = <0x1b7>; - reset-names = "phy"; - rockchip,phy-grf = <0x1cc>; - }; - - vcc12v-dcin { - regulator-max-microvolt = <0xb71b00>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b00>; - regulator-name = "vcc12v_dcin"; - compatible = "regulator-fixed"; - phandle = <0x1cd>; - }; - - qos@fdf61200 { - compatible = "syscon"; - reg = <0x00 0xfdf61200 0x00 0x20>; - phandle = <0x91>; - }; - - i2s@fde00000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x234>; - assigned-clock-parents = <0x02 0x05>; - rockchip,capture-only; - resets = <0x02 0x417>; - interrupts = <0x00 0xbe 0x04>; - clocks = <0x02 0x237 0x02 0x237 0x02 0x233>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - status = "disabled"; - reg = <0x00 0xfde00000 0x00 0x1000>; - phandle = <0x47e>; - dmas = <0xf2 0x18>; - reset-names = "rx-m"; - }; - - qos@fdf40800 { - compatible = "syscon"; - reg = <0x00 0xfdf40800 0x00 0x20>; - phandle = <0xa5>; - }; - - i2s@fddfc000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x23f>; - assigned-clock-parents = <0x02 0x05>; - rockchip,capture-only; - resets = <0x02 0x413>; - interrupts = <0x00 0xbd 0x04>; - clocks = <0x02 0x242 0x02 0x242 0x02 0x23e>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - status = "disabled"; - reg = <0x00 0xfddfc000 0x00 0x1000>; - phandle = <0x27f>; - dmas = <0xf2 0x17>; - reset-names = "rx-m"; - }; - - usbdrd3_0 { - #address-cells = <0x02>; - clock-names = "ref\0suspend\0bus"; - clocks = <0x02 0x1a3 0x02 0x1a2 0x02 0x1a1>; - #size-cells = <0x02>; - compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; - ranges; - status = "okay"; - phandle = <0x252>; - - usb@fc000000 { - power-domains = <0x60 0x1f>; - snps,dis-u1-entry-quirk; - snps,dis_enblslpm_quirk; - phy-names = "usb2-phy\0usb3-phy"; - snps,dis-u2-freeclk-exists-quirk; - usb-role-switch; - phy_type = "utmi_wide"; - quirk-skip-phy-init; - resets = <0x02 0x2a4>; - interrupts = <0x00 0xdc 0x04>; - snps,dis-u2-entry-quirk; - compatible = "snps,dwc3"; - snps,parkmode-disable-hs-quirk; - snps,dis-del-phy-power-chg-quirk; - status = "okay"; - snps,parkmode-disable-ss-quirk; - phys = <0x66 0x67>; - reg = <0x00 0xfc000000 0x00 0x400000>; - phandle = <0x253>; - dr_mode = "host"; - reset-names = "usb3-otg"; - snps,dis-tx-ipgap-linecheck-quirk; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - remote-endpoint = <0x68>; - reg = <0x00>; - phandle = <0x17d>; - }; - }; - }; - }; - - rkcif-mipi-lvds5-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a2>; - phandle = <0x478>; - }; - - rkcif-dvp-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x51>; - phandle = <0x22a>; - }; - - iommu@fdd97e00 { - rockchip,shootdown-entire; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x9c 0x04>; - clocks = <0x02 0x270 0x02 0x26f>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "vop_mmu"; - reg = <0x00 0xfdd97e00 0x00 0x100 0x00 0xfdd97f00 0x00 0x100>; - phandle = <0xd6>; - rockchip,disable-device-link-resume; - }; - - rkvtunnel { - compatible = "rockchip,video-tunnel"; - status = "disabled"; - phandle = <0x245>; - }; - - syscon@fd5e0000 { - compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; - reg = <0x00 0xfd5e0000 0x00 0x100>; - phandle = <0x18a>; - }; - - i2c@fead0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x14d>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb4 0x02 0xac>; - interrupts = <0x00 0x142 0x04>; - clocks = <0x02 0x91 0x02 0x89>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "disabled"; - reg = <0x00 0xfead0000 0x00 0x1000>; - phandle = <0x2a8>; - reset-names = "i2c\0apb"; - }; - - iommu@fdba4800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x7b 0x04>; - clocks = <0x02 0x1ae 0x02 0x1af>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpege1_mmu"; - reg = <0x00 0xfdba4800 0x00 0x40>; - phandle = <0xbe>; - }; - - spdif-rx@fde10000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x260>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x3ff>; - interrupts = <0x00 0xc8 0x04>; - clocks = <0x02 0x260 0x02 0x25f>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; - status = "disabled"; - reg = <0x00 0xfde10000 0x00 0x1000>; - phandle = <0x47f>; - dmas = <0x7c 0x16>; - reset-names = "spdifrx-m"; - }; - - npu@fdab0000 { - power-domains = <0x60 0x09 0x60 0x0a 0x60 0x0b>; - iommus = <0xb2>; - clock-names = "clk_npu\0aclk0\0aclk1\0aclk2\0hclk0\0hclk1\0hclk2\0pclk"; - assigned-clocks = <0x0e 0x06>; - power-domain-names = "npu0\0npu1\0npu2"; - rknpu-supply = <0xb3>; - assigned-clock-rates = <0xbebc200>; - resets = <0x02 0x1e6 0x02 0x1b0 0x02 0x1c0 0x02 0x1e8 0x02 0x1b2 0x02 0x1c2>; - interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; - clocks = <0x0e 0x06 0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125 0x02 0x131>; - compatible = "rockchip,rk3588-rknpu"; - status = "okay"; - interrupt-names = "npu0_irq\0npu1_irq\0npu2_irq"; - mem-supply = <0xb3>; - reg = <0x00 0xfdab0000 0x00 0x10000 0x00 0xfdac0000 0x00 0x10000 0x00 0xfdad0000 0x00 0x10000>; - phandle = <0x265>; - reset-names = "srst_a0\0srst_a1\0srst_a2\0srst_h0\0srst_h1\0srst_h2"; - operating-points-v2 = <0xb1>; - }; - - hdmiphy@fed60000 { - clock-names = "ref\0apb"; - resets = <0x02 0x48e 0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d 0x02 0x48c 0x02 0x48d>; - clocks = <0x02 0x2b5 0x02 0x267>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-hdptx-phy-hdmi"; - status = "okay"; - rockchip,grf = <0x18a>; - reg = <0x00 0xfed60000 0x00 0x2000>; - phandle = <0xfd>; - reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; - - clk-port { - #clock-cells = <0x00>; - status = "okay"; - phandle = <0x35>; - }; - }; - - dmc-opp-table { - nvmem-cells = <0x44 0x45 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,leakage-voltage-sel = <0x01 0x1f 0x00 0x20 0x2c 0x01 0x2d 0x39 0x02 0x3a 0xfe 0x03>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - phandle = <0x41>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,supported-hw; - - opp-1560000000 { - opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xadf34 0xadf34 0xb71b0>; - opp-hz = <0x00 0x5cfbb600>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L3 = <0xb1008 0xb1008 0xd59f8 0xaae60 0xaae60 0xb71b0>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb1008 0xb1008 0xb71b0>; - }; - - opp-j-m-1560000000 { - opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-hz = <0x00 0x5cfbb600>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L3 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - }; - - opp-j-m-528000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-hz = <0x00 0x1f78a400>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-2750000000 { - opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb1008 0xb1008 0xb71b0>; - opp-hz = <0x00 0xa3e9ab80>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xaae60 0xaae60 0xb71b0>; - opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - }; - - opp-1068000000 { - opp-microvolt = <0xb1008 0xb1008 0xd59f8 0xb40dc 0xb40dc 0xb71b0>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; - opp-hz = <0x00 0x3fa86300>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; - opp-microvolt-L1 = <0xaae60 0xaae60 0xd59f8 0xadf34 0xadf34 0xb71b0>; - }; - - opp-j-m-2750000000 { - opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-hz = <0x00 0xa3e9ab80>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - }; - - opp-528000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xd59f8 0xb1008 0xb1008 0xb71b0>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; - opp-hz = <0x00 0x1f78a400>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa4cb8 0xa4cb8 0xb71b0>; - opp-microvolt-L1 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; - }; - - opp-j-m-1068000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-hz = <0x00 0x3fa86300>; - opp-supported-hw = <0x06 0xffff>; - }; - }; - - rkvenc-core@fdbe0000 { - power-domains = <0x60 0x11>; - iommus = <0xc5>; - rockchip,ccu = <0xc3>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - assigned-clocks = <0x02 0x1ca 0x02 0x1cb>; - rockchip,task-capacity = <0x08>; - rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; - assigned-clock-rates = <0x1dcd6500 0x2faf0800>; - resets = <0x02 0x305 0x02 0x304 0x02 0x306>; - interrupts = <0x00 0x68 0x04>; - clocks = <0x02 0x1ca 0x02 0x1c9 0x02 0x1cb>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x07>; - compatible = "rockchip,rkv-encoder-v2-core"; - status = "okay"; - interrupt-names = "irq_rkvenc1"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdbe0000 0x00 0x6000>; - phandle = <0x273>; - reset-names = "video_a\0video_h\0video_core"; - operating-points-v2 = <0xc4>; - }; - - debug@fd104000 { - compatible = "rockchip,debug"; - reg = <0x00 0xfd104000 0x00 0x1000 0x00 0xfd105000 0x00 0x1000 0x00 0xfd106000 0x00 0x1000 0x00 0xfd107000 0x00 0x1000 0x00 0xfd124000 0x00 0x1000 0x00 0xfd125000 0x00 0x1000 0x00 0xfd126000 0x00 0x1000 0x00 0xfd127000 0x00 0x1000>; - phandle = <0x48f>; - }; - - watchdog@feaf0000 { - clock-names = "tclk\0pclk"; - interrupts = <0x00 0x13b 0x04>; - clocks = <0x02 0x6c 0x02 0x6b>; - compatible = "snps,dw-wdt"; - status = "okay"; - reg = <0x00 0xfeaf0000 0x00 0x100>; - phandle = <0x2aa>; - }; - - syscon@fd5d8000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5d8000 0x00 0x4000>; - phandle = <0x25d>; - - usb2-phy@8000 { - clock-output-names = "usb480m_phy2"; - clock-names = "phyclk"; - resets = <0x02 0xc0049 0x02 0x48a>; - interrupts = <0x00 0x187 0x04>; - clocks = <0x02 0x2b5>; - #clock-cells = <0x00>; - compatible = "rockchip,rk3588-usb2phy"; - status = "okay"; - reg = <0x8000 0x10>; - phandle = <0x69>; - reset-names = "phy\0apb"; - - host-port { - phy-supply = <0x75>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x6c>; - }; - }; - }; - - cluster0-opp-table { - rockchip,pvtm-offset = <0x64>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,dsu-grf = <0x23>; - rockchip,pvtm-hw = <0x06>; - nvmem-cells = <0x1f 0x20 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x555 0x00 0x556 0x56b 0x01 0x56c 0x581 0x02 0x582 0x597 0x03 0x598 0x5ad 0x04 0x5ae 0x5c3 0x05 0x5c4 0x270f 0x06>; - rockchip,pvtm-thermal-zone = "soc-thermal"; - rockchip,opp-shared-dsu; - rockchip,high-temp-max-freq = <0x188940>; - opp-shared; - rockchip,reboot-freq = <0x159b40>; - rockchip,pvtm-freq = <0x159b40>; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0x22>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x582 0x00 0x583 0x59a 0x01 0x59b 0x5b2 0x02 0x5b3 0x5ca 0x03 0x5cb 0x5e2 0x04 0x5e3 0x5fa 0x05 0x5fb 0x270f 0x06>; - phandle = <0x0f>; - rockchip,pvtm-temp-prop = <0xf4 0xf4>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0xf6180>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-1200000000 { - opp-microvolt = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; - opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-microvolt-L2 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xe7ef0 0xa7d8c 0xa7d8c 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; - }; - - opp-j-m-1416000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L2 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - opp-hz = <0x00 0x54667200>; - opp-microvolt-L0 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-supported-hw = <0x06 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - }; - - opp-1008000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1704000000 { - opp-microvolt = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - opp-microvolt-L6 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - opp-microvolt-L4 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L2 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - opp-hz = <0x00 0x6590fa00>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L5 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L3 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - }; - - opp-j-m-1200000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1008000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-816000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-1800000000 { - opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - opp-microvolt-L6 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L4 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - opp-microvolt-L2 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L3 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-1608000000 { - opp-microvolt = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - opp-microvolt-L6 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - }; - - opp-j-1296000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x4d3f6400>; - opp-microvolt-L0 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - opp-supported-hw = <0x04 0xffff>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - }; - - opp-j-m-408000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-816000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1608000000 { - opp-microvolt = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L6 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - opp-microvolt-L4 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - opp-microvolt-L2 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L5 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-microvolt-L3 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - }; - - opp-600000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-1416000000 { - opp-microvolt = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - opp-microvolt-L6 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; - opp-microvolt-L4 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; - opp-microvolt-L2 = <0xb40dc 0xb40dc 0xe7ef0 0xb40dc 0xb40dc 0xe7ef0>; - opp-hz = <0x00 0x54667200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; - opp-suspend; - opp-microvolt-L3 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - }; - - opp-408000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - }; - - vcc-4g-regulator { - regulator-boot-on; - gpio = <0x182 0x00 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_4g"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4b0>; - }; - - spi@fecb0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x02>; - pinctrl-0 = <0x187 0x188 0x189>; - clock-names = "spiclk\0apb_pclk"; - interrupts = <0x00 0x14a 0x04>; - clocks = <0x02 0xa7 0x02 0xa2>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "disabled"; - reg = <0x00 0xfecb0000 0x00 0x1000>; - phandle = <0x2e6>; - dmas = <0xf2 0x0d 0xf2 0x0e>; - }; - - spdif-rx@fde08000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x25e>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x3fd>; - interrupts = <0x00 0xc7 0x04>; - clocks = <0x02 0x25e 0x02 0x25d>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; - status = "disabled"; - reg = <0x00 0xfde08000 0x00 0x1000>; - phandle = <0x280>; - dmas = <0x7c 0x15>; - reset-names = "spdifrx-m"; - }; - - mipi3-csi2-hw@fdd40000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x327>; - interrupts = <0x00 0x95 0x04 0x00 0x96 0x04>; - clocks = <0x02 0x1d2>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd40000 0x00 0x10000>; - phandle = <0x4a>; - reset-names = "srst_csihost_p"; - }; - - memory { - device_type = "memory"; - reg = <0x00 0x9400000 0x00 0xe6c00000 0x01 0x00 0x01 0x00 0x02 0xf0000000 0x00 0x10000000 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>; - }; - - jpege-core@fdba4000 { - power-domains = <0x60 0x15>; - iommus = <0xbe>; - rockchip,ccu = <0xbd>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1ae>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2cc 0x02 0x2cd>; - interrupts = <0x00 0x7c 0x04>; - clocks = <0x02 0x1ae 0x02 0x1af>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-jpege-core"; - status = "okay"; - interrupt-names = "irq_jpege1"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdba4000 0x00 0x400>; - phandle = <0x26e>; - reset-names = "video_a\0video_h"; - }; - - wireless-wlan { - pinctrl-names = "default"; - pinctrl-0 = <0x1ea>; - WIFI,host_wake_irq = <0x182 0x0a 0x00>; - wifi_chip_type = "rtl8822ce"; - compatible = "wlan-platdata"; - status = "okay"; - phandle = <0x4ab>; - }; - - rkcif-mipi-lvds4-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a1>; - phandle = <0x475>; - }; - - dp@fde50000 { - power-domains = <0x60 0x19>; - clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; - assigned-clocks = <0x02 0x2cc>; - assigned-clock-rates = <0xf42400>; - resets = <0x02 0x388>; - interrupts = <0x00 0xa1 0x04>; - clocks = <0x02 0x1e6 0x02 0x2cc 0x02 0x1fb 0x02 0x207 0x04 0x02 0x1ea>; - #sound-dai-cells = <0x01>; - compatible = "rockchip,rk3588-dp"; - status = "disabled"; - phys = <0xf6>; - reg = <0x00 0xfde50000 0x00 0x4000>; - phandle = <0x1d6>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - remote-endpoint = <0x38>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe0>; - }; - - endpoint@2 { - remote-endpoint = <0xf8>; - status = "disabled"; - reg = <0x02>; - phandle = <0xe6>; - }; - - endpoint@0 { - remote-endpoint = <0xf7>; - status = "disabled"; - reg = <0x00>; - phandle = <0xda>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - phandle = <0x286>; - }; - }; - }; - }; - - rockchip-system-monitor { - rockchip,thermal-zone = "soc-thermal"; - compatible = "rockchip,system-monitor"; - phandle = <0x247>; - }; - - vcc3v3-pcie30 { - regulator-max-microvolt = <0x325aa0>; - enable-active-high; - regulator-min-microvolt = <0x325aa0>; - regulator-name = "vcc3v3_pcie30"; - startup-delay-us = <0x1388>; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x1b8>; - vin-supply = <0x1cd>; - gpios = <0x182 0x04 0x00>; - }; - - phy@fedb0000 { - clock-names = "pclk\0ref"; - resets = <0x02 0xc0045 0x02 0x43 0x02 0x44 0x02 0xc0046>; - clocks = <0x02 0x109 0x02 0x2b6>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-mipi-dcphy"; - status = "okay"; - rockchip,grf = <0x191>; - reg = <0x00 0xfedb0000 0x00 0x10000>; - phandle = <0x30>; - reset-names = "m_phy\0apb\0grf\0s_phy"; - }; - - rkvdec-core@fdc38000 { - power-domains = <0x60 0x0e>; - iommus = <0xc9>; - rockchip,ccu = <0xca>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; - reg-names = "regs\0link"; - assigned-clocks = <0x02 0x190 0x02 0x193 0x02 0x191 0x02 0x192>; - rockchip,core-mask = <0x10001>; - rockchip,task-capacity = <0x10>; - rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; - assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; - resets = <0x02 0x284 0x02 0x283 0x02 0x289 0x02 0x287 0x02 0x288>; - interrupts = <0x00 0x5f 0x04>; - rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; - clocks = <0x02 0x190 0x02 0x18f 0x02 0x193 0x02 0x191 0x02 0x192>; - rockchip,rcb-min-width = <0x200>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x09>; - compatible = "rockchip,rkv-decoder-v2"; - status = "okay"; - interrupt-names = "irq_rkvdec0"; - rockchip,skip-pmu-idle-request; - rockchip,rcb-iova = <0xfff00000 0x100000>; - reg = <0x00 0xfdc38100 0x00 0x400 0x00 0xfdc38000 0x00 0x100>; - phandle = <0x274>; - reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; - rockchip,sram = <0xcb>; - }; - - minidump { - smem-region = <0x1cf>; - minidump-region = <0x1d0>; - compatible = "rockchip,minidump"; - status = "disabled"; - phandle = <0x491>; - }; -}; diff --git a/configs/vms_bkp/arceos-aarch64-e2000_smp1.dts b/configs/vms_bkp/arceos-aarch64-e2000_smp1.dts deleted file mode 100644 index e2f9d8e4..00000000 --- a/configs/vms_bkp/arceos-aarch64-e2000_smp1.dts +++ /dev/null @@ -1,155 +0,0 @@ -/dts-v1/; - -/memreserve/ 0x0000000080000000 0x0000000000010000; -/ { - compatible = "phytium,pe2204"; - interrupt-parent = <0x01>; - #address-cells = <0x02>; - #size-cells = <0x02>; - model = "Phytium Pi Board"; - - // memory@01 { - // device_type = "memory"; - // reg = <0x20 0x00 0x00 0x80000000>; - // numa-node-id = <0x00>; - // }; - - aliases { - serial1 = "/soc/uart@2800d000"; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - cpu_suspend = <0xc4000001>; - cpu_off = <0x84000002>; - cpu_on = <0xc4000003>; - sys_poweroff = <0x84000008>; - sys_reset = <0x84000009>; - }; - - cpus { - #address-cells = <0x02>; - #size-cells = <0x00>; - - cpu-map { - - cluster0 { - - core0 { - cpu = <0x05>; - }; - }; - - // cluster1 { - - // core0 { - // cpu = <0x06>; - // }; - // }; - - // cluster2 { - - // core0 { - // cpu = <0x07>; - // }; - - // core1 { - // cpu = <0x08>; - // }; - // }; - }; - - // cpu@0 { - // device_type = "cpu"; - // compatible = "phytium,ftc310\0arm,armv8"; - // reg = <0x00 0x200>; - // enable-method = "psci"; - // clocks = <0x09 0x02>; - // capacity-dmips-mhz = <0xb22>; - // phandle = <0x07>; - // }; - - // cpu@1 { - // device_type = "cpu"; - // compatible = "phytium,ftc310\0arm,armv8"; - // reg = <0x00 0x201>; - // enable-method = "psci"; - // clocks = <0x09 0x02>; - // capacity-dmips-mhz = <0xb22>; - // phandle = <0x08>; - // }; - - cpu@100 { - device_type = "cpu"; - compatible = "phytium,ftc664\0arm,armv8"; - reg = <0x00 0x00>; - enable-method = "psci"; - clocks = <0x09 0x00>; - capacity-dmips-mhz = <0x161c>; - phandle = <0x05>; - }; - - // cpu@101 { - // device_type = "cpu"; - // compatible = "phytium,ftc664\0arm,armv8"; - // reg = <0x00 0x100>; - // enable-method = "psci"; - // clocks = <0x09 0x01>; - // capacity-dmips-mhz = <0x161c>; - // phandle = <0x06>; - // }; - }; - - interrupt-controller@30800000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <0x03>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - interrupt-controller; - reg = <0x00 0x30800000 0x00 0x20000 0x00 0x30880000 0x00 0x80000 0x00 0x30840000 0x00 0x10000 0x00 0x30850000 0x00 0x10000 0x00 0x30860000 0x00 0x10000>; - interrupts = <0x01 0x09 0x08>; - phandle = <0x01>; - - gic-its@30820000 { - compatible = "arm,gic-v3-its"; - msi-controller; - reg = <0x00 0x30820000 0x00 0x20000>; - phandle = <0x0f>; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0x08 0x01 0x0e 0x08 0x01 0x0b 0x08 0x01 0x0a 0x08>; - clock-frequency = <0x2faf080>; - }; - - soc { - compatible = "simple-bus"; - #address-cells = <0x02>; - #size-cells = <0x02>; - dma-coherent; - ranges; - - uart@2800d000 { - compatible = "arm,pl011\0arm,primecell"; - reg = <0x00 0x2800d000 0x00 0x1000>; - interrupts = <0x00 0x54 0x04>; - clocks = <0x0c 0x0c>; - clock-names = "uartclk\0apb_pclk"; - status = "okay"; - }; - }; - - chosen { - bootargs = "console=ttyAMA1,115200 earlycon=pl011,0x2800d000 root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw cma=256m ;"; - stdout-path = "serial1:115200n8"; - }; - - memory@00 { - device_type = "memory"; - reg = <0x20 0x20000000 0x00 0x20000000>; - }; -}; diff --git a/configs/vms_bkp/arceos-aarch64-e2000_smp1.toml b/configs/vms_bkp/arceos-aarch64-e2000_smp1.toml deleted file mode 100644 index dbbae96e..00000000 --- a/configs/vms_bkp/arceos-aarch64-e2000_smp1.toml +++ /dev/null @@ -1,71 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 2 -# Guest vm name. -name = "arceos" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 1 -# The physical CPU ids. -phys_cpu_ids = [0x00] -# Guest vm physical cpu sets. -phys_cpu_sets = [4] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x20_2008_0000 -# The location of image: "memory" | "fs". -# Load from file system. -image_location = "memory" -# The load address of the kernel image. -kernel_load_addr = 0x20_2008_0000 -## The file path of the kernel image. -kernel_path = "/path/to/arceos_aarch64-dyn_smp1.bin" -## The file path of the device tree blob (DTB). -dtb_load_addr = 0x20_2000_0000 -dtb_path = "/path/to/axvisor/configs/vms/arceos-aarch64-e2000_smp1.dtb" -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x20_2000_0000, 0x2000_0000, 0x7, 1], # System RAM MAP_IDENTICAL -] - -# -# Device specifications -# -[devices] -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - [ - "UART1", - 0x2800_d000, - 0x2800_d000, - 0x1000, - 0x1, - ], - [ - "gic-v3", - 0x3080_0000, - 0x3080_0000, - 0x10000, - 0x1, - ], - [ - "gic-v3-its", - 0x3082_0000, - 0x3082_0000, - 0x100000, - 0x1, - ], -] diff --git a/configs/vms_bkp/arceos-aarch64-e2000_smp2.dts b/configs/vms_bkp/arceos-aarch64-e2000_smp2.dts deleted file mode 100644 index b80c5dad..00000000 --- a/configs/vms_bkp/arceos-aarch64-e2000_smp2.dts +++ /dev/null @@ -1,155 +0,0 @@ -/dts-v1/; - -/memreserve/ 0x0000000080000000 0x0000000000010000; -/ { - compatible = "phytium,pe2204"; - interrupt-parent = <0x01>; - #address-cells = <0x02>; - #size-cells = <0x02>; - model = "Phytium Pi Board"; - - // memory@01 { - // device_type = "memory"; - // reg = <0x20 0x00 0x00 0x80000000>; - // numa-node-id = <0x00>; - // }; - - aliases { - serial1 = "/soc/uart@2800d000"; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - cpu_suspend = <0xc4000001>; - cpu_off = <0x84000002>; - cpu_on = <0xc4000003>; - sys_poweroff = <0x84000008>; - sys_reset = <0x84000009>; - }; - - cpus { - #address-cells = <0x02>; - #size-cells = <0x00>; - - cpu-map { - - // cluster0 { - - // core0 { - // cpu = <0x05>; - // }; - // }; - - cluster1 { - - core0 { - cpu = <0x06>; - }; - }; - - cluster2 { - - // core0 { - // cpu = <0x07>; - // }; - - core1 { - cpu = <0x08>; - }; - }; - }; - - // cpu@0 { - // device_type = "cpu"; - // compatible = "phytium,ftc310\0arm,armv8"; - // reg = <0x00 0x200>; - // enable-method = "psci"; - // clocks = <0x09 0x02>; - // capacity-dmips-mhz = <0xb22>; - // phandle = <0x07>; - // }; - - cpu@1 { - device_type = "cpu"; - compatible = "phytium,ftc310\0arm,armv8"; - reg = <0x00 0x201>; - enable-method = "psci"; - clocks = <0x09 0x02>; - capacity-dmips-mhz = <0xb22>; - phandle = <0x08>; - }; - - // cpu@100 { - // device_type = "cpu"; - // compatible = "phytium,ftc664\0arm,armv8"; - // reg = <0x00 0x00>; - // enable-method = "psci"; - // clocks = <0x09 0x00>; - // capacity-dmips-mhz = <0x161c>; - // phandle = <0x05>; - // }; - - cpu@101 { - device_type = "cpu"; - compatible = "phytium,ftc664\0arm,armv8"; - reg = <0x00 0x100>; - enable-method = "psci"; - clocks = <0x09 0x01>; - capacity-dmips-mhz = <0x161c>; - phandle = <0x06>; - }; - }; - - interrupt-controller@30800000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <0x03>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - interrupt-controller; - reg = <0x00 0x30800000 0x00 0x20000 0x00 0x30880000 0x00 0x80000 0x00 0x30840000 0x00 0x10000 0x00 0x30850000 0x00 0x10000 0x00 0x30860000 0x00 0x10000>; - interrupts = <0x01 0x09 0x08>; - phandle = <0x01>; - - gic-its@30820000 { - compatible = "arm,gic-v3-its"; - msi-controller; - reg = <0x00 0x30820000 0x00 0x20000>; - phandle = <0x0f>; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0x08 0x01 0x0e 0x08 0x01 0x0b 0x08 0x01 0x0a 0x08>; - clock-frequency = <0x2faf080>; - }; - - soc { - compatible = "simple-bus"; - #address-cells = <0x02>; - #size-cells = <0x02>; - dma-coherent; - ranges; - - uart@2800d000 { - compatible = "arm,pl011\0arm,primecell"; - reg = <0x00 0x2800d000 0x00 0x1000>; - interrupts = <0x00 0x54 0x04>; - clocks = <0x0c 0x0c>; - clock-names = "uartclk\0apb_pclk"; - status = "okay"; - }; - }; - - chosen { - bootargs = "console=ttyAMA1,115200 earlycon=pl011,0x2800d000 root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw cma=256m ;"; - stdout-path = "serial1:115200n8"; - }; - - memory@00 { - device_type = "memory"; - reg = <0x20 0x20000000 0x00 0x20000000>; - }; -}; diff --git a/configs/vms_bkp/arceos-aarch64-e2000_smp2.toml b/configs/vms_bkp/arceos-aarch64-e2000_smp2.toml deleted file mode 100644 index 4f69f198..00000000 --- a/configs/vms_bkp/arceos-aarch64-e2000_smp2.toml +++ /dev/null @@ -1,71 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 2 -# Guest vm name. -name = "arceos" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 2 -# The physical CPU ids. -phys_cpu_ids = [0x201, 0x100] -# Guest vm physical cpu sets. -phys_cpu_sets = [2, 8] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x20_2008_0000 -# The location of image: "memory" | "fs". -# Load from file system. -image_location = "memory" -# The load address of the kernel image. -kernel_load_addr = 0x20_2008_0000 -## The file path of the kernel image. -kernel_path = "/path/to/arceos_aarch64-dyn_smp1.bin" -## The file path of the device tree blob (DTB). -dtb_load_addr = 0x20_2000_0000 -dtb_path = "/path/to/axvisor/configs/vms/arceos-aarch64-e2000_smp2.dtb" -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x20_2000_0000, 0x2000_0000, 0x7, 1], # System RAM MAP_IDENTICAL -] - -# -# Device specifications -# -[devices] -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - [ - "UART1", - 0x2800_d000, - 0x2800_d000, - 0x1000, - 0x1, - ], - [ - "gic-v3", - 0x3080_0000, - 0x3080_0000, - 0x10000, - 0x1, - ], - [ - "gic-v3-its", - 0x3082_0000, - 0x3082_0000, - 0x100000, - 0x1, - ], -] diff --git a/configs/vms_bkp/arceos-aarch64-rk3568-smp1.toml b/configs/vms_bkp/arceos-aarch64-rk3568-smp1.toml deleted file mode 100644 index eddf9ca4..00000000 --- a/configs/vms_bkp/arceos-aarch64-rk3568-smp1.toml +++ /dev/null @@ -1,73 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 1 -# Guest vm name. -name = "arceos" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 1 -# The physical CPU ids. -phys_cpu_ids = [0x200] -# Guest vm physical cpu sets. -phys_cpu_sets = [1] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x7008_0000 -# The location of image: "memory" | "fs". -# Load from memory. -image_location = "memory" -# The load address of the kernel image. -kernel_load_addr = 0x7008_0000 -## The file path of the kernel image. -kernel_path = "/path/arceos-aarch64-dyn.bin" -## The file path of the device tree blob (DTB). -dtb_load_addr = 0x7000_0000 -dtb_path = "/path/arceos-rk3568.dtb" -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x7000_0000, 0x1000_0000, 0x7, 0], # System RAM 1G MAP_IDENTICAL -] - -# -# Device specifications -# -[devices] -# The interrupt mode. -interrupt_mode = "passthrough" -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - [ - "UART2", - 0xfe66_0000, - 0xfe66_0000, - 0x10000, - 0x1, - ], - [ - "gic-v3", - 0xfd40_0000, - 0xfd40_0000, - 0x10000, - 0x1, - ], - [ - "gic-v3-its", - 0xfd44_0000, - 0xfd44_0000, - 0x100000, - 0x1, - ], -] diff --git a/configs/vms_bkp/arceos-aarch64-rk3568-smp2.toml b/configs/vms_bkp/arceos-aarch64-rk3568-smp2.toml deleted file mode 100644 index b70a70ee..00000000 --- a/configs/vms_bkp/arceos-aarch64-rk3568-smp2.toml +++ /dev/null @@ -1,73 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 2 -# Guest vm name. -name = "arceos" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 2 -# The physical CPU ids. -phys_cpu_ids = [0x00, 0x100] -# Guest vm physical cpu sets. -phys_cpu_sets = [1, 2] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x7008_0000 -# The location of image: "memory" | "fs". -# Load from memory. -image_location = "memory" -# The load address of the kernel image. -kernel_load_addr = 0x7008_0000 -## The file path of the kernel image. -kernel_path = "/path/arceos-aarch64-dyn.bin" -## The file path of the device tree blob (DTB). -dtb_load_addr = 0x7000_0000 -dtb_path = "/path/arceos-aarch64-rk3568_smp2.dtb" -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x7000_0000, 0x1000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL -] - -# -# Device specifications -# -[devices] -# The interrupt mode. -interrupt_mode = "passthrough" -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - [ - "UART2", - 0xfe66_0000, - 0xfe66_0000, - 0x10000, - 0x1, - ], - [ - "gic-v3", - 0xfd40_0000, - 0xfd40_0000, - 0x10000, - 0x1, - ], - [ - "gic-v3-its", - 0xfd44_0000, - 0xfd44_0000, - 0x100000, - 0x1, - ], -] diff --git a/configs/vms_bkp/arceos-aarch64-rk3568_smp1.dts b/configs/vms_bkp/arceos-aarch64-rk3568_smp1.dts deleted file mode 100644 index d1ad3a39..00000000 --- a/configs/vms_bkp/arceos-aarch64-rk3568_smp1.dts +++ /dev/null @@ -1,87 +0,0 @@ -/dts-v1/; - -/memreserve/ 0x0000000008300000 0x000000000001c000; -/memreserve/ 0x000000000a200000 0x00000000008cf15d; -/ { - serial-number = "425ca8fc29ade692"; - compatible = "rockchip,rk3568-firefly-roc-pc\0rockchip,rk3568"; - interrupt-parent = <0x01>; - #address-cells = <0x02>; - #size-cells = <0x02>; - model = "Firefly RK3568-ROC-PC"; - - memory { - reg = <0x00 0x70000000 0x00 0x10000000>; - device_type = "memory"; - }; - - chosen { - bootargs = "earlycon=uart8250,mmio32,0xfe660000"; - }; - - aliases { - serial2 = "/serial@fe660000"; - }; - - cpus { - #address-cells = <0x02>; - #size-cells = <0x00>; - - cpu@200 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x00 0x200>; - enable-method = "psci"; - clocks = <0x02 0x00>; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04>; - phandle = <0x0d>; - }; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - arm,no-tick-in-suspend; - }; - - interrupt-controller@fd400000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <0x03>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - interrupt-controller; - reg = <0x00 0xfd400000 0x00 0x10000 0x00 0xfd460000 0x00 0xc0000>; - interrupts = <0x01 0x09 0x04>; - phandle = <0x01>; - - interrupt-controller@fd440000 { - compatible = "arm,gic-v3-its"; - msi-controller; - #msi-cells = <0x01>; - reg = <0x00 0xfd440000 0x00 0x20000>; - status = "okay"; - phandle = <0xbe>; - }; - }; - - serial@fe660000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe660000 0x00 0x100>; - interrupts = <0x00 0x76 0x04>; - clocks = <0x23 0x123 0x23 0x120>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x04 0x4e 0x05>; - pinctrl-names = "default"; - pinctrl-0 = <0x10c>; - status = "okay"; - }; -}; \ No newline at end of file diff --git a/configs/vms_bkp/arceos-aarch64-rk3568_smp2.dts b/configs/vms_bkp/arceos-aarch64-rk3568_smp2.dts deleted file mode 100644 index 6da5bf8b..00000000 --- a/configs/vms_bkp/arceos-aarch64-rk3568_smp2.dts +++ /dev/null @@ -1,101 +0,0 @@ -/dts-v1/; - -/memreserve/ 0x0000000008300000 0x000000000001c000; -/memreserve/ 0x000000000a200000 0x00000000008cf15d; -/ { - serial-number = "425ca8fc29ade692"; - compatible = "rockchip,rk3568-firefly-roc-pc\0rockchip,rk3568"; - interrupt-parent = <0x01>; - #address-cells = <0x02>; - #size-cells = <0x02>; - model = "Firefly RK3568-ROC-PC"; - - memory { - reg = <0x00 0x70000000 0x00 0x10000000>; - device_type = "memory"; - }; - - chosen { - bootargs = "earlycon=uart8250,mmio32,0xfe660000"; - }; - - aliases { - serial2 = "/serial@fe660000"; - }; - - cpus { - #address-cells = <0x02>; - #size-cells = <0x00>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x00 0x00>; - enable-method = "psci"; - clocks = <0x02 0x00>; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04>; - #cooling-cells = <0x02>; - dynamic-power-coefficient = <0xbb>; - cpu-supply = <0x05>; - phandle = <0x0c>; - }; - - cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x00 0x100>; - enable-method = "psci"; - clocks = <0x02 0x00>; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04>; - phandle = <0x0d>; - }; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - arm,no-tick-in-suspend; - }; - - interrupt-controller@fd400000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <0x03>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - interrupt-controller; - reg = <0x00 0xfd400000 0x00 0x10000 0x00 0xfd460000 0x00 0xc0000>; - interrupts = <0x01 0x09 0x04>; - phandle = <0x01>; - - interrupt-controller@fd440000 { - compatible = "arm,gic-v3-its"; - msi-controller; - #msi-cells = <0x01>; - reg = <0x00 0xfd440000 0x00 0x20000>; - status = "okay"; - phandle = <0xbe>; - }; - }; - - serial@fe660000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe660000 0x00 0x100>; - interrupts = <0x00 0x76 0x04>; - clocks = <0x23 0x123 0x23 0x120>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x04 0x4e 0x05>; - pinctrl-names = "default"; - pinctrl-0 = <0x10c>; - status = "okay"; - }; -}; \ No newline at end of file diff --git a/configs/vms_bkp/arceos-aarch64-smp.toml b/configs/vms_bkp/arceos-aarch64-smp.toml deleted file mode 100644 index e8c61729..00000000 --- a/configs/vms_bkp/arceos-aarch64-smp.toml +++ /dev/null @@ -1,55 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 1 -# Guest vm name. -name = "arceos" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 2 -# Guest vm physical cpu sets. -phys_cpu_sets = [1, 2] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x4008_0000 -# The file path of the kernel image. -kernel_path = "arceos-aarch64-smp.bin" -# The load address of the kernel image. -kernel_load_addr = 0x4008_0000 - -## The file path of the ramdisk image. -# ramdisk_path = "" -## The load address of the ramdisk image. -# ramdisk_load_addr = 0 -## The path of the disk image. -# disk_path = "disk.img" - -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x4000_0000, 0x100_0000, 0x7, 0], # Low RAM 16M 0b00111 R|W|EXECUTE MAP_ALLOC -] - -# -# Device specifications -# -[devices] -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - ["intc@8000000", 0x800_0000, 0x800_0000, 0x50_000, 0x1], - ["pl011@9000000", 0x900_0000, 0x900_0000, 0x1000, 0x1], - ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], - ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], # a003000.virtio_mmio virtio_mmio@a003000 # a003200.virtio_mmio virtio_mmio@a003200 - ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], -] diff --git a/configs/vms_bkp/arceos-aarch64.toml b/configs/vms_bkp/arceos-aarch64.toml deleted file mode 100644 index 7936825e..00000000 --- a/configs/vms_bkp/arceos-aarch64.toml +++ /dev/null @@ -1,59 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 2 -# Guest vm name. -name = "arceos" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 1 -# Guest vm physical cpu sets. -phys_cpu_sets = [2] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x4020_0000 -# The location of image: "memory" | "fs". -# Load from file system. -image_location = "fs" -# The file path of the kernel image. -kernel_path = "helloworld_aarch64-qemu-virt.bin" -# The load address of the kernel image. -kernel_load_addr = 0x4020_0000 -## Load from memory -# image_location = "memory" -## The file path of the kernel image. -# kernel_path = "" -## The file path of the device tree blob (DTB). -# dtb_path = "" -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x4000_0000, 0x100_0000, 0x7, 0], # Low RAM 16M 0b00111 R|W|EXECUTE -] - -# -# Device specifications -# -[devices] -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [ - ["ivc-channel", 0x3000_0000, 0x1000_0000, 0x0, 0xa, []], -] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - ["intc@8000000", 0x800_0000, 0x800_0000, 0x50_000, 0x1], - ["pl011@9000000", 0x900_0000, 0x900_0000, 0x1000, 0x1], - ["pl011@9040000", 0x904_0000, 0x904_0000, 0x1000, 0x1], - ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], - ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], # a003000.virtio_mmio virtio_mmio@a003000 # a003200.virtio_mmio virtio_mmio@a003200 - ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], -] diff --git a/configs/vms_bkp/arceos-riscv64-smp.toml b/configs/vms_bkp/arceos-riscv64-smp.toml deleted file mode 100644 index b436c542..00000000 --- a/configs/vms_bkp/arceos-riscv64-smp.toml +++ /dev/null @@ -1,59 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 1 -# Guest vm name. -name = "arceos" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 2 -# Guest vm physical cpu sets. -phys_cpu_sets = [1, 2] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x8020_0000 -# The location of image: "memory" | "fs". -# Load from file system. -image_location = "fs" -# The file path of the kernel image. -kernel_path = "arceos-riscv64-smp.bin" -# The load address of the kernel image. -kernel_load_addr = 0x8020_0000 -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x8000_0000, 0x100_0000, 0xf, 0], # Low RAM 16M 0b1111 R|W|EXECUTE|U -] - -# -# Device specifications -# -[devices] -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - [ - "PLIC@c000000", - 0x0c00_0000, - 0x0c00_0000, - 0x21_0000, - 0x1, - ], - [ - "UART@10000000", - 0x1000_0000, - 0x1000_0000, - 0x1000, - 0x1, - ], -] diff --git a/configs/vms_bkp/arceos-riscv64.toml b/configs/vms_bkp/arceos-riscv64.toml deleted file mode 100644 index db89884a..00000000 --- a/configs/vms_bkp/arceos-riscv64.toml +++ /dev/null @@ -1,59 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 1 -# Guest vm name. -name = "arceos" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 1 -# Guest vm physical cpu sets. -phys_cpu_sets = [1] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x8020_0000 -# The location of image: "memory" | "fs". -# Load from file system. -image_location = "fs" -# The file path of the kernel image. -kernel_path = "arceos-riscv64.bin" -# The load address of the kernel image. -kernel_load_addr = 0x8020_0000 -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x8000_0000, 0x100_0000, 0xf, 0], # Low RAM 16M 0b1111 R|W|EXECUTE|U -] - -# -# Device specifications -# -[devices] -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - [ - "PLIC@c000000", - 0x0c00_0000, - 0x0c00_0000, - 0x21_0000, - 0x1, - ], - [ - "UART@10000000", - 0x1000_0000, - 0x1000_0000, - 0x1000, - 0x1, - ], -] diff --git a/configs/vms_bkp/arceos-rk3588-aarch64-vm2.toml b/configs/vms_bkp/arceos-rk3588-aarch64-vm2.toml deleted file mode 100644 index b5093442..00000000 --- a/configs/vms_bkp/arceos-rk3588-aarch64-vm2.toml +++ /dev/null @@ -1,49 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 2 -# Guest vm name. -name = "arceos" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 1 -# Guest vm physical cpu sets. -phys_cpu_sets = [4] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x1_0048_0000 -# The load address of the kernel image. -kernel_load_addr = 0x1_0048_0000 -# The load address of the device tree blob (DTB). -dtb_load_addr = 0x1_1000_0000 -# The location of image: "memory" | "fs". -# Load from memory -image_location = "memory" -# The file path of the kernel image. -kernel_path = "gicv3_tester_aarch64-rk3588j-guest.bin" -# The file path of the device tree blob (DTB). -dtb_path = "aio-rk3588-jd4-vm2.dtb" -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [] - -# -# Device specifications -# -[devices] -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - ["uart@feb40000", 0xfeb4_0000, 0xfeb4_0000, 0x1000, 0x1], - ["uart@feb50000", 0xfeb5_0000, 0xfeb4_0000, 0x1000, 0x1], -] diff --git a/configs/vms_bkp/arceos-x86_64.toml b/configs/vms_bkp/arceos-x86_64.toml deleted file mode 100644 index 27ab7f3a..00000000 --- a/configs/vms_bkp/arceos-x86_64.toml +++ /dev/null @@ -1,78 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 1 -# Guest vm name. -name = "arceos" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 1 -# Guest vm physical cpu sets. -phys_cpu_sets = [1] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x20_0000 -# The location of image: "memory" | "fs". -# Load from file system. -image_location = "fs" -# The file path of the BIOS image. -bios_path = "axvm-bios.bin" -# The load address of the BIOS image. -bios_load_addr = 0x8000 -# The file path of the kernel image. -kernel_path = "guest-test_x86-pc.bin" -# The load address of the kernel image. -kernel_load_addr = 0x20_0000 - -## The file path of the ramdisk image. -# ramdisk_path = "" -## The load address of the ramdisk image. -# ramdisk_load_addr = 0 -## The path of the disk image. -# disk_path = "disk.img" - -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x0000_0000, 0x100_0000, 0x7, 0], # Low RAM 16M 0b111 -] - -# -# Device specifications -# -[devices] -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - [ - "IO APIC", - 0xfec0_0000, - 0xfec0_0000, - 0x1000, - 0x1, - ], - [ - "Local APIC", - 0xfee0_0000, - 0xfee0_0000, - 0x1000, - 0x1, - ], - [ - "HPET", - 0xfed0_0000, - 0xfed0_0000, - 0x1000, - 0x1, - ], -] diff --git a/configs/vms_bkp/hvconfig-nimbos-aarch64.toml b/configs/vms_bkp/hvconfig-nimbos-aarch64.toml deleted file mode 100644 index fde67f0b..00000000 --- a/configs/vms_bkp/hvconfig-nimbos-aarch64.toml +++ /dev/null @@ -1,4 +0,0 @@ -arceos_args = ["DISK_IMG=nimbos-aarch64.img", "BUS=mmio", "BLK=y", "MEM=8g", "LOG=debug"] -features = ["fs"] -plat = "aarch64-generic" -vmconfigs = ["configs/vms/nimbos-aarch64.toml"] diff --git a/configs/vms_bkp/linux-a1000-aarch64-smp8.toml b/configs/vms_bkp/linux-a1000-aarch64-smp8.toml deleted file mode 100644 index db0a6f02..00000000 --- a/configs/vms_bkp/linux-a1000-aarch64-smp8.toml +++ /dev/null @@ -1,58 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 1 -# Guest vm name. -name = "linux-a1000" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 8 -# The physical CPU ids. -phys_cpu_ids = [0x00, 0x100, 0x200, 0x300, 0x400, 0x500, 0x600, 0x700] -# Guest vm physical cpu sets. -phys_cpu_sets = [1, 2, 4, 8, 16, 32, 64, 128] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x8100_0000 -# The location of image: "memory" | "fs". -## Load from memory. -image_location = "memory" -# The file path of the kernel image. -kernel_path = "path/to/kernel" -# The load address of the kernel image. -kernel_load_addr = 0x8100_0000 -# The file path of the device tree blob (DTB). -dtb_path = "path/to/dtb" -# The load address of the device tree blob (DTB). -dtb_load_addr = 0x82e0_0000 - -## The file path of the ramdisk image. -# ramdisk_path = "" -## The load address of the ramdisk image. -# ramdisk_load_addr = 0 -## The path of the disk image. -# disk_path = "disk.img" - -# Memory regions with format (`base_paddr`, `size`, `flags`). -memory_regions = [ - [0x8000_0000, 0x7000_0000, 0x7, 1], #ram 1792MB -] - -# -# Device specifications -# -[devices] -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] - -# Pass-through devices. -passthrough_devices = [ - ["most-devices", 0x0, 0x0, 0x8000_0000, 0x1], -] diff --git a/configs/vms_bkp/linux-aarch64-e2000_smp1.dts b/configs/vms_bkp/linux-aarch64-e2000_smp1.dts deleted file mode 100644 index 18d68f0f..00000000 --- a/configs/vms_bkp/linux-aarch64-e2000_smp1.dts +++ /dev/null @@ -1,1302 +0,0 @@ -/dts-v1/; - -/memreserve/ 0x0000000080000000 0x0000000000010000; -/ { - compatible = "phytium,pe2204"; - interrupt-parent = <0x01>; - #address-cells = <0x02>; - #size-cells = <0x02>; - model = "Phytium Pi Board"; - - // memory@01 { - // device_type = "memory"; - // reg = <0x20 0x40000000 0x00 0x40000000>; - // numa-node-id = <0x00>; - // }; - - aliases { - serial0 = "/soc/uart@2800c000"; - serial1 = "/soc/uart@2800d000"; - serial2 = "/soc/uart@2800e000"; - serial3 = "/soc/uart@2800f000"; - ethernet0 = "/soc/ethernet@3200c000"; - ethernet1 = "/soc/ethernet@3200e000"; - ethernet2 = "/soc/ethernet@32010000"; - ethernet3 = "/soc/ethernet@32012000"; - serial4 = "/soc/uart@28014000"; - serial5 = "/soc/uart@2802A000"; - serial6 = "/soc/uart@28032000"; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - cpu_suspend = <0xc4000001>; - cpu_off = <0x84000002>; - cpu_on = <0xc4000003>; - sys_poweroff = <0x84000008>; - sys_reset = <0x84000009>; - }; - - firmware { - - scmi { - compatible = "arm,scmi"; - mboxes = <0x02 0x00>; - mbox-names = "tx"; - shmem = <0x03>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - protocol@13 { - reg = <0x13>; - #clock-cells = <0x01>; - phandle = <0x09>; - }; - - protocol@15 { - reg = <0x15>; - #thermal-sensor-cells = <0x01>; - phandle = <0x04>; - }; - }; - - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - }; - - thermal-zones { - - sensor0 { - polling-delay-passive = <0x64>; - polling-delay = <0x3e8>; - thermal-sensors = <0x04 0x00>; - }; - - sensor1 { - polling-delay-passive = <0x64>; - polling-delay = <0x3e8>; - thermal-sensors = <0x04 0x01>; - }; - }; - - cpus { - #address-cells = <0x02>; - #size-cells = <0x00>; - - cpu-map { - - // cluster0 { - - // core0 { - // cpu = <0x05>; - // }; - // }; - - cluster1 { - - core0 { - cpu = <0x06>; - }; - }; - - // cluster2 { - - // core0 { - // cpu = <0x07>; - // }; - - // core1 { - // cpu = <0x08>; - // }; - // }; - }; - - // cpu@0 { - // device_type = "cpu"; - // compatible = "phytium,ftc310\0arm,armv8"; - // reg = <0x00 0x200>; - // enable-method = "psci"; - // clocks = <0x09 0x02>; - // capacity-dmips-mhz = <0xb22>; - // phandle = <0x07>; - // }; - - // cpu@1 { - // device_type = "cpu"; - // compatible = "phytium,ftc310\0arm,armv8"; - // reg = <0x00 0x201>; - // enable-method = "psci"; - // clocks = <0x09 0x02>; - // capacity-dmips-mhz = <0xb22>; - // phandle = <0x08>; - // }; - - // cpu@100 { - // device_type = "cpu"; - // compatible = "phytium,ftc664\0arm,armv8"; - // reg = <0x00 0x00>; - // enable-method = "psci"; - // clocks = <0x09 0x00>; - // capacity-dmips-mhz = <0x161c>; - // phandle = <0x05>; - // }; - - cpu@101 { - device_type = "cpu"; - compatible = "phytium,ftc664\0arm,armv8"; - reg = <0x00 0x100>; - enable-method = "psci"; - clocks = <0x09 0x01>; - capacity-dmips-mhz = <0x161c>; - phandle = <0x06>; - }; - }; - - interrupt-controller@30800000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <0x03>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - interrupt-controller; - reg = <0x00 0x30800000 0x00 0x20000 0x00 0x30880000 0x00 0x80000 0x00 0x30840000 0x00 0x10000 0x00 0x30850000 0x00 0x10000 0x00 0x30860000 0x00 0x10000>; - interrupts = <0x01 0x09 0x08>; - phandle = <0x01>; - - gic-its@30820000 { - compatible = "arm,gic-v3-its"; - msi-controller; - reg = <0x00 0x30820000 0x00 0x20000>; - phandle = <0x0f>; - }; - }; - - pmu { - compatible = "arm,armv8-pmuv3"; - interrupts = <0x01 0x07 0x08>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0x08 0x01 0x0e 0x08 0x01 0x0b 0x08 0x01 0x0a 0x08>; - clock-frequency = <0x2faf080>; - }; - - clocks { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - clk48mhz { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x2dc6c00>; - phandle = <0x13>; - }; - - clk50mhz { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x2faf080>; - phandle = <0x0d>; - }; - - clk100mhz { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x5f5e100>; - phandle = <0x0c>; - }; - - clk200mhz { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0xbebc200>; - phandle = <0x11>; - }; - - clk250mhz { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0xee6b280>; - phandle = <0x12>; - }; - - clk300mhz { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x11e1a300>; - phandle = <0x0b>; - }; - - clk600mhz { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x23c34600>; - phandle = <0x0e>; - }; - - clk1200mhz { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x47868c00>; - phandle = <0x0a>; - }; - }; - - iommu@30000000 { - compatible = "arm,smmu-v3"; - reg = <0x00 0x30000000 0x00 0x800000>; - interrupts = <0x00 0xf0 0x01 0x00 0xef 0x01 0x00 0xec 0x01 0x00 0xf2 0x01>; - interrupt-names = "eventq\0priq\0cmdq-sync\0gerror"; - dma-coherent; - #iommu-cells = <0x01>; - phandle = <0x10>; - }; - - soc { - compatible = "simple-bus"; - #address-cells = <0x02>; - #size-cells = <0x02>; - dma-coherent; - ranges; - - mmc@28000000 { - compatible = "phytium,mci"; - reg = <0x00 0x28000000 0x00 0x1000>; - interrupts = <0x00 0x48 0x04>; - clocks = <0x0a>; - clock-names = "phytium_mci_clk"; - status = "okay"; - bus-width = <0x04>; - max-frequency = <0x2faf080>; - cap-sdio-irq; - cap-sd-highspeed; - no-mmc; - }; - - mmc@28001000 { - compatible = "phytium,mci"; - reg = <0x00 0x28001000 0x00 0x1000>; - interrupts = <0x00 0x49 0x04>; - clocks = <0x0a>; - clock-names = "phytium_mci_clk"; - status = "okay"; - bus-width = <0x04>; - max-frequency = <0x2faf080>; - cap-sdio-irq; - cap-sd-highspeed; - no-mmc; - no-sd; - non-removable; - }; - - nand@28002000 { - compatible = "phytium,nfc"; - reg = <0x00 0x28002000 0x00 0x1000>; - interrupts = <0x00 0x4a 0x04>; - status = "disabled"; - }; - - ddma@28003000 { - compatible = "phytium,ddma"; - reg = <0x00 0x28003000 0x00 0x1000>; - interrupts = <0x00 0x4b 0x04>; - #dma-cells = <0x02>; - dma-channels = <0x08>; - }; - - ddma@28004000 { - compatible = "phytium,ddma"; - reg = <0x00 0x28004000 0x00 0x1000>; - interrupts = <0x00 0x4c 0x04>; - #dma-cells = <0x02>; - dma-channels = <0x08>; - }; - - spi@28008000 { - compatible = "phytium,qspi-nor"; - reg = <0x00 0x28008000 0x00 0x1000 0x00 0x00 0x00 0xfffffff>; - reg-names = "qspi\0qspi_mm"; - clocks = <0x0b>; - status = "okay"; - #address-cells = <0x01>; - #size-cells = <0x00>; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0x00>; - spi-rx-bus-width = <0x01>; - spi-max-frequency = <0x1312d00>; - status = "okay"; - }; - }; - - uart@2800c000 { - compatible = "arm,pl011\0arm,primecell"; - reg = <0x00 0x2800c000 0x00 0x1000>; - interrupts = <0x00 0x53 0x04>; - clocks = <0x0c 0x0c>; - clock-names = "uartclk\0apb_pclk"; - status = "okay"; - }; - - uart@2800d000 { - compatible = "arm,pl011\0arm,primecell"; - reg = <0x00 0x2800d000 0x00 0x1000>; - interrupts = <0x00 0x54 0x04>; - clocks = <0x0c 0x0c>; - clock-names = "uartclk\0apb_pclk"; - status = "okay"; - }; - - uart@2800e000 { - compatible = "arm,pl011\0arm,primecell"; - reg = <0x00 0x2800e000 0x00 0x1000>; - interrupts = <0x00 0x55 0x04>; - clocks = <0x0c 0x0c>; - clock-names = "uartclk\0apb_pclk"; - status = "okay"; - }; - - uart@2800f000 { - compatible = "arm,pl011\0arm,primecell"; - reg = <0x00 0x2800f000 0x00 0x1000>; - interrupts = <0x00 0x56 0x04>; - clocks = <0x0c 0x0c>; - clock-names = "uartclk\0apb_pclk"; - status = "okay"; - }; - - lpc@28010000 { - compatible = "simple-mfd\0syscon"; - reg = <0x00 0x28010000 0x00 0x1000>; - reg-io-width = <0x04>; - #address-cells = <0x01>; - #size-cells = <0x01>; - ranges = <0x00 0x00 0x28010000 0x1000>; - - kcs@24 { - compatible = "phytium,kcs-bmc"; - reg = <0x24 0x01 0x30 0x01 0x3c 0x01>; - interrupts = <0x00 0x58 0x04>; - status = "disabled"; - }; - - kcs@28 { - compatible = "phytium,kcs-bmc"; - reg = <0x28 0x01 0x34 0x01 0x40 0x01>; - interrupts = <0x00 0x58 0x04>; - status = "disabled"; - }; - - kcs@2c { - compatible = "phytium,kcs-bmc"; - reg = <0x2c 0x01 0x38 0x01 0x44 0x01>; - interrupts = <0x00 0x58 0x04>; - status = "disabled"; - }; - - kcs@8c { - compatible = "phytium,kcs-bmc"; - reg = <0x8c 0x01 0x90 0x01 0x94 0x01>; - interrupts = <0x00 0x58 0x04>; - status = "disabled"; - }; - - bt@48 { - compatible = "phytium,bt-bmc"; - reg = <0x48 0x20>; - interrupts = <0x00 0x58 0x04>; - status = "disabled"; - }; - }; - - gpio@28034000 { - compatible = "phytium,gpio"; - reg = <0x00 0x28034000 0x00 0x1000>; - interrupts = <0x00 0x6c 0x04 0x00 0x6d 0x04 0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04 0x00 0x71 0x04 0x00 0x72 0x04 0x00 0x73 0x04 0x00 0x74 0x04 0x00 0x75 0x04 0x00 0x76 0x04 0x00 0x77 0x04 0x00 0x78 0x04 0x00 0x79 0x04 0x00 0x7a 0x04 0x00 0x7b 0x04>; - gpio-controller; - #gpio-cells = <0x02>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - - porta { - compatible = "phytium,gpio-port"; - reg = <0x00>; - ngpios = <0x10>; - }; - }; - - gpio@28035000 { - compatible = "phytium,gpio"; - reg = <0x00 0x28035000 0x00 0x1000>; - interrupts = <0x00 0x7c 0x04 0x00 0x7d 0x04 0x00 0x7e 0x04 0x00 0x7f 0x04 0x00 0x80 0x04 0x00 0x81 0x04 0x00 0x82 0x04 0x00 0x83 0x04 0x00 0x84 0x04 0x00 0x85 0x04 0x00 0x86 0x04 0x00 0x87 0x04 0x00 0x88 0x04 0x00 0x89 0x04 0x00 0x8a 0x04 0x00 0x8b 0x04>; - gpio-controller; - #gpio-cells = <0x02>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x14>; - - porta { - compatible = "phytium,gpio-port"; - reg = <0x00>; - ngpios = <0x10>; - }; - }; - - gpio@28036000 { - compatible = "phytium,gpio"; - reg = <0x00 0x28036000 0x00 0x1000>; - interrupts = <0x00 0x8c 0x04 0x00 0x8d 0x04 0x00 0x8e 0x04 0x00 0x8f 0x04 0x00 0x90 0x04 0x00 0x91 0x04 0x00 0x92 0x04 0x00 0x93 0x04 0x00 0x94 0x04 0x00 0x95 0x04 0x00 0x96 0x04 0x00 0x97 0x04 0x00 0x98 0x04 0x00 0x99 0x04 0x00 0x9a 0x04 0x00 0x9b 0x04>; - gpio-controller; - #gpio-cells = <0x02>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x15>; - - porta { - compatible = "phytium,gpio-port"; - reg = <0x00>; - ngpios = <0x10>; - }; - }; - - gpio@28037000 { - compatible = "phytium,gpio"; - reg = <0x00 0x28037000 0x00 0x1000>; - interrupts = <0x00 0x9c 0x04>; - gpio-controller; - #gpio-cells = <0x02>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - - porta { - compatible = "phytium,gpio-port"; - reg = <0x00>; - ngpios = <0x10>; - }; - }; - - gpio@28038000 { - compatible = "phytium,gpio"; - reg = <0x00 0x28038000 0x00 0x1000>; - interrupts = <0x00 0x9d 0x04>; - gpio-controller; - #gpio-cells = <0x02>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - - porta { - compatible = "phytium,gpio-port"; - reg = <0x00>; - ngpios = <0x10>; - }; - }; - - gpio@28039000 { - compatible = "phytium,gpio"; - reg = <0x00 0x28039000 0x00 0x1000>; - interrupts = <0x00 0x9e 0x04>; - gpio-controller; - #gpio-cells = <0x02>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - - porta { - compatible = "phytium,gpio-port"; - reg = <0x00>; - ngpios = <0x10>; - }; - }; - - spi@2803a000 { - compatible = "phytium,spi"; - reg = <0x00 0x2803a000 0x00 0x1000>; - interrupts = <0x00 0x9f 0x04>; - clocks = <0x0d>; - num-cs = <0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - global-cs = <0x01>; - - spidev@0 { - compatible = "spidev"; - reg = <0x00>; - spi-max-frequency = <0x2faf080>; - status = "disabled"; - }; - }; - - spi@2803b000 { - compatible = "phytium,spi"; - reg = <0x00 0x2803b000 0x00 0x1000>; - interrupts = <0x00 0xa0 0x04>; - clocks = <0x0d>; - num-cs = <0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - }; - - spi@2803c000 { - compatible = "phytium,spi"; - reg = <0x00 0x2803c000 0x00 0x1000>; - interrupts = <0x00 0xa1 0x04>; - clocks = <0x0d>; - num-cs = <0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - }; - - spi@2803d000 { - compatible = "phytium,spi"; - reg = <0x00 0x2803d000 0x00 0x1000>; - interrupts = <0x00 0xa2 0x04>; - clocks = <0x0d>; - num-cs = <0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - }; - - watchdog@28040000 { - compatible = "arm,sbsa-gwdt"; - reg = <0x00 0x28041000 0x00 0x1000 0x00 0x28040000 0x00 0x1000>; - interrupts = <0x00 0xa4 0x04>; - timeout-sec = <0x1e>; - status = "okay"; - }; - - watchdog@28042000 { - compatible = "arm,sbsa-gwdt"; - reg = <0x00 0x28043000 0x00 0x1000 0x00 0x28042000 0x00 0x1000>; - interrupts = <0x00 0xa5 0x04>; - timeout-sec = <0x1e>; - status = "okay"; - }; - - pwm@2804a000 { - compatible = "phytium,pwm"; - reg = <0x00 0x2804a000 0x00 0x1000>; - interrupts = <0x00 0xad 0x04>; - clocks = <0x0d>; - status = "okay"; - phytium,db = <0x00 0x00 0x64 0x3e8 0x3e8 0x00>; - }; - - pwm@2804b000 { - compatible = "phytium,pwm"; - reg = <0x00 0x2804b000 0x00 0x1000>; - interrupts = <0x00 0xae 0x04>; - clocks = <0x0d>; - status = "okay"; - phytium,db = <0x00 0x00 0x64 0x3e8 0x3e8 0x00>; - }; - - tacho@28054000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28054000 0x00 0x1000>; - interrupts = <0x00 0xc2 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28055000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28055000 0x00 0x1000>; - interrupts = <0x00 0xc3 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28056000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28056000 0x00 0x1000>; - interrupts = <0x00 0xc4 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28057000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28057000 0x00 0x1000>; - interrupts = <0x00 0xc5 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28058000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28058000 0x00 0x1000>; - interrupts = <0x00 0xc6 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28059000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28059000 0x00 0x1000>; - interrupts = <0x00 0xc7 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2805a000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2805a000 0x00 0x1000>; - interrupts = <0x00 0xc8 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2805b000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2805b000 0x00 0x1000>; - interrupts = <0x00 0xc9 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2805c000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2805c000 0x00 0x1000>; - interrupts = <0x00 0xca 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2805d000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2805d000 0x00 0x1000>; - interrupts = <0x00 0xcb 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2805e000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2805e000 0x00 0x1000>; - interrupts = <0x00 0xcc 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2805f000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2805f000 0x00 0x1000>; - interrupts = <0x00 0xcd 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28060000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28060000 0x00 0x1000>; - interrupts = <0x00 0xce 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28061000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28061000 0x00 0x1000>; - interrupts = <0x00 0xcf 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28062000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28062000 0x00 0x1000>; - interrupts = <0x00 0xd0 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28063000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28063000 0x00 0x1000>; - interrupts = <0x00 0xd1 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28064000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28064000 0x00 0x1000>; - interrupts = <0x00 0xd2 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28065000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28065000 0x00 0x1000>; - interrupts = <0x00 0xd3 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28066000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28066000 0x00 0x1000>; - interrupts = <0x00 0xd4 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28067000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28067000 0x00 0x1000>; - interrupts = <0x00 0xd5 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28068000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28068000 0x00 0x1000>; - interrupts = <0x00 0xd6 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28069000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28069000 0x00 0x1000>; - interrupts = <0x00 0xd7 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2806a000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2806a000 0x00 0x1000>; - interrupts = <0x00 0xd8 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2806b000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2806b000 0x00 0x1000>; - interrupts = <0x00 0xd9 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2806c000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2806c000 0x00 0x1000>; - interrupts = <0x00 0xda 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2806d000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2806d000 0x00 0x1000>; - interrupts = <0x00 0xdb 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2806e000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2806e000 0x00 0x1000>; - interrupts = <0x00 0xdc 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2806f000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2806f000 0x00 0x1000>; - interrupts = <0x00 0xdd 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28070000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28070000 0x00 0x1000>; - interrupts = <0x00 0xde 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28071000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28071000 0x00 0x1000>; - interrupts = <0x00 0xdf 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28072000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28072000 0x00 0x1000>; - interrupts = <0x00 0xe0 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28073000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28073000 0x00 0x1000>; - interrupts = <0x00 0xe1 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28074000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28074000 0x00 0x1000>; - interrupts = <0x00 0xe2 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28075000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28075000 0x00 0x1000>; - interrupts = <0x00 0xe3 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28076000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28076000 0x00 0x1000>; - interrupts = <0x00 0xe4 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28077000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28077000 0x00 0x1000>; - interrupts = <0x00 0xe5 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28078000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28078000 0x00 0x1000>; - interrupts = <0x00 0xe6 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28079000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28079000 0x00 0x1000>; - interrupts = <0x00 0xe7 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - usb2@31800000 { - compatible = "phytium,usb2"; - reg = <0x00 0x31800000 0x00 0x80000 0x00 0x31990000 0x00 0x10000>; - interrupts = <0x00 0x20 0x04>; - status = "okay"; - dr_mode = "host"; - }; - - usb2@31880000 { - compatible = "phytium,usb2"; - reg = <0x00 0x31880000 0x00 0x80000 0x00 0x319a0000 0x00 0x10000>; - interrupts = <0x00 0x21 0x04>; - status = "disabled"; - dr_mode = "peripheral"; - }; - - usb2@31900000 { - compatible = "phytium,usb2"; - reg = <0x00 0x31900000 0x00 0x80000 0x00 0x319b0000 0x00 0x10000>; - interrupts = <0x00 0x22 0x04>; - status = "disabled"; - dr_mode = "peripheral"; - }; - - usb2@32800000 { - compatible = "phytium,usb2"; - reg = <0x00 0x32800000 0x00 0x40000 0x00 0x32880000 0x00 0x40000>; - interrupts = <0x00 0x0e 0x04>; - status = "okay"; - dr_mode = "host"; - }; - - usb2@32840000 { - compatible = "phytium,usb2"; - reg = <0x00 0x32840000 0x00 0x40000 0x00 0x328c0000 0x00 0x40000>; - interrupts = <0x00 0x0f 0x04>; - status = "okay"; - dr_mode = "host"; - }; - - dc@32000000 { - compatible = "phytium,dc"; - reg = <0x00 0x32000000 0x00 0x8000>; - interrupts = <0x00 0x2c 0x04>; - status = "okay"; - pipe_mask = [01]; - edp_mask = [00]; - }; - - i2s_dp0@32009000 { - compatible = "phytium,i2s"; - reg = <0x00 0x32009000 0x00 0x1000 0x00 0x32008000 0x00 0x1000>; - interrupts = <0x00 0x2f 0x04>; - clocks = <0x0e>; - clock-names = "i2s_clk"; - dai-name = "phytium-i2s-dp0"; - status = "okay"; - }; - - i2s_dp1@3200B000 { - compatible = "phytium,i2s"; - reg = <0x00 0x3200b000 0x00 0x1000 0x00 0x3200a000 0x00 0x1000>; - interrupts = <0x00 0x30 0x04>; - clocks = <0x0e>; - clock-names = "i2s_clk"; - dai-name = "phytium-i2s-dp1"; - status = "disabled"; - }; - - pmdk_dp { - compatible = "phytium,pmdk-dp"; - status = "okay"; - num-dp = <0x01>; - dp-mask = [01]; - }; - - mailbox@32a00000 { - compatible = "phytium,mbox"; - reg = <0x00 0x32a00000 0x00 0x1000>; - interrupts = <0x00 0x16 0x04>; - #mbox-cells = <0x01>; - phandle = <0x02>; - }; - - rng@32a36000 { - compatible = "phytium,rng"; - reg = <0x00 0x32a36000 0x00 0x1000>; - status = "okay"; - }; - - sram@32a10000 { - compatible = "phytium,pe220x-sram-ns\0mmio-sram"; - reg = <0x00 0x32a10000 0x00 0x2000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - ranges = <0x00 0x00 0x32a10000 0x2000>; - - scp-shmem@0 { - compatible = "arm,scmi-shmem"; - reg = <0x1000 0x400>; - }; - - scp-shmem@1 { - compatible = "arm,scmi-shmem"; - reg = <0x1400 0x400>; - phandle = <0x03>; - }; - }; - - gdma@32b34000 { - compatible = "phytium,gdma"; - dma-channels = <0x10>; - max-outstanding = <0x10>; - reg = <0x00 0x32b34000 0x00 0x1000>; - interrupts = <0x00 0xea 0x04>; - #dma-cells = <0x01>; - }; - - spinlock@32b36000 { - compatible = "phytium,hwspinlock"; - reg = <0x00 0x32b36000 0x00 0x1000>; - #hwlock-cells = <0x01>; - nr-locks = <0x20>; - status = "disabled"; - }; - - pcie@40000000 { - compatible = "pci-host-ecam-generic"; - device_type = "pci"; - #address-cells = <0x03>; - #size-cells = <0x02>; - #interrupt-cells = <0x01>; - reg = <0x00 0x40000000 0x00 0x10000000>; - msi-parent = <0x0f>; - bus-range = <0x00 0xff>; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x04 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0x00 0x00 0x05 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x00 0x00 0x06 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x00 0x00 0x07 0x04>; - ranges = <0x1000000 0x00 0x00 0x00 0x50000000 0x00 0xf00000 0x2000000 0x00 0x58000000 0x00 0x58000000 0x00 0x28000000 0x3000000 0x10 0x00 0x10 0x00 0x10 0x00>; - iommu-map = <0x00 0x10 0x00 0x10000>; - status = "okay"; - }; - - edac@32b28000 { - compatible = "phytium,pe220x-edac"; - reg = <0x00 0x32b28000 0x00 0x1000 0x00 0x31400000 0x00 0x1000 0x00 0x31401000 0x00 0x1000>; - interrupts = <0x00 0x00 0x04 0x00 0x01 0x04>; - status = "disabled"; - }; - - hda@28006000 { - compatible = "phytium,hda"; - reg = <0x00 0x28006000 0x00 0x1000>; - interrupts = <0x00 0x4e 0x04>; - status = "disabled"; - }; - - i2s@28009000 { - compatible = "phytium,i2s"; - reg = <0x00 0x28009000 0x00 0x1000 0x00 0x28005000 0x00 0x1000>; - interrupts = <0x00 0x4d 0x04>; - clocks = <0x0e>; - clock-names = "i2s_clk"; - status = "okay"; - #sound-dai-cells = <0x00>; - dai-name = "phytium-i2s-lsd"; - phandle = <0x16>; - }; - - can@2800a000 { - compatible = "phytium,canfd"; - reg = <0x00 0x2800a000 0x00 0x1000>; - interrupts = <0x00 0x51 0x04>; - clocks = <0x11>; - clock-names = "can_clk"; - tx-fifo-depth = <0x40>; - rx-fifo-depth = <0x40>; - status = "okay"; - }; - - can@2800b000 { - compatible = "phytium,canfd"; - reg = <0x00 0x2800b000 0x00 0x1000>; - interrupts = <0x00 0x52 0x04>; - clocks = <0x11>; - clock-names = "can_clk"; - tx-fifo-depth = <0x40>; - rx-fifo-depth = <0x40>; - status = "okay"; - }; - - keypad@2807a000 { - compatible = "phytium,keypad"; - reg = <0x00 0x2807a000 0x00 0x1000>; - interrupts = <0x00 0xbd 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - usb3@31a08000 { - compatible = "phytium,pe220x-xhci"; - reg = <0x00 0x31a08000 0x00 0x18000>; - interrupts = <0x00 0x10 0x04>; - status = "okay"; - }; - - usb3@31a28000 { - compatible = "phytium,pe220x-xhci"; - reg = <0x00 0x31a28000 0x00 0x18000>; - interrupts = <0x00 0x11 0x04>; - status = "okay"; - }; - - sata@31a40000 { - compatible = "generic-ahci"; - reg = <0x00 0x31a40000 0x00 0x1000>; - interrupts = <0x00 0x2a 0x04>; - status = "disabled"; - }; - - sata@32014000 { - compatible = "generic-ahci"; - reg = <0x00 0x32014000 0x00 0x1000>; - interrupts = <0x00 0x2b 0x04>; - status = "disabled"; - }; - - ethernet@3200c000 { - compatible = "cdns,phytium-gem-1.0"; - reg = <0x00 0x3200c000 0x00 0x2000>; - interrupts = <0x00 0x37 0x04 0x00 0x38 0x04 0x00 0x39 0x04 0x00 0x3a 0x04 0x00 0x1c 0x04 0x00 0x1d 0x04 0x00 0x1e 0x04 0x00 0x1f 0x04>; - clock-names = "pclk\0hclk\0tx_clk\0tsu_clk"; - clocks = <0x12 0x13 0x13 0x12>; - magic-packet; - support-tsn; - status = "okay"; - phy-mode = "sgmii"; - use-mii; - }; - - ethernet@3200e000 { - compatible = "cdns,phytium-gem-1.0"; - reg = <0x00 0x3200e000 0x00 0x2000>; - interrupts = <0x00 0x3b 0x04 0x00 0x3c 0x04 0x00 0x3d 0x04 0x00 0x3e 0x04>; - clock-names = "pclk\0hclk\0tx_clk\0tsu_clk"; - clocks = <0x12 0x13 0x13 0x12>; - magic-packet; - status = "okay"; - phy-mode = "sgmii"; - use-mii; - }; - - ethernet@32010000 { - compatible = "cdns,phytium-gem-1.0"; - reg = <0x00 0x32010000 0x00 0x2000>; - interrupts = <0x00 0x40 0x04 0x00 0x41 0x04 0x00 0x42 0x04 0x00 0x43 0x04>; - clock-names = "pclk\0hclk\0tx_clk\0tsu_clk"; - clocks = <0x12 0x13 0x13 0x12>; - magic-packet; - status = "disabled"; - }; - - ethernet@32012000 { - compatible = "cdns,phytium-gem-1.0"; - reg = <0x00 0x32012000 0x00 0x2000>; - interrupts = <0x00 0x44 0x04 0x00 0x45 0x04 0x00 0x46 0x04 0x00 0x47 0x04>; - clock-names = "pclk\0hclk\0tx_clk\0tsu_clk"; - clocks = <0x12 0x13 0x13 0x12>; - magic-packet; - status = "disabled"; - }; - - vpu@32b00000 { - compatible = "phytium,vpu"; - reg = <0x00 0x32b00000 0x00 0x20000>; - interrupts = <0x00 0x0c 0x04>; - status = "okay"; - }; - - i2c@28026000 { - compatible = "phytium,i2c"; - reg = <0x00 0x28026000 0x00 0x1000>; - interrupts = <0x00 0x65 0x04>; - clocks = <0x0d>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - }; - - i2c@28030000 { - compatible = "phytium,i2c"; - reg = <0x00 0x28030000 0x00 0x1000>; - interrupts = <0x00 0x6a 0x04>; - clocks = <0x0d>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - - es8336@10 { - #sound-dai-cells = <0x00>; - compatible = "everest,es8336"; - reg = <0x10>; - phandle = <0x17>; - }; - }; - - uart@28014000 { - compatible = "arm,pl011\0arm,primecell"; - reg = <0x00 0x28014000 0x00 0x1000>; - interrupts = <0x00 0x5c 0x04>; - clocks = <0x0d 0x0d>; - clock-names = "uartclk\0apb_pclk"; - status = "okay"; - }; - - i2c@28016000 { - compatible = "phytium,i2c"; - reg = <0x00 0x28016000 0x00 0x1000>; - interrupts = <0x00 0x5d 0x04>; - clocks = <0x0d>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - }; - - i2c@28024000 { - compatible = "phytium,i2c"; - reg = <0x00 0x28024000 0x00 0x1000>; - interrupts = <0x00 0x64 0x04>; - clocks = <0x0d>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - }; - - uart@2802A000 { - compatible = "arm,pl011\0arm,primecell"; - reg = <0x00 0x2802a000 0x00 0x1000>; - interrupts = <0x00 0x67 0x04>; - clocks = <0x0d 0x0d>; - clock-names = "uartclk\0apb_pclk"; - status = "okay"; - }; - - uart@28032000 { - compatible = "arm,pl011\0arm,primecell"; - reg = <0x00 0x28032000 0x00 0x1000>; - interrupts = <0x00 0x6b 0x04>; - clocks = <0x0d 0x0d>; - clock-names = "uartclk\0apb_pclk"; - status = "okay"; - }; - }; - - chosen { - bootargs = "console=ttyAMA1,115200 earlycon=pl011,0x2800d000 root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw cma=256m ;"; - stdout-path = "serial1:115200n8"; - }; - - memory { - device_type = "memory"; - reg = <0x20 0x40000000 0x00 0x40000000>; - }; - - leds { - compatible = "gpio-leds"; - - sysled { - label = "sysled"; - gpios = <0x14 0x05 0x00>; - linux,default-trigger = "none"; - }; - }; - - sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "phytium,pe220x-i2s-audio"; - simple-audio-card,pin-switches = "mic-in"; - simple-audio-card,widgets = "Microphone\0mic-in\0Headphone\0Headphones"; - simple-audio-card,routing = "MIC2\0mic-in"; - simple-audio-card,hp-det-gpio = <0x15 0x0b 0x01>; - - simple-audio-card,cpu { - sound-dai = <0x16>; - }; - - simple-audio-card,codec { - sound-dai = <0x17>; - }; - }; -}; diff --git a/configs/vms_bkp/linux-aarch64-e2000_smp1.toml b/configs/vms_bkp/linux-aarch64-e2000_smp1.toml deleted file mode 100644 index 52017828..00000000 --- a/configs/vms_bkp/linux-aarch64-e2000_smp1.toml +++ /dev/null @@ -1,114 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 1 -# Guest vm name. -name = "linux" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 1 -# The physical CPU ids. -phys_cpu_ids = [0x100] -# Guest vm physical cpu sets. -phys_cpu_sets = [8] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x20_4008_0000 -# The location of image: "memory" | "fs". -# Load from file system. -image_location = "memory" -# The load address of the kernel image. -kernel_load_addr = 0x20_4008_0000 -## The file path of the kernel image. -kernel_path = "/path/to/Image" -## The file path of the device tree blob (DTB). -dtb_load_addr = 0x20_4000_0000 -dtb_path = "/path/to/axvisor/configs/vms/linux-aarch64-e2000_smp1.dtb" -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x20_4000_0000, 0x4000_0000, 0x7, 1], # System RAM MAP_IDENTICAL -] - -# -# Device specifications -# -[devices] -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -interrupt_mode = "passthrough" -emu_devices = [] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - [ - "QSPI", - 0x0000_0000, - 0x0000_0000, - 0x1000_0000, - 0x1, - ], - [ - "LocalBus", - 0x1000_0000, - 0x1000_0000, - 0x1000_0000, - 0x1, - ], - [ - "low speed peripherals", - 0x2800_0000, - 0x2800_0000, - 0x0800_0000, - 0x1, - ], - [ - "other peripherals", - 0x3000_0000, - 0x3000_0000, - 0x0800_0000, - 0x1, - ], - [ - "IACC", - 0x3800_0000, - 0x3800_0000, - 0x0800_0000, - 0x1, - ], - [ - "PCIE", - 0x4000_0000, - 0x4000_0000, - 0x4000_0000, - 0x1, - ], - [ - "QSPI high address", - 0x01_0000_0000, - 0x01_0000_0000, - 0x8000_0000, - 0x1, - ], - [ - "LocalBus high address", - 0x01_8000_0000, - 0x01_8000_0000, - 0x8000_0000, - 0x1, - ], - [ - "PCIe MEM64", - 0x10_0000_0000, - 0x10_0000_0000, - 0x01_0000_0000, - 0x1, - ], -] diff --git a/configs/vms_bkp/linux-aarch64-e2000_smp2.dts b/configs/vms_bkp/linux-aarch64-e2000_smp2.dts deleted file mode 100644 index 0d3b86b4..00000000 --- a/configs/vms_bkp/linux-aarch64-e2000_smp2.dts +++ /dev/null @@ -1,1302 +0,0 @@ -/dts-v1/; - -/memreserve/ 0x0000000080000000 0x0000000000010000; -/ { - compatible = "phytium,pe2204"; - interrupt-parent = <0x01>; - #address-cells = <0x02>; - #size-cells = <0x02>; - model = "Phytium Pi Board"; - - // memory@01 { - // device_type = "memory"; - // reg = <0x20 0x00000000 0x00 0x40000000>; - // numa-node-id = <0x00>; - // }; - - aliases { - serial0 = "/soc/uart@2800c000"; - serial1 = "/soc/uart@2800d000"; - serial2 = "/soc/uart@2800e000"; - serial3 = "/soc/uart@2800f000"; - ethernet0 = "/soc/ethernet@3200c000"; - ethernet1 = "/soc/ethernet@3200e000"; - ethernet2 = "/soc/ethernet@32010000"; - ethernet3 = "/soc/ethernet@32012000"; - serial4 = "/soc/uart@28014000"; - serial5 = "/soc/uart@2802A000"; - serial6 = "/soc/uart@28032000"; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - cpu_suspend = <0xc4000001>; - cpu_off = <0x84000002>; - cpu_on = <0xc4000003>; - sys_poweroff = <0x84000008>; - sys_reset = <0x84000009>; - }; - - firmware { - - scmi { - compatible = "arm,scmi"; - mboxes = <0x02 0x00>; - mbox-names = "tx"; - shmem = <0x03>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - protocol@13 { - reg = <0x13>; - #clock-cells = <0x01>; - phandle = <0x09>; - }; - - protocol@15 { - reg = <0x15>; - #thermal-sensor-cells = <0x01>; - phandle = <0x04>; - }; - }; - - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - }; - - thermal-zones { - - sensor0 { - polling-delay-passive = <0x64>; - polling-delay = <0x3e8>; - thermal-sensors = <0x04 0x00>; - }; - - sensor1 { - polling-delay-passive = <0x64>; - polling-delay = <0x3e8>; - thermal-sensors = <0x04 0x01>; - }; - }; - - cpus { - #address-cells = <0x02>; - #size-cells = <0x00>; - - cpu-map { - - cluster0 { - - core0 { - cpu = <0x05>; - }; - }; - - // cluster1 { - - // core0 { - // cpu = <0x06>; - // }; - // }; - - cluster2 { - - core0 { - cpu = <0x07>; - }; - - // core1 { - // cpu = <0x08>; - // }; - }; - }; - - cpu@0 { - device_type = "cpu"; - compatible = "phytium,ftc310\0arm,armv8"; - reg = <0x00 0x200>; - enable-method = "psci"; - clocks = <0x09 0x02>; - capacity-dmips-mhz = <0xb22>; - phandle = <0x07>; - }; - - // cpu@1 { - // device_type = "cpu"; - // compatible = "phytium,ftc310\0arm,armv8"; - // reg = <0x00 0x201>; - // enable-method = "psci"; - // clocks = <0x09 0x02>; - // capacity-dmips-mhz = <0xb22>; - // phandle = <0x08>; - // }; - - cpu@100 { - device_type = "cpu"; - compatible = "phytium,ftc664\0arm,armv8"; - reg = <0x00 0x00>; - enable-method = "psci"; - clocks = <0x09 0x00>; - capacity-dmips-mhz = <0x161c>; - phandle = <0x05>; - }; - - // cpu@101 { - // device_type = "cpu"; - // compatible = "phytium,ftc664\0arm,armv8"; - // reg = <0x00 0x100>; - // enable-method = "psci"; - // clocks = <0x09 0x01>; - // capacity-dmips-mhz = <0x161c>; - // phandle = <0x06>; - // }; - }; - - interrupt-controller@30800000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <0x03>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - interrupt-controller; - reg = <0x00 0x30800000 0x00 0x20000 0x00 0x30880000 0x00 0x80000 0x00 0x30840000 0x00 0x10000 0x00 0x30850000 0x00 0x10000 0x00 0x30860000 0x00 0x10000>; - interrupts = <0x01 0x09 0x08>; - phandle = <0x01>; - - gic-its@30820000 { - compatible = "arm,gic-v3-its"; - msi-controller; - reg = <0x00 0x30820000 0x00 0x20000>; - phandle = <0x0f>; - }; - }; - - pmu { - compatible = "arm,armv8-pmuv3"; - interrupts = <0x01 0x07 0x08>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0x08 0x01 0x0e 0x08 0x01 0x0b 0x08 0x01 0x0a 0x08>; - clock-frequency = <0x2faf080>; - }; - - clocks { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - clk48mhz { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x2dc6c00>; - phandle = <0x13>; - }; - - clk50mhz { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x2faf080>; - phandle = <0x0d>; - }; - - clk100mhz { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x5f5e100>; - phandle = <0x0c>; - }; - - clk200mhz { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0xbebc200>; - phandle = <0x11>; - }; - - clk250mhz { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0xee6b280>; - phandle = <0x12>; - }; - - clk300mhz { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x11e1a300>; - phandle = <0x0b>; - }; - - clk600mhz { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x23c34600>; - phandle = <0x0e>; - }; - - clk1200mhz { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x47868c00>; - phandle = <0x0a>; - }; - }; - - iommu@30000000 { - compatible = "arm,smmu-v3"; - reg = <0x00 0x30000000 0x00 0x800000>; - interrupts = <0x00 0xf0 0x01 0x00 0xef 0x01 0x00 0xec 0x01 0x00 0xf2 0x01>; - interrupt-names = "eventq\0priq\0cmdq-sync\0gerror"; - dma-coherent; - #iommu-cells = <0x01>; - phandle = <0x10>; - }; - - soc { - compatible = "simple-bus"; - #address-cells = <0x02>; - #size-cells = <0x02>; - dma-coherent; - ranges; - - mmc@28000000 { - compatible = "phytium,mci"; - reg = <0x00 0x28000000 0x00 0x1000>; - interrupts = <0x00 0x48 0x04>; - clocks = <0x0a>; - clock-names = "phytium_mci_clk"; - status = "okay"; - bus-width = <0x04>; - max-frequency = <0x2faf080>; - cap-sdio-irq; - cap-sd-highspeed; - no-mmc; - }; - - mmc@28001000 { - compatible = "phytium,mci"; - reg = <0x00 0x28001000 0x00 0x1000>; - interrupts = <0x00 0x49 0x04>; - clocks = <0x0a>; - clock-names = "phytium_mci_clk"; - status = "okay"; - bus-width = <0x04>; - max-frequency = <0x2faf080>; - cap-sdio-irq; - cap-sd-highspeed; - no-mmc; - no-sd; - non-removable; - }; - - nand@28002000 { - compatible = "phytium,nfc"; - reg = <0x00 0x28002000 0x00 0x1000>; - interrupts = <0x00 0x4a 0x04>; - status = "disabled"; - }; - - ddma@28003000 { - compatible = "phytium,ddma"; - reg = <0x00 0x28003000 0x00 0x1000>; - interrupts = <0x00 0x4b 0x04>; - #dma-cells = <0x02>; - dma-channels = <0x08>; - }; - - ddma@28004000 { - compatible = "phytium,ddma"; - reg = <0x00 0x28004000 0x00 0x1000>; - interrupts = <0x00 0x4c 0x04>; - #dma-cells = <0x02>; - dma-channels = <0x08>; - }; - - spi@28008000 { - compatible = "phytium,qspi-nor"; - reg = <0x00 0x28008000 0x00 0x1000 0x00 0x00 0x00 0xfffffff>; - reg-names = "qspi\0qspi_mm"; - clocks = <0x0b>; - status = "okay"; - #address-cells = <0x01>; - #size-cells = <0x00>; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0x00>; - spi-rx-bus-width = <0x01>; - spi-max-frequency = <0x1312d00>; - status = "okay"; - }; - }; - - uart@2800c000 { - compatible = "arm,pl011\0arm,primecell"; - reg = <0x00 0x2800c000 0x00 0x1000>; - interrupts = <0x00 0x53 0x04>; - clocks = <0x0c 0x0c>; - clock-names = "uartclk\0apb_pclk"; - status = "okay"; - }; - - uart@2800d000 { - compatible = "arm,pl011\0arm,primecell"; - reg = <0x00 0x2800d000 0x00 0x1000>; - interrupts = <0x00 0x54 0x04>; - clocks = <0x0c 0x0c>; - clock-names = "uartclk\0apb_pclk"; - status = "okay"; - }; - - uart@2800e000 { - compatible = "arm,pl011\0arm,primecell"; - reg = <0x00 0x2800e000 0x00 0x1000>; - interrupts = <0x00 0x55 0x04>; - clocks = <0x0c 0x0c>; - clock-names = "uartclk\0apb_pclk"; - status = "okay"; - }; - - uart@2800f000 { - compatible = "arm,pl011\0arm,primecell"; - reg = <0x00 0x2800f000 0x00 0x1000>; - interrupts = <0x00 0x56 0x04>; - clocks = <0x0c 0x0c>; - clock-names = "uartclk\0apb_pclk"; - status = "okay"; - }; - - lpc@28010000 { - compatible = "simple-mfd\0syscon"; - reg = <0x00 0x28010000 0x00 0x1000>; - reg-io-width = <0x04>; - #address-cells = <0x01>; - #size-cells = <0x01>; - ranges = <0x00 0x00 0x28010000 0x1000>; - - kcs@24 { - compatible = "phytium,kcs-bmc"; - reg = <0x24 0x01 0x30 0x01 0x3c 0x01>; - interrupts = <0x00 0x58 0x04>; - status = "disabled"; - }; - - kcs@28 { - compatible = "phytium,kcs-bmc"; - reg = <0x28 0x01 0x34 0x01 0x40 0x01>; - interrupts = <0x00 0x58 0x04>; - status = "disabled"; - }; - - kcs@2c { - compatible = "phytium,kcs-bmc"; - reg = <0x2c 0x01 0x38 0x01 0x44 0x01>; - interrupts = <0x00 0x58 0x04>; - status = "disabled"; - }; - - kcs@8c { - compatible = "phytium,kcs-bmc"; - reg = <0x8c 0x01 0x90 0x01 0x94 0x01>; - interrupts = <0x00 0x58 0x04>; - status = "disabled"; - }; - - bt@48 { - compatible = "phytium,bt-bmc"; - reg = <0x48 0x20>; - interrupts = <0x00 0x58 0x04>; - status = "disabled"; - }; - }; - - gpio@28034000 { - compatible = "phytium,gpio"; - reg = <0x00 0x28034000 0x00 0x1000>; - interrupts = <0x00 0x6c 0x04 0x00 0x6d 0x04 0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04 0x00 0x71 0x04 0x00 0x72 0x04 0x00 0x73 0x04 0x00 0x74 0x04 0x00 0x75 0x04 0x00 0x76 0x04 0x00 0x77 0x04 0x00 0x78 0x04 0x00 0x79 0x04 0x00 0x7a 0x04 0x00 0x7b 0x04>; - gpio-controller; - #gpio-cells = <0x02>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - - porta { - compatible = "phytium,gpio-port"; - reg = <0x00>; - ngpios = <0x10>; - }; - }; - - gpio@28035000 { - compatible = "phytium,gpio"; - reg = <0x00 0x28035000 0x00 0x1000>; - interrupts = <0x00 0x7c 0x04 0x00 0x7d 0x04 0x00 0x7e 0x04 0x00 0x7f 0x04 0x00 0x80 0x04 0x00 0x81 0x04 0x00 0x82 0x04 0x00 0x83 0x04 0x00 0x84 0x04 0x00 0x85 0x04 0x00 0x86 0x04 0x00 0x87 0x04 0x00 0x88 0x04 0x00 0x89 0x04 0x00 0x8a 0x04 0x00 0x8b 0x04>; - gpio-controller; - #gpio-cells = <0x02>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x14>; - - porta { - compatible = "phytium,gpio-port"; - reg = <0x00>; - ngpios = <0x10>; - }; - }; - - gpio@28036000 { - compatible = "phytium,gpio"; - reg = <0x00 0x28036000 0x00 0x1000>; - interrupts = <0x00 0x8c 0x04 0x00 0x8d 0x04 0x00 0x8e 0x04 0x00 0x8f 0x04 0x00 0x90 0x04 0x00 0x91 0x04 0x00 0x92 0x04 0x00 0x93 0x04 0x00 0x94 0x04 0x00 0x95 0x04 0x00 0x96 0x04 0x00 0x97 0x04 0x00 0x98 0x04 0x00 0x99 0x04 0x00 0x9a 0x04 0x00 0x9b 0x04>; - gpio-controller; - #gpio-cells = <0x02>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x15>; - - porta { - compatible = "phytium,gpio-port"; - reg = <0x00>; - ngpios = <0x10>; - }; - }; - - gpio@28037000 { - compatible = "phytium,gpio"; - reg = <0x00 0x28037000 0x00 0x1000>; - interrupts = <0x00 0x9c 0x04>; - gpio-controller; - #gpio-cells = <0x02>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - - porta { - compatible = "phytium,gpio-port"; - reg = <0x00>; - ngpios = <0x10>; - }; - }; - - gpio@28038000 { - compatible = "phytium,gpio"; - reg = <0x00 0x28038000 0x00 0x1000>; - interrupts = <0x00 0x9d 0x04>; - gpio-controller; - #gpio-cells = <0x02>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - - porta { - compatible = "phytium,gpio-port"; - reg = <0x00>; - ngpios = <0x10>; - }; - }; - - gpio@28039000 { - compatible = "phytium,gpio"; - reg = <0x00 0x28039000 0x00 0x1000>; - interrupts = <0x00 0x9e 0x04>; - gpio-controller; - #gpio-cells = <0x02>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - - porta { - compatible = "phytium,gpio-port"; - reg = <0x00>; - ngpios = <0x10>; - }; - }; - - spi@2803a000 { - compatible = "phytium,spi"; - reg = <0x00 0x2803a000 0x00 0x1000>; - interrupts = <0x00 0x9f 0x04>; - clocks = <0x0d>; - num-cs = <0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - global-cs = <0x01>; - - spidev@0 { - compatible = "spidev"; - reg = <0x00>; - spi-max-frequency = <0x2faf080>; - status = "disabled"; - }; - }; - - spi@2803b000 { - compatible = "phytium,spi"; - reg = <0x00 0x2803b000 0x00 0x1000>; - interrupts = <0x00 0xa0 0x04>; - clocks = <0x0d>; - num-cs = <0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - }; - - spi@2803c000 { - compatible = "phytium,spi"; - reg = <0x00 0x2803c000 0x00 0x1000>; - interrupts = <0x00 0xa1 0x04>; - clocks = <0x0d>; - num-cs = <0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - }; - - spi@2803d000 { - compatible = "phytium,spi"; - reg = <0x00 0x2803d000 0x00 0x1000>; - interrupts = <0x00 0xa2 0x04>; - clocks = <0x0d>; - num-cs = <0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - }; - - watchdog@28040000 { - compatible = "arm,sbsa-gwdt"; - reg = <0x00 0x28041000 0x00 0x1000 0x00 0x28040000 0x00 0x1000>; - interrupts = <0x00 0xa4 0x04>; - timeout-sec = <0x1e>; - status = "okay"; - }; - - watchdog@28042000 { - compatible = "arm,sbsa-gwdt"; - reg = <0x00 0x28043000 0x00 0x1000 0x00 0x28042000 0x00 0x1000>; - interrupts = <0x00 0xa5 0x04>; - timeout-sec = <0x1e>; - status = "okay"; - }; - - pwm@2804a000 { - compatible = "phytium,pwm"; - reg = <0x00 0x2804a000 0x00 0x1000>; - interrupts = <0x00 0xad 0x04>; - clocks = <0x0d>; - status = "okay"; - phytium,db = <0x00 0x00 0x64 0x3e8 0x3e8 0x00>; - }; - - pwm@2804b000 { - compatible = "phytium,pwm"; - reg = <0x00 0x2804b000 0x00 0x1000>; - interrupts = <0x00 0xae 0x04>; - clocks = <0x0d>; - status = "okay"; - phytium,db = <0x00 0x00 0x64 0x3e8 0x3e8 0x00>; - }; - - tacho@28054000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28054000 0x00 0x1000>; - interrupts = <0x00 0xc2 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28055000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28055000 0x00 0x1000>; - interrupts = <0x00 0xc3 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28056000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28056000 0x00 0x1000>; - interrupts = <0x00 0xc4 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28057000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28057000 0x00 0x1000>; - interrupts = <0x00 0xc5 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28058000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28058000 0x00 0x1000>; - interrupts = <0x00 0xc6 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28059000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28059000 0x00 0x1000>; - interrupts = <0x00 0xc7 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2805a000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2805a000 0x00 0x1000>; - interrupts = <0x00 0xc8 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2805b000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2805b000 0x00 0x1000>; - interrupts = <0x00 0xc9 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2805c000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2805c000 0x00 0x1000>; - interrupts = <0x00 0xca 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2805d000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2805d000 0x00 0x1000>; - interrupts = <0x00 0xcb 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2805e000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2805e000 0x00 0x1000>; - interrupts = <0x00 0xcc 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2805f000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2805f000 0x00 0x1000>; - interrupts = <0x00 0xcd 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28060000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28060000 0x00 0x1000>; - interrupts = <0x00 0xce 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28061000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28061000 0x00 0x1000>; - interrupts = <0x00 0xcf 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28062000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28062000 0x00 0x1000>; - interrupts = <0x00 0xd0 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28063000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28063000 0x00 0x1000>; - interrupts = <0x00 0xd1 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28064000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28064000 0x00 0x1000>; - interrupts = <0x00 0xd2 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28065000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28065000 0x00 0x1000>; - interrupts = <0x00 0xd3 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28066000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28066000 0x00 0x1000>; - interrupts = <0x00 0xd4 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28067000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28067000 0x00 0x1000>; - interrupts = <0x00 0xd5 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28068000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28068000 0x00 0x1000>; - interrupts = <0x00 0xd6 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28069000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28069000 0x00 0x1000>; - interrupts = <0x00 0xd7 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2806a000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2806a000 0x00 0x1000>; - interrupts = <0x00 0xd8 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2806b000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2806b000 0x00 0x1000>; - interrupts = <0x00 0xd9 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2806c000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2806c000 0x00 0x1000>; - interrupts = <0x00 0xda 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2806d000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2806d000 0x00 0x1000>; - interrupts = <0x00 0xdb 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2806e000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2806e000 0x00 0x1000>; - interrupts = <0x00 0xdc 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@2806f000 { - compatible = "phytium,tacho"; - reg = <0x00 0x2806f000 0x00 0x1000>; - interrupts = <0x00 0xdd 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28070000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28070000 0x00 0x1000>; - interrupts = <0x00 0xde 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28071000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28071000 0x00 0x1000>; - interrupts = <0x00 0xdf 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28072000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28072000 0x00 0x1000>; - interrupts = <0x00 0xe0 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28073000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28073000 0x00 0x1000>; - interrupts = <0x00 0xe1 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28074000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28074000 0x00 0x1000>; - interrupts = <0x00 0xe2 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28075000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28075000 0x00 0x1000>; - interrupts = <0x00 0xe3 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28076000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28076000 0x00 0x1000>; - interrupts = <0x00 0xe4 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28077000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28077000 0x00 0x1000>; - interrupts = <0x00 0xe5 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28078000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28078000 0x00 0x1000>; - interrupts = <0x00 0xe6 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - tacho@28079000 { - compatible = "phytium,tacho"; - reg = <0x00 0x28079000 0x00 0x1000>; - interrupts = <0x00 0xe7 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - usb2@31800000 { - compatible = "phytium,usb2"; - reg = <0x00 0x31800000 0x00 0x80000 0x00 0x31990000 0x00 0x10000>; - interrupts = <0x00 0x20 0x04>; - status = "okay"; - dr_mode = "host"; - }; - - usb2@31880000 { - compatible = "phytium,usb2"; - reg = <0x00 0x31880000 0x00 0x80000 0x00 0x319a0000 0x00 0x10000>; - interrupts = <0x00 0x21 0x04>; - status = "disabled"; - dr_mode = "peripheral"; - }; - - usb2@31900000 { - compatible = "phytium,usb2"; - reg = <0x00 0x31900000 0x00 0x80000 0x00 0x319b0000 0x00 0x10000>; - interrupts = <0x00 0x22 0x04>; - status = "disabled"; - dr_mode = "peripheral"; - }; - - usb2@32800000 { - compatible = "phytium,usb2"; - reg = <0x00 0x32800000 0x00 0x40000 0x00 0x32880000 0x00 0x40000>; - interrupts = <0x00 0x0e 0x04>; - status = "okay"; - dr_mode = "host"; - }; - - usb2@32840000 { - compatible = "phytium,usb2"; - reg = <0x00 0x32840000 0x00 0x40000 0x00 0x328c0000 0x00 0x40000>; - interrupts = <0x00 0x0f 0x04>; - status = "okay"; - dr_mode = "host"; - }; - - dc@32000000 { - compatible = "phytium,dc"; - reg = <0x00 0x32000000 0x00 0x8000>; - interrupts = <0x00 0x2c 0x04>; - status = "okay"; - pipe_mask = [01]; - edp_mask = [00]; - }; - - i2s_dp0@32009000 { - compatible = "phytium,i2s"; - reg = <0x00 0x32009000 0x00 0x1000 0x00 0x32008000 0x00 0x1000>; - interrupts = <0x00 0x2f 0x04>; - clocks = <0x0e>; - clock-names = "i2s_clk"; - dai-name = "phytium-i2s-dp0"; - status = "okay"; - }; - - i2s_dp1@3200B000 { - compatible = "phytium,i2s"; - reg = <0x00 0x3200b000 0x00 0x1000 0x00 0x3200a000 0x00 0x1000>; - interrupts = <0x00 0x30 0x04>; - clocks = <0x0e>; - clock-names = "i2s_clk"; - dai-name = "phytium-i2s-dp1"; - status = "disabled"; - }; - - pmdk_dp { - compatible = "phytium,pmdk-dp"; - status = "okay"; - num-dp = <0x01>; - dp-mask = [01]; - }; - - mailbox@32a00000 { - compatible = "phytium,mbox"; - reg = <0x00 0x32a00000 0x00 0x1000>; - interrupts = <0x00 0x16 0x04>; - #mbox-cells = <0x01>; - phandle = <0x02>; - }; - - rng@32a36000 { - compatible = "phytium,rng"; - reg = <0x00 0x32a36000 0x00 0x1000>; - status = "okay"; - }; - - sram@32a10000 { - compatible = "phytium,pe220x-sram-ns\0mmio-sram"; - reg = <0x00 0x32a10000 0x00 0x2000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - ranges = <0x00 0x00 0x32a10000 0x2000>; - - scp-shmem@0 { - compatible = "arm,scmi-shmem"; - reg = <0x1000 0x400>; - }; - - scp-shmem@1 { - compatible = "arm,scmi-shmem"; - reg = <0x1400 0x400>; - phandle = <0x03>; - }; - }; - - gdma@32b34000 { - compatible = "phytium,gdma"; - dma-channels = <0x10>; - max-outstanding = <0x10>; - reg = <0x00 0x32b34000 0x00 0x1000>; - interrupts = <0x00 0xea 0x04>; - #dma-cells = <0x01>; - }; - - spinlock@32b36000 { - compatible = "phytium,hwspinlock"; - reg = <0x00 0x32b36000 0x00 0x1000>; - #hwlock-cells = <0x01>; - nr-locks = <0x20>; - status = "disabled"; - }; - - pcie@40000000 { - compatible = "pci-host-ecam-generic"; - device_type = "pci"; - #address-cells = <0x03>; - #size-cells = <0x02>; - #interrupt-cells = <0x01>; - reg = <0x00 0x40000000 0x00 0x10000000>; - msi-parent = <0x0f>; - bus-range = <0x00 0xff>; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x04 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0x00 0x00 0x05 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x00 0x00 0x06 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x00 0x00 0x07 0x04>; - ranges = <0x1000000 0x00 0x00 0x00 0x50000000 0x00 0xf00000 0x2000000 0x00 0x58000000 0x00 0x58000000 0x00 0x28000000 0x3000000 0x10 0x00 0x10 0x00 0x10 0x00>; - iommu-map = <0x00 0x10 0x00 0x10000>; - status = "okay"; - }; - - edac@32b28000 { - compatible = "phytium,pe220x-edac"; - reg = <0x00 0x32b28000 0x00 0x1000 0x00 0x31400000 0x00 0x1000 0x00 0x31401000 0x00 0x1000>; - interrupts = <0x00 0x00 0x04 0x00 0x01 0x04>; - status = "disabled"; - }; - - hda@28006000 { - compatible = "phytium,hda"; - reg = <0x00 0x28006000 0x00 0x1000>; - interrupts = <0x00 0x4e 0x04>; - status = "disabled"; - }; - - i2s@28009000 { - compatible = "phytium,i2s"; - reg = <0x00 0x28009000 0x00 0x1000 0x00 0x28005000 0x00 0x1000>; - interrupts = <0x00 0x4d 0x04>; - clocks = <0x0e>; - clock-names = "i2s_clk"; - status = "okay"; - #sound-dai-cells = <0x00>; - dai-name = "phytium-i2s-lsd"; - phandle = <0x16>; - }; - - can@2800a000 { - compatible = "phytium,canfd"; - reg = <0x00 0x2800a000 0x00 0x1000>; - interrupts = <0x00 0x51 0x04>; - clocks = <0x11>; - clock-names = "can_clk"; - tx-fifo-depth = <0x40>; - rx-fifo-depth = <0x40>; - status = "okay"; - }; - - can@2800b000 { - compatible = "phytium,canfd"; - reg = <0x00 0x2800b000 0x00 0x1000>; - interrupts = <0x00 0x52 0x04>; - clocks = <0x11>; - clock-names = "can_clk"; - tx-fifo-depth = <0x40>; - rx-fifo-depth = <0x40>; - status = "okay"; - }; - - keypad@2807a000 { - compatible = "phytium,keypad"; - reg = <0x00 0x2807a000 0x00 0x1000>; - interrupts = <0x00 0xbd 0x04>; - clocks = <0x0d>; - status = "disabled"; - }; - - usb3@31a08000 { - compatible = "phytium,pe220x-xhci"; - reg = <0x00 0x31a08000 0x00 0x18000>; - interrupts = <0x00 0x10 0x04>; - status = "okay"; - }; - - usb3@31a28000 { - compatible = "phytium,pe220x-xhci"; - reg = <0x00 0x31a28000 0x00 0x18000>; - interrupts = <0x00 0x11 0x04>; - status = "okay"; - }; - - sata@31a40000 { - compatible = "generic-ahci"; - reg = <0x00 0x31a40000 0x00 0x1000>; - interrupts = <0x00 0x2a 0x04>; - status = "disabled"; - }; - - sata@32014000 { - compatible = "generic-ahci"; - reg = <0x00 0x32014000 0x00 0x1000>; - interrupts = <0x00 0x2b 0x04>; - status = "disabled"; - }; - - ethernet@3200c000 { - compatible = "cdns,phytium-gem-1.0"; - reg = <0x00 0x3200c000 0x00 0x2000>; - interrupts = <0x00 0x37 0x04 0x00 0x38 0x04 0x00 0x39 0x04 0x00 0x3a 0x04 0x00 0x1c 0x04 0x00 0x1d 0x04 0x00 0x1e 0x04 0x00 0x1f 0x04>; - clock-names = "pclk\0hclk\0tx_clk\0tsu_clk"; - clocks = <0x12 0x13 0x13 0x12>; - magic-packet; - support-tsn; - status = "okay"; - phy-mode = "sgmii"; - use-mii; - }; - - ethernet@3200e000 { - compatible = "cdns,phytium-gem-1.0"; - reg = <0x00 0x3200e000 0x00 0x2000>; - interrupts = <0x00 0x3b 0x04 0x00 0x3c 0x04 0x00 0x3d 0x04 0x00 0x3e 0x04>; - clock-names = "pclk\0hclk\0tx_clk\0tsu_clk"; - clocks = <0x12 0x13 0x13 0x12>; - magic-packet; - status = "okay"; - phy-mode = "sgmii"; - use-mii; - }; - - ethernet@32010000 { - compatible = "cdns,phytium-gem-1.0"; - reg = <0x00 0x32010000 0x00 0x2000>; - interrupts = <0x00 0x40 0x04 0x00 0x41 0x04 0x00 0x42 0x04 0x00 0x43 0x04>; - clock-names = "pclk\0hclk\0tx_clk\0tsu_clk"; - clocks = <0x12 0x13 0x13 0x12>; - magic-packet; - status = "disabled"; - }; - - ethernet@32012000 { - compatible = "cdns,phytium-gem-1.0"; - reg = <0x00 0x32012000 0x00 0x2000>; - interrupts = <0x00 0x44 0x04 0x00 0x45 0x04 0x00 0x46 0x04 0x00 0x47 0x04>; - clock-names = "pclk\0hclk\0tx_clk\0tsu_clk"; - clocks = <0x12 0x13 0x13 0x12>; - magic-packet; - status = "disabled"; - }; - - vpu@32b00000 { - compatible = "phytium,vpu"; - reg = <0x00 0x32b00000 0x00 0x20000>; - interrupts = <0x00 0x0c 0x04>; - status = "okay"; - }; - - i2c@28026000 { - compatible = "phytium,i2c"; - reg = <0x00 0x28026000 0x00 0x1000>; - interrupts = <0x00 0x65 0x04>; - clocks = <0x0d>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - }; - - i2c@28030000 { - compatible = "phytium,i2c"; - reg = <0x00 0x28030000 0x00 0x1000>; - interrupts = <0x00 0x6a 0x04>; - clocks = <0x0d>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - - es8336@10 { - #sound-dai-cells = <0x00>; - compatible = "everest,es8336"; - reg = <0x10>; - phandle = <0x17>; - }; - }; - - uart@28014000 { - compatible = "arm,pl011\0arm,primecell"; - reg = <0x00 0x28014000 0x00 0x1000>; - interrupts = <0x00 0x5c 0x04>; - clocks = <0x0d 0x0d>; - clock-names = "uartclk\0apb_pclk"; - status = "okay"; - }; - - i2c@28016000 { - compatible = "phytium,i2c"; - reg = <0x00 0x28016000 0x00 0x1000>; - interrupts = <0x00 0x5d 0x04>; - clocks = <0x0d>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - }; - - i2c@28024000 { - compatible = "phytium,i2c"; - reg = <0x00 0x28024000 0x00 0x1000>; - interrupts = <0x00 0x64 0x04>; - clocks = <0x0d>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - }; - - uart@2802A000 { - compatible = "arm,pl011\0arm,primecell"; - reg = <0x00 0x2802a000 0x00 0x1000>; - interrupts = <0x00 0x67 0x04>; - clocks = <0x0d 0x0d>; - clock-names = "uartclk\0apb_pclk"; - status = "okay"; - }; - - uart@28032000 { - compatible = "arm,pl011\0arm,primecell"; - reg = <0x00 0x28032000 0x00 0x1000>; - interrupts = <0x00 0x6b 0x04>; - clocks = <0x0d 0x0d>; - clock-names = "uartclk\0apb_pclk"; - status = "okay"; - }; - }; - - chosen { - bootargs = "console=ttyAMA1,115200 earlycon=pl011,0x2800d000 root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw cma=256m ;"; - stdout-path = "serial1:115200n8"; - }; - - memory@00 { - device_type = "memory"; - reg = <0x20 0x40000000 0x00 0x40000000>; - }; - - leds { - compatible = "gpio-leds"; - - sysled { - label = "sysled"; - gpios = <0x14 0x05 0x00>; - linux,default-trigger = "none"; - }; - }; - - sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "phytium,pe220x-i2s-audio"; - simple-audio-card,pin-switches = "mic-in"; - simple-audio-card,widgets = "Microphone\0mic-in\0Headphone\0Headphones"; - simple-audio-card,routing = "MIC2\0mic-in"; - simple-audio-card,hp-det-gpio = <0x15 0x0b 0x01>; - - simple-audio-card,cpu { - sound-dai = <0x16>; - }; - - simple-audio-card,codec { - sound-dai = <0x17>; - }; - }; -}; diff --git a/configs/vms_bkp/linux-aarch64-e2000_smp2.toml b/configs/vms_bkp/linux-aarch64-e2000_smp2.toml deleted file mode 100644 index bf409a0b..00000000 --- a/configs/vms_bkp/linux-aarch64-e2000_smp2.toml +++ /dev/null @@ -1,115 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 1 -# Guest vm name. -name = "linux" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 2 -# The physical CPU ids. -phys_cpu_ids = [0x200, 0x00] -# Guest vm physical cpu sets. -phys_cpu_sets = [1, 4] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x20_4008_0000 -# The location of image: "memory" | "fs". -# Load from file system. -image_location = "memory" -# The load address of the kernel image. -kernel_load_addr = 0x20_4008_0000 -## The file path of the kernel image. -kernel_path = "/path/to/Image" -## The file path of the device tree blob (DTB). -dtb_load_addr = 0x20_4000_0000 -dtb_path = "/path/to/axvisor/configs/vms/linux-aarch64-e2000_smp2.dtb" -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x20_4000_0000, 0x4000_0000, 0x7, 1], # System RAM MAP_IDENTICAL - # [0xa000_0000, 0x2000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL -] - -# -# Device specifications -# -[devices] -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -interrupt_mode = "passthrough" -emu_devices = [] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - [ - "QSPI", - 0x0000_0000, - 0x0000_0000, - 0x1000_0000, - 0x1, - ], - [ - "LocalBus", - 0x1000_0000, - 0x1000_0000, - 0x1000_0000, - 0x1, - ], - [ - "low speed peripherals", - 0x2800_0000, - 0x2800_0000, - 0x0800_0000, - 0x1, - ], - [ - "other peripherals", - 0x3000_0000, - 0x3000_0000, - 0x0800_0000, - 0x1, - ], - [ - "IACC", - 0x3800_0000, - 0x3800_0000, - 0x0800_0000, - 0x1, - ], - [ - "PCIE", - 0x4000_0000, - 0x4000_0000, - 0x4000_0000, - 0x1, - ], - [ - "QSPI high address", - 0x01_0000_0000, - 0x01_0000_0000, - 0x8000_0000, - 0x1, - ], - [ - "LocalBus high address", - 0x01_8000_0000, - 0x01_8000_0000, - 0x8000_0000, - 0x1, - ], - [ - "PCIe MEM64", - 0x10_0000_0000, - 0x10_0000_0000, - 0x01_0000_0000, - 0x1, - ], -] diff --git a/configs/vms_bkp/linux-aarch64-rk3568_smp1.dts b/configs/vms_bkp/linux-aarch64-rk3568_smp1.dts deleted file mode 100644 index bdc54614..00000000 --- a/configs/vms_bkp/linux-aarch64-rk3568_smp1.dts +++ /dev/null @@ -1,6108 +0,0 @@ -/dts-v1/; - -/memreserve/ 0x0000000008300000 0x000000000001c000; -/memreserve/ 0x000000000a200000 0x00000000008cf15d; -/ { - serial-number = "425ca8fc29ade692"; - compatible = "rockchip,rk3568-firefly-roc-pc-se\0rockchip,rk3568"; - interrupt-parent = <0x01>; - #address-cells = <0x02>; - #size-cells = <0x02>; - model = "Firefly RK3568-ROC-PC-SE HDMI (Linux)"; - - memory { - reg = <0x00 0x80000000 0x00 0x60000000>; - device_type = "memory"; - }; - - ddr3-params { - version = <0x100>; - expanded_version = <0x00>; - reserved = <0x00>; - freq_0 = <0x420>; - freq_1 = <0x144>; - freq_2 = <0x210>; - freq_3 = <0x30c>; - freq_4 = <0x00>; - freq_5 = <0x00>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - pd_dis_freq = <0x42a>; - sr_dis_freq = <0x320>; - dram_dll_dis_freq = <0x12c>; - phy_dll_dis_freq = <0x00>; - phy_dq_drv_odten = <0x21>; - phy_ca_drv_odten = <0x21>; - phy_clk_drv_odten = <0x21>; - dram_dq_drv_odten = <0x22>; - phy_dq_drv_odtoff = <0x21>; - phy_ca_drv_odtoff = <0x21>; - phy_clk_drv_odtoff = <0x21>; - dram_dq_drv_odtoff = <0x22>; - dram_odt = <0x78>; - phy_odt = <0xa7>; - phy_odt_puup_en = <0x01>; - phy_odt_pudn_en = <0x01>; - dram_dq_odt_en_freq = <0x14d>; - phy_odt_en_freq = <0x14d>; - phy_dq_sr_odten = <0x0f>; - phy_ca_sr_odten = <0x03>; - phy_clk_sr_odten = <0x00>; - phy_dq_sr_odtoff = <0x0f>; - phy_ca_sr_odtoff = <0x03>; - phy_clk_sr_odtoff = <0x00>; - ssmod_downspread = <0x00>; - ssmod_div = <0x00>; - ssmod_spread = <0x00>; - mode_2t = <0x00>; - speed_bin = <0x15>; - dram_ext_temp = <0x00>; - byte_map = <0xe4>; - dq_map_cs0_dq_l = <0x00>; - dq_map_cs0_dq_h = <0x00>; - dq_map_cs1_dq_l = <0x00>; - dq_map_cs1_dq_h = <0x00>; - phandle = <0xb7>; - }; - - ddr4-params { - version = <0x100>; - expanded_version = <0x00>; - reserved = <0x00>; - freq_0 = <0x420>; - freq_1 = <0x144>; - freq_2 = <0x210>; - freq_3 = <0x30c>; - freq_4 = <0x00>; - freq_5 = <0x00>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - pd_dis_freq = <0x42a>; - sr_dis_freq = <0x320>; - dram_dll_dis_freq = <0x271>; - phy_dll_dis_freq = <0x00>; - phy_dq_drv_odten = <0x25>; - phy_ca_drv_odten = <0x25>; - phy_clk_drv_odten = <0x25>; - dram_dq_drv_odten = <0x22>; - phy_dq_drv_odtoff = <0x25>; - phy_ca_drv_odtoff = <0x25>; - phy_clk_drv_odtoff = <0x25>; - dram_dq_drv_odtoff = <0x22>; - dram_odt = <0x78>; - phy_odt = <0x8b>; - phy_odt_puup_en = <0x01>; - phy_odt_pudn_en = <0x01>; - dram_dq_odt_en_freq = <0x1f4>; - phy_odt_en_freq = <0x1f4>; - phy_dq_sr_odten = <0x0e>; - phy_ca_sr_odten = <0x01>; - phy_clk_sr_odten = <0x01>; - phy_dq_sr_odtoff = <0x0e>; - phy_ca_sr_odtoff = <0x01>; - phy_clk_sr_odtoff = <0x01>; - ssmod_downspread = <0x00>; - ssmod_div = <0x00>; - ssmod_spread = <0x00>; - mode_2t = <0x00>; - speed_bin = <0x0c>; - dram_ext_temp = <0x00>; - byte_map = <0xe4>; - dq_map_cs0_dq_l = <0x22777788>; - dq_map_cs0_dq_h = <0xd7888877>; - dq_map_cs1_dq_l = <0x22777788>; - dq_map_cs1_dq_h = <0xd7888877>; - phandle = <0xb8>; - }; - - lpddr3-params { - version = <0x100>; - expanded_version = <0x00>; - reserved = <0x00>; - freq_0 = <0x420>; - freq_1 = <0x144>; - freq_2 = <0x210>; - freq_3 = <0x30c>; - freq_4 = <0x00>; - freq_5 = <0x00>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - pd_dis_freq = <0x42a>; - sr_dis_freq = <0x320>; - dram_dll_dis_freq = <0x00>; - phy_dll_dis_freq = <0x00>; - phy_dq_drv_odten = <0x25>; - phy_ca_drv_odten = <0x25>; - phy_clk_drv_odten = <0x27>; - dram_dq_drv_odten = <0x22>; - phy_dq_drv_odtoff = <0x25>; - phy_ca_drv_odtoff = <0x25>; - phy_clk_drv_odtoff = <0x27>; - dram_dq_drv_odtoff = <0x22>; - dram_odt = <0x78>; - phy_odt = <0x94>; - phy_odt_puup_en = <0x01>; - phy_odt_pudn_en = <0x01>; - dram_dq_odt_en_freq = <0x14d>; - phy_odt_en_freq = <0x14d>; - phy_dq_sr_odten = <0x0f>; - phy_ca_sr_odten = <0x01>; - phy_clk_sr_odten = <0x0f>; - phy_dq_sr_odtoff = <0x0f>; - phy_ca_sr_odtoff = <0x01>; - phy_clk_sr_odtoff = <0x0f>; - ssmod_downspread = <0x00>; - ssmod_div = <0x00>; - ssmod_spread = <0x00>; - mode_2t = <0x00>; - speed_bin = <0x00>; - dram_ext_temp = <0x00>; - byte_map = <0x8d>; - dq_map_cs0_dq_l = <0x00>; - dq_map_cs0_dq_h = <0x00>; - dq_map_cs1_dq_l = <0x00>; - dq_map_cs1_dq_h = <0x00>; - phandle = <0xb9>; - }; - - lpddr4-params { - version = <0x100>; - expanded_version = <0x00>; - reserved = <0x00>; - freq_0 = <0x618>; - freq_1 = <0x144>; - freq_2 = <0x210>; - freq_3 = <0x30c>; - freq_4 = <0x00>; - freq_5 = <0x00>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - pd_dis_freq = <0x42a>; - sr_dis_freq = <0x320>; - dram_dll_dis_freq = <0x00>; - phy_dll_dis_freq = <0x00>; - phy_dq_drv_odten = <0x1e>; - phy_ca_drv_odten = <0x26>; - phy_clk_drv_odten = <0x26>; - dram_dq_drv_odten = <0x28>; - phy_dq_drv_odtoff = <0x1e>; - phy_ca_drv_odtoff = <0x26>; - phy_clk_drv_odtoff = <0x26>; - dram_dq_drv_odtoff = <0x28>; - dram_odt = <0x50>; - phy_odt = <0x3c>; - phy_odt_puup_en = <0x00>; - phy_odt_pudn_en = <0x00>; - dram_dq_odt_en_freq = <0x320>; - phy_odt_en_freq = <0x320>; - phy_dq_sr_odten = <0x00>; - phy_ca_sr_odten = <0x0f>; - phy_clk_sr_odten = <0x0f>; - phy_dq_sr_odtoff = <0x00>; - phy_ca_sr_odtoff = <0x0f>; - phy_clk_sr_odtoff = <0x0f>; - ssmod_downspread = <0x00>; - ssmod_div = <0x00>; - ssmod_spread = <0x00>; - mode_2t = <0x00>; - speed_bin = <0x00>; - dram_ext_temp = <0x00>; - byte_map = <0xe4>; - dq_map_cs0_dq_l = <0x00>; - dq_map_cs0_dq_h = <0x00>; - dq_map_cs1_dq_l = <0x00>; - dq_map_cs1_dq_h = <0x00>; - lp4_ca_odt = <0x78>; - lp4_drv_pu_cal_odten = <0x01>; - lp4_drv_pu_cal_odtoff = <0x01>; - phy_lp4_drv_pulldown_en_odten = <0x00>; - phy_lp4_drv_pulldown_en_odtoff = <0x00>; - lp4_ca_odt_en_freq = <0x320>; - phy_lp4_cs_drv_odten = <0x00>; - phy_lp4_cs_drv_odtoff = <0x00>; - lp4_odte_ck_en = <0x01>; - lp4_odte_cs_en = <0x01>; - lp4_odtd_ca_en = <0x00>; - phy_lp4_dq_vref_odten = <0xa6>; - lp4_dq_vref_odten = <0x12c>; - lp4_ca_vref_odten = <0x17c>; - phy_lp4_dq_vref_odtoff = <0x1a4>; - lp4_dq_vref_odtoff = <0x1a4>; - lp4_ca_vref_odtoff = <0x1a4>; - phandle = <0xba>; - }; - - lpddr4x-params { - version = <0x100>; - expanded_version = <0x00>; - reserved = <0x00>; - freq_0 = <0x618>; - freq_1 = <0x144>; - freq_2 = <0x210>; - freq_3 = <0x30c>; - freq_4 = <0x00>; - freq_5 = <0x00>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - pd_dis_freq = <0x42a>; - sr_dis_freq = <0x320>; - dram_dll_dis_freq = <0x00>; - phy_dll_dis_freq = <0x00>; - phy_dq_drv_odten = <0x1d>; - phy_ca_drv_odten = <0x24>; - phy_clk_drv_odten = <0x24>; - dram_dq_drv_odten = <0x28>; - phy_dq_drv_odtoff = <0x1d>; - phy_ca_drv_odtoff = <0x24>; - phy_clk_drv_odtoff = <0x24>; - dram_dq_drv_odtoff = <0x28>; - dram_odt = <0x50>; - phy_odt = <0x3c>; - phy_odt_puup_en = <0x00>; - phy_odt_pudn_en = <0x00>; - dram_dq_odt_en_freq = <0x320>; - phy_odt_en_freq = <0x320>; - phy_dq_sr_odten = <0x00>; - phy_ca_sr_odten = <0x00>; - phy_clk_sr_odten = <0x00>; - phy_dq_sr_odtoff = <0x00>; - phy_ca_sr_odtoff = <0x00>; - phy_clk_sr_odtoff = <0x00>; - ssmod_downspread = <0x00>; - ssmod_div = <0x00>; - ssmod_spread = <0x00>; - mode_2t = <0x00>; - speed_bin = <0x00>; - dram_ext_temp = <0x00>; - byte_map = <0xe4>; - dq_map_cs0_dq_l = <0x00>; - dq_map_cs0_dq_h = <0x00>; - dq_map_cs1_dq_l = <0x00>; - dq_map_cs1_dq_h = <0x00>; - lp4_ca_odt = <0x78>; - lp4_drv_pu_cal_odten = <0x00>; - lp4_drv_pu_cal_odtoff = <0x00>; - phy_lp4_drv_pulldown_en_odten = <0x00>; - phy_lp4_drv_pulldown_en_odtoff = <0x00>; - lp4_ca_odt_en_freq = <0x320>; - phy_lp4_cs_drv_odten = <0x00>; - phy_lp4_cs_drv_odtoff = <0x00>; - lp4_odte_ck_en = <0x00>; - lp4_odte_cs_en = <0x00>; - lp4_odtd_ca_en = <0x00>; - phy_lp4_dq_vref_odten = <0xa6>; - lp4_dq_vref_odten = <0xe4>; - lp4_ca_vref_odten = <0x157>; - phy_lp4_dq_vref_odtoff = <0x1a4>; - lp4_dq_vref_odtoff = <0x1a4>; - lp4_ca_vref_odtoff = <0x157>; - phandle = <0xbb>; - }; - - aliases { - csi2dphy0 = "/csi2-dphy0"; - csi2dphy1 = "/csi2-dphy1"; - csi2dphy2 = "/csi2-dphy2"; - dsi0 = "/dsi@fe060000"; - dsi1 = "/dsi@fe070000"; - ethernet0 = "/ethernet@fe2a0000"; - ethernet1 = "/ethernet@fe010000"; - gpio0 = "/pinctrl/gpio0@fdd60000"; - gpio1 = "/pinctrl/gpio1@fe740000"; - gpio2 = "/pinctrl/gpio2@fe750000"; - gpio3 = "/pinctrl/gpio3@fe760000"; - gpio4 = "/pinctrl/gpio4@fe770000"; - i2c0 = "/i2c@fdd40000"; - i2c1 = "/i2c@fe5a0000"; - i2c2 = "/i2c@fe5b0000"; - i2c3 = "/i2c@fe5c0000"; - i2c4 = "/i2c@fe5d0000"; - i2c5 = "/i2c@fe5e0000"; - mmc0 = "/sdhci@fe310000"; - mmc1 = "/dwmmc@fe2b0000"; - mmc2 = "/dwmmc@fe2c0000"; - mmc3 = "/dwmmc@fe000000"; - serial0 = "/serial@fdd50000"; - serial1 = "/serial@fe650000"; - serial2 = "/serial@fe660000"; - serial3 = "/serial@fe670000"; - serial4 = "/serial@fe680000"; - serial5 = "/serial@fe690000"; - serial6 = "/serial@fe6a0000"; - serial7 = "/serial@fe6b0000"; - serial8 = "/serial@fe6c0000"; - serial9 = "/serial@fe6d0000"; - spi0 = "/spi@fe610000"; - spi1 = "/spi@fe620000"; - spi2 = "/spi@fe630000"; - spi3 = "/spi@fe640000"; - lvds0 = "/syscon@fdc60000/lvds"; - lvds1 = "/syscon@fdc60000/lvds1"; - }; - - cpus { - #address-cells = <0x02>; - #size-cells = <0x00>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x00 0x00>; - enable-method = "psci"; - clocks = <0x02 0x00>; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04>; - #cooling-cells = <0x02>; - dynamic-power-coefficient = <0xbb>; - cpu-supply = <0x05>; - phandle = <0x0c>; - }; - - // cpu@100 { - // device_type = "cpu"; - // compatible = "arm,cortex-a55"; - // reg = <0x00 0x100>; - // enable-method = "psci"; - // clocks = <0x02 0x00>; - // operating-points-v2 = <0x03>; - // cpu-idle-states = <0x04>; - // phandle = <0x0d>; - // }; - - // cpu@200 { - // device_type = "cpu"; - // compatible = "arm,cortex-a55"; - // reg = <0x00 0x200>; - // enable-method = "psci"; - // clocks = <0x02 0x00>; - // operating-points-v2 = <0x03>; - // cpu-idle-states = <0x04>; - // phandle = <0x0e>; - // }; - - // cpu@300 { - // device_type = "cpu"; - // compatible = "arm,cortex-a55"; - // reg = <0x00 0x300>; - // enable-method = "psci"; - // clocks = <0x02 0x00>; - // operating-points-v2 = <0x03>; - // cpu-idle-states = <0x04>; - // phandle = <0x0f>; - // }; - - idle-states { - entry-method = "psci"; - - cpu-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x10000>; - entry-latency-us = <0x64>; - exit-latency-us = <0x78>; - min-residency-us = <0x3e8>; - phandle = <0x04>; - }; - }; - }; - - cpu0-opp-table { - compatible = "operating-points-v2"; - opp-shared; - mbist-vmin = <0xc96a8 0xdbba0 0xe7ef0>; - nvmem-cells = <0x06 0x07 0x08 0x09 0x0a 0x0b>; - nvmem-cell-names = "leakage\0pvtm\0mbist-vmin\0opp-info\0specification_serial_number\0remark_spec_serial_number"; - rockchip,supported-hw; - rockchip,max-volt = <0x118c30>; - rockchip,pvtm-voltage-sel = <0x00 0x14820 0x00 0x14821 0x153d8 0x01 0x153d9 0x16378 0x02 0x16379 0x186a0 0x03>; - rockchip,pvtm-freq = <0x639c0>; - rockchip,pvtm-volt = <0xdbba0>; - rockchip,pvtm-ch = <0x00 0x05>; - rockchip,pvtm-sample-time = <0x3e8>; - rockchip,pvtm-number = <0x0a>; - rockchip,pvtm-error = <0x3e8>; - rockchip,pvtm-ref-temp = <0x28>; - rockchip,pvtm-temp-prop = <0x1a 0x1a>; - rockchip,thermal-zone = "soc-thermal"; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-adjust-volt = <0x00 0x7c8 0x124f8>; - phandle = <0x03>; - - opp-408000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x18519600>; - opp-microvolt = <0xcf850 0xcf850 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - - opp-600000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xcf850 0xcf850 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - - opp-816000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x30a32c00>; - opp-microvolt = <0xcf850 0xcf850 0x118c30>; - clock-latency-ns = <0x9c40>; - opp-suspend; - }; - - opp-1104000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x41cdb400>; - opp-microvolt = <0xdbba0 0xdbba0 0x118c30>; - opp-microvolt-L0 = <0xdbba0 0xdbba0 0x118c30>; - opp-microvolt-L1 = <0xcf850 0xcf850 0x118c30>; - opp-microvolt-L2 = <0xcf850 0xcf850 0x118c30>; - opp-microvolt-L3 = <0xcf850 0xcf850 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - - opp-1416000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x54667200>; - opp-microvolt = <0xfa3e8 0xfa3e8 0x118c30>; - opp-microvolt-L0 = <0xfa3e8 0xfa3e8 0x118c30>; - opp-microvolt-L1 = <0xee098 0xee098 0x118c30>; - opp-microvolt-L2 = <0xe7ef0 0xe7ef0 0x118c30>; - opp-microvolt-L3 = <0xe1d48 0xe1d48 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - - opp-1608000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x5fd82200>; - opp-microvolt = <0x10c8e0 0x10c8e0 0x118c30>; - opp-microvolt-L0 = <0x10c8e0 0x10c8e0 0x118c30>; - opp-microvolt-L1 = <0x100590 0x100590 0x118c30>; - opp-microvolt-L2 = <0xfa3e8 0xfa3e8 0x118c30>; - opp-microvolt-L3 = <0xf4240 0xf4240 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - - opp-1800000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x6b49d200>; - opp-microvolt = <0x118c30 0x118c30 0x118c30>; - opp-microvolt-L0 = <0x118c30 0x118c30 0x118c30>; - opp-microvolt-L1 = <0x10c8e0 0x10c8e0 0x118c30>; - opp-microvolt-L2 = <0x106738 0x106738 0x118c30>; - opp-microvolt-L3 = <0x100590 0x100590 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - - opp-1992000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x76bb8200>; - opp-microvolt = <0x118c30 0x118c30 0x118c30>; - opp-microvolt-L0 = <0x118c30 0x118c30 0x118c30>; - opp-microvolt-L1 = <0x118c30 0x118c30 0x118c30>; - opp-microvolt-L2 = <0x112a88 0x112a88 0x118c30>; - opp-microvolt-L3 = <0x10c8e0 0x10c8e0 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-1008000000 { - opp-supported-hw = <0x04 0xffff>; - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0xcf850 0xcf850 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-1416000000 { - opp-supported-hw = <0x04 0xffff>; - opp-hz = <0x00 0x54667200>; - opp-microvolt = <0xdbba0 0xdbba0 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - - opp-m-1608000000 { - opp-supported-hw = <0x02 0xffff>; - opp-hz = <0x00 0x5fd82200>; - opp-microvolt = <0xf4240 0xf4240 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - }; - - arm-pmu { - compatible = "arm,cortex-a55-pmu\0arm,armv8-pmuv3"; - interrupts = <0x00 0xe4 0x04 0x00 0xe5 0x04 0x00 0xe6 0x04 0x00 0xe7 0x04>; - interrupt-affinity = <0x0c 0x0d 0x0e 0x0f>; - }; - - cpuinfo { - compatible = "rockchip,cpuinfo"; - nvmem-cells = <0x10 0x11 0x12>; - nvmem-cell-names = "id\0cpu-version\0cpu-code"; - }; - - display-subsystem { - compatible = "rockchip,display-subsystem"; - memory-region = <0x13 0x14>; - memory-region-names = "drm-logo\0drm-cubic-lut"; - ports = <0x15>; - devfreq = <0x16>; - - route { - - route-dsi0 { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x17>; - }; - - route-dsi1 { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x18>; - }; - - route-edp { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x19>; - }; - - route-hdmi { - status = "okay"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x1a>; - }; - - route-lvds { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x1b>; - }; - - route-rgb { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x1c>; - }; - }; - }; - - edac { - compatible = "rockchip,rk3568-edac"; - interrupts = <0x00 0xad 0x04 0x00 0xaf 0x04>; - interrupt-names = "ce\0ue"; - status = "disabled"; - }; - - firmware { - - scmi { - compatible = "arm,scmi-smc"; - shmem = <0x1d>; - arm,smc-id = <0x82000010>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - protocol@14 { - reg = <0x14>; - #clock-cells = <0x01>; - rockchip,clk-init = <0x41cdb400>; - phandle = <0x02>; - }; - }; - - sdei { - compatible = "arm,sdei-1.0"; - method = "smc"; - }; - }; - - mipi-csi2 { - compatible = "rockchip,rk3568-mipi-csi2"; - rockchip,hw = <0x1e>; - status = "disabled"; - }; - - mpp-srv { - compatible = "rockchip,mpp-service"; - rockchip,taskqueue-count = <0x06>; - rockchip,resetgroup-count = <0x06>; - status = "okay"; - phandle = <0x7b>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - drm-logo@00000000 { - compatible = "rockchip,drm-logo"; - reg = <0x00 0xedf00000 0x00 0x2e0000>; - phandle = <0x13>; - }; - - drm-cubic-lut@00000000 { - compatible = "rockchip,drm-cubic-lut"; - reg = <0x00 0xeff00000 0x00 0x8000>; - phandle = <0x14>; - }; - - ramoops@110000 { - compatible = "ramoops"; - reg = <0x00 0x110000 0x00 0xf0000>; - record-size = <0x20000>; - console-size = <0x80000>; - ftrace-size = <0x00>; - pmsg-size = <0x50000>; - }; - }; - - rockchip-suspend { - compatible = "rockchip,pm-rk3568"; - status = "okay"; - rockchip,sleep-debug-en = <0x01>; - rockchip,sleep-mode-config = <0x5ec>; - rockchip,wakeup-config = <0x10>; - }; - - rockchip-system-monitor { - compatible = "rockchip,system-monitor"; - rockchip,thermal-zone = "soc-thermal"; - }; - - thermal-zones { - - soc-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - sustainable-power = <0x389>; - thermal-sensors = <0x1f 0x00>; - - trips { - - trip-point-0 { - temperature = <0x124f8>; - hysteresis = <0x7d0>; - type = "passive"; - }; - - trip-point-1 { - temperature = <0x14c08>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x20>; - }; - - soc-crit { - temperature = <0x1c138>; - hysteresis = <0x7d0>; - type = "critical"; - }; - }; - - cooling-maps { - - map0 { - trip = <0x20>; - cooling-device = <0x0c 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; - - map1 { - trip = <0x20>; - cooling-device = <0x21 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; - }; - }; - - gpu-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - thermal-sensors = <0x1f 0x01>; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - arm,no-tick-in-suspend; - }; - - external-gmac0-clock { - compatible = "fixed-clock"; - clock-frequency = <0x7735940>; - clock-output-names = "gmac0_clkin"; - #clock-cells = <0x00>; - phandle = <0xc7>; - }; - - external-gmac1-clock { - compatible = "fixed-clock"; - clock-frequency = <0x7735940>; - clock-output-names = "gmac1_clkin"; - #clock-cells = <0x00>; - phandle = <0x92>; - }; - - xpcs-gmac0-clock { - compatible = "fixed-clock"; - clock-frequency = <0x7735940>; - clock-output-names = "clk_gmac0_xpcs_mii"; - #clock-cells = <0x00>; - }; - - xpcs-gmac1-clock { - compatible = "fixed-clock"; - clock-frequency = <0x7735940>; - clock-output-names = "clk_gmac1_xpcs_mii"; - #clock-cells = <0x00>; - }; - - i2s1-mclkin-rx { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0xbb8000>; - clock-output-names = "i2s1_mclkin_rx"; - }; - - i2s1-mclkin-tx { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0xbb8000>; - clock-output-names = "i2s1_mclkin_tx"; - }; - - i2s2-mclkin { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0xbb8000>; - clock-output-names = "i2s2_mclkin"; - }; - - i2s3-mclkin { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0xbb8000>; - clock-output-names = "i2s3_mclkin"; - }; - - mpll { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x2faf0800>; - clock-output-names = "mpll"; - }; - - xin24m { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - clock-output-names = "xin24m"; - }; - - xin32k { - compatible = "fixed-clock"; - clock-frequency = <0x8000>; - clock-output-names = "xin32k"; - #clock-cells = <0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0x22>; - }; - - scmi-shmem@10f000 { - compatible = "arm,scmi-shmem"; - reg = <0x00 0x10f000 0x00 0x100>; - phandle = <0x1d>; - }; - - sata@fc000000 { - compatible = "snps,dwc-ahci"; - reg = <0x00 0xfc000000 0x00 0x1000>; - clocks = <0x23 0x96 0x23 0x97 0x23 0x98>; - clock-names = "sata\0pmalive\0rxoob"; - interrupts = <0x00 0x5e 0x04>; - interrupt-names = "hostc"; - phys = <0x24 0x01>; - phy-names = "sata-phy"; - ports-implemented = <0x01>; - power-domains = <0x25 0x0f>; - status = "disabled"; - }; - - sata@fc400000 { - compatible = "snps,dwc-ahci"; - reg = <0x00 0xfc400000 0x00 0x1000>; - clocks = <0x23 0x9b 0x23 0x9c 0x23 0x9d>; - clock-names = "sata\0pmalive\0rxoob"; - interrupts = <0x00 0x5f 0x04>; - interrupt-names = "hostc"; - phys = <0x26 0x01>; - phy-names = "sata-phy"; - ports-implemented = <0x01>; - power-domains = <0x25 0x0f>; - status = "disabled"; - }; - - sata@fc800000 { - compatible = "snps,dwc-ahci"; - reg = <0x00 0xfc800000 0x00 0x1000>; - clocks = <0x23 0xa0 0x23 0xa1 0x23 0xa2>; - clock-names = "sata\0pmalive\0rxoob"; - interrupts = <0x00 0x60 0x04>; - interrupt-names = "hostc"; - phys = <0x27 0x01>; - phy-names = "sata-phy"; - ports-implemented = <0x01>; - power-domains = <0x25 0x0f>; - status = "okay"; - }; - - usbdrd { - compatible = "rockchip,rk3568-dwc3\0rockchip,rk3399-dwc3"; - clocks = <0x23 0xa6 0x23 0xa7 0x23 0xa5 0x23 0x7f>; - clock-names = "ref_clk\0suspend_clk\0bus_clk\0pipe_clk"; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - status = "okay"; - - dwc3@fcc00000 { - compatible = "snps,dwc3"; - reg = <0x00 0xfcc00000 0x00 0x400000>; - interrupts = <0x00 0xa9 0x04>; - dr_mode = "otg"; - phys = <0x28 0x24 0x04>; - phy-names = "usb2-phy\0usb3-phy"; - phy_type = "utmi_wide"; - power-domains = <0x25 0x0f>; - resets = <0x23 0x94>; - reset-names = "usb3-otg"; - snps,dis_enblslpm_quirk; - snps,dis-u1-entry-quirk; - snps,dis-u2-entry-quirk; - snps,dis-u2-freeclk-exists-quirk; - snps,dis-del-phy-power-chg-quirk; - snps,dis-tx-ipgap-linecheck-quirk; - snps,dis_rxdet_inp3_quirk; - snps,parkmode-disable-hs-quirk; - snps,parkmode-disable-ss-quirk; - quirk-skip-phy-init; - status = "okay"; - extcon = <0x29>; - usb-role-switch; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x2a>; - phandle = <0x4d>; - }; - }; - }; - }; - - usbhost { - compatible = "rockchip,rk3568-dwc3\0rockchip,rk3399-dwc3"; - clocks = <0x23 0xa9 0x23 0xaa 0x23 0xa8 0x23 0x7f>; - clock-names = "ref_clk\0suspend_clk\0bus_clk\0pipe_clk"; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - status = "okay"; - - dwc3@fd000000 { - compatible = "snps,dwc3"; - reg = <0x00 0xfd000000 0x00 0x400000>; - interrupts = <0x00 0xaa 0x04>; - dr_mode = "host"; - phys = <0x2b 0x26 0x04>; - phy-names = "usb2-phy\0usb3-phy"; - phy_type = "utmi_wide"; - power-domains = <0x25 0x0f>; - resets = <0x23 0x95>; - reset-names = "usb3-host"; - snps,dis_enblslpm_quirk; - snps,dis-u2-freeclk-exists-quirk; - snps,dis-del-phy-power-chg-quirk; - snps,dis-tx-ipgap-linecheck-quirk; - snps,dis_rxdet_inp3_quirk; - snps,parkmode-disable-hs-quirk; - snps,parkmode-disable-ss-quirk; - status = "okay"; - }; - }; - - interrupt-controller@fd400000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <0x03>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - interrupt-controller; - reg = <0x00 0xfd400000 0x00 0x10000 0x00 0xfd460000 0x00 0xc0000>; - interrupts = <0x01 0x09 0x04>; - phandle = <0x01>; - - interrupt-controller@fd440000 { - compatible = "arm,gic-v3-its"; - msi-controller; - #msi-cells = <0x01>; - reg = <0x00 0xfd440000 0x00 0x20000>; - status = "okay"; - phandle = <0xbe>; - }; - }; - - usb@fd800000 { - compatible = "generic-ehci"; - reg = <0x00 0xfd800000 0x00 0x40000>; - interrupts = <0x00 0x82 0x04>; - clocks = <0x23 0xbd 0x23 0xbe 0x23 0xbc 0x2c>; - clock-names = "usbhost\0arbiter\0pclk\0utmi"; - phys = <0x2d>; - phy-names = "usb2-phy"; - status = "okay"; - }; - - usb@fd840000 { - compatible = "generic-ohci"; - reg = <0x00 0xfd840000 0x00 0x40000>; - interrupts = <0x00 0x83 0x04>; - clocks = <0x23 0xbd 0x23 0xbe 0x23 0xbc 0x2c>; - clock-names = "usbhost\0arbiter\0pclk\0utmi"; - phys = <0x2d>; - phy-names = "usb2-phy"; - status = "okay"; - }; - - usb@fd880000 { - compatible = "generic-ehci"; - reg = <0x00 0xfd880000 0x00 0x40000>; - interrupts = <0x00 0x85 0x04>; - clocks = <0x23 0xbf 0x23 0xc0 0x23 0xbc 0x2c>; - clock-names = "usbhost\0arbiter\0pclk\0utmi"; - phys = <0x2e>; - phy-names = "usb2-phy"; - status = "okay"; - }; - - usb@fd8c0000 { - compatible = "generic-ohci"; - reg = <0x00 0xfd8c0000 0x00 0x40000>; - interrupts = <0x00 0x86 0x04>; - clocks = <0x23 0xbf 0x23 0xc0 0x23 0xbc 0x2c>; - clock-names = "usbhost\0arbiter\0pclk\0utmi"; - phys = <0x2e>; - phy-names = "usb2-phy"; - status = "okay"; - }; - - syscon@fda00000 { - compatible = "rockchip,rk3568-xpcs\0syscon"; - reg = <0x00 0xfda00000 0x00 0x200000>; - status = "disabled"; - }; - - syscon@fdc20000 { - compatible = "rockchip,rk3568-pmugrf\0syscon\0simple-mfd"; - reg = <0x00 0xfdc20000 0x00 0x10000>; - phandle = <0x3c>; - - io-domains { - compatible = "rockchip,rk3568-pmu-io-voltage-domain"; - status = "okay"; - pmuio1-supply = <0x2f>; - pmuio2-supply = <0x2f>; - vccio1-supply = <0x30>; - vccio3-supply = <0x31>; - vccio4-supply = <0x32>; - vccio5-supply = <0x33>; - vccio6-supply = <0x32>; - vccio7-supply = <0x33>; - }; - - reboot-mode { - compatible = "syscon-reboot-mode"; - offset = <0x200>; - mode-bootloader = <0x5242c301>; - mode-charge = <0x5242c30b>; - mode-fastboot = <0x5242c309>; - mode-loader = <0x5242c301>; - mode-normal = <0x5242c300>; - mode-recovery = <0x5242c303>; - mode-ums = <0x5242c30c>; - mode-panic = <0x5242c307>; - mode-watchdog = <0x5242c308>; - }; - }; - - syscon@fdc50000 { - compatible = "rockchip,rk3568-pipegrf\0syscon"; - reg = <0x00 0xfdc50000 0x00 0x1000>; - phandle = <0x12a>; - }; - - syscon@fdc60000 { - compatible = "rockchip,rk3568-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfdc60000 0x00 0x10000>; - phandle = <0x3b>; - - io-domains { - compatible = "rockchip,rk3568-io-voltage-domain"; - status = "disabled"; - }; - - lvds { - compatible = "rockchip,rk3568-lvds"; - phys = <0x34>; - phy-names = "phy"; - status = "disabled"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0x1b>; - status = "disabled"; - phandle = <0xa3>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0x35>; - status = "disabled"; - phandle = <0xa5>; - }; - }; - }; - }; - - lvds1 { - compatible = "rockchip,rk3568-lvds"; - phys = <0x36>; - phy-names = "phy"; - status = "disabled"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x37>; - phandle = <0xa4>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0x38>; - phandle = <0xa7>; - }; - }; - }; - }; - - rgb { - compatible = "rockchip,rk3568-rgb"; - pinctrl-names = "default"; - pinctrl-0 = <0x39>; - status = "disabled"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0x1c>; - status = "disabled"; - phandle = <0xa6>; - }; - }; - }; - }; - }; - - syscon@fdc70000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfdc70000 0x00 0x1000>; - phandle = <0x12b>; - }; - - syscon@fdc80000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfdc80000 0x00 0x1000>; - phandle = <0x12c>; - }; - - syscon@fdc90000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfdc90000 0x00 0x1000>; - phandle = <0x12d>; - }; - - syscon@fdca0000 { - compatible = "rockchip,rk3568-usb2phy-grf\0syscon"; - reg = <0x00 0xfdca0000 0x00 0x8000>; - phandle = <0x135>; - }; - - syscon@fdca8000 { - compatible = "rockchip,rk3568-usb2phy-grf\0syscon"; - reg = <0x00 0xfdca8000 0x00 0x8000>; - phandle = <0x137>; - }; - - syscon@fdcb0000 { - compatible = "rockchip,rk3568-edp-phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfdcb0000 0x00 0x100>; - clocks = <0x23 0x192>; - - edp-phy { - compatible = "rockchip,rk3568-edp-phy"; - clocks = <0x3a 0x29>; - clock-names = "refclk"; - #phy-cells = <0x00>; - status = "disabled"; - phandle = <0xae>; - }; - }; - - syscon@fdcb8000 { - compatible = "rockchip,pcie30-phy-grf\0syscon"; - reg = <0x00 0xfdcb8000 0x00 0x10000>; - phandle = <0x138>; - }; - - sram@fdcc0000 { - compatible = "mmio-sram"; - reg = <0x00 0xfdcc0000 0x00 0xb000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - ranges = <0x00 0x00 0xfdcc0000 0xb000>; - - rkvdec-sram@0 { - reg = <0x00 0xb000>; - phandle = <0x84>; - }; - }; - - clock-controller@fdd00000 { - compatible = "rockchip,rk3568-pmucru"; - reg = <0x00 0xfdd00000 0x00 0x1000>; - rockchip,grf = <0x3b>; - rockchip,pmugrf = <0x3c>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x3a 0x32>; - assigned-clock-parents = <0x3a 0x05>; - phandle = <0x3a>; - }; - - clock-controller@fdd20000 { - compatible = "rockchip,rk3568-cru"; - reg = <0x00 0xfdd20000 0x00 0x1000>; - rockchip,grf = <0x3b>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x3a 0x05 0x23 0x106 0x23 0x10b 0x3a 0x01 0x3a 0x2b 0x23 0x03 0x23 0x19b 0x23 0x09 0x23 0x19c 0x23 0x19d 0x23 0x1a1 0x23 0x19e 0x23 0x19f 0x23 0x1a0 0x23 0x04 0x23 0x10d 0x23 0x10e 0x23 0x173 0x23 0x174 0x23 0x175 0x23 0x176 0x23 0xc9 0x23 0xca 0x23 0x06 0x23 0x7e 0x23 0x7f 0x23 0x3d 0x23 0x41 0x23 0x45 0x23 0x49 0x23 0x4d 0x23 0x4d 0x23 0x55 0x23 0x51 0x23 0x5d 0x23 0xdd>; - assigned-clock-rates = <0x8000 0x11e1a300 0x11e1a300 0xbebc200 0x5f5e100 0x3b9aca00 0x1dcd6500 0x13d92d40 0xee6b280 0x7735940 0x5f5e100 0x3b9aca0 0x2faf080 0x17d7840 0x46cf7100 0x8f0d180 0x5f5e100 0x1dcd6500 0x17d78400 0x8f0d180 0x5f5e100 0x11e1a300 0x8f0d180 0x47868c00 0x17d78400 0x5f5e100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x1dcd6500>; - assigned-clock-parents = <0x3a 0x08 0x23 0x04 0x23 0x04>; - phandle = <0x23>; - }; - - i2c@fdd40000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xfdd40000 0x00 0x1000>; - clocks = <0x3a 0x07 0x3a 0x2d>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x2e 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x3d>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - - tcs4525@1c { - compatible = "tcs,tcs452x"; - reg = <0x1c>; - vin-supply = <0x3e>; - regulator-compatible = "fan53555-reg"; - regulator-name = "vdd_cpu"; - regulator-min-microvolt = <0xadf34>; - regulator-max-microvolt = <0x1535b0>; - regulator-ramp-delay = <0x8fc>; - fcs,suspend-voltage-selector = <0x01>; - regulator-boot-on; - regulator-always-on; - phandle = <0x05>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <0x3f>; - interrupts = <0x03 0x08>; - pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset"; - pinctrl-0 = <0x40>; - pinctrl-1 = <0x41 0x42>; - pinctrl-2 = <0x43 0x44>; - pinctrl-3 = <0x43 0x45>; - rockchip,system-power-controller; - wakeup-source; - #clock-cells = <0x01>; - clock-output-names = "rk808-clkout1\0rk808-clkout2"; - pmic-reset-func = <0x00>; - not-save-power-en = <0x01>; - vcc1-supply = <0x46>; - vcc2-supply = <0x46>; - vcc3-supply = <0x46>; - vcc4-supply = <0x46>; - vcc5-supply = <0x46>; - vcc6-supply = <0x46>; - vcc7-supply = <0x46>; - vcc8-supply = <0x46>; - vcc9-supply = <0x46>; - phandle = <0x152>; - - pwrkey { - status = "okay"; - }; - - pinctrl_rk8xx { - gpio-controller; - #gpio-cells = <0x02>; - - rk817_slppin_null { - pins = "gpio_slp"; - function = "pin_fun0"; - }; - - rk817_slppin_slp { - pins = "gpio_slp"; - function = "pin_fun1"; - phandle = <0x42>; - }; - - rk817_slppin_pwrdn { - pins = "gpio_slp"; - function = "pin_fun2"; - phandle = <0x44>; - }; - - rk817_slppin_rst { - pins = "gpio_slp"; - function = "pin_fun3"; - phandle = <0x45>; - }; - }; - - regulators { - - DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x7a120>; - regulator-max-microvolt = <0x149970>; - regulator-init-microvolt = <0xdbba0>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_logic"; - phandle = <0x75>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x7a120>; - regulator-max-microvolt = <0x149970>; - regulator-init-microvolt = <0xdbba0>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_gpu"; - phandle = <0x77>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_ddr"; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x7a120>; - regulator-max-microvolt = <0x149970>; - regulator-init-microvolt = <0xdbba0>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_npu"; - phandle = <0x71>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - LDO_REG1 { - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xdbba0>; - regulator-max-microvolt = <0xdbba0>; - regulator-name = "vdda0v9_image"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xdbba0>; - regulator-max-microvolt = <0xdbba0>; - regulator-name = "vdda_0v9"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xdbba0>; - regulator-max-microvolt = <0xdbba0>; - regulator-name = "vdda0v9_pmu"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xdbba0>; - }; - }; - - LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vccio_acodec"; - phandle = <0x30>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vccio_sd"; - phandle = <0x31>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - LDO_REG6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc3v3_pmu"; - phandle = <0x2f>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcca_1v8"; - phandle = <0x129>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - LDO_REG8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcca1v8_pmu"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG9 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcca1v8_image"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcc_1v8"; - phandle = <0x32>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - SWITCH_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc_3v3"; - phandle = <0x33>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - SWITCH_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc3v3_sd"; - phandle = <0xcf>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - - codec { - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk809-codec\0rockchip,rk817-codec"; - clocks = <0x23 0x1a3>; - clock-names = "mclk"; - assigned-clocks = <0x23 0x1a3 0x23 0x1a6>; - assigned-clock-rates = <0xbb8000>; - assigned-clock-parents = <0x23 0x48 0x23 0x48>; - pinctrl-names = "default\0spk_gpio"; - pinctrl-0 = <0x47>; - pinctrl-1 = <0x48>; - hp-volume = <0x03>; - spk-volume = <0x03>; - mic-in-differential; - board-spk-from-hp; - capture-volume = <0x00>; - io-channels = <0x49 0x07>; - hp-det-adc-value = <0x3e8>; - status = "okay"; - hp-adc-drift-scope = <0x64>; - phandle = <0x14b>; - }; - - rtc { - status = "disabled"; - }; - }; - - fusb302@22 { - compatible = "fcs,fusb302"; - reg = <0x22>; - interrupt-parent = <0x3f>; - fcs,int_n = <0x3f 0x11 0x08>; - fusb340-switch-gpios = <0x4a 0x12 0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0x4b>; - vbus-supply = <0x4c>; - status = "okay"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - - endpoint@0 { - remote-endpoint = <0x4d>; - phandle = <0x2a>; - }; - }; - }; - - connector { - compatible = "usb-c-connector"; - label = "USB-C"; - data-role = "dual"; - power-role = "dual"; - try-power-role = "sink"; - op-sink-microwatt = <0xf4240>; - sink-pdos = <0x40190fa>; - source-pdos = <0x4019096>; - }; - }; - }; - - serial@fdd50000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfdd50000 0x00 0x100>; - interrupts = <0x00 0x74 0x04>; - clocks = <0x3a 0x0b 0x3a 0x2c>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x00 0x4e 0x01>; - pinctrl-names = "default"; - pinctrl-0 = <0x4f>; - status = "disabled"; - }; - - pwm@fdd70000 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfdd70000 0x00 0x10>; - interrupts = <0x00 0x52 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x50>; - clocks = <0x3a 0x0d 0x3a 0x30>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fdd70010 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfdd70010 0x00 0x10>; - interrupts = <0x00 0x52 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x51>; - clocks = <0x3a 0x0d 0x3a 0x30>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fdd70020 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfdd70020 0x00 0x10>; - interrupts = <0x00 0x52 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x52>; - clocks = <0x3a 0x0d 0x3a 0x30>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fdd70030 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfdd70030 0x00 0x10>; - interrupts = <0x00 0x52 0x04 0x00 0x56 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x53>; - clocks = <0x3a 0x0d 0x3a 0x30>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - power-management@fdd90000 { - compatible = "rockchip,rk3568-pmu\0syscon\0simple-mfd"; - reg = <0x00 0xfdd90000 0x00 0x1000>; - - power-controller { - compatible = "rockchip,rk3568-power-controller"; - #power-domain-cells = <0x01>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x25>; - - pd_npu@6 { - reg = <0x06>; - clocks = <0x23 0x27 0x23 0x25 0x23 0x26>; - pm_qos = <0x54>; - }; - - pd_gpu@7 { - reg = <0x07>; - clocks = <0x23 0x19 0x23 0x1a>; - pm_qos = <0x55>; - }; - - pd_vi@8 { - reg = <0x08>; - clocks = <0x23 0xcc 0x23 0xcd>; - pm_qos = <0x56 0x57 0x58>; - }; - - pd_vo@9 { - reg = <0x09>; - clocks = <0x23 0xda 0x23 0xdb 0x23 0xdc>; - pm_qos = <0x59 0x5a 0x5b>; - }; - - pd_rga@10 { - reg = <0x0a>; - clocks = <0x23 0xf1 0x23 0xf2>; - pm_qos = <0x5c 0x5d 0x5e 0x5f 0x60 0x61>; - }; - - pd_vpu@11 { - reg = <0x0b>; - clocks = <0x23 0xed>; - pm_qos = <0x62>; - }; - - pd_rkvdec@13 { - clocks = <0x23 0x107>; - reg = <0x0d>; - pm_qos = <0x63>; - }; - - pd_rkvenc@14 { - reg = <0x0e>; - clocks = <0x23 0x102>; - pm_qos = <0x64 0x65 0x66>; - }; - - pd_pipe@15 { - reg = <0x0f>; - clocks = <0x23 0x7f>; - pm_qos = <0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e>; - }; - }; - }; - - pvtm@fde00000 { - compatible = "rockchip,rk3568-core-pvtm"; - reg = <0x00 0xfde00000 0x00 0x100>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - pvtm@0 { - reg = <0x00>; - clocks = <0x23 0x13 0x23 0x1c2>; - clock-names = "clk\0pclk"; - resets = <0x23 0x1a 0x23 0x19>; - reset-names = "rts\0rst-p"; - thermal-zone = "soc-thermal"; - }; - }; - - npu@fde40000 { - compatible = "rockchip,rk3568-rknpu\0rockchip,rknpu"; - reg = <0x00 0xfde40000 0x00 0x10000>; - interrupts = <0x00 0x97 0x04>; - clocks = <0x02 0x02 0x23 0x23 0x23 0x28 0x23 0x29>; - clock-names = "scmi_clk\0clk\0aclk\0hclk"; - assigned-clocks = <0x23 0x23>; - assigned-clock-rates = <0x23c34600>; - resets = <0x23 0x2b 0x23 0x2c>; - reset-names = "srst_a\0srst_h"; - power-domains = <0x25 0x06>; - operating-points-v2 = <0x6f>; - iommus = <0x70>; - status = "okay"; - rknpu-supply = <0x71>; - }; - - npu-opp-table { - compatible = "operating-points-v2"; - mbist-vmin = <0xc96a8 0xdbba0 0xe7ef0>; - nvmem-cells = <0x72 0x07 0x08 0x73 0x0a 0x0b>; - nvmem-cell-names = "leakage\0pvtm\0mbist-vmin\0opp-info\0specification_serial_number\0remark_spec_serial_number"; - rockchip,supported-hw; - rockchip,max-volt = <0xf4240>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-adjust-volt = <0x00 0x3e8 0xc350>; - rockchip,pvtm-voltage-sel = <0x00 0x14820 0x00 0x14821 0x153d8 0x01 0x153d9 0x16378 0x02 0x16379 0x186a0 0x03>; - rockchip,pvtm-ch = <0x00 0x05>; - phandle = <0x6f>; - - opp-200000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0xbebc200>; - opp-microvolt = <0xcf850 0xcf850 0xf4240>; - }; - - opp-300000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x11b3dc40>; - opp-microvolt = <0xcf850 0xcf850 0xf4240>; - }; - - opp-400000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0xcf850 0xcf850 0xf4240>; - }; - - opp-600000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xcf850 0xcf850 0xf4240>; - }; - - opp-700000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x29b92700>; - opp-microvolt = <0xd59f8 0xd59f8 0xf4240>; - opp-microvolt-L0 = <0xd59f8 0xd59f8 0xf4240>; - opp-microvolt-L1 = <0xcf850 0xcf850 0xf4240>; - opp-microvolt-L2 = <0xcf850 0xcf850 0xf4240>; - opp-microvolt-L3 = <0xcf850 0xcf850 0xf4240>; - }; - - opp-800000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x2faf0800>; - opp-microvolt = <0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L0 = <0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L1 = <0xdbba0 0xdbba0 0xf4240>; - opp-microvolt-L2 = <0xd59f8 0xd59f8 0xf4240>; - opp-microvolt-L3 = <0xd59f8 0xd59f8 0xf4240>; - }; - - opp-900000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x35a4e900>; - opp-microvolt = <0xee098 0xee098 0xf4240>; - opp-microvolt-L0 = <0xee098 0xee098 0xf4240>; - opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L2 = <0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L3 = <0xdbba0 0xdbba0 0xf4240>; - }; - - opp-1000000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x3b9aca00>; - opp-microvolt = <0xf4240 0xf4240 0xf4240>; - opp-microvolt-L0 = <0xf4240 0xf4240 0xf4240>; - opp-microvolt-L1 = <0xee098 0xee098 0xf4240>; - opp-microvolt-L2 = <0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L3 = <0xe1d48 0xe1d48 0xf4240>; - status = "disabled"; - }; - - opp-j-600000000 { - opp-supported-hw = <0x04 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xdbba0 0xdbba0 0xf4240>; - }; - - opp-m-900000000 { - opp-supported-hw = <0x02 0xffff>; - opp-hz = <0x00 0x35a4e900>; - opp-microvolt = <0xe1d48 0xe1d48 0xf4240>; - }; - }; - - bus-npu { - compatible = "rockchip,rk3568-bus"; - rockchip,busfreq-policy = "clkfreq"; - clocks = <0x02 0x02>; - clock-names = "bus"; - operating-points-v2 = <0x74>; - status = "okay"; - bus-supply = <0x75>; - pvtm-supply = <0x05>; - }; - - bus-npu-opp-table { - compatible = "operating-points-v2"; - opp-shared; - nvmem-cells = <0x07>; - nvmem-cell-names = "pvtm"; - rockchip,pvtm-voltage-sel = <0x00 0x14820 0x00 0x14821 0x16378 0x01 0x16379 0x186a0 0x02>; - rockchip,pvtm-ch = <0x00 0x05>; - phandle = <0x74>; - - opp-700000000 { - opp-hz = <0x00 0x29b92700>; - opp-microvolt = <0xdbba0>; - opp-microvolt-L0 = <0xdbba0>; - opp-microvolt-L1 = <0xd59f8>; - opp-microvolt-L2 = <0xd59f8>; - }; - - opp-900000000 { - opp-hz = <0x00 0x35a4e900>; - opp-microvolt = <0xdbba0>; - }; - - opp-1000000000 { - opp-hz = <0x00 0x3b9aca00>; - opp-microvolt = <0xe7ef0>; - opp-microvolt-L0 = <0xe7ef0>; - opp-microvolt-L1 = <0xe1d48>; - opp-microvolt-L2 = <0xdbba0>; - }; - }; - - iommu@fde4b000 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfde4b000 0x00 0x40>; - interrupts = <0x00 0x97 0x04>; - interrupt-names = "rknpu_mmu"; - clocks = <0x23 0x28 0x23 0x29>; - clock-names = "aclk\0iface"; - power-domains = <0x25 0x06>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0x70>; - }; - - gpu@fde60000 { - compatible = "arm,mali-bifrost"; - reg = <0x00 0xfde60000 0x00 0x4000>; - interrupts = <0x00 0x27 0x04 0x00 0x29 0x04 0x00 0x28 0x04>; - interrupt-names = "GPU\0MMU\0JOB"; - upthreshold = <0x28>; - downdifferential = <0x0a>; - clocks = <0x02 0x01 0x23 0x1b>; - clock-names = "clk_mali\0clk_gpu"; - power-domains = <0x25 0x07>; - #cooling-cells = <0x02>; - operating-points-v2 = <0x76>; - status = "okay"; - mali-supply = <0x77>; - phandle = <0x21>; - - power-model { - compatible = "simple-power-model"; - leakage-range = <0x05 0x0f>; - ls = <0xffffa23e 0x5927 0x00>; - static-coefficient = <0x186a0>; - dynamic-coefficient = <0x3b9>; - ts = <0xfffe56a6 0xf87a 0xfffffab5 0x14>; - thermal-zone = "gpu-thermal"; - }; - }; - - opp-table2 { - compatible = "operating-points-v2"; - mbist-vmin = <0xc96a8 0xdbba0 0xe7ef0>; - nvmem-cells = <0x78 0x07 0x08 0x79 0x0a 0x0b>; - nvmem-cell-names = "leakage\0pvtm\0mbist-vmin\0opp-info\0specification_serial_number\0remark_spec_serial_number"; - rockchip,supported-hw; - rockchip,max-volt = <0xf4240>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-adjust-volt = <0x00 0x320 0xc350>; - rockchip,pvtm-voltage-sel = <0x00 0x14820 0x00 0x14821 0x153d8 0x01 0x153d9 0x16378 0x02 0x16379 0x186a0 0x03>; - rockchip,pvtm-ch = <0x00 0x05>; - phandle = <0x76>; - - opp-200000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0xbebc200>; - opp-microvolt = <0xcf850 0xcf850 0xf4240>; - }; - - opp-300000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x11e1a300>; - opp-microvolt = <0xcf850 0xcf850 0xf4240>; - }; - - opp-400000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0xcf850 0xcf850 0xf4240>; - }; - - opp-600000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xdbba0 0xdbba0 0xf4240>; - opp-microvolt-L0 = <0xdbba0 0xdbba0 0xf4240>; - opp-microvolt-L1 = <0xd59f8 0xd59f8 0xf4240>; - opp-microvolt-L2 = <0xcf850 0xcf850 0xf4240>; - opp-microvolt-L3 = <0xcf850 0xcf850 0xf4240>; - }; - - opp-700000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x29b92700>; - opp-microvolt = <0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L0 = <0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L1 = <0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240>; - opp-microvolt-L3 = <0xd59f8 0xd59f8 0xf4240>; - }; - - opp-800000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x2faf0800>; - opp-microvolt = <0xf4240 0xf4240 0xf4240>; - opp-microvolt-L0 = <0xf4240 0xf4240 0xf4240>; - opp-microvolt-L1 = <0xee098 0xee098 0xf4240>; - opp-microvolt-L2 = <0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L3 = <0xe1d48 0xe1d48 0xf4240>; - }; - - opp-j-600000000 { - opp-supported-hw = <0x04 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xdbba0 0xdbba0 0xf4240>; - }; - - opp-m-800000000 { - opp-supported-hw = <0x02 0xffff>; - opp-hz = <0x00 0x2faf0800>; - opp-microvolt = <0xe7ef0 0xe7ef0 0xf4240>; - }; - }; - - pvtm@fde80000 { - compatible = "rockchip,rk3568-gpu-pvtm"; - reg = <0x00 0xfde80000 0x00 0x100>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - pvtm@1 { - reg = <0x01>; - clocks = <0x23 0x1e 0x23 0x1d>; - clock-names = "clk\0pclk"; - resets = <0x23 0x24 0x23 0x23>; - reset-names = "rts\0rst-p"; - thermal-zone = "gpu-thermal"; - }; - }; - - pvtm@fde90000 { - compatible = "rockchip,rk3568-npu-pvtm"; - reg = <0x00 0xfde90000 0x00 0x100>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - pvtm@2 { - reg = <0x02>; - clocks = <0x23 0x2b 0x23 0x2a 0x23 0x25>; - clock-names = "clk\0pclk\0hclk"; - resets = <0x23 0x2e 0x23 0x2d>; - reset-names = "rts\0rst-p"; - thermal-zone = "soc-thermal"; - }; - }; - - vdpu@fdea0400 { - compatible = "rockchip,vpu-decoder-v2"; - reg = <0x00 0xfdea0400 0x00 0x400>; - interrupts = <0x00 0x8b 0x04>; - interrupt-names = "irq_dec"; - clocks = <0x23 0xee 0x23 0xef>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - resets = <0x23 0x11a 0x23 0x11b>; - reset-names = "video_a\0video_h"; - iommus = <0x7a>; - power-domains = <0x25 0x0b>; - rockchip,srv = <0x7b>; - rockchip,taskqueue-node = <0x00>; - rockchip,resetgroup-node = <0x00>; - status = "okay"; - }; - - iommu@fdea0800 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdea0800 0x00 0x40>; - interrupts = <0x00 0x8a 0x04>; - interrupt-names = "vdpu_mmu"; - clock-names = "aclk\0iface"; - clocks = <0x23 0xee 0x23 0xef>; - power-domains = <0x25 0x0b>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0x7a>; - }; - - rk_rga@fdeb0000 { - compatible = "rockchip,rga2"; - reg = <0x00 0xfdeb0000 0x00 0x1000>; - interrupts = <0x00 0x5a 0x04>; - clocks = <0x23 0xf3 0x23 0xf4 0x23 0xf5>; - clock-names = "aclk_rga\0hclk_rga\0clk_rga"; - power-domains = <0x25 0x0a>; - status = "okay"; - }; - - ebc@fdec0000 { - compatible = "rockchip,rk3568-ebc-tcon"; - reg = <0x00 0xfdec0000 0x00 0x5000>; - interrupts = <0x00 0x11 0x04>; - clocks = <0x23 0xf9 0x23 0xfa>; - clock-names = "hclk\0dclk"; - power-domains = <0x25 0x0a>; - rockchip,grf = <0x3b>; - pinctrl-names = "default"; - pinctrl-0 = <0x7c>; - status = "disabled"; - }; - - jpegd@fded0000 { - compatible = "rockchip,rkv-jpeg-decoder-v1"; - reg = <0x00 0xfded0000 0x00 0x400>; - interrupts = <0x00 0x3e 0x04>; - clocks = <0x23 0xfb 0x23 0xfc>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - rockchip,disable-auto-freq; - resets = <0x23 0x12c 0x23 0x12d>; - reset-names = "video_a\0video_h"; - iommus = <0x7d>; - rockchip,srv = <0x7b>; - rockchip,taskqueue-node = <0x01>; - rockchip,resetgroup-node = <0x01>; - power-domains = <0x25 0x0a>; - status = "okay"; - }; - - iommu@fded0480 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfded0480 0x00 0x40>; - interrupts = <0x00 0x3d 0x04>; - interrupt-names = "jpegd_mmu"; - clock-names = "aclk\0iface"; - clocks = <0x23 0xfb 0x23 0xfc>; - power-domains = <0x25 0x0a>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0x7d>; - }; - - vepu@fdee0000 { - compatible = "rockchip,vpu-encoder-v2"; - reg = <0x00 0xfdee0000 0x00 0x400>; - interrupts = <0x00 0x40 0x04>; - clocks = <0x23 0xfd 0x23 0xfe>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - rockchip,disable-auto-freq; - resets = <0x23 0x12e 0x23 0x12f>; - reset-names = "video_a\0video_h"; - iommus = <0x7e>; - rockchip,srv = <0x7b>; - rockchip,taskqueue-node = <0x02>; - rockchip,resetgroup-node = <0x02>; - power-domains = <0x25 0x0a>; - status = "okay"; - }; - - iommu@fdee0800 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdee0800 0x00 0x40>; - interrupts = <0x00 0x3f 0x04>; - interrupt-names = "vepu_mmu"; - clock-names = "aclk\0iface"; - clocks = <0x23 0xfd 0x23 0xfe>; - power-domains = <0x25 0x0a>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0x7e>; - }; - - iep@fdef0000 { - compatible = "rockchip,iep-v2"; - reg = <0x00 0xfdef0000 0x00 0x500>; - interrupts = <0x00 0x38 0x04>; - clocks = <0x23 0xf6 0x23 0xf7 0x23 0xf8>; - clock-names = "aclk\0hclk\0sclk"; - resets = <0x23 0x127 0x23 0x128 0x23 0x129>; - reset-names = "rst_a\0rst_h\0rst_s"; - power-domains = <0x25 0x0a>; - rockchip,srv = <0x7b>; - rockchip,taskqueue-node = <0x05>; - rockchip,resetgroup-node = <0x05>; - iommus = <0x7f>; - status = "okay"; - }; - - iommu@fdef0800 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdef0800 0x00 0x100>; - interrupts = <0x00 0x38 0x04>; - interrupt-names = "iep_mmu"; - clocks = <0x23 0xf6 0x23 0xf7>; - clock-names = "aclk\0iface"; - #iommu-cells = <0x00>; - power-domains = <0x25 0x0a>; - status = "okay"; - phandle = <0x7f>; - }; - - eink@fdf00000 { - compatible = "rockchip,rk3568-eink-tcon"; - reg = <0x00 0xfdf00000 0x00 0x74>; - interrupts = <0x00 0xb2 0x04>; - clocks = <0x23 0xff 0x23 0x100>; - clock-names = "pclk\0hclk"; - status = "disabled"; - }; - - rkvenc@fdf40000 { - compatible = "rockchip,rkv-encoder-v1"; - reg = <0x00 0xfdf40000 0x00 0x400>; - interrupts = <0x00 0x8c 0x04>; - interrupt-names = "irq_enc"; - clocks = <0x23 0x103 0x23 0x104 0x23 0x105>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - rockchip,normal-rates = <0x11b3dc40 0x00 0x11b3dc40>; - resets = <0x23 0x133 0x23 0x134 0x23 0x135>; - reset-names = "video_a\0video_h\0video_core"; - assigned-clocks = <0x23 0x103 0x23 0x105>; - assigned-clock-rates = <0x11b3dc40 0x11b3dc40>; - iommus = <0x80>; - node-name = "rkvenc"; - rockchip,srv = <0x7b>; - rockchip,taskqueue-node = <0x03>; - rockchip,resetgroup-node = <0x03>; - power-domains = <0x25 0x0e>; - operating-points-v2 = <0x81>; - status = "okay"; - venc-supply = <0x75>; - }; - - rkvenc-opp-table { - compatible = "operating-points-v2"; - nvmem-cells = <0x07>; - nvmem-cell-names = "pvtm"; - rockchip,pvtm-voltage-sel = <0x00 0x14820 0x00 0x14821 0x16378 0x01 0x16379 0x186a0 0x02>; - rockchip,pvtm-ch = <0x00 0x05>; - phandle = <0x81>; - - opp-297000000 { - opp-hz = <0x00 0x11b3dc40>; - opp-microvolt = <0xdbba0>; - opp-microvolt-L0 = <0xdbba0>; - opp-microvolt-L1 = <0xd59f8>; - opp-microvolt-L2 = <0xd59f8>; - }; - - opp-400000000 { - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0xe7ef0>; - opp-microvolt-L0 = <0xe7ef0>; - opp-microvolt-L1 = <0xe1d48>; - opp-microvolt-L2 = <0xdbba0>; - }; - }; - - iommu@fdf40f00 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdf40f00 0x00 0x40 0x00 0xfdf40f40 0x00 0x40>; - interrupts = <0x00 0x8d 0x04 0x00 0x8e 0x04>; - interrupt-names = "rkvenc_mmu0\0rkvenc_mmu1"; - clocks = <0x23 0x103 0x23 0x104>; - clock-names = "aclk\0iface"; - rockchip,disable-mmu-reset; - rockchip,enable-cmd-retry; - #iommu-cells = <0x00>; - power-domains = <0x25 0x0e>; - status = "okay"; - phandle = <0x80>; - }; - - rkvdec@fdf80200 { - compatible = "rockchip,rkv-decoder-rk3568\0rockchip,rkv-decoder-v2"; - reg = <0x00 0xfdf80200 0x00 0x400 0x00 0xfdf80100 0x00 0x100>; - reg-names = "regs\0link"; - interrupts = <0x00 0x5b 0x04>; - interrupt-names = "irq_dec"; - clocks = <0x23 0x108 0x23 0x109 0x23 0x10a 0x23 0x10b 0x23 0x10c>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_cabac\0clk_core\0clk_hevc_cabac"; - rockchip,normal-rates = <0x11b3dc40 0x00 0x11b3dc40 0x11b3dc40 0x23c34600>; - rockchip,advanced-rates = <0x179a7b00 0x00 0x179a7b00 0x179a7b00 0x23c34600>; - rockchip,default-max-load = <0x1fe000>; - resets = <0x23 0x142 0x23 0x143 0x23 0x144 0x23 0x145 0x23 0x146>; - assigned-clocks = <0x23 0x108 0x23 0x10a 0x23 0x10b 0x23 0x10c>; - assigned-clock-rates = <0x11b3dc40 0x11b3dc40 0x11b3dc40 0x11b3dc40>; - reset-names = "video_a\0video_h\0video_cabac\0video_core\0video_hevc_cabac"; - power-domains = <0x25 0x0d>; - operating-points-v2 = <0x82>; - vdec-supply = <0x75>; - iommus = <0x83>; - rockchip,srv = <0x7b>; - rockchip,taskqueue-node = <0x04>; - rockchip,resetgroup-node = <0x04>; - rockchip,sram = <0x84>; - rockchip,rcb-iova = <0x10000000 0x10000>; - rockchip,rcb-min-width = <0x200>; - rockchip,task-capacity = <0x10>; - status = "okay"; - }; - - rkvdec-opp-table { - compatible = "operating-points-v2"; - nvmem-cells = <0x85 0x07>; - nvmem-cell-names = "leakage\0pvtm"; - rockchip,leakage-voltage-sel = <0x01 0x50 0x00 0x51 0xfe 0x01>; - rockchip,pvtm-voltage-sel = <0x00 0x14820 0x00 0x14821 0x186a0 0x01>; - rockchip,pvtm-ch = <0x00 0x05>; - phandle = <0x82>; - - opp-297000000 { - opp-hz = <0x00 0x11b3dc40>; - opp-microvolt = <0xdbba0>; - opp-microvolt-L0 = <0xdbba0>; - opp-microvolt-L1 = <0xd59f8>; - }; - - opp-400000000 { - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0xdbba0>; - }; - }; - - iommu@fdf80800 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdf80800 0x00 0x40 0x00 0xfdf80840 0x00 0x40>; - interrupts = <0x00 0x5c 0x04>; - interrupt-names = "rkvdec_mmu"; - clocks = <0x23 0x108 0x23 0x109>; - clock-names = "aclk\0iface"; - power-domains = <0x25 0x0d>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0x83>; - }; - - mipi-csi2-hw@fdfb0000 { - compatible = "rockchip,rk3568-mipi-csi2-hw"; - reg = <0x00 0xfdfb0000 0x00 0x10000>; - reg-names = "csihost_regs"; - interrupts = <0x00 0x08 0x04 0x00 0x09 0x04>; - interrupt-names = "csi-intr1\0csi-intr2"; - clocks = <0x23 0xd5>; - clock-names = "pclk_csi2host"; - resets = <0x23 0xff>; - reset-names = "srst_csihost_p"; - status = "okay"; - phandle = <0x1e>; - }; - - rkcif@fdfe0000 { - compatible = "rockchip,rk3568-cif"; - reg = <0x00 0xfdfe0000 0x00 0x8000>; - reg-names = "cif_regs"; - interrupts = <0x00 0x92 0x04>; - interrupt-names = "cif-intr"; - clocks = <0x23 0xce 0x23 0xcf 0x23 0xd0 0x23 0xd1>; - clock-names = "aclk_cif\0hclk_cif\0dclk_cif\0iclk_cif_g"; - resets = <0x23 0xf7 0x23 0xf8 0x23 0xf9 0x23 0xfb 0x23 0xfa>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_d\0rst_cif_p\0rst_cif_i"; - assigned-clocks = <0x23 0xd0>; - assigned-clock-rates = <0x11e1a300>; - power-domains = <0x25 0x08>; - rockchip,grf = <0x3b>; - iommus = <0x86>; - status = "disabled"; - phandle = <0x87>; - }; - - iommu@fdfe0800 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdfe0800 0x00 0x100>; - interrupts = <0x00 0x92 0x04>; - interrupt-names = "cif_mmu"; - clocks = <0x23 0xce 0x23 0xcf>; - clock-names = "aclk\0iface"; - power-domains = <0x25 0x08>; - rockchip,disable-mmu-reset; - #iommu-cells = <0x00>; - status = "disabled"; - phandle = <0x86>; - }; - - rkcif_dvp { - compatible = "rockchip,rkcif-dvp"; - rockchip,hw = <0x87>; - status = "disabled"; - phandle = <0x88>; - }; - - rkcif_dvp_sditf { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x88>; - status = "disabled"; - }; - - rkcif_mipi_lvds { - compatible = "rockchip,rkcif-mipi-lvds"; - rockchip,hw = <0x87>; - status = "disabled"; - phandle = <0x89>; - }; - - rkcif_mipi_lvds_sditf { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x89>; - status = "disabled"; - }; - - rkisp@fdff0000 { - compatible = "rockchip,rk3568-rkisp"; - reg = <0x00 0xfdff0000 0x00 0x10000>; - interrupts = <0x00 0x39 0x04 0x00 0x3a 0x04 0x00 0x3c 0x04>; - interrupt-names = "mipi_irq\0mi_irq\0isp_irq"; - clocks = <0x23 0xd2 0x23 0xd3 0x23 0xd4>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp"; - resets = <0x23 0xfd 0x23 0xfc>; - reset-names = "isp\0isp-h"; - rockchip,grf = <0x3b>; - power-domains = <0x25 0x08>; - iommus = <0x8a>; - rockchip,iq-feature = <0x1bfb 0xfffe67ff>; - status = "okay"; - phandle = <0x8b>; - }; - - iommu@fdff1a00 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdff1a00 0x00 0x100>; - interrupts = <0x00 0x3b 0x04>; - interrupt-names = "isp_mmu"; - clocks = <0x23 0xd2 0x23 0xd3>; - clock-names = "aclk\0iface"; - power-domains = <0x25 0x08>; - #iommu-cells = <0x00>; - rockchip,disable-mmu-reset; - status = "okay"; - phandle = <0x8a>; - }; - - rkisp-vir0 { - compatible = "rockchip,rkisp-vir"; - rockchip,hw = <0x8b>; - status = "okay"; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x8c>; - phandle = <0x134>; - }; - }; - }; - - rkisp-vir1 { - compatible = "rockchip,rkisp-vir"; - rockchip,hw = <0x8b>; - status = "disabled"; - }; - - uio@fe010000 { - compatible = "rockchip,uio-gmac"; - reg = <0x00 0xfe010000 0x00 0x10000>; - rockchip,ethernet = <0x8d>; - status = "disabled"; - }; - - ethernet@fe010000 { - local-mac-address = [5e 4f fd 70 05 c6]; - compatible = "rockchip,rk3568-gmac\0snps,dwmac-4.20a"; - reg = <0x00 0xfe010000 0x00 0x10000>; - interrupts = <0x00 0x20 0x04 0x00 0x1d 0x04>; - interrupt-names = "macirq\0eth_wake_irq"; - rockchip,grf = <0x3b>; - clocks = <0x23 0x186 0x23 0x189 0x23 0x189 0x23 0xc7 0x23 0xc3 0x23 0xc4 0x23 0x189 0x23 0xc8 0x23 0xac 0x23 0xab>; - clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed\0ptp_ref\0pclk_xpcs\0clk_xpcs_eee"; - resets = <0x23 0xec>; - reset-names = "stmmaceth"; - snps,mixed-burst; - snps,tso; - snps,axi-config = <0x8e>; - snps,mtl-rx-config = <0x8f>; - snps,mtl-tx-config = <0x90>; - status = "okay"; - phy-mode = "rgmii"; - clock_in_out = "input"; - snps,reset-gpio = <0x91 0x19 0x01>; - snps,reset-active-low; - snps,reset-delays-us = <0x00 0x4e20 0x186a0>; - assigned-clocks = <0x23 0x189 0x23 0x186>; - assigned-clock-parents = <0x23 0x187 0x92>; - pinctrl-names = "default"; - pinctrl-0 = <0x93 0x94 0x95 0x96 0x97 0x98>; - tx_delay = <0x3e>; - rx_delay = <0x32>; - phy-handle = <0x99>; - phandle = <0x8d>; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <0x01>; - #size-cells = <0x00>; - - phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x00>; - led_status_value = <0x6940>; - phandle = <0x99>; - }; - }; - - stmmac-axi-config { - snps,wr_osr_lmt = <0x04>; - snps,rd_osr_lmt = <0x08>; - snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; - phandle = <0x8e>; - }; - - rx-queues-config { - snps,rx-queues-to-use = <0x01>; - phandle = <0x8f>; - - queue0 { - }; - }; - - tx-queues-config { - snps,tx-queues-to-use = <0x01>; - phandle = <0x90>; - - queue0 { - }; - }; - }; - - vop@fe040000 { - compatible = "rockchip,rk3568-vop"; - reg = <0x00 0xfe040000 0x00 0x3000 0x00 0xfe044000 0x00 0x1000>; - reg-names = "regs\0gamma_lut"; - rockchip,grf = <0x3b>; - interrupts = <0x00 0x94 0x04>; - clocks = <0x23 0xdd 0x23 0xde 0x23 0xdf 0x23 0xe0 0x23 0xe1>; - clock-names = "aclk_vop\0hclk_vop\0dclk_vp0\0dclk_vp1\0dclk_vp2"; - iommus = <0x9a>; - power-domains = <0x25 0x09>; - status = "okay"; - assigned-clocks = <0x23 0xdf 0x23 0xe0>; - assigned-clock-parents = <0x3a 0x02 0x23 0x05>; - disable-win-move; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x15>; - - port@0 { - rockchip,primary-plane = <0x04>; - rockchip,plane-mask = <0x15>; - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x9b>; - phandle = <0x17>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0x9c>; - phandle = <0x18>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0x9d>; - phandle = <0x19>; - }; - - endpoint@3 { - reg = <0x03>; - remote-endpoint = <0x9e>; - phandle = <0x1a>; - }; - }; - - port@1 { - rockchip,primary-plane = <0x05>; - rockchip,plane-mask = <0x22>; - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x01>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x9f>; - phandle = <0xa8>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xa0>; - phandle = <0xa9>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xa1>; - phandle = <0xaf>; - }; - - endpoint@3 { - reg = <0x03>; - remote-endpoint = <0xa2>; - phandle = <0xad>; - }; - - endpoint@4 { - reg = <0x04>; - remote-endpoint = <0xa3>; - phandle = <0x1b>; - }; - - endpoint@5 { - reg = <0x05>; - remote-endpoint = <0xa4>; - phandle = <0x37>; - }; - }; - - port@2 { - rockchip,primary-plane = <0x03>; - rockchip,plane-mask = <0x08>; - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x02>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0xa5>; - phandle = <0x35>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xa6>; - phandle = <0x1c>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xa7>; - phandle = <0x38>; - }; - }; - }; - }; - - iommu@fe043e00 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfe043e00 0x00 0x100 0x00 0xfe043f00 0x00 0x100>; - interrupts = <0x00 0x94 0x04>; - interrupt-names = "vop_mmu"; - clocks = <0x23 0xdd 0x23 0xde>; - clock-names = "aclk\0iface"; - #iommu-cells = <0x00>; - rockchip,disable-device-link-resume; - status = "okay"; - phandle = <0x9a>; - }; - - dsi@fe060000 { - compatible = "rockchip,rk3568-mipi-dsi"; - reg = <0x00 0xfe060000 0x00 0x10000>; - interrupts = <0x00 0x44 0x04>; - clocks = <0x23 0xe8 0x23 0xda>; - clock-names = "pclk\0hclk"; - resets = <0x23 0x110>; - reset-names = "apb"; - phys = <0x34>; - phy-names = "dphy"; - power-domains = <0x25 0x09>; - rockchip,grf = <0x3b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x17>; - status = "disabled"; - phandle = <0x9b>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xa8>; - status = "disabled"; - phandle = <0x9f>; - }; - }; - }; - }; - - dsi@fe070000 { - compatible = "rockchip,rk3568-mipi-dsi"; - reg = <0x00 0xfe070000 0x00 0x10000>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x23 0xe9 0x23 0xda>; - clock-names = "pclk\0hclk"; - resets = <0x23 0x111>; - reset-names = "apb"; - phys = <0x36>; - phy-names = "dphy"; - power-domains = <0x25 0x09>; - rockchip,grf = <0x3b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x18>; - status = "disabled"; - phandle = <0x9c>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xa9>; - status = "disabled"; - phandle = <0xa0>; - }; - }; - }; - }; - - hdmi@fe0a0000 { - compatible = "rockchip,rk3568-dw-hdmi"; - reg = <0x00 0xfe0a0000 0x00 0x20000>; - interrupts = <0x00 0x2d 0x04>; - clocks = <0x23 0xe6 0x23 0xe7 0x23 0x193 0x3a 0x02 0x23 0xde>; - clock-names = "iahb\0isfr\0cec\0ref\0hclk"; - power-domains = <0x25 0x09>; - reg-io-width = <0x04>; - rockchip,grf = <0x3b>; - #sound-dai-cells = <0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0xaa 0xab 0xac>; - status = "okay"; - phandle = <0x147>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x1a>; - status = "okay"; - phandle = <0x9e>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xad>; - status = "disabled"; - phandle = <0xa2>; - }; - }; - }; - }; - - edp@fe0c0000 { - compatible = "rockchip,rk3568-edp"; - reg = <0x00 0xfe0c0000 0x00 0x10000>; - interrupts = <0x00 0x12 0x04>; - clocks = <0x3a 0x29 0x23 0xea 0x23 0xeb 0x23 0xda>; - clock-names = "dp\0pclk\0spdif\0hclk"; - resets = <0x23 0x113 0x23 0x112>; - reset-names = "dp\0apb"; - phys = <0xae>; - phy-names = "dp"; - power-domains = <0x25 0x09>; - status = "disabled"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x19>; - status = "disabled"; - phandle = <0x9d>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xaf>; - status = "disabled"; - phandle = <0xa1>; - }; - }; - }; - }; - - nocp-cpu@fe102000 { - compatible = "rockchip,rk3568-nocp"; - reg = <0x00 0xfe102000 0x00 0x400>; - phandle = <0xb5>; - }; - - nocp-gpu-vpu-rga-venc@fe102400 { - compatible = "rockchip,rk3568-nocp"; - reg = <0x00 0xfe102400 0x00 0x400>; - }; - - nocp-vdec@fe102800 { - compatible = "rockchip,rk3568-nocp"; - reg = <0x00 0xfe102800 0x00 0x400>; - }; - - nocp-vi-usb-peri-pipe@fe102c00 { - compatible = "rockchip,rk3568-nocp"; - reg = <0x00 0xfe102c00 0x00 0x400>; - }; - - nocp-vo@fe103000 { - compatible = "rockchip,rk3568-nocp"; - reg = <0x00 0xfe103000 0x00 0x400>; - }; - - qos@fe128000 { - compatible = "syscon"; - reg = <0x00 0xfe128000 0x00 0x20>; - phandle = <0x55>; - }; - - qos@fe138080 { - compatible = "syscon"; - reg = <0x00 0xfe138080 0x00 0x20>; - phandle = <0x64>; - }; - - qos@fe138100 { - compatible = "syscon"; - reg = <0x00 0xfe138100 0x00 0x20>; - phandle = <0x65>; - }; - - qos@fe138180 { - compatible = "syscon"; - reg = <0x00 0xfe138180 0x00 0x20>; - phandle = <0x66>; - }; - - qos@fe148000 { - compatible = "syscon"; - reg = <0x00 0xfe148000 0x00 0x20>; - phandle = <0x56>; - }; - - qos@fe148080 { - compatible = "syscon"; - reg = <0x00 0xfe148080 0x00 0x20>; - phandle = <0x57>; - }; - - qos@fe148100 { - compatible = "syscon"; - reg = <0x00 0xfe148100 0x00 0x20>; - phandle = <0x58>; - }; - - qos@fe150000 { - compatible = "syscon"; - reg = <0x00 0xfe150000 0x00 0x20>; - phandle = <0x62>; - }; - - qos@fe158000 { - compatible = "syscon"; - reg = <0x00 0xfe158000 0x00 0x20>; - phandle = <0x5c>; - }; - - qos@fe158100 { - compatible = "syscon"; - reg = <0x00 0xfe158100 0x00 0x20>; - phandle = <0x5d>; - }; - - qos@fe158180 { - compatible = "syscon"; - reg = <0x00 0xfe158180 0x00 0x20>; - phandle = <0x5e>; - }; - - qos@fe158200 { - compatible = "syscon"; - reg = <0x00 0xfe158200 0x00 0x20>; - phandle = <0x5f>; - }; - - qos@fe158280 { - compatible = "syscon"; - reg = <0x00 0xfe158280 0x00 0x20>; - phandle = <0x60>; - }; - - qos@fe158300 { - compatible = "syscon"; - reg = <0x00 0xfe158300 0x00 0x20>; - phandle = <0x61>; - }; - - qos@fe180000 { - compatible = "syscon"; - reg = <0x00 0xfe180000 0x00 0x20>; - phandle = <0x54>; - }; - - qos@fe190000 { - compatible = "syscon"; - reg = <0x00 0xfe190000 0x00 0x20>; - phandle = <0x67>; - }; - - qos@fe190080 { - compatible = "syscon"; - reg = <0x00 0xfe190080 0x00 0x20>; - phandle = <0x68>; - }; - - qos@fe190100 { - compatible = "syscon"; - reg = <0x00 0xfe190100 0x00 0x20>; - phandle = <0x69>; - }; - - qos@fe190200 { - compatible = "syscon"; - reg = <0x00 0xfe190200 0x00 0x20>; - phandle = <0x6a>; - }; - - qos@fe190280 { - compatible = "syscon"; - reg = <0x00 0xfe190280 0x00 0x20>; - phandle = <0x6b>; - }; - - qos@fe190300 { - compatible = "syscon"; - reg = <0x00 0xfe190300 0x00 0x20>; - phandle = <0x6c>; - }; - - qos@fe190380 { - compatible = "syscon"; - reg = <0x00 0xfe190380 0x00 0x20>; - phandle = <0x6d>; - }; - - qos@fe190400 { - compatible = "syscon"; - reg = <0x00 0xfe190400 0x00 0x20>; - phandle = <0x6e>; - }; - - qos@fe198000 { - compatible = "syscon"; - reg = <0x00 0xfe198000 0x00 0x20>; - phandle = <0x63>; - }; - - qos@fe1a8000 { - compatible = "syscon"; - reg = <0x00 0xfe1a8000 0x00 0x20>; - phandle = <0x59>; - }; - - qos@fe1a8080 { - compatible = "syscon"; - reg = <0x00 0xfe1a8080 0x00 0x20>; - phandle = <0x5a>; - }; - - qos@fe1a8100 { - compatible = "syscon"; - reg = <0x00 0xfe1a8100 0x00 0x20>; - phandle = <0x5b>; - }; - - dwmmc@fe000000 { - compatible = "rockchip,rk3568-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xfe000000 0x00 0x4000>; - interrupts = <0x00 0x64 0x04>; - max-frequency = <0x8f0d180>; - clocks = <0x23 0xc1 0x23 0xc2 0x23 0x18e 0x23 0x18f>; - clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; - fifo-depth = <0x100>; - resets = <0x23 0xeb>; - reset-names = "reset"; - status = "okay"; - no-sd; - no-mmc; - bus-width = <0x04>; - disable-wp; - cap-sd-highspeed; - cap-sdio-irq; - keep-power-in-suspend; - pinctrl-names = "default"; - pinctrl-0 = <0xb0 0xb1 0xb2>; - sd-uhs-sdr104; - mmc-pwrseq = <0xb3>; - non-removable; - }; - - dfi@fe230000 { - reg = <0x00 0xfe230000 0x00 0x400>; - compatible = "rockchip,rk3568-dfi"; - rockchip,pmugrf = <0x3c>; - status = "okay"; - phandle = <0xb4>; - }; - - dmc { - compatible = "rockchip,rk3568-dmc"; - interrupts = <0x00 0x0a 0x04>; - interrupt-names = "complete"; - devfreq-events = <0xb4 0xb5>; - clocks = <0x02 0x03>; - clock-names = "dmc_clk"; - operating-points-v2 = <0xb6>; - vop-bw-dmc-freq = <0x00 0x11e 0x4f1a0 0x11f 0x1869f 0x80e80>; - vop-frame-bw-dmc-freq = <0x00 0x26c 0x4f1a0 0x26d 0x1869f 0xbe6e0>; - cpu-bw-dmc-freq = <0x00 0x15e 0x4f1a0 0x15f 0x190 0x80e80 0x191 0x1869f 0xbe6e0>; - upthreshold = <0x28>; - downdifferential = <0x14>; - system-status-level = <0x01 0x04 0x08 0x08 0x02 0x01 0x10 0x04 0x10000 0x04 0x1000 0x08 0x4000 0x08 0x2000 0x08 0xc00 0x08>; - auto-min-freq = <0x4f1a0>; - auto-freq-en = <0x01>; - #cooling-cells = <0x02>; - status = "okay"; - center-supply = <0x75>; - phandle = <0x16>; - }; - - dmc-fsp { - compatible = "rockchip,rk3568-dmc-fsp"; - debug_print_level = <0x00>; - ddr3_params = <0xb7>; - ddr4_params = <0xb8>; - lpddr3_params = <0xb9>; - lpddr4_params = <0xba>; - lpddr4x_params = <0xbb>; - status = "okay"; - }; - - dmc-opp-table { - compatible = "operating-points-v2"; - mbist-vmin = <0xc96a8 0xdbba0 0xe7ef0>; - nvmem-cells = <0x85 0x07 0x08 0xbc 0x0a 0x0b>; - nvmem-cell-names = "leakage\0pvtm\0mbist-vmin\0opp-info\0specification_serial_number\0remark_spec_serial_number"; - rockchip,supported-hw; - rockchip,max-volt = <0xf4240>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-adjust-volt = <0x00 0x618 0x124f8>; - rockchip,leakage-voltage-sel = <0x01 0x50 0x00 0x51 0xfe 0x01>; - rockchip,pvtm-voltage-sel = <0x00 0x14820 0x00 0x14821 0x186a0 0x01>; - rockchip,pvtm-ch = <0x00 0x05>; - phandle = <0xb6>; - - opp-1560000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x5cfbb600>; - opp-microvolt = <0xdbba0 0xdbba0 0xf4240>; - opp-microvolt-L0 = <0xdbba0 0xdbba0 0xf4240>; - opp-microvolt-L1 = <0xd59f8 0xd59f8 0xf4240>; - }; - - opp-j-m-1560000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x5cfbb600>; - opp-microvolt = <0xd59f8 0xd59f8 0xf4240>; - }; - }; - - pcie@fe260000 { - compatible = "rockchip,rk3568-pcie\0snps,dw-pcie"; - #address-cells = <0x03>; - #size-cells = <0x02>; - bus-range = <0x00 0x0f>; - clocks = <0x23 0x81 0x23 0x82 0x23 0x83 0x23 0x84 0x23 0x85>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux"; - device_type = "pci"; - interrupts = <0x00 0x4b 0x04 0x00 0x4a 0x04 0x00 0x49 0x04 0x00 0x48 0x04 0x00 0x47 0x04>; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - #interrupt-cells = <0x01>; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - interrupt-map = <0x00 0x00 0x00 0x01 0xbd 0x00 0x00 0x00 0x00 0x02 0xbd 0x01 0x00 0x00 0x00 0x03 0xbd 0x02 0x00 0x00 0x00 0x04 0xbd 0x03>; - linux,pci-domain = <0x00>; - num-ib-windows = <0x06>; - num-viewport = <0x08>; - num-ob-windows = <0x02>; - max-link-speed = <0x02>; - msi-map = <0x00 0xbe 0x00 0x1000>; - num-lanes = <0x01>; - phys = <0x27 0x02>; - phy-names = "pcie-phy"; - power-domains = <0x25 0x0f>; - ranges = <0x800 0x00 0xf4000000 0x00 0xf4000000 0x00 0x100000 0x81000000 0x00 0xf4100000 0x00 0xf4100000 0x00 0x100000 0x82000000 0x00 0xf4200000 0x00 0xf4200000 0x00 0x1e00000 0xc3000000 0x03 0x00 0x03 0x00 0x00 0x40000000>; - reg = <0x03 0xc0000000 0x00 0x400000 0x00 0xfe260000 0x00 0x10000>; - reg-names = "pcie-dbi\0pcie-apb"; - resets = <0x23 0xa1>; - reset-names = "pipe"; - status = "disabled"; - - legacy-interrupt-controller { - interrupt-controller; - #address-cells = <0x00>; - #interrupt-cells = <0x01>; - interrupt-parent = <0x01>; - interrupts = <0x00 0x48 0x01>; - phandle = <0xbd>; - }; - }; - - pcie@fe270000 { - compatible = "rockchip,rk3568-pcie\0snps,dw-pcie"; - #address-cells = <0x03>; - #size-cells = <0x02>; - bus-range = <0x10 0x1f>; - clocks = <0x23 0x88 0x23 0x89 0x23 0x8a 0x23 0x8b 0x23 0x8c>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux"; - device_type = "pci"; - interrupts = <0x00 0xa0 0x04 0x00 0x9f 0x04 0x00 0x9e 0x04 0x00 0x9d 0x04 0x00 0x9c 0x04>; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - #interrupt-cells = <0x01>; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - interrupt-map = <0x00 0x00 0x00 0x01 0xbf 0x00 0x00 0x00 0x00 0x02 0xbf 0x01 0x00 0x00 0x00 0x03 0xbf 0x02 0x00 0x00 0x00 0x04 0xbf 0x03>; - linux,pci-domain = <0x01>; - num-ib-windows = <0x06>; - num-ob-windows = <0x02>; - num-viewport = <0x08>; - max-link-speed = <0x03>; - msi-map = <0x1000 0xbe 0x1000 0x1000>; - num-lanes = <0x01>; - phys = <0xc0>; - phy-names = "pcie-phy"; - power-domains = <0x25 0x0f>; - ranges = <0x800 0x00 0xf2000000 0x00 0xf2000000 0x00 0x100000 0x81000000 0x00 0xf2100000 0x00 0xf2100000 0x00 0x100000 0x82000000 0x00 0xf2200000 0x00 0xf2200000 0x00 0x1e00000 0xc3000000 0x03 0x40000000 0x03 0x40000000 0x00 0x40000000>; - reg = <0x03 0xc0400000 0x00 0x400000 0x00 0xfe270000 0x00 0x10000>; - reg-names = "pcie-dbi\0pcie-apb"; - resets = <0x23 0xb1>; - reset-names = "pipe"; - status = "disabled"; - - legacy-interrupt-controller { - interrupt-controller; - #address-cells = <0x00>; - #interrupt-cells = <0x01>; - interrupt-parent = <0x01>; - interrupts = <0x00 0x9d 0x01>; - phandle = <0xbf>; - }; - }; - - pcie@fe280000 { - compatible = "rockchip,rk3568-pcie\0snps,dw-pcie"; - #address-cells = <0x03>; - #size-cells = <0x02>; - bus-range = <0x20 0x2f>; - clocks = <0x23 0x8f 0x23 0x90 0x23 0x91 0x23 0x92 0x23 0x93>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux"; - device_type = "pci"; - interrupts = <0x00 0xa5 0x04 0x00 0xa4 0x04 0x00 0xa3 0x04 0x00 0xa2 0x04 0x00 0xa1 0x04>; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - #interrupt-cells = <0x01>; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - interrupt-map = <0x00 0x00 0x00 0x01 0xc1 0x00 0x00 0x00 0x00 0x02 0xc1 0x01 0x00 0x00 0x00 0x03 0xc1 0x02 0x00 0x00 0x00 0x04 0xc1 0x03>; - linux,pci-domain = <0x02>; - num-ib-windows = <0x06>; - num-viewport = <0x08>; - num-ob-windows = <0x02>; - max-link-speed = <0x03>; - msi-map = <0x2000 0xbe 0x2000 0x1000>; - num-lanes = <0x02>; - phys = <0xc0>; - phy-names = "pcie-phy"; - power-domains = <0x25 0x0f>; - ranges = <0x800 0x00 0xf0000000 0x00 0xf0000000 0x00 0x100000 0x81000000 0x00 0xf0100000 0x00 0xf0100000 0x00 0x100000 0x82000000 0x00 0xf0200000 0x00 0xf0200000 0x00 0x1e00000 0xc3000000 0x03 0x80000000 0x03 0x80000000 0x00 0x40000000>; - reg = <0x03 0xc0800000 0x00 0x400000 0x00 0xfe280000 0x00 0x10000>; - reg-names = "pcie-dbi\0pcie-apb"; - resets = <0x23 0xc1>; - reset-names = "pipe"; - status = "okay"; - reset-gpios = <0x91 0x1e 0x00>; - vpcie3v3-supply = <0xc2>; - - legacy-interrupt-controller { - interrupt-controller; - #address-cells = <0x00>; - #interrupt-cells = <0x01>; - interrupt-parent = <0x01>; - interrupts = <0x00 0xa2 0x01>; - phandle = <0xc1>; - }; - }; - - uio@fe2a0000 { - compatible = "rockchip,uio-gmac"; - reg = <0x00 0xfe2a0000 0x00 0x10000>; - rockchip,ethernet = <0xc3>; - status = "disabled"; - }; - - ethernet@fe2a0000 { - local-mac-address = [5a 4f fd 70 05 c6]; - compatible = "rockchip,rk3568-gmac\0snps,dwmac-4.20a"; - reg = <0x00 0xfe2a0000 0x00 0x10000>; - interrupts = <0x00 0x1b 0x04 0x00 0x18 0x04>; - interrupt-names = "macirq\0eth_wake_irq"; - rockchip,grf = <0x3b>; - clocks = <0x23 0x182 0x23 0x185 0x23 0x185 0x23 0xb8 0x23 0xb4 0x23 0xb5 0x23 0x185 0x23 0xb9 0x23 0xac 0x23 0xab>; - clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed\0ptp_ref\0pclk_xpcs\0clk_xpcs_eee"; - resets = <0x23 0xd7>; - reset-names = "stmmaceth"; - snps,mixed-burst; - snps,tso; - snps,axi-config = <0xc4>; - snps,mtl-rx-config = <0xc5>; - snps,mtl-tx-config = <0xc6>; - status = "okay"; - phy-mode = "rgmii"; - clock_in_out = "input"; - snps,reset-gpio = <0x91 0x1b 0x01>; - snps,reset-active-low; - snps,reset-delays-us = <0x00 0x4e20 0x186a0>; - assigned-clocks = <0x23 0x185 0x23 0x182>; - assigned-clock-parents = <0x23 0x183 0xc7>; - pinctrl-names = "default"; - pinctrl-0 = <0xc8 0xc9 0xca 0xcb 0xcc 0xcd>; - tx_delay = <0x4a>; - rx_delay = <0x2e>; - phy-handle = <0xce>; - phandle = <0xc3>; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <0x01>; - #size-cells = <0x00>; - - phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x00>; - led_status_value = <0x6940>; - phandle = <0xce>; - }; - }; - - stmmac-axi-config { - snps,wr_osr_lmt = <0x04>; - snps,rd_osr_lmt = <0x08>; - snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; - phandle = <0xc4>; - }; - - rx-queues-config { - snps,rx-queues-to-use = <0x01>; - phandle = <0xc5>; - - queue0 { - }; - }; - - tx-queues-config { - snps,tx-queues-to-use = <0x01>; - phandle = <0xc6>; - - queue0 { - }; - }; - }; - - dwmmc@fe2b0000 { - compatible = "rockchip,rk3568-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xfe2b0000 0x00 0x4000>; - interrupts = <0x00 0x62 0x04>; - max-frequency = <0x8f0d180>; - clocks = <0x23 0xb0 0x23 0xb1 0x23 0x18a 0x23 0x18b>; - clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; - fifo-depth = <0x100>; - resets = <0x23 0xd4>; - reset-names = "reset"; - status = "okay"; - no-sdio; - no-mmc; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - sd-uhs-sdr104; - vmmc-supply = <0xcf>; - vqmmc-supply = <0x31>; - pinctrl-names = "default"; - pinctrl-0 = <0xd0 0xd1 0xd2 0xd3>; - }; - - dwmmc@fe2c0000 { - compatible = "rockchip,rk3568-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xfe2c0000 0x00 0x4000>; - interrupts = <0x00 0x63 0x04>; - max-frequency = <0x8f0d180>; - clocks = <0x23 0xb2 0x23 0xb3 0x23 0x18c 0x23 0x18d>; - clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; - fifo-depth = <0x100>; - resets = <0x23 0xd6>; - reset-names = "reset"; - status = "disabled"; - }; - - spi@fe300000 { - compatible = "rockchip,sfc"; - reg = <0x00 0xfe300000 0x00 0x4000>; - interrupts = <0x00 0x65 0x04>; - clocks = <0x23 0x78 0x23 0x76>; - clock-names = "clk_sfc\0hclk_sfc"; - assigned-clocks = <0x23 0x78>; - assigned-clock-rates = <0x2faf080>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <0xd4>; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0x00>; - spi-max-frequency = <0x2faf080>; - spi-rx-bus-width = <0x01>; - spi-tx-bus-width = <0x01>; - }; - }; - - sdhci@fe310000 { - compatible = "rockchip,rk3568-dwcmshc\0rockchip,dwcmshc-sdhci"; - reg = <0x00 0xfe310000 0x00 0x10000>; - interrupts = <0x00 0x13 0x04>; - assigned-clocks = <0x23 0x7b 0x23 0x7d 0x23 0x7c>; - assigned-clock-rates = <0xbebc200 0x16e3600 0xbebc200>; - clocks = <0x23 0x7c 0x23 0x7a 0x23 0x79 0x23 0x7b 0x23 0x7d>; - clock-names = "core\0bus\0axi\0block\0timer"; - resets = <0x23 0x78 0x23 0x76 0x23 0x75 0x23 0x77 0x23 0x79>; - reset-names = "core\0bus\0axi\0block\0timer"; - status = "okay"; - bus-width = <0x08>; - no-sdio; - no-sd; - non-removable; - max-frequency = <0xbebc200>; - full-pwr-cycle-in-suspend; - }; - - nandc@fe330000 { - compatible = "rockchip,rk-nandc-v9"; - reg = <0x00 0xfe330000 0x00 0x4000>; - interrupts = <0x00 0x46 0x04>; - nandc_id = <0x00>; - clocks = <0x23 0x75 0x23 0x74>; - clock-names = "clk_nandc\0hclk_nandc"; - status = "okay"; - #address-cells = <0x01>; - #size-cells = <0x00>; - - nand@0 { - reg = <0x00>; - nand-bus-width = <0x08>; - nand-ecc-mode = "hw"; - nand-ecc-strength = <0x10>; - nand-ecc-step-size = <0x400>; - }; - }; - - crypto@fe380000 { - compatible = "rockchip,rk3568-crypto"; - reg = <0x00 0xfe380000 0x00 0x4000>; - interrupts = <0x00 0x04 0x04>; - clocks = <0x23 0x6a 0x23 0x6b 0x23 0x6c 0x23 0x6d>; - clock-names = "aclk\0hclk\0sclk\0apb_pclk"; - assigned-clocks = <0x23 0x6c>; - assigned-clock-rates = <0xbebc200>; - resets = <0x23 0x69>; - reset-names = "crypto-rst"; - status = "disabled"; - }; - - rng@fe388000 { - compatible = "rockchip,cryptov2-rng"; - reg = <0x00 0xfe388000 0x00 0x2000>; - clocks = <0x23 0x70 0x23 0x6f>; - clock-names = "clk_trng\0hclk_trng"; - resets = <0x23 0x6d>; - reset-names = "reset"; - status = "okay"; - }; - - otp@fe38c000 { - compatible = "rockchip,rk3568-otp"; - reg = <0x00 0xfe38c000 0x00 0x4000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - clocks = <0x23 0x73 0x23 0x72 0x23 0x71 0x23 0x181>; - clock-names = "usr\0sbpi\0apb\0phy"; - resets = <0x23 0x1cf>; - reset-names = "otp_phy"; - - cpu-code@2 { - reg = <0x02 0x02>; - phandle = <0x12>; - }; - - specification-serial-number@7 { - reg = <0x07 0x01>; - bits = <0x00 0x05>; - phandle = <0x0a>; - }; - - cpu-version@8 { - reg = <0x08 0x01>; - bits = <0x03 0x03>; - phandle = <0x11>; - }; - - mbist-vmin@9 { - reg = <0x09 0x01>; - bits = <0x00 0x04>; - phandle = <0x08>; - }; - - id@a { - reg = <0x0a 0x10>; - phandle = <0x10>; - }; - - cpu-leakage@1a { - reg = <0x1a 0x01>; - phandle = <0x06>; - }; - - log-leakage@1b { - reg = <0x1b 0x01>; - phandle = <0x85>; - }; - - npu-leakage@1c { - reg = <0x1c 0x01>; - phandle = <0x72>; - }; - - gpu-leakage@1d { - reg = <0x1d 0x01>; - phandle = <0x78>; - }; - - core-pvtm@2a { - reg = <0x2a 0x02>; - phandle = <0x07>; - }; - - cpu-tsadc-trim-l@2e { - reg = <0x2e 0x01>; - phandle = <0x125>; - }; - - cpu-tsadc-trim-h@2f { - reg = <0x2f 0x01>; - bits = <0x00 0x04>; - phandle = <0x126>; - }; - - npu-tsadc-trim-l@30 { - reg = <0x30 0x01>; - phandle = <0x127>; - }; - - npu-tsadc-trim-h@31 { - reg = <0x31 0x01>; - bits = <0x00 0x04>; - phandle = <0x128>; - }; - - tsadc-trim-base-frac@31 { - reg = <0x31 0x01>; - bits = <0x04 0x04>; - phandle = <0x122>; - }; - - tsadc-trim-base@32 { - reg = <0x32 0x01>; - phandle = <0x121>; - }; - - cpu-opp-info@36 { - reg = <0x36 0x06>; - phandle = <0x09>; - }; - - gpu-opp-info@3c { - reg = <0x3c 0x06>; - phandle = <0x79>; - }; - - npu-opp-info@42 { - reg = <0x42 0x06>; - phandle = <0x73>; - }; - - dmc-opp-info@48 { - reg = <0x48 0x06>; - phandle = <0xbc>; - }; - - remark-spec-serial-number@56 { - reg = <0x56 0x01>; - bits = <0x00 0x05>; - phandle = <0x0b>; - }; - }; - - i2s@fe400000 { - compatible = "rockchip,rk3568-i2s-tdm"; - reg = <0x00 0xfe400000 0x00 0x1000>; - interrupts = <0x00 0x34 0x04>; - clocks = <0x23 0x3f 0x23 0x43 0x23 0x39>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0xd5 0x00>; - dma-names = "tx"; - resets = <0x23 0x50 0x23 0x51>; - reset-names = "tx-m\0rx-m"; - rockchip,cru = <0x23>; - rockchip,grf = <0x3b>; - rockchip,playback-only; - #sound-dai-cells = <0x00>; - status = "okay"; - phandle = <0x146>; - }; - - i2s@fe410000 { - compatible = "rockchip,rk3568-i2s-tdm"; - reg = <0x00 0xfe410000 0x00 0x1000>; - interrupts = <0x00 0x35 0x04>; - clocks = <0x23 0x47 0x23 0x4b 0x23 0x3a>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0xd5 0x02 0xd5 0x03>; - dma-names = "tx\0rx"; - resets = <0x23 0x52 0x23 0x53>; - reset-names = "tx-m\0rx-m"; - rockchip,cru = <0x23>; - rockchip,grf = <0x3b>; - #sound-dai-cells = <0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0xd6 0xd7 0xd8 0xd9>; - status = "okay"; - rockchip,clk-trcm = <0x01>; - phandle = <0xe8>; - }; - - i2s@fe420000 { - compatible = "rockchip,rk3568-i2s-tdm"; - reg = <0x00 0xfe420000 0x00 0x1000>; - interrupts = <0x00 0x36 0x04>; - clocks = <0x23 0x4f 0x23 0x4f 0x23 0x3b>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0xd5 0x04 0xd5 0x05>; - dma-names = "tx\0rx"; - rockchip,cru = <0x23>; - rockchip,grf = <0x3b>; - rockchip,clk-trcm = <0x01>; - #sound-dai-cells = <0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0xda 0xdb 0xdc 0xdd>; - status = "disabled"; - }; - - i2s@fe430000 { - compatible = "rockchip,rk3568-i2s-tdm"; - reg = <0x00 0xfe430000 0x00 0x1000>; - interrupts = <0x00 0x37 0x04>; - clocks = <0x23 0x53 0x23 0x57 0x23 0x3c>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0xd5 0x06 0xd5 0x07>; - dma-names = "tx\0rx"; - resets = <0x23 0x55 0x23 0x56>; - reset-names = "tx-m\0rx-m"; - rockchip,cru = <0x23>; - rockchip,grf = <0x3b>; - rockchip,clk-trcm = <0x01>; - #sound-dai-cells = <0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0xde 0xdf 0xe0 0xe1>; - status = "disabled"; - phandle = <0x144>; - }; - - pdm@fe440000 { - compatible = "rockchip,rk3568-pdm\0rockchip,pdm"; - reg = <0x00 0xfe440000 0x00 0x1000>; - clocks = <0x23 0x5a 0x23 0x59>; - clock-names = "pdm_clk\0pdm_hclk"; - dmas = <0xd5 0x09>; - dma-names = "rx"; - pinctrl-names = "default"; - pinctrl-0 = <0xe2 0xe3 0xe4 0xe5 0xe6 0xe7>; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x149>; - }; - - vad@fe450000 { - compatible = "rockchip,rk3568-vad"; - reg = <0x00 0xfe450000 0x00 0x10000>; - reg-names = "vad"; - clocks = <0x23 0x5b>; - clock-names = "hclk"; - interrupts = <0x00 0x89 0x04>; - rockchip,audio-src = <0xe8>; - rockchip,det-channel = <0x00>; - rockchip,mode = <0x00>; - #sound-dai-cells = <0x00>; - status = "disabled"; - rockchip,buffer-time-ms = <0x80>; - phandle = <0x14e>; - }; - - spdif@fe460000 { - compatible = "rockchip,rk3568-spdif"; - reg = <0x00 0xfe460000 0x00 0x1000>; - interrupts = <0x00 0x66 0x04>; - dmas = <0xd5 0x01>; - dma-names = "tx"; - clock-names = "mclk\0hclk"; - clocks = <0x23 0x5f 0x23 0x5c>; - #sound-dai-cells = <0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0xe9>; - status = "disabled"; - phandle = <0x14c>; - }; - - audpwm@fe470000 { - compatible = "rockchip,rk3568-audio-pwm\0rockchip,audio-pwm-v1"; - reg = <0x00 0xfe470000 0x00 0x1000>; - clocks = <0x23 0x63 0x23 0x60>; - clock-names = "clk\0hclk"; - dmas = <0xd5 0x08>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - rockchip,sample-width-bits = <0x0b>; - rockchip,interpolat-points = <0x01>; - status = "disabled"; - }; - - codec-digital@fe478000 { - compatible = "rockchip,rk3568-codec-digital\0rockchip,codec-digital-v1"; - reg = <0x00 0xfe478000 0x00 0x1000>; - clocks = <0x23 0x67 0x23 0x66 0x23 0x65 0x23 0x64>; - clock-names = "adc\0dac\0i2c\0pclk"; - pinctrl-names = "default"; - pinctrl-0 = <0xea>; - resets = <0x23 0x5f>; - reset-names = "reset"; - rockchip,grf = <0x3b>; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x145>; - }; - - dmac@fe530000 { - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xfe530000 0x00 0x4000>; - interrupts = <0x00 0x0e 0x04 0x00 0x0d 0x04>; - clocks = <0x23 0x10d>; - clock-names = "apb_pclk"; - #dma-cells = <0x01>; - arm,pl330-periph-burst; - phandle = <0x4e>; - }; - - dmac@fe550000 { - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xfe550000 0x00 0x4000>; - interrupts = <0x00 0x10 0x04 0x00 0x0f 0x04>; - clocks = <0x23 0x10d>; - clock-names = "apb_pclk"; - #dma-cells = <0x01>; - arm,pl330-periph-burst; - phandle = <0xd5>; - }; - - rkscr@fe560000 { - compatible = "rockchip-scr"; - reg = <0x00 0xfe560000 0x00 0x10000>; - interrupts = <0x00 0x61 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0xeb>; - clocks = <0x23 0x114>; - clock-names = "g_pclk_sim_card"; - status = "disabled"; - }; - - can@fe570000 { - compatible = "rockchip,rk3568-can-2.0"; - reg = <0x00 0xfe570000 0x00 0x1000>; - interrupts = <0x00 0x01 0x04>; - clocks = <0x23 0x141 0x23 0x140>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x23 0x155 0x23 0x154>; - reset-names = "can\0can-apb"; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - status = "disabled"; - }; - - can@fe580000 { - compatible = "rockchip,rk3568-can-2.0"; - reg = <0x00 0xfe580000 0x00 0x1000>; - interrupts = <0x00 0x02 0x04>; - clocks = <0x23 0x143 0x23 0x142>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x23 0x157 0x23 0x156>; - reset-names = "can\0can-apb"; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - status = "okay"; - assigned-clocks = <0x23 0x143>; - assigned-clock-rates = <0xbebc200>; - pinctrl-names = "default"; - pinctrl-0 = <0xec>; - }; - - can@fe590000 { - compatible = "rockchip,rk3568-can-2.0"; - reg = <0x00 0xfe590000 0x00 0x1000>; - interrupts = <0x00 0x03 0x04>; - clocks = <0x23 0x145 0x23 0x144>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x23 0x159 0x23 0x158>; - reset-names = "can\0can-apb"; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - status = "disabled"; - assigned-clocks = <0x23 0x145>; - assigned-clock-rates = <0xbebc200>; - pinctrl-names = "default"; - pinctrl-0 = <0xed>; - }; - - i2c@fe5a0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xfe5a0000 0x00 0x1000>; - clocks = <0x23 0x148 0x23 0x147>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x2f 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0xee>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x186a0>; - - gpio@21 { - status = "disabled"; - compatible = "nxp,pca9555"; - reg = <0x21>; - gpio-controller; - #gpio-cells = <0x02>; - gpio-group-num = <0xc8>; - phandle = <0x102>; - }; - - gt1x@14 { - status = "disabled"; - compatible = "goodix,gt1x"; - reg = <0x14>; - pinctrl-names = "default"; - pinctrl-0 = <0xef>; - goodix,rst-gpio = <0x3f 0x0e 0x00>; - goodix,irq-gpio = <0x3f 0x0d 0x08>; - }; - }; - - i2c@fe5b0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xfe5b0000 0x00 0x1000>; - clocks = <0x23 0x14a 0x23 0x149>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x30 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0xf0>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - }; - - i2c@fe5c0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xfe5c0000 0x00 0x1000>; - clocks = <0x23 0x14c 0x23 0x14b>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x31 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0xf1>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - }; - - i2c@fe5d0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xfe5d0000 0x00 0x1000>; - clocks = <0x23 0x14e 0x23 0x14d>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x32 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0xf2>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - - gc8034@37 { - compatible = "galaxycore,gc8034"; - status = "disabled"; - reg = <0x37>; - clocks = <0x23 0xd6>; - clock-names = "xvclk"; - pinctrl-names = "default"; - pinctrl-0 = <0xf3>; - reset-gpios = <0x4a 0x0e 0x01>; - pwdn-gpios = <0xf4 0x0c 0x01>; - rockchip,grf = <0x3b>; - rockchip,camera-module-index = <0x00>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "RK-CMK-8M-2-v1"; - rockchip,camera-module-lens-name = "CK8401"; - - port { - - endpoint { - remote-endpoint = <0xf5>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0x130>; - }; - }; - }; - - os04a10@36 { - status = "disabled"; - compatible = "ovti,os04a10"; - reg = <0x36>; - clocks = <0x23 0xd6>; - clock-names = "xvclk"; - power-domains = <0x25 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0xf3>; - reset-gpios = <0x4a 0x0e 0x01>; - pwdn-gpios = <0xf4 0x0c 0x00>; - rockchip,camera-module-index = <0x00>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "CMK-OT1607-FV1"; - rockchip,camera-module-lens-name = "M12-40IRC-4MP-F16"; - - port { - - endpoint { - remote-endpoint = <0xf6>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0x12f>; - }; - }; - }; - - ov5695@36 { - status = "disabled"; - compatible = "ovti,ov5695"; - reg = <0x36>; - clocks = <0x23 0xd6>; - clock-names = "xvclk"; - power-domains = <0x25 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0xf3>; - reset-gpios = <0x4a 0x0e 0x00>; - pwdn-gpios = <0xf4 0x0c 0x00>; - rockchip,camera-module-index = <0x00>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "TongJu"; - rockchip,camera-module-lens-name = "CHT842-MD"; - - port { - - endpoint { - remote-endpoint = <0xf7>; - data-lanes = <0x01 0x02>; - phandle = <0x131>; - }; - }; - }; - - XC7160b@1b { - status = "okay"; - compatible = "firefly,xc7160"; - reg = <0x1b>; - clocks = <0x23 0xd6>; - clock-names = "xvclk"; - power-domains = <0x25 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0xf3>; - reset-gpios = <0x3f 0x1d 0x00>; - pwdn-gpios = <0xf4 0x0c 0x00>; - firefly,clkout-enabled-index = <0x00>; - rockchip,camera-module-index = <0x00>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "NC"; - rockchip,camera-module-lens-name = "NC"; - - port { - - endpoint { - remote-endpoint = <0xf8>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0x132>; - }; - }; - }; - - imx415@37 { - status = "okay"; - compatible = "sony,imx415"; - reg = <0x37>; - clocks = <0x23 0xd6>; - clock-names = "xvclk"; - power-domains = <0x25 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0xf3>; - reset-gpios = <0x3f 0x1d 0x01>; - pwdn-gpios = <0xf4 0x0c 0x00>; - firefly,clkout-enabled-index = <0x00>; - rockchip,camera-module-index = <0x00>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "CMK-OT2022-PX1"; - rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20"; - - port { - - endpoint { - remote-endpoint = <0xf9>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0x133>; - }; - }; - }; - }; - - i2c@fe5e0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xfe5e0000 0x00 0x1000>; - clocks = <0x23 0x150 0x23 0x14f>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x33 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0xfa>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - - hym8563@51 { - status = "okay"; - compatible = "haoyu,hym8563"; - reg = <0x51>; - #clock-cells = <0x00>; - rtc-irq-gpio = <0x3f 0x1b 0x02>; - clock-frequency = <0x8000>; - }; - - mc3230sensor@4c { - compatible = "gs_mc3230"; - reg = <0x4c>; - type = <0x02>; - irq_enable = <0x00>; - poll_delay_ms = <0x1e>; - layout = <0x04>; - status = "okay"; - }; - - mxc6655xa@15 { - status = "disabled"; - compatible = "gs_mxc6655xa"; - pinctrl-names = "default"; - pinctrl-0 = <0xfb>; - reg = <0x15>; - irq-gpio = <0x4a 0x11 0x08>; - irq_enable = <0x00>; - poll_delay_ms = <0x1e>; - type = <0x02>; - power-off-in-suspend = <0x01>; - layout = <0x01>; - }; - }; - - timer@fe5f0000 { - compatible = "rockchip,rk3568-timer\0rockchip,rk3288-timer"; - reg = <0x00 0xfe5f0000 0x00 0x1000>; - interrupts = <0x00 0x6d 0x04>; - clocks = <0x23 0x16c 0x23 0x16d>; - clock-names = "pclk\0timer"; - }; - - watchdog@fe600000 { - compatible = "snps,dw-wdt"; - reg = <0x00 0xfe600000 0x00 0x100>; - clocks = <0x23 0x116 0x23 0x115>; - clock-names = "tclk\0pclk"; - interrupts = <0x00 0x95 0x04>; - status = "okay"; - }; - - spi@fe610000 { - compatible = "rockchip,rk3066-spi"; - reg = <0x00 0xfe610000 0x00 0x1000>; - interrupts = <0x00 0x67 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x23 0x152 0x23 0x151>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x4e 0x14 0x4e 0x15>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0xfc 0xfd 0xfe>; - pinctrl-1 = <0xfc 0xfd 0xff>; - num-cs = <0x02>; - status = "disabled"; - }; - - spi@fe620000 { - compatible = "rockchip,rk3066-spi"; - reg = <0x00 0xfe620000 0x00 0x1000>; - interrupts = <0x00 0x68 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x23 0x154 0x23 0x153>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x4e 0x16 0x4e 0x17>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x100>; - pinctrl-1 = <0x101>; - num-cs = <0x02>; - status = "disabled"; - max-freq = <0x2dc6c00>; - dev-port = <0x00>; - - spi_wk2xxx@0 { - status = "disabled"; - compatible = "firefly,spi-wk2xxx"; - reg = <0x00>; - spi-max-frequency = <0x989680>; - power-gpio = <0x102 0x0f 0x00>; - reset-gpio = <0x102 0x09 0x00>; - irq-gpio = <0x3f 0x06 0x02>; - cs-gpio = <0x4a 0x01 0x00>; - }; - }; - - spi@fe630000 { - compatible = "rockchip,rk3066-spi"; - reg = <0x00 0xfe630000 0x00 0x1000>; - interrupts = <0x00 0x69 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x23 0x156 0x23 0x155>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x4e 0x18 0x4e 0x19>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x103 0x104 0x105>; - pinctrl-1 = <0x103 0x104 0x106>; - num-cs = <0x02>; - status = "disabled"; - }; - - spi@fe640000 { - compatible = "rockchip,rk3066-spi"; - reg = <0x00 0xfe640000 0x00 0x1000>; - interrupts = <0x00 0x6a 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x23 0x158 0x23 0x157>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x4e 0x1a 0x4e 0x1b>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x107 0x108 0x109>; - pinctrl-1 = <0x107 0x108 0x10a>; - num-cs = <0x02>; - status = "disabled"; - }; - - serial@fe650000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe650000 0x00 0x100>; - interrupts = <0x00 0x75 0x04>; - clocks = <0x23 0x11f 0x23 0x11c>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x02 0x4e 0x03>; - pinctrl-names = "default"; - pinctrl-0 = <0x10b>; - status = "disabled"; - }; - - serial@fe660000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe660000 0x00 0x100>; - interrupts = <0x00 0x76 0x04>; - clocks = <0x23 0x123 0x23 0x120>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x04 0x4e 0x05>; - pinctrl-names = "default"; - pinctrl-0 = <0x10c>; - status = "disabled"; - }; - - serial@fe670000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe670000 0x00 0x100>; - interrupts = <0x00 0x77 0x04>; - clocks = <0x23 0x127 0x23 0x124>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x06 0x4e 0x07>; - pinctrl-names = "default"; - pinctrl-0 = <0x10d>; - status = "okay"; - }; - - serial@fe680000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe680000 0x00 0x100>; - interrupts = <0x00 0x78 0x04>; - clocks = <0x23 0x12b 0x23 0x128>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x08 0x4e 0x09>; - pinctrl-names = "default"; - pinctrl-0 = <0x10e>; - status = "okay"; - }; - - serial@fe690000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe690000 0x00 0x100>; - interrupts = <0x00 0x79 0x04>; - clocks = <0x23 0x12f 0x23 0x12c>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x0a 0x4e 0x0b>; - pinctrl-names = "default"; - pinctrl-0 = <0x10f>; - status = "disabled"; - }; - - serial@fe6a0000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe6a0000 0x00 0x100>; - interrupts = <0x00 0x7a 0x04>; - clocks = <0x23 0x133 0x23 0x130>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x0c 0x4e 0x0d>; - pinctrl-names = "default"; - pinctrl-0 = <0x110>; - status = "disabled"; - }; - - serial@fe6b0000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe6b0000 0x00 0x100>; - interrupts = <0x00 0x7b 0x04>; - clocks = <0x23 0x137 0x23 0x134>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x0e 0x4e 0x0f>; - pinctrl-names = "default"; - pinctrl-0 = <0x111>; - status = "okay"; - }; - - serial@fe6c0000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe6c0000 0x00 0x100>; - interrupts = <0x00 0x7c 0x04>; - clocks = <0x23 0x13b 0x23 0x138>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x10 0x4e 0x11>; - pinctrl-names = "default"; - pinctrl-0 = <0x112 0x113>; - status = "okay"; - }; - - serial@fe6d0000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe6d0000 0x00 0x100>; - interrupts = <0x00 0x7d 0x04>; - clocks = <0x23 0x13f 0x23 0x13c>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x12 0x4e 0x13>; - pinctrl-names = "default"; - pinctrl-0 = <0x114>; - status = "okay"; - }; - - pwm@fe6e0000 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe6e0000 0x00 0x10>; - interrupts = <0x00 0x53 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x115>; - clocks = <0x23 0x15a 0x23 0x159>; - clock-names = "pwm\0pclk"; - status = "okay"; - }; - - pwm@fe6e0010 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe6e0010 0x00 0x10>; - interrupts = <0x00 0x53 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x116>; - clocks = <0x23 0x15a 0x23 0x159>; - clock-names = "pwm\0pclk"; - status = "okay"; - }; - - pwm@fe6e0020 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe6e0020 0x00 0x10>; - interrupts = <0x00 0x53 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x117>; - clocks = <0x23 0x15a 0x23 0x159>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fe6e0030 { - compatible = "rockchip,remotectl-pwm"; - reg = <0x00 0xfe6e0030 0x00 0x10>; - interrupts = <0x00 0x53 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "default"; - pinctrl-0 = <0x118>; - clocks = <0x23 0x15a 0x23 0x159>; - clock-names = "pwm\0pclk"; - status = "okay"; - remote_pwm_id = <0x03>; - handle_cpu_id = <0x01>; - remote_support_psci = <0x00>; - - ir_key_firefly { - rockchip,usercode = <0xff00>; - rockchip,key_table = <0xeb 0x74 0xec 0x8b 0xfe 0x9e 0xb7 0x66 0xa3 0x96 0xf4 0x73 0xa7 0x72 0xf8 0xe8 0xfc 0x67 0xfd 0x6c 0xf1 0x69 0xe5 0x6a>; - }; - }; - - pwm@fe6f0000 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe6f0000 0x00 0x10>; - interrupts = <0x00 0x54 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x119>; - clocks = <0x23 0x15d 0x23 0x15c>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fe6f0010 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe6f0010 0x00 0x10>; - interrupts = <0x00 0x54 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x11a>; - clocks = <0x23 0x15d 0x23 0x15c>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fe6f0020 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe6f0020 0x00 0x10>; - interrupts = <0x00 0x54 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x11b>; - clocks = <0x23 0x15d 0x23 0x15c>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fe6f0030 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe6f0030 0x00 0x10>; - interrupts = <0x00 0x54 0x04 0x00 0x58 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x11c>; - clocks = <0x23 0x15d 0x23 0x15c>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0x157>; - }; - - pwm@fe700000 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe700000 0x00 0x10>; - interrupts = <0x00 0x55 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x11d>; - clocks = <0x23 0x160 0x23 0x15f>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fe700010 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe700010 0x00 0x10>; - interrupts = <0x00 0x55 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x11e>; - clocks = <0x23 0x160 0x23 0x15f>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fe700020 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe700020 0x00 0x10>; - interrupts = <0x00 0x55 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x11f>; - clocks = <0x23 0x160 0x23 0x15f>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fe700030 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe700030 0x00 0x10>; - interrupts = <0x00 0x55 0x04 0x00 0x59 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x120>; - clocks = <0x23 0x160 0x23 0x15f>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - tsadc@fe710000 { - compatible = "rockchip,rk3568-tsadc"; - reg = <0x00 0xfe710000 0x00 0x100>; - interrupts = <0x00 0x73 0x04>; - rockchip,grf = <0x3b>; - clocks = <0x23 0x111 0x23 0x10f>; - clock-names = "tsadc\0apb_pclk"; - assigned-clocks = <0x23 0x110 0x23 0x111>; - assigned-clock-rates = <0x1036640 0xaae60>; - resets = <0x23 0x182 0x23 0x181 0x23 0x1d7>; - reset-names = "tsadc\0tsadc-apb\0tsadc-phy"; - #thermal-sensor-cells = <0x01>; - nvmem-cells = <0x121 0x122>; - nvmem-cell-names = "trim_base\0trim_base_frac"; - rockchip,hw-tshut-temp = <0x1d4c0>; - rockchip,hw-tshut-mode = <0x00>; - rockchip,hw-tshut-polarity = <0x00>; - pinctrl-names = "gpio\0otpout"; - pinctrl-0 = <0x123>; - pinctrl-1 = <0x124>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x1f>; - - tsadc@0 { - reg = <0x00>; - nvmem-cells = <0x125 0x126>; - nvmem-cell-names = "trim_l\0trim_h"; - }; - - tsadc@1 { - reg = <0x01>; - nvmem-cells = <0x127 0x128>; - nvmem-cell-names = "trim_l\0trim_h"; - }; - }; - - saradc@fe720000 { - compatible = "rockchip,rk3568-saradc\0rockchip,rk3399-saradc"; - reg = <0x00 0xfe720000 0x00 0x100>; - interrupts = <0x00 0x5d 0x04>; - #io-channel-cells = <0x01>; - clocks = <0x23 0x113 0x23 0x112>; - clock-names = "saradc\0apb_pclk"; - resets = <0x23 0x180>; - reset-names = "saradc-apb"; - status = "okay"; - vref-supply = <0x129>; - phandle = <0x49>; - }; - - mailbox@fe780000 { - compatible = "rockchip,rk3568-mailbox\0rockchip,rk3368-mailbox"; - reg = <0x00 0xfe780000 0x00 0x1000>; - interrupts = <0x00 0xb7 0x04 0x00 0xb8 0x04 0x00 0xb9 0x04 0x00 0xba 0x04>; - clocks = <0x23 0x11b>; - clock-names = "pclk_mailbox"; - #mbox-cells = <0x01>; - status = "disabled"; - }; - - phy@fe820000 { - compatible = "rockchip,rk3568-naneng-combphy"; - reg = <0x00 0xfe820000 0x00 0x100>; - #phy-cells = <0x01>; - clocks = <0x3a 0x1f 0x23 0x17c 0x23 0x7f>; - clock-names = "refclk\0apbclk\0pipe_clk"; - assigned-clocks = <0x3a 0x1f>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x23 0x1c4 0x23 0x1c5>; - reset-names = "combphy-apb\0combphy"; - rockchip,pipe-grf = <0x12a>; - rockchip,pipe-phy-grf = <0x12b>; - status = "okay"; - phandle = <0x24>; - }; - - phy@fe830000 { - compatible = "rockchip,rk3568-naneng-combphy"; - reg = <0x00 0xfe830000 0x00 0x100>; - #phy-cells = <0x01>; - clocks = <0x3a 0x22 0x23 0x17d 0x23 0x7f>; - clock-names = "refclk\0apbclk\0pipe_clk"; - assigned-clocks = <0x3a 0x22>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x23 0x1c6 0x23 0x1c7>; - reset-names = "combphy-apb\0combphy"; - rockchip,pipe-grf = <0x12a>; - rockchip,pipe-phy-grf = <0x12c>; - status = "okay"; - phandle = <0x26>; - }; - - phy@fe840000 { - compatible = "rockchip,rk3568-naneng-combphy"; - reg = <0x00 0xfe840000 0x00 0x100>; - #phy-cells = <0x01>; - clocks = <0x3a 0x25 0x23 0x17e 0x23 0x7f>; - clock-names = "refclk\0apbclk\0pipe_clk"; - assigned-clocks = <0x3a 0x25>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x23 0x1c8 0x23 0x1c9>; - reset-names = "combphy-apb\0combphy"; - rockchip,pipe-grf = <0x12a>; - rockchip,pipe-phy-grf = <0x12d>; - status = "okay"; - phandle = <0x27>; - }; - - phy@fe850000 { - compatible = "rockchip,rk3568-dsi-dphy\0rockchip,rk3568-video-phy"; - reg = <0x00 0xfe850000 0x00 0x10000 0x00 0xfe060000 0x00 0x10000>; - reg-names = "phy\0host"; - clocks = <0x3a 0x17 0x23 0x17a 0x23 0xe8>; - clock-names = "ref\0pclk\0pclk_host"; - #clock-cells = <0x00>; - resets = <0x23 0x1bb>; - reset-names = "apb"; - power-domains = <0x25 0x09>; - #phy-cells = <0x00>; - status = "disabled"; - phandle = <0x34>; - }; - - phy@fe860000 { - compatible = "rockchip,rk3568-dsi-dphy\0rockchip,rk3568-video-phy"; - reg = <0x00 0xfe860000 0x00 0x10000 0x00 0xfe070000 0x00 0x10000>; - reg-names = "phy\0host"; - clocks = <0x3a 0x19 0x23 0x17b 0x23 0xe9>; - clock-names = "ref\0pclk\0pclk_host"; - #clock-cells = <0x00>; - resets = <0x23 0x1bc>; - reset-names = "apb"; - power-domains = <0x25 0x09>; - #phy-cells = <0x00>; - status = "disabled"; - phandle = <0x36>; - }; - - csi2-dphy-hw@fe870000 { - compatible = "rockchip,rk3568-csi2-dphy-hw"; - reg = <0x00 0xfe870000 0x00 0x1000>; - clocks = <0x23 0x179>; - clock-names = "pclk"; - rockchip,grf = <0x3b>; - status = "okay"; - phandle = <0x12e>; - }; - - csi2-dphy0 { - compatible = "rockchip,rk3568-csi2-dphy"; - rockchip,hw = <0x12e>; - status = "okay"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0x12f>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0xf6>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0x130>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0xf5>; - }; - - endpoint@3 { - reg = <0x03>; - remote-endpoint = <0x131>; - data-lanes = <0x01 0x02>; - phandle = <0xf7>; - }; - - endpoint@4 { - reg = <0x04>; - remote-endpoint = <0x132>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0xf8>; - }; - - endpoint@5 { - reg = <0x05>; - remote-endpoint = <0x133>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0xf9>; - }; - }; - - port@1 { - reg = <0x01>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x134>; - phandle = <0x8c>; - }; - }; - }; - }; - - csi2-dphy1 { - compatible = "rockchip,rk3568-csi2-dphy"; - rockchip,hw = <0x12e>; - status = "disabled"; - }; - - csi2-dphy2 { - compatible = "rockchip,rk3568-csi2-dphy"; - rockchip,hw = <0x12e>; - status = "disabled"; - }; - - usb2-phy@fe8a0000 { - compatible = "rockchip,rk3568-usb2phy"; - reg = <0x00 0xfe8a0000 0x00 0x10000>; - interrupts = <0x00 0x87 0x04>; - clocks = <0x3a 0x13>; - clock-names = "phyclk"; - #clock-cells = <0x00>; - assigned-clocks = <0x23 0x0b>; - assigned-clock-parents = <0x29>; - clock-output-names = "usb480m_phy"; - rockchip,usbgrf = <0x135>; - status = "okay"; - phandle = <0x29>; - - host-port { - #phy-cells = <0x00>; - status = "okay"; - phy-supply = <0x136>; - phandle = <0x2b>; - }; - - otg-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x28>; - }; - }; - - usb2-phy@fe8b0000 { - compatible = "rockchip,rk3568-usb2phy"; - reg = <0x00 0xfe8b0000 0x00 0x10000>; - interrupts = <0x00 0x88 0x04>; - clocks = <0x3a 0x15>; - clock-names = "phyclk"; - #clock-cells = <0x00>; - rockchip,usbgrf = <0x137>; - status = "okay"; - phandle = <0x2c>; - - host-port { - #phy-cells = <0x00>; - status = "okay"; - phy-supply = <0x136>; - phandle = <0x2e>; - }; - - otg-port { - #phy-cells = <0x00>; - status = "okay"; - phy-supply = <0x136>; - phandle = <0x2d>; - }; - }; - - phy@fe8c0000 { - compatible = "rockchip,rk3568-pcie3-phy"; - reg = <0x00 0xfe8c0000 0x00 0x20000>; - #phy-cells = <0x00>; - clocks = <0x3a 0x26 0x3a 0x27 0x23 0x177>; - clock-names = "refclk_m\0refclk_n\0pclk"; - resets = <0x23 0x1be>; - reset-names = "phy"; - rockchip,phy-grf = <0x138>; - status = "okay"; - phandle = <0xc0>; - }; - - pinctrl { - compatible = "rockchip,rk3568-pinctrl"; - rockchip,grf = <0x3b>; - rockchip,pmu = <0x3c>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - gpio0@fdd60000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xfdd60000 0x00 0x100>; - interrupts = <0x00 0x21 0x04>; - clocks = <0x3a 0x2e 0x3a 0x0c>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x3f>; - }; - - gpio1@fe740000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xfe740000 0x00 0x100>; - interrupts = <0x00 0x22 0x04>; - clocks = <0x23 0x163 0x23 0x164>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x159>; - }; - - gpio2@fe750000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xfe750000 0x00 0x100>; - interrupts = <0x00 0x23 0x04>; - clocks = <0x23 0x165 0x23 0x166>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x91>; - }; - - gpio3@fe760000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xfe760000 0x00 0x100>; - interrupts = <0x00 0x24 0x04>; - clocks = <0x23 0x167 0x23 0x168>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x4a>; - }; - - gpio4@fe770000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xfe770000 0x00 0x100>; - interrupts = <0x00 0x25 0x04>; - clocks = <0x23 0x169 0x23 0x16a>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0xf4>; - }; - - pcfg-pull-up { - bias-pull-up; - phandle = <0x13b>; - }; - - pcfg-pull-down { - bias-pull-down; - phandle = <0x142>; - }; - - pcfg-pull-none { - bias-disable; - phandle = <0x139>; - }; - - pcfg-pull-none-drv-level-1 { - bias-disable; - drive-strength = <0x01>; - phandle = <0x13d>; - }; - - pcfg-pull-none-drv-level-2 { - bias-disable; - drive-strength = <0x02>; - phandle = <0x13c>; - }; - - pcfg-pull-none-drv-level-3 { - bias-disable; - drive-strength = <0x03>; - phandle = <0x141>; - }; - - pcfg-pull-up-drv-level-1 { - bias-pull-up; - drive-strength = <0x01>; - phandle = <0x140>; - }; - - pcfg-pull-up-drv-level-2 { - bias-pull-up; - drive-strength = <0x02>; - phandle = <0x13a>; - }; - - pcfg-pull-none-smt { - bias-disable; - input-schmitt-enable; - phandle = <0x13e>; - }; - - pcfg-output-low-pull-down { - output-low; - bias-pull-down; - phandle = <0x13f>; - }; - - acodec { - - acodec-pins { - rockchip,pins = <0x01 0x09 0x05 0x139 0x01 0x01 0x05 0x139 0x01 0x00 0x05 0x139 0x01 0x07 0x05 0x139 0x01 0x08 0x05 0x139 0x01 0x03 0x05 0x139 0x01 0x05 0x05 0x139>; - phandle = <0xea>; - }; - }; - - cam { - - vcc-cam { - rockchip,pins = <0x00 0x11 0x00 0x139>; - phandle = <0x158>; - }; - }; - - can1 { - - can1m1-pins { - rockchip,pins = <0x04 0x12 0x03 0x139 0x04 0x13 0x03 0x139>; - phandle = <0xec>; - }; - }; - - can2 { - - can2m0-pins { - rockchip,pins = <0x04 0x0c 0x03 0x139 0x04 0x0d 0x03 0x139>; - phandle = <0xed>; - }; - }; - - cif { - - cif-clk { - rockchip,pins = <0x04 0x10 0x01 0x139>; - phandle = <0xf3>; - }; - }; - - clk32k { - - clk32k-out0 { - rockchip,pins = <0x00 0x08 0x02 0x139>; - phandle = <0x22>; - }; - }; - - ebc { - - ebc-pins { - rockchip,pins = <0x04 0x10 0x02 0x139 0x04 0x0b 0x02 0x139 0x04 0x0c 0x02 0x139 0x04 0x06 0x02 0x139 0x04 0x11 0x02 0x139 0x03 0x16 0x02 0x139 0x03 0x17 0x02 0x139 0x03 0x18 0x02 0x139 0x03 0x19 0x02 0x139 0x03 0x1a 0x02 0x139 0x03 0x1b 0x02 0x139 0x03 0x1c 0x02 0x139 0x03 0x1d 0x02 0x139 0x03 0x1e 0x02 0x139 0x03 0x1f 0x02 0x139 0x04 0x00 0x02 0x139 0x04 0x01 0x02 0x139 0x04 0x02 0x02 0x139 0x04 0x03 0x02 0x139 0x04 0x04 0x02 0x139 0x04 0x05 0x02 0x139 0x04 0x0e 0x02 0x139 0x04 0x0f 0x02 0x139>; - phandle = <0x7c>; - }; - }; - - fspi { - - fspi-pins { - rockchip,pins = <0x01 0x18 0x01 0x139 0x01 0x1b 0x01 0x139 0x01 0x19 0x01 0x139 0x01 0x1a 0x01 0x139 0x01 0x17 0x02 0x139 0x01 0x1c 0x01 0x139>; - phandle = <0xd4>; - }; - }; - - gmac0 { - - gmac0-miim { - rockchip,pins = <0x02 0x13 0x02 0x139 0x02 0x14 0x02 0x139>; - phandle = <0xc8>; - }; - - gmac0-clkinout { - rockchip,pins = <0x02 0x12 0x02 0x139>; - phandle = <0xcd>; - }; - - gmac0-rx-bus2 { - rockchip,pins = <0x02 0x0e 0x01 0x139 0x02 0x0f 0x02 0x139 0x02 0x10 0x02 0x139>; - phandle = <0xca>; - }; - - gmac0-tx-bus2 { - rockchip,pins = <0x02 0x0b 0x01 0x13c 0x02 0x0c 0x01 0x13c 0x02 0x0d 0x01 0x139>; - phandle = <0xc9>; - }; - - gmac0-rgmii-clk { - rockchip,pins = <0x02 0x05 0x02 0x139 0x02 0x08 0x02 0x13d>; - phandle = <0xcb>; - }; - - gmac0-rgmii-bus { - rockchip,pins = <0x02 0x03 0x02 0x139 0x02 0x04 0x02 0x139 0x02 0x06 0x02 0x13c 0x02 0x07 0x02 0x13c>; - phandle = <0xcc>; - }; - }; - - gmac1 { - - gmac1m1-miim { - rockchip,pins = <0x04 0x0e 0x03 0x139 0x04 0x0f 0x03 0x139>; - phandle = <0x93>; - }; - - gmac1m1-clkinout { - rockchip,pins = <0x04 0x11 0x03 0x139>; - phandle = <0x98>; - }; - - gmac1m1-rx-bus2 { - rockchip,pins = <0x04 0x07 0x03 0x139 0x04 0x08 0x03 0x139 0x04 0x09 0x03 0x139>; - phandle = <0x95>; - }; - - gmac1m1-tx-bus2 { - rockchip,pins = <0x04 0x04 0x03 0x13c 0x04 0x05 0x03 0x13c 0x04 0x06 0x03 0x139>; - phandle = <0x94>; - }; - - gmac1m1-rgmii-clk { - rockchip,pins = <0x04 0x03 0x03 0x139 0x04 0x00 0x03 0x13d>; - phandle = <0x96>; - }; - - gmac1m1-rgmii-bus { - rockchip,pins = <0x04 0x01 0x03 0x139 0x04 0x02 0x03 0x139 0x03 0x1e 0x03 0x13c 0x03 0x1f 0x03 0x13c>; - phandle = <0x97>; - }; - }; - - hdmitx { - - hdmitxm0-cec { - rockchip,pins = <0x04 0x19 0x01 0x139>; - phandle = <0xac>; - }; - - hdmitx-scl { - rockchip,pins = <0x04 0x17 0x01 0x139>; - phandle = <0xaa>; - }; - - hdmitx-sda { - rockchip,pins = <0x04 0x18 0x01 0x139>; - phandle = <0xab>; - }; - }; - - i2c0 { - - i2c0-xfer { - rockchip,pins = <0x00 0x09 0x01 0x13e 0x00 0x0a 0x01 0x13e>; - phandle = <0x3d>; - }; - }; - - i2c1 { - - i2c1-xfer { - rockchip,pins = <0x00 0x0b 0x01 0x13e 0x00 0x0c 0x01 0x13e>; - phandle = <0xee>; - }; - }; - - i2c2 { - - i2c2m0-xfer { - rockchip,pins = <0x00 0x0d 0x01 0x13e 0x00 0x0e 0x01 0x13e>; - phandle = <0xf0>; - }; - }; - - i2c3 { - - i2c3m0-xfer { - rockchip,pins = <0x01 0x01 0x01 0x13e 0x01 0x00 0x01 0x13e>; - phandle = <0xf1>; - }; - }; - - i2c4 { - - i2c4m0-xfer { - rockchip,pins = <0x04 0x0b 0x01 0x13e 0x04 0x0a 0x01 0x13e>; - phandle = <0xf2>; - }; - }; - - i2c5 { - - i2c5m0-xfer { - rockchip,pins = <0x03 0x0b 0x04 0x13e 0x03 0x0c 0x04 0x13e>; - phandle = <0xfa>; - }; - }; - - i2s1 { - - i2s1m0-lrcktx { - rockchip,pins = <0x01 0x05 0x01 0x13e>; - phandle = <0xd7>; - }; - - i2s1m0-mclk { - rockchip,pins = <0x01 0x02 0x01 0x13e>; - phandle = <0x47>; - }; - - i2s1m0-sclktx { - rockchip,pins = <0x01 0x03 0x01 0x13e>; - phandle = <0xd6>; - }; - - i2s1m0-sdi0 { - rockchip,pins = <0x01 0x0b 0x01 0x139>; - phandle = <0xd8>; - }; - - i2s1m0-sdo0 { - rockchip,pins = <0x01 0x07 0x01 0x139>; - phandle = <0xd9>; - }; - }; - - i2s2 { - - i2s2m0-lrcktx { - rockchip,pins = <0x02 0x13 0x01 0x13e>; - phandle = <0xdb>; - }; - - i2s2m0-sclktx { - rockchip,pins = <0x02 0x12 0x01 0x13e>; - phandle = <0xda>; - }; - - i2s2m0-sdi { - rockchip,pins = <0x02 0x15 0x01 0x139>; - phandle = <0xdc>; - }; - - i2s2m0-sdo { - rockchip,pins = <0x02 0x14 0x01 0x139>; - phandle = <0xdd>; - }; - }; - - i2s3 { - - i2s3m0-lrck { - rockchip,pins = <0x03 0x04 0x04 0x13e>; - phandle = <0xdf>; - }; - - i2s3m0-sclk { - rockchip,pins = <0x03 0x03 0x04 0x13e>; - phandle = <0xde>; - }; - - i2s3m0-sdi { - rockchip,pins = <0x03 0x06 0x04 0x139>; - phandle = <0xe0>; - }; - - i2s3m0-sdo { - rockchip,pins = <0x03 0x05 0x04 0x139>; - phandle = <0xe1>; - }; - }; - - lcdc { - - lcdc-ctl { - rockchip,pins = <0x03 0x00 0x01 0x139 0x02 0x18 0x01 0x139 0x02 0x19 0x01 0x139 0x02 0x1a 0x01 0x139 0x02 0x1b 0x01 0x139 0x02 0x1c 0x01 0x139 0x02 0x1d 0x01 0x139 0x02 0x1e 0x01 0x139 0x02 0x1f 0x01 0x139 0x03 0x01 0x01 0x139 0x03 0x02 0x01 0x139 0x03 0x03 0x01 0x139 0x03 0x04 0x01 0x139 0x03 0x05 0x01 0x139 0x03 0x06 0x01 0x139 0x03 0x07 0x01 0x139 0x03 0x08 0x01 0x139 0x03 0x09 0x01 0x139 0x03 0x0a 0x01 0x139 0x03 0x0b 0x01 0x139 0x03 0x0c 0x01 0x139 0x03 0x0d 0x01 0x139 0x03 0x0e 0x01 0x139 0x03 0x0f 0x01 0x139 0x03 0x10 0x01 0x139 0x03 0x13 0x01 0x139 0x03 0x11 0x01 0x139 0x03 0x12 0x01 0x139>; - phandle = <0x39>; - }; - }; - - pdm { - - pdmm0-clk { - rockchip,pins = <0x01 0x06 0x03 0x139>; - phandle = <0xe2>; - }; - - pdmm0-clk1 { - rockchip,pins = <0x01 0x04 0x03 0x139>; - phandle = <0xe3>; - }; - - pdmm0-sdi0 { - rockchip,pins = <0x01 0x0b 0x02 0x139>; - phandle = <0xe4>; - }; - - pdmm0-sdi1 { - rockchip,pins = <0x01 0x0a 0x03 0x139>; - phandle = <0xe5>; - }; - - pdmm0-sdi2 { - rockchip,pins = <0x01 0x09 0x03 0x139>; - phandle = <0xe6>; - }; - - pdmm0-sdi3 { - rockchip,pins = <0x01 0x08 0x03 0x139>; - phandle = <0xe7>; - }; - }; - - pmic { - - pmic_int { - rockchip,pins = <0x00 0x03 0x00 0x13b>; - phandle = <0x40>; - }; - - soc_slppin_gpio { - rockchip,pins = <0x00 0x02 0x00 0x13f>; - phandle = <0x43>; - }; - - soc_slppin_slp { - rockchip,pins = <0x00 0x02 0x01 0x13b>; - phandle = <0x41>; - }; - - soc_slppin_rst { - rockchip,pins = <0x00 0x02 0x02 0x139>; - }; - - spk_ctl_gpio { - rockchip,pins = <0x03 0x15 0x00 0x13b>; - phandle = <0x48>; - }; - }; - - pwm0 { - - pwm0m0-pins { - rockchip,pins = <0x00 0x0f 0x01 0x139>; - phandle = <0x50>; - }; - }; - - pwm1 { - - pwm1m0-pins { - rockchip,pins = <0x00 0x10 0x01 0x139>; - phandle = <0x51>; - }; - }; - - pwm2 { - - pwm2m0-pins { - rockchip,pins = <0x00 0x11 0x01 0x139>; - phandle = <0x52>; - }; - }; - - pwm3 { - - pwm3-pins { - rockchip,pins = <0x00 0x12 0x01 0x139>; - phandle = <0x53>; - }; - }; - - pwm4 { - - pwm4-pins { - rockchip,pins = <0x00 0x13 0x01 0x139>; - phandle = <0x115>; - }; - }; - - pwm5 { - - pwm5-pins { - rockchip,pins = <0x00 0x14 0x01 0x139>; - phandle = <0x116>; - }; - }; - - pwm6 { - - pwm6-pins { - rockchip,pins = <0x00 0x15 0x01 0x139>; - phandle = <0x117>; - }; - }; - - pwm7 { - - pwm7-pins { - rockchip,pins = <0x00 0x16 0x01 0x139>; - phandle = <0x118>; - }; - }; - - pwm8 { - - pwm8m0-pins { - rockchip,pins = <0x03 0x09 0x05 0x139>; - phandle = <0x119>; - }; - }; - - pwm9 { - - pwm9m0-pins { - rockchip,pins = <0x03 0x0a 0x05 0x139>; - phandle = <0x11a>; - }; - }; - - pwm10 { - - pwm10m0-pins { - rockchip,pins = <0x03 0x0d 0x05 0x139>; - phandle = <0x11b>; - }; - }; - - pwm11 { - - pwm11m0-pins { - rockchip,pins = <0x03 0x0e 0x05 0x139>; - phandle = <0x11c>; - }; - }; - - pwm12 { - - pwm12m0-pins { - rockchip,pins = <0x03 0x0f 0x02 0x139>; - phandle = <0x11d>; - }; - }; - - pwm13 { - - pwm13m0-pins { - rockchip,pins = <0x03 0x10 0x02 0x139>; - phandle = <0x11e>; - }; - }; - - pwm14 { - - pwm14m0-pins { - rockchip,pins = <0x03 0x14 0x01 0x139>; - phandle = <0x11f>; - }; - }; - - pwm15 { - - pwm15m0-pins { - rockchip,pins = <0x03 0x15 0x01 0x139>; - phandle = <0x120>; - }; - }; - - scr { - - scr-pins { - rockchip,pins = <0x01 0x02 0x03 0x139 0x01 0x07 0x03 0x13b 0x01 0x03 0x03 0x13b 0x01 0x05 0x03 0x139>; - phandle = <0xeb>; - }; - }; - - sdmmc0 { - - sdmmc0-bus4 { - rockchip,pins = <0x01 0x1d 0x01 0x13a 0x01 0x1e 0x01 0x13a 0x01 0x1f 0x01 0x13a 0x02 0x00 0x01 0x13a>; - phandle = <0xd0>; - }; - - sdmmc0-clk { - rockchip,pins = <0x02 0x02 0x01 0x13a>; - phandle = <0xd1>; - }; - - sdmmc0-cmd { - rockchip,pins = <0x02 0x01 0x01 0x13a>; - phandle = <0xd2>; - }; - - sdmmc0-det { - rockchip,pins = <0x00 0x04 0x01 0x13b>; - phandle = <0xd3>; - }; - }; - - sdmmc2 { - - sdmmc2m0-bus4 { - rockchip,pins = <0x03 0x16 0x03 0x13a 0x03 0x17 0x03 0x13a 0x03 0x18 0x03 0x13a 0x03 0x19 0x03 0x13a>; - phandle = <0xb0>; - }; - - sdmmc2m0-clk { - rockchip,pins = <0x03 0x1b 0x03 0x13a>; - phandle = <0xb2>; - }; - - sdmmc2m0-cmd { - rockchip,pins = <0x03 0x1a 0x03 0x13a>; - phandle = <0xb1>; - }; - }; - - spdif { - - spdifm1-tx { - rockchip,pins = <0x03 0x15 0x02 0x139>; - phandle = <0xe9>; - }; - }; - - spi0 { - - spi0m0-pins { - rockchip,pins = <0x00 0x0d 0x02 0x139 0x00 0x15 0x02 0x139 0x00 0x0e 0x02 0x139>; - phandle = <0xfe>; - }; - - spi0m0-cs0 { - rockchip,pins = <0x00 0x16 0x02 0x139>; - phandle = <0xfc>; - }; - - spi0m0-cs1 { - rockchip,pins = <0x00 0x14 0x02 0x139>; - phandle = <0xfd>; - }; - }; - - spi1 { - - spi1m1-pins { - rockchip,pins = <0x03 0x13 0x03 0x139 0x03 0x12 0x03 0x139 0x03 0x11 0x03 0x139>; - phandle = <0x100>; - }; - }; - - spi2 { - - spi2m0-pins { - rockchip,pins = <0x02 0x11 0x04 0x139 0x02 0x12 0x04 0x139 0x02 0x13 0x04 0x139>; - phandle = <0x105>; - }; - - spi2m0-cs0 { - rockchip,pins = <0x02 0x14 0x04 0x139>; - phandle = <0x103>; - }; - - spi2m0-cs1 { - rockchip,pins = <0x02 0x15 0x04 0x139>; - phandle = <0x104>; - }; - }; - - spi3 { - - spi3m0-pins { - rockchip,pins = <0x04 0x0b 0x04 0x139 0x04 0x08 0x04 0x139 0x04 0x0a 0x04 0x139>; - phandle = <0x109>; - }; - - spi3m0-cs0 { - rockchip,pins = <0x04 0x06 0x04 0x139>; - phandle = <0x107>; - }; - - spi3m0-cs1 { - rockchip,pins = <0x04 0x07 0x04 0x139>; - phandle = <0x108>; - }; - }; - - tsadc { - - tsadc-shutorg { - rockchip,pins = <0x00 0x01 0x02 0x139>; - phandle = <0x124>; - }; - }; - - uart0 { - - uart0-xfer { - rockchip,pins = <0x00 0x10 0x03 0x13b 0x00 0x11 0x03 0x13b>; - phandle = <0x4f>; - }; - }; - - uart1 { - - uart1m0-xfer { - rockchip,pins = <0x02 0x0b 0x02 0x13b 0x02 0x0c 0x02 0x13b>; - phandle = <0x10b>; - }; - }; - - uart2 { - - uart2m0-xfer { - rockchip,pins = <0x00 0x18 0x01 0x13b 0x00 0x19 0x01 0x13b>; - phandle = <0x10c>; - }; - }; - - uart3 { - - uart3m1-xfer { - rockchip,pins = <0x03 0x10 0x04 0x13b 0x03 0x0f 0x04 0x13b>; - phandle = <0x10d>; - }; - }; - - uart4 { - - uart4m1-xfer { - rockchip,pins = <0x03 0x09 0x04 0x13b 0x03 0x0a 0x04 0x13b>; - phandle = <0x10e>; - }; - }; - - uart5 { - - uart5m0-xfer { - rockchip,pins = <0x02 0x01 0x03 0x13b 0x02 0x02 0x03 0x13b>; - phandle = <0x10f>; - }; - }; - - uart6 { - - uart6m0-xfer { - rockchip,pins = <0x02 0x03 0x03 0x13b 0x02 0x04 0x03 0x13b>; - phandle = <0x110>; - }; - }; - - uart7 { - - uart7m1-xfer { - rockchip,pins = <0x03 0x15 0x04 0x13b 0x03 0x14 0x04 0x13b>; - phandle = <0x111>; - }; - }; - - uart8 { - - uart8m0-xfer { - rockchip,pins = <0x02 0x16 0x02 0x13b 0x02 0x15 0x03 0x13b>; - phandle = <0x112>; - }; - - uart8m0-ctsn { - rockchip,pins = <0x02 0x0a 0x03 0x139>; - phandle = <0x113>; - }; - - uart8m0-rtsn { - rockchip,pins = <0x02 0x09 0x03 0x139>; - phandle = <0x155>; - }; - }; - - uart9 { - - uart9m1-xfer { - rockchip,pins = <0x04 0x16 0x04 0x13b 0x04 0x15 0x04 0x13b>; - phandle = <0x114>; - }; - }; - - spi0-hs { - - spi0m0-pins { - rockchip,pins = <0x00 0x0d 0x02 0x140 0x00 0x15 0x02 0x140 0x00 0x0e 0x02 0x140>; - phandle = <0xff>; - }; - }; - - spi1-hs { - - spi1m1-pins { - rockchip,pins = <0x03 0x13 0x03 0x140 0x03 0x12 0x03 0x140 0x03 0x11 0x03 0x140>; - phandle = <0x101>; - }; - }; - - spi2-hs { - - spi2m0-pins { - rockchip,pins = <0x02 0x11 0x04 0x140 0x02 0x12 0x04 0x140 0x02 0x13 0x04 0x140>; - phandle = <0x106>; - }; - }; - - spi3-hs { - - spi3m0-pins { - rockchip,pins = <0x04 0x0b 0x04 0x140 0x04 0x08 0x04 0x140 0x04 0x0a 0x04 0x140>; - phandle = <0x10a>; - }; - }; - - gpio-func { - - tsadc-gpio-func { - rockchip,pins = <0x00 0x01 0x00 0x139>; - phandle = <0x123>; - }; - }; - - usb { - - vcc5v0-host-en { - rockchip,pins = <0x00 0x06 0x00 0x139>; - phandle = <0x150>; - }; - - vcc5v0-otg-en { - rockchip,pins = <0x00 0x05 0x00 0x139>; - phandle = <0x151>; - }; - - vcc-hub-reset-en { - rockchip,pins = <0x01 0x04 0x00 0x139>; - phandle = <0x15a>; - }; - }; - - headphone { - - hp-det { - rockchip,pins = <0x03 0x12 0x00 0x142>; - phandle = <0x148>; - }; - }; - - sdio-pwrseq { - - wifi-enable-h { - rockchip,pins = <0x03 0x1d 0x00 0x139>; - phandle = <0x153>; - }; - }; - - wireless-wlan { - - wifi-host-wake-irq { - rockchip,pins = <0x03 0x1c 0x00 0x142>; - phandle = <0x154>; - }; - }; - - wireless-bluetooth { - - uart8-gpios { - rockchip,pins = <0x02 0x09 0x00 0x139>; - phandle = <0x156>; - }; - }; - - touch { - - touch-gpio { - rockchip,pins = <0x00 0x0d 0x00 0x13b 0x00 0x0e 0x00 0x139>; - phandle = <0xef>; - }; - }; - - mxc6655xa { - - mxc6655xa_irq_gpio { - rockchip,pins = <0x03 0x11 0x00 0x139>; - phandle = <0xfb>; - }; - }; - - pcie { - - pcie-pi6c-oe-en { - rockchip,pins = <0x03 0x07 0x00 0x139>; - phandle = <0x15b>; - }; - }; - - leds { - - leds-gpio { - rockchip,pins = <0x01 0x0a 0x00 0x139 0x01 0x09 0x00 0x139 0x01 0x08 0x00 0x139 0x02 0x11 0x00 0x139>; - phandle = <0x15d>; - }; - }; - - 4g { - - vcc-4g-power-en { - rockchip,pins = <0x03 0x03 0x00 0x139>; - phandle = <0x15c>; - }; - }; - - usb-typec { - - usbc0-int { - rockchip,pins = <0x00 0x11 0x00 0x13b>; - phandle = <0x4b>; - }; - - vcc5v0-typec0-en { - rockchip,pins = <0x00 0x05 0x00 0x139>; - }; - }; - }; - - audiopwmout-diff { - status = "disabled"; - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "rockchip,audiopwmout-diff"; - simple-audio-card,mclk-fs = <0x100>; - simple-audio-card,bitclock-master = <0x143>; - simple-audio-card,frame-master = <0x143>; - - simple-audio-card,cpu { - sound-dai = <0x144>; - }; - - simple-audio-card,codec { - sound-dai = <0x145>; - phandle = <0x143>; - }; - }; - - dc-12v { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xb71b00>; - regulator-max-microvolt = <0xb71b00>; - phandle = <0x14f>; - }; - - hdmi-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,mclk-fs = <0x80>; - simple-audio-card,name = "rockchip,hdmi"; - status = "okay"; - - simple-audio-card,cpu { - sound-dai = <0x146>; - }; - - simple-audio-card,codec { - sound-dai = <0x147>; - }; - }; - - rk-headset { - status = "disabled"; - compatible = "rockchip_headset"; - headset_gpio = <0x4a 0x12 0x01>; - pinctrl-names = "default"; - pinctrl-0 = <0x148>; - }; - - dummy-codec { - status = "disabled"; - compatible = "rockchip,dummy-codec"; - #sound-dai-cells = <0x00>; - phandle = <0x14a>; - }; - - pdm-mic-array { - status = "disabled"; - compatible = "simple-audio-card"; - simple-audio-card,name = "rockchip,pdm-mic-array"; - - simple-audio-card,cpu { - sound-dai = <0x149>; - }; - - simple-audio-card,codec { - sound-dai = <0x14a>; - }; - }; - - rk809-sound { - status = "okay"; - compatible = "rockchip,multicodecs-card"; - rockchip,card-name = "rockchip-rk809"; - rockchip,format = "i2s"; - rockchip,mclk-fs = <0x100>; - rockchip,cpu = <0xe8>; - rockchip,codec = <0x14b>; - }; - - spdif-sound { - status = "okay"; - compatible = "simple-audio-card"; - simple-audio-card,name = "ROCKCHIP,SPDIF"; - - simple-audio-card,cpu { - sound-dai = <0x14c>; - }; - - simple-audio-card,codec { - sound-dai = <0x14d>; - }; - }; - - spdif-out { - status = "okay"; - compatible = "linux,spdif-dit"; - #sound-dai-cells = <0x00>; - phandle = <0x14d>; - }; - - vad-sound { - status = "disabled"; - compatible = "rockchip,multicodecs-card"; - rockchip,card-name = "rockchip,rk3568-vad"; - rockchip,cpu = <0xe8>; - rockchip,codec = <0x14b 0x14e>; - }; - - vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - vin-supply = <0x14f>; - phandle = <0x46>; - }; - - vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-max-microvolt = <0x4c4b40>; - vin-supply = <0x14f>; - phandle = <0x3e>; - }; - - vcc5v0-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <0x3f 0x06 0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0x150>; - regulator-name = "vcc5v0_host"; - regulator-always-on; - regulator-boot-on; - phandle = <0x136>; - }; - - vcc5v0-otg-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <0x3f 0x05 0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0x151>; - regulator-name = "vcc5v0_otg"; - phandle = <0x4c>; - }; - - vcc3v3-lcd0-n { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_lcd0_n"; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3-lcd1-n { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_lcd1_n"; - regulator-boot-on; - status = "disabled"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - test-power { - status = "okay"; - }; - - chosen { - // linux,initrd-end = <0x00 0xaacf15d>; - // linux,initrd-start = <0x00 0xa200000>; - bootargs = "storagemedia=emmc androidboot.storagemedia=emmc androidboot.mode=normal androidboot.verifiedbootstate=orange rw rootwait earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 root=PARTLABEL=rootfs rootfstype=ext4 overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 swiotlb=0x10000 net.ifnames=0 comm-05/20/2025 androidboot.fwver=ddr-v1.21-2d653b3476,spl-v1.14,bl31-v1.44,bl32-v2.12,uboot--boot"; - }; - - fiq-debugger { - compatible = "rockchip,fiq-debugger"; - rockchip,serial-id = <0x02>; - rockchip,wake-irq = <0x00>; - rockchip,irq-mode-enable = <0x01>; - rockchip,baudrate = <0x16e360>; - interrupts = <0x00 0xfc 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0x10c>; - status = "okay"; - }; - - debug@fd904000 { - compatible = "rockchip,debug"; - reg = <0x00 0xfd904000 0x00 0x1000 0x00 0xfd905000 0x00 0x1000 0x00 0xfd906000 0x00 0x1000 0x00 0xfd907000 0x00 0x1000>; - }; - - cspmu@fd90c000 { - compatible = "rockchip,cspmu"; - reg = <0x00 0xfd90c000 0x00 0x1000 0x00 0xfd90d000 0x00 0x1000 0x00 0xfd90e000 0x00 0x1000 0x00 0xfd90f000 0x00 0x1000>; - }; - - adc-keys { - compatible = "adc-keys"; - io-channels = <0x49 0x00>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <0x1b7740>; - poll-interval = <0x64>; - - recovery-key { - label = "F12"; - linux,code = <0x58>; - press-threshold-microvolt = <0x6d6>; - }; - - vol-down-key { - label = "volume down"; - linux,code = <0x72>; - press-threshold-microvolt = <0x48a1c>; - }; - - menu-key { - label = "menu"; - linux,code = <0x8b>; - press-threshold-microvolt = <0xef420>; - }; - - back-key { - label = "back"; - linux,code = <0x9e>; - press-threshold-microvolt = <0x13eb9c>; - }; - }; - - vcc2v5-ddr { - compatible = "regulator-fixed"; - regulator-name = "vcc2v5-sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x2625a0>; - regulator-max-microvolt = <0x2625a0>; - vin-supply = <0x46>; - }; - - pcie30-avdd0v9 { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xdbba0>; - regulator-max-microvolt = <0xdbba0>; - vin-supply = <0x46>; - }; - - pcie30-avdd1v8 { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - vin-supply = <0x46>; - }; - - gpio-regulator { - compatible = "regulator-gpio"; - regulator-name = "pcie30_3v3"; - regulator-min-microvolt = <0x186a0>; - regulator-max-microvolt = <0x325aa0>; - gpios = <0x3f 0x1c 0x00>; - gpios-states = <0x01>; - states = <0x186a0 0x00 0x325aa0 0x01>; - phandle = <0xc2>; - }; - - vcc3v3-bu { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_bu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - vin-supply = <0x3e>; - }; - - sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <0x152 0x01>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <0x153>; - post-power-on-delay-ms = <0x64>; - reset-gpios = <0x4a 0x1d 0x01>; - status = "okay"; - phandle = <0xb3>; - }; - - wireless-wlan { - compatible = "wlan-platdata"; - rockchip,grf = <0x3b>; - wifi_chip_type = "ap6256"; - pinctrl-names = "default"; - pinctrl-0 = <0x154>; - WIFI,host_wake_irq = <0x4a 0x1c 0x00>; - status = "okay"; - }; - - wireless-bluetooth { - compatible = "bluetooth-platdata"; - clocks = <0x152 0x01>; - clock-names = "ext_clock"; - uart_rts_gpios = <0x91 0x09 0x01>; - pinctrl-names = "default\0rts_gpio"; - pinctrl-0 = <0x155>; - pinctrl-1 = <0x156>; - BT,reset_gpio = <0x4a 0x00 0x00>; - BT,wake_gpio = <0x4a 0x02 0x00>; - BT,wake_host_irq = <0x4a 0x01 0x00>; - status = "okay"; - }; - - flash-led { - compatible = "led,rgb13h"; - label = "pwm-flash-led"; - led-max-microamp = <0x4e20>; - flash-max-microamp = <0x4e20>; - flash-max-timeout-us = <0xf4240>; - pwms = <0x157 0x00 0x61a8 0x00>; - rockchip,camera-module-index = <0x01>; - rockchip,camera-module-facing = "front"; - status = "disabled"; - }; - - vcc-camera-regulator { - compatible = "regulator-fixed"; - gpio = <0x102 0x03 0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0x158>; - regulator-name = "vcc_camera"; - enable-active-high; - status = "disabled"; - }; - - vcc-hub-reset-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <0x159 0x04 0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0x15a>; - regulator-name = "vcc_hub_reset_en"; - regulator-always-on; - }; - - pcie-pi6c-oe-regulator { - compatible = "regulator-fixed"; - gpio = <0x4a 0x07 0x01>; - pinctrl-names = "default"; - pinctrl-0 = <0x15b>; - regulator-name = "pcie_pi6c_oe_en"; - regulator-always-on; - }; - - vcc-4g-power-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <0x4a 0x03 0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0x15c>; - regulator-name = "vcc_4g_power_en"; - regulator-always-on; - }; - - leds { - status = "okay"; - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <0x15d>; - - power { - label = "firefly:blue:power"; - linux,default-trigger = "ir-power-click"; - default-state = "on"; - gpios = <0x159 0x0a 0x00>; - }; - - user { - label = "firefly:yellow:user"; - linux,default-trigger = "ir-user-click"; - default-state = "off"; - gpios = <0x159 0x09 0x00>; - }; - - diy1 { - label = "firefly:green:diy"; - linux,default-trigger = "ir-user-click"; - default-state = "off"; - gpios = <0x159 0x08 0x00>; - }; - - diy2 { - label = "firefly:yellow:diy"; - linux,default-trigger = "ir-user-click"; - default-state = "off"; - gpios = <0x91 0x11 0x00>; - }; - }; -}; \ No newline at end of file diff --git a/configs/vms_bkp/linux-aarch64-rk3568_smp1.toml b/configs/vms_bkp/linux-aarch64-rk3568_smp1.toml deleted file mode 100644 index 69217e45..00000000 --- a/configs/vms_bkp/linux-aarch64-rk3568_smp1.toml +++ /dev/null @@ -1,86 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 2 -# Guest vm name. -name = "linux" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 1 -# The physical CPU ids. -phys_cpu_ids = [0x00] -# Guest vm physical cpu sets. -phys_cpu_sets = [1] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x8008_0000 -# The location of image: "memory" | "fs". -# Load from memory. -image_location = "memory" -# The load address of the kernel image. -kernel_load_addr = 0x8008_0000 -## The file path of the kernel image. -kernel_path = "/path/Image" -## The file path of the device tree blob (DTB). -dtb_load_addr = 0x8000_0000 -dtb_path = "/path/linux-aarch64-rk3568_smp1.dtb" -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x8000_0000, 0x6000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL -] -# -# Device specifications -# -[devices] -# The interrupt mode. -interrupt_mode = "passthrough" -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - # [ - # "peripherals 1", - # 0xf000_0000, - # 0xf000_0000, - # 0xe66_0000, - # 0x1, - # ], - # [ - # "peripherals 2", - # 0xfe67_0000, - # 0xfe67_0000, - # 0x99_0000, - # 0x1, - # ], - [ - "all peripherals", - 0xf0000000, - 0xf0000000, - 0xf000000, - 0x1, - ], - [ - "PCIe related", - 0x3_0000_0000, - 0x3_0000_0000, - 0xd000_0000, - 0x1, - ], - [ - "ramoops, scmi-shmem, etc.", - 0x100000, - 0x100000, - 0x200000, - 0x1, - ], -] diff --git a/configs/vms_bkp/linux-aarch64-rk3568_smp2.dts b/configs/vms_bkp/linux-aarch64-rk3568_smp2.dts deleted file mode 100644 index 5475dbe6..00000000 --- a/configs/vms_bkp/linux-aarch64-rk3568_smp2.dts +++ /dev/null @@ -1,6108 +0,0 @@ -/dts-v1/; - -/memreserve/ 0x0000000008300000 0x000000000001c000; -/memreserve/ 0x000000000a200000 0x00000000008cf15d; -/ { - serial-number = "425ca8fc29ade692"; - compatible = "rockchip,rk3568-firefly-roc-pc-se\0rockchip,rk3568"; - interrupt-parent = <0x01>; - #address-cells = <0x02>; - #size-cells = <0x02>; - model = "Firefly RK3568-ROC-PC-SE HDMI (Linux)"; - - memory { - reg = <0x00 0x80000000 0x00 0x60000000>; - device_type = "memory"; - }; - - ddr3-params { - version = <0x100>; - expanded_version = <0x00>; - reserved = <0x00>; - freq_0 = <0x420>; - freq_1 = <0x144>; - freq_2 = <0x210>; - freq_3 = <0x30c>; - freq_4 = <0x00>; - freq_5 = <0x00>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - pd_dis_freq = <0x42a>; - sr_dis_freq = <0x320>; - dram_dll_dis_freq = <0x12c>; - phy_dll_dis_freq = <0x00>; - phy_dq_drv_odten = <0x21>; - phy_ca_drv_odten = <0x21>; - phy_clk_drv_odten = <0x21>; - dram_dq_drv_odten = <0x22>; - phy_dq_drv_odtoff = <0x21>; - phy_ca_drv_odtoff = <0x21>; - phy_clk_drv_odtoff = <0x21>; - dram_dq_drv_odtoff = <0x22>; - dram_odt = <0x78>; - phy_odt = <0xa7>; - phy_odt_puup_en = <0x01>; - phy_odt_pudn_en = <0x01>; - dram_dq_odt_en_freq = <0x14d>; - phy_odt_en_freq = <0x14d>; - phy_dq_sr_odten = <0x0f>; - phy_ca_sr_odten = <0x03>; - phy_clk_sr_odten = <0x00>; - phy_dq_sr_odtoff = <0x0f>; - phy_ca_sr_odtoff = <0x03>; - phy_clk_sr_odtoff = <0x00>; - ssmod_downspread = <0x00>; - ssmod_div = <0x00>; - ssmod_spread = <0x00>; - mode_2t = <0x00>; - speed_bin = <0x15>; - dram_ext_temp = <0x00>; - byte_map = <0xe4>; - dq_map_cs0_dq_l = <0x00>; - dq_map_cs0_dq_h = <0x00>; - dq_map_cs1_dq_l = <0x00>; - dq_map_cs1_dq_h = <0x00>; - phandle = <0xb7>; - }; - - ddr4-params { - version = <0x100>; - expanded_version = <0x00>; - reserved = <0x00>; - freq_0 = <0x420>; - freq_1 = <0x144>; - freq_2 = <0x210>; - freq_3 = <0x30c>; - freq_4 = <0x00>; - freq_5 = <0x00>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - pd_dis_freq = <0x42a>; - sr_dis_freq = <0x320>; - dram_dll_dis_freq = <0x271>; - phy_dll_dis_freq = <0x00>; - phy_dq_drv_odten = <0x25>; - phy_ca_drv_odten = <0x25>; - phy_clk_drv_odten = <0x25>; - dram_dq_drv_odten = <0x22>; - phy_dq_drv_odtoff = <0x25>; - phy_ca_drv_odtoff = <0x25>; - phy_clk_drv_odtoff = <0x25>; - dram_dq_drv_odtoff = <0x22>; - dram_odt = <0x78>; - phy_odt = <0x8b>; - phy_odt_puup_en = <0x01>; - phy_odt_pudn_en = <0x01>; - dram_dq_odt_en_freq = <0x1f4>; - phy_odt_en_freq = <0x1f4>; - phy_dq_sr_odten = <0x0e>; - phy_ca_sr_odten = <0x01>; - phy_clk_sr_odten = <0x01>; - phy_dq_sr_odtoff = <0x0e>; - phy_ca_sr_odtoff = <0x01>; - phy_clk_sr_odtoff = <0x01>; - ssmod_downspread = <0x00>; - ssmod_div = <0x00>; - ssmod_spread = <0x00>; - mode_2t = <0x00>; - speed_bin = <0x0c>; - dram_ext_temp = <0x00>; - byte_map = <0xe4>; - dq_map_cs0_dq_l = <0x22777788>; - dq_map_cs0_dq_h = <0xd7888877>; - dq_map_cs1_dq_l = <0x22777788>; - dq_map_cs1_dq_h = <0xd7888877>; - phandle = <0xb8>; - }; - - lpddr3-params { - version = <0x100>; - expanded_version = <0x00>; - reserved = <0x00>; - freq_0 = <0x420>; - freq_1 = <0x144>; - freq_2 = <0x210>; - freq_3 = <0x30c>; - freq_4 = <0x00>; - freq_5 = <0x00>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - pd_dis_freq = <0x42a>; - sr_dis_freq = <0x320>; - dram_dll_dis_freq = <0x00>; - phy_dll_dis_freq = <0x00>; - phy_dq_drv_odten = <0x25>; - phy_ca_drv_odten = <0x25>; - phy_clk_drv_odten = <0x27>; - dram_dq_drv_odten = <0x22>; - phy_dq_drv_odtoff = <0x25>; - phy_ca_drv_odtoff = <0x25>; - phy_clk_drv_odtoff = <0x27>; - dram_dq_drv_odtoff = <0x22>; - dram_odt = <0x78>; - phy_odt = <0x94>; - phy_odt_puup_en = <0x01>; - phy_odt_pudn_en = <0x01>; - dram_dq_odt_en_freq = <0x14d>; - phy_odt_en_freq = <0x14d>; - phy_dq_sr_odten = <0x0f>; - phy_ca_sr_odten = <0x01>; - phy_clk_sr_odten = <0x0f>; - phy_dq_sr_odtoff = <0x0f>; - phy_ca_sr_odtoff = <0x01>; - phy_clk_sr_odtoff = <0x0f>; - ssmod_downspread = <0x00>; - ssmod_div = <0x00>; - ssmod_spread = <0x00>; - mode_2t = <0x00>; - speed_bin = <0x00>; - dram_ext_temp = <0x00>; - byte_map = <0x8d>; - dq_map_cs0_dq_l = <0x00>; - dq_map_cs0_dq_h = <0x00>; - dq_map_cs1_dq_l = <0x00>; - dq_map_cs1_dq_h = <0x00>; - phandle = <0xb9>; - }; - - lpddr4-params { - version = <0x100>; - expanded_version = <0x00>; - reserved = <0x00>; - freq_0 = <0x618>; - freq_1 = <0x144>; - freq_2 = <0x210>; - freq_3 = <0x30c>; - freq_4 = <0x00>; - freq_5 = <0x00>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - pd_dis_freq = <0x42a>; - sr_dis_freq = <0x320>; - dram_dll_dis_freq = <0x00>; - phy_dll_dis_freq = <0x00>; - phy_dq_drv_odten = <0x1e>; - phy_ca_drv_odten = <0x26>; - phy_clk_drv_odten = <0x26>; - dram_dq_drv_odten = <0x28>; - phy_dq_drv_odtoff = <0x1e>; - phy_ca_drv_odtoff = <0x26>; - phy_clk_drv_odtoff = <0x26>; - dram_dq_drv_odtoff = <0x28>; - dram_odt = <0x50>; - phy_odt = <0x3c>; - phy_odt_puup_en = <0x00>; - phy_odt_pudn_en = <0x00>; - dram_dq_odt_en_freq = <0x320>; - phy_odt_en_freq = <0x320>; - phy_dq_sr_odten = <0x00>; - phy_ca_sr_odten = <0x0f>; - phy_clk_sr_odten = <0x0f>; - phy_dq_sr_odtoff = <0x00>; - phy_ca_sr_odtoff = <0x0f>; - phy_clk_sr_odtoff = <0x0f>; - ssmod_downspread = <0x00>; - ssmod_div = <0x00>; - ssmod_spread = <0x00>; - mode_2t = <0x00>; - speed_bin = <0x00>; - dram_ext_temp = <0x00>; - byte_map = <0xe4>; - dq_map_cs0_dq_l = <0x00>; - dq_map_cs0_dq_h = <0x00>; - dq_map_cs1_dq_l = <0x00>; - dq_map_cs1_dq_h = <0x00>; - lp4_ca_odt = <0x78>; - lp4_drv_pu_cal_odten = <0x01>; - lp4_drv_pu_cal_odtoff = <0x01>; - phy_lp4_drv_pulldown_en_odten = <0x00>; - phy_lp4_drv_pulldown_en_odtoff = <0x00>; - lp4_ca_odt_en_freq = <0x320>; - phy_lp4_cs_drv_odten = <0x00>; - phy_lp4_cs_drv_odtoff = <0x00>; - lp4_odte_ck_en = <0x01>; - lp4_odte_cs_en = <0x01>; - lp4_odtd_ca_en = <0x00>; - phy_lp4_dq_vref_odten = <0xa6>; - lp4_dq_vref_odten = <0x12c>; - lp4_ca_vref_odten = <0x17c>; - phy_lp4_dq_vref_odtoff = <0x1a4>; - lp4_dq_vref_odtoff = <0x1a4>; - lp4_ca_vref_odtoff = <0x1a4>; - phandle = <0xba>; - }; - - lpddr4x-params { - version = <0x100>; - expanded_version = <0x00>; - reserved = <0x00>; - freq_0 = <0x618>; - freq_1 = <0x144>; - freq_2 = <0x210>; - freq_3 = <0x30c>; - freq_4 = <0x00>; - freq_5 = <0x00>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - pd_dis_freq = <0x42a>; - sr_dis_freq = <0x320>; - dram_dll_dis_freq = <0x00>; - phy_dll_dis_freq = <0x00>; - phy_dq_drv_odten = <0x1d>; - phy_ca_drv_odten = <0x24>; - phy_clk_drv_odten = <0x24>; - dram_dq_drv_odten = <0x28>; - phy_dq_drv_odtoff = <0x1d>; - phy_ca_drv_odtoff = <0x24>; - phy_clk_drv_odtoff = <0x24>; - dram_dq_drv_odtoff = <0x28>; - dram_odt = <0x50>; - phy_odt = <0x3c>; - phy_odt_puup_en = <0x00>; - phy_odt_pudn_en = <0x00>; - dram_dq_odt_en_freq = <0x320>; - phy_odt_en_freq = <0x320>; - phy_dq_sr_odten = <0x00>; - phy_ca_sr_odten = <0x00>; - phy_clk_sr_odten = <0x00>; - phy_dq_sr_odtoff = <0x00>; - phy_ca_sr_odtoff = <0x00>; - phy_clk_sr_odtoff = <0x00>; - ssmod_downspread = <0x00>; - ssmod_div = <0x00>; - ssmod_spread = <0x00>; - mode_2t = <0x00>; - speed_bin = <0x00>; - dram_ext_temp = <0x00>; - byte_map = <0xe4>; - dq_map_cs0_dq_l = <0x00>; - dq_map_cs0_dq_h = <0x00>; - dq_map_cs1_dq_l = <0x00>; - dq_map_cs1_dq_h = <0x00>; - lp4_ca_odt = <0x78>; - lp4_drv_pu_cal_odten = <0x00>; - lp4_drv_pu_cal_odtoff = <0x00>; - phy_lp4_drv_pulldown_en_odten = <0x00>; - phy_lp4_drv_pulldown_en_odtoff = <0x00>; - lp4_ca_odt_en_freq = <0x320>; - phy_lp4_cs_drv_odten = <0x00>; - phy_lp4_cs_drv_odtoff = <0x00>; - lp4_odte_ck_en = <0x00>; - lp4_odte_cs_en = <0x00>; - lp4_odtd_ca_en = <0x00>; - phy_lp4_dq_vref_odten = <0xa6>; - lp4_dq_vref_odten = <0xe4>; - lp4_ca_vref_odten = <0x157>; - phy_lp4_dq_vref_odtoff = <0x1a4>; - lp4_dq_vref_odtoff = <0x1a4>; - lp4_ca_vref_odtoff = <0x157>; - phandle = <0xbb>; - }; - - aliases { - csi2dphy0 = "/csi2-dphy0"; - csi2dphy1 = "/csi2-dphy1"; - csi2dphy2 = "/csi2-dphy2"; - dsi0 = "/dsi@fe060000"; - dsi1 = "/dsi@fe070000"; - ethernet0 = "/ethernet@fe2a0000"; - ethernet1 = "/ethernet@fe010000"; - gpio0 = "/pinctrl/gpio0@fdd60000"; - gpio1 = "/pinctrl/gpio1@fe740000"; - gpio2 = "/pinctrl/gpio2@fe750000"; - gpio3 = "/pinctrl/gpio3@fe760000"; - gpio4 = "/pinctrl/gpio4@fe770000"; - i2c0 = "/i2c@fdd40000"; - i2c1 = "/i2c@fe5a0000"; - i2c2 = "/i2c@fe5b0000"; - i2c3 = "/i2c@fe5c0000"; - i2c4 = "/i2c@fe5d0000"; - i2c5 = "/i2c@fe5e0000"; - mmc0 = "/sdhci@fe310000"; - mmc1 = "/dwmmc@fe2b0000"; - mmc2 = "/dwmmc@fe2c0000"; - mmc3 = "/dwmmc@fe000000"; - serial0 = "/serial@fdd50000"; - serial1 = "/serial@fe650000"; - serial2 = "/serial@fe660000"; - serial3 = "/serial@fe670000"; - serial4 = "/serial@fe680000"; - serial5 = "/serial@fe690000"; - serial6 = "/serial@fe6a0000"; - serial7 = "/serial@fe6b0000"; - serial8 = "/serial@fe6c0000"; - serial9 = "/serial@fe6d0000"; - spi0 = "/spi@fe610000"; - spi1 = "/spi@fe620000"; - spi2 = "/spi@fe630000"; - spi3 = "/spi@fe640000"; - lvds0 = "/syscon@fdc60000/lvds"; - lvds1 = "/syscon@fdc60000/lvds1"; - }; - - cpus { - #address-cells = <0x02>; - #size-cells = <0x00>; - - // cpu@0 { - // device_type = "cpu"; - // compatible = "arm,cortex-a55"; - // reg = <0x00 0x00>; - // enable-method = "psci"; - // clocks = <0x02 0x00>; - // operating-points-v2 = <0x03>; - // cpu-idle-states = <0x04>; - // #cooling-cells = <0x02>; - // dynamic-power-coefficient = <0xbb>; - // cpu-supply = <0x05>; - // phandle = <0x0c>; - // }; - - // cpu@100 { - // device_type = "cpu"; - // compatible = "arm,cortex-a55"; - // reg = <0x00 0x100>; - // enable-method = "psci"; - // clocks = <0x02 0x00>; - // operating-points-v2 = <0x03>; - // cpu-idle-states = <0x04>; - // phandle = <0x0d>; - // }; - - cpu@200 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x00 0x200>; - enable-method = "psci"; - clocks = <0x02 0x00>; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04>; - phandle = <0x0e>; - }; - - cpu@300 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x00 0x300>; - enable-method = "psci"; - clocks = <0x02 0x00>; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04>; - phandle = <0x0f>; - }; - - idle-states { - entry-method = "psci"; - - cpu-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x10000>; - entry-latency-us = <0x64>; - exit-latency-us = <0x78>; - min-residency-us = <0x3e8>; - phandle = <0x04>; - }; - }; - }; - - cpu0-opp-table { - compatible = "operating-points-v2"; - opp-shared; - mbist-vmin = <0xc96a8 0xdbba0 0xe7ef0>; - nvmem-cells = <0x06 0x07 0x08 0x09 0x0a 0x0b>; - nvmem-cell-names = "leakage\0pvtm\0mbist-vmin\0opp-info\0specification_serial_number\0remark_spec_serial_number"; - rockchip,supported-hw; - rockchip,max-volt = <0x118c30>; - rockchip,pvtm-voltage-sel = <0x00 0x14820 0x00 0x14821 0x153d8 0x01 0x153d9 0x16378 0x02 0x16379 0x186a0 0x03>; - rockchip,pvtm-freq = <0x639c0>; - rockchip,pvtm-volt = <0xdbba0>; - rockchip,pvtm-ch = <0x00 0x05>; - rockchip,pvtm-sample-time = <0x3e8>; - rockchip,pvtm-number = <0x0a>; - rockchip,pvtm-error = <0x3e8>; - rockchip,pvtm-ref-temp = <0x28>; - rockchip,pvtm-temp-prop = <0x1a 0x1a>; - rockchip,thermal-zone = "soc-thermal"; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-adjust-volt = <0x00 0x7c8 0x124f8>; - phandle = <0x03>; - - opp-408000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x18519600>; - opp-microvolt = <0xcf850 0xcf850 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - - opp-600000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xcf850 0xcf850 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - - opp-816000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x30a32c00>; - opp-microvolt = <0xcf850 0xcf850 0x118c30>; - clock-latency-ns = <0x9c40>; - opp-suspend; - }; - - opp-1104000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x41cdb400>; - opp-microvolt = <0xdbba0 0xdbba0 0x118c30>; - opp-microvolt-L0 = <0xdbba0 0xdbba0 0x118c30>; - opp-microvolt-L1 = <0xcf850 0xcf850 0x118c30>; - opp-microvolt-L2 = <0xcf850 0xcf850 0x118c30>; - opp-microvolt-L3 = <0xcf850 0xcf850 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - - opp-1416000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x54667200>; - opp-microvolt = <0xfa3e8 0xfa3e8 0x118c30>; - opp-microvolt-L0 = <0xfa3e8 0xfa3e8 0x118c30>; - opp-microvolt-L1 = <0xee098 0xee098 0x118c30>; - opp-microvolt-L2 = <0xe7ef0 0xe7ef0 0x118c30>; - opp-microvolt-L3 = <0xe1d48 0xe1d48 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - - opp-1608000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x5fd82200>; - opp-microvolt = <0x10c8e0 0x10c8e0 0x118c30>; - opp-microvolt-L0 = <0x10c8e0 0x10c8e0 0x118c30>; - opp-microvolt-L1 = <0x100590 0x100590 0x118c30>; - opp-microvolt-L2 = <0xfa3e8 0xfa3e8 0x118c30>; - opp-microvolt-L3 = <0xf4240 0xf4240 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - - opp-1800000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x6b49d200>; - opp-microvolt = <0x118c30 0x118c30 0x118c30>; - opp-microvolt-L0 = <0x118c30 0x118c30 0x118c30>; - opp-microvolt-L1 = <0x10c8e0 0x10c8e0 0x118c30>; - opp-microvolt-L2 = <0x106738 0x106738 0x118c30>; - opp-microvolt-L3 = <0x100590 0x100590 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - - opp-1992000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x76bb8200>; - opp-microvolt = <0x118c30 0x118c30 0x118c30>; - opp-microvolt-L0 = <0x118c30 0x118c30 0x118c30>; - opp-microvolt-L1 = <0x118c30 0x118c30 0x118c30>; - opp-microvolt-L2 = <0x112a88 0x112a88 0x118c30>; - opp-microvolt-L3 = <0x10c8e0 0x10c8e0 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-1008000000 { - opp-supported-hw = <0x04 0xffff>; - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0xcf850 0xcf850 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-1416000000 { - opp-supported-hw = <0x04 0xffff>; - opp-hz = <0x00 0x54667200>; - opp-microvolt = <0xdbba0 0xdbba0 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - - opp-m-1608000000 { - opp-supported-hw = <0x02 0xffff>; - opp-hz = <0x00 0x5fd82200>; - opp-microvolt = <0xf4240 0xf4240 0x118c30>; - clock-latency-ns = <0x9c40>; - }; - }; - - arm-pmu { - compatible = "arm,cortex-a55-pmu\0arm,armv8-pmuv3"; - interrupts = <0x00 0xe4 0x04 0x00 0xe5 0x04 0x00 0xe6 0x04 0x00 0xe7 0x04>; - interrupt-affinity = <0x0c 0x0d 0x0e 0x0f>; - }; - - cpuinfo { - compatible = "rockchip,cpuinfo"; - nvmem-cells = <0x10 0x11 0x12>; - nvmem-cell-names = "id\0cpu-version\0cpu-code"; - }; - - display-subsystem { - compatible = "rockchip,display-subsystem"; - memory-region = <0x13 0x14>; - memory-region-names = "drm-logo\0drm-cubic-lut"; - ports = <0x15>; - devfreq = <0x16>; - - route { - - route-dsi0 { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x17>; - }; - - route-dsi1 { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x18>; - }; - - route-edp { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x19>; - }; - - route-hdmi { - status = "okay"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x1a>; - }; - - route-lvds { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x1b>; - }; - - route-rgb { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x1c>; - }; - }; - }; - - edac { - compatible = "rockchip,rk3568-edac"; - interrupts = <0x00 0xad 0x04 0x00 0xaf 0x04>; - interrupt-names = "ce\0ue"; - status = "disabled"; - }; - - firmware { - - scmi { - compatible = "arm,scmi-smc"; - shmem = <0x1d>; - arm,smc-id = <0x82000010>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - protocol@14 { - reg = <0x14>; - #clock-cells = <0x01>; - rockchip,clk-init = <0x41cdb400>; - phandle = <0x02>; - }; - }; - - sdei { - compatible = "arm,sdei-1.0"; - method = "smc"; - }; - }; - - mipi-csi2 { - compatible = "rockchip,rk3568-mipi-csi2"; - rockchip,hw = <0x1e>; - status = "disabled"; - }; - - mpp-srv { - compatible = "rockchip,mpp-service"; - rockchip,taskqueue-count = <0x06>; - rockchip,resetgroup-count = <0x06>; - status = "okay"; - phandle = <0x7b>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - drm-logo@00000000 { - compatible = "rockchip,drm-logo"; - reg = <0x00 0xedf00000 0x00 0x2e0000>; - phandle = <0x13>; - }; - - drm-cubic-lut@00000000 { - compatible = "rockchip,drm-cubic-lut"; - reg = <0x00 0xeff00000 0x00 0x8000>; - phandle = <0x14>; - }; - - ramoops@110000 { - compatible = "ramoops"; - reg = <0x00 0x110000 0x00 0xf0000>; - record-size = <0x20000>; - console-size = <0x80000>; - ftrace-size = <0x00>; - pmsg-size = <0x50000>; - }; - }; - - rockchip-suspend { - compatible = "rockchip,pm-rk3568"; - status = "okay"; - rockchip,sleep-debug-en = <0x01>; - rockchip,sleep-mode-config = <0x5ec>; - rockchip,wakeup-config = <0x10>; - }; - - rockchip-system-monitor { - compatible = "rockchip,system-monitor"; - rockchip,thermal-zone = "soc-thermal"; - }; - - thermal-zones { - - soc-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - sustainable-power = <0x389>; - thermal-sensors = <0x1f 0x00>; - - trips { - - trip-point-0 { - temperature = <0x124f8>; - hysteresis = <0x7d0>; - type = "passive"; - }; - - trip-point-1 { - temperature = <0x14c08>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x20>; - }; - - soc-crit { - temperature = <0x1c138>; - hysteresis = <0x7d0>; - type = "critical"; - }; - }; - - cooling-maps { - - map0 { - trip = <0x20>; - cooling-device = <0x0c 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; - - map1 { - trip = <0x20>; - cooling-device = <0x21 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; - }; - }; - - gpu-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - thermal-sensors = <0x1f 0x01>; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - arm,no-tick-in-suspend; - }; - - external-gmac0-clock { - compatible = "fixed-clock"; - clock-frequency = <0x7735940>; - clock-output-names = "gmac0_clkin"; - #clock-cells = <0x00>; - phandle = <0xc7>; - }; - - external-gmac1-clock { - compatible = "fixed-clock"; - clock-frequency = <0x7735940>; - clock-output-names = "gmac1_clkin"; - #clock-cells = <0x00>; - phandle = <0x92>; - }; - - xpcs-gmac0-clock { - compatible = "fixed-clock"; - clock-frequency = <0x7735940>; - clock-output-names = "clk_gmac0_xpcs_mii"; - #clock-cells = <0x00>; - }; - - xpcs-gmac1-clock { - compatible = "fixed-clock"; - clock-frequency = <0x7735940>; - clock-output-names = "clk_gmac1_xpcs_mii"; - #clock-cells = <0x00>; - }; - - i2s1-mclkin-rx { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0xbb8000>; - clock-output-names = "i2s1_mclkin_rx"; - }; - - i2s1-mclkin-tx { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0xbb8000>; - clock-output-names = "i2s1_mclkin_tx"; - }; - - i2s2-mclkin { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0xbb8000>; - clock-output-names = "i2s2_mclkin"; - }; - - i2s3-mclkin { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0xbb8000>; - clock-output-names = "i2s3_mclkin"; - }; - - mpll { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x2faf0800>; - clock-output-names = "mpll"; - }; - - xin24m { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - clock-output-names = "xin24m"; - }; - - xin32k { - compatible = "fixed-clock"; - clock-frequency = <0x8000>; - clock-output-names = "xin32k"; - #clock-cells = <0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0x22>; - }; - - scmi-shmem@10f000 { - compatible = "arm,scmi-shmem"; - reg = <0x00 0x10f000 0x00 0x100>; - phandle = <0x1d>; - }; - - sata@fc000000 { - compatible = "snps,dwc-ahci"; - reg = <0x00 0xfc000000 0x00 0x1000>; - clocks = <0x23 0x96 0x23 0x97 0x23 0x98>; - clock-names = "sata\0pmalive\0rxoob"; - interrupts = <0x00 0x5e 0x04>; - interrupt-names = "hostc"; - phys = <0x24 0x01>; - phy-names = "sata-phy"; - ports-implemented = <0x01>; - power-domains = <0x25 0x0f>; - status = "disabled"; - }; - - sata@fc400000 { - compatible = "snps,dwc-ahci"; - reg = <0x00 0xfc400000 0x00 0x1000>; - clocks = <0x23 0x9b 0x23 0x9c 0x23 0x9d>; - clock-names = "sata\0pmalive\0rxoob"; - interrupts = <0x00 0x5f 0x04>; - interrupt-names = "hostc"; - phys = <0x26 0x01>; - phy-names = "sata-phy"; - ports-implemented = <0x01>; - power-domains = <0x25 0x0f>; - status = "disabled"; - }; - - sata@fc800000 { - compatible = "snps,dwc-ahci"; - reg = <0x00 0xfc800000 0x00 0x1000>; - clocks = <0x23 0xa0 0x23 0xa1 0x23 0xa2>; - clock-names = "sata\0pmalive\0rxoob"; - interrupts = <0x00 0x60 0x04>; - interrupt-names = "hostc"; - phys = <0x27 0x01>; - phy-names = "sata-phy"; - ports-implemented = <0x01>; - power-domains = <0x25 0x0f>; - status = "okay"; - }; - - usbdrd { - compatible = "rockchip,rk3568-dwc3\0rockchip,rk3399-dwc3"; - clocks = <0x23 0xa6 0x23 0xa7 0x23 0xa5 0x23 0x7f>; - clock-names = "ref_clk\0suspend_clk\0bus_clk\0pipe_clk"; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - status = "okay"; - - dwc3@fcc00000 { - compatible = "snps,dwc3"; - reg = <0x00 0xfcc00000 0x00 0x400000>; - interrupts = <0x00 0xa9 0x04>; - dr_mode = "otg"; - phys = <0x28 0x24 0x04>; - phy-names = "usb2-phy\0usb3-phy"; - phy_type = "utmi_wide"; - power-domains = <0x25 0x0f>; - resets = <0x23 0x94>; - reset-names = "usb3-otg"; - snps,dis_enblslpm_quirk; - snps,dis-u1-entry-quirk; - snps,dis-u2-entry-quirk; - snps,dis-u2-freeclk-exists-quirk; - snps,dis-del-phy-power-chg-quirk; - snps,dis-tx-ipgap-linecheck-quirk; - snps,dis_rxdet_inp3_quirk; - snps,parkmode-disable-hs-quirk; - snps,parkmode-disable-ss-quirk; - quirk-skip-phy-init; - status = "okay"; - extcon = <0x29>; - usb-role-switch; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x2a>; - phandle = <0x4d>; - }; - }; - }; - }; - - usbhost { - compatible = "rockchip,rk3568-dwc3\0rockchip,rk3399-dwc3"; - clocks = <0x23 0xa9 0x23 0xaa 0x23 0xa8 0x23 0x7f>; - clock-names = "ref_clk\0suspend_clk\0bus_clk\0pipe_clk"; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - status = "okay"; - - dwc3@fd000000 { - compatible = "snps,dwc3"; - reg = <0x00 0xfd000000 0x00 0x400000>; - interrupts = <0x00 0xaa 0x04>; - dr_mode = "host"; - phys = <0x2b 0x26 0x04>; - phy-names = "usb2-phy\0usb3-phy"; - phy_type = "utmi_wide"; - power-domains = <0x25 0x0f>; - resets = <0x23 0x95>; - reset-names = "usb3-host"; - snps,dis_enblslpm_quirk; - snps,dis-u2-freeclk-exists-quirk; - snps,dis-del-phy-power-chg-quirk; - snps,dis-tx-ipgap-linecheck-quirk; - snps,dis_rxdet_inp3_quirk; - snps,parkmode-disable-hs-quirk; - snps,parkmode-disable-ss-quirk; - status = "okay"; - }; - }; - - interrupt-controller@fd400000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <0x03>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - interrupt-controller; - reg = <0x00 0xfd400000 0x00 0x10000 0x00 0xfd460000 0x00 0xc0000>; - interrupts = <0x01 0x09 0x04>; - phandle = <0x01>; - - interrupt-controller@fd440000 { - compatible = "arm,gic-v3-its"; - msi-controller; - #msi-cells = <0x01>; - reg = <0x00 0xfd440000 0x00 0x20000>; - status = "okay"; - phandle = <0xbe>; - }; - }; - - usb@fd800000 { - compatible = "generic-ehci"; - reg = <0x00 0xfd800000 0x00 0x40000>; - interrupts = <0x00 0x82 0x04>; - clocks = <0x23 0xbd 0x23 0xbe 0x23 0xbc 0x2c>; - clock-names = "usbhost\0arbiter\0pclk\0utmi"; - phys = <0x2d>; - phy-names = "usb2-phy"; - status = "okay"; - }; - - usb@fd840000 { - compatible = "generic-ohci"; - reg = <0x00 0xfd840000 0x00 0x40000>; - interrupts = <0x00 0x83 0x04>; - clocks = <0x23 0xbd 0x23 0xbe 0x23 0xbc 0x2c>; - clock-names = "usbhost\0arbiter\0pclk\0utmi"; - phys = <0x2d>; - phy-names = "usb2-phy"; - status = "okay"; - }; - - usb@fd880000 { - compatible = "generic-ehci"; - reg = <0x00 0xfd880000 0x00 0x40000>; - interrupts = <0x00 0x85 0x04>; - clocks = <0x23 0xbf 0x23 0xc0 0x23 0xbc 0x2c>; - clock-names = "usbhost\0arbiter\0pclk\0utmi"; - phys = <0x2e>; - phy-names = "usb2-phy"; - status = "okay"; - }; - - usb@fd8c0000 { - compatible = "generic-ohci"; - reg = <0x00 0xfd8c0000 0x00 0x40000>; - interrupts = <0x00 0x86 0x04>; - clocks = <0x23 0xbf 0x23 0xc0 0x23 0xbc 0x2c>; - clock-names = "usbhost\0arbiter\0pclk\0utmi"; - phys = <0x2e>; - phy-names = "usb2-phy"; - status = "okay"; - }; - - syscon@fda00000 { - compatible = "rockchip,rk3568-xpcs\0syscon"; - reg = <0x00 0xfda00000 0x00 0x200000>; - status = "disabled"; - }; - - syscon@fdc20000 { - compatible = "rockchip,rk3568-pmugrf\0syscon\0simple-mfd"; - reg = <0x00 0xfdc20000 0x00 0x10000>; - phandle = <0x3c>; - - io-domains { - compatible = "rockchip,rk3568-pmu-io-voltage-domain"; - status = "okay"; - pmuio1-supply = <0x2f>; - pmuio2-supply = <0x2f>; - vccio1-supply = <0x30>; - vccio3-supply = <0x31>; - vccio4-supply = <0x32>; - vccio5-supply = <0x33>; - vccio6-supply = <0x32>; - vccio7-supply = <0x33>; - }; - - reboot-mode { - compatible = "syscon-reboot-mode"; - offset = <0x200>; - mode-bootloader = <0x5242c301>; - mode-charge = <0x5242c30b>; - mode-fastboot = <0x5242c309>; - mode-loader = <0x5242c301>; - mode-normal = <0x5242c300>; - mode-recovery = <0x5242c303>; - mode-ums = <0x5242c30c>; - mode-panic = <0x5242c307>; - mode-watchdog = <0x5242c308>; - }; - }; - - syscon@fdc50000 { - compatible = "rockchip,rk3568-pipegrf\0syscon"; - reg = <0x00 0xfdc50000 0x00 0x1000>; - phandle = <0x12a>; - }; - - syscon@fdc60000 { - compatible = "rockchip,rk3568-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfdc60000 0x00 0x10000>; - phandle = <0x3b>; - - io-domains { - compatible = "rockchip,rk3568-io-voltage-domain"; - status = "disabled"; - }; - - lvds { - compatible = "rockchip,rk3568-lvds"; - phys = <0x34>; - phy-names = "phy"; - status = "disabled"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0x1b>; - status = "disabled"; - phandle = <0xa3>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0x35>; - status = "disabled"; - phandle = <0xa5>; - }; - }; - }; - }; - - lvds1 { - compatible = "rockchip,rk3568-lvds"; - phys = <0x36>; - phy-names = "phy"; - status = "disabled"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x37>; - phandle = <0xa4>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0x38>; - phandle = <0xa7>; - }; - }; - }; - }; - - rgb { - compatible = "rockchip,rk3568-rgb"; - pinctrl-names = "default"; - pinctrl-0 = <0x39>; - status = "disabled"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0x1c>; - status = "disabled"; - phandle = <0xa6>; - }; - }; - }; - }; - }; - - syscon@fdc70000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfdc70000 0x00 0x1000>; - phandle = <0x12b>; - }; - - syscon@fdc80000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfdc80000 0x00 0x1000>; - phandle = <0x12c>; - }; - - syscon@fdc90000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfdc90000 0x00 0x1000>; - phandle = <0x12d>; - }; - - syscon@fdca0000 { - compatible = "rockchip,rk3568-usb2phy-grf\0syscon"; - reg = <0x00 0xfdca0000 0x00 0x8000>; - phandle = <0x135>; - }; - - syscon@fdca8000 { - compatible = "rockchip,rk3568-usb2phy-grf\0syscon"; - reg = <0x00 0xfdca8000 0x00 0x8000>; - phandle = <0x137>; - }; - - syscon@fdcb0000 { - compatible = "rockchip,rk3568-edp-phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfdcb0000 0x00 0x100>; - clocks = <0x23 0x192>; - - edp-phy { - compatible = "rockchip,rk3568-edp-phy"; - clocks = <0x3a 0x29>; - clock-names = "refclk"; - #phy-cells = <0x00>; - status = "disabled"; - phandle = <0xae>; - }; - }; - - syscon@fdcb8000 { - compatible = "rockchip,pcie30-phy-grf\0syscon"; - reg = <0x00 0xfdcb8000 0x00 0x10000>; - phandle = <0x138>; - }; - - sram@fdcc0000 { - compatible = "mmio-sram"; - reg = <0x00 0xfdcc0000 0x00 0xb000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - ranges = <0x00 0x00 0xfdcc0000 0xb000>; - - rkvdec-sram@0 { - reg = <0x00 0xb000>; - phandle = <0x84>; - }; - }; - - clock-controller@fdd00000 { - compatible = "rockchip,rk3568-pmucru"; - reg = <0x00 0xfdd00000 0x00 0x1000>; - rockchip,grf = <0x3b>; - rockchip,pmugrf = <0x3c>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x3a 0x32>; - assigned-clock-parents = <0x3a 0x05>; - phandle = <0x3a>; - }; - - clock-controller@fdd20000 { - compatible = "rockchip,rk3568-cru"; - reg = <0x00 0xfdd20000 0x00 0x1000>; - rockchip,grf = <0x3b>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x3a 0x05 0x23 0x106 0x23 0x10b 0x3a 0x01 0x3a 0x2b 0x23 0x03 0x23 0x19b 0x23 0x09 0x23 0x19c 0x23 0x19d 0x23 0x1a1 0x23 0x19e 0x23 0x19f 0x23 0x1a0 0x23 0x04 0x23 0x10d 0x23 0x10e 0x23 0x173 0x23 0x174 0x23 0x175 0x23 0x176 0x23 0xc9 0x23 0xca 0x23 0x06 0x23 0x7e 0x23 0x7f 0x23 0x3d 0x23 0x41 0x23 0x45 0x23 0x49 0x23 0x4d 0x23 0x4d 0x23 0x55 0x23 0x51 0x23 0x5d 0x23 0xdd>; - assigned-clock-rates = <0x8000 0x11e1a300 0x11e1a300 0xbebc200 0x5f5e100 0x3b9aca00 0x1dcd6500 0x13d92d40 0xee6b280 0x7735940 0x5f5e100 0x3b9aca0 0x2faf080 0x17d7840 0x46cf7100 0x8f0d180 0x5f5e100 0x1dcd6500 0x17d78400 0x8f0d180 0x5f5e100 0x11e1a300 0x8f0d180 0x47868c00 0x17d78400 0x5f5e100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x1dcd6500>; - assigned-clock-parents = <0x3a 0x08 0x23 0x04 0x23 0x04>; - phandle = <0x23>; - }; - - i2c@fdd40000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xfdd40000 0x00 0x1000>; - clocks = <0x3a 0x07 0x3a 0x2d>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x2e 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x3d>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - - tcs4525@1c { - compatible = "tcs,tcs452x"; - reg = <0x1c>; - vin-supply = <0x3e>; - regulator-compatible = "fan53555-reg"; - regulator-name = "vdd_cpu"; - regulator-min-microvolt = <0xadf34>; - regulator-max-microvolt = <0x1535b0>; - regulator-ramp-delay = <0x8fc>; - fcs,suspend-voltage-selector = <0x01>; - regulator-boot-on; - regulator-always-on; - phandle = <0x05>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <0x3f>; - interrupts = <0x03 0x08>; - pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset"; - pinctrl-0 = <0x40>; - pinctrl-1 = <0x41 0x42>; - pinctrl-2 = <0x43 0x44>; - pinctrl-3 = <0x43 0x45>; - rockchip,system-power-controller; - wakeup-source; - #clock-cells = <0x01>; - clock-output-names = "rk808-clkout1\0rk808-clkout2"; - pmic-reset-func = <0x00>; - not-save-power-en = <0x01>; - vcc1-supply = <0x46>; - vcc2-supply = <0x46>; - vcc3-supply = <0x46>; - vcc4-supply = <0x46>; - vcc5-supply = <0x46>; - vcc6-supply = <0x46>; - vcc7-supply = <0x46>; - vcc8-supply = <0x46>; - vcc9-supply = <0x46>; - phandle = <0x152>; - - pwrkey { - status = "okay"; - }; - - pinctrl_rk8xx { - gpio-controller; - #gpio-cells = <0x02>; - - rk817_slppin_null { - pins = "gpio_slp"; - function = "pin_fun0"; - }; - - rk817_slppin_slp { - pins = "gpio_slp"; - function = "pin_fun1"; - phandle = <0x42>; - }; - - rk817_slppin_pwrdn { - pins = "gpio_slp"; - function = "pin_fun2"; - phandle = <0x44>; - }; - - rk817_slppin_rst { - pins = "gpio_slp"; - function = "pin_fun3"; - phandle = <0x45>; - }; - }; - - regulators { - - DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x7a120>; - regulator-max-microvolt = <0x149970>; - regulator-init-microvolt = <0xdbba0>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_logic"; - phandle = <0x75>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x7a120>; - regulator-max-microvolt = <0x149970>; - regulator-init-microvolt = <0xdbba0>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_gpu"; - phandle = <0x77>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_ddr"; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x7a120>; - regulator-max-microvolt = <0x149970>; - regulator-init-microvolt = <0xdbba0>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_npu"; - phandle = <0x71>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - LDO_REG1 { - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xdbba0>; - regulator-max-microvolt = <0xdbba0>; - regulator-name = "vdda0v9_image"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xdbba0>; - regulator-max-microvolt = <0xdbba0>; - regulator-name = "vdda_0v9"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xdbba0>; - regulator-max-microvolt = <0xdbba0>; - regulator-name = "vdda0v9_pmu"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xdbba0>; - }; - }; - - LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vccio_acodec"; - phandle = <0x30>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vccio_sd"; - phandle = <0x31>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - LDO_REG6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc3v3_pmu"; - phandle = <0x2f>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcca_1v8"; - phandle = <0x129>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - LDO_REG8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcca1v8_pmu"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG9 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcca1v8_image"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcc_1v8"; - phandle = <0x32>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - SWITCH_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc_3v3"; - phandle = <0x33>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - SWITCH_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc3v3_sd"; - phandle = <0xcf>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - - codec { - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk809-codec\0rockchip,rk817-codec"; - clocks = <0x23 0x1a3>; - clock-names = "mclk"; - assigned-clocks = <0x23 0x1a3 0x23 0x1a6>; - assigned-clock-rates = <0xbb8000>; - assigned-clock-parents = <0x23 0x48 0x23 0x48>; - pinctrl-names = "default\0spk_gpio"; - pinctrl-0 = <0x47>; - pinctrl-1 = <0x48>; - hp-volume = <0x03>; - spk-volume = <0x03>; - mic-in-differential; - board-spk-from-hp; - capture-volume = <0x00>; - io-channels = <0x49 0x07>; - hp-det-adc-value = <0x3e8>; - status = "okay"; - hp-adc-drift-scope = <0x64>; - phandle = <0x14b>; - }; - - rtc { - status = "disabled"; - }; - }; - - fusb302@22 { - compatible = "fcs,fusb302"; - reg = <0x22>; - interrupt-parent = <0x3f>; - fcs,int_n = <0x3f 0x11 0x08>; - fusb340-switch-gpios = <0x4a 0x12 0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0x4b>; - vbus-supply = <0x4c>; - status = "okay"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - - endpoint@0 { - remote-endpoint = <0x4d>; - phandle = <0x2a>; - }; - }; - }; - - connector { - compatible = "usb-c-connector"; - label = "USB-C"; - data-role = "dual"; - power-role = "dual"; - try-power-role = "sink"; - op-sink-microwatt = <0xf4240>; - sink-pdos = <0x40190fa>; - source-pdos = <0x4019096>; - }; - }; - }; - - serial@fdd50000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfdd50000 0x00 0x100>; - interrupts = <0x00 0x74 0x04>; - clocks = <0x3a 0x0b 0x3a 0x2c>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x00 0x4e 0x01>; - pinctrl-names = "default"; - pinctrl-0 = <0x4f>; - status = "disabled"; - }; - - pwm@fdd70000 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfdd70000 0x00 0x10>; - interrupts = <0x00 0x52 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x50>; - clocks = <0x3a 0x0d 0x3a 0x30>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fdd70010 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfdd70010 0x00 0x10>; - interrupts = <0x00 0x52 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x51>; - clocks = <0x3a 0x0d 0x3a 0x30>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fdd70020 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfdd70020 0x00 0x10>; - interrupts = <0x00 0x52 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x52>; - clocks = <0x3a 0x0d 0x3a 0x30>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fdd70030 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfdd70030 0x00 0x10>; - interrupts = <0x00 0x52 0x04 0x00 0x56 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x53>; - clocks = <0x3a 0x0d 0x3a 0x30>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - power-management@fdd90000 { - compatible = "rockchip,rk3568-pmu\0syscon\0simple-mfd"; - reg = <0x00 0xfdd90000 0x00 0x1000>; - - power-controller { - compatible = "rockchip,rk3568-power-controller"; - #power-domain-cells = <0x01>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x25>; - - pd_npu@6 { - reg = <0x06>; - clocks = <0x23 0x27 0x23 0x25 0x23 0x26>; - pm_qos = <0x54>; - }; - - pd_gpu@7 { - reg = <0x07>; - clocks = <0x23 0x19 0x23 0x1a>; - pm_qos = <0x55>; - }; - - pd_vi@8 { - reg = <0x08>; - clocks = <0x23 0xcc 0x23 0xcd>; - pm_qos = <0x56 0x57 0x58>; - }; - - pd_vo@9 { - reg = <0x09>; - clocks = <0x23 0xda 0x23 0xdb 0x23 0xdc>; - pm_qos = <0x59 0x5a 0x5b>; - }; - - pd_rga@10 { - reg = <0x0a>; - clocks = <0x23 0xf1 0x23 0xf2>; - pm_qos = <0x5c 0x5d 0x5e 0x5f 0x60 0x61>; - }; - - pd_vpu@11 { - reg = <0x0b>; - clocks = <0x23 0xed>; - pm_qos = <0x62>; - }; - - pd_rkvdec@13 { - clocks = <0x23 0x107>; - reg = <0x0d>; - pm_qos = <0x63>; - }; - - pd_rkvenc@14 { - reg = <0x0e>; - clocks = <0x23 0x102>; - pm_qos = <0x64 0x65 0x66>; - }; - - pd_pipe@15 { - reg = <0x0f>; - clocks = <0x23 0x7f>; - pm_qos = <0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e>; - }; - }; - }; - - pvtm@fde00000 { - compatible = "rockchip,rk3568-core-pvtm"; - reg = <0x00 0xfde00000 0x00 0x100>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - pvtm@0 { - reg = <0x00>; - clocks = <0x23 0x13 0x23 0x1c2>; - clock-names = "clk\0pclk"; - resets = <0x23 0x1a 0x23 0x19>; - reset-names = "rts\0rst-p"; - thermal-zone = "soc-thermal"; - }; - }; - - npu@fde40000 { - compatible = "rockchip,rk3568-rknpu\0rockchip,rknpu"; - reg = <0x00 0xfde40000 0x00 0x10000>; - interrupts = <0x00 0x97 0x04>; - clocks = <0x02 0x02 0x23 0x23 0x23 0x28 0x23 0x29>; - clock-names = "scmi_clk\0clk\0aclk\0hclk"; - assigned-clocks = <0x23 0x23>; - assigned-clock-rates = <0x23c34600>; - resets = <0x23 0x2b 0x23 0x2c>; - reset-names = "srst_a\0srst_h"; - power-domains = <0x25 0x06>; - operating-points-v2 = <0x6f>; - iommus = <0x70>; - status = "okay"; - rknpu-supply = <0x71>; - }; - - npu-opp-table { - compatible = "operating-points-v2"; - mbist-vmin = <0xc96a8 0xdbba0 0xe7ef0>; - nvmem-cells = <0x72 0x07 0x08 0x73 0x0a 0x0b>; - nvmem-cell-names = "leakage\0pvtm\0mbist-vmin\0opp-info\0specification_serial_number\0remark_spec_serial_number"; - rockchip,supported-hw; - rockchip,max-volt = <0xf4240>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-adjust-volt = <0x00 0x3e8 0xc350>; - rockchip,pvtm-voltage-sel = <0x00 0x14820 0x00 0x14821 0x153d8 0x01 0x153d9 0x16378 0x02 0x16379 0x186a0 0x03>; - rockchip,pvtm-ch = <0x00 0x05>; - phandle = <0x6f>; - - opp-200000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0xbebc200>; - opp-microvolt = <0xcf850 0xcf850 0xf4240>; - }; - - opp-300000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x11b3dc40>; - opp-microvolt = <0xcf850 0xcf850 0xf4240>; - }; - - opp-400000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0xcf850 0xcf850 0xf4240>; - }; - - opp-600000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xcf850 0xcf850 0xf4240>; - }; - - opp-700000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x29b92700>; - opp-microvolt = <0xd59f8 0xd59f8 0xf4240>; - opp-microvolt-L0 = <0xd59f8 0xd59f8 0xf4240>; - opp-microvolt-L1 = <0xcf850 0xcf850 0xf4240>; - opp-microvolt-L2 = <0xcf850 0xcf850 0xf4240>; - opp-microvolt-L3 = <0xcf850 0xcf850 0xf4240>; - }; - - opp-800000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x2faf0800>; - opp-microvolt = <0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L0 = <0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L1 = <0xdbba0 0xdbba0 0xf4240>; - opp-microvolt-L2 = <0xd59f8 0xd59f8 0xf4240>; - opp-microvolt-L3 = <0xd59f8 0xd59f8 0xf4240>; - }; - - opp-900000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x35a4e900>; - opp-microvolt = <0xee098 0xee098 0xf4240>; - opp-microvolt-L0 = <0xee098 0xee098 0xf4240>; - opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L2 = <0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L3 = <0xdbba0 0xdbba0 0xf4240>; - }; - - opp-1000000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x3b9aca00>; - opp-microvolt = <0xf4240 0xf4240 0xf4240>; - opp-microvolt-L0 = <0xf4240 0xf4240 0xf4240>; - opp-microvolt-L1 = <0xee098 0xee098 0xf4240>; - opp-microvolt-L2 = <0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L3 = <0xe1d48 0xe1d48 0xf4240>; - status = "disabled"; - }; - - opp-j-600000000 { - opp-supported-hw = <0x04 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xdbba0 0xdbba0 0xf4240>; - }; - - opp-m-900000000 { - opp-supported-hw = <0x02 0xffff>; - opp-hz = <0x00 0x35a4e900>; - opp-microvolt = <0xe1d48 0xe1d48 0xf4240>; - }; - }; - - bus-npu { - compatible = "rockchip,rk3568-bus"; - rockchip,busfreq-policy = "clkfreq"; - clocks = <0x02 0x02>; - clock-names = "bus"; - operating-points-v2 = <0x74>; - status = "okay"; - bus-supply = <0x75>; - pvtm-supply = <0x05>; - }; - - bus-npu-opp-table { - compatible = "operating-points-v2"; - opp-shared; - nvmem-cells = <0x07>; - nvmem-cell-names = "pvtm"; - rockchip,pvtm-voltage-sel = <0x00 0x14820 0x00 0x14821 0x16378 0x01 0x16379 0x186a0 0x02>; - rockchip,pvtm-ch = <0x00 0x05>; - phandle = <0x74>; - - opp-700000000 { - opp-hz = <0x00 0x29b92700>; - opp-microvolt = <0xdbba0>; - opp-microvolt-L0 = <0xdbba0>; - opp-microvolt-L1 = <0xd59f8>; - opp-microvolt-L2 = <0xd59f8>; - }; - - opp-900000000 { - opp-hz = <0x00 0x35a4e900>; - opp-microvolt = <0xdbba0>; - }; - - opp-1000000000 { - opp-hz = <0x00 0x3b9aca00>; - opp-microvolt = <0xe7ef0>; - opp-microvolt-L0 = <0xe7ef0>; - opp-microvolt-L1 = <0xe1d48>; - opp-microvolt-L2 = <0xdbba0>; - }; - }; - - iommu@fde4b000 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfde4b000 0x00 0x40>; - interrupts = <0x00 0x97 0x04>; - interrupt-names = "rknpu_mmu"; - clocks = <0x23 0x28 0x23 0x29>; - clock-names = "aclk\0iface"; - power-domains = <0x25 0x06>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0x70>; - }; - - gpu@fde60000 { - compatible = "arm,mali-bifrost"; - reg = <0x00 0xfde60000 0x00 0x4000>; - interrupts = <0x00 0x27 0x04 0x00 0x29 0x04 0x00 0x28 0x04>; - interrupt-names = "GPU\0MMU\0JOB"; - upthreshold = <0x28>; - downdifferential = <0x0a>; - clocks = <0x02 0x01 0x23 0x1b>; - clock-names = "clk_mali\0clk_gpu"; - power-domains = <0x25 0x07>; - #cooling-cells = <0x02>; - operating-points-v2 = <0x76>; - status = "okay"; - mali-supply = <0x77>; - phandle = <0x21>; - - power-model { - compatible = "simple-power-model"; - leakage-range = <0x05 0x0f>; - ls = <0xffffa23e 0x5927 0x00>; - static-coefficient = <0x186a0>; - dynamic-coefficient = <0x3b9>; - ts = <0xfffe56a6 0xf87a 0xfffffab5 0x14>; - thermal-zone = "gpu-thermal"; - }; - }; - - opp-table2 { - compatible = "operating-points-v2"; - mbist-vmin = <0xc96a8 0xdbba0 0xe7ef0>; - nvmem-cells = <0x78 0x07 0x08 0x79 0x0a 0x0b>; - nvmem-cell-names = "leakage\0pvtm\0mbist-vmin\0opp-info\0specification_serial_number\0remark_spec_serial_number"; - rockchip,supported-hw; - rockchip,max-volt = <0xf4240>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-adjust-volt = <0x00 0x320 0xc350>; - rockchip,pvtm-voltage-sel = <0x00 0x14820 0x00 0x14821 0x153d8 0x01 0x153d9 0x16378 0x02 0x16379 0x186a0 0x03>; - rockchip,pvtm-ch = <0x00 0x05>; - phandle = <0x76>; - - opp-200000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0xbebc200>; - opp-microvolt = <0xcf850 0xcf850 0xf4240>; - }; - - opp-300000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x11e1a300>; - opp-microvolt = <0xcf850 0xcf850 0xf4240>; - }; - - opp-400000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0xcf850 0xcf850 0xf4240>; - }; - - opp-600000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xdbba0 0xdbba0 0xf4240>; - opp-microvolt-L0 = <0xdbba0 0xdbba0 0xf4240>; - opp-microvolt-L1 = <0xd59f8 0xd59f8 0xf4240>; - opp-microvolt-L2 = <0xcf850 0xcf850 0xf4240>; - opp-microvolt-L3 = <0xcf850 0xcf850 0xf4240>; - }; - - opp-700000000 { - opp-supported-hw = <0xfb 0xffff>; - opp-hz = <0x00 0x29b92700>; - opp-microvolt = <0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L0 = <0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L1 = <0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240>; - opp-microvolt-L3 = <0xd59f8 0xd59f8 0xf4240>; - }; - - opp-800000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x2faf0800>; - opp-microvolt = <0xf4240 0xf4240 0xf4240>; - opp-microvolt-L0 = <0xf4240 0xf4240 0xf4240>; - opp-microvolt-L1 = <0xee098 0xee098 0xf4240>; - opp-microvolt-L2 = <0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L3 = <0xe1d48 0xe1d48 0xf4240>; - }; - - opp-j-600000000 { - opp-supported-hw = <0x04 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xdbba0 0xdbba0 0xf4240>; - }; - - opp-m-800000000 { - opp-supported-hw = <0x02 0xffff>; - opp-hz = <0x00 0x2faf0800>; - opp-microvolt = <0xe7ef0 0xe7ef0 0xf4240>; - }; - }; - - pvtm@fde80000 { - compatible = "rockchip,rk3568-gpu-pvtm"; - reg = <0x00 0xfde80000 0x00 0x100>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - pvtm@1 { - reg = <0x01>; - clocks = <0x23 0x1e 0x23 0x1d>; - clock-names = "clk\0pclk"; - resets = <0x23 0x24 0x23 0x23>; - reset-names = "rts\0rst-p"; - thermal-zone = "gpu-thermal"; - }; - }; - - pvtm@fde90000 { - compatible = "rockchip,rk3568-npu-pvtm"; - reg = <0x00 0xfde90000 0x00 0x100>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - pvtm@2 { - reg = <0x02>; - clocks = <0x23 0x2b 0x23 0x2a 0x23 0x25>; - clock-names = "clk\0pclk\0hclk"; - resets = <0x23 0x2e 0x23 0x2d>; - reset-names = "rts\0rst-p"; - thermal-zone = "soc-thermal"; - }; - }; - - vdpu@fdea0400 { - compatible = "rockchip,vpu-decoder-v2"; - reg = <0x00 0xfdea0400 0x00 0x400>; - interrupts = <0x00 0x8b 0x04>; - interrupt-names = "irq_dec"; - clocks = <0x23 0xee 0x23 0xef>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - resets = <0x23 0x11a 0x23 0x11b>; - reset-names = "video_a\0video_h"; - iommus = <0x7a>; - power-domains = <0x25 0x0b>; - rockchip,srv = <0x7b>; - rockchip,taskqueue-node = <0x00>; - rockchip,resetgroup-node = <0x00>; - status = "okay"; - }; - - iommu@fdea0800 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdea0800 0x00 0x40>; - interrupts = <0x00 0x8a 0x04>; - interrupt-names = "vdpu_mmu"; - clock-names = "aclk\0iface"; - clocks = <0x23 0xee 0x23 0xef>; - power-domains = <0x25 0x0b>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0x7a>; - }; - - rk_rga@fdeb0000 { - compatible = "rockchip,rga2"; - reg = <0x00 0xfdeb0000 0x00 0x1000>; - interrupts = <0x00 0x5a 0x04>; - clocks = <0x23 0xf3 0x23 0xf4 0x23 0xf5>; - clock-names = "aclk_rga\0hclk_rga\0clk_rga"; - power-domains = <0x25 0x0a>; - status = "okay"; - }; - - ebc@fdec0000 { - compatible = "rockchip,rk3568-ebc-tcon"; - reg = <0x00 0xfdec0000 0x00 0x5000>; - interrupts = <0x00 0x11 0x04>; - clocks = <0x23 0xf9 0x23 0xfa>; - clock-names = "hclk\0dclk"; - power-domains = <0x25 0x0a>; - rockchip,grf = <0x3b>; - pinctrl-names = "default"; - pinctrl-0 = <0x7c>; - status = "disabled"; - }; - - jpegd@fded0000 { - compatible = "rockchip,rkv-jpeg-decoder-v1"; - reg = <0x00 0xfded0000 0x00 0x400>; - interrupts = <0x00 0x3e 0x04>; - clocks = <0x23 0xfb 0x23 0xfc>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - rockchip,disable-auto-freq; - resets = <0x23 0x12c 0x23 0x12d>; - reset-names = "video_a\0video_h"; - iommus = <0x7d>; - rockchip,srv = <0x7b>; - rockchip,taskqueue-node = <0x01>; - rockchip,resetgroup-node = <0x01>; - power-domains = <0x25 0x0a>; - status = "okay"; - }; - - iommu@fded0480 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfded0480 0x00 0x40>; - interrupts = <0x00 0x3d 0x04>; - interrupt-names = "jpegd_mmu"; - clock-names = "aclk\0iface"; - clocks = <0x23 0xfb 0x23 0xfc>; - power-domains = <0x25 0x0a>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0x7d>; - }; - - vepu@fdee0000 { - compatible = "rockchip,vpu-encoder-v2"; - reg = <0x00 0xfdee0000 0x00 0x400>; - interrupts = <0x00 0x40 0x04>; - clocks = <0x23 0xfd 0x23 0xfe>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - rockchip,disable-auto-freq; - resets = <0x23 0x12e 0x23 0x12f>; - reset-names = "video_a\0video_h"; - iommus = <0x7e>; - rockchip,srv = <0x7b>; - rockchip,taskqueue-node = <0x02>; - rockchip,resetgroup-node = <0x02>; - power-domains = <0x25 0x0a>; - status = "okay"; - }; - - iommu@fdee0800 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdee0800 0x00 0x40>; - interrupts = <0x00 0x3f 0x04>; - interrupt-names = "vepu_mmu"; - clock-names = "aclk\0iface"; - clocks = <0x23 0xfd 0x23 0xfe>; - power-domains = <0x25 0x0a>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0x7e>; - }; - - iep@fdef0000 { - compatible = "rockchip,iep-v2"; - reg = <0x00 0xfdef0000 0x00 0x500>; - interrupts = <0x00 0x38 0x04>; - clocks = <0x23 0xf6 0x23 0xf7 0x23 0xf8>; - clock-names = "aclk\0hclk\0sclk"; - resets = <0x23 0x127 0x23 0x128 0x23 0x129>; - reset-names = "rst_a\0rst_h\0rst_s"; - power-domains = <0x25 0x0a>; - rockchip,srv = <0x7b>; - rockchip,taskqueue-node = <0x05>; - rockchip,resetgroup-node = <0x05>; - iommus = <0x7f>; - status = "okay"; - }; - - iommu@fdef0800 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdef0800 0x00 0x100>; - interrupts = <0x00 0x38 0x04>; - interrupt-names = "iep_mmu"; - clocks = <0x23 0xf6 0x23 0xf7>; - clock-names = "aclk\0iface"; - #iommu-cells = <0x00>; - power-domains = <0x25 0x0a>; - status = "okay"; - phandle = <0x7f>; - }; - - eink@fdf00000 { - compatible = "rockchip,rk3568-eink-tcon"; - reg = <0x00 0xfdf00000 0x00 0x74>; - interrupts = <0x00 0xb2 0x04>; - clocks = <0x23 0xff 0x23 0x100>; - clock-names = "pclk\0hclk"; - status = "disabled"; - }; - - rkvenc@fdf40000 { - compatible = "rockchip,rkv-encoder-v1"; - reg = <0x00 0xfdf40000 0x00 0x400>; - interrupts = <0x00 0x8c 0x04>; - interrupt-names = "irq_enc"; - clocks = <0x23 0x103 0x23 0x104 0x23 0x105>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - rockchip,normal-rates = <0x11b3dc40 0x00 0x11b3dc40>; - resets = <0x23 0x133 0x23 0x134 0x23 0x135>; - reset-names = "video_a\0video_h\0video_core"; - assigned-clocks = <0x23 0x103 0x23 0x105>; - assigned-clock-rates = <0x11b3dc40 0x11b3dc40>; - iommus = <0x80>; - node-name = "rkvenc"; - rockchip,srv = <0x7b>; - rockchip,taskqueue-node = <0x03>; - rockchip,resetgroup-node = <0x03>; - power-domains = <0x25 0x0e>; - operating-points-v2 = <0x81>; - status = "okay"; - venc-supply = <0x75>; - }; - - rkvenc-opp-table { - compatible = "operating-points-v2"; - nvmem-cells = <0x07>; - nvmem-cell-names = "pvtm"; - rockchip,pvtm-voltage-sel = <0x00 0x14820 0x00 0x14821 0x16378 0x01 0x16379 0x186a0 0x02>; - rockchip,pvtm-ch = <0x00 0x05>; - phandle = <0x81>; - - opp-297000000 { - opp-hz = <0x00 0x11b3dc40>; - opp-microvolt = <0xdbba0>; - opp-microvolt-L0 = <0xdbba0>; - opp-microvolt-L1 = <0xd59f8>; - opp-microvolt-L2 = <0xd59f8>; - }; - - opp-400000000 { - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0xe7ef0>; - opp-microvolt-L0 = <0xe7ef0>; - opp-microvolt-L1 = <0xe1d48>; - opp-microvolt-L2 = <0xdbba0>; - }; - }; - - iommu@fdf40f00 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdf40f00 0x00 0x40 0x00 0xfdf40f40 0x00 0x40>; - interrupts = <0x00 0x8d 0x04 0x00 0x8e 0x04>; - interrupt-names = "rkvenc_mmu0\0rkvenc_mmu1"; - clocks = <0x23 0x103 0x23 0x104>; - clock-names = "aclk\0iface"; - rockchip,disable-mmu-reset; - rockchip,enable-cmd-retry; - #iommu-cells = <0x00>; - power-domains = <0x25 0x0e>; - status = "okay"; - phandle = <0x80>; - }; - - rkvdec@fdf80200 { - compatible = "rockchip,rkv-decoder-rk3568\0rockchip,rkv-decoder-v2"; - reg = <0x00 0xfdf80200 0x00 0x400 0x00 0xfdf80100 0x00 0x100>; - reg-names = "regs\0link"; - interrupts = <0x00 0x5b 0x04>; - interrupt-names = "irq_dec"; - clocks = <0x23 0x108 0x23 0x109 0x23 0x10a 0x23 0x10b 0x23 0x10c>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_cabac\0clk_core\0clk_hevc_cabac"; - rockchip,normal-rates = <0x11b3dc40 0x00 0x11b3dc40 0x11b3dc40 0x23c34600>; - rockchip,advanced-rates = <0x179a7b00 0x00 0x179a7b00 0x179a7b00 0x23c34600>; - rockchip,default-max-load = <0x1fe000>; - resets = <0x23 0x142 0x23 0x143 0x23 0x144 0x23 0x145 0x23 0x146>; - assigned-clocks = <0x23 0x108 0x23 0x10a 0x23 0x10b 0x23 0x10c>; - assigned-clock-rates = <0x11b3dc40 0x11b3dc40 0x11b3dc40 0x11b3dc40>; - reset-names = "video_a\0video_h\0video_cabac\0video_core\0video_hevc_cabac"; - power-domains = <0x25 0x0d>; - operating-points-v2 = <0x82>; - vdec-supply = <0x75>; - iommus = <0x83>; - rockchip,srv = <0x7b>; - rockchip,taskqueue-node = <0x04>; - rockchip,resetgroup-node = <0x04>; - rockchip,sram = <0x84>; - rockchip,rcb-iova = <0x10000000 0x10000>; - rockchip,rcb-min-width = <0x200>; - rockchip,task-capacity = <0x10>; - status = "okay"; - }; - - rkvdec-opp-table { - compatible = "operating-points-v2"; - nvmem-cells = <0x85 0x07>; - nvmem-cell-names = "leakage\0pvtm"; - rockchip,leakage-voltage-sel = <0x01 0x50 0x00 0x51 0xfe 0x01>; - rockchip,pvtm-voltage-sel = <0x00 0x14820 0x00 0x14821 0x186a0 0x01>; - rockchip,pvtm-ch = <0x00 0x05>; - phandle = <0x82>; - - opp-297000000 { - opp-hz = <0x00 0x11b3dc40>; - opp-microvolt = <0xdbba0>; - opp-microvolt-L0 = <0xdbba0>; - opp-microvolt-L1 = <0xd59f8>; - }; - - opp-400000000 { - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0xdbba0>; - }; - }; - - iommu@fdf80800 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdf80800 0x00 0x40 0x00 0xfdf80840 0x00 0x40>; - interrupts = <0x00 0x5c 0x04>; - interrupt-names = "rkvdec_mmu"; - clocks = <0x23 0x108 0x23 0x109>; - clock-names = "aclk\0iface"; - power-domains = <0x25 0x0d>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0x83>; - }; - - mipi-csi2-hw@fdfb0000 { - compatible = "rockchip,rk3568-mipi-csi2-hw"; - reg = <0x00 0xfdfb0000 0x00 0x10000>; - reg-names = "csihost_regs"; - interrupts = <0x00 0x08 0x04 0x00 0x09 0x04>; - interrupt-names = "csi-intr1\0csi-intr2"; - clocks = <0x23 0xd5>; - clock-names = "pclk_csi2host"; - resets = <0x23 0xff>; - reset-names = "srst_csihost_p"; - status = "okay"; - phandle = <0x1e>; - }; - - rkcif@fdfe0000 { - compatible = "rockchip,rk3568-cif"; - reg = <0x00 0xfdfe0000 0x00 0x8000>; - reg-names = "cif_regs"; - interrupts = <0x00 0x92 0x04>; - interrupt-names = "cif-intr"; - clocks = <0x23 0xce 0x23 0xcf 0x23 0xd0 0x23 0xd1>; - clock-names = "aclk_cif\0hclk_cif\0dclk_cif\0iclk_cif_g"; - resets = <0x23 0xf7 0x23 0xf8 0x23 0xf9 0x23 0xfb 0x23 0xfa>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_d\0rst_cif_p\0rst_cif_i"; - assigned-clocks = <0x23 0xd0>; - assigned-clock-rates = <0x11e1a300>; - power-domains = <0x25 0x08>; - rockchip,grf = <0x3b>; - iommus = <0x86>; - status = "disabled"; - phandle = <0x87>; - }; - - iommu@fdfe0800 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdfe0800 0x00 0x100>; - interrupts = <0x00 0x92 0x04>; - interrupt-names = "cif_mmu"; - clocks = <0x23 0xce 0x23 0xcf>; - clock-names = "aclk\0iface"; - power-domains = <0x25 0x08>; - rockchip,disable-mmu-reset; - #iommu-cells = <0x00>; - status = "disabled"; - phandle = <0x86>; - }; - - rkcif_dvp { - compatible = "rockchip,rkcif-dvp"; - rockchip,hw = <0x87>; - status = "disabled"; - phandle = <0x88>; - }; - - rkcif_dvp_sditf { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x88>; - status = "disabled"; - }; - - rkcif_mipi_lvds { - compatible = "rockchip,rkcif-mipi-lvds"; - rockchip,hw = <0x87>; - status = "disabled"; - phandle = <0x89>; - }; - - rkcif_mipi_lvds_sditf { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x89>; - status = "disabled"; - }; - - rkisp@fdff0000 { - compatible = "rockchip,rk3568-rkisp"; - reg = <0x00 0xfdff0000 0x00 0x10000>; - interrupts = <0x00 0x39 0x04 0x00 0x3a 0x04 0x00 0x3c 0x04>; - interrupt-names = "mipi_irq\0mi_irq\0isp_irq"; - clocks = <0x23 0xd2 0x23 0xd3 0x23 0xd4>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp"; - resets = <0x23 0xfd 0x23 0xfc>; - reset-names = "isp\0isp-h"; - rockchip,grf = <0x3b>; - power-domains = <0x25 0x08>; - iommus = <0x8a>; - rockchip,iq-feature = <0x1bfb 0xfffe67ff>; - status = "okay"; - phandle = <0x8b>; - }; - - iommu@fdff1a00 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdff1a00 0x00 0x100>; - interrupts = <0x00 0x3b 0x04>; - interrupt-names = "isp_mmu"; - clocks = <0x23 0xd2 0x23 0xd3>; - clock-names = "aclk\0iface"; - power-domains = <0x25 0x08>; - #iommu-cells = <0x00>; - rockchip,disable-mmu-reset; - status = "okay"; - phandle = <0x8a>; - }; - - rkisp-vir0 { - compatible = "rockchip,rkisp-vir"; - rockchip,hw = <0x8b>; - status = "okay"; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x8c>; - phandle = <0x134>; - }; - }; - }; - - rkisp-vir1 { - compatible = "rockchip,rkisp-vir"; - rockchip,hw = <0x8b>; - status = "disabled"; - }; - - uio@fe010000 { - compatible = "rockchip,uio-gmac"; - reg = <0x00 0xfe010000 0x00 0x10000>; - rockchip,ethernet = <0x8d>; - status = "disabled"; - }; - - ethernet@fe010000 { - local-mac-address = [5e 4f fd 70 05 c6]; - compatible = "rockchip,rk3568-gmac\0snps,dwmac-4.20a"; - reg = <0x00 0xfe010000 0x00 0x10000>; - interrupts = <0x00 0x20 0x04 0x00 0x1d 0x04>; - interrupt-names = "macirq\0eth_wake_irq"; - rockchip,grf = <0x3b>; - clocks = <0x23 0x186 0x23 0x189 0x23 0x189 0x23 0xc7 0x23 0xc3 0x23 0xc4 0x23 0x189 0x23 0xc8 0x23 0xac 0x23 0xab>; - clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed\0ptp_ref\0pclk_xpcs\0clk_xpcs_eee"; - resets = <0x23 0xec>; - reset-names = "stmmaceth"; - snps,mixed-burst; - snps,tso; - snps,axi-config = <0x8e>; - snps,mtl-rx-config = <0x8f>; - snps,mtl-tx-config = <0x90>; - status = "okay"; - phy-mode = "rgmii"; - clock_in_out = "input"; - snps,reset-gpio = <0x91 0x19 0x01>; - snps,reset-active-low; - snps,reset-delays-us = <0x00 0x4e20 0x186a0>; - assigned-clocks = <0x23 0x189 0x23 0x186>; - assigned-clock-parents = <0x23 0x187 0x92>; - pinctrl-names = "default"; - pinctrl-0 = <0x93 0x94 0x95 0x96 0x97 0x98>; - tx_delay = <0x3e>; - rx_delay = <0x32>; - phy-handle = <0x99>; - phandle = <0x8d>; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <0x01>; - #size-cells = <0x00>; - - phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x00>; - led_status_value = <0x6940>; - phandle = <0x99>; - }; - }; - - stmmac-axi-config { - snps,wr_osr_lmt = <0x04>; - snps,rd_osr_lmt = <0x08>; - snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; - phandle = <0x8e>; - }; - - rx-queues-config { - snps,rx-queues-to-use = <0x01>; - phandle = <0x8f>; - - queue0 { - }; - }; - - tx-queues-config { - snps,tx-queues-to-use = <0x01>; - phandle = <0x90>; - - queue0 { - }; - }; - }; - - vop@fe040000 { - compatible = "rockchip,rk3568-vop"; - reg = <0x00 0xfe040000 0x00 0x3000 0x00 0xfe044000 0x00 0x1000>; - reg-names = "regs\0gamma_lut"; - rockchip,grf = <0x3b>; - interrupts = <0x00 0x94 0x04>; - clocks = <0x23 0xdd 0x23 0xde 0x23 0xdf 0x23 0xe0 0x23 0xe1>; - clock-names = "aclk_vop\0hclk_vop\0dclk_vp0\0dclk_vp1\0dclk_vp2"; - iommus = <0x9a>; - power-domains = <0x25 0x09>; - status = "okay"; - assigned-clocks = <0x23 0xdf 0x23 0xe0>; - assigned-clock-parents = <0x3a 0x02 0x23 0x05>; - disable-win-move; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x15>; - - port@0 { - rockchip,primary-plane = <0x04>; - rockchip,plane-mask = <0x15>; - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x9b>; - phandle = <0x17>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0x9c>; - phandle = <0x18>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0x9d>; - phandle = <0x19>; - }; - - endpoint@3 { - reg = <0x03>; - remote-endpoint = <0x9e>; - phandle = <0x1a>; - }; - }; - - port@1 { - rockchip,primary-plane = <0x05>; - rockchip,plane-mask = <0x22>; - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x01>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x9f>; - phandle = <0xa8>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xa0>; - phandle = <0xa9>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xa1>; - phandle = <0xaf>; - }; - - endpoint@3 { - reg = <0x03>; - remote-endpoint = <0xa2>; - phandle = <0xad>; - }; - - endpoint@4 { - reg = <0x04>; - remote-endpoint = <0xa3>; - phandle = <0x1b>; - }; - - endpoint@5 { - reg = <0x05>; - remote-endpoint = <0xa4>; - phandle = <0x37>; - }; - }; - - port@2 { - rockchip,primary-plane = <0x03>; - rockchip,plane-mask = <0x08>; - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x02>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0xa5>; - phandle = <0x35>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xa6>; - phandle = <0x1c>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xa7>; - phandle = <0x38>; - }; - }; - }; - }; - - iommu@fe043e00 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfe043e00 0x00 0x100 0x00 0xfe043f00 0x00 0x100>; - interrupts = <0x00 0x94 0x04>; - interrupt-names = "vop_mmu"; - clocks = <0x23 0xdd 0x23 0xde>; - clock-names = "aclk\0iface"; - #iommu-cells = <0x00>; - rockchip,disable-device-link-resume; - status = "okay"; - phandle = <0x9a>; - }; - - dsi@fe060000 { - compatible = "rockchip,rk3568-mipi-dsi"; - reg = <0x00 0xfe060000 0x00 0x10000>; - interrupts = <0x00 0x44 0x04>; - clocks = <0x23 0xe8 0x23 0xda>; - clock-names = "pclk\0hclk"; - resets = <0x23 0x110>; - reset-names = "apb"; - phys = <0x34>; - phy-names = "dphy"; - power-domains = <0x25 0x09>; - rockchip,grf = <0x3b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x17>; - status = "disabled"; - phandle = <0x9b>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xa8>; - status = "disabled"; - phandle = <0x9f>; - }; - }; - }; - }; - - dsi@fe070000 { - compatible = "rockchip,rk3568-mipi-dsi"; - reg = <0x00 0xfe070000 0x00 0x10000>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x23 0xe9 0x23 0xda>; - clock-names = "pclk\0hclk"; - resets = <0x23 0x111>; - reset-names = "apb"; - phys = <0x36>; - phy-names = "dphy"; - power-domains = <0x25 0x09>; - rockchip,grf = <0x3b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x18>; - status = "disabled"; - phandle = <0x9c>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xa9>; - status = "disabled"; - phandle = <0xa0>; - }; - }; - }; - }; - - hdmi@fe0a0000 { - compatible = "rockchip,rk3568-dw-hdmi"; - reg = <0x00 0xfe0a0000 0x00 0x20000>; - interrupts = <0x00 0x2d 0x04>; - clocks = <0x23 0xe6 0x23 0xe7 0x23 0x193 0x3a 0x02 0x23 0xde>; - clock-names = "iahb\0isfr\0cec\0ref\0hclk"; - power-domains = <0x25 0x09>; - reg-io-width = <0x04>; - rockchip,grf = <0x3b>; - #sound-dai-cells = <0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0xaa 0xab 0xac>; - status = "okay"; - phandle = <0x147>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x1a>; - status = "okay"; - phandle = <0x9e>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xad>; - status = "disabled"; - phandle = <0xa2>; - }; - }; - }; - }; - - edp@fe0c0000 { - compatible = "rockchip,rk3568-edp"; - reg = <0x00 0xfe0c0000 0x00 0x10000>; - interrupts = <0x00 0x12 0x04>; - clocks = <0x3a 0x29 0x23 0xea 0x23 0xeb 0x23 0xda>; - clock-names = "dp\0pclk\0spdif\0hclk"; - resets = <0x23 0x113 0x23 0x112>; - reset-names = "dp\0apb"; - phys = <0xae>; - phy-names = "dp"; - power-domains = <0x25 0x09>; - status = "disabled"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x19>; - status = "disabled"; - phandle = <0x9d>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xaf>; - status = "disabled"; - phandle = <0xa1>; - }; - }; - }; - }; - - nocp-cpu@fe102000 { - compatible = "rockchip,rk3568-nocp"; - reg = <0x00 0xfe102000 0x00 0x400>; - phandle = <0xb5>; - }; - - nocp-gpu-vpu-rga-venc@fe102400 { - compatible = "rockchip,rk3568-nocp"; - reg = <0x00 0xfe102400 0x00 0x400>; - }; - - nocp-vdec@fe102800 { - compatible = "rockchip,rk3568-nocp"; - reg = <0x00 0xfe102800 0x00 0x400>; - }; - - nocp-vi-usb-peri-pipe@fe102c00 { - compatible = "rockchip,rk3568-nocp"; - reg = <0x00 0xfe102c00 0x00 0x400>; - }; - - nocp-vo@fe103000 { - compatible = "rockchip,rk3568-nocp"; - reg = <0x00 0xfe103000 0x00 0x400>; - }; - - qos@fe128000 { - compatible = "syscon"; - reg = <0x00 0xfe128000 0x00 0x20>; - phandle = <0x55>; - }; - - qos@fe138080 { - compatible = "syscon"; - reg = <0x00 0xfe138080 0x00 0x20>; - phandle = <0x64>; - }; - - qos@fe138100 { - compatible = "syscon"; - reg = <0x00 0xfe138100 0x00 0x20>; - phandle = <0x65>; - }; - - qos@fe138180 { - compatible = "syscon"; - reg = <0x00 0xfe138180 0x00 0x20>; - phandle = <0x66>; - }; - - qos@fe148000 { - compatible = "syscon"; - reg = <0x00 0xfe148000 0x00 0x20>; - phandle = <0x56>; - }; - - qos@fe148080 { - compatible = "syscon"; - reg = <0x00 0xfe148080 0x00 0x20>; - phandle = <0x57>; - }; - - qos@fe148100 { - compatible = "syscon"; - reg = <0x00 0xfe148100 0x00 0x20>; - phandle = <0x58>; - }; - - qos@fe150000 { - compatible = "syscon"; - reg = <0x00 0xfe150000 0x00 0x20>; - phandle = <0x62>; - }; - - qos@fe158000 { - compatible = "syscon"; - reg = <0x00 0xfe158000 0x00 0x20>; - phandle = <0x5c>; - }; - - qos@fe158100 { - compatible = "syscon"; - reg = <0x00 0xfe158100 0x00 0x20>; - phandle = <0x5d>; - }; - - qos@fe158180 { - compatible = "syscon"; - reg = <0x00 0xfe158180 0x00 0x20>; - phandle = <0x5e>; - }; - - qos@fe158200 { - compatible = "syscon"; - reg = <0x00 0xfe158200 0x00 0x20>; - phandle = <0x5f>; - }; - - qos@fe158280 { - compatible = "syscon"; - reg = <0x00 0xfe158280 0x00 0x20>; - phandle = <0x60>; - }; - - qos@fe158300 { - compatible = "syscon"; - reg = <0x00 0xfe158300 0x00 0x20>; - phandle = <0x61>; - }; - - qos@fe180000 { - compatible = "syscon"; - reg = <0x00 0xfe180000 0x00 0x20>; - phandle = <0x54>; - }; - - qos@fe190000 { - compatible = "syscon"; - reg = <0x00 0xfe190000 0x00 0x20>; - phandle = <0x67>; - }; - - qos@fe190080 { - compatible = "syscon"; - reg = <0x00 0xfe190080 0x00 0x20>; - phandle = <0x68>; - }; - - qos@fe190100 { - compatible = "syscon"; - reg = <0x00 0xfe190100 0x00 0x20>; - phandle = <0x69>; - }; - - qos@fe190200 { - compatible = "syscon"; - reg = <0x00 0xfe190200 0x00 0x20>; - phandle = <0x6a>; - }; - - qos@fe190280 { - compatible = "syscon"; - reg = <0x00 0xfe190280 0x00 0x20>; - phandle = <0x6b>; - }; - - qos@fe190300 { - compatible = "syscon"; - reg = <0x00 0xfe190300 0x00 0x20>; - phandle = <0x6c>; - }; - - qos@fe190380 { - compatible = "syscon"; - reg = <0x00 0xfe190380 0x00 0x20>; - phandle = <0x6d>; - }; - - qos@fe190400 { - compatible = "syscon"; - reg = <0x00 0xfe190400 0x00 0x20>; - phandle = <0x6e>; - }; - - qos@fe198000 { - compatible = "syscon"; - reg = <0x00 0xfe198000 0x00 0x20>; - phandle = <0x63>; - }; - - qos@fe1a8000 { - compatible = "syscon"; - reg = <0x00 0xfe1a8000 0x00 0x20>; - phandle = <0x59>; - }; - - qos@fe1a8080 { - compatible = "syscon"; - reg = <0x00 0xfe1a8080 0x00 0x20>; - phandle = <0x5a>; - }; - - qos@fe1a8100 { - compatible = "syscon"; - reg = <0x00 0xfe1a8100 0x00 0x20>; - phandle = <0x5b>; - }; - - dwmmc@fe000000 { - compatible = "rockchip,rk3568-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xfe000000 0x00 0x4000>; - interrupts = <0x00 0x64 0x04>; - max-frequency = <0x8f0d180>; - clocks = <0x23 0xc1 0x23 0xc2 0x23 0x18e 0x23 0x18f>; - clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; - fifo-depth = <0x100>; - resets = <0x23 0xeb>; - reset-names = "reset"; - status = "okay"; - no-sd; - no-mmc; - bus-width = <0x04>; - disable-wp; - cap-sd-highspeed; - cap-sdio-irq; - keep-power-in-suspend; - pinctrl-names = "default"; - pinctrl-0 = <0xb0 0xb1 0xb2>; - sd-uhs-sdr104; - mmc-pwrseq = <0xb3>; - non-removable; - }; - - dfi@fe230000 { - reg = <0x00 0xfe230000 0x00 0x400>; - compatible = "rockchip,rk3568-dfi"; - rockchip,pmugrf = <0x3c>; - status = "okay"; - phandle = <0xb4>; - }; - - dmc { - compatible = "rockchip,rk3568-dmc"; - interrupts = <0x00 0x0a 0x04>; - interrupt-names = "complete"; - devfreq-events = <0xb4 0xb5>; - clocks = <0x02 0x03>; - clock-names = "dmc_clk"; - operating-points-v2 = <0xb6>; - vop-bw-dmc-freq = <0x00 0x11e 0x4f1a0 0x11f 0x1869f 0x80e80>; - vop-frame-bw-dmc-freq = <0x00 0x26c 0x4f1a0 0x26d 0x1869f 0xbe6e0>; - cpu-bw-dmc-freq = <0x00 0x15e 0x4f1a0 0x15f 0x190 0x80e80 0x191 0x1869f 0xbe6e0>; - upthreshold = <0x28>; - downdifferential = <0x14>; - system-status-level = <0x01 0x04 0x08 0x08 0x02 0x01 0x10 0x04 0x10000 0x04 0x1000 0x08 0x4000 0x08 0x2000 0x08 0xc00 0x08>; - auto-min-freq = <0x4f1a0>; - auto-freq-en = <0x01>; - #cooling-cells = <0x02>; - status = "okay"; - center-supply = <0x75>; - phandle = <0x16>; - }; - - dmc-fsp { - compatible = "rockchip,rk3568-dmc-fsp"; - debug_print_level = <0x00>; - ddr3_params = <0xb7>; - ddr4_params = <0xb8>; - lpddr3_params = <0xb9>; - lpddr4_params = <0xba>; - lpddr4x_params = <0xbb>; - status = "okay"; - }; - - dmc-opp-table { - compatible = "operating-points-v2"; - mbist-vmin = <0xc96a8 0xdbba0 0xe7ef0>; - nvmem-cells = <0x85 0x07 0x08 0xbc 0x0a 0x0b>; - nvmem-cell-names = "leakage\0pvtm\0mbist-vmin\0opp-info\0specification_serial_number\0remark_spec_serial_number"; - rockchip,supported-hw; - rockchip,max-volt = <0xf4240>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-adjust-volt = <0x00 0x618 0x124f8>; - rockchip,leakage-voltage-sel = <0x01 0x50 0x00 0x51 0xfe 0x01>; - rockchip,pvtm-voltage-sel = <0x00 0x14820 0x00 0x14821 0x186a0 0x01>; - rockchip,pvtm-ch = <0x00 0x05>; - phandle = <0xb6>; - - opp-1560000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x5cfbb600>; - opp-microvolt = <0xdbba0 0xdbba0 0xf4240>; - opp-microvolt-L0 = <0xdbba0 0xdbba0 0xf4240>; - opp-microvolt-L1 = <0xd59f8 0xd59f8 0xf4240>; - }; - - opp-j-m-1560000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x5cfbb600>; - opp-microvolt = <0xd59f8 0xd59f8 0xf4240>; - }; - }; - - pcie@fe260000 { - compatible = "rockchip,rk3568-pcie\0snps,dw-pcie"; - #address-cells = <0x03>; - #size-cells = <0x02>; - bus-range = <0x00 0x0f>; - clocks = <0x23 0x81 0x23 0x82 0x23 0x83 0x23 0x84 0x23 0x85>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux"; - device_type = "pci"; - interrupts = <0x00 0x4b 0x04 0x00 0x4a 0x04 0x00 0x49 0x04 0x00 0x48 0x04 0x00 0x47 0x04>; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - #interrupt-cells = <0x01>; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - interrupt-map = <0x00 0x00 0x00 0x01 0xbd 0x00 0x00 0x00 0x00 0x02 0xbd 0x01 0x00 0x00 0x00 0x03 0xbd 0x02 0x00 0x00 0x00 0x04 0xbd 0x03>; - linux,pci-domain = <0x00>; - num-ib-windows = <0x06>; - num-viewport = <0x08>; - num-ob-windows = <0x02>; - max-link-speed = <0x02>; - msi-map = <0x00 0xbe 0x00 0x1000>; - num-lanes = <0x01>; - phys = <0x27 0x02>; - phy-names = "pcie-phy"; - power-domains = <0x25 0x0f>; - ranges = <0x800 0x00 0xf4000000 0x00 0xf4000000 0x00 0x100000 0x81000000 0x00 0xf4100000 0x00 0xf4100000 0x00 0x100000 0x82000000 0x00 0xf4200000 0x00 0xf4200000 0x00 0x1e00000 0xc3000000 0x03 0x00 0x03 0x00 0x00 0x40000000>; - reg = <0x03 0xc0000000 0x00 0x400000 0x00 0xfe260000 0x00 0x10000>; - reg-names = "pcie-dbi\0pcie-apb"; - resets = <0x23 0xa1>; - reset-names = "pipe"; - status = "disabled"; - - legacy-interrupt-controller { - interrupt-controller; - #address-cells = <0x00>; - #interrupt-cells = <0x01>; - interrupt-parent = <0x01>; - interrupts = <0x00 0x48 0x01>; - phandle = <0xbd>; - }; - }; - - pcie@fe270000 { - compatible = "rockchip,rk3568-pcie\0snps,dw-pcie"; - #address-cells = <0x03>; - #size-cells = <0x02>; - bus-range = <0x10 0x1f>; - clocks = <0x23 0x88 0x23 0x89 0x23 0x8a 0x23 0x8b 0x23 0x8c>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux"; - device_type = "pci"; - interrupts = <0x00 0xa0 0x04 0x00 0x9f 0x04 0x00 0x9e 0x04 0x00 0x9d 0x04 0x00 0x9c 0x04>; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - #interrupt-cells = <0x01>; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - interrupt-map = <0x00 0x00 0x00 0x01 0xbf 0x00 0x00 0x00 0x00 0x02 0xbf 0x01 0x00 0x00 0x00 0x03 0xbf 0x02 0x00 0x00 0x00 0x04 0xbf 0x03>; - linux,pci-domain = <0x01>; - num-ib-windows = <0x06>; - num-ob-windows = <0x02>; - num-viewport = <0x08>; - max-link-speed = <0x03>; - msi-map = <0x1000 0xbe 0x1000 0x1000>; - num-lanes = <0x01>; - phys = <0xc0>; - phy-names = "pcie-phy"; - power-domains = <0x25 0x0f>; - ranges = <0x800 0x00 0xf2000000 0x00 0xf2000000 0x00 0x100000 0x81000000 0x00 0xf2100000 0x00 0xf2100000 0x00 0x100000 0x82000000 0x00 0xf2200000 0x00 0xf2200000 0x00 0x1e00000 0xc3000000 0x03 0x40000000 0x03 0x40000000 0x00 0x40000000>; - reg = <0x03 0xc0400000 0x00 0x400000 0x00 0xfe270000 0x00 0x10000>; - reg-names = "pcie-dbi\0pcie-apb"; - resets = <0x23 0xb1>; - reset-names = "pipe"; - status = "disabled"; - - legacy-interrupt-controller { - interrupt-controller; - #address-cells = <0x00>; - #interrupt-cells = <0x01>; - interrupt-parent = <0x01>; - interrupts = <0x00 0x9d 0x01>; - phandle = <0xbf>; - }; - }; - - pcie@fe280000 { - compatible = "rockchip,rk3568-pcie\0snps,dw-pcie"; - #address-cells = <0x03>; - #size-cells = <0x02>; - bus-range = <0x20 0x2f>; - clocks = <0x23 0x8f 0x23 0x90 0x23 0x91 0x23 0x92 0x23 0x93>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux"; - device_type = "pci"; - interrupts = <0x00 0xa5 0x04 0x00 0xa4 0x04 0x00 0xa3 0x04 0x00 0xa2 0x04 0x00 0xa1 0x04>; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - #interrupt-cells = <0x01>; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - interrupt-map = <0x00 0x00 0x00 0x01 0xc1 0x00 0x00 0x00 0x00 0x02 0xc1 0x01 0x00 0x00 0x00 0x03 0xc1 0x02 0x00 0x00 0x00 0x04 0xc1 0x03>; - linux,pci-domain = <0x02>; - num-ib-windows = <0x06>; - num-viewport = <0x08>; - num-ob-windows = <0x02>; - max-link-speed = <0x03>; - msi-map = <0x2000 0xbe 0x2000 0x1000>; - num-lanes = <0x02>; - phys = <0xc0>; - phy-names = "pcie-phy"; - power-domains = <0x25 0x0f>; - ranges = <0x800 0x00 0xf0000000 0x00 0xf0000000 0x00 0x100000 0x81000000 0x00 0xf0100000 0x00 0xf0100000 0x00 0x100000 0x82000000 0x00 0xf0200000 0x00 0xf0200000 0x00 0x1e00000 0xc3000000 0x03 0x80000000 0x03 0x80000000 0x00 0x40000000>; - reg = <0x03 0xc0800000 0x00 0x400000 0x00 0xfe280000 0x00 0x10000>; - reg-names = "pcie-dbi\0pcie-apb"; - resets = <0x23 0xc1>; - reset-names = "pipe"; - status = "okay"; - reset-gpios = <0x91 0x1e 0x00>; - vpcie3v3-supply = <0xc2>; - - legacy-interrupt-controller { - interrupt-controller; - #address-cells = <0x00>; - #interrupt-cells = <0x01>; - interrupt-parent = <0x01>; - interrupts = <0x00 0xa2 0x01>; - phandle = <0xc1>; - }; - }; - - uio@fe2a0000 { - compatible = "rockchip,uio-gmac"; - reg = <0x00 0xfe2a0000 0x00 0x10000>; - rockchip,ethernet = <0xc3>; - status = "disabled"; - }; - - ethernet@fe2a0000 { - local-mac-address = [5a 4f fd 70 05 c6]; - compatible = "rockchip,rk3568-gmac\0snps,dwmac-4.20a"; - reg = <0x00 0xfe2a0000 0x00 0x10000>; - interrupts = <0x00 0x1b 0x04 0x00 0x18 0x04>; - interrupt-names = "macirq\0eth_wake_irq"; - rockchip,grf = <0x3b>; - clocks = <0x23 0x182 0x23 0x185 0x23 0x185 0x23 0xb8 0x23 0xb4 0x23 0xb5 0x23 0x185 0x23 0xb9 0x23 0xac 0x23 0xab>; - clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed\0ptp_ref\0pclk_xpcs\0clk_xpcs_eee"; - resets = <0x23 0xd7>; - reset-names = "stmmaceth"; - snps,mixed-burst; - snps,tso; - snps,axi-config = <0xc4>; - snps,mtl-rx-config = <0xc5>; - snps,mtl-tx-config = <0xc6>; - status = "okay"; - phy-mode = "rgmii"; - clock_in_out = "input"; - snps,reset-gpio = <0x91 0x1b 0x01>; - snps,reset-active-low; - snps,reset-delays-us = <0x00 0x4e20 0x186a0>; - assigned-clocks = <0x23 0x185 0x23 0x182>; - assigned-clock-parents = <0x23 0x183 0xc7>; - pinctrl-names = "default"; - pinctrl-0 = <0xc8 0xc9 0xca 0xcb 0xcc 0xcd>; - tx_delay = <0x4a>; - rx_delay = <0x2e>; - phy-handle = <0xce>; - phandle = <0xc3>; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <0x01>; - #size-cells = <0x00>; - - phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x00>; - led_status_value = <0x6940>; - phandle = <0xce>; - }; - }; - - stmmac-axi-config { - snps,wr_osr_lmt = <0x04>; - snps,rd_osr_lmt = <0x08>; - snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; - phandle = <0xc4>; - }; - - rx-queues-config { - snps,rx-queues-to-use = <0x01>; - phandle = <0xc5>; - - queue0 { - }; - }; - - tx-queues-config { - snps,tx-queues-to-use = <0x01>; - phandle = <0xc6>; - - queue0 { - }; - }; - }; - - dwmmc@fe2b0000 { - compatible = "rockchip,rk3568-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xfe2b0000 0x00 0x4000>; - interrupts = <0x00 0x62 0x04>; - max-frequency = <0x8f0d180>; - clocks = <0x23 0xb0 0x23 0xb1 0x23 0x18a 0x23 0x18b>; - clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; - fifo-depth = <0x100>; - resets = <0x23 0xd4>; - reset-names = "reset"; - status = "okay"; - no-sdio; - no-mmc; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - sd-uhs-sdr104; - vmmc-supply = <0xcf>; - vqmmc-supply = <0x31>; - pinctrl-names = "default"; - pinctrl-0 = <0xd0 0xd1 0xd2 0xd3>; - }; - - dwmmc@fe2c0000 { - compatible = "rockchip,rk3568-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xfe2c0000 0x00 0x4000>; - interrupts = <0x00 0x63 0x04>; - max-frequency = <0x8f0d180>; - clocks = <0x23 0xb2 0x23 0xb3 0x23 0x18c 0x23 0x18d>; - clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; - fifo-depth = <0x100>; - resets = <0x23 0xd6>; - reset-names = "reset"; - status = "disabled"; - }; - - spi@fe300000 { - compatible = "rockchip,sfc"; - reg = <0x00 0xfe300000 0x00 0x4000>; - interrupts = <0x00 0x65 0x04>; - clocks = <0x23 0x78 0x23 0x76>; - clock-names = "clk_sfc\0hclk_sfc"; - assigned-clocks = <0x23 0x78>; - assigned-clock-rates = <0x2faf080>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <0xd4>; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0x00>; - spi-max-frequency = <0x2faf080>; - spi-rx-bus-width = <0x01>; - spi-tx-bus-width = <0x01>; - }; - }; - - sdhci@fe310000 { - compatible = "rockchip,rk3568-dwcmshc\0rockchip,dwcmshc-sdhci"; - reg = <0x00 0xfe310000 0x00 0x10000>; - interrupts = <0x00 0x13 0x04>; - assigned-clocks = <0x23 0x7b 0x23 0x7d 0x23 0x7c>; - assigned-clock-rates = <0xbebc200 0x16e3600 0xbebc200>; - clocks = <0x23 0x7c 0x23 0x7a 0x23 0x79 0x23 0x7b 0x23 0x7d>; - clock-names = "core\0bus\0axi\0block\0timer"; - resets = <0x23 0x78 0x23 0x76 0x23 0x75 0x23 0x77 0x23 0x79>; - reset-names = "core\0bus\0axi\0block\0timer"; - status = "okay"; - bus-width = <0x08>; - no-sdio; - no-sd; - non-removable; - max-frequency = <0xbebc200>; - full-pwr-cycle-in-suspend; - }; - - nandc@fe330000 { - compatible = "rockchip,rk-nandc-v9"; - reg = <0x00 0xfe330000 0x00 0x4000>; - interrupts = <0x00 0x46 0x04>; - nandc_id = <0x00>; - clocks = <0x23 0x75 0x23 0x74>; - clock-names = "clk_nandc\0hclk_nandc"; - status = "okay"; - #address-cells = <0x01>; - #size-cells = <0x00>; - - nand@0 { - reg = <0x00>; - nand-bus-width = <0x08>; - nand-ecc-mode = "hw"; - nand-ecc-strength = <0x10>; - nand-ecc-step-size = <0x400>; - }; - }; - - crypto@fe380000 { - compatible = "rockchip,rk3568-crypto"; - reg = <0x00 0xfe380000 0x00 0x4000>; - interrupts = <0x00 0x04 0x04>; - clocks = <0x23 0x6a 0x23 0x6b 0x23 0x6c 0x23 0x6d>; - clock-names = "aclk\0hclk\0sclk\0apb_pclk"; - assigned-clocks = <0x23 0x6c>; - assigned-clock-rates = <0xbebc200>; - resets = <0x23 0x69>; - reset-names = "crypto-rst"; - status = "disabled"; - }; - - rng@fe388000 { - compatible = "rockchip,cryptov2-rng"; - reg = <0x00 0xfe388000 0x00 0x2000>; - clocks = <0x23 0x70 0x23 0x6f>; - clock-names = "clk_trng\0hclk_trng"; - resets = <0x23 0x6d>; - reset-names = "reset"; - status = "okay"; - }; - - otp@fe38c000 { - compatible = "rockchip,rk3568-otp"; - reg = <0x00 0xfe38c000 0x00 0x4000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - clocks = <0x23 0x73 0x23 0x72 0x23 0x71 0x23 0x181>; - clock-names = "usr\0sbpi\0apb\0phy"; - resets = <0x23 0x1cf>; - reset-names = "otp_phy"; - - cpu-code@2 { - reg = <0x02 0x02>; - phandle = <0x12>; - }; - - specification-serial-number@7 { - reg = <0x07 0x01>; - bits = <0x00 0x05>; - phandle = <0x0a>; - }; - - cpu-version@8 { - reg = <0x08 0x01>; - bits = <0x03 0x03>; - phandle = <0x11>; - }; - - mbist-vmin@9 { - reg = <0x09 0x01>; - bits = <0x00 0x04>; - phandle = <0x08>; - }; - - id@a { - reg = <0x0a 0x10>; - phandle = <0x10>; - }; - - cpu-leakage@1a { - reg = <0x1a 0x01>; - phandle = <0x06>; - }; - - log-leakage@1b { - reg = <0x1b 0x01>; - phandle = <0x85>; - }; - - npu-leakage@1c { - reg = <0x1c 0x01>; - phandle = <0x72>; - }; - - gpu-leakage@1d { - reg = <0x1d 0x01>; - phandle = <0x78>; - }; - - core-pvtm@2a { - reg = <0x2a 0x02>; - phandle = <0x07>; - }; - - cpu-tsadc-trim-l@2e { - reg = <0x2e 0x01>; - phandle = <0x125>; - }; - - cpu-tsadc-trim-h@2f { - reg = <0x2f 0x01>; - bits = <0x00 0x04>; - phandle = <0x126>; - }; - - npu-tsadc-trim-l@30 { - reg = <0x30 0x01>; - phandle = <0x127>; - }; - - npu-tsadc-trim-h@31 { - reg = <0x31 0x01>; - bits = <0x00 0x04>; - phandle = <0x128>; - }; - - tsadc-trim-base-frac@31 { - reg = <0x31 0x01>; - bits = <0x04 0x04>; - phandle = <0x122>; - }; - - tsadc-trim-base@32 { - reg = <0x32 0x01>; - phandle = <0x121>; - }; - - cpu-opp-info@36 { - reg = <0x36 0x06>; - phandle = <0x09>; - }; - - gpu-opp-info@3c { - reg = <0x3c 0x06>; - phandle = <0x79>; - }; - - npu-opp-info@42 { - reg = <0x42 0x06>; - phandle = <0x73>; - }; - - dmc-opp-info@48 { - reg = <0x48 0x06>; - phandle = <0xbc>; - }; - - remark-spec-serial-number@56 { - reg = <0x56 0x01>; - bits = <0x00 0x05>; - phandle = <0x0b>; - }; - }; - - i2s@fe400000 { - compatible = "rockchip,rk3568-i2s-tdm"; - reg = <0x00 0xfe400000 0x00 0x1000>; - interrupts = <0x00 0x34 0x04>; - clocks = <0x23 0x3f 0x23 0x43 0x23 0x39>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0xd5 0x00>; - dma-names = "tx"; - resets = <0x23 0x50 0x23 0x51>; - reset-names = "tx-m\0rx-m"; - rockchip,cru = <0x23>; - rockchip,grf = <0x3b>; - rockchip,playback-only; - #sound-dai-cells = <0x00>; - status = "okay"; - phandle = <0x146>; - }; - - i2s@fe410000 { - compatible = "rockchip,rk3568-i2s-tdm"; - reg = <0x00 0xfe410000 0x00 0x1000>; - interrupts = <0x00 0x35 0x04>; - clocks = <0x23 0x47 0x23 0x4b 0x23 0x3a>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0xd5 0x02 0xd5 0x03>; - dma-names = "tx\0rx"; - resets = <0x23 0x52 0x23 0x53>; - reset-names = "tx-m\0rx-m"; - rockchip,cru = <0x23>; - rockchip,grf = <0x3b>; - #sound-dai-cells = <0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0xd6 0xd7 0xd8 0xd9>; - status = "okay"; - rockchip,clk-trcm = <0x01>; - phandle = <0xe8>; - }; - - i2s@fe420000 { - compatible = "rockchip,rk3568-i2s-tdm"; - reg = <0x00 0xfe420000 0x00 0x1000>; - interrupts = <0x00 0x36 0x04>; - clocks = <0x23 0x4f 0x23 0x4f 0x23 0x3b>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0xd5 0x04 0xd5 0x05>; - dma-names = "tx\0rx"; - rockchip,cru = <0x23>; - rockchip,grf = <0x3b>; - rockchip,clk-trcm = <0x01>; - #sound-dai-cells = <0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0xda 0xdb 0xdc 0xdd>; - status = "disabled"; - }; - - i2s@fe430000 { - compatible = "rockchip,rk3568-i2s-tdm"; - reg = <0x00 0xfe430000 0x00 0x1000>; - interrupts = <0x00 0x37 0x04>; - clocks = <0x23 0x53 0x23 0x57 0x23 0x3c>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0xd5 0x06 0xd5 0x07>; - dma-names = "tx\0rx"; - resets = <0x23 0x55 0x23 0x56>; - reset-names = "tx-m\0rx-m"; - rockchip,cru = <0x23>; - rockchip,grf = <0x3b>; - rockchip,clk-trcm = <0x01>; - #sound-dai-cells = <0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0xde 0xdf 0xe0 0xe1>; - status = "disabled"; - phandle = <0x144>; - }; - - pdm@fe440000 { - compatible = "rockchip,rk3568-pdm\0rockchip,pdm"; - reg = <0x00 0xfe440000 0x00 0x1000>; - clocks = <0x23 0x5a 0x23 0x59>; - clock-names = "pdm_clk\0pdm_hclk"; - dmas = <0xd5 0x09>; - dma-names = "rx"; - pinctrl-names = "default"; - pinctrl-0 = <0xe2 0xe3 0xe4 0xe5 0xe6 0xe7>; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x149>; - }; - - vad@fe450000 { - compatible = "rockchip,rk3568-vad"; - reg = <0x00 0xfe450000 0x00 0x10000>; - reg-names = "vad"; - clocks = <0x23 0x5b>; - clock-names = "hclk"; - interrupts = <0x00 0x89 0x04>; - rockchip,audio-src = <0xe8>; - rockchip,det-channel = <0x00>; - rockchip,mode = <0x00>; - #sound-dai-cells = <0x00>; - status = "disabled"; - rockchip,buffer-time-ms = <0x80>; - phandle = <0x14e>; - }; - - spdif@fe460000 { - compatible = "rockchip,rk3568-spdif"; - reg = <0x00 0xfe460000 0x00 0x1000>; - interrupts = <0x00 0x66 0x04>; - dmas = <0xd5 0x01>; - dma-names = "tx"; - clock-names = "mclk\0hclk"; - clocks = <0x23 0x5f 0x23 0x5c>; - #sound-dai-cells = <0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0xe9>; - status = "disabled"; - phandle = <0x14c>; - }; - - audpwm@fe470000 { - compatible = "rockchip,rk3568-audio-pwm\0rockchip,audio-pwm-v1"; - reg = <0x00 0xfe470000 0x00 0x1000>; - clocks = <0x23 0x63 0x23 0x60>; - clock-names = "clk\0hclk"; - dmas = <0xd5 0x08>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - rockchip,sample-width-bits = <0x0b>; - rockchip,interpolat-points = <0x01>; - status = "disabled"; - }; - - codec-digital@fe478000 { - compatible = "rockchip,rk3568-codec-digital\0rockchip,codec-digital-v1"; - reg = <0x00 0xfe478000 0x00 0x1000>; - clocks = <0x23 0x67 0x23 0x66 0x23 0x65 0x23 0x64>; - clock-names = "adc\0dac\0i2c\0pclk"; - pinctrl-names = "default"; - pinctrl-0 = <0xea>; - resets = <0x23 0x5f>; - reset-names = "reset"; - rockchip,grf = <0x3b>; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x145>; - }; - - dmac@fe530000 { - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xfe530000 0x00 0x4000>; - interrupts = <0x00 0x0e 0x04 0x00 0x0d 0x04>; - clocks = <0x23 0x10d>; - clock-names = "apb_pclk"; - #dma-cells = <0x01>; - arm,pl330-periph-burst; - phandle = <0x4e>; - }; - - dmac@fe550000 { - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xfe550000 0x00 0x4000>; - interrupts = <0x00 0x10 0x04 0x00 0x0f 0x04>; - clocks = <0x23 0x10d>; - clock-names = "apb_pclk"; - #dma-cells = <0x01>; - arm,pl330-periph-burst; - phandle = <0xd5>; - }; - - rkscr@fe560000 { - compatible = "rockchip-scr"; - reg = <0x00 0xfe560000 0x00 0x10000>; - interrupts = <0x00 0x61 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0xeb>; - clocks = <0x23 0x114>; - clock-names = "g_pclk_sim_card"; - status = "disabled"; - }; - - can@fe570000 { - compatible = "rockchip,rk3568-can-2.0"; - reg = <0x00 0xfe570000 0x00 0x1000>; - interrupts = <0x00 0x01 0x04>; - clocks = <0x23 0x141 0x23 0x140>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x23 0x155 0x23 0x154>; - reset-names = "can\0can-apb"; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - status = "disabled"; - }; - - can@fe580000 { - compatible = "rockchip,rk3568-can-2.0"; - reg = <0x00 0xfe580000 0x00 0x1000>; - interrupts = <0x00 0x02 0x04>; - clocks = <0x23 0x143 0x23 0x142>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x23 0x157 0x23 0x156>; - reset-names = "can\0can-apb"; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - status = "okay"; - assigned-clocks = <0x23 0x143>; - assigned-clock-rates = <0xbebc200>; - pinctrl-names = "default"; - pinctrl-0 = <0xec>; - }; - - can@fe590000 { - compatible = "rockchip,rk3568-can-2.0"; - reg = <0x00 0xfe590000 0x00 0x1000>; - interrupts = <0x00 0x03 0x04>; - clocks = <0x23 0x145 0x23 0x144>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x23 0x159 0x23 0x158>; - reset-names = "can\0can-apb"; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - status = "disabled"; - assigned-clocks = <0x23 0x145>; - assigned-clock-rates = <0xbebc200>; - pinctrl-names = "default"; - pinctrl-0 = <0xed>; - }; - - i2c@fe5a0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xfe5a0000 0x00 0x1000>; - clocks = <0x23 0x148 0x23 0x147>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x2f 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0xee>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x186a0>; - - gpio@21 { - status = "disabled"; - compatible = "nxp,pca9555"; - reg = <0x21>; - gpio-controller; - #gpio-cells = <0x02>; - gpio-group-num = <0xc8>; - phandle = <0x102>; - }; - - gt1x@14 { - status = "disabled"; - compatible = "goodix,gt1x"; - reg = <0x14>; - pinctrl-names = "default"; - pinctrl-0 = <0xef>; - goodix,rst-gpio = <0x3f 0x0e 0x00>; - goodix,irq-gpio = <0x3f 0x0d 0x08>; - }; - }; - - i2c@fe5b0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xfe5b0000 0x00 0x1000>; - clocks = <0x23 0x14a 0x23 0x149>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x30 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0xf0>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - }; - - i2c@fe5c0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xfe5c0000 0x00 0x1000>; - clocks = <0x23 0x14c 0x23 0x14b>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x31 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0xf1>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - }; - - i2c@fe5d0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xfe5d0000 0x00 0x1000>; - clocks = <0x23 0x14e 0x23 0x14d>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x32 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0xf2>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - - gc8034@37 { - compatible = "galaxycore,gc8034"; - status = "disabled"; - reg = <0x37>; - clocks = <0x23 0xd6>; - clock-names = "xvclk"; - pinctrl-names = "default"; - pinctrl-0 = <0xf3>; - reset-gpios = <0x4a 0x0e 0x01>; - pwdn-gpios = <0xf4 0x0c 0x01>; - rockchip,grf = <0x3b>; - rockchip,camera-module-index = <0x00>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "RK-CMK-8M-2-v1"; - rockchip,camera-module-lens-name = "CK8401"; - - port { - - endpoint { - remote-endpoint = <0xf5>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0x130>; - }; - }; - }; - - os04a10@36 { - status = "disabled"; - compatible = "ovti,os04a10"; - reg = <0x36>; - clocks = <0x23 0xd6>; - clock-names = "xvclk"; - power-domains = <0x25 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0xf3>; - reset-gpios = <0x4a 0x0e 0x01>; - pwdn-gpios = <0xf4 0x0c 0x00>; - rockchip,camera-module-index = <0x00>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "CMK-OT1607-FV1"; - rockchip,camera-module-lens-name = "M12-40IRC-4MP-F16"; - - port { - - endpoint { - remote-endpoint = <0xf6>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0x12f>; - }; - }; - }; - - ov5695@36 { - status = "disabled"; - compatible = "ovti,ov5695"; - reg = <0x36>; - clocks = <0x23 0xd6>; - clock-names = "xvclk"; - power-domains = <0x25 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0xf3>; - reset-gpios = <0x4a 0x0e 0x00>; - pwdn-gpios = <0xf4 0x0c 0x00>; - rockchip,camera-module-index = <0x00>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "TongJu"; - rockchip,camera-module-lens-name = "CHT842-MD"; - - port { - - endpoint { - remote-endpoint = <0xf7>; - data-lanes = <0x01 0x02>; - phandle = <0x131>; - }; - }; - }; - - XC7160b@1b { - status = "okay"; - compatible = "firefly,xc7160"; - reg = <0x1b>; - clocks = <0x23 0xd6>; - clock-names = "xvclk"; - power-domains = <0x25 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0xf3>; - reset-gpios = <0x3f 0x1d 0x00>; - pwdn-gpios = <0xf4 0x0c 0x00>; - firefly,clkout-enabled-index = <0x00>; - rockchip,camera-module-index = <0x00>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "NC"; - rockchip,camera-module-lens-name = "NC"; - - port { - - endpoint { - remote-endpoint = <0xf8>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0x132>; - }; - }; - }; - - imx415@37 { - status = "okay"; - compatible = "sony,imx415"; - reg = <0x37>; - clocks = <0x23 0xd6>; - clock-names = "xvclk"; - power-domains = <0x25 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0xf3>; - reset-gpios = <0x3f 0x1d 0x01>; - pwdn-gpios = <0xf4 0x0c 0x00>; - firefly,clkout-enabled-index = <0x00>; - rockchip,camera-module-index = <0x00>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "CMK-OT2022-PX1"; - rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20"; - - port { - - endpoint { - remote-endpoint = <0xf9>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0x133>; - }; - }; - }; - }; - - i2c@fe5e0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xfe5e0000 0x00 0x1000>; - clocks = <0x23 0x150 0x23 0x14f>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x33 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0xfa>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - - hym8563@51 { - status = "okay"; - compatible = "haoyu,hym8563"; - reg = <0x51>; - #clock-cells = <0x00>; - rtc-irq-gpio = <0x3f 0x1b 0x02>; - clock-frequency = <0x8000>; - }; - - mc3230sensor@4c { - compatible = "gs_mc3230"; - reg = <0x4c>; - type = <0x02>; - irq_enable = <0x00>; - poll_delay_ms = <0x1e>; - layout = <0x04>; - status = "okay"; - }; - - mxc6655xa@15 { - status = "disabled"; - compatible = "gs_mxc6655xa"; - pinctrl-names = "default"; - pinctrl-0 = <0xfb>; - reg = <0x15>; - irq-gpio = <0x4a 0x11 0x08>; - irq_enable = <0x00>; - poll_delay_ms = <0x1e>; - type = <0x02>; - power-off-in-suspend = <0x01>; - layout = <0x01>; - }; - }; - - timer@fe5f0000 { - compatible = "rockchip,rk3568-timer\0rockchip,rk3288-timer"; - reg = <0x00 0xfe5f0000 0x00 0x1000>; - interrupts = <0x00 0x6d 0x04>; - clocks = <0x23 0x16c 0x23 0x16d>; - clock-names = "pclk\0timer"; - }; - - watchdog@fe600000 { - compatible = "snps,dw-wdt"; - reg = <0x00 0xfe600000 0x00 0x100>; - clocks = <0x23 0x116 0x23 0x115>; - clock-names = "tclk\0pclk"; - interrupts = <0x00 0x95 0x04>; - status = "okay"; - }; - - spi@fe610000 { - compatible = "rockchip,rk3066-spi"; - reg = <0x00 0xfe610000 0x00 0x1000>; - interrupts = <0x00 0x67 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x23 0x152 0x23 0x151>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x4e 0x14 0x4e 0x15>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0xfc 0xfd 0xfe>; - pinctrl-1 = <0xfc 0xfd 0xff>; - num-cs = <0x02>; - status = "disabled"; - }; - - spi@fe620000 { - compatible = "rockchip,rk3066-spi"; - reg = <0x00 0xfe620000 0x00 0x1000>; - interrupts = <0x00 0x68 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x23 0x154 0x23 0x153>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x4e 0x16 0x4e 0x17>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x100>; - pinctrl-1 = <0x101>; - num-cs = <0x02>; - status = "disabled"; - max-freq = <0x2dc6c00>; - dev-port = <0x00>; - - spi_wk2xxx@0 { - status = "disabled"; - compatible = "firefly,spi-wk2xxx"; - reg = <0x00>; - spi-max-frequency = <0x989680>; - power-gpio = <0x102 0x0f 0x00>; - reset-gpio = <0x102 0x09 0x00>; - irq-gpio = <0x3f 0x06 0x02>; - cs-gpio = <0x4a 0x01 0x00>; - }; - }; - - spi@fe630000 { - compatible = "rockchip,rk3066-spi"; - reg = <0x00 0xfe630000 0x00 0x1000>; - interrupts = <0x00 0x69 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x23 0x156 0x23 0x155>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x4e 0x18 0x4e 0x19>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x103 0x104 0x105>; - pinctrl-1 = <0x103 0x104 0x106>; - num-cs = <0x02>; - status = "disabled"; - }; - - spi@fe640000 { - compatible = "rockchip,rk3066-spi"; - reg = <0x00 0xfe640000 0x00 0x1000>; - interrupts = <0x00 0x6a 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x23 0x158 0x23 0x157>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x4e 0x1a 0x4e 0x1b>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x107 0x108 0x109>; - pinctrl-1 = <0x107 0x108 0x10a>; - num-cs = <0x02>; - status = "disabled"; - }; - - serial@fe650000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe650000 0x00 0x100>; - interrupts = <0x00 0x75 0x04>; - clocks = <0x23 0x11f 0x23 0x11c>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x02 0x4e 0x03>; - pinctrl-names = "default"; - pinctrl-0 = <0x10b>; - status = "disabled"; - }; - - serial@fe660000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe660000 0x00 0x100>; - interrupts = <0x00 0x76 0x04>; - clocks = <0x23 0x123 0x23 0x120>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x04 0x4e 0x05>; - pinctrl-names = "default"; - pinctrl-0 = <0x10c>; - status = "disabled"; - }; - - serial@fe670000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe670000 0x00 0x100>; - interrupts = <0x00 0x77 0x04>; - clocks = <0x23 0x127 0x23 0x124>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x06 0x4e 0x07>; - pinctrl-names = "default"; - pinctrl-0 = <0x10d>; - status = "okay"; - }; - - serial@fe680000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe680000 0x00 0x100>; - interrupts = <0x00 0x78 0x04>; - clocks = <0x23 0x12b 0x23 0x128>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x08 0x4e 0x09>; - pinctrl-names = "default"; - pinctrl-0 = <0x10e>; - status = "okay"; - }; - - serial@fe690000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe690000 0x00 0x100>; - interrupts = <0x00 0x79 0x04>; - clocks = <0x23 0x12f 0x23 0x12c>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x0a 0x4e 0x0b>; - pinctrl-names = "default"; - pinctrl-0 = <0x10f>; - status = "disabled"; - }; - - serial@fe6a0000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe6a0000 0x00 0x100>; - interrupts = <0x00 0x7a 0x04>; - clocks = <0x23 0x133 0x23 0x130>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x0c 0x4e 0x0d>; - pinctrl-names = "default"; - pinctrl-0 = <0x110>; - status = "disabled"; - }; - - serial@fe6b0000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe6b0000 0x00 0x100>; - interrupts = <0x00 0x7b 0x04>; - clocks = <0x23 0x137 0x23 0x134>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x0e 0x4e 0x0f>; - pinctrl-names = "default"; - pinctrl-0 = <0x111>; - status = "okay"; - }; - - serial@fe6c0000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe6c0000 0x00 0x100>; - interrupts = <0x00 0x7c 0x04>; - clocks = <0x23 0x13b 0x23 0x138>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x10 0x4e 0x11>; - pinctrl-names = "default"; - pinctrl-0 = <0x112 0x113>; - status = "okay"; - }; - - serial@fe6d0000 { - compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfe6d0000 0x00 0x100>; - interrupts = <0x00 0x7d 0x04>; - clocks = <0x23 0x13f 0x23 0x13c>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x4e 0x12 0x4e 0x13>; - pinctrl-names = "default"; - pinctrl-0 = <0x114>; - status = "okay"; - }; - - pwm@fe6e0000 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe6e0000 0x00 0x10>; - interrupts = <0x00 0x53 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x115>; - clocks = <0x23 0x15a 0x23 0x159>; - clock-names = "pwm\0pclk"; - status = "okay"; - }; - - pwm@fe6e0010 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe6e0010 0x00 0x10>; - interrupts = <0x00 0x53 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x116>; - clocks = <0x23 0x15a 0x23 0x159>; - clock-names = "pwm\0pclk"; - status = "okay"; - }; - - pwm@fe6e0020 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe6e0020 0x00 0x10>; - interrupts = <0x00 0x53 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x117>; - clocks = <0x23 0x15a 0x23 0x159>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fe6e0030 { - compatible = "rockchip,remotectl-pwm"; - reg = <0x00 0xfe6e0030 0x00 0x10>; - interrupts = <0x00 0x53 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "default"; - pinctrl-0 = <0x118>; - clocks = <0x23 0x15a 0x23 0x159>; - clock-names = "pwm\0pclk"; - status = "okay"; - remote_pwm_id = <0x03>; - handle_cpu_id = <0x01>; - remote_support_psci = <0x00>; - - ir_key_firefly { - rockchip,usercode = <0xff00>; - rockchip,key_table = <0xeb 0x74 0xec 0x8b 0xfe 0x9e 0xb7 0x66 0xa3 0x96 0xf4 0x73 0xa7 0x72 0xf8 0xe8 0xfc 0x67 0xfd 0x6c 0xf1 0x69 0xe5 0x6a>; - }; - }; - - pwm@fe6f0000 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe6f0000 0x00 0x10>; - interrupts = <0x00 0x54 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x119>; - clocks = <0x23 0x15d 0x23 0x15c>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fe6f0010 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe6f0010 0x00 0x10>; - interrupts = <0x00 0x54 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x11a>; - clocks = <0x23 0x15d 0x23 0x15c>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fe6f0020 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe6f0020 0x00 0x10>; - interrupts = <0x00 0x54 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x11b>; - clocks = <0x23 0x15d 0x23 0x15c>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fe6f0030 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe6f0030 0x00 0x10>; - interrupts = <0x00 0x54 0x04 0x00 0x58 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x11c>; - clocks = <0x23 0x15d 0x23 0x15c>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0x157>; - }; - - pwm@fe700000 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe700000 0x00 0x10>; - interrupts = <0x00 0x55 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x11d>; - clocks = <0x23 0x160 0x23 0x15f>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fe700010 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe700010 0x00 0x10>; - interrupts = <0x00 0x55 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x11e>; - clocks = <0x23 0x160 0x23 0x15f>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fe700020 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe700020 0x00 0x10>; - interrupts = <0x00 0x55 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x11f>; - clocks = <0x23 0x160 0x23 0x15f>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - pwm@fe700030 { - compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfe700030 0x00 0x10>; - interrupts = <0x00 0x55 0x04 0x00 0x59 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x120>; - clocks = <0x23 0x160 0x23 0x15f>; - clock-names = "pwm\0pclk"; - status = "disabled"; - }; - - tsadc@fe710000 { - compatible = "rockchip,rk3568-tsadc"; - reg = <0x00 0xfe710000 0x00 0x100>; - interrupts = <0x00 0x73 0x04>; - rockchip,grf = <0x3b>; - clocks = <0x23 0x111 0x23 0x10f>; - clock-names = "tsadc\0apb_pclk"; - assigned-clocks = <0x23 0x110 0x23 0x111>; - assigned-clock-rates = <0x1036640 0xaae60>; - resets = <0x23 0x182 0x23 0x181 0x23 0x1d7>; - reset-names = "tsadc\0tsadc-apb\0tsadc-phy"; - #thermal-sensor-cells = <0x01>; - nvmem-cells = <0x121 0x122>; - nvmem-cell-names = "trim_base\0trim_base_frac"; - rockchip,hw-tshut-temp = <0x1d4c0>; - rockchip,hw-tshut-mode = <0x00>; - rockchip,hw-tshut-polarity = <0x00>; - pinctrl-names = "gpio\0otpout"; - pinctrl-0 = <0x123>; - pinctrl-1 = <0x124>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x1f>; - - tsadc@0 { - reg = <0x00>; - nvmem-cells = <0x125 0x126>; - nvmem-cell-names = "trim_l\0trim_h"; - }; - - tsadc@1 { - reg = <0x01>; - nvmem-cells = <0x127 0x128>; - nvmem-cell-names = "trim_l\0trim_h"; - }; - }; - - saradc@fe720000 { - compatible = "rockchip,rk3568-saradc\0rockchip,rk3399-saradc"; - reg = <0x00 0xfe720000 0x00 0x100>; - interrupts = <0x00 0x5d 0x04>; - #io-channel-cells = <0x01>; - clocks = <0x23 0x113 0x23 0x112>; - clock-names = "saradc\0apb_pclk"; - resets = <0x23 0x180>; - reset-names = "saradc-apb"; - status = "okay"; - vref-supply = <0x129>; - phandle = <0x49>; - }; - - mailbox@fe780000 { - compatible = "rockchip,rk3568-mailbox\0rockchip,rk3368-mailbox"; - reg = <0x00 0xfe780000 0x00 0x1000>; - interrupts = <0x00 0xb7 0x04 0x00 0xb8 0x04 0x00 0xb9 0x04 0x00 0xba 0x04>; - clocks = <0x23 0x11b>; - clock-names = "pclk_mailbox"; - #mbox-cells = <0x01>; - status = "disabled"; - }; - - phy@fe820000 { - compatible = "rockchip,rk3568-naneng-combphy"; - reg = <0x00 0xfe820000 0x00 0x100>; - #phy-cells = <0x01>; - clocks = <0x3a 0x1f 0x23 0x17c 0x23 0x7f>; - clock-names = "refclk\0apbclk\0pipe_clk"; - assigned-clocks = <0x3a 0x1f>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x23 0x1c4 0x23 0x1c5>; - reset-names = "combphy-apb\0combphy"; - rockchip,pipe-grf = <0x12a>; - rockchip,pipe-phy-grf = <0x12b>; - status = "okay"; - phandle = <0x24>; - }; - - phy@fe830000 { - compatible = "rockchip,rk3568-naneng-combphy"; - reg = <0x00 0xfe830000 0x00 0x100>; - #phy-cells = <0x01>; - clocks = <0x3a 0x22 0x23 0x17d 0x23 0x7f>; - clock-names = "refclk\0apbclk\0pipe_clk"; - assigned-clocks = <0x3a 0x22>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x23 0x1c6 0x23 0x1c7>; - reset-names = "combphy-apb\0combphy"; - rockchip,pipe-grf = <0x12a>; - rockchip,pipe-phy-grf = <0x12c>; - status = "okay"; - phandle = <0x26>; - }; - - phy@fe840000 { - compatible = "rockchip,rk3568-naneng-combphy"; - reg = <0x00 0xfe840000 0x00 0x100>; - #phy-cells = <0x01>; - clocks = <0x3a 0x25 0x23 0x17e 0x23 0x7f>; - clock-names = "refclk\0apbclk\0pipe_clk"; - assigned-clocks = <0x3a 0x25>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x23 0x1c8 0x23 0x1c9>; - reset-names = "combphy-apb\0combphy"; - rockchip,pipe-grf = <0x12a>; - rockchip,pipe-phy-grf = <0x12d>; - status = "okay"; - phandle = <0x27>; - }; - - phy@fe850000 { - compatible = "rockchip,rk3568-dsi-dphy\0rockchip,rk3568-video-phy"; - reg = <0x00 0xfe850000 0x00 0x10000 0x00 0xfe060000 0x00 0x10000>; - reg-names = "phy\0host"; - clocks = <0x3a 0x17 0x23 0x17a 0x23 0xe8>; - clock-names = "ref\0pclk\0pclk_host"; - #clock-cells = <0x00>; - resets = <0x23 0x1bb>; - reset-names = "apb"; - power-domains = <0x25 0x09>; - #phy-cells = <0x00>; - status = "disabled"; - phandle = <0x34>; - }; - - phy@fe860000 { - compatible = "rockchip,rk3568-dsi-dphy\0rockchip,rk3568-video-phy"; - reg = <0x00 0xfe860000 0x00 0x10000 0x00 0xfe070000 0x00 0x10000>; - reg-names = "phy\0host"; - clocks = <0x3a 0x19 0x23 0x17b 0x23 0xe9>; - clock-names = "ref\0pclk\0pclk_host"; - #clock-cells = <0x00>; - resets = <0x23 0x1bc>; - reset-names = "apb"; - power-domains = <0x25 0x09>; - #phy-cells = <0x00>; - status = "disabled"; - phandle = <0x36>; - }; - - csi2-dphy-hw@fe870000 { - compatible = "rockchip,rk3568-csi2-dphy-hw"; - reg = <0x00 0xfe870000 0x00 0x1000>; - clocks = <0x23 0x179>; - clock-names = "pclk"; - rockchip,grf = <0x3b>; - status = "okay"; - phandle = <0x12e>; - }; - - csi2-dphy0 { - compatible = "rockchip,rk3568-csi2-dphy"; - rockchip,hw = <0x12e>; - status = "okay"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0x12f>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0xf6>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0x130>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0xf5>; - }; - - endpoint@3 { - reg = <0x03>; - remote-endpoint = <0x131>; - data-lanes = <0x01 0x02>; - phandle = <0xf7>; - }; - - endpoint@4 { - reg = <0x04>; - remote-endpoint = <0x132>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0xf8>; - }; - - endpoint@5 { - reg = <0x05>; - remote-endpoint = <0x133>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0xf9>; - }; - }; - - port@1 { - reg = <0x01>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x134>; - phandle = <0x8c>; - }; - }; - }; - }; - - csi2-dphy1 { - compatible = "rockchip,rk3568-csi2-dphy"; - rockchip,hw = <0x12e>; - status = "disabled"; - }; - - csi2-dphy2 { - compatible = "rockchip,rk3568-csi2-dphy"; - rockchip,hw = <0x12e>; - status = "disabled"; - }; - - usb2-phy@fe8a0000 { - compatible = "rockchip,rk3568-usb2phy"; - reg = <0x00 0xfe8a0000 0x00 0x10000>; - interrupts = <0x00 0x87 0x04>; - clocks = <0x3a 0x13>; - clock-names = "phyclk"; - #clock-cells = <0x00>; - assigned-clocks = <0x23 0x0b>; - assigned-clock-parents = <0x29>; - clock-output-names = "usb480m_phy"; - rockchip,usbgrf = <0x135>; - status = "okay"; - phandle = <0x29>; - - host-port { - #phy-cells = <0x00>; - status = "okay"; - phy-supply = <0x136>; - phandle = <0x2b>; - }; - - otg-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x28>; - }; - }; - - usb2-phy@fe8b0000 { - compatible = "rockchip,rk3568-usb2phy"; - reg = <0x00 0xfe8b0000 0x00 0x10000>; - interrupts = <0x00 0x88 0x04>; - clocks = <0x3a 0x15>; - clock-names = "phyclk"; - #clock-cells = <0x00>; - rockchip,usbgrf = <0x137>; - status = "okay"; - phandle = <0x2c>; - - host-port { - #phy-cells = <0x00>; - status = "okay"; - phy-supply = <0x136>; - phandle = <0x2e>; - }; - - otg-port { - #phy-cells = <0x00>; - status = "okay"; - phy-supply = <0x136>; - phandle = <0x2d>; - }; - }; - - phy@fe8c0000 { - compatible = "rockchip,rk3568-pcie3-phy"; - reg = <0x00 0xfe8c0000 0x00 0x20000>; - #phy-cells = <0x00>; - clocks = <0x3a 0x26 0x3a 0x27 0x23 0x177>; - clock-names = "refclk_m\0refclk_n\0pclk"; - resets = <0x23 0x1be>; - reset-names = "phy"; - rockchip,phy-grf = <0x138>; - status = "okay"; - phandle = <0xc0>; - }; - - pinctrl { - compatible = "rockchip,rk3568-pinctrl"; - rockchip,grf = <0x3b>; - rockchip,pmu = <0x3c>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - gpio0@fdd60000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xfdd60000 0x00 0x100>; - interrupts = <0x00 0x21 0x04>; - clocks = <0x3a 0x2e 0x3a 0x0c>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x3f>; - }; - - gpio1@fe740000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xfe740000 0x00 0x100>; - interrupts = <0x00 0x22 0x04>; - clocks = <0x23 0x163 0x23 0x164>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x159>; - }; - - gpio2@fe750000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xfe750000 0x00 0x100>; - interrupts = <0x00 0x23 0x04>; - clocks = <0x23 0x165 0x23 0x166>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x91>; - }; - - gpio3@fe760000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xfe760000 0x00 0x100>; - interrupts = <0x00 0x24 0x04>; - clocks = <0x23 0x167 0x23 0x168>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x4a>; - }; - - gpio4@fe770000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xfe770000 0x00 0x100>; - interrupts = <0x00 0x25 0x04>; - clocks = <0x23 0x169 0x23 0x16a>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0xf4>; - }; - - pcfg-pull-up { - bias-pull-up; - phandle = <0x13b>; - }; - - pcfg-pull-down { - bias-pull-down; - phandle = <0x142>; - }; - - pcfg-pull-none { - bias-disable; - phandle = <0x139>; - }; - - pcfg-pull-none-drv-level-1 { - bias-disable; - drive-strength = <0x01>; - phandle = <0x13d>; - }; - - pcfg-pull-none-drv-level-2 { - bias-disable; - drive-strength = <0x02>; - phandle = <0x13c>; - }; - - pcfg-pull-none-drv-level-3 { - bias-disable; - drive-strength = <0x03>; - phandle = <0x141>; - }; - - pcfg-pull-up-drv-level-1 { - bias-pull-up; - drive-strength = <0x01>; - phandle = <0x140>; - }; - - pcfg-pull-up-drv-level-2 { - bias-pull-up; - drive-strength = <0x02>; - phandle = <0x13a>; - }; - - pcfg-pull-none-smt { - bias-disable; - input-schmitt-enable; - phandle = <0x13e>; - }; - - pcfg-output-low-pull-down { - output-low; - bias-pull-down; - phandle = <0x13f>; - }; - - acodec { - - acodec-pins { - rockchip,pins = <0x01 0x09 0x05 0x139 0x01 0x01 0x05 0x139 0x01 0x00 0x05 0x139 0x01 0x07 0x05 0x139 0x01 0x08 0x05 0x139 0x01 0x03 0x05 0x139 0x01 0x05 0x05 0x139>; - phandle = <0xea>; - }; - }; - - cam { - - vcc-cam { - rockchip,pins = <0x00 0x11 0x00 0x139>; - phandle = <0x158>; - }; - }; - - can1 { - - can1m1-pins { - rockchip,pins = <0x04 0x12 0x03 0x139 0x04 0x13 0x03 0x139>; - phandle = <0xec>; - }; - }; - - can2 { - - can2m0-pins { - rockchip,pins = <0x04 0x0c 0x03 0x139 0x04 0x0d 0x03 0x139>; - phandle = <0xed>; - }; - }; - - cif { - - cif-clk { - rockchip,pins = <0x04 0x10 0x01 0x139>; - phandle = <0xf3>; - }; - }; - - clk32k { - - clk32k-out0 { - rockchip,pins = <0x00 0x08 0x02 0x139>; - phandle = <0x22>; - }; - }; - - ebc { - - ebc-pins { - rockchip,pins = <0x04 0x10 0x02 0x139 0x04 0x0b 0x02 0x139 0x04 0x0c 0x02 0x139 0x04 0x06 0x02 0x139 0x04 0x11 0x02 0x139 0x03 0x16 0x02 0x139 0x03 0x17 0x02 0x139 0x03 0x18 0x02 0x139 0x03 0x19 0x02 0x139 0x03 0x1a 0x02 0x139 0x03 0x1b 0x02 0x139 0x03 0x1c 0x02 0x139 0x03 0x1d 0x02 0x139 0x03 0x1e 0x02 0x139 0x03 0x1f 0x02 0x139 0x04 0x00 0x02 0x139 0x04 0x01 0x02 0x139 0x04 0x02 0x02 0x139 0x04 0x03 0x02 0x139 0x04 0x04 0x02 0x139 0x04 0x05 0x02 0x139 0x04 0x0e 0x02 0x139 0x04 0x0f 0x02 0x139>; - phandle = <0x7c>; - }; - }; - - fspi { - - fspi-pins { - rockchip,pins = <0x01 0x18 0x01 0x139 0x01 0x1b 0x01 0x139 0x01 0x19 0x01 0x139 0x01 0x1a 0x01 0x139 0x01 0x17 0x02 0x139 0x01 0x1c 0x01 0x139>; - phandle = <0xd4>; - }; - }; - - gmac0 { - - gmac0-miim { - rockchip,pins = <0x02 0x13 0x02 0x139 0x02 0x14 0x02 0x139>; - phandle = <0xc8>; - }; - - gmac0-clkinout { - rockchip,pins = <0x02 0x12 0x02 0x139>; - phandle = <0xcd>; - }; - - gmac0-rx-bus2 { - rockchip,pins = <0x02 0x0e 0x01 0x139 0x02 0x0f 0x02 0x139 0x02 0x10 0x02 0x139>; - phandle = <0xca>; - }; - - gmac0-tx-bus2 { - rockchip,pins = <0x02 0x0b 0x01 0x13c 0x02 0x0c 0x01 0x13c 0x02 0x0d 0x01 0x139>; - phandle = <0xc9>; - }; - - gmac0-rgmii-clk { - rockchip,pins = <0x02 0x05 0x02 0x139 0x02 0x08 0x02 0x13d>; - phandle = <0xcb>; - }; - - gmac0-rgmii-bus { - rockchip,pins = <0x02 0x03 0x02 0x139 0x02 0x04 0x02 0x139 0x02 0x06 0x02 0x13c 0x02 0x07 0x02 0x13c>; - phandle = <0xcc>; - }; - }; - - gmac1 { - - gmac1m1-miim { - rockchip,pins = <0x04 0x0e 0x03 0x139 0x04 0x0f 0x03 0x139>; - phandle = <0x93>; - }; - - gmac1m1-clkinout { - rockchip,pins = <0x04 0x11 0x03 0x139>; - phandle = <0x98>; - }; - - gmac1m1-rx-bus2 { - rockchip,pins = <0x04 0x07 0x03 0x139 0x04 0x08 0x03 0x139 0x04 0x09 0x03 0x139>; - phandle = <0x95>; - }; - - gmac1m1-tx-bus2 { - rockchip,pins = <0x04 0x04 0x03 0x13c 0x04 0x05 0x03 0x13c 0x04 0x06 0x03 0x139>; - phandle = <0x94>; - }; - - gmac1m1-rgmii-clk { - rockchip,pins = <0x04 0x03 0x03 0x139 0x04 0x00 0x03 0x13d>; - phandle = <0x96>; - }; - - gmac1m1-rgmii-bus { - rockchip,pins = <0x04 0x01 0x03 0x139 0x04 0x02 0x03 0x139 0x03 0x1e 0x03 0x13c 0x03 0x1f 0x03 0x13c>; - phandle = <0x97>; - }; - }; - - hdmitx { - - hdmitxm0-cec { - rockchip,pins = <0x04 0x19 0x01 0x139>; - phandle = <0xac>; - }; - - hdmitx-scl { - rockchip,pins = <0x04 0x17 0x01 0x139>; - phandle = <0xaa>; - }; - - hdmitx-sda { - rockchip,pins = <0x04 0x18 0x01 0x139>; - phandle = <0xab>; - }; - }; - - i2c0 { - - i2c0-xfer { - rockchip,pins = <0x00 0x09 0x01 0x13e 0x00 0x0a 0x01 0x13e>; - phandle = <0x3d>; - }; - }; - - i2c1 { - - i2c1-xfer { - rockchip,pins = <0x00 0x0b 0x01 0x13e 0x00 0x0c 0x01 0x13e>; - phandle = <0xee>; - }; - }; - - i2c2 { - - i2c2m0-xfer { - rockchip,pins = <0x00 0x0d 0x01 0x13e 0x00 0x0e 0x01 0x13e>; - phandle = <0xf0>; - }; - }; - - i2c3 { - - i2c3m0-xfer { - rockchip,pins = <0x01 0x01 0x01 0x13e 0x01 0x00 0x01 0x13e>; - phandle = <0xf1>; - }; - }; - - i2c4 { - - i2c4m0-xfer { - rockchip,pins = <0x04 0x0b 0x01 0x13e 0x04 0x0a 0x01 0x13e>; - phandle = <0xf2>; - }; - }; - - i2c5 { - - i2c5m0-xfer { - rockchip,pins = <0x03 0x0b 0x04 0x13e 0x03 0x0c 0x04 0x13e>; - phandle = <0xfa>; - }; - }; - - i2s1 { - - i2s1m0-lrcktx { - rockchip,pins = <0x01 0x05 0x01 0x13e>; - phandle = <0xd7>; - }; - - i2s1m0-mclk { - rockchip,pins = <0x01 0x02 0x01 0x13e>; - phandle = <0x47>; - }; - - i2s1m0-sclktx { - rockchip,pins = <0x01 0x03 0x01 0x13e>; - phandle = <0xd6>; - }; - - i2s1m0-sdi0 { - rockchip,pins = <0x01 0x0b 0x01 0x139>; - phandle = <0xd8>; - }; - - i2s1m0-sdo0 { - rockchip,pins = <0x01 0x07 0x01 0x139>; - phandle = <0xd9>; - }; - }; - - i2s2 { - - i2s2m0-lrcktx { - rockchip,pins = <0x02 0x13 0x01 0x13e>; - phandle = <0xdb>; - }; - - i2s2m0-sclktx { - rockchip,pins = <0x02 0x12 0x01 0x13e>; - phandle = <0xda>; - }; - - i2s2m0-sdi { - rockchip,pins = <0x02 0x15 0x01 0x139>; - phandle = <0xdc>; - }; - - i2s2m0-sdo { - rockchip,pins = <0x02 0x14 0x01 0x139>; - phandle = <0xdd>; - }; - }; - - i2s3 { - - i2s3m0-lrck { - rockchip,pins = <0x03 0x04 0x04 0x13e>; - phandle = <0xdf>; - }; - - i2s3m0-sclk { - rockchip,pins = <0x03 0x03 0x04 0x13e>; - phandle = <0xde>; - }; - - i2s3m0-sdi { - rockchip,pins = <0x03 0x06 0x04 0x139>; - phandle = <0xe0>; - }; - - i2s3m0-sdo { - rockchip,pins = <0x03 0x05 0x04 0x139>; - phandle = <0xe1>; - }; - }; - - lcdc { - - lcdc-ctl { - rockchip,pins = <0x03 0x00 0x01 0x139 0x02 0x18 0x01 0x139 0x02 0x19 0x01 0x139 0x02 0x1a 0x01 0x139 0x02 0x1b 0x01 0x139 0x02 0x1c 0x01 0x139 0x02 0x1d 0x01 0x139 0x02 0x1e 0x01 0x139 0x02 0x1f 0x01 0x139 0x03 0x01 0x01 0x139 0x03 0x02 0x01 0x139 0x03 0x03 0x01 0x139 0x03 0x04 0x01 0x139 0x03 0x05 0x01 0x139 0x03 0x06 0x01 0x139 0x03 0x07 0x01 0x139 0x03 0x08 0x01 0x139 0x03 0x09 0x01 0x139 0x03 0x0a 0x01 0x139 0x03 0x0b 0x01 0x139 0x03 0x0c 0x01 0x139 0x03 0x0d 0x01 0x139 0x03 0x0e 0x01 0x139 0x03 0x0f 0x01 0x139 0x03 0x10 0x01 0x139 0x03 0x13 0x01 0x139 0x03 0x11 0x01 0x139 0x03 0x12 0x01 0x139>; - phandle = <0x39>; - }; - }; - - pdm { - - pdmm0-clk { - rockchip,pins = <0x01 0x06 0x03 0x139>; - phandle = <0xe2>; - }; - - pdmm0-clk1 { - rockchip,pins = <0x01 0x04 0x03 0x139>; - phandle = <0xe3>; - }; - - pdmm0-sdi0 { - rockchip,pins = <0x01 0x0b 0x02 0x139>; - phandle = <0xe4>; - }; - - pdmm0-sdi1 { - rockchip,pins = <0x01 0x0a 0x03 0x139>; - phandle = <0xe5>; - }; - - pdmm0-sdi2 { - rockchip,pins = <0x01 0x09 0x03 0x139>; - phandle = <0xe6>; - }; - - pdmm0-sdi3 { - rockchip,pins = <0x01 0x08 0x03 0x139>; - phandle = <0xe7>; - }; - }; - - pmic { - - pmic_int { - rockchip,pins = <0x00 0x03 0x00 0x13b>; - phandle = <0x40>; - }; - - soc_slppin_gpio { - rockchip,pins = <0x00 0x02 0x00 0x13f>; - phandle = <0x43>; - }; - - soc_slppin_slp { - rockchip,pins = <0x00 0x02 0x01 0x13b>; - phandle = <0x41>; - }; - - soc_slppin_rst { - rockchip,pins = <0x00 0x02 0x02 0x139>; - }; - - spk_ctl_gpio { - rockchip,pins = <0x03 0x15 0x00 0x13b>; - phandle = <0x48>; - }; - }; - - pwm0 { - - pwm0m0-pins { - rockchip,pins = <0x00 0x0f 0x01 0x139>; - phandle = <0x50>; - }; - }; - - pwm1 { - - pwm1m0-pins { - rockchip,pins = <0x00 0x10 0x01 0x139>; - phandle = <0x51>; - }; - }; - - pwm2 { - - pwm2m0-pins { - rockchip,pins = <0x00 0x11 0x01 0x139>; - phandle = <0x52>; - }; - }; - - pwm3 { - - pwm3-pins { - rockchip,pins = <0x00 0x12 0x01 0x139>; - phandle = <0x53>; - }; - }; - - pwm4 { - - pwm4-pins { - rockchip,pins = <0x00 0x13 0x01 0x139>; - phandle = <0x115>; - }; - }; - - pwm5 { - - pwm5-pins { - rockchip,pins = <0x00 0x14 0x01 0x139>; - phandle = <0x116>; - }; - }; - - pwm6 { - - pwm6-pins { - rockchip,pins = <0x00 0x15 0x01 0x139>; - phandle = <0x117>; - }; - }; - - pwm7 { - - pwm7-pins { - rockchip,pins = <0x00 0x16 0x01 0x139>; - phandle = <0x118>; - }; - }; - - pwm8 { - - pwm8m0-pins { - rockchip,pins = <0x03 0x09 0x05 0x139>; - phandle = <0x119>; - }; - }; - - pwm9 { - - pwm9m0-pins { - rockchip,pins = <0x03 0x0a 0x05 0x139>; - phandle = <0x11a>; - }; - }; - - pwm10 { - - pwm10m0-pins { - rockchip,pins = <0x03 0x0d 0x05 0x139>; - phandle = <0x11b>; - }; - }; - - pwm11 { - - pwm11m0-pins { - rockchip,pins = <0x03 0x0e 0x05 0x139>; - phandle = <0x11c>; - }; - }; - - pwm12 { - - pwm12m0-pins { - rockchip,pins = <0x03 0x0f 0x02 0x139>; - phandle = <0x11d>; - }; - }; - - pwm13 { - - pwm13m0-pins { - rockchip,pins = <0x03 0x10 0x02 0x139>; - phandle = <0x11e>; - }; - }; - - pwm14 { - - pwm14m0-pins { - rockchip,pins = <0x03 0x14 0x01 0x139>; - phandle = <0x11f>; - }; - }; - - pwm15 { - - pwm15m0-pins { - rockchip,pins = <0x03 0x15 0x01 0x139>; - phandle = <0x120>; - }; - }; - - scr { - - scr-pins { - rockchip,pins = <0x01 0x02 0x03 0x139 0x01 0x07 0x03 0x13b 0x01 0x03 0x03 0x13b 0x01 0x05 0x03 0x139>; - phandle = <0xeb>; - }; - }; - - sdmmc0 { - - sdmmc0-bus4 { - rockchip,pins = <0x01 0x1d 0x01 0x13a 0x01 0x1e 0x01 0x13a 0x01 0x1f 0x01 0x13a 0x02 0x00 0x01 0x13a>; - phandle = <0xd0>; - }; - - sdmmc0-clk { - rockchip,pins = <0x02 0x02 0x01 0x13a>; - phandle = <0xd1>; - }; - - sdmmc0-cmd { - rockchip,pins = <0x02 0x01 0x01 0x13a>; - phandle = <0xd2>; - }; - - sdmmc0-det { - rockchip,pins = <0x00 0x04 0x01 0x13b>; - phandle = <0xd3>; - }; - }; - - sdmmc2 { - - sdmmc2m0-bus4 { - rockchip,pins = <0x03 0x16 0x03 0x13a 0x03 0x17 0x03 0x13a 0x03 0x18 0x03 0x13a 0x03 0x19 0x03 0x13a>; - phandle = <0xb0>; - }; - - sdmmc2m0-clk { - rockchip,pins = <0x03 0x1b 0x03 0x13a>; - phandle = <0xb2>; - }; - - sdmmc2m0-cmd { - rockchip,pins = <0x03 0x1a 0x03 0x13a>; - phandle = <0xb1>; - }; - }; - - spdif { - - spdifm1-tx { - rockchip,pins = <0x03 0x15 0x02 0x139>; - phandle = <0xe9>; - }; - }; - - spi0 { - - spi0m0-pins { - rockchip,pins = <0x00 0x0d 0x02 0x139 0x00 0x15 0x02 0x139 0x00 0x0e 0x02 0x139>; - phandle = <0xfe>; - }; - - spi0m0-cs0 { - rockchip,pins = <0x00 0x16 0x02 0x139>; - phandle = <0xfc>; - }; - - spi0m0-cs1 { - rockchip,pins = <0x00 0x14 0x02 0x139>; - phandle = <0xfd>; - }; - }; - - spi1 { - - spi1m1-pins { - rockchip,pins = <0x03 0x13 0x03 0x139 0x03 0x12 0x03 0x139 0x03 0x11 0x03 0x139>; - phandle = <0x100>; - }; - }; - - spi2 { - - spi2m0-pins { - rockchip,pins = <0x02 0x11 0x04 0x139 0x02 0x12 0x04 0x139 0x02 0x13 0x04 0x139>; - phandle = <0x105>; - }; - - spi2m0-cs0 { - rockchip,pins = <0x02 0x14 0x04 0x139>; - phandle = <0x103>; - }; - - spi2m0-cs1 { - rockchip,pins = <0x02 0x15 0x04 0x139>; - phandle = <0x104>; - }; - }; - - spi3 { - - spi3m0-pins { - rockchip,pins = <0x04 0x0b 0x04 0x139 0x04 0x08 0x04 0x139 0x04 0x0a 0x04 0x139>; - phandle = <0x109>; - }; - - spi3m0-cs0 { - rockchip,pins = <0x04 0x06 0x04 0x139>; - phandle = <0x107>; - }; - - spi3m0-cs1 { - rockchip,pins = <0x04 0x07 0x04 0x139>; - phandle = <0x108>; - }; - }; - - tsadc { - - tsadc-shutorg { - rockchip,pins = <0x00 0x01 0x02 0x139>; - phandle = <0x124>; - }; - }; - - uart0 { - - uart0-xfer { - rockchip,pins = <0x00 0x10 0x03 0x13b 0x00 0x11 0x03 0x13b>; - phandle = <0x4f>; - }; - }; - - uart1 { - - uart1m0-xfer { - rockchip,pins = <0x02 0x0b 0x02 0x13b 0x02 0x0c 0x02 0x13b>; - phandle = <0x10b>; - }; - }; - - uart2 { - - uart2m0-xfer { - rockchip,pins = <0x00 0x18 0x01 0x13b 0x00 0x19 0x01 0x13b>; - phandle = <0x10c>; - }; - }; - - uart3 { - - uart3m1-xfer { - rockchip,pins = <0x03 0x10 0x04 0x13b 0x03 0x0f 0x04 0x13b>; - phandle = <0x10d>; - }; - }; - - uart4 { - - uart4m1-xfer { - rockchip,pins = <0x03 0x09 0x04 0x13b 0x03 0x0a 0x04 0x13b>; - phandle = <0x10e>; - }; - }; - - uart5 { - - uart5m0-xfer { - rockchip,pins = <0x02 0x01 0x03 0x13b 0x02 0x02 0x03 0x13b>; - phandle = <0x10f>; - }; - }; - - uart6 { - - uart6m0-xfer { - rockchip,pins = <0x02 0x03 0x03 0x13b 0x02 0x04 0x03 0x13b>; - phandle = <0x110>; - }; - }; - - uart7 { - - uart7m1-xfer { - rockchip,pins = <0x03 0x15 0x04 0x13b 0x03 0x14 0x04 0x13b>; - phandle = <0x111>; - }; - }; - - uart8 { - - uart8m0-xfer { - rockchip,pins = <0x02 0x16 0x02 0x13b 0x02 0x15 0x03 0x13b>; - phandle = <0x112>; - }; - - uart8m0-ctsn { - rockchip,pins = <0x02 0x0a 0x03 0x139>; - phandle = <0x113>; - }; - - uart8m0-rtsn { - rockchip,pins = <0x02 0x09 0x03 0x139>; - phandle = <0x155>; - }; - }; - - uart9 { - - uart9m1-xfer { - rockchip,pins = <0x04 0x16 0x04 0x13b 0x04 0x15 0x04 0x13b>; - phandle = <0x114>; - }; - }; - - spi0-hs { - - spi0m0-pins { - rockchip,pins = <0x00 0x0d 0x02 0x140 0x00 0x15 0x02 0x140 0x00 0x0e 0x02 0x140>; - phandle = <0xff>; - }; - }; - - spi1-hs { - - spi1m1-pins { - rockchip,pins = <0x03 0x13 0x03 0x140 0x03 0x12 0x03 0x140 0x03 0x11 0x03 0x140>; - phandle = <0x101>; - }; - }; - - spi2-hs { - - spi2m0-pins { - rockchip,pins = <0x02 0x11 0x04 0x140 0x02 0x12 0x04 0x140 0x02 0x13 0x04 0x140>; - phandle = <0x106>; - }; - }; - - spi3-hs { - - spi3m0-pins { - rockchip,pins = <0x04 0x0b 0x04 0x140 0x04 0x08 0x04 0x140 0x04 0x0a 0x04 0x140>; - phandle = <0x10a>; - }; - }; - - gpio-func { - - tsadc-gpio-func { - rockchip,pins = <0x00 0x01 0x00 0x139>; - phandle = <0x123>; - }; - }; - - usb { - - vcc5v0-host-en { - rockchip,pins = <0x00 0x06 0x00 0x139>; - phandle = <0x150>; - }; - - vcc5v0-otg-en { - rockchip,pins = <0x00 0x05 0x00 0x139>; - phandle = <0x151>; - }; - - vcc-hub-reset-en { - rockchip,pins = <0x01 0x04 0x00 0x139>; - phandle = <0x15a>; - }; - }; - - headphone { - - hp-det { - rockchip,pins = <0x03 0x12 0x00 0x142>; - phandle = <0x148>; - }; - }; - - sdio-pwrseq { - - wifi-enable-h { - rockchip,pins = <0x03 0x1d 0x00 0x139>; - phandle = <0x153>; - }; - }; - - wireless-wlan { - - wifi-host-wake-irq { - rockchip,pins = <0x03 0x1c 0x00 0x142>; - phandle = <0x154>; - }; - }; - - wireless-bluetooth { - - uart8-gpios { - rockchip,pins = <0x02 0x09 0x00 0x139>; - phandle = <0x156>; - }; - }; - - touch { - - touch-gpio { - rockchip,pins = <0x00 0x0d 0x00 0x13b 0x00 0x0e 0x00 0x139>; - phandle = <0xef>; - }; - }; - - mxc6655xa { - - mxc6655xa_irq_gpio { - rockchip,pins = <0x03 0x11 0x00 0x139>; - phandle = <0xfb>; - }; - }; - - pcie { - - pcie-pi6c-oe-en { - rockchip,pins = <0x03 0x07 0x00 0x139>; - phandle = <0x15b>; - }; - }; - - leds { - - leds-gpio { - rockchip,pins = <0x01 0x0a 0x00 0x139 0x01 0x09 0x00 0x139 0x01 0x08 0x00 0x139 0x02 0x11 0x00 0x139>; - phandle = <0x15d>; - }; - }; - - 4g { - - vcc-4g-power-en { - rockchip,pins = <0x03 0x03 0x00 0x139>; - phandle = <0x15c>; - }; - }; - - usb-typec { - - usbc0-int { - rockchip,pins = <0x00 0x11 0x00 0x13b>; - phandle = <0x4b>; - }; - - vcc5v0-typec0-en { - rockchip,pins = <0x00 0x05 0x00 0x139>; - }; - }; - }; - - audiopwmout-diff { - status = "disabled"; - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "rockchip,audiopwmout-diff"; - simple-audio-card,mclk-fs = <0x100>; - simple-audio-card,bitclock-master = <0x143>; - simple-audio-card,frame-master = <0x143>; - - simple-audio-card,cpu { - sound-dai = <0x144>; - }; - - simple-audio-card,codec { - sound-dai = <0x145>; - phandle = <0x143>; - }; - }; - - dc-12v { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xb71b00>; - regulator-max-microvolt = <0xb71b00>; - phandle = <0x14f>; - }; - - hdmi-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,mclk-fs = <0x80>; - simple-audio-card,name = "rockchip,hdmi"; - status = "okay"; - - simple-audio-card,cpu { - sound-dai = <0x146>; - }; - - simple-audio-card,codec { - sound-dai = <0x147>; - }; - }; - - rk-headset { - status = "disabled"; - compatible = "rockchip_headset"; - headset_gpio = <0x4a 0x12 0x01>; - pinctrl-names = "default"; - pinctrl-0 = <0x148>; - }; - - dummy-codec { - status = "disabled"; - compatible = "rockchip,dummy-codec"; - #sound-dai-cells = <0x00>; - phandle = <0x14a>; - }; - - pdm-mic-array { - status = "disabled"; - compatible = "simple-audio-card"; - simple-audio-card,name = "rockchip,pdm-mic-array"; - - simple-audio-card,cpu { - sound-dai = <0x149>; - }; - - simple-audio-card,codec { - sound-dai = <0x14a>; - }; - }; - - rk809-sound { - status = "okay"; - compatible = "rockchip,multicodecs-card"; - rockchip,card-name = "rockchip-rk809"; - rockchip,format = "i2s"; - rockchip,mclk-fs = <0x100>; - rockchip,cpu = <0xe8>; - rockchip,codec = <0x14b>; - }; - - spdif-sound { - status = "okay"; - compatible = "simple-audio-card"; - simple-audio-card,name = "ROCKCHIP,SPDIF"; - - simple-audio-card,cpu { - sound-dai = <0x14c>; - }; - - simple-audio-card,codec { - sound-dai = <0x14d>; - }; - }; - - spdif-out { - status = "okay"; - compatible = "linux,spdif-dit"; - #sound-dai-cells = <0x00>; - phandle = <0x14d>; - }; - - vad-sound { - status = "disabled"; - compatible = "rockchip,multicodecs-card"; - rockchip,card-name = "rockchip,rk3568-vad"; - rockchip,cpu = <0xe8>; - rockchip,codec = <0x14b 0x14e>; - }; - - vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - vin-supply = <0x14f>; - phandle = <0x46>; - }; - - vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-max-microvolt = <0x4c4b40>; - vin-supply = <0x14f>; - phandle = <0x3e>; - }; - - vcc5v0-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <0x3f 0x06 0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0x150>; - regulator-name = "vcc5v0_host"; - regulator-always-on; - regulator-boot-on; - phandle = <0x136>; - }; - - vcc5v0-otg-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <0x3f 0x05 0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0x151>; - regulator-name = "vcc5v0_otg"; - phandle = <0x4c>; - }; - - vcc3v3-lcd0-n { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_lcd0_n"; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3-lcd1-n { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_lcd1_n"; - regulator-boot-on; - status = "disabled"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - test-power { - status = "okay"; - }; - - chosen { - // linux,initrd-end = <0x00 0xaacf15d>; - // linux,initrd-start = <0x00 0xa200000>; - bootargs = "storagemedia=emmc androidboot.storagemedia=emmc androidboot.mode=normal androidboot.verifiedbootstate=orange rw rootwait earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 root=PARTLABEL=rootfs rootfstype=ext4 overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 swiotlb=0x10000 net.ifnames=0 comm-05/20/2025 androidboot.fwver=ddr-v1.21-2d653b3476,spl-v1.14,bl31-v1.44,bl32-v2.12,uboot--boot"; - }; - - fiq-debugger { - compatible = "rockchip,fiq-debugger"; - rockchip,serial-id = <0x02>; - rockchip,wake-irq = <0x00>; - rockchip,irq-mode-enable = <0x01>; - rockchip,baudrate = <0x16e360>; - interrupts = <0x00 0xfc 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0x10c>; - status = "okay"; - }; - - debug@fd904000 { - compatible = "rockchip,debug"; - reg = <0x00 0xfd904000 0x00 0x1000 0x00 0xfd905000 0x00 0x1000 0x00 0xfd906000 0x00 0x1000 0x00 0xfd907000 0x00 0x1000>; - }; - - cspmu@fd90c000 { - compatible = "rockchip,cspmu"; - reg = <0x00 0xfd90c000 0x00 0x1000 0x00 0xfd90d000 0x00 0x1000 0x00 0xfd90e000 0x00 0x1000 0x00 0xfd90f000 0x00 0x1000>; - }; - - adc-keys { - compatible = "adc-keys"; - io-channels = <0x49 0x00>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <0x1b7740>; - poll-interval = <0x64>; - - recovery-key { - label = "F12"; - linux,code = <0x58>; - press-threshold-microvolt = <0x6d6>; - }; - - vol-down-key { - label = "volume down"; - linux,code = <0x72>; - press-threshold-microvolt = <0x48a1c>; - }; - - menu-key { - label = "menu"; - linux,code = <0x8b>; - press-threshold-microvolt = <0xef420>; - }; - - back-key { - label = "back"; - linux,code = <0x9e>; - press-threshold-microvolt = <0x13eb9c>; - }; - }; - - vcc2v5-ddr { - compatible = "regulator-fixed"; - regulator-name = "vcc2v5-sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x2625a0>; - regulator-max-microvolt = <0x2625a0>; - vin-supply = <0x46>; - }; - - pcie30-avdd0v9 { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xdbba0>; - regulator-max-microvolt = <0xdbba0>; - vin-supply = <0x46>; - }; - - pcie30-avdd1v8 { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - vin-supply = <0x46>; - }; - - gpio-regulator { - compatible = "regulator-gpio"; - regulator-name = "pcie30_3v3"; - regulator-min-microvolt = <0x186a0>; - regulator-max-microvolt = <0x325aa0>; - gpios = <0x3f 0x1c 0x00>; - gpios-states = <0x01>; - states = <0x186a0 0x00 0x325aa0 0x01>; - phandle = <0xc2>; - }; - - vcc3v3-bu { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_bu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - vin-supply = <0x3e>; - }; - - sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <0x152 0x01>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <0x153>; - post-power-on-delay-ms = <0x64>; - reset-gpios = <0x4a 0x1d 0x01>; - status = "okay"; - phandle = <0xb3>; - }; - - wireless-wlan { - compatible = "wlan-platdata"; - rockchip,grf = <0x3b>; - wifi_chip_type = "ap6256"; - pinctrl-names = "default"; - pinctrl-0 = <0x154>; - WIFI,host_wake_irq = <0x4a 0x1c 0x00>; - status = "okay"; - }; - - wireless-bluetooth { - compatible = "bluetooth-platdata"; - clocks = <0x152 0x01>; - clock-names = "ext_clock"; - uart_rts_gpios = <0x91 0x09 0x01>; - pinctrl-names = "default\0rts_gpio"; - pinctrl-0 = <0x155>; - pinctrl-1 = <0x156>; - BT,reset_gpio = <0x4a 0x00 0x00>; - BT,wake_gpio = <0x4a 0x02 0x00>; - BT,wake_host_irq = <0x4a 0x01 0x00>; - status = "okay"; - }; - - flash-led { - compatible = "led,rgb13h"; - label = "pwm-flash-led"; - led-max-microamp = <0x4e20>; - flash-max-microamp = <0x4e20>; - flash-max-timeout-us = <0xf4240>; - pwms = <0x157 0x00 0x61a8 0x00>; - rockchip,camera-module-index = <0x01>; - rockchip,camera-module-facing = "front"; - status = "disabled"; - }; - - vcc-camera-regulator { - compatible = "regulator-fixed"; - gpio = <0x102 0x03 0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0x158>; - regulator-name = "vcc_camera"; - enable-active-high; - status = "disabled"; - }; - - vcc-hub-reset-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <0x159 0x04 0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0x15a>; - regulator-name = "vcc_hub_reset_en"; - regulator-always-on; - }; - - pcie-pi6c-oe-regulator { - compatible = "regulator-fixed"; - gpio = <0x4a 0x07 0x01>; - pinctrl-names = "default"; - pinctrl-0 = <0x15b>; - regulator-name = "pcie_pi6c_oe_en"; - regulator-always-on; - }; - - vcc-4g-power-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <0x4a 0x03 0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0x15c>; - regulator-name = "vcc_4g_power_en"; - regulator-always-on; - }; - - leds { - status = "okay"; - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <0x15d>; - - power { - label = "firefly:blue:power"; - linux,default-trigger = "ir-power-click"; - default-state = "on"; - gpios = <0x159 0x0a 0x00>; - }; - - user { - label = "firefly:yellow:user"; - linux,default-trigger = "ir-user-click"; - default-state = "off"; - gpios = <0x159 0x09 0x00>; - }; - - diy1 { - label = "firefly:green:diy"; - linux,default-trigger = "ir-user-click"; - default-state = "off"; - gpios = <0x159 0x08 0x00>; - }; - - diy2 { - label = "firefly:yellow:diy"; - linux,default-trigger = "ir-user-click"; - default-state = "off"; - gpios = <0x91 0x11 0x00>; - }; - }; -}; \ No newline at end of file diff --git a/configs/vms_bkp/linux-aarch64-rk3568_smp2.toml b/configs/vms_bkp/linux-aarch64-rk3568_smp2.toml deleted file mode 100644 index 411b7fdc..00000000 --- a/configs/vms_bkp/linux-aarch64-rk3568_smp2.toml +++ /dev/null @@ -1,86 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 1 -# Guest vm name. -name = "linux" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 2 -# The physical CPU ids. -phys_cpu_ids = [0x200, 0x300] -# Guest vm physical cpu sets. -phys_cpu_sets = [4, 8] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x8008_0000 -# The location of image: "memory" | "fs". -# Load from memory. -image_location = "memory" -# The load address of the kernel image. -kernel_load_addr = 0x8008_0000 -## The file path of the kernel image. -kernel_path = "/code/axvisor/rk3568-linux/Image" -## The file path of the device tree blob (DTB). -dtb_load_addr = 0x8000_0000 -dtb_path = "/code/axvisor/configs/vms/linux-aarch64-rk3568_smp2.dtb" -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x8000_0000, 0x6000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL -] -# -# Device specifications -# -[devices] -# The interrupt mode. -interrupt_mode = "passthrough" -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - # [ - # "peripherals 1", - # 0xf000_0000, - # 0xf000_0000, - # 0xe66_0000, - # 0x1, - # ], - # [ - # "peripherals 2", - # 0xfe67_0000, - # 0xfe67_0000, - # 0x99_0000, - # 0x1, - # ], - [ - "all peripherals", - 0xf0000000, - 0xf0000000, - 0xf000000, - 0x1, - ], - [ - "PCIe related", - 0x300000000, - 0x300000000, - 0xd0000000, - 0x1, - ], - [ - "ramoops, scmi-shmem, etc.", - 0x100000, - 0x100000, - 0x200000, - 0x1, - ], -] diff --git a/configs/vms_bkp/linux-qemu-aarch64-gicv3-a.toml b/configs/vms_bkp/linux-qemu-aarch64-gicv3-a.toml deleted file mode 100644 index 247a2a6e..00000000 --- a/configs/vms_bkp/linux-qemu-aarch64-gicv3-a.toml +++ /dev/null @@ -1,82 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 1 -# Guest vm name. -name = "linux-qemu" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 1 -# Guest vm physical cpu sets. -phys_cpu_ids = [0] -phys_cpu_sets = [1] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x8008_0000 -# The location of image: "memory" | "fs". -# load from memory. -image_location = "memory" -# The file path of the kernel image. -# kernel_path = "linux-6.6.62.bin" -kernel_path = "linux-5.10.198.bin" -# The load address of the kernel image. -kernel_load_addr = 0x8008_0000 -# The file path of the device tree blob (DTB). -dtb_path = "linux-qemu_gicv3.dtb" -# The load address of the device tree blob (DTB). -dtb_load_addr = 0x8000_0000 - -## load from file system -# image_location = "fs" -## The file path of the kernel image. -# kernel_path = "linux-arceos-aarch64.bin" -## The file path of the device tree blob (DTB). -# dtb_path = "linux-rk3588.dtb" - -## The file path of the ramdisk image. -# ramdisk_path = "" -## The load address of the ramdisk image. -# ramdisk_load_addr = 0 -## The path of the disk image. -# disk_path = "disk.img" - -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - # [0x8000_0000, 0x4000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL -] - -# -# Device specifications -# -[devices] -# Pass-through devices. -passthrough_devices = [ - # ["intc@8000000", 0x800_0000, 0x800_0000, 0x50_000, 0x1], - # ["pl011@9000000", 0x900_0000, 0x900_0000, 0x1000, 0x1], - # ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], - # ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], - # a003000.virtio_mmio virtio_mmio@a003000 - # a003200.virtio_mmio virtio_mmio@a003200 - # ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], - ["low-devices", 0x0, 0x0, 0x0800_0000, 0x1], - ["low-devices2", 0x09000000, 0x09000000, 0x1000_0000, 0x1], - ["pci", 0x8000000000, 0x8000000000, 0x10000, 0x1], - ["pci", 0x4010000000, 0x4010000000, 0x100000, 0x1], -] - -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [ - ["gppt-gicd", 0x0800_0000, 0x1_0000, 0, 0x21, []], - ["gppt-gicr", 0x080a_0000, 0x2_0000, 0, 0x20, [1, 0x2_0000, 0]], # 1 vcpu, stride 0x20000, starts with pcpu 0 - ["gppt-gits", 0x0808_0000, 0x2_0000, 0, 0x22, [0x0808_0000]], # host_gits_base -] - -interrupt_mode = "passthrough" diff --git a/configs/vms_bkp/linux-qemu-aarch64-gicv3-b.toml b/configs/vms_bkp/linux-qemu-aarch64-gicv3-b.toml deleted file mode 100644 index 5bfd84e3..00000000 --- a/configs/vms_bkp/linux-qemu-aarch64-gicv3-b.toml +++ /dev/null @@ -1,83 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 2 -# Guest vm name. -name = "linux-qemu-b" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 1 -# Guest vm physical cpu sets. -phys_cpu_ids = [1] -phys_cpu_sets = [2] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0xc008_0000 -# The location of image: "memory" | "fs". -# load from memory. -image_location = "memory" -# The file path of the kernel image. -# kernel_path = "linux-6.6.62.bin" -kernel_path = "linux-5.10.198.bin" -# The load address of the kernel image. -kernel_load_addr = 0xc008_0000 -# The file path of the device tree blob (DTB). -dtb_path = "linux-qemu_gicv3-b.dtb" -# The load address of the device tree blob (DTB). -dtb_load_addr = 0xc000_0000 -# Use `bios` to load initramfs. -bios_load_addr = 0xfe00_0000 -bios_path = "initramfs-busybox-arm64.cpio.gz" - -## load from file system -# image_location = "fs" -## The file path of the kernel image. -# kernel_path = "linux-arceos-aarch64.bin" -## The file path of the device tree blob (DTB). -# dtb_path = "linux-rk3588.dtb" - -## The file path of the ramdisk image. -# ramdisk_path = "" -## The load address of the ramdisk image. -# ramdisk_load_addr = 0 -## The path of the disk image. -# disk_path = "disk.img" - -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - # [0xc000_0000, 0x4000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL -] - -# -# Device specifications -# -[devices] -# Pass-through devices. -passthrough_devices = [ - # ["intc@8000000", 0x800_0000, 0x800_0000, 0x50_000, 0x1], - # ["pl011@9000000", 0x900_0000, 0x900_0000, 0x1000, 0x1], - # ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], - # ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], - # a003000.virtio_mmio virtio_mmio@a003000 - # a003200.virtio_mmio virtio_mmio@a003200 - # ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], - # ["low-memory", 0x0, 0x0, 0x2000_0000, 0x1], - ["pl011@9100000", 0x910_0000, 0x910_0000, 0x1000, 0x1], # ["pci", 0x8000000000, 0x8000000000, 0x10000, 0x1], - # ["pci", 0x4010000000, 0x4010000000, 0x100000, 0x1], -] - -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [ - ["gppt-gicd", 0x0800_0000, 0x1_0000, 0, 0x21, []], - ["gppt-gicr", 0x080c_0000, 0x2_0000, 0, 0x20, [1, 0x2_0000, 1]], # 1 vcpu, stride 0x20000 -] - -interrupt_mode = "passthrough" diff --git a/configs/vms_bkp/linux-qemu-aarch64-mem.toml b/configs/vms_bkp/linux-qemu-aarch64-mem.toml deleted file mode 100644 index d2c1a819..00000000 --- a/configs/vms_bkp/linux-qemu-aarch64-mem.toml +++ /dev/null @@ -1,70 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 1 -# Guest vm name. -name = "linux-qemu" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 1 -# Guest vm physical cpu sets. -phys_cpu_ids = [0] -phys_cpu_sets = [1] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x8020_0000 -# The location of image: "memory" | "fs". -# load from memory. -image_location = "memory" -# The file path of the kernel image. -# kernel_path = "linux-6.6.62.bin" -kernel_path = "tmp/Image" -# The load address of the kernel image. -kernel_load_addr = 0x8020_0000 -# The file path of the device tree blob (DTB). -dtb_path = "tmp/aarch64-qemu-gicv3.dtb" -# The load address of the device tree blob (DTB). -dtb_load_addr = 0x8000_0000 - -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - # [0x8000_0000, 0x4000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL -] - -# -# Device specifications -# -[devices] -# Pass-through devices. -passthrough_devices = [ - ["intc@8000000", 0x800_0000, 0x800_0000, 0x100_0000, 0x1], - # ["pl011@9000000", 0x900_0000, 0x900_0000, 0x1000, 0x1], - # ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], - # ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], - # a003000.virtio_mmio virtio_mmio@a003000 - # a003200.virtio_mmio virtio_mmio@a003200 - # ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], - # ["low-devices", 0x0, 0x0, 0x0800_0000, 0x1], - # ["low-devices2", 0x09000000, 0x09000000, 0x1000_0000, 0x1], - # ["pci@10000000", 0x10000000, 0x10000000, 0x10000000, 0x1], - # ["pci", 0x4010000000, 0x4010000000, 0x100000, 0x1], - # ["pci-range", 0x8000000000, 0x8000000000, 0x10000, 0x1], -] - -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [ - # ["gppt-gicd", 0x0800_0000, 0x1_0000, 0, 0x21, []], - # ["gppt-gicr", 0x080a_0000, 0x2_0000, 0, 0x20, [1, 0x2_0000, 0]], # 1 vcpu, stride 0x20000, starts with pcpu 0 - # ["gppt-gits", 0x0808_0000, 0x2_0000, 0, 0x22, [0x0808_0000]], # host_gits_base -] - -interrupt_mode = "passthrough" - diff --git a/configs/vms_bkp/linux-qemu-aarch64-smp2.toml b/configs/vms_bkp/linux-qemu-aarch64-smp2.toml deleted file mode 100644 index 25d93746..00000000 --- a/configs/vms_bkp/linux-qemu-aarch64-smp2.toml +++ /dev/null @@ -1,68 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 1 -# Guest vm name. -name = "linux-qemu" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 2 -# Guest vm physical cpu sets. -phys_cpu_sets = [1, 2] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x8008_0000 -# The location of image: "memory" | "fs". -# load from memory. -image_location = "memory" -# The file path of the kernel image. -kernel_path = "linux-6.6.62.bin" -# The load address of the kernel image. -kernel_load_addr = 0x8008_0000 -# The file path of the device tree blob (DTB). -dtb_path = "linux-qemu-smp2.dtb" -# The load address of the device tree blob (DTB). -dtb_load_addr = 0x8000_0000 - -## load from file system -# image_location = "fs" -## The file path of the kernel image. -# kernel_path = "linux-arceos-aarch64.bin" -## The file path of the device tree blob (DTB). -# dtb_path = "linux-rk3588.dtb" - -## The file path of the ramdisk image. -# ramdisk_path = "" -## The load address of the ramdisk image. -# ramdisk_load_addr = 0 -## The path of the disk image. -# disk_path = "disk.img" - -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x8000_0000, 0x4000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL -] - -# -# Device specifications -# -[devices] -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] - -# Pass-through devices. -passthrough_devices = [ - ["intc@8000000", 0x800_0000, 0x800_0000, 0x50_000, 0x1], - ["pl011@9000000", 0x900_0000, 0x900_0000, 0x1000, 0x1], - ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], - ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], # a003000.virtio_mmio virtio_mmio@a003000 # a003200.virtio_mmio virtio_mmio@a003200 - ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], -] diff --git a/configs/vms_bkp/linux-qemu-aarch64-vm2.toml b/configs/vms_bkp/linux-qemu-aarch64-vm2.toml deleted file mode 100644 index 86310110..00000000 --- a/configs/vms_bkp/linux-qemu-aarch64-vm2.toml +++ /dev/null @@ -1,68 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 2 -# Guest vm name. -name = "linux-qemu" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 1 -# Guest vm physical cpu sets. -phys_cpu_sets = [2] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x8008_0000 -# The location of image: "memory" | "fs" -# load from memory -image_location = "memory" -# The file path of the kernel image. -kernel_path = "linux-6.6.62.bin" -# The load address of the kernel image. -kernel_load_addr = 0x8008_0000 -# The file path of the device tree blob (DTB). -dtb_path = "linux-qemu.dtb" -# The load address of the device tree blob (DTB). -dtb_load_addr = 0x8000_0000 - -## load from file system -# image_location = "fs" -## The file path of the kernel image. -# kernel_path = "linux-arceos-aarch64.bin" -## The file path of the device tree blob (DTB). -# dtb_path = "linux-rk3588.dtb" - -## The file path of the ramdisk image. -# ramdisk_path = "" -## The load address of the ramdisk image. -# ramdisk_load_addr = 0 -## The path of the disk image. -# disk_path = "disk.img" - -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x8000_0000, 0x4000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL -] - -# -# Device specifications -# -[devices] -# Pass-through devices -passthrough_devices = [ - ["intc@8000000", 0x800_0000, 0x800_0000, 0x50_000, 0x1], # map qemu uart2 as vm uart - ["pl011@9000000", 0x900_0000, 0x904_0000, 0x1000, 0x1], - ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], - ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], # a003000.virtio_mmio virtio_mmio@a003000 # a003200.virtio_mmio virtio_mmio@a003200 - ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], -] - -# Emu_devices -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig -emu_devices = [] diff --git a/configs/vms_bkp/linux-qemu-aarch64.toml b/configs/vms_bkp/linux-qemu-aarch64.toml deleted file mode 100644 index e35ad773..00000000 --- a/configs/vms_bkp/linux-qemu-aarch64.toml +++ /dev/null @@ -1,76 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 1 -# Guest vm name. -name = "linux-qemu" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 1 -# Guest vm physical cpu sets. -phys_cpu_ids = [0] -phys_cpu_sets = [1] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x8020_0000 -# The location of image: "memory" | "fs". -# load from memory. -image_location = "fs" -# The file path of the kernel image. -kernel_path = "/boot/Image" -# The load address of the kernel image. -kernel_load_addr = 0x8020_0000 -# The file path of the device tree blob (DTB). -dtb_path = "/boot/aarch64-qemu-gicv3.dtb" -# The load address of the device tree blob (DTB). -dtb_load_addr = 0x8000_0000 - -## The file path of the ramdisk image. -# ramdisk_path = "" -## The load address of the ramdisk image. -# ramdisk_load_addr = 0 -## The path of the disk image. -# disk_path = "disk.img" - -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - # [0x8000_0000, 0x4000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL -] - -# -# Device specifications -# -[devices] -# Pass-through devices. -passthrough_devices = [ - ["intc@8000000", 0x800_0000, 0x800_0000, 0x100_0000, 0x1], - # ["pl011@9000000", 0x900_0000, 0x900_0000, 0x1000, 0x1], - # ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], - # ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], - # a003000.virtio_mmio virtio_mmio@a003000 - # a003200.virtio_mmio virtio_mmio@a003200 - # ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], - # ["low-devices", 0x0, 0x0, 0x0800_0000, 0x1], - # ["low-devices2", 0x09000000, 0x09000000, 0x1000_0000, 0x1], - # ["pci@10000000", 0x10000000, 0x10000000, 0x10000000, 0x1], - # ["pci", 0x4010000000, 0x4010000000, 0x100000, 0x1], - # ["pci-range", 0x8000000000, 0x8000000000, 0x10000, 0x1], -] - -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [ - # ["gppt-gicd", 0x0800_0000, 0x1_0000, 0, 0x21, []], - # ["gppt-gicr", 0x080a_0000, 0x2_0000, 0, 0x20, [1, 0x2_0000, 0]], # 1 vcpu, stride 0x20000, starts with pcpu 0 - # ["gppt-gits", 0x0808_0000, 0x2_0000, 0, 0x22, [0x0808_0000]], # host_gits_base -] - -interrupt_mode = "passthrough" - diff --git a/configs/vms_bkp/linux-qemu-smp2.dts b/configs/vms_bkp/linux-qemu-smp2.dts deleted file mode 100644 index 3168e40a..00000000 --- a/configs/vms_bkp/linux-qemu-smp2.dts +++ /dev/null @@ -1,364 +0,0 @@ -/dts-v1/; - -/ { - interrupt-parent = <0x8003>; - model = "linux,dummy-virt"; - #size-cells = <0x02>; - #address-cells = <0x02>; - compatible = "linux,dummy-virt"; - - psci { - migrate = <0xc4000005>; - cpu_on = <0xc4000003>; - cpu_off = <0x84000002>; - cpu_suspend = <0xc4000001>; - method = "smc"; - compatible = "arm,psci-1.0\0arm,psci-0.2\0arm,psci"; - }; - - memory@80000000 { - reg = <0x00 0x80000000 0x00 0x40000000>; - device_type = "memory"; - }; - - virtio_mmio@a000000 { - dma-coherent; - interrupts = <0x00 0x10 0x01>; - reg = <0x00 0xa000000 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000200 { - dma-coherent; - interrupts = <0x00 0x11 0x01>; - reg = <0x00 0xa000200 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000400 { - dma-coherent; - interrupts = <0x00 0x12 0x01>; - reg = <0x00 0xa000400 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000600 { - dma-coherent; - interrupts = <0x00 0x13 0x01>; - reg = <0x00 0xa000600 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000800 { - dma-coherent; - interrupts = <0x00 0x14 0x01>; - reg = <0x00 0xa000800 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000a00 { - dma-coherent; - interrupts = <0x00 0x15 0x01>; - reg = <0x00 0xa000a00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000c00 { - dma-coherent; - interrupts = <0x00 0x16 0x01>; - reg = <0x00 0xa000c00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000e00 { - dma-coherent; - interrupts = <0x00 0x17 0x01>; - reg = <0x00 0xa000e00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001000 { - dma-coherent; - interrupts = <0x00 0x18 0x01>; - reg = <0x00 0xa001000 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001200 { - dma-coherent; - interrupts = <0x00 0x19 0x01>; - reg = <0x00 0xa001200 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001400 { - dma-coherent; - interrupts = <0x00 0x1a 0x01>; - reg = <0x00 0xa001400 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001600 { - dma-coherent; - interrupts = <0x00 0x1b 0x01>; - reg = <0x00 0xa001600 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001800 { - dma-coherent; - interrupts = <0x00 0x1c 0x01>; - reg = <0x00 0xa001800 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001a00 { - dma-coherent; - interrupts = <0x00 0x1d 0x01>; - reg = <0x00 0xa001a00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001c00 { - dma-coherent; - interrupts = <0x00 0x1e 0x01>; - reg = <0x00 0xa001c00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001e00 { - dma-coherent; - interrupts = <0x00 0x1f 0x01>; - reg = <0x00 0xa001e00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002000 { - dma-coherent; - interrupts = <0x00 0x20 0x01>; - reg = <0x00 0xa002000 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002200 { - dma-coherent; - interrupts = <0x00 0x21 0x01>; - reg = <0x00 0xa002200 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002400 { - dma-coherent; - interrupts = <0x00 0x22 0x01>; - reg = <0x00 0xa002400 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002600 { - dma-coherent; - interrupts = <0x00 0x23 0x01>; - reg = <0x00 0xa002600 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002800 { - dma-coherent; - interrupts = <0x00 0x24 0x01>; - reg = <0x00 0xa002800 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002a00 { - dma-coherent; - interrupts = <0x00 0x25 0x01>; - reg = <0x00 0xa002a00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002c00 { - dma-coherent; - interrupts = <0x00 0x26 0x01>; - reg = <0x00 0xa002c00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002e00 { - dma-coherent; - interrupts = <0x00 0x27 0x01>; - reg = <0x00 0xa002e00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003000 { - dma-coherent; - interrupts = <0x00 0x28 0x01>; - reg = <0x00 0xa003000 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003200 { - dma-coherent; - interrupts = <0x00 0x29 0x01>; - reg = <0x00 0xa003200 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003400 { - dma-coherent; - interrupts = <0x00 0x2a 0x01>; - reg = <0x00 0xa003400 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003600 { - dma-coherent; - interrupts = <0x00 0x2b 0x01>; - reg = <0x00 0xa003600 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003800 { - dma-coherent; - interrupts = <0x00 0x2c 0x01>; - reg = <0x00 0xa003800 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003a00 { - dma-coherent; - interrupts = <0x00 0x2d 0x01>; - reg = <0x00 0xa003a00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003c00 { - dma-coherent; - interrupts = <0x00 0x2e 0x01>; - reg = <0x00 0xa003c00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003e00 { - dma-coherent; - interrupts = <0x00 0x2f 0x01>; - reg = <0x00 0xa003e00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - gpio-keys { - compatible = "gpio-keys"; - - poweroff { - gpios = <0x8004 0x03 0x00>; - linux,code = <0x74>; - label = "GPIO Key Poweroff"; - }; - }; - - pl061@9030000 { - phandle = <0x8005>; - clock-names = "apb_pclk"; - clocks = <0x8000>; - interrupts = <0x00 0x07 0x04>; - gpio-controller; - #gpio-cells = <0x02>; - compatible = "arm,pl061\0arm,primecell"; - reg = <0x00 0x9030000 0x00 0x1000>; - }; - - pl031@9010000 { - clock-names = "apb_pclk"; - clocks = <0x8000>; - interrupts = <0x00 0x02 0x04>; - reg = <0x00 0x9010000 0x00 0x1000>; - compatible = "arm,pl031\0arm,primecell"; - }; - - pl011@9000000 { - clock-names = "uartclk\0apb_pclk"; - clocks = <0x8000 0x8000>; - interrupts = <0x00 0x01 0x04>; - reg = <0x00 0x9000000 0x00 0x1000>; - compatible = "arm,pl011\0arm,primecell"; - }; - - pmu { - interrupts = <0x01 0x07 0x104>; - compatible = "arm,armv8-pmuv3"; - }; - - intc@8000000 { - phandle = <0x8003>; - interrupts = <0x01 0x09 0x04>; - reg = <0x00 0x8000000 0x00 0x10000 0x00 0x8010000 0x00 0x10000 0x00 0x8030000 0x00 0x10000 0x00 0x8040000 0x00 0x10000>; - compatible = "arm,cortex-a15-gic"; - ranges; - #size-cells = <0x02>; - #address-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x03>; - - v2m@8020000 { - phandle = <0x8004>; - reg = <0x00 0x8020000 0x00 0x1000>; - msi-controller; - compatible = "arm,gic-v2m-frame"; - }; - }; - - cpus { - #size-cells = <0x00>; - #address-cells = <0x01>; - - cpu-map { - - socket0 { - - cluster0 { - core0 { - cpu = <0x8002>; - }; - core1 { - cpu = <0x8001>; - }; - }; - }; - }; - - cpu@0 { - phandle = <0x8002>; - reg = <0x00>; - enable-method = "psci"; - compatible = "arm,cortex-a57"; - device_type = "cpu"; - }; - cpu@1 { - phandle = <0x8001>; - reg = <0x01>; - enable-method = "psci"; - compatible = "arm,cortex-a57"; - device_type = "cpu"; - }; - }; - - timer { - interrupts = <0x01 0x0d 0x104 0x01 0x0e 0x104 0x01 0x0b 0x104 0x01 0x0a 0x104>; - always-on; - compatible = "arm,armv8-timer\0arm,armv7-timer"; - }; - - apb-pclk { - phandle = <0x8000>; - clock-output-names = "clk24mhz"; - clock-frequency = <0x16e3600>; - #clock-cells = <0x00>; - compatible = "fixed-clock"; - }; - - chosen { - bootargs = "earlycon console=ttyAMA0 root=/dev/vda rw audit=0 default_hugepagesz=32M hugepagesz=32M hugepages=4"; - stdout-path = "/pl011@9000000"; - rng-seed = <0x7d690073 0x793eb999 0xf6bdac0f 0xd29fa1a 0x78c11b49 0xf975a441 0xbb12bacc 0xd938d0a9>; - kaslr-seed = <0x45202e26 0x23f63f1f>; - }; -}; diff --git a/configs/vms_bkp/linux-qemu.dts b/configs/vms_bkp/linux-qemu.dts deleted file mode 100644 index 28f34042..00000000 --- a/configs/vms_bkp/linux-qemu.dts +++ /dev/null @@ -1,354 +0,0 @@ -/dts-v1/; - -/ { - interrupt-parent = <0x8002>; - model = "linux,dummy-virt"; - #size-cells = <0x02>; - #address-cells = <0x02>; - compatible = "linux,dummy-virt"; - - psci { - migrate = <0xc4000005>; - cpu_on = <0xc4000003>; - cpu_off = <0x84000002>; - cpu_suspend = <0xc4000001>; - method = "smc"; - compatible = "arm,psci-1.0\0arm,psci-0.2\0arm,psci"; - }; - - memory@80000000 { - reg = <0x00 0x80000000 0x00 0x40000000>; - device_type = "memory"; - }; - - virtio_mmio@a000000 { - dma-coherent; - interrupts = <0x00 0x10 0x01>; - reg = <0x00 0xa000000 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000200 { - dma-coherent; - interrupts = <0x00 0x11 0x01>; - reg = <0x00 0xa000200 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000400 { - dma-coherent; - interrupts = <0x00 0x12 0x01>; - reg = <0x00 0xa000400 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000600 { - dma-coherent; - interrupts = <0x00 0x13 0x01>; - reg = <0x00 0xa000600 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000800 { - dma-coherent; - interrupts = <0x00 0x14 0x01>; - reg = <0x00 0xa000800 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000a00 { - dma-coherent; - interrupts = <0x00 0x15 0x01>; - reg = <0x00 0xa000a00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000c00 { - dma-coherent; - interrupts = <0x00 0x16 0x01>; - reg = <0x00 0xa000c00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000e00 { - dma-coherent; - interrupts = <0x00 0x17 0x01>; - reg = <0x00 0xa000e00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001000 { - dma-coherent; - interrupts = <0x00 0x18 0x01>; - reg = <0x00 0xa001000 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001200 { - dma-coherent; - interrupts = <0x00 0x19 0x01>; - reg = <0x00 0xa001200 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001400 { - dma-coherent; - interrupts = <0x00 0x1a 0x01>; - reg = <0x00 0xa001400 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001600 { - dma-coherent; - interrupts = <0x00 0x1b 0x01>; - reg = <0x00 0xa001600 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001800 { - dma-coherent; - interrupts = <0x00 0x1c 0x01>; - reg = <0x00 0xa001800 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001a00 { - dma-coherent; - interrupts = <0x00 0x1d 0x01>; - reg = <0x00 0xa001a00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001c00 { - dma-coherent; - interrupts = <0x00 0x1e 0x01>; - reg = <0x00 0xa001c00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001e00 { - dma-coherent; - interrupts = <0x00 0x1f 0x01>; - reg = <0x00 0xa001e00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002000 { - dma-coherent; - interrupts = <0x00 0x20 0x01>; - reg = <0x00 0xa002000 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002200 { - dma-coherent; - interrupts = <0x00 0x21 0x01>; - reg = <0x00 0xa002200 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002400 { - dma-coherent; - interrupts = <0x00 0x22 0x01>; - reg = <0x00 0xa002400 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002600 { - dma-coherent; - interrupts = <0x00 0x23 0x01>; - reg = <0x00 0xa002600 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002800 { - dma-coherent; - interrupts = <0x00 0x24 0x01>; - reg = <0x00 0xa002800 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002a00 { - dma-coherent; - interrupts = <0x00 0x25 0x01>; - reg = <0x00 0xa002a00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002c00 { - dma-coherent; - interrupts = <0x00 0x26 0x01>; - reg = <0x00 0xa002c00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002e00 { - dma-coherent; - interrupts = <0x00 0x27 0x01>; - reg = <0x00 0xa002e00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003000 { - dma-coherent; - interrupts = <0x00 0x28 0x01>; - reg = <0x00 0xa003000 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003200 { - dma-coherent; - interrupts = <0x00 0x29 0x01>; - reg = <0x00 0xa003200 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003400 { - dma-coherent; - interrupts = <0x00 0x2a 0x01>; - reg = <0x00 0xa003400 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003600 { - dma-coherent; - interrupts = <0x00 0x2b 0x01>; - reg = <0x00 0xa003600 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003800 { - dma-coherent; - interrupts = <0x00 0x2c 0x01>; - reg = <0x00 0xa003800 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003a00 { - dma-coherent; - interrupts = <0x00 0x2d 0x01>; - reg = <0x00 0xa003a00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003c00 { - dma-coherent; - interrupts = <0x00 0x2e 0x01>; - reg = <0x00 0xa003c00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003e00 { - dma-coherent; - interrupts = <0x00 0x2f 0x01>; - reg = <0x00 0xa003e00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - gpio-keys { - compatible = "gpio-keys"; - - poweroff { - gpios = <0x8004 0x03 0x00>; - linux,code = <0x74>; - label = "GPIO Key Poweroff"; - }; - }; - - pl061@9030000 { - phandle = <0x8004>; - clock-names = "apb_pclk"; - clocks = <0x8000>; - interrupts = <0x00 0x07 0x04>; - gpio-controller; - #gpio-cells = <0x02>; - compatible = "arm,pl061\0arm,primecell"; - reg = <0x00 0x9030000 0x00 0x1000>; - }; - - pl031@9010000 { - clock-names = "apb_pclk"; - clocks = <0x8000>; - interrupts = <0x00 0x02 0x04>; - reg = <0x00 0x9010000 0x00 0x1000>; - compatible = "arm,pl031\0arm,primecell"; - }; - - pl011@9000000 { - clock-names = "uartclk\0apb_pclk"; - clocks = <0x8000 0x8000>; - interrupts = <0x00 0x01 0x04>; - reg = <0x00 0x9000000 0x00 0x1000>; - compatible = "arm,pl011\0arm,primecell"; - }; - - pmu { - interrupts = <0x01 0x07 0x104>; - compatible = "arm,armv8-pmuv3"; - }; - - intc@8000000 { - phandle = <0x8002>; - interrupts = <0x01 0x09 0x04>; - reg = <0x00 0x8000000 0x00 0x10000 0x00 0x8010000 0x00 0x10000 0x00 0x8030000 0x00 0x10000 0x00 0x8040000 0x00 0x10000>; - compatible = "arm,cortex-a15-gic"; - ranges; - #size-cells = <0x02>; - #address-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x03>; - - v2m@8020000 { - phandle = <0x8003>; - reg = <0x00 0x8020000 0x00 0x1000>; - msi-controller; - compatible = "arm,gic-v2m-frame"; - }; - }; - - cpus { - #size-cells = <0x00>; - #address-cells = <0x01>; - - cpu-map { - - socket0 { - - cluster0 { - - core0 { - cpu = <0x8001>; - }; - }; - }; - }; - - cpu@0 { - phandle = <0x8001>; - reg = <0x00>; - compatible = "arm,cortex-a57"; - device_type = "cpu"; - }; - }; - - timer { - interrupts = <0x01 0x0d 0x104 0x01 0x0e 0x104 0x01 0x0b 0x104 0x01 0x0a 0x104>; - always-on; - compatible = "arm,armv8-timer\0arm,armv7-timer"; - }; - - apb-pclk { - phandle = <0x8000>; - clock-output-names = "clk24mhz"; - clock-frequency = <0x16e3600>; - #clock-cells = <0x00>; - compatible = "fixed-clock"; - }; - - chosen { - bootargs = "earlycon console=ttyAMA0 root=/dev/vda rw audit=0 default_hugepagesz=32M hugepagesz=32M hugepages=4"; - stdout-path = "/pl011@9000000"; - rng-seed = <0x7d690073 0x793eb999 0xf6bdac0f 0xd29fa1a 0x78c11b49 0xf975a441 0xbb12bacc 0xd938d0a9>; - kaslr-seed = <0x45202e26 0x23f63f1f>; - }; -}; diff --git a/configs/vms_bkp/linux-qemu_gicv3-b.dts b/configs/vms_bkp/linux-qemu_gicv3-b.dts deleted file mode 100644 index d362d68d..00000000 --- a/configs/vms_bkp/linux-qemu_gicv3-b.dts +++ /dev/null @@ -1,414 +0,0 @@ -/dts-v1/; - -/ { - interrupt-parent = <0x8003>; - dma-coherent; - model = "linux,dummy-virt"; - #size-cells = <0x02>; - #address-cells = <0x02>; - compatible = "linux,dummy-virt"; - - psci { - migrate = <0xc4000005>; - cpu_on = <0xc4000003>; - cpu_off = <0x84000002>; - cpu_suspend = <0xc4000001>; - method = "smc"; - compatible = "arm,psci-1.0\0arm,psci-0.2\0arm,psci"; - }; - - memory@c0000000 { - reg = <0x00 0xc0000000 0x00 0x40000000>; - device_type = "memory"; - }; - - // platform-bus@c000000 { - // interrupt-parent = <0x8003>; - // ranges = <0x00 0x00 0xc000000 0x2000000>; - // #address-cells = <0x01>; - // #size-cells = <0x01>; - // compatible = "qemu,platform\0simple-bus"; - // }; - - // fw-cfg@9020000 { - // dma-coherent; - // reg = <0x00 0x9020000 0x00 0x18>; - // compatible = "qemu,fw-cfg-mmio"; - // }; - - // virtio_mmio@a000000 { - // dma-coherent; - // interrupts = <0x00 0x10 0x01>; - // reg = <0x00 0xa000000 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a000200 { - // dma-coherent; - // interrupts = <0x00 0x11 0x01>; - // reg = <0x00 0xa000200 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a000400 { - // dma-coherent; - // interrupts = <0x00 0x12 0x01>; - // reg = <0x00 0xa000400 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a000600 { - // dma-coherent; - // interrupts = <0x00 0x13 0x01>; - // reg = <0x00 0xa000600 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a000800 { - // dma-coherent; - // interrupts = <0x00 0x14 0x01>; - // reg = <0x00 0xa000800 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a000a00 { - // dma-coherent; - // interrupts = <0x00 0x15 0x01>; - // reg = <0x00 0xa000a00 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a000c00 { - // dma-coherent; - // interrupts = <0x00 0x16 0x01>; - // reg = <0x00 0xa000c00 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a000e00 { - // dma-coherent; - // interrupts = <0x00 0x17 0x01>; - // reg = <0x00 0xa000e00 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a001000 { - // dma-coherent; - // interrupts = <0x00 0x18 0x01>; - // reg = <0x00 0xa001000 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a001200 { - // dma-coherent; - // interrupts = <0x00 0x19 0x01>; - // reg = <0x00 0xa001200 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a001400 { - // dma-coherent; - // interrupts = <0x00 0x1a 0x01>; - // reg = <0x00 0xa001400 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a001600 { - // dma-coherent; - // interrupts = <0x00 0x1b 0x01>; - // reg = <0x00 0xa001600 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a001800 { - // dma-coherent; - // interrupts = <0x00 0x1c 0x01>; - // reg = <0x00 0xa001800 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a001a00 { - // dma-coherent; - // interrupts = <0x00 0x1d 0x01>; - // reg = <0x00 0xa001a00 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a001c00 { - // dma-coherent; - // interrupts = <0x00 0x1e 0x01>; - // reg = <0x00 0xa001c00 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a001e00 { - // dma-coherent; - // interrupts = <0x00 0x1f 0x01>; - // reg = <0x00 0xa001e00 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a002000 { - // dma-coherent; - // interrupts = <0x00 0x20 0x01>; - // reg = <0x00 0xa002000 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a002200 { - // dma-coherent; - // interrupts = <0x00 0x21 0x01>; - // reg = <0x00 0xa002200 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a002400 { - // dma-coherent; - // interrupts = <0x00 0x22 0x01>; - // reg = <0x00 0xa002400 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a002600 { - // dma-coherent; - // interrupts = <0x00 0x23 0x01>; - // reg = <0x00 0xa002600 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a002800 { - // dma-coherent; - // interrupts = <0x00 0x24 0x01>; - // reg = <0x00 0xa002800 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a002a00 { - // dma-coherent; - // interrupts = <0x00 0x25 0x01>; - // reg = <0x00 0xa002a00 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a002c00 { - // dma-coherent; - // interrupts = <0x00 0x26 0x01>; - // reg = <0x00 0xa002c00 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a002e00 { - // dma-coherent; - // interrupts = <0x00 0x27 0x01>; - // reg = <0x00 0xa002e00 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a003000 { - // dma-coherent; - // interrupts = <0x00 0x28 0x01>; - // reg = <0x00 0xa003000 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a003200 { - // dma-coherent; - // interrupts = <0x00 0x29 0x01>; - // reg = <0x00 0xa003200 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a003400 { - // dma-coherent; - // interrupts = <0x00 0x2a 0x01>; - // reg = <0x00 0xa003400 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a003600 { - // dma-coherent; - // interrupts = <0x00 0x2b 0x01>; - // reg = <0x00 0xa003600 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a003800 { - // dma-coherent; - // interrupts = <0x00 0x2c 0x01>; - // reg = <0x00 0xa003800 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a003a00 { - // dma-coherent; - // interrupts = <0x00 0x2d 0x01>; - // reg = <0x00 0xa003a00 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a003c00 { - // dma-coherent; - // interrupts = <0x00 0x2e 0x01>; - // reg = <0x00 0xa003c00 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // virtio_mmio@a003e00 { - // dma-coherent; - // interrupts = <0x00 0x2f 0x01>; - // reg = <0x00 0xa003e00 0x00 0x200>; - // compatible = "virtio,mmio"; - // }; - - // gpio-keys { - // compatible = "gpio-keys"; - - // poweroff { - // gpios = <0x8005 0x03 0x00>; - // linux,code = <0x74>; - // label = "GPIO Key Poweroff"; - // }; - // }; - - // pl061@9030000 { - // phandle = <0x8005>; - // clock-names = "apb_pclk"; - // clocks = <0x8000>; - // interrupts = <0x00 0x07 0x04>; - // gpio-controller; - // #gpio-cells = <0x02>; - // compatible = "arm,pl061\0arm,primecell"; - // reg = <0x00 0x9030000 0x00 0x1000>; - // }; - - // pcie@10000000 { - // interrupt-map-mask = <0x1800 0x00 0x00 0x07>; - // interrupt-map = <0x00 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x03 0x04 0x00 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x04 0x04 0x00 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x05 0x04 0x00 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x04 0x04 0x800 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x05 0x04 0x800 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x05 0x04 0x1000 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x06 0x04 0x1000 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x06 0x04 0x1800 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x03 0x04 0x1800 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x05 0x04>; - // #interrupt-cells = <0x01>; - // ranges = <0x1000000 0x00 0x00 0x00 0x3eff0000 0x00 0x10000 0x2000000 0x00 0x10000000 0x00 0x10000000 0x00 0x2eff0000 0x3000000 0x80 0x00 0x80 0x00 0x80 0x00>; - // // reg = <0x40 0x10000000 0x00 0x10000000>; - // reg = <0x00 0x10000000>; - // msi-map = <0x00 0x8004 0x00 0x10000>; - // dma-coherent; - // bus-range = <0x00 0xff>; - // linux,pci-domain = <0x00>; - // #size-cells = <0x02>; - // #address-cells = <0x03>; - // device_type = "pci"; - // compatible = "pci-host-ecam-generic"; - // }; - - // pl031@9010000 { - // clock-names = "apb_pclk"; - // clocks = <0x8000>; - // interrupts = <0x00 0x02 0x04>; - // reg = <0x00 0x9010000 0x00 0x1000>; - // compatible = "arm,pl031\0arm,primecell"; - // }; - - // pl011@9000000 { - // clock-names = "uartclk\0apb_pclk"; - // clocks = <0x8000 0x8000>; - // interrupts = <0x00 0x01 0x04>; - // reg = <0x00 0x9000000 0x00 0x1000>; - // compatible = "arm,pl011\0arm,primecell"; - // }; - - pl011@9100000 { - clock-names = "uartclk\0apb_pclk"; - clocks = <0x8000 0x8000>; - interrupts = <0x00 0x0a 0x04>; - reg = <0x00 0x9100000 0x00 0x1000>; - compatible = "arm,pl011\0arm,primecell"; - }; - - pmu { - interrupts = <0x01 0x07 0x04>; - compatible = "arm,armv8-pmuv3"; - }; - - intc@8000000 { - phandle = <0x8003>; - interrupts = <0x01 0x09 0x04>; - reg = <0x00 0x8000000 0x00 0x10000 0x00 0x80c0000 0x00 0xf60000>; - #redistributor-regions = <0x01>; - compatible = "arm,gic-v3"; - ranges; - #size-cells = <0x02>; - #address-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x03>; - - // its@8080000 { - // phandle = <0x8004>; - // reg = <0x00 0x8080000 0x00 0x20000>; - // #msi-cells = <0x01>; - // msi-controller; - // compatible = "arm,gic-v3-its"; - // }; - }; - - // flash@0 { - // bank-width = <0x04>; - // reg = <0x00 0x00 0x00 0x4000000 0x00 0x4000000 0x00 0x4000000>; - // compatible = "cfi-flash"; - // }; - - cpus { - #size-cells = <0x00>; - #address-cells = <0x01>; - - cpu-map { - - socket0 { - - cluster0 { - - core0 { - cpu = <0x8001>; - }; - - //core1 { - // cpu = <0x8001>; - //}; - }; - }; - }; - - cpu@0 { - phandle = <0x8001>; - reg = <0x01>; - enable-method = "psci"; - compatible = "arm,cortex-a57"; - device_type = "cpu"; - }; - }; - - timer { - interrupts = <0x01 0x0d 0x04 0x01 0x0e 0x04 0x01 0x0b 0x04 0x01 0x0a 0x04>; - always-on; - compatible = "arm,armv8-timer\0arm,armv7-timer"; - }; - - apb-pclk { - phandle = <0x8000>; - clock-output-names = "clk24mhz"; - clock-frequency = <0x16e3600>; - #clock-cells = <0x00>; - compatible = "fixed-clock"; - }; - - aliases { - serial0 = "/pl011@9100000"; - }; - - chosen { - // initrd-start = <0xfe000000>; - // initrd-end = <0xff000000>; - // bootargs = "earlycon console=ttyAMA0 root=/dev/ram rw audit=0 default_hugepagesz=32M hugepagesz=32M hugepages=4"; - bootargs = "earlycon console=ttyAMA0 initrd=0xfe000000,0x1000000 audit=0 default_hugepagesz=32M hugepagesz=32M hugepages=4"; - stdout-path = "/pl011@9100000"; - rng-seed = <0x79361ef3 0x1a4e5964 0x9fb01da 0x749b376f 0x7036ec7c 0xdea25f0c 0x79d7ee4e 0xe2e216af>; - kaslr-seed = <0x2758c1 0xf528d3d5>; - }; -}; diff --git a/configs/vms_bkp/linux-rk3588-aarch64-smp-vm1.toml b/configs/vms_bkp/linux-rk3588-aarch64-smp-vm1.toml deleted file mode 100644 index b085ab41..00000000 --- a/configs/vms_bkp/linux-rk3588-aarch64-smp-vm1.toml +++ /dev/null @@ -1,75 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 1 -# Guest vm name. -name = "linux-full" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 2 -# Guest vm physical cpu sets. -# phys_cpu_sets = [1, 2, 4, 8, 16, 32, 64, 128] -phys_cpu_ids = [0x00, 0x100] -phys_cpu_sets = [1, 2] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x1020_0000 -# The load address of the kernel image. -kernel_load_addr = 0x1020_0000 -# The load address of the device tree blob (DTB). -dtb_load_addr = 0x1000_0000 -# The load address of the ramdisk image. -ramdisk_load_addr = 0x0a20_0000 -# The location of image: "memory" | "fs". -# load from memory -image_location = "memory" -# The file path of the kernel image. -kernel_path = "Image-5.10.198-rt89-preempt.bin" -# The file path of the device tree blob (DTB). -dtb_path = "aio-rk3588-jd4-vm1.dtb" -# The file path of the ramdisk image. -ramdisk_path = "ramdisk.img" -# ramdisk_path = "initramfs-busybox-arm64-vm1.img" - -# load from file system. -# image_location = "fs". -## The file path of the kernel image. -# kernel_path = "linux-arceos-aarch64.bin" -## The file path of the device tree blob (DTB). -# dtb_path = "linux-rk3588.dtb" - -## The file path of the ramdisk image. -# ramdisk_path = "" -## The load address of the ramdisk image. -# ramdisk_load_addr = 0 -## The path of the disk image. -# disk_path = "disk.img" - -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - # [0x0, 0x10_f000, 0x7, 1], # passthrough uncahed MAP_IDENTICAL - # [0x940_0000, 0xe6c00000, 0x7, 1], # ram 3G MAP_IDENTICAL - # [0x4000_0000, 0x4000_0000, 0x7, 1], # ram 1G MAP_IDENTICAL -] - -# -# Device specifications -# -[devices] -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - # ["uart@feb40000", 0xfeb4_0000, 0xfeb4_0000, 0x1000, 0x1], - # ["uart@feb50000", 0xfeb5_0000, 0xfeb5_0000, 0x1000, 0x1], -] diff --git a/configs/vms_bkp/linux-rk3588-aarch64-smp-vm2.toml b/configs/vms_bkp/linux-rk3588-aarch64-smp-vm2.toml deleted file mode 100644 index daf93cbb..00000000 --- a/configs/vms_bkp/linux-rk3588-aarch64-smp-vm2.toml +++ /dev/null @@ -1,74 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 2 -# Guest vm name. -name = "linux-minimal" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 2 -# Guest vm physical cpu sets. -# phys_cpu_sets = [1, 2, 4, 8, 16, 32, 64, 128] -phys_cpu_ids = [0x200, 0x300] -phys_cpu_sets = [4, 8] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x1_1020_0000 -# The load address of the kernel image. -kernel_load_addr = 0x1_1020_0000 -# The load address of the device tree blob (DTB). -dtb_load_addr = 0x1_1000_0000 -# The load address of the ramdisk image. -ramdisk_load_addr = 0x1_0a20_0000 -# The location of image: "memory" | "fs". -# load from memory -image_location = "memory" -# The file path of the kernel image. -kernel_path = "Image-5.10.198-rt89-preempt.bin" -# The file path of the device tree blob (DTB). -dtb_path = "aio-rk3588-jd4-vm2.dtb" -# The file path of the ramdisk image. -ramdisk_path = "ramdisk.img" - -# load from file system. -# image_location = "fs". -## The file path of the kernel image. -# kernel_path = "linux-arceos-aarch64.bin" -## The file path of the device tree blob (DTB). -# dtb_path = "linux-rk3588.dtb" - -## The file path of the ramdisk image. -# ramdisk_path = "" -## The load address of the ramdisk image. -# ramdisk_load_addr = 0 -## The path of the disk image. -# disk_path = "disk.img" - -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - # [0x0, 0x10_f000, 0x7, 1], # passthrough uncahed MAP_IDENTICAL - # [0x940_0000, 0xe6c00000, 0x7, 1], # ram 3G MAP_IDENTICAL - # [0x4000_0000, 0x4000_0000, 0x7, 1], # ram 1G MAP_IDENTICAL -] - -# -# Device specifications -# -[devices] -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - # ["uart@feb40000", 0xfeb4_0000, 0xfeb4_0000, 0x1000, 0x1], - # ["uart@feb50000", 0xfeb5_0000, 0xfeb4_0000, 0x1000, 0x1], -] diff --git a/configs/vms_bkp/linux-rk3588-aarch64-smp.toml b/configs/vms_bkp/linux-rk3588-aarch64-smp.toml deleted file mode 100644 index 6c33a9e8..00000000 --- a/configs/vms_bkp/linux-rk3588-aarch64-smp.toml +++ /dev/null @@ -1,71 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 1 -# Guest vm name. -name = "linux" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 4 -# Guest vm physical cpu sets. -# phys_cpu_sets = [1, 2, 4, 8, 16, 32, 64, 128] -phys_cpu_ids = [0x00, 0x100, 0x200, 0x300] -phys_cpu_sets = [1, 2, 4, 8] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x1020_0000 -# The load address of the kernel image. -kernel_load_addr = 0x1020_0000 -# The load address of the device tree blob (DTB). -dtb_load_addr = 0x1000_0000 -# The load address of the ramdisk image. -ramdisk_load_addr = 0x0a20_0000 -# The location of image: "memory" | "fs". -# load from memory -image_location = "memory" -# The file path of the kernel image. -kernel_path = "Image.bin" -# The file path of the device tree blob (DTB). -dtb_path = "aio-rk3588-jd4.dtb" -# The file path of the ramdisk image. -ramdisk_path = "ramdisk.img" - -# load from file system. -# image_location = "fs". -## The file path of the kernel image. -# kernel_path = "linux-arceos-aarch64.bin" -## The file path of the device tree blob (DTB). -# dtb_path = "linux-rk3588.dtb" - -## The file path of the ramdisk image. -# ramdisk_path = "" -## The load address of the ramdisk image. -# ramdisk_load_addr = 0 -## The path of the disk image. -# disk_path = "disk.img" - -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - # [0x0, 0x10_f000, 0x7, 1], # passthrough uncahed MAP_IDENTICAL - # [0x940_0000, 0xe6c00000, 0x7, 1], # ram 3G MAP_IDENTICAL - # [0x4000_0000, 0x4000_0000, 0x7, 1], # ram 1G MAP_IDENTICAL -] - -# -# Device specifications -# -[devices] -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [] diff --git a/configs/vms_bkp/linux-rk3588-aarch64.toml b/configs/vms_bkp/linux-rk3588-aarch64.toml deleted file mode 100644 index 0cba48fd..00000000 --- a/configs/vms_bkp/linux-rk3588-aarch64.toml +++ /dev/null @@ -1,100 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 1 -# Guest vm name. -name = "linux" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 1 -# Guest vm physical cpu sets. -cpu_set = 2 - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x1008_0000 -# The load address of the kernel image. -kernel_load_addr = 0x1008_0000 -# The load address of the device tree blob (DTB). -dtb_load_addr = 0x1000_0000 -# The location of image: "memory" | "fs". -# load from memory -image_location = "memory" -# The file path of the kernel image. -kernel_path = "linux-rk3588-aarch64.bin" -# The file path of the device tree blob (DTB). -dtb_path = "linux-rk3588.dtb" - -# load from file system. -# image_location = "fs". -## The file path of the kernel image. -# kernel_path = "linux-arceos-aarch64.bin" -## The file path of the device tree blob (DTB). -# dtb_path = "linux-rk3588.dtb" - -## The file path of the ramdisk image. -# ramdisk_path = "" -## The load address of the ramdisk image. -# ramdisk_load_addr = 0 -## The path of the disk image. -# disk_path = "disk.img" - -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x0, 0x10_f000, 0x37, 1], # passthrough uncahed MAP_IDENTICAL - [0x940_0000, 0x76c00000, 0x7, 1], # ram 3G MAP_IDENTICAL -] - -# -# Device specifications -# -[devices] -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - [ - "ramoops", - 0x11_0000, - 0x11_0000, - 0xf_0000, - 0x1, - ], - [ - "sram", - 0x10_f000, - 0x10_f000, - 0x1000, - 0x1, - ], - [ - "gpu", - 0xfb00_0000, - 0xfb00_0000, - 0x200000, - 0x1, - ], - [ - "uart8250 UART", - 0xfd00_0000, - 0xfd00_0000, - 0x2000000, - 0x1, - ], - [ - "usb", - 0xfc00_0000, - 0xfc00_0000, - 0x1000000, - 0x1, - ], -] diff --git a/configs/vms_bkp/qemu_gicv3.dts b/configs/vms_bkp/qemu_gicv3.dts deleted file mode 100644 index 73b3158f..00000000 --- a/configs/vms_bkp/qemu_gicv3.dts +++ /dev/null @@ -1,410 +0,0 @@ -/dts-v1/; - -/ { - interrupt-parent = <0x8003>; - dma-coherent; - model = "linux,dummy-virt"; - #size-cells = <0x02>; - #address-cells = <0x02>; - compatible = "linux,dummy-virt"; - - psci { - migrate = <0xc4000005>; - cpu_on = <0xc4000003>; - cpu_off = <0x84000002>; - cpu_suspend = <0xc4000001>; - method = "smc"; - compatible = "arm,psci-1.0\0arm,psci-0.2\0arm,psci"; - }; - - memory@40000000 { - reg = <0x00 0x80000000 0x00 0x40000000>; - device_type = "memory"; - }; - - platform-bus@c000000 { - interrupt-parent = <0x8003>; - ranges = <0x00 0x00 0xc000000 0x2000000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "qemu,platform\0simple-bus"; - }; - - fw-cfg@9020000 { - dma-coherent; - reg = <0x00 0x9020000 0x00 0x18>; - compatible = "qemu,fw-cfg-mmio"; - }; - - virtio_mmio@a000000 { - dma-coherent; - interrupts = <0x00 0x10 0x01>; - reg = <0x00 0xa000000 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000200 { - dma-coherent; - interrupts = <0x00 0x11 0x01>; - reg = <0x00 0xa000200 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000400 { - dma-coherent; - interrupts = <0x00 0x12 0x01>; - reg = <0x00 0xa000400 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000600 { - dma-coherent; - interrupts = <0x00 0x13 0x01>; - reg = <0x00 0xa000600 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000800 { - dma-coherent; - interrupts = <0x00 0x14 0x01>; - reg = <0x00 0xa000800 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000a00 { - dma-coherent; - interrupts = <0x00 0x15 0x01>; - reg = <0x00 0xa000a00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000c00 { - dma-coherent; - interrupts = <0x00 0x16 0x01>; - reg = <0x00 0xa000c00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a000e00 { - dma-coherent; - interrupts = <0x00 0x17 0x01>; - reg = <0x00 0xa000e00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001000 { - dma-coherent; - interrupts = <0x00 0x18 0x01>; - reg = <0x00 0xa001000 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001200 { - dma-coherent; - interrupts = <0x00 0x19 0x01>; - reg = <0x00 0xa001200 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001400 { - dma-coherent; - interrupts = <0x00 0x1a 0x01>; - reg = <0x00 0xa001400 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001600 { - dma-coherent; - interrupts = <0x00 0x1b 0x01>; - reg = <0x00 0xa001600 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001800 { - dma-coherent; - interrupts = <0x00 0x1c 0x01>; - reg = <0x00 0xa001800 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001a00 { - dma-coherent; - interrupts = <0x00 0x1d 0x01>; - reg = <0x00 0xa001a00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001c00 { - dma-coherent; - interrupts = <0x00 0x1e 0x01>; - reg = <0x00 0xa001c00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a001e00 { - dma-coherent; - interrupts = <0x00 0x1f 0x01>; - reg = <0x00 0xa001e00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002000 { - dma-coherent; - interrupts = <0x00 0x20 0x01>; - reg = <0x00 0xa002000 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002200 { - dma-coherent; - interrupts = <0x00 0x21 0x01>; - reg = <0x00 0xa002200 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002400 { - dma-coherent; - interrupts = <0x00 0x22 0x01>; - reg = <0x00 0xa002400 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002600 { - dma-coherent; - interrupts = <0x00 0x23 0x01>; - reg = <0x00 0xa002600 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002800 { - dma-coherent; - interrupts = <0x00 0x24 0x01>; - reg = <0x00 0xa002800 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002a00 { - dma-coherent; - interrupts = <0x00 0x25 0x01>; - reg = <0x00 0xa002a00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002c00 { - dma-coherent; - interrupts = <0x00 0x26 0x01>; - reg = <0x00 0xa002c00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a002e00 { - dma-coherent; - interrupts = <0x00 0x27 0x01>; - reg = <0x00 0xa002e00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003000 { - dma-coherent; - interrupts = <0x00 0x28 0x01>; - reg = <0x00 0xa003000 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003200 { - dma-coherent; - interrupts = <0x00 0x29 0x01>; - reg = <0x00 0xa003200 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003400 { - dma-coherent; - interrupts = <0x00 0x2a 0x01>; - reg = <0x00 0xa003400 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003600 { - dma-coherent; - interrupts = <0x00 0x2b 0x01>; - reg = <0x00 0xa003600 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003800 { - dma-coherent; - interrupts = <0x00 0x2c 0x01>; - reg = <0x00 0xa003800 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003a00 { - dma-coherent; - interrupts = <0x00 0x2d 0x01>; - reg = <0x00 0xa003a00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003c00 { - dma-coherent; - interrupts = <0x00 0x2e 0x01>; - reg = <0x00 0xa003c00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - virtio_mmio@a003e00 { - dma-coherent; - interrupts = <0x00 0x2f 0x01>; - reg = <0x00 0xa003e00 0x00 0x200>; - compatible = "virtio,mmio"; - }; - - gpio-keys { - compatible = "gpio-keys"; - - poweroff { - gpios = <0x8005 0x03 0x00>; - linux,code = <0x74>; - label = "GPIO Key Poweroff"; - }; - }; - - pl061@9030000 { - phandle = <0x8005>; - clock-names = "apb_pclk"; - clocks = <0x8000>; - interrupts = <0x00 0x07 0x04>; - gpio-controller; - #gpio-cells = <0x02>; - compatible = "arm,pl061\0arm,primecell"; - reg = <0x00 0x9030000 0x00 0x1000>; - }; - - pcie@10000000 { - interrupt-map-mask = <0x1800 0x00 0x00 0x07>; - interrupt-map = <0x00 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x03 0x04 0x00 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x04 0x04 0x00 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x05 0x04 0x00 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x04 0x04 0x800 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x05 0x04 0x800 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x05 0x04 0x1000 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x06 0x04 0x1000 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x06 0x04 0x1800 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x03 0x04 0x1800 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x05 0x04>; - #interrupt-cells = <0x01>; - ranges = <0x1000000 0x00 0x00 0x00 0x3eff0000 0x00 0x10000 0x2000000 0x00 0x10000000 0x00 0x10000000 0x00 0x2eff0000 0x3000000 0x80 0x00 0x80 0x00 0x80 0x00>; - reg = <0x40 0x10000000 0x00 0x10000000>; - msi-map = <0x00 0x8004 0x00 0x10000>; - dma-coherent; - bus-range = <0x00 0xff>; - linux,pci-domain = <0x00>; - #size-cells = <0x02>; - #address-cells = <0x03>; - device_type = "pci"; - compatible = "pci-host-ecam-generic"; - }; - - pl031@9010000 { - clock-names = "apb_pclk"; - clocks = <0x8000>; - interrupts = <0x00 0x02 0x04>; - reg = <0x00 0x9010000 0x00 0x1000>; - compatible = "arm,pl031\0arm,primecell"; - }; - - pl011@9000000 { - clock-names = "uartclk\0apb_pclk"; - clocks = <0x8000 0x8000>; - interrupts = <0x00 0x01 0x04>; - reg = <0x00 0x9000000 0x00 0x1000>; - compatible = "arm,pl011\0arm,primecell"; - }; - - pmu { - interrupts = <0x01 0x07 0x04>; - compatible = "arm,armv8-pmuv3"; - }; - - intc@8000000 { - phandle = <0x8003>; - interrupts = <0x01 0x09 0x04>; - reg = <0x00 0x8000000 0x00 0x10000 0x00 0x80a0000 0x00 0xf60000>; - #redistributor-regions = <0x01>; - compatible = "arm,gic-v3"; - ranges; - #size-cells = <0x02>; - #address-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x03>; - - its@8080000 { - phandle = <0x8004>; - reg = <0x00 0x8080000 0x00 0x20000>; - #msi-cells = <0x01>; - msi-controller; - compatible = "arm,gic-v3-its"; - }; - }; - - flash@0 { - bank-width = <0x04>; - reg = <0x00 0x00 0x00 0x4000000 0x00 0x4000000 0x00 0x4000000>; - compatible = "cfi-flash"; - }; - - cpus { - #size-cells = <0x00>; - #address-cells = <0x01>; - - cpu-map { - - socket0 { - - cluster0 { - - core0 { - cpu = <0x8002>; - }; - - //core1 { - // cpu = <0x8001>; - //}; - }; - }; - }; - - cpu@0 { - phandle = <0x8002>; - reg = <0x00>; - enable-method = "psci"; - compatible = "arm,cortex-a57"; - device_type = "cpu"; - }; - - //cpu@1 { - // phandle = <0x8001>; - // reg = <0x01>; - // enable-method = "psci"; - // compatible = "arm,cortex-a57"; - // device_type = "cpu"; - //}; - }; - - timer { - interrupts = <0x01 0x0d 0x04 0x01 0x0e 0x04 0x01 0x0b 0x04 0x01 0x0a 0x04>; - always-on; - compatible = "arm,armv8-timer\0arm,armv7-timer"; - }; - - apb-pclk { - phandle = <0x8000>; - clock-output-names = "clk24mhz"; - clock-frequency = <0x16e3600>; - #clock-cells = <0x00>; - compatible = "fixed-clock"; - }; - - aliases { - serial0 = "/pl011@9000000"; - }; - - chosen { - bootargs = "earlycon console=ttyAMA0 root=/dev/vda rw audit=0 default_hugepagesz=32M hugepagesz=32M hugepages=4"; - stdout-path = "/pl011@9000000"; - rng-seed = <0x79361ef3 0x1a4e5964 0x9fb01da 0x749b376f 0x7036ec7c 0xdea25f0c 0x79d7ee4e 0xe2e216af>; - kaslr-seed = <0x2758c1 0xf528d3d5>; - }; -}; diff --git a/configs/vms_bkp/rk3588jd4.dts b/configs/vms_bkp/rk3588jd4.dts deleted file mode 100644 index 9f4eeb7a..00000000 --- a/configs/vms_bkp/rk3588jd4.dts +++ /dev/null @@ -1,13141 +0,0 @@ -/dts-v1/; - -/ { - #address-cells = <0x02>; - model = "Firefly AIO-3588JD4"; - serial-number = "a0deeea630de3975"; - #size-cells = <0x02>; - interrupt-parent = <0x01>; - compatible = "rockchip,aio-3588jd4\0rockchip,rk3588"; - - pcie30-avdd1v8 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "pcie30_avdd1v8"; - compatible = "regulator-fixed"; - phandle = <0x4a6>; - vin-supply = <0x1de>; - }; - - syscon@fd5bc000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfd5bc000 0x00 0x100>; - phandle = <0x194>; - }; - - vcc5v0-host3 { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - gpio = <0x182 0x07 0x00>; - regulator-always-on; - enable-active-high; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_host3"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x4a2>; - vin-supply = <0x1dd>; - }; - - pwm@febd0030 { - pinctrl-names = "active"; - pinctrl-0 = <0x16c>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15a 0x04 0x00 0x15b 0x04>; - clocks = <0x02 0x54 0x02 0x53>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebd0030 0x00 0x10>; - phandle = <0x2d4>; - }; - - rkisp@fdcc0000 { - power-domains = <0x60 0x1c>; - iommus = <0xd1>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; - interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; - clocks = <0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; - compatible = "rockchip,rk3588-rkisp"; - status = "disabled"; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - reg = <0x00 0xfdcc0000 0x00 0x7f00>; - phandle = <0x5a>; - }; - - qos@fdf66600 { - compatible = "syscon"; - reg = <0x00 0xfdf66600 0x00 0x20>; - phandle = <0x96>; - }; - - serial@febb0000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x167>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x153 0x04>; - clocks = <0x02 0xd3 0x02 0xb2>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfebb0000 0x00 0x100>; - phandle = <0x2d0>; - dmas = <0xf2 0x09 0xf2 0x0a>; - reg-shift = <0x02>; - }; - - qos@fdf41000 { - compatible = "syscon"; - reg = <0x00 0xfdf41000 0x00 0x20>; - phandle = <0xa6>; - }; - - csi2-dcphy1 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x20e>; - }; - - rkispp0-vir0 { - rockchip,hw = <0x5b>; - compatible = "rockchip,rk3588-rkispp-vir"; - status = "disabled"; - phandle = <0x243>; - }; - - wireless-bluetooth { - pinctrl-names = "default\0rts_gpio"; - pinctrl-0 = <0x1e5 0x1e6 0x1e7 0x1e8>; - clock-names = "ext_clock"; - BT,power_gpio = <0x7b 0x16 0x00>; - clocks = <0x1e4>; - BT,wake_gpio = <0x7b 0x15 0x00>; - uart_rts_gpios = <0xfe 0x02 0x01>; - compatible = "bluetooth-platdata"; - BT,wake_host_irq = <0x7b 0x00 0x00>; - pinctrl-1 = <0x1e9>; - status = "disabled"; - phandle = <0x4aa>; - }; - - pwm@febd0020 { - pinctrl-names = "active"; - pinctrl-0 = <0x16b>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15a 0x04>; - clocks = <0x02 0x54 0x02 0x53>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebd0020 0x00 0x10>; - phandle = <0x2d3>; - }; - - qos@fdf39000 { - compatible = "syscon"; - reg = <0x00 0xfdf39000 0x00 0x20>; - phandle = <0xaf>; - }; - - cam0-cam1-switch { - regulator-max-microvolt = <0x1b7740>; - pinctrl-names = "default"; - regulator-boot-on; - gpio = <0x181 0x11 0x00>; - pinctrl-0 = <0x1f0>; - regulator-always-on; - enable-active-high; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "cam0_cam1_switch"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4b2>; - }; - - qos@fdf3e400 { - compatible = "syscon"; - reg = <0x00 0xfdf3e400 0x00 0x20>; - phandle = <0xad>; - }; - - mipi2-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "okay"; - firefly-compatible; - phandle = <0x226>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@0 { - remote-endpoint = <0x4d>; - reg = <0x00>; - phandle = <0x33>; - }; - }; - - port@1 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x01>; - - endpoint@0 { - remote-endpoint = <0x4e>; - reg = <0x00>; - phandle = <0x54>; - }; - }; - }; - }; - - iommu@fdc48700 { - power-domains = <0x60 0x0f>; - rockchip,shootdown-entire; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x62 0x04>; - clocks = <0x02 0x195 0x02 0x194>; - rockchip,enable-cmd-retry; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "irq_rkvdec1_mmu"; - reg = <0x00 0xfdc48700 0x00 0x40 0x00 0xfdc48740 0x00 0x40>; - phandle = <0xcc>; - rockchip,master-handle-irq; - }; - - clock-controller@fd7c0000 { - #reset-cells = <0x01>; - assigned-clocks = <0x02 0x09 0x02 0x05 0x02 0x08 0x02 0x07 0x02 0xd8 0x02 0xda 0x02 0xd9 0x02 0x10e 0x02 0x10f 0x02 0x110 0x02 0x299 0x02 0x29a 0x02 0x7b 0x02 0xec 0x02 0x114 0x02 0x208 0x02 0x20e 0x02 0x21f 0x02 0x77>; - assigned-clock-rates = <0x4190ab00 0x2ee00000 0x32a9f880 0x46cf7100 0x29d7ab80 0x17d78400 0x1dcd6500 0x2cb41780 0x5f5e100 0x17d78400 0x5f5e100 0xbebc200 0x165a0bc0 0x8f0d180 0xbebc200 0xb71b00 0xb71b00 0x5e69ec0 0x1312d00>; - #clock-cells = <0x01>; - compatible = "rockchip,rk3588-cru"; - rockchip,grf = <0x76>; - reg = <0x00 0xfd7c0000 0x00 0x5c000>; - phandle = <0x02>; - }; - - qos@fdf81000 { - compatible = "syscon"; - reg = <0x00 0xfdf81000 0x00 0x20>; - phandle = <0xa0>; - }; - - qos@fdf36000 { - compatible = "syscon"; - reg = <0x00 0xfdf36000 0x00 0x20>; - phandle = <0xaa>; - }; - - i2s@fe4a0000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x132 0x133>; - pinctrl-0 = <0x12f 0x130>; - clock-names = "i2s_clk\0i2s_hclk"; - assigned-clocks = <0x02 0x2a>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xb7 0x04>; - clocks = <0x02 0x2d 0x02 0x23>; - dma-names = "tx\0rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; - pinctrl-1 = <0x131>; - status = "disabled"; - reg = <0x00 0xfe4a0000 0x00 0x1000>; - phandle = <0x299>; - dmas = <0xf1 0x02 0xf1 0x03>; - rockchip,clk-trcm = <0x01>; - }; - - syscon@fd5c4000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfd5c4000 0x00 0x100>; - phandle = <0x195>; - }; - - sram@ff001000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "mmio-sram"; - ranges = <0x00 0x00 0xff001000 0xef000>; - reg = <0x00 0xff001000 0x00 0xef000>; - phandle = <0x2eb>; - - rkvdec-sram@0 { - reg = <0x00 0x78000>; - phandle = <0xcb>; - }; - - rkvdec-sram@78000 { - reg = <0x78000 0x77000>; - phandle = <0xcd>; - }; - }; - - uio@fe1c0000 { - compatible = "rockchip,uio-gmac"; - status = "disabled"; - reg = <0x00 0xfe1c0000 0x00 0x10000>; - phandle = <0x28e>; - rockchip,ethernet = <0x109>; - }; - - pwm@febd0010 { - pinctrl-names = "active"; - pinctrl-0 = <0x16a>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15a 0x04>; - clocks = <0x02 0x54 0x02 0x53>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "okay"; - reg = <0x00 0xfebd0010 0x00 0x10>; - phandle = <0x1ed>; - }; - - rkisp1-vir3 { - rockchip,hw = <0x5a>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x242>; - }; - - pcie-clk2 { - regulator-boot-on; - regulator-always-on; - regulator-name = "pcie_clk2"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x495>; - gpios = <0x181 0x16 0x01>; - }; - - serial@feb40000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x160>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14c 0x04>; - clocks = <0x02 0xb7 0x02 0xab>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "okay"; - reg = <0x00 0xfeb40000 0x00 0x100>; - phandle = <0x2c9>; - dmas = <0x7c 0x08 0x7c 0x09>; - reg-shift = <0x02>; - }; - - pinctrl { - #address-cells = <0x02>; - #size-cells = <0x02>; - compatible = "rockchip,rk3588-pinctrl"; - ranges; - rockchip,grf = <0x196>; - phandle = <0x197>; - - eth0 { - - eth0-pins { - rockchip,pins = <0x02 0x13 0x01 0x198>; - phandle = <0x46c>; - }; - }; - - i2c3 { - - i2c3m3-xfer { - rockchip,pins = <0x02 0x0a 0x09 0x19d 0x02 0x0b 0x09 0x19d>; - phandle = <0x361>; - }; - - i2c3m2-xfer { - rockchip,pins = <0x04 0x04 0x09 0x19d 0x04 0x05 0x09 0x19d>; - phandle = <0x14a>; - }; - - i2c3m1-xfer { - rockchip,pins = <0x03 0x0f 0x09 0x19d 0x03 0x10 0x09 0x19d>; - phandle = <0x35f>; - }; - - i2c3m0-xfer { - rockchip,pins = <0x01 0x11 0x09 0x19d 0x01 0x10 0x09 0x19d>; - phandle = <0x35e>; - }; - - i2c3m4-xfer { - rockchip,pins = <0x04 0x18 0x09 0x19d 0x04 0x19 0x09 0x19d>; - phandle = <0x360>; - }; - }; - - pwm9 { - - pwm9m2-pins { - rockchip,pins = <0x03 0x19 0x0b 0x198>; - phandle = <0x3d7>; - }; - - pwm9m1-pins { - rockchip,pins = <0x04 0x19 0x0b 0x198>; - phandle = <0x3d6>; - }; - - pwm9m0-pins { - rockchip,pins = <0x03 0x08 0x0b 0x198>; - phandle = <0x16e>; - }; - }; - - pcfg-pull-none-drv-level-7 { - drive-strength = <0x07>; - bias-disable; - phandle = <0x451>; - }; - - mipi { - - mipi-te1 { - rockchip,pins = <0x03 0x13 0x02 0x198>; - phandle = <0x39f>; - }; - - mipim1-camera2-clk { - rockchip,pins = <0x03 0x07 0x04 0x198>; - phandle = <0x39b>; - }; - - mipim0-camera0-clk { - rockchip,pins = <0x04 0x09 0x01 0x198>; - phandle = <0x395>; - }; - - mipim0-camera4-clk { - rockchip,pins = <0x01 0x1f 0x02 0x198>; - phandle = <0x399>; - }; - - mipim1-camera3-clk { - rockchip,pins = <0x03 0x08 0x04 0x198>; - phandle = <0x39c>; - }; - - mipim0-camera1-clk { - rockchip,pins = <0x01 0x0e 0x02 0x198>; - phandle = <0x396>; - }; - - mipim1-camera0-clk { - rockchip,pins = <0x03 0x05 0x04 0x198>; - phandle = <0x39a>; - }; - - mipim1-camera4-clk { - rockchip,pins = <0x03 0x09 0x04 0x198>; - phandle = <0x39d>; - }; - - mipim0-camera2-clk { - rockchip,pins = <0x01 0x0f 0x02 0x198>; - phandle = <0x397>; - }; - - mipi-te0 { - rockchip,pins = <0x03 0x12 0x02 0x198>; - phandle = <0x39e>; - }; - - mipim1-camera1-clk { - rockchip,pins = <0x03 0x06 0x04 0x198>; - phandle = <0x180>; - }; - - mipim0-camera3-clk { - rockchip,pins = <0x01 0x1e 0x02 0x198>; - phandle = <0x398>; - }; - }; - - pwm14 { - - pwm14m2-pins { - rockchip,pins = <0x01 0x1e 0x0b 0x198>; - phandle = <0x3e1>; - }; - - pwm14m1-pins { - rockchip,pins = <0x04 0x0a 0x0b 0x198>; - phandle = <0x3e0>; - }; - - pwm14m0-pins { - rockchip,pins = <0x03 0x12 0x0b 0x198>; - phandle = <0x173>; - }; - }; - - pcfg-pull-none-drv-level-4-smt { - drive-strength = <0x04>; - bias-disable; - input-schmitt-enable; - phandle = <0x303>; - }; - - headphone { - - hp-det { - rockchip,pins = <0x02 0x13 0x00 0x198>; - phandle = <0x1dc>; - }; - }; - - npu { - - npu-pins { - rockchip,pins = <0x00 0x16 0x02 0x198>; - phandle = <0x3a0>; - }; - }; - - wireless-bluetooth { - - bt-reset-gpio { - rockchip,pins = <0x00 0x16 0x00 0x198>; - phandle = <0x1e6>; - }; - - bt-irq-gpio { - rockchip,pins = <0x00 0x00 0x00 0x198>; - phandle = <0x1e8>; - }; - - bt-wake-gpio { - rockchip,pins = <0x00 0x15 0x00 0x198>; - phandle = <0x1e7>; - }; - - uart6-gpios { - rockchip,pins = <0x01 0x02 0x00 0x198>; - phandle = <0x1e9>; - }; - }; - - pcie30x1 { - - pcie30x1-1-button-rstn { - rockchip,pins = <0x04 0x0a 0x04 0x198>; - phandle = <0x3a9>; - }; - - pcie30x1m1-pins { - rockchip,pins = <0x04 0x03 0x04 0x198 0x04 0x05 0x04 0x198 0x04 0x04 0x04 0x198 0x04 0x00 0x04 0x198 0x04 0x02 0x04 0x198 0x04 0x01 0x04 0x198>; - phandle = <0x3a6>; - }; - - pcie30x1m0-pins { - rockchip,pins = <0x00 0x10 0x0c 0x198 0x00 0x15 0x0c 0x198 0x00 0x14 0x0c 0x198 0x00 0x0d 0x0c 0x198 0x00 0x0f 0x0c 0x198 0x00 0x0e 0x0c 0x198>; - phandle = <0x3a5>; - }; - - pcie30x1-0-button-rstn { - rockchip,pins = <0x04 0x09 0x04 0x198>; - phandle = <0x3a8>; - }; - - pcie30x1m2-pins { - rockchip,pins = <0x01 0x0d 0x04 0x198 0x01 0x0c 0x04 0x198 0x01 0x0b 0x04 0x198 0x01 0x00 0x04 0x198 0x01 0x07 0x04 0x198 0x01 0x01 0x04 0x198>; - phandle = <0x3a7>; - }; - }; - - uart8 { - - uart8m0-rtsn { - rockchip,pins = <0x04 0x0a 0x0a 0x198>; - phandle = <0x443>; - }; - - uart8m1-ctsn { - rockchip,pins = <0x03 0x05 0x0a 0x198>; - phandle = <0x444>; - }; - - uart8m0-ctsn { - rockchip,pins = <0x04 0x0b 0x0a 0x198>; - phandle = <0x442>; - }; - - uart8m1-xfer { - rockchip,pins = <0x03 0x03 0x0a 0x19e 0x03 0x02 0x0a 0x19e>; - phandle = <0x167>; - }; - - uart8m0-xfer { - rockchip,pins = <0x04 0x09 0x0a 0x19e 0x04 0x08 0x0a 0x19e>; - phandle = <0x441>; - }; - - uart8-xfer { - rockchip,pins = <0x04 0x09 0x0a 0x19e>; - phandle = <0x446>; - }; - - uart8m1-rtsn { - rockchip,pins = <0x03 0x04 0x0a 0x198>; - phandle = <0x445>; - }; - }; - - spi2 { - - spi2m0-cs1 { - rockchip,pins = <0x01 0x08 0x08 0x19a>; - phandle = <0x404>; - }; - - spi2m2-cs0 { - rockchip,pins = <0x00 0x09 0x01 0x19f>; - phandle = <0x154>; - }; - - spi2m1-cs1 { - rockchip,pins = <0x04 0x08 0x08 0x19a>; - phandle = <0x407>; - }; - - spi2m2-pins { - rockchip,pins = <0x00 0x05 0x01 0x19f 0x00 0x0b 0x01 0x19f 0x00 0x06 0x01 0x19f>; - phandle = <0x155>; - }; - - spi2m1-pins { - rockchip,pins = <0x04 0x06 0x08 0x19a 0x04 0x04 0x08 0x19a 0x04 0x05 0x08 0x19a>; - phandle = <0x405>; - }; - - spi2m2-cs1 { - rockchip,pins = <0x00 0x08 0x01 0x19f>; - phandle = <0x408>; - }; - - spi2m0-cs0 { - rockchip,pins = <0x01 0x07 0x08 0x19a>; - phandle = <0x403>; - }; - - spi2m0-pins { - rockchip,pins = <0x01 0x06 0x08 0x19a 0x01 0x04 0x08 0x19a 0x01 0x05 0x08 0x19a>; - phandle = <0x402>; - }; - - spi2m1-cs0 { - rockchip,pins = <0x04 0x07 0x08 0x19a>; - phandle = <0x406>; - }; - }; - - pcfg-pull-up-drv-level-15 { - drive-strength = <0x0f>; - phandle = <0x462>; - bias-pull-up; - }; - - pcfg-pull-down-drv-level-13 { - drive-strength = <0x0d>; - bias-pull-down; - phandle = <0x469>; - }; - - pcfg-pull-up-drv-level-2 { - drive-strength = <0x02>; - phandle = <0x199>; - bias-pull-up; - }; - - i2s1 { - - i2s1m0-sdo1 { - rockchip,pins = <0x04 0x0a 0x03 0x198>; - phandle = <0x127>; - }; - - i2s1m1-sdi1 { - rockchip,pins = <0x00 0x16 0x01 0x198>; - phandle = <0x380>; - }; - - i2s1m0-sdi3 { - rockchip,pins = <0x04 0x08 0x03 0x198>; - phandle = <0x125>; - }; - - i2s1m0-mclk { - rockchip,pins = <0x04 0x00 0x03 0x19d>; - phandle = <0x37b>; - }; - - i2s1m0-sdi1 { - rockchip,pins = <0x04 0x06 0x03 0x198>; - phandle = <0x123>; - }; - - i2s1m1-sdo2 { - rockchip,pins = <0x00 0x1c 0x01 0x198>; - phandle = <0x385>; - }; - - i2s1m1-sdo0 { - rockchip,pins = <0x00 0x19 0x01 0x198>; - phandle = <0x383>; - }; - - i2s1m0-sdo2 { - rockchip,pins = <0x04 0x0b 0x03 0x198>; - phandle = <0x128>; - }; - - i2s1m1-sdi2 { - rockchip,pins = <0x00 0x17 0x01 0x198>; - phandle = <0x381>; - }; - - i2s1m0-sdo0 { - rockchip,pins = <0x04 0x09 0x03 0x198>; - phandle = <0x126>; - }; - - i2s1m1-sdi0 { - rockchip,pins = <0x00 0x15 0x01 0x198>; - phandle = <0x37f>; - }; - - i2s1m0-sdi2 { - rockchip,pins = <0x04 0x07 0x03 0x198>; - phandle = <0x124>; - }; - - i2s1m1-sclk { - rockchip,pins = <0x00 0x0e 0x01 0x19d>; - phandle = <0x37e>; - }; - - i2s1m0-sdi0 { - rockchip,pins = <0x04 0x05 0x03 0x198>; - phandle = <0x122>; - }; - - i2s1m1-sdo3 { - rockchip,pins = <0x00 0x1d 0x01 0x198>; - phandle = <0x386>; - }; - - i2s1m1-lrck { - rockchip,pins = <0x00 0x0f 0x01 0x19d>; - phandle = <0x37c>; - }; - - i2s1m0-sclk { - rockchip,pins = <0x04 0x01 0x03 0x19d>; - phandle = <0x121>; - }; - - i2s1m1-sdo1 { - rockchip,pins = <0x00 0x1a 0x01 0x198>; - phandle = <0x384>; - }; - - i2s1m0-sdo3 { - rockchip,pins = <0x04 0x0c 0x03 0x198>; - phandle = <0x129>; - }; - - i2s1m1-sdi3 { - rockchip,pins = <0x00 0x18 0x01 0x198>; - phandle = <0x382>; - }; - - i2s1m0-lrck { - rockchip,pins = <0x04 0x02 0x03 0x19d>; - phandle = <0x120>; - }; - - i2s1m1-mclk { - rockchip,pins = <0x00 0x0d 0x01 0x19d>; - phandle = <0x37d>; - }; - }; - - ddrphych2 { - - ddrphych2-pins { - rockchip,pins = <0x04 0x08 0x07 0x198 0x04 0x09 0x07 0x198 0x04 0x0a 0x07 0x198 0x04 0x0b 0x07 0x198>; - phandle = <0x31a>; - }; - }; - - pcfg-pull-none-drv-level-12 { - drive-strength = <0x0c>; - bias-disable; - phandle = <0x456>; - }; - - i2c1 { - - i2c1m2-xfer { - rockchip,pins = <0x00 0x1c 0x09 0x19d 0x00 0x1d 0x09 0x19d>; - phandle = <0x148>; - }; - - i2c1m1-xfer { - rockchip,pins = <0x00 0x08 0x02 0x19d 0x00 0x09 0x02 0x19d>; - phandle = <0x357>; - }; - - i2c1m0-xfer { - rockchip,pins = <0x00 0x0d 0x09 0x19d 0x00 0x0e 0x09 0x19d>; - phandle = <0x356>; - }; - - i2c1m4-xfer { - rockchip,pins = <0x01 0x1a 0x09 0x19d 0x01 0x1b 0x09 0x19d>; - phandle = <0x359>; - }; - - i2c1m3-xfer { - rockchip,pins = <0x02 0x1c 0x09 0x19d 0x02 0x1d 0x09 0x19d>; - phandle = <0x358>; - }; - }; - - pwm7 { - - pwm7m3-pins { - rockchip,pins = <0x04 0x16 0x0b 0x198>; - phandle = <0x3d3>; - }; - - pwm7m2-pins { - rockchip,pins = <0x01 0x13 0x0b 0x198>; - phandle = <0x3d2>; - }; - - pwm7m1-pins { - rockchip,pins = <0x04 0x1c 0x0b 0x198>; - phandle = <0x3d1>; - }; - - pwm7m0-pins { - rockchip,pins = <0x00 0x18 0x0b 0x198>; - phandle = <0x16c>; - }; - }; - - pcfg-pull-none-drv-level-5 { - drive-strength = <0x05>; - bias-disable; - phandle = <0x2f1>; - }; - - gmac0 { - - gmac0-clkinout { - rockchip,pins = <0x04 0x13 0x01 0x198>; - phandle = <0x46d>; - }; - - gmac0-miim { - rockchip,pins = <0x04 0x14 0x01 0x198 0x04 0x15 0x01 0x198>; - phandle = <0x1c1>; - }; - - gmac0-tx-bus2 { - rockchip,pins = <0x02 0x0e 0x01 0x19a 0x02 0x0f 0x01 0x19a 0x02 0x10 0x01 0x198>; - phandle = <0x1c2>; - }; - - gmac0-rgmii-bus { - rockchip,pins = <0x02 0x06 0x01 0x198 0x02 0x07 0x01 0x198 0x02 0x09 0x01 0x19a 0x02 0x0a 0x01 0x19a>; - phandle = <0x1c5>; - }; - - gmac0-ppsclk { - rockchip,pins = <0x02 0x14 0x01 0x198>; - phandle = <0x46e>; - }; - - gmac0-txer { - rockchip,pins = <0x04 0x16 0x01 0x198>; - phandle = <0x471>; - }; - - gmac0-ptp-refclk { - rockchip,pins = <0x02 0x0c 0x01 0x198>; - phandle = <0x470>; - }; - - gmac0-rx-bus2 { - rockchip,pins = <0x02 0x11 0x01 0x198 0x02 0x12 0x01 0x198 0x04 0x12 0x01 0x198>; - phandle = <0x1c3>; - }; - - gmac0-rgmii-clk { - rockchip,pins = <0x02 0x08 0x01 0x198 0x02 0x0b 0x01 0x198>; - phandle = <0x1c4>; - }; - - gmac0-ppstring { - rockchip,pins = <0x02 0x0d 0x01 0x198>; - phandle = <0x46f>; - }; - }; - - pwm12 { - - pwm12m1-pins { - rockchip,pins = <0x04 0x0d 0x0b 0x198>; - phandle = <0x3dd>; - }; - - pwm12m0-pins { - rockchip,pins = <0x03 0x0d 0x0b 0x198>; - phandle = <0x171>; - }; - }; - - usb-typec { - - usbc0-int { - rockchip,pins = <0x00 0x1b 0x00 0x198>; - phandle = <0x17b>; - }; - - usb-5v-ctrl { - rockchip,pins = <0x01 0x03 0x00 0x198>; - phandle = <0x1ef>; - }; - }; - - uart6 { - - uart6m1-ctsn { - rockchip,pins = <0x01 0x03 0x0a 0x198>; - phandle = <0x436>; - }; - - uart6m2-xfer { - rockchip,pins = <0x01 0x19 0x0a 0x19e 0x01 0x18 0x0a 0x19e>; - phandle = <0x437>; - }; - - uart6m0-ctsn { - rockchip,pins = <0x02 0x09 0x0a 0x198>; - phandle = <0x439>; - }; - - uart6m1-xfer { - rockchip,pins = <0x01 0x00 0x0a 0x19e 0x01 0x01 0x0a 0x19e>; - phandle = <0x165>; - }; - - uart6m0-xfer { - rockchip,pins = <0x02 0x06 0x0a 0x19e 0x02 0x07 0x0a 0x19e>; - phandle = <0x438>; - }; - - uart6m1-rtsn { - rockchip,pins = <0x01 0x02 0x0a 0x198>; - phandle = <0x1e5>; - }; - - uart6m0-rtsn { - rockchip,pins = <0x02 0x08 0x0a 0x198>; - phandle = <0x43a>; - }; - }; - - pcfg-pull-down-drv-level-8 { - drive-strength = <0x08>; - bias-pull-down; - phandle = <0x464>; - }; - - gpu { - - gpu-pins { - rockchip,pins = <0x00 0x15 0x02 0x198>; - phandle = <0x333>; - }; - }; - - spi0 { - - spi0m2-cs1 { - rockchip,pins = <0x01 0x0d 0x08 0x19a>; - phandle = <0x3f8>; - }; - - spi0m0-cs0 { - rockchip,pins = <0x00 0x19 0x08 0x19a>; - phandle = <0x14e>; - }; - - spi0m3-pins { - rockchip,pins = <0x03 0x1b 0x08 0x19a 0x03 0x19 0x08 0x19a 0x03 0x1a 0x08 0x19a>; - phandle = <0x3f9>; - }; - - spi0m3-cs1 { - rockchip,pins = <0x03 0x1d 0x08 0x19a>; - phandle = <0x3fb>; - }; - - spi0m2-pins { - rockchip,pins = <0x01 0x0b 0x08 0x19a 0x01 0x09 0x08 0x19a 0x01 0x0a 0x08 0x19a>; - phandle = <0x3f6>; - }; - - spi0m1-cs0 { - rockchip,pins = <0x04 0x0a 0x08 0x19a>; - phandle = <0x3f4>; - }; - - spi0m1-pins { - rockchip,pins = <0x04 0x02 0x08 0x19a 0x04 0x00 0x08 0x19a 0x04 0x01 0x08 0x19a>; - phandle = <0x3f3>; - }; - - spi0m0-cs1 { - rockchip,pins = <0x00 0x0f 0x08 0x19a>; - phandle = <0x14f>; - }; - - spi0m2-cs0 { - rockchip,pins = <0x01 0x0c 0x08 0x19a>; - phandle = <0x3f7>; - }; - - spi0m0-pins { - rockchip,pins = <0x00 0x16 0x08 0x19a 0x00 0x17 0x08 0x19a 0x00 0x10 0x08 0x19a>; - phandle = <0x150>; - }; - - spi0m1-cs1 { - rockchip,pins = <0x04 0x09 0x08 0x19a>; - phandle = <0x3f5>; - }; - - spi0m3-cs0 { - rockchip,pins = <0x03 0x1c 0x08 0x19a>; - phandle = <0x3fa>; - }; - }; - - fspi { - - fspim0-cs1 { - rockchip,pins = <0x02 0x1f 0x02 0x199>; - phandle = <0x329>; - }; - - fspim1-pins { - rockchip,pins = <0x02 0x0b 0x03 0x199 0x02 0x0c 0x03 0x199 0x02 0x06 0x03 0x199 0x02 0x07 0x03 0x199 0x02 0x08 0x03 0x199 0x02 0x09 0x03 0x199>; - phandle = <0x32c>; - }; - - fspim0-pins { - rockchip,pins = <0x02 0x00 0x02 0x199 0x02 0x1e 0x02 0x199 0x02 0x18 0x02 0x199 0x02 0x19 0x02 0x199 0x02 0x1a 0x02 0x199 0x02 0x1b 0x02 0x199>; - phandle = <0x328>; - }; - - fspim1-cs1 { - rockchip,pins = <0x02 0x0d 0x03 0x199>; - phandle = <0x32d>; - }; - - fspim2-cs1 { - rockchip,pins = <0x03 0x15 0x02 0x199>; - phandle = <0x32b>; - }; - - fspim2-pins { - rockchip,pins = <0x03 0x05 0x05 0x199 0x03 0x14 0x02 0x199 0x03 0x00 0x05 0x199 0x03 0x01 0x05 0x199 0x03 0x02 0x05 0x199 0x03 0x03 0x05 0x199>; - phandle = <0x32a>; - }; - }; - - pcfg-pull-up-drv-level-13 { - drive-strength = <0x0d>; - phandle = <0x460>; - bias-pull-up; - }; - - clk32k { - - clk32k-out0 { - rockchip,pins = <0x00 0x0a 0x02 0x198>; - phandle = <0x315>; - }; - - clk32k-in { - rockchip,pins = <0x00 0x0a 0x01 0x198>; - phandle = <0x314>; - }; - - clk32k-out1 { - rockchip,pins = <0x02 0x15 0x01 0x198>; - phandle = <0x316>; - }; - }; - - pcfg-pull-down-drv-level-11 { - drive-strength = <0x0b>; - bias-pull-down; - phandle = <0x467>; - }; - - pcie30phy { - - pcie30phy-pins { - rockchip,pins = <0x01 0x14 0x04 0x198 0x01 0x19 0x04 0x198>; - phandle = <0x3a4>; - }; - }; - - pcfg-pull-up-drv-level-0 { - drive-strength = <0x00>; - phandle = <0x2f3>; - bias-pull-up; - }; - - ddrphych0 { - - ddrphych0-pins { - rockchip,pins = <0x04 0x00 0x07 0x198 0x04 0x01 0x07 0x198 0x04 0x02 0x07 0x198 0x04 0x03 0x07 0x198>; - phandle = <0x318>; - }; - }; - - pcfg-pull-none-drv-level-10 { - drive-strength = <0x0a>; - bias-disable; - phandle = <0x454>; - }; - - pwm5 { - - pwm5m2-pins { - rockchip,pins = <0x04 0x14 0x0b 0x198>; - phandle = <0x3ce>; - }; - - pwm5m1-pins { - rockchip,pins = <0x00 0x16 0x0b 0x198>; - phandle = <0x16a>; - }; - - pwm5m0-pins { - rockchip,pins = <0x00 0x09 0x03 0x198>; - phandle = <0x3cd>; - }; - }; - - pcfg-pull-none-drv-level-3 { - drive-strength = <0x03>; - bias-disable; - phandle = <0x2ef>; - }; - - pwm10 { - - pwm10m2-pins { - rockchip,pins = <0x03 0x1b 0x0b 0x198>; - phandle = <0x3d9>; - }; - - pwm10m1-pins { - rockchip,pins = <0x04 0x1b 0x0b 0x198>; - phandle = <0x3d8>; - }; - - pwm10m0-pins { - rockchip,pins = <0x03 0x00 0x0b 0x198>; - phandle = <0x16f>; - }; - }; - - pcfg-pull-down-smt { - input-schmitt-enable; - bias-pull-down; - phandle = <0x2ff>; - }; - - gpio@fec50000 { - gpio-controller; - interrupts = <0x00 0x119 0x04>; - clocks = <0x02 0x83 0x02 0x84>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfec50000 0x00 0x100>; - phandle = <0x10d>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x80 0x20>; - interrupt-controller; - }; - - pcfg-pull-down { - bias-pull-down; - phandle = <0x2ec>; - }; - - uart4 { - - uart4m2-xfer { - rockchip,pins = <0x01 0x0a 0x0a 0x19e 0x01 0x0b 0x0a 0x19e>; - phandle = <0x42d>; - }; - - uart4-ctsn { - rockchip,pins = <0x01 0x17 0x0a 0x198>; - phandle = <0x42e>; - }; - - uart4m1-xfer { - rockchip,pins = <0x03 0x18 0x0a 0x19e 0x03 0x19 0x0a 0x19e>; - phandle = <0x163>; - }; - - uart4m0-xfer { - rockchip,pins = <0x01 0x1b 0x0a 0x19e 0x01 0x1a 0x0a 0x19e>; - phandle = <0x42c>; - }; - - uart4-rtsn { - rockchip,pins = <0x01 0x15 0x0a 0x198>; - phandle = <0x42f>; - }; - }; - - spdif0 { - - spdif0m0-tx { - rockchip,pins = <0x01 0x0e 0x03 0x198>; - phandle = <0x142>; - }; - - spdif0m1-tx { - rockchip,pins = <0x04 0x0c 0x06 0x198>; - phandle = <0x3f0>; - }; - }; - - pcfg-pull-down-drv-level-6 { - drive-strength = <0x06>; - bias-pull-down; - phandle = <0x2fd>; - }; - - pcfg-pull-up-drv-level-9 { - drive-strength = <0x09>; - phandle = <0x45c>; - bias-pull-up; - }; - - pcfg-pull-none-drv-level-1-smt { - drive-strength = <0x01>; - bias-disable; - input-schmitt-enable; - phandle = <0x19c>; - }; - - pcfg-pull-up-drv-level-11 { - drive-strength = <0x0b>; - phandle = <0x45e>; - bias-pull-up; - }; - - mcu { - - mcum1-pins { - rockchip,pins = <0x03 0x1c 0x06 0x198 0x03 0x1d 0x06 0x198>; - phandle = <0x394>; - }; - - mcum0-pins { - rockchip,pins = <0x04 0x1c 0x05 0x198 0x04 0x1d 0x05 0x198>; - phandle = <0x393>; - }; - }; - - i2c8 { - - i2c8m4-xfer { - rockchip,pins = <0x03 0x12 0x09 0x19d 0x03 0x13 0x09 0x19d>; - phandle = <0x373>; - }; - - i2c8m3-xfer { - rockchip,pins = <0x04 0x10 0x09 0x19d 0x04 0x11 0x09 0x19d>; - phandle = <0x372>; - }; - - i2c8m2-xfer { - rockchip,pins = <0x01 0x1e 0x09 0x19d 0x01 0x1f 0x09 0x19d>; - phandle = <0x371>; - }; - - i2c8m1-xfer { - rockchip,pins = <0x02 0x08 0x09 0x19d 0x02 0x09 0x09 0x19d>; - phandle = <0x374>; - }; - - i2c8m0-xfer { - rockchip,pins = <0x04 0x1a 0x09 0x19d 0x04 0x1b 0x09 0x19d>; - phandle = <0x186>; - }; - }; - - dp0 { - - dp0m0-pins { - rockchip,pins = <0x04 0x0c 0x05 0x198>; - phandle = <0x31c>; - }; - - dp0m2-pins { - rockchip,pins = <0x01 0x00 0x05 0x198>; - phandle = <0x31e>; - }; - - dp0m1-pins { - rockchip,pins = <0x00 0x14 0x0a 0x198>; - phandle = <0x31d>; - }; - }; - - pcfg-pull-none-drv-level-5-smt { - drive-strength = <0x05>; - bias-disable; - input-schmitt-enable; - phandle = <0x19b>; - }; - - pwm3 { - - pwm3m2-pins { - rockchip,pins = <0x01 0x12 0x0b 0x198>; - phandle = <0x3ca>; - }; - - pwm3m1-pins { - rockchip,pins = <0x03 0x0a 0x0b 0x198>; - phandle = <0x3c9>; - }; - - pwm3m0-pins { - rockchip,pins = <0x00 0x1c 0x03 0x198>; - phandle = <0x81>; - }; - - pwm3m3-pins { - rockchip,pins = <0x01 0x07 0x0b 0x198>; - phandle = <0x3cb>; - }; - }; - - pcfg-pull-none-drv-level-1 { - drive-strength = <0x01>; - bias-disable; - phandle = <0x2ee>; - }; - - sata2 { - - sata2m1-pins { - rockchip,pins = <0x01 0x0f 0x06 0x198>; - phandle = <0x3ed>; - }; - - sata2m0-pins { - rockchip,pins = <0x04 0x09 0x06 0x198>; - phandle = <0x3ec>; - }; - }; - - cam { - - cam0-or-cam1-switch-pin { - rockchip,pins = <0x03 0x11 0x00 0x198>; - phandle = <0x1f0>; - }; - }; - - uart2 { - - uart2-rtsn { - rockchip,pins = <0x03 0x0b 0x0a 0x198>; - phandle = <0x427>; - }; - - uart2m1-xfer { - rockchip,pins = <0x04 0x19 0x0a 0x19e 0x04 0x18 0x0a 0x19e>; - phandle = <0x161>; - }; - - uart2m0-xfer { - rockchip,pins = <0x00 0x0e 0x0a 0x19e 0x00 0x0d 0x0a 0x19e>; - phandle = <0x1ce>; - }; - - uart2-ctsn { - rockchip,pins = <0x03 0x0c 0x0a 0x198>; - phandle = <0x426>; - }; - - uart2m2-xfer { - rockchip,pins = <0x03 0x0a 0x0a 0x19e 0x03 0x09 0x0a 0x19e>; - phandle = <0x425>; - }; - }; - - pcfg-pull-down-drv-level-4 { - drive-strength = <0x04>; - bias-pull-down; - phandle = <0x2fb>; - }; - - pcfg-pull-up-drv-level-7 { - drive-strength = <0x07>; - phandle = <0x45a>; - bias-pull-up; - }; - - i2c6 { - - i2c6m4-xfer { - rockchip,pins = <0x03 0x01 0x09 0x19d 0x03 0x00 0x09 0x19d>; - phandle = <0x36c>; - }; - - i2c6m3-xfer { - rockchip,pins = <0x04 0x09 0x09 0x19d 0x04 0x08 0x09 0x19d>; - phandle = <0x36b>; - }; - - i2c6m2-xfer { - rockchip,pins = <0x02 0x13 0x09 0x19d 0x02 0x12 0x09 0x19d>; - phandle = <0x36d>; - }; - - i2c6m1-xfer { - rockchip,pins = <0x01 0x13 0x09 0x19d 0x01 0x12 0x09 0x19d>; - phandle = <0x36a>; - }; - - i2c6m0-xfer { - rockchip,pins = <0x00 0x18 0x09 0x19d 0x00 0x17 0x09 0x19d>; - phandle = <0x178>; - }; - }; - - pdm1 { - - pdm1m1-sdi3 { - rockchip,pins = <0x01 0x0a 0x02 0x198>; - phandle = <0x3c1>; - }; - - pdm1m0-clk { - rockchip,pins = <0x04 0x1d 0x02 0x198>; - phandle = <0x140>; - }; - - pdm1m1-sdi1 { - rockchip,pins = <0x01 0x08 0x02 0x198>; - phandle = <0x3bf>; - }; - - pdm1m0-sdi3 { - rockchip,pins = <0x04 0x18 0x02 0x198>; - phandle = <0x13e>; - }; - - pdm1m0-sdi1 { - rockchip,pins = <0x04 0x1a 0x02 0x198>; - phandle = <0x13c>; - }; - - pdm1m1-clk { - rockchip,pins = <0x01 0x0c 0x02 0x198>; - phandle = <0x3bb>; - }; - - pdm1m1-clk1 { - rockchip,pins = <0x01 0x0b 0x02 0x198>; - phandle = <0x3bc>; - }; - - pdm1m1-idle { - rockchip,pins = <0x01 0x0c 0x00 0x198 0x01 0x0b 0x00 0x198>; - phandle = <0x3bd>; - }; - - pdm1m0-clk1 { - rockchip,pins = <0x04 0x1c 0x02 0x198>; - phandle = <0x141>; - }; - - pdm1m1-sdi2 { - rockchip,pins = <0x01 0x09 0x02 0x198>; - phandle = <0x3c0>; - }; - - pdm1m0-idle { - rockchip,pins = <0x04 0x1d 0x00 0x198 0x04 0x1c 0x00 0x198>; - phandle = <0x13f>; - }; - - pdm1m1-sdi0 { - rockchip,pins = <0x01 0x07 0x02 0x198>; - phandle = <0x3be>; - }; - - pdm1m0-sdi2 { - rockchip,pins = <0x04 0x19 0x02 0x198>; - phandle = <0x13d>; - }; - - pdm1m0-sdi0 { - rockchip,pins = <0x04 0x1b 0x02 0x198>; - phandle = <0x13b>; - }; - }; - - cpu { - - cpu-pins { - rockchip,pins = <0x00 0x19 0x02 0x198 0x00 0x1d 0x02 0x198>; - phandle = <0x317>; - }; - }; - - gpio-func { - - tsadc-gpio-func { - rockchip,pins = <0x00 0x01 0x00 0x198>; - phandle = <0x175>; - }; - }; - - pcie20x1 { - - pcie20x1-2-button-rstn { - rockchip,pins = <0x04 0x0b 0x04 0x198>; - phandle = <0x3a3>; - }; - - pcie20x1m1-pins { - rockchip,pins = <0x04 0x0f 0x04 0x198 0x04 0x11 0x04 0x198 0x04 0x10 0x04 0x198>; - phandle = <0x3a2>; - }; - - pcie20x1m0-pins { - rockchip,pins = <0x03 0x17 0x04 0x198 0x03 0x19 0x04 0x198 0x03 0x18 0x04 0x198>; - phandle = <0x3a1>; - }; - }; - - leds { - - leds-gpio { - rockchip,pins = <0x00 0x15 0x00 0x198>; - phandle = <0x1ee>; - }; - }; - - pwm1 { - - pwm1m1-pins { - rockchip,pins = <0x01 0x1b 0x0b 0x198>; - phandle = <0x3c5>; - }; - - pwm1m0-pins { - rockchip,pins = <0x00 0x10 0x03 0x198>; - phandle = <0x7f>; - }; - - pwm1m2-pins { - rockchip,pins = <0x01 0x03 0x0b 0x198>; - phandle = <0x3c6>; - }; - }; - - sata0 { - - sata0m1-pins { - rockchip,pins = <0x01 0x0b 0x06 0x198>; - phandle = <0x3e9>; - }; - - sata0m0-pins { - rockchip,pins = <0x04 0x0e 0x06 0x198>; - phandle = <0x3e8>; - }; - }; - - refclk { - - refclk-pins { - rockchip,pins = <0x00 0x00 0x01 0x198>; - phandle = <0x3e5>; - }; - }; - - pcie30x4 { - - pcie30x4m2-pins { - rockchip,pins = <0x03 0x14 0x04 0x198 0x03 0x16 0x04 0x198 0x03 0x15 0x04 0x198>; - phandle = <0x3b1>; - }; - - pcie30x4m1-pins { - rockchip,pins = <0x04 0x0c 0x04 0x198 0x04 0x0e 0x04 0x198 0x04 0x0d 0x04 0x198>; - phandle = <0x3b0>; - }; - - pcie30x4-button-rstn { - rockchip,pins = <0x03 0x1d 0x04 0x198>; - phandle = <0x3b3>; - }; - - pcie30x4m0-pins { - rockchip,pins = <0x00 0x16 0x0c 0x198 0x00 0x18 0x0c 0x198 0x00 0x17 0x0c 0x198>; - phandle = <0x3af>; - }; - - pcie30x4m3-pins { - rockchip,pins = <0x01 0x08 0x04 0x198 0x01 0x0a 0x04 0x198 0x01 0x09 0x04 0x198>; - phandle = <0x3b2>; - }; - }; - - can2 { - - can2m1-pins { - rockchip,pins = <0x00 0x1c 0x0a 0x198 0x00 0x1d 0x0a 0x198>; - phandle = <0x30f>; - }; - - can2m0-pins { - rockchip,pins = <0x03 0x14 0x09 0x198 0x03 0x15 0x09 0x198>; - phandle = <0x147>; - }; - }; - - litcpu { - - litcpu-pins { - rockchip,pins = <0x00 0x1b 0x01 0x198>; - phandle = <0x392>; - }; - }; - - sata { - - sata-reset { - rockchip,pins = <0x04 0x11 0x00 0x198>; - phandle = <0x3e7>; - }; - - sata-pins { - rockchip,pins = <0x00 0x16 0x0d 0x198 0x00 0x1c 0x0d 0x198 0x00 0x1d 0x0d 0x198>; - phandle = <0x3e6>; - }; - }; - - tsadc { - - tsadc-shut { - rockchip,pins = <0x00 0x01 0x02 0x198>; - phandle = <0x176>; - }; - - tsadc-shut-org { - rockchip,pins = <0x00 0x01 0x01 0x198>; - phandle = <0x418>; - }; - - tsadcm1-shut { - rockchip,pins = <0x00 0x02 0x02 0x198>; - phandle = <0x417>; - }; - }; - - uart0 { - - uart0m1-xfer { - rockchip,pins = <0x00 0x08 0x04 0x19e 0x00 0x09 0x04 0x19e>; - phandle = <0x7d>; - }; - - uart0m0-xfer { - rockchip,pins = <0x00 0x14 0x04 0x19e 0x00 0x15 0x04 0x19e>; - phandle = <0x419>; - }; - - uart0-rtsn { - rockchip,pins = <0x00 0x16 0x04 0x198>; - phandle = <0x41c>; - }; - - uart0-ctsn { - rockchip,pins = <0x00 0x19 0x04 0x198>; - phandle = <0x41b>; - }; - - uart0m2-xfer { - rockchip,pins = <0x04 0x04 0x0a 0x19e 0x04 0x03 0x0a 0x19e>; - phandle = <0x41a>; - }; - }; - - pcfg-pull-down-drv-level-2 { - drive-strength = <0x02>; - bias-pull-down; - phandle = <0x2f9>; - }; - - pcfg-pull-up-drv-level-5 { - drive-strength = <0x05>; - phandle = <0x2f6>; - bias-pull-up; - }; - - gpio@fec20000 { - gpio-controller; - interrupts = <0x00 0x116 0x04>; - clocks = <0x02 0x7d 0x02 0x7e>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfec20000 0x00 0x100>; - phandle = <0xfe>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x20 0x20>; - interrupt-controller; - }; - - pcfg-pull-none-drv-level-15 { - drive-strength = <0x0f>; - bias-disable; - phandle = <0x459>; - }; - - eth1 { - - eth1-pins { - rockchip,pins = <0x03 0x06 0x01 0x198>; - phandle = <0x327>; - }; - }; - - i2c4 { - - i2c4m3-xfer { - rockchip,pins = <0x01 0x03 0x09 0x19d 0x01 0x02 0x09 0x19d>; - phandle = <0x364>; - }; - - i2c4m2-xfer { - rockchip,pins = <0x00 0x15 0x09 0x19d 0x00 0x14 0x09 0x19d>; - phandle = <0x363>; - }; - - i2c4m1-xfer { - rockchip,pins = <0x02 0x0d 0x09 0x19d 0x02 0x0c 0x09 0x19d>; - phandle = <0x14b>; - }; - - i2c4m0-xfer { - rockchip,pins = <0x03 0x06 0x09 0x19d 0x03 0x05 0x09 0x19d>; - phandle = <0x362>; - }; - - i2c4m4-xfer { - rockchip,pins = <0x01 0x17 0x09 0x19d 0x01 0x16 0x09 0x19d>; - phandle = <0x365>; - }; - }; - - emmc { - - emmc-data-strobe { - rockchip,pins = <0x02 0x02 0x01 0x198>; - phandle = <0x326>; - }; - - emmc-clk { - rockchip,pins = <0x02 0x01 0x01 0x199>; - phandle = <0x324>; - }; - - emmc-bus8 { - rockchip,pins = <0x02 0x18 0x01 0x199 0x02 0x19 0x01 0x199 0x02 0x1a 0x01 0x199 0x02 0x1b 0x01 0x199 0x02 0x1c 0x01 0x199 0x02 0x1d 0x01 0x199 0x02 0x1e 0x01 0x199 0x02 0x1f 0x01 0x199>; - phandle = <0x323>; - }; - - emmc-cmd { - rockchip,pins = <0x02 0x00 0x01 0x199>; - phandle = <0x325>; - }; - - emmc-rstnout { - rockchip,pins = <0x02 0x03 0x01 0x198>; - phandle = <0x322>; - }; - }; - - pcfg-pull-none-drv-level-8 { - drive-strength = <0x08>; - bias-disable; - phandle = <0x452>; - }; - - pwm15 { - - pwm15m0-pins { - rockchip,pins = <0x03 0x13 0x0b 0x198>; - phandle = <0x174>; - }; - - pwm15m3-pins { - rockchip,pins = <0x01 0x1f 0x0b 0x198>; - phandle = <0x3e4>; - }; - - pwm15m2-pins { - rockchip,pins = <0x01 0x16 0x0b 0x198>; - phandle = <0x3e3>; - }; - - pwm15m1-pins { - rockchip,pins = <0x04 0x0b 0x0b 0x198>; - phandle = <0x3e2>; - }; - }; - - pcie30x2 { - - pcie30x2m2-pins { - rockchip,pins = <0x03 0x1a 0x04 0x198 0x03 0x1c 0x04 0x198 0x03 0x1b 0x04 0x198>; - phandle = <0x3ac>; - }; - - pcie30x2m1-pins { - rockchip,pins = <0x04 0x06 0x04 0x198 0x04 0x08 0x04 0x198 0x04 0x07 0x04 0x198>; - phandle = <0x3ab>; - }; - - pcie30x2-button-rstn { - rockchip,pins = <0x03 0x11 0x04 0x198>; - phandle = <0x3ae>; - }; - - pcie30x2m0-pins { - rockchip,pins = <0x00 0x19 0x0c 0x198 0x00 0x1c 0x0c 0x198 0x00 0x1a 0x0c 0x198>; - phandle = <0x3aa>; - }; - - pcie30x2m3-pins { - rockchip,pins = <0x01 0x1f 0x04 0x198 0x01 0x0f 0x04 0x198 0x01 0x0e 0x04 0x198>; - phandle = <0x3ad>; - }; - }; - - can0 { - - can0m0-pins { - rockchip,pins = <0x00 0x10 0x0b 0x198 0x00 0x0f 0x0b 0x198>; - phandle = <0x145>; - }; - - can0m1-pins { - rockchip,pins = <0x04 0x1d 0x09 0x198 0x04 0x1c 0x09 0x198>; - phandle = <0x30d>; - }; - }; - - pcfg-output-high { - output-high; - phandle = <0x305>; - }; - - uart9 { - - uart9m0-rtsn { - rockchip,pins = <0x04 0x14 0x0a 0x198>; - phandle = <0x44e>; - }; - - uart9m2-ctsn { - rockchip,pins = <0x03 0x1b 0x0a 0x198>; - phandle = <0x44a>; - }; - - uart9m1-ctsn { - rockchip,pins = <0x04 0x01 0x0a 0x198>; - phandle = <0x447>; - }; - - uart9m2-xfer { - rockchip,pins = <0x03 0x1c 0x0a 0x19e 0x03 0x1d 0x0a 0x19e>; - phandle = <0x449>; - }; - - uart9m0-ctsn { - rockchip,pins = <0x04 0x15 0x0a 0x198>; - phandle = <0x44d>; - }; - - uart9m1-xfer { - rockchip,pins = <0x04 0x0d 0x0a 0x19e 0x04 0x0c 0x0a 0x19e>; - phandle = <0x168>; - }; - - uart9m0-xfer { - rockchip,pins = <0x02 0x14 0x0a 0x19e 0x02 0x12 0x0a 0x19e>; - phandle = <0x44c>; - }; - - uart9m2-rtsn { - rockchip,pins = <0x03 0x1a 0x0a 0x198>; - phandle = <0x44b>; - }; - - uart9m1-rtsn { - rockchip,pins = <0x04 0x00 0x0a 0x198>; - phandle = <0x448>; - }; - }; - - pcfg-pull-none-drv-level-2-smt { - drive-strength = <0x02>; - bias-disable; - input-schmitt-enable; - phandle = <0x301>; - }; - - pcfg-pull-up { - phandle = <0x19e>; - bias-pull-up; - }; - - spi3 { - - spi3m3-cs1 { - rockchip,pins = <0x03 0x15 0x08 0x19a>; - phandle = <0x40e>; - }; - - spi3m1-cs0 { - rockchip,pins = <0x04 0x10 0x08 0x19a>; - phandle = <0x15d>; - }; - - spi3m3-pins { - rockchip,pins = <0x03 0x18 0x08 0x19a 0x03 0x16 0x08 0x19a 0x03 0x17 0x08 0x19a>; - phandle = <0x40c>; - }; - - spi3m0-cs1 { - rockchip,pins = <0x04 0x13 0x08 0x19f>; - phandle = <0x411>; - }; - - spi3m2-cs0 { - rockchip,pins = <0x00 0x1c 0x08 0x19a>; - phandle = <0x40a>; - }; - - spi3m2-pins { - rockchip,pins = <0x00 0x1b 0x08 0x19a 0x00 0x18 0x08 0x19a 0x00 0x1a 0x08 0x19a>; - phandle = <0x409>; - }; - - spi3m1-cs1 { - rockchip,pins = <0x04 0x11 0x08 0x19a>; - phandle = <0x15e>; - }; - - spi3m1-pins { - rockchip,pins = <0x04 0x0f 0x08 0x19a 0x04 0x0d 0x08 0x19a 0x04 0x0e 0x08 0x19a>; - phandle = <0x15f>; - }; - - spi3m3-cs0 { - rockchip,pins = <0x03 0x14 0x08 0x19a>; - phandle = <0x40d>; - }; - - spi3m0-pins { - rockchip,pins = <0x04 0x16 0x08 0x19f 0x04 0x14 0x08 0x19f 0x04 0x15 0x08 0x19f>; - phandle = <0x40f>; - }; - - spi3m2-cs1 { - rockchip,pins = <0x00 0x1d 0x08 0x19a>; - phandle = <0x40b>; - }; - - spi3m0-cs0 { - rockchip,pins = <0x04 0x12 0x08 0x19f>; - phandle = <0x410>; - }; - }; - - pcfg-pull-down-drv-level-14 { - drive-strength = <0x0e>; - bias-pull-down; - phandle = <0x46a>; - }; - - bt656 { - - bt656-pins { - rockchip,pins = <0x04 0x08 0x02 0x1a0 0x04 0x00 0x02 0x1a0 0x04 0x01 0x02 0x1a0 0x04 0x02 0x02 0x1a0 0x04 0x03 0x02 0x1a0 0x04 0x04 0x02 0x1a0 0x04 0x05 0x02 0x1a0 0x04 0x06 0x02 0x1a0 0x04 0x07 0x02 0x1a0>; - phandle = <0x450>; - }; - }; - - pcfg-pull-down-drv-level-0 { - drive-strength = <0x00>; - bias-pull-down; - phandle = <0x2f7>; - }; - - pcfg-pull-up-drv-level-3 { - drive-strength = <0x03>; - phandle = <0x2f4>; - bias-pull-up; - }; - - i2s2 { - - i2s2m0-lrck { - rockchip,pins = <0x02 0x10 0x02 0x19d>; - phandle = <0x389>; - }; - - i2s2m1-mclk { - rockchip,pins = <0x03 0x0c 0x03 0x19d>; - phandle = <0x387>; - }; - - i2s2m0-mclk { - rockchip,pins = <0x02 0x0e 0x02 0x19d>; - phandle = <0x38a>; - }; - - i2s2m1-sdo { - rockchip,pins = <0x03 0x0b 0x03 0x198>; - phandle = <0x12b>; - }; - - i2s2m0-sdi { - rockchip,pins = <0x02 0x13 0x02 0x198>; - phandle = <0x38c>; - }; - - i2s2m1-idle { - rockchip,pins = <0x03 0x0e 0x00 0x198 0x03 0x0d 0x00 0x198>; - phandle = <0x12c>; - }; - - i2s2m1-sdi { - rockchip,pins = <0x03 0x0a 0x03 0x198>; - phandle = <0x12a>; - }; - - i2s2m0-idle { - rockchip,pins = <0x02 0x10 0x00 0x198 0x02 0x0f 0x00 0x198>; - phandle = <0x388>; - }; - - i2s2m1-sclk { - rockchip,pins = <0x03 0x0d 0x03 0x19d>; - phandle = <0x12e>; - }; - - i2s2m1-lrck { - rockchip,pins = <0x03 0x0e 0x03 0x19d>; - phandle = <0x12d>; - }; - - i2s2m0-sclk { - rockchip,pins = <0x02 0x0f 0x02 0x19d>; - phandle = <0x38b>; - }; - - i2s2m0-sdo { - rockchip,pins = <0x04 0x13 0x02 0x198>; - phandle = <0x38d>; - }; - }; - - pcfg-pull-none-drv-level-6-smt { - drive-strength = <0x06>; - bias-disable; - input-schmitt-enable; - phandle = <0x304>; - }; - - ddrphych3 { - - ddrphych3-pins { - rockchip,pins = <0x04 0x0c 0x07 0x198 0x04 0x0d 0x07 0x198 0x04 0x0e 0x07 0x198 0x04 0x0f 0x07 0x198>; - phandle = <0x31b>; - }; - }; - - pcfg-pull-none-drv-level-13 { - drive-strength = <0x0d>; - bias-disable; - phandle = <0x457>; - }; - - i2c2 { - - i2c2m2-xfer { - rockchip,pins = <0x02 0x03 0x09 0x19d 0x02 0x02 0x09 0x19d>; - phandle = <0x35a>; - }; - - i2c2m1-xfer { - rockchip,pins = <0x02 0x11 0x09 0x19d 0x02 0x10 0x09 0x19d>; - phandle = <0x35d>; - }; - - i2c2m0-xfer { - rockchip,pins = <0x00 0x0f 0x09 0x19d 0x00 0x10 0x09 0x19d>; - phandle = <0x149>; - }; - - i2c2m4-xfer { - rockchip,pins = <0x01 0x01 0x09 0x19d 0x01 0x00 0x09 0x19d>; - phandle = <0x35c>; - }; - - i2c2m3-xfer { - rockchip,pins = <0x01 0x15 0x09 0x19d 0x01 0x14 0x09 0x19d>; - phandle = <0x35b>; - }; - }; - - auddsm { - - auddsm-pins { - rockchip,pins = <0x03 0x01 0x04 0x198 0x03 0x02 0x04 0x198 0x03 0x03 0x04 0x198 0x03 0x04 0x04 0x198>; - phandle = <0x144>; - }; - }; - - pwm8 { - - pwm8m2-pins { - rockchip,pins = <0x03 0x18 0x0b 0x198>; - phandle = <0x3d5>; - }; - - pwm8m1-pins { - rockchip,pins = <0x04 0x18 0x0b 0x198>; - phandle = <0x3d4>; - }; - - pwm8m0-pins { - rockchip,pins = <0x03 0x07 0x0b 0x198>; - phandle = <0x16d>; - }; - }; - - pmic { - - pmic-pins { - rockchip,pins = <0x00 0x07 0x00 0x19e 0x00 0x02 0x01 0x198 0x00 0x03 0x01 0x198 0x00 0x11 0x01 0x198 0x00 0x12 0x01 0x198 0x00 0x13 0x01 0x198 0x00 0x1e 0x01 0x198>; - phandle = <0x156>; - }; - }; - - pcfg-pull-none-drv-level-6 { - drive-strength = <0x06>; - bias-disable; - phandle = <0x2f2>; - }; - - jtag { - - jtagm2-pins { - rockchip,pins = <0x00 0x0d 0x02 0x198 0x00 0x0e 0x02 0x198>; - phandle = <0x391>; - }; - - jtagm1-pins { - rockchip,pins = <0x04 0x18 0x05 0x198 0x04 0x19 0x05 0x198>; - phandle = <0x390>; - }; - - jtagm0-pins { - rockchip,pins = <0x04 0x1a 0x05 0x198 0x04 0x1b 0x05 0x198>; - phandle = <0x38f>; - }; - }; - - gpio@fd8a0000 { - gpio-controller; - interrupts = <0x00 0x115 0x04>; - clocks = <0x02 0x284 0x02 0x285>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfd8a0000 0x00 0x100>; - phandle = <0x7b>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x00 0x20>; - interrupt-controller; - }; - - gmac1 { - - gmac1-rgmii-clk { - rockchip,pins = <0x03 0x05 0x01 0x198 0x03 0x04 0x01 0x198>; - phandle = <0x111>; - }; - - gmac1-rx-bus2 { - rockchip,pins = <0x03 0x07 0x01 0x198 0x03 0x08 0x01 0x198 0x03 0x09 0x01 0x198>; - phandle = <0x110>; - }; - - gmac1-txer { - rockchip,pins = <0x03 0x0a 0x01 0x198>; - phandle = <0x332>; - }; - - gmac1-clkinout { - rockchip,pins = <0x03 0x0e 0x01 0x198>; - phandle = <0x32e>; - }; - - gmac1-ptp-ref-clk { - rockchip,pins = <0x03 0x0f 0x01 0x198>; - phandle = <0x331>; - }; - - gmac1-ppsclk { - rockchip,pins = <0x03 0x11 0x01 0x198>; - phandle = <0x32f>; - }; - - gmac1-ppstrig { - rockchip,pins = <0x03 0x10 0x01 0x198>; - phandle = <0x330>; - }; - - gmac1-rgmii-bus { - rockchip,pins = <0x03 0x02 0x01 0x198 0x03 0x03 0x01 0x198 0x03 0x00 0x01 0x19a 0x03 0x01 0x01 0x19a>; - phandle = <0x112>; - }; - - gmac1-tx-bus2 { - rockchip,pins = <0x03 0x0b 0x01 0x19a 0x03 0x0c 0x01 0x19a 0x03 0x0d 0x01 0x198>; - phandle = <0x10f>; - }; - - gmac1-miim { - rockchip,pins = <0x03 0x12 0x01 0x198 0x03 0x13 0x01 0x198>; - phandle = <0x10e>; - }; - }; - - pcfg-pull-none { - bias-disable; - phandle = <0x198>; - }; - - pwm13 { - - pwm13m2-pins { - rockchip,pins = <0x01 0x0f 0x0b 0x198>; - phandle = <0x3df>; - }; - - pwm13m1-pins { - rockchip,pins = <0x04 0x0e 0x0b 0x198>; - phandle = <0x3de>; - }; - - pwm13m0-pins { - rockchip,pins = <0x03 0x0e 0x0b 0x198>; - phandle = <0x172>; - }; - }; - - pcfg-output-high-pull-down { - output-high; - bias-pull-down; - phandle = <0x307>; - }; - - uart7 { - - uart7m1-ctsn { - rockchip,pins = <0x03 0x13 0x0a 0x198>; - phandle = <0x43b>; - }; - - uart7m2-xfer { - rockchip,pins = <0x01 0x0c 0x0a 0x19e 0x01 0x0d 0x0a 0x19e>; - phandle = <0x43d>; - }; - - uart7m0-ctsn { - rockchip,pins = <0x04 0x16 0x0a 0x198>; - phandle = <0x43f>; - }; - - uart7m1-xfer { - rockchip,pins = <0x03 0x11 0x0a 0x19e 0x03 0x10 0x0a 0x19e>; - phandle = <0x166>; - }; - - uart7m0-xfer { - rockchip,pins = <0x02 0x0c 0x0a 0x19e 0x02 0x0d 0x0a 0x19e>; - phandle = <0x43e>; - }; - - uart7m1-rtsn { - rockchip,pins = <0x03 0x12 0x0a 0x198>; - phandle = <0x43c>; - }; - - uart7m0-rtsn { - rockchip,pins = <0x04 0x12 0x0a 0x198>; - phandle = <0x440>; - }; - }; - - pcfg-pull-down-drv-level-9 { - drive-strength = <0x09>; - bias-pull-down; - phandle = <0x465>; - }; - - spi1 { - - spi1m1-cs1 { - rockchip,pins = <0x03 0x13 0x08 0x19a>; - phandle = <0x152>; - }; - - spi1m2-cs1 { - rockchip,pins = <0x01 0x1d 0x08 0x19a>; - phandle = <0x3fe>; - }; - - spi1m0-cs0 { - rockchip,pins = <0x02 0x13 0x08 0x19f>; - phandle = <0x400>; - }; - - spi1m2-pins { - rockchip,pins = <0x01 0x1a 0x08 0x19a 0x01 0x18 0x08 0x19a 0x01 0x19 0x08 0x19a>; - phandle = <0x3fc>; - }; - - spi1m1-pins { - rockchip,pins = <0x03 0x11 0x08 0x19a 0x03 0x10 0x08 0x19a 0x03 0x0f 0x08 0x19a>; - phandle = <0x153>; - }; - - spi1m1-cs0 { - rockchip,pins = <0x03 0x12 0x08 0x19a>; - phandle = <0x151>; - }; - - spi1m0-pins { - rockchip,pins = <0x02 0x10 0x08 0x19f 0x02 0x11 0x08 0x19f 0x02 0x12 0x08 0x19f>; - phandle = <0x3ff>; - }; - - spi1m0-cs1 { - rockchip,pins = <0x02 0x14 0x08 0x19f>; - phandle = <0x401>; - }; - - spi1m2-cs0 { - rockchip,pins = <0x01 0x1b 0x08 0x19a>; - phandle = <0x3fd>; - }; - }; - - pcfg-pull-up-drv-level-14 { - drive-strength = <0x0e>; - phandle = <0x461>; - bias-pull-up; - }; - - pcfg-output-low-pull-down { - bias-pull-down; - phandle = <0x30b>; - output-low; - }; - - pcfg-pull-down-drv-level-12 { - drive-strength = <0x0c>; - bias-pull-down; - phandle = <0x468>; - }; - - pcfg-pull-up-drv-level-1 { - drive-strength = <0x01>; - phandle = <0x19f>; - bias-pull-up; - }; - - pcfg-pull-none-smt { - bias-disable; - input-schmitt-enable; - phandle = <0x19d>; - }; - - sdmmc { - - sdmmc-det { - rockchip,pins = <0x00 0x04 0x01 0x19e>; - phandle = <0x116>; - }; - - sdmmc-pwren { - rockchip,pins = <0x00 0x05 0x02 0x198>; - phandle = <0x3ef>; - }; - - sdmmc-bus4 { - rockchip,pins = <0x04 0x18 0x01 0x199 0x04 0x19 0x01 0x199 0x04 0x1a 0x01 0x199 0x04 0x1b 0x01 0x199>; - phandle = <0x117>; - }; - - sdmmc-cmd { - rockchip,pins = <0x04 0x1c 0x01 0x199>; - phandle = <0x115>; - }; - - sdmmc-clk { - rockchip,pins = <0x04 0x1d 0x01 0x199>; - phandle = <0x114>; - }; - }; - - i2s0 { - - i2s0-sclk { - rockchip,pins = <0x01 0x13 0x01 0x19d>; - phandle = <0x11c>; - }; - - i2s0-sdo3 { - rockchip,pins = <0x01 0x1a 0x01 0x198>; - phandle = <0x37a>; - }; - - i2s0-lrck { - rockchip,pins = <0x01 0x15 0x01 0x19d>; - phandle = <0x11b>; - }; - - i2s0-sdo1 { - rockchip,pins = <0x01 0x18 0x01 0x198>; - phandle = <0x378>; - }; - - i2s0-sdi3 { - rockchip,pins = <0x01 0x19 0x02 0x198>; - phandle = <0x377>; - }; - - i2s0-mclk { - rockchip,pins = <0x01 0x12 0x01 0x19d>; - phandle = <0x17a>; - }; - - i2s0-sdi1 { - rockchip,pins = <0x01 0x1b 0x02 0x198>; - phandle = <0x375>; - }; - - i2s0-sdo2 { - rockchip,pins = <0x01 0x19 0x01 0x198>; - phandle = <0x379>; - }; - - i2s0-idle { - rockchip,pins = <0x01 0x15 0x00 0x198 0x01 0x13 0x00 0x198>; - phandle = <0x11f>; - }; - - i2s0-sdo0 { - rockchip,pins = <0x01 0x17 0x01 0x198>; - phandle = <0x11e>; - }; - - i2s0-sdi2 { - rockchip,pins = <0x01 0x1a 0x02 0x198>; - phandle = <0x376>; - }; - - i2s0-sdi0 { - rockchip,pins = <0x01 0x1c 0x02 0x198>; - phandle = <0x11d>; - }; - }; - - ddrphych1 { - - ddrphych1-pins { - rockchip,pins = <0x04 0x04 0x07 0x198 0x04 0x05 0x07 0x198 0x04 0x06 0x07 0x198 0x04 0x07 0x07 0x198>; - phandle = <0x319>; - }; - }; - - pcfg-pull-none-drv-level-11 { - drive-strength = <0x0b>; - bias-disable; - phandle = <0x455>; - }; - - i2c0 { - - i2c0m2-xfer { - rockchip,pins = <0x00 0x19 0x03 0x19d 0x00 0x1a 0x03 0x19d>; - phandle = <0x77>; - }; - - i2c0m1-xfer { - rockchip,pins = <0x04 0x15 0x09 0x19d 0x04 0x16 0x09 0x19d>; - phandle = <0x355>; - }; - - i2c0m0-xfer { - rockchip,pins = <0x00 0x0b 0x02 0x19d 0x00 0x06 0x02 0x19d>; - phandle = <0x354>; - }; - }; - - pwm6 { - - pwm6m2-pins { - rockchip,pins = <0x04 0x15 0x0b 0x198>; - phandle = <0x3d0>; - }; - - pwm6m1-pins { - rockchip,pins = <0x04 0x11 0x0b 0x198>; - phandle = <0x3cf>; - }; - - pwm6m0-pins { - rockchip,pins = <0x00 0x17 0x0b 0x198>; - phandle = <0x16b>; - }; - }; - - hym8563 { - - hym8563-int { - rockchip,pins = <0x00 0x08 0x00 0x198>; - phandle = <0x7a>; - }; - }; - - pcfg-pull-none-drv-level-4 { - drive-strength = <0x04>; - bias-disable; - phandle = <0x2f0>; - }; - - pcfg-output-high-pull-up { - output-high; - phandle = <0x306>; - bias-pull-up; - }; - - pwm11 { - - pwm11m3-pins { - rockchip,pins = <0x03 0x1d 0x0b 0x198>; - phandle = <0x3dc>; - }; - - pwm11m2-pins { - rockchip,pins = <0x01 0x14 0x0b 0x198>; - phandle = <0x3db>; - }; - - pwm11m1-pins { - rockchip,pins = <0x04 0x0c 0x0b 0x198>; - phandle = <0x3da>; - }; - - pwm11m0-pins { - rockchip,pins = <0x03 0x01 0x0b 0x198>; - phandle = <0x170>; - }; - }; - - bt1120 { - - bt1120-pins { - rockchip,pins = <0x04 0x08 0x02 0x198 0x04 0x00 0x02 0x198 0x04 0x01 0x02 0x198 0x04 0x02 0x02 0x198 0x04 0x03 0x02 0x198 0x04 0x04 0x02 0x198 0x04 0x05 0x02 0x198 0x04 0x06 0x02 0x198 0x04 0x07 0x02 0x198 0x04 0x0a 0x02 0x198 0x04 0x0b 0x02 0x198 0x04 0x0c 0x02 0x198 0x04 0x0d 0x02 0x198 0x04 0x0e 0x02 0x198 0x04 0x0f 0x02 0x198 0x04 0x10 0x02 0x198 0x04 0x11 0x02 0x198>; - phandle = <0x71>; - }; - }; - - pcfg-output-low-pull-up { - phandle = <0x30a>; - bias-pull-up; - output-low; - }; - - uart5 { - - uart5m1-ctsn { - rockchip,pins = <0x02 0x02 0x0a 0x198>; - phandle = <0x433>; - }; - - uart5m2-xfer { - rockchip,pins = <0x02 0x1c 0x0a 0x19e 0x02 0x1d 0x0a 0x19e>; - phandle = <0x435>; - }; - - uart5m0-ctsn { - rockchip,pins = <0x04 0x1a 0x0a 0x198>; - phandle = <0x431>; - }; - - uart5m1-xfer { - rockchip,pins = <0x03 0x15 0x0a 0x19e 0x03 0x14 0x0a 0x19e>; - phandle = <0x164>; - }; - - uart5m0-xfer { - rockchip,pins = <0x04 0x1c 0x0a 0x19e 0x04 0x1d 0x0a 0x19e>; - phandle = <0x430>; - }; - - uart5m1-rtsn { - rockchip,pins = <0x02 0x03 0x0a 0x198>; - phandle = <0x434>; - }; - - uart5m0-rtsn { - rockchip,pins = <0x04 0x1b 0x0a 0x198>; - phandle = <0x432>; - }; - }; - - sdio { - - sdiom1-pins { - rockchip,pins = <0x03 0x05 0x02 0x198 0x03 0x04 0x02 0x19e 0x03 0x00 0x02 0x19e 0x03 0x01 0x02 0x19e 0x03 0x02 0x02 0x19e 0x03 0x03 0x02 0x19e>; - phandle = <0x119>; - }; - - sdiom0-pins { - rockchip,pins = <0x02 0x0b 0x02 0x198 0x02 0x0a 0x02 0x19e 0x02 0x06 0x02 0x19e 0x02 0x07 0x02 0x19e 0x02 0x08 0x02 0x19e 0x02 0x09 0x02 0x19e>; - phandle = <0x3ee>; - }; - }; - - spdif1 { - - spdif1m0-tx { - rockchip,pins = <0x01 0x0f 0x03 0x198>; - phandle = <0x143>; - }; - - spdif1m2-tx { - rockchip,pins = <0x04 0x11 0x03 0x198>; - phandle = <0x3f2>; - }; - - spdif1m1-tx { - rockchip,pins = <0x04 0x09 0x02 0x198>; - phandle = <0x3f1>; - }; - }; - - pcfg-pull-down-drv-level-7 { - drive-strength = <0x07>; - bias-pull-down; - phandle = <0x463>; - }; - - gpio@fec30000 { - gpio-controller; - interrupts = <0x00 0x117 0x04>; - clocks = <0x02 0x7f 0x02 0x80>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfec30000 0x00 0x100>; - phandle = <0x79>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x40 0x20>; - interrupt-controller; - }; - - pcfg-pull-up-drv-level-12 { - drive-strength = <0x0c>; - phandle = <0x45f>; - bias-pull-up; - }; - - pcfg-pull-down-drv-level-10 { - drive-strength = <0x0a>; - bias-pull-down; - phandle = <0x466>; - }; - - dp1 { - - dp1m1-pins { - rockchip,pins = <0x00 0x15 0x0a 0x198>; - phandle = <0x320>; - }; - - dp1m0-pins { - rockchip,pins = <0x03 0x1d 0x05 0x198>; - phandle = <0x31f>; - }; - - dp1m2-pins { - rockchip,pins = <0x01 0x01 0x05 0x198>; - phandle = <0x321>; - }; - }; - - vop { - - vop-pins { - rockchip,pins = <0x01 0x02 0x01 0x198>; - phandle = <0x44f>; - }; - }; - - pwm4 { - - pwm4m1-pins { - rockchip,pins = <0x04 0x13 0x0b 0x198>; - phandle = <0x3cc>; - }; - - pwm4m0-pins { - rockchip,pins = <0x00 0x15 0x0b 0x198>; - phandle = <0x169>; - }; - }; - - pcfg-pull-none-drv-level-2 { - drive-strength = <0x02>; - bias-disable; - phandle = <0x1a0>; - }; - - pcfg-pull-none-drv-level-3-smt { - drive-strength = <0x03>; - bias-disable; - input-schmitt-enable; - phandle = <0x302>; - }; - - uart3 { - - uart3m2-xfer { - rockchip,pins = <0x04 0x06 0x0a 0x19e 0x04 0x05 0x0a 0x19e>; - phandle = <0x429>; - }; - - uart3m1-xfer { - rockchip,pins = <0x03 0x0e 0x0a 0x19e 0x03 0x0d 0x0a 0x19e>; - phandle = <0x162>; - }; - - uart3-ctsn { - rockchip,pins = <0x01 0x13 0x0a 0x198>; - phandle = <0x42a>; - }; - - uart3m0-xfer { - rockchip,pins = <0x01 0x10 0x0a 0x19e 0x01 0x11 0x0a 0x19e>; - phandle = <0x428>; - }; - - uart3-rtsn { - rockchip,pins = <0x01 0x12 0x0a 0x198>; - phandle = <0x42b>; - }; - }; - - pcfg-pull-down-drv-level-5 { - drive-strength = <0x05>; - bias-pull-down; - phandle = <0x2fc>; - }; - - pcfg-pull-up-drv-level-8 { - drive-strength = <0x08>; - phandle = <0x45b>; - bias-pull-up; - }; - - pcfg-pull-up-drv-level-10 { - drive-strength = <0x0a>; - phandle = <0x45d>; - bias-pull-up; - }; - - pcfg-output-low { - phandle = <0x309>; - output-low; - }; - - i2c7 { - - i2c7m3-xfer { - rockchip,pins = <0x04 0x0a 0x09 0x19d 0x04 0x0b 0x09 0x19d>; - phandle = <0x36f>; - }; - - i2c7m2-xfer { - rockchip,pins = <0x03 0x1a 0x09 0x19d 0x03 0x1b 0x09 0x19d>; - phandle = <0x36e>; - }; - - i2c7m1-xfer { - rockchip,pins = <0x04 0x13 0x09 0x19d 0x04 0x14 0x09 0x19d>; - phandle = <0x370>; - }; - - i2c7m0-xfer { - rockchip,pins = <0x01 0x18 0x09 0x19d 0x01 0x19 0x09 0x19d>; - phandle = <0x185>; - }; - }; - - pwm2 { - - pwm2m2-pins { - rockchip,pins = <0x04 0x12 0x0b 0x198>; - phandle = <0x3c8>; - }; - - pwm2m1-pins { - rockchip,pins = <0x03 0x09 0x0b 0x198>; - phandle = <0x3c7>; - }; - - pwm2m0-pins { - rockchip,pins = <0x00 0x14 0x03 0x198>; - phandle = <0x80>; - }; - }; - - pcfg-pull-none-drv-level-0 { - drive-strength = <0x00>; - bias-disable; - phandle = <0x2ed>; - }; - - sata1 { - - sata1m1-pins { - rockchip,pins = <0x01 0x01 0x06 0x198>; - phandle = <0x3eb>; - }; - - sata1m0-pins { - rockchip,pins = <0x04 0x0d 0x06 0x198>; - phandle = <0x3ea>; - }; - }; - - pmu { - - pmu-pins { - rockchip,pins = <0x00 0x05 0x03 0x198>; - phandle = <0x3c2>; - }; - }; - - hdmirx { - - hdmirx-det { - rockchip,pins = <0x01 0x1d 0x00 0x198>; - phandle = <0x1b4>; - }; - }; - - uart1 { - - uart1m0-ctsn { - rockchip,pins = <0x02 0x11 0x0a 0x198>; - phandle = <0x423>; - }; - - uart1m1-xfer { - rockchip,pins = <0x01 0x0f 0x0a 0x19e 0x01 0x0e 0x0a 0x19e>; - phandle = <0x160>; - }; - - uart1m0-xfer { - rockchip,pins = <0x02 0x0e 0x0a 0x19e 0x02 0x0f 0x0a 0x19e>; - phandle = <0x422>; - }; - - uart1m2-rtsn { - rockchip,pins = <0x00 0x17 0x0a 0x198>; - phandle = <0x421>; - }; - - uart1m1-rtsn { - rockchip,pins = <0x01 0x1e 0x0a 0x198>; - phandle = <0x41e>; - }; - - uart1m0-rtsn { - rockchip,pins = <0x02 0x10 0x0a 0x198>; - phandle = <0x424>; - }; - - uart1m2-ctsn { - rockchip,pins = <0x00 0x18 0x0a 0x198>; - phandle = <0x420>; - }; - - uart1m1-ctsn { - rockchip,pins = <0x01 0x1f 0x0a 0x198>; - phandle = <0x41d>; - }; - - uart1m2-xfer { - rockchip,pins = <0x00 0x1a 0x0a 0x19e 0x00 0x19 0x0a 0x19e>; - phandle = <0x41f>; - }; - }; - - hdmi { - - hdmim1-rx-cec { - rockchip,pins = <0x03 0x19 0x05 0x198>; - phandle = <0x338>; - }; - - hdmim0-rx-scl { - rockchip,pins = <0x00 0x1a 0x0b 0x198>; - phandle = <0x336>; - }; - - hdmim0-rx-sda { - rockchip,pins = <0x00 0x19 0x0b 0x198>; - phandle = <0x337>; - }; - - hdmim0-tx0-cec { - rockchip,pins = <0x04 0x11 0x05 0x198>; - phandle = <0xf9>; - }; - - hdmim2-rx-cec { - rockchip,pins = <0x01 0x0f 0x05 0x198>; - phandle = <0x342>; - }; - - hdmim1-rx-scl { - rockchip,pins = <0x03 0x1a 0x05 0x19d>; - phandle = <0x33a>; - }; - - hdmim1-rx-sda { - rockchip,pins = <0x03 0x1b 0x05 0x19d>; - phandle = <0x33b>; - }; - - hdmim0-tx0-scl { - rockchip,pins = <0x04 0x0f 0x05 0x19b>; - phandle = <0xfb>; - }; - - hdmim0-tx0-sda { - rockchip,pins = <0x04 0x10 0x05 0x19c>; - phandle = <0xfc>; - }; - - hdmim2-rx-scl { - rockchip,pins = <0x01 0x1e 0x05 0x198>; - phandle = <0x344>; - }; - - hdmim2-rx-sda { - rockchip,pins = <0x01 0x1f 0x05 0x198>; - phandle = <0x345>; - }; - - hdmim0-tx0-hpd { - rockchip,pins = <0x01 0x05 0x05 0x198>; - phandle = <0xfa>; - }; - - hdmim2-rx-hpdin { - rockchip,pins = <0x01 0x0e 0x05 0x198>; - phandle = <0x343>; - }; - - hdmi-debug6 { - rockchip,pins = <0x01 0x00 0x07 0x198>; - phandle = <0x350>; - }; - - hdmim2-tx0-scl { - rockchip,pins = <0x03 0x17 0x05 0x19b>; - phandle = <0x346>; - }; - - hdmim2-tx0-sda { - rockchip,pins = <0x03 0x18 0x05 0x19c>; - phandle = <0x347>; - }; - - hdmi-debug4 { - rockchip,pins = <0x01 0x0b 0x07 0x198>; - phandle = <0x34e>; - }; - - hdmim0-tx1-cec { - rockchip,pins = <0x02 0x14 0x04 0x198>; - phandle = <0x351>; - }; - - hdmim0-tx1-scl { - rockchip,pins = <0x02 0x0d 0x04 0x198>; - phandle = <0x352>; - }; - - hdmim0-tx1-sda { - rockchip,pins = <0x02 0x0c 0x04 0x198>; - phandle = <0x353>; - }; - - hdmi-debug2 { - rockchip,pins = <0x01 0x09 0x07 0x198>; - phandle = <0x34c>; - }; - - hdmim0-tx1-hpd { - rockchip,pins = <0x01 0x06 0x05 0x198>; - phandle = <0x1a9>; - }; - - hdmim1-rx { - rockchip,pins = <0x03 0x19 0x05 0x198 0x03 0x1a 0x05 0x19d 0x03 0x1b 0x05 0x19d 0x03 0x1c 0x05 0x198>; - phandle = <0x1b3>; - }; - - hdmim2-tx1-cec { - rockchip,pins = <0x03 0x14 0x05 0x198>; - phandle = <0x1a8>; - }; - - hdmi-debug0 { - rockchip,pins = <0x01 0x07 0x07 0x198>; - phandle = <0x34a>; - }; - - hdmim2-tx1-scl { - rockchip,pins = <0x01 0x04 0x05 0x19b>; - phandle = <0x348>; - }; - - hdmim2-tx1-sda { - rockchip,pins = <0x01 0x03 0x05 0x19c>; - phandle = <0x349>; - }; - - hdmim1-tx0-cec { - rockchip,pins = <0x00 0x19 0x0d 0x198>; - phandle = <0x33c>; - }; - - hdmim1-tx0-scl { - rockchip,pins = <0x00 0x1d 0x0b 0x19b>; - phandle = <0x33e>; - }; - - hdmim1-tx0-sda { - rockchip,pins = <0x00 0x1c 0x0b 0x19c>; - phandle = <0x33f>; - }; - - hdmim1-tx0-hpd { - rockchip,pins = <0x03 0x1c 0x03 0x198>; - phandle = <0x33d>; - }; - - hdmim0-rx-hpdin { - rockchip,pins = <0x04 0x0e 0x05 0x198>; - phandle = <0x335>; - }; - - hdmi-debug5 { - rockchip,pins = <0x01 0x0c 0x07 0x198>; - phandle = <0x34f>; - }; - - hdmi-debug3 { - rockchip,pins = <0x01 0x0a 0x07 0x198>; - phandle = <0x34d>; - }; - - hdmim1-tx1-cec { - rockchip,pins = <0x00 0x1a 0x0d 0x198>; - phandle = <0x340>; - }; - - hdmi-debug1 { - rockchip,pins = <0x01 0x08 0x07 0x198>; - phandle = <0x34b>; - }; - - hdmim1-tx1-scl { - rockchip,pins = <0x03 0x16 0x05 0x19b>; - phandle = <0x1aa>; - }; - - hdmim1-tx1-sda { - rockchip,pins = <0x03 0x15 0x05 0x19c>; - phandle = <0x1ab>; - }; - - hdmim1-tx1-hpd { - rockchip,pins = <0x03 0x0f 0x05 0x198>; - phandle = <0x341>; - }; - - hdmim1-rx-hpdin { - rockchip,pins = <0x03 0x1c 0x05 0x198>; - phandle = <0x339>; - }; - - hdmim0-rx-cec { - rockchip,pins = <0x04 0x0d 0x05 0x198>; - phandle = <0x334>; - }; - }; - - pcfg-pull-down-drv-level-3 { - drive-strength = <0x03>; - bias-pull-down; - phandle = <0x2fa>; - }; - - pcfg-pull-up-drv-level-6 { - drive-strength = <0x06>; - phandle = <0x19a>; - bias-pull-up; - }; - - i2c5 { - - i2c5m3-xfer { - rockchip,pins = <0x01 0x0e 0x09 0x19d 0x01 0x0f 0x09 0x19d>; - phandle = <0x368>; - }; - - i2c5m2-xfer { - rockchip,pins = <0x04 0x06 0x09 0x19d 0x04 0x07 0x09 0x19d>; - phandle = <0x367>; - }; - - i2c5m1-xfer { - rockchip,pins = <0x04 0x0e 0x09 0x19d 0x04 0x0f 0x09 0x19d>; - phandle = <0x366>; - }; - - i2c5m0-xfer { - rockchip,pins = <0x03 0x17 0x09 0x19d 0x03 0x18 0x09 0x19d>; - phandle = <0x14d>; - }; - - i2c5m4-xfer { - rockchip,pins = <0x02 0x0e 0x09 0x19d 0x02 0x0f 0x09 0x19d>; - phandle = <0x369>; - }; - }; - - pcfg-pull-none-drv-level-9 { - drive-strength = <0x09>; - bias-disable; - phandle = <0x453>; - }; - - pdm0 { - - pdm0m1-sdi3 { - rockchip,pins = <0x00 0x1e 0x02 0x198>; - phandle = <0x3ba>; - }; - - pdm0m1-clk { - rockchip,pins = <0x00 0x10 0x02 0x198>; - phandle = <0x3b4>; - }; - - pdm0m1-sdi1 { - rockchip,pins = <0x00 0x18 0x02 0x198>; - phandle = <0x3b8>; - }; - - pdm0m0-sdi3 { - rockchip,pins = <0x01 0x1b 0x03 0x198>; - phandle = <0x137>; - }; - - pdm0m0-sdi1 { - rockchip,pins = <0x01 0x19 0x03 0x198>; - phandle = <0x135>; - }; - - pdm0m1-clk1 { - rockchip,pins = <0x00 0x14 0x02 0x198>; - phandle = <0x3b5>; - }; - - pdm0m1-idle { - rockchip,pins = <0x00 0x10 0x00 0x198 0x00 0x14 0x00 0x198>; - phandle = <0x3b6>; - }; - - pdm0m0-clk1 { - rockchip,pins = <0x01 0x14 0x03 0x198>; - phandle = <0x13a>; - }; - - pdm0m1-sdi2 { - rockchip,pins = <0x00 0x1c 0x02 0x198>; - phandle = <0x3b9>; - }; - - pdm0m0-idle { - rockchip,pins = <0x01 0x16 0x00 0x198 0x01 0x14 0x00 0x198>; - phandle = <0x138>; - }; - - pdm0m1-sdi0 { - rockchip,pins = <0x00 0x17 0x02 0x198>; - phandle = <0x3b7>; - }; - - pdm0m0-sdi2 { - rockchip,pins = <0x01 0x1a 0x03 0x198>; - phandle = <0x136>; - }; - - pdm0m0-sdi0 { - rockchip,pins = <0x01 0x1d 0x03 0x198>; - phandle = <0x134>; - }; - - pdm0m0-clk { - rockchip,pins = <0x01 0x16 0x03 0x198>; - phandle = <0x139>; - }; - }; - - pcfg-output-high-pull-none { - bias-disable; - output-high; - phandle = <0x308>; - }; - - pwm0 { - - pwm0m1-pins { - rockchip,pins = <0x01 0x1a 0x0b 0x198>; - phandle = <0x3c3>; - }; - - pwm0m0-pins { - rockchip,pins = <0x00 0x0f 0x03 0x198>; - phandle = <0x7e>; - }; - - pwm0m2-pins { - rockchip,pins = <0x01 0x02 0x0b 0x198>; - phandle = <0x3c4>; - }; - }; - - cif { - - cif-dvp-clk { - rockchip,pins = <0x04 0x08 0x01 0x198 0x04 0x0a 0x01 0x198 0x04 0x0b 0x01 0x198>; - phandle = <0x311>; - }; - - cif-clk { - rockchip,pins = <0x04 0x0c 0x01 0x198>; - phandle = <0x310>; - }; - - cif-dvp-bus8 { - rockchip,pins = <0x04 0x00 0x01 0x198 0x04 0x01 0x01 0x198 0x04 0x02 0x01 0x198 0x04 0x03 0x01 0x198 0x04 0x04 0x01 0x198 0x04 0x05 0x01 0x198 0x04 0x06 0x01 0x198 0x04 0x07 0x01 0x198>; - phandle = <0x313>; - }; - - cif-dvp-bus16 { - rockchip,pins = <0x03 0x14 0x01 0x198 0x03 0x15 0x01 0x198 0x03 0x16 0x01 0x198 0x03 0x17 0x01 0x198 0x03 0x18 0x01 0x198 0x03 0x19 0x01 0x198 0x03 0x1a 0x01 0x198 0x03 0x1b 0x01 0x198>; - phandle = <0x312>; - }; - }; - - can1 { - - can1m1-pins { - rockchip,pins = <0x04 0x0a 0x0c 0x198 0x04 0x0b 0x0c 0x198>; - phandle = <0x146>; - }; - - can1m0-pins { - rockchip,pins = <0x03 0x0d 0x09 0x198 0x03 0x0e 0x09 0x198>; - phandle = <0x30e>; - }; - }; - - pcfg-output-low-pull-none { - bias-disable; - phandle = <0x30c>; - output-low; - }; - - gpio@fec40000 { - gpio-controller; - interrupts = <0x00 0x118 0x04>; - clocks = <0x02 0x81 0x02 0x82>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfec40000 0x00 0x100>; - phandle = <0x181>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x60 0x20>; - interrupt-controller; - }; - - spi4 { - - spi4m0-cs0 { - rockchip,pins = <0x01 0x13 0x08 0x19a>; - phandle = <0x187>; - }; - - spi4m1-cs0 { - rockchip,pins = <0x03 0x03 0x08 0x19a>; - phandle = <0x413>; - }; - - spi4m2-pins { - rockchip,pins = <0x01 0x02 0x08 0x19a 0x01 0x00 0x08 0x19a 0x01 0x01 0x08 0x19a>; - phandle = <0x415>; - }; - - spi4m0-cs1 { - rockchip,pins = <0x01 0x14 0x08 0x19a>; - phandle = <0x188>; - }; - - spi4m1-pins { - rockchip,pins = <0x03 0x02 0x08 0x19a 0x03 0x00 0x08 0x19a 0x03 0x01 0x08 0x19a>; - phandle = <0x412>; - }; - - spi4m2-cs0 { - rockchip,pins = <0x01 0x03 0x08 0x19a>; - phandle = <0x416>; - }; - - spi4m0-pins { - rockchip,pins = <0x01 0x12 0x08 0x19a 0x01 0x10 0x08 0x19a 0x01 0x11 0x08 0x19a>; - phandle = <0x189>; - }; - - spi4m1-cs1 { - rockchip,pins = <0x03 0x04 0x08 0x19a>; - phandle = <0x414>; - }; - }; - - pcfg-pull-down-drv-level-15 { - drive-strength = <0x0f>; - bias-pull-down; - phandle = <0x46b>; - }; - - pcfg-pull-up-smt { - input-schmitt-enable; - phandle = <0x2fe>; - bias-pull-up; - }; - - pcfg-pull-down-drv-level-1 { - drive-strength = <0x01>; - bias-pull-down; - phandle = <0x2f8>; - }; - - pcfg-pull-up-drv-level-4 { - drive-strength = <0x04>; - phandle = <0x2f5>; - bias-pull-up; - }; - - wireless-wlan { - - wifi-host-wake-irq { - rockchip,pins = <0x00 0x0a 0x00 0x198>; - phandle = <0x1ea>; - }; - }; - - wdt-pc9202 { - - wdt-en-base { - rockchip,pins = <0x00 0x14 0x00 0x198>; - phandle = <0x14c>; - }; - }; - - pcfg-pull-none-drv-level-0-smt { - drive-strength = <0x00>; - bias-disable; - input-schmitt-enable; - phandle = <0x300>; - }; - - i2s3 { - - i2s3-sdi { - rockchip,pins = <0x03 0x04 0x03 0x198>; - phandle = <0x12f>; - }; - - i2s3-idle { - rockchip,pins = <0x03 0x02 0x00 0x198 0x03 0x01 0x00 0x198>; - phandle = <0x131>; - }; - - i2s3-sclk { - rockchip,pins = <0x03 0x01 0x03 0x19d>; - phandle = <0x133>; - }; - - i2s3-lrck { - rockchip,pins = <0x03 0x02 0x03 0x19d>; - phandle = <0x132>; - }; - - i2s3-sdo { - rockchip,pins = <0x03 0x03 0x03 0x198>; - phandle = <0x130>; - }; - - i2s3-mclk { - rockchip,pins = <0x03 0x00 0x03 0x19d>; - phandle = <0x38e>; - }; - }; - - pcfg-pull-none-drv-level-14 { - drive-strength = <0x0e>; - bias-disable; - phandle = <0x458>; - }; - }; - - rkcif-mipi-lvds4-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a1>; - phandle = <0x473>; - }; - - bt-sco { - #sound-dai-cells = <0x01>; - compatible = "delta,dfbmcs320"; - status = "disabled"; - phandle = <0x1d2>; - }; - - phy@fed80000 { - svid = <0xff01>; - orientation-switch; - sbu2-dc-gpios = <0x10d 0x07 0x00>; - clock-names = "refclk\0immortal\0pclk\0utmi"; - resets = <0x02 0x28 0x02 0x29 0x02 0x2a 0x02 0x2b 0x02 0x482>; - clocks = <0x02 0x2b6 0x02 0x27f 0x02 0x269 0x18d>; - compatible = "rockchip,rk3588-usbdp-phy"; - status = "okay"; - reg = <0x00 0xfed80000 0x00 0x10000>; - phandle = <0x2ea>; - rockchip,usb-grf = <0x74>; - reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; - rockchip,u2phy-grf = <0x18b>; - sbu1-dc-gpios = <0x10d 0x06 0x00>; - rockchip,usbdpphy-grf = <0x18c>; - rockchip,vo-grf = <0xf5>; - - dp-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0xf6>; - }; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@1 { - remote-endpoint = <0x18f>; - reg = <0x01>; - phandle = <0x17f>; - }; - - endpoint@0 { - remote-endpoint = <0x18e>; - reg = <0x00>; - phandle = <0x17e>; - }; - }; - - u3-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x67>; - }; - }; - - interrupt-controller@fe600000 { - #address-cells = <0x02>; - interrupts = <0x01 0x09 0x04>; - #size-cells = <0x02>; - compatible = "arm,gic-v3"; - ranges; - #interrupt-cells = <0x03>; - reg = <0x00 0xfe600000 0x00 0x10000 0x00 0xfe680000 0x00 0x100000>; - phandle = <0x01>; - interrupt-controller; - - msi-controller@fe640000 { - msi-controller; - compatible = "arm,gic-v3-its"; - reg = <0x00 0xfe640000 0x00 0x20000>; - phandle = <0x106>; - #msi-cells = <0x01>; - }; - - msi-controller@fe660000 { - msi-controller; - compatible = "arm,gic-v3-its"; - reg = <0x00 0xfe660000 0x00 0x20000>; - phandle = <0x1b6>; - #msi-cells = <0x01>; - }; - }; - - ethernet@fe1c0000 { - power-domains = <0x60 0x21>; - pinctrl-names = "default"; - phy-mode = "rgmii-rxid"; - snps,mixed-burst; - snps,mtl-rx-config = <0x10b>; - snps,reset-active-low; - pinctrl-0 = <0x10e 0x10f 0x110 0x111 0x112>; - clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; - snps,mtl-tx-config = <0x10c>; - local-mac-address = [de 2f 1a d4 a9 85]; - resets = <0x02 0x20b>; - interrupts = <0x00 0xea 0x04 0x00 0xe9 0x04>; - clocks = <0x02 0x144 0x02 0x145 0x02 0x168 0x02 0x16d 0x02 0x143>; - clock_in_out = "output"; - snps,tso; - compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; - status = "okay"; - rockchip,grf = <0xc8>; - interrupt-names = "macirq\0eth_wake_irq"; - snps,reset-gpio = <0x10d 0x08 0x01>; - reg = <0x00 0xfe1c0000 0x00 0x10000>; - rockchip,php_grf = <0x76>; - phandle = <0x109>; - phy-handle = <0x113>; - reset-names = "stmmaceth"; - tx_delay = <0x40>; - snps,axi-config = <0x10a>; - snps,reset-delays-us = <0x00 0x4e20 0x186a0>; - - mdio { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "snps,dwmac-mdio"; - phandle = <0x28f>; - - phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x01>; - phandle = <0x113>; - }; - }; - - tx-queues-config { - phandle = <0x10c>; - snps,tx-queues-to-use = <0x01>; - - queue0 { - }; - }; - - stmmac-axi-config { - snps,wr_osr_lmt = <0x04>; - phandle = <0x10a>; - snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; - snps,rd_osr_lmt = <0x08>; - }; - - rx-queues-config { - snps,rx-queues-to-use = <0x01>; - phandle = <0x10b>; - - queue0 { - }; - }; - }; - - pcie-essd { - regulator-max-microvolt = <0x2625a0>; - enable-active-high; - regulator-min-microvolt = <0x2625a0>; - regulator-name = "pcie_essd"; - startup-delay-us = <0x1388>; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x1ba>; - vin-supply = <0x1cd>; - gpios = <0x181 0x0f 0x00>; - }; - - iommu@fdab9000 { - clock-names = "aclk0\0aclk1\0aclk2\0iface0\0iface1\0iface2"; - interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; - clocks = <0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "npu0_mmu\0npu1_mmu\0npu2_mmu"; - reg = <0x00 0xfdab9000 0x00 0x100 0x00 0xfdaba000 0x00 0x100 0x00 0xfdaca000 0x00 0x100 0x00 0xfdada000 0x00 0x100>; - phandle = <0xb2>; - }; - - otp@fecc0000 { - #address-cells = <0x01>; - clock-names = "otpc\0apb\0arb\0phy"; - resets = <0x02 0x12a 0x02 0x129 0x02 0x12b>; - clocks = <0x02 0x96 0x02 0x95 0x02 0x97 0x02 0x99>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-otp"; - reg = <0x00 0xfecc0000 0x00 0x400>; - phandle = <0x2e7>; - reset-names = "otpc\0apb\0arb"; - - id@7 { - reg = <0x07 0x10>; - phandle = <0x2a>; - }; - - cpul-opp-info@3d { - reg = <0x3d 0x06>; - phandle = <0x20>; - }; - - cpub1-leakage@18 { - reg = <0x18 0x01>; - phandle = <0x27>; - }; - - vop-opp-info@61 { - reg = <0x61 0x06>; - phandle = <0x2e8>; - }; - - cpul-leakage@19 { - reg = <0x19 0x01>; - phandle = <0x1f>; - }; - - codec-leakage@29 { - reg = <0x29 0x01>; - phandle = <0xc6>; - }; - - cpu-version@1c { - bits = <0x03 0x03>; - reg = <0x1c 0x01>; - phandle = <0x2b>; - }; - - cpub0-leakage@17 { - reg = <0x17 0x01>; - phandle = <0x24>; - }; - - log-leakage@1a { - reg = <0x1a 0x01>; - phandle = <0x44>; - }; - - cpu-code@2 { - reg = <0x02 0x02>; - phandle = <0x2c>; - }; - - package-serial-number-low@6 { - bits = <0x05 0x03>; - reg = <0x06 0x01>; - phandle = <0xd4>; - }; - - npu-opp-info@55 { - reg = <0x55 0x06>; - phandle = <0xb5>; - }; - - package-serial-number-high@5 { - bits = <0x00 0x01>; - reg = <0x05 0x01>; - phandle = <0xd5>; - }; - - cpub01-opp-info@43 { - reg = <0x43 0x06>; - phandle = <0x25>; - }; - - dmc-opp-info@5b { - reg = <0x5b 0x06>; - phandle = <0x45>; - }; - - npu-leakage@28 { - reg = <0x28 0x01>; - phandle = <0xb4>; - }; - - gpu-leakage@1b { - reg = <0x1b 0x01>; - phandle = <0x63>; - }; - - specification-serial-number@6 { - bits = <0x00 0x05>; - reg = <0x06 0x01>; - phandle = <0x21>; - }; - - venc-opp-info@67 { - reg = <0x67 0x06>; - phandle = <0xc7>; - }; - - gpu-opp-info@4f { - reg = <0x4f 0x06>; - phandle = <0x64>; - }; - - cpub23-opp-info@49 { - reg = <0x49 0x06>; - phandle = <0x28>; - }; - }; - - i2s@fddf0000 { - power-domains = <0x60 0x1a>; - rockchip,always-on; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x243>; - assigned-clock-parents = <0x02 0x07>; - resets = <0x02 0x3e8>; - interrupts = <0x00 0xb9 0x04>; - clocks = <0x02 0x246 0x02 0x246 0x02 0x248>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - rockchip,playback-only; - status = "okay"; - reg = <0x00 0xfddf0000 0x00 0x1000>; - phandle = <0x1d3>; - dmas = <0xf2 0x02>; - reset-names = "tx-m"; - rockchip,hdmi-path; - }; - - dma-controller@fea10000 { - clock-names = "apb_pclk"; - interrupts = <0x00 0x56 0x04 0x00 0x57 0x04>; - clocks = <0x02 0x78>; - arm,pl330-periph-burst; - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xfea10000 0x00 0x4000>; - phandle = <0x7c>; - #dma-cells = <0x01>; - }; - - pwm@febd0000 { - pinctrl-names = "active"; - pinctrl-0 = <0x169>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15a 0x04>; - clocks = <0x02 0x54 0x02 0x53>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebd0000 0x00 0x10>; - phandle = <0x2d2>; - }; - - rkvenc-ccu { - compatible = "rockchip,rkv-encoder-v2-ccu"; - status = "okay"; - phandle = <0xc3>; - }; - - syscon@fd58c000 { - compatible = "rockchip,rk3588-sys-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd58c000 0x00 0x1000>; - phandle = <0xc8>; - - rgb { - pinctrl-names = "default"; - pinctrl-0 = <0x71>; - compatible = "rockchip,rk3588-rgb"; - status = "disabled"; - phandle = <0x25c>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@2 { - remote-endpoint = <0x3d>; - status = "disabled"; - reg = <0x02>; - phandle = <0xf0>; - }; - }; - }; - }; - }; - - spi@fe2b0000 { - #address-cells = <0x01>; - clock-names = "clk_sfc\0hclk_sfc"; - assigned-clocks = <0x02 0x13d>; - assigned-clock-rates = <0x5f5e100>; - interrupts = <0x00 0xce 0x04>; - clocks = <0x02 0x13d 0x02 0x13e>; - #size-cells = <0x00>; - compatible = "rockchip,sfc"; - status = "disabled"; - reg = <0x00 0xfe2b0000 0x00 0x4000>; - phandle = <0x292>; - }; - - qos@fdf82200 { - compatible = "syscon"; - reg = <0x00 0xfdf82200 0x00 0x20>; - phandle = <0x9e>; - }; - - mmc@fe2c0000 { - power-domains = <0x60 0x28>; - fifo-depth = <0x100>; - pinctrl-names = "default"; - pinctrl-0 = <0x114 0x115 0x116 0x117>; - clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; - cap-sd-highspeed; - vqmmc-supply = <0x118>; - no-mmc; - bus-width = <0x04>; - no-sdio; - interrupts = <0x00 0xcb 0x04>; - clocks = <0x0e 0x17 0x0e 0x09 0x02 0x2c2 0x02 0x2c3>; - compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; - status = "okay"; - disable-wp; - reg = <0x00 0xfe2c0000 0x00 0x4000>; - phandle = <0x293>; - sd-uhs-sdr104; - max-frequency = <0x8f0d180>; - cap-mmc-highspeed; - }; - - serial@feb80000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x164>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x150 0x04>; - clocks = <0x02 0xc7 0x02 0xaf>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeb80000 0x00 0x100>; - phandle = <0x2cd>; - dmas = <0xf1 0x0b 0xf1 0x0c>; - reg-shift = <0x02>; - }; - - phy@fee10000 { - rockchip,pipe-grf = <0x76>; - clock-names = "refclk\0apbclk\0phpclk"; - assigned-clocks = <0x02 0x2be>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x02 0x20006 0x02 0x4d7>; - clocks = <0x02 0x2be 0x02 0x186 0x02 0x166>; - #phy-cells = <0x01>; - compatible = "rockchip,rk3588-naneng-combphy"; - status = "disabled"; - rockchip,pipe-phy-grf = <0x1cb>; - reg = <0x00 0xfee10000 0x00 0x100>; - phandle = <0x1bc>; - reset-names = "combphy-apb\0combphy"; - rockchip,pcie1ln-sel-bits = <0x100 0x00 0x00 0x00>; - }; - - can@fea60000 { - pinctrl-names = "default"; - pinctrl-0 = <0x146>; - clock-names = "baudclk\0apb_pclk"; - assigned-clocks = <0x02 0x72>; - assigned-clock-rates = <0xbebc200>; - resets = <0x02 0xbb 0x02 0xba>; - interrupts = <0x00 0x156 0x04>; - clocks = <0x02 0x72 0x02 0x71>; - compatible = "rockchip,can-2.0"; - status = "okay"; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - reg = <0x00 0xfea60000 0x00 0x1000>; - phandle = <0x2a1>; - reset-names = "can\0can-apb"; - }; - - pdm@fe4c0000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x140 0x141>; - pinctrl-0 = <0x13b 0x13c 0x13d 0x13e>; - clock-names = "pdm_clk\0pdm_hclk"; - assigned-clocks = <0x02 0x3b>; - assigned-clock-parents = <0x02 0x05>; - clocks = <0x02 0x3b 0x02 0x3a>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-pdm"; - pinctrl-1 = <0x13f>; - status = "disabled"; - reg = <0x00 0xfe4c0000 0x00 0x1000>; - phandle = <0x29b>; - dmas = <0xf1 0x04>; - }; - - rkcif-mipi-lvds3-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x57>; - phandle = <0x239>; - }; - - qos@fdf66e00 { - compatible = "syscon"; - reg = <0x00 0xfdf66e00 0x00 0x20>; - phandle = <0x9a>; - }; - - usb@fc800000 { - power-domains = <0x60 0x1f>; - phy-names = "usb2-phy"; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - companion = <0x6b>; - interrupts = <0x00 0xd7 0x04>; - clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; - compatible = "rockchip,rk3588-ehci\0generic-ehci"; - status = "okay"; - phys = <0x6c>; - reg = <0x00 0xfc800000 0x00 0x40000>; - phandle = <0x254>; - }; - - i2c@fd880000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x77>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xc0022 0x02 0xc0021>; - interrupts = <0x00 0x13d 0x04>; - clocks = <0x02 0x287 0x02 0x286>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfd880000 0x00 0x1000>; - phandle = <0x25f>; - reset-names = "i2c\0apb"; - - hym8563@51 { - pinctrl-names = "default"; - clock-output-names = "hym8563"; - pinctrl-0 = <0x7a>; - wakeup-source; - interrupts = <0x08 0x08>; - #clock-cells = <0x00>; - interrupt-parent = <0x7b>; - clock-frequency = <0x8000>; - compatible = "haoyu,hym8563"; - status = "okay"; - reg = <0x51>; - phandle = <0x1e4>; - }; - - rk8602@42 { - regulator-max-microvolt = <0x100590>; - regulator-boot-on; - rockchip,suspend-voltage-selector = <0x01>; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_cpu_big0_s0"; - regulator-ramp-delay = <0x8fc>; - compatible = "rockchip,rk8602"; - reg = <0x42>; - phandle = <0x18>; - vin-supply = <0x78>; - regulator-compatible = "rk860x-reg"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk8603@43 { - regulator-max-microvolt = <0x100590>; - regulator-boot-on; - rockchip,suspend-voltage-selector = <0x01>; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_cpu_big1_s0"; - regulator-ramp-delay = <0x8fc>; - compatible = "rockchip,rk8603"; - reg = <0x43>; - phandle = <0x1c>; - vin-supply = <0x78>; - regulator-compatible = "rk860x-reg"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - pc9202@3c { - index = <0x00>; - compatible = "firefly,pc9202"; - status = "okay"; - wd-en-gpio = <0x79 0x15 0x00>; - driver-names = "wdt_core"; - reg = <0x3c>; - }; - }; - - rkcif-mipi-lvds3-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x57>; - phandle = <0x237>; - }; - - serial@fd890000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x7d>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14b 0x04>; - clocks = <0x02 0x2ae 0x02 0x2af>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfd890000 0x00 0x100>; - phandle = <0x260>; - dmas = <0x7c 0x06 0x7c 0x07>; - reg-shift = <0x02>; - }; - - qos@fdf70000 { - compatible = "syscon"; - reg = <0x00 0xfdf70000 0x00 0x20>; - phandle = <0x85>; - }; - - gpu-opp-table { - rockchip,pvtm-offset = <0x1c>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,pvtm-hw = <0x04>; - nvmem-cells = <0x63 0x64 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; - rockchip,pvtm-thermal-zone = "gpu-thermal"; - rockchip,high-temp-max-freq = "\0\f5"; - rockchip,opp-clocks = <0x02 0x114>; - rockchip,pvtm-freq = "\0\f5"; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0x65>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; - phandle = <0x61>; - rockchip,pvtm-temp-prop = <0xffffff79 0xffffff79>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0x61a80>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-j-m-700000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x29b92700>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-300000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x11e1a300>; - opp-supported-hw = <0xf9 0xffff>; - }; - - opp-500000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x1dcd6500>; - opp-supported-hw = <0xf9 0xffff>; - }; - - opp-m-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-supported-hw = <0x02 0xffff>; - }; - - opp-j-850000000 { - opp-microvolt = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-hz = <0x00 0x32a9f880>; - opp-supported-hw = <0x04 0xffff>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L3 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - }; - - opp-j-m-400000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x17d78400>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-700000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - opp-hz = <0x00 0x29b92700>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-900000000 { - opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-hz = <0x00 0x35a4e900>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - }; - - opp-m-1000000000 { - opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - opp-hz = <0x00 0x3b9aca00>; - opp-supported-hw = <0x02 0xffff>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - }; - - opp-400000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x17d78400>; - opp-supported-hw = <0xf9 0xffff>; - }; - - opp-j-m-300000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x11e1a300>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-600000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - }; - - opp-m-900000000 { - opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-hz = <0x00 0x35a4e900>; - opp-supported-hw = <0x02 0xffff>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - }; - - opp-1000000000 { - opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - opp-hz = <0x00 0x3b9aca00>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - }; - - opp-j-m-500000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x1dcd6500>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L4 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L2 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L3 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; - opp-microvolt-L1 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - }; - }; - - csi2-dphy1-hw@fedc8000 { - clock-names = "pclk"; - resets = <0x02 0x19 0x02 0x18>; - clocks = <0x02 0x10d>; - compatible = "rockchip,rk3588-csi2-dphy-hw"; - status = "okay"; - rockchip,grf = <0x193>; - reg = <0x00 0xfedc8000 0x00 0x8000>; - phandle = <0x2e>; - reset-names = "srst_csiphy1\0srst_p_csiphy1"; - rockchip,sys_grf = <0xc8>; - }; - - hdcp@fde40000 { - power-domains = <0x60 0x19>; - clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; - resets = <0x02 0x37f 0x02 0x37d 0x02 0x37c 0x02 0x37b 0x02 0x381>; - interrupts = <0x00 0x9f 0x04>; - clocks = <0x02 0x1ed 0x02 0x1ef 0x02 0x1ee 0x02 0x1ec 0x02 0x1f1 0x02 0x1f2>; - compatible = "rockchip,rk3588-hdcp"; - status = "disabled"; - reg = <0x00 0xfde40000 0x00 0x80>; - phandle = <0x285>; - reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; - rockchip,vo-grf = <0xf5>; - }; - - iommu@fdbac800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x7f 0x04>; - clocks = <0x02 0x1b2 0x02 0x1b3>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpege3_mmu"; - reg = <0x00 0xfdbac800 0x00 0x40>; - phandle = <0xc0>; - }; - - qos@fdf40400 { - compatible = "syscon"; - reg = <0x00 0xfdf40400 0x00 0x20>; - phandle = <0xa2>; - }; - - rga@fdb70000 { - power-domains = <0x60 0x1e>; - iommus = <0xba>; - clock-names = "aclk_rga3_1\0hclk_rga3_1\0clk_rga3_1"; - interrupts = <0x00 0x73 0x04>; - clocks = <0x02 0x18a 0x02 0x189 0x02 0x18b>; - compatible = "rockchip,rga3_core1"; - status = "okay"; - interrupt-names = "rga3_core1_irq"; - reg = <0x00 0xfdb70000 0x00 0x1000>; - phandle = <0x26a>; - }; - - spi@feb00000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x02>; - pinctrl-0 = <0x14e 0x14f 0x150>; - clock-names = "spiclk\0apb_pclk"; - interrupts = <0x00 0x146 0x04>; - clocks = <0x02 0xa3 0x02 0x9e>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "disabled"; - reg = <0x00 0xfeb00000 0x00 0x1000>; - phandle = <0x2ab>; - dmas = <0x7c 0x0e 0x7c 0x0f>; - }; - - pcie@fe170000 { - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x20 0x2f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x08>; - resets = <0x02 0x20f 0x02 0x21e>; - interrupts = <0x00 0xf3 0x04 0x00 0xf2 0x04 0x00 0xf1 0x04 0x00 0xf0 0x04 0x00 0xef 0x04>; - clocks = <0x02 0x150 0x02 0x155 0x02 0x14b 0x02 0x15b 0x02 0x160 0x02 0x2c4>; - interrupt-map = <0x00 0x00 0x00 0x01 0x1bb 0x00 0x00 0x00 0x00 0x02 0x1bb 0x01 0x00 0x00 0x00 0x03 0x1bb 0x02 0x00 0x00 0x00 0x04 0x1bb 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x02>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - num-lanes = <0x01>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf2000000 0x00 0xf2000000 0x00 0x100000 0x81000000 0x00 0xf2100000 0x00 0xf2100000 0x00 0x100000 0x82000000 0x00 0xf2200000 0x00 0xf2200000 0x00 0xe00000 0xc3000000 0x09 0x80000000 0x09 0x80000000 0x00 0x40000000>; - msi-map = <0x2000 0x106 0x2000 0x1000>; - #interrupt-cells = <0x01>; - status = "disabled"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x1bc 0x02>; - num-viewport = <0x04>; - reg = <0x00 0xfe170000 0x00 0x10000 0x0a 0x40800000 0x00 0x400000>; - linux,pci-domain = <0x02>; - phandle = <0x487>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x08>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0xf0 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x1bb>; - interrupt-controller; - }; - }; - - i2s@fe470000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x11b 0x11c>; - pinctrl-0 = <0x11b 0x11c 0x11d 0x11e>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x31 0x02 0x35>; - assigned-clock-parents = <0x02 0x05 0x02 0x05>; - resets = <0x02 0x77 0x02 0x7a>; - interrupts = <0x00 0xb4 0x04>; - clocks = <0x02 0x33 0x02 0x37 0x02 0x30>; - dma-names = "tx\0rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - pinctrl-1 = <0x11f>; - status = "okay"; - reg = <0x00 0xfe470000 0x00 0x1000>; - phandle = <0x1da>; - dmas = <0x7c 0x00 0x7c 0x01>; - reset-names = "tx-m\0rx-m"; - rockchip,clk-trcm = <0x01>; - }; - - syscon@fd594000 { - compatible = "rockchip,rk3588-litcore-grf\0syscon"; - reg = <0x00 0xfd594000 0x00 0x100>; - phandle = <0x22>; - }; - - csi2-dphy5 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x214>; - }; - - usb@fc840000 { - power-domains = <0x60 0x1f>; - phy-names = "usb2-phy"; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - interrupts = <0x00 0xd8 0x04>; - clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; - compatible = "rockchip,rk3588-ohci\0generic-ohci"; - status = "okay"; - phys = <0x6c>; - reg = <0x00 0xfc840000 0x00 0x40000>; - phandle = <0x6b>; - }; - - syscon@fd5b0000 { - compatible = "rockchip,rk3588-php-grf\0syscon"; - reg = <0x00 0xfd5b0000 0x00 0x1000>; - phandle = <0x76>; - }; - - rkcif-mipi-lvds2-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x55>; - phandle = <0x236>; - }; - - rkisp1-vir1 { - rockchip,hw = <0x5a>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x240>; - }; - - i2c@feaa0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x149>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb1 0x02 0xa9>; - interrupts = <0x00 0x13f 0x04>; - clocks = <0x02 0x8e 0x02 0x86>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "disabled"; - reg = <0x00 0xfeaa0000 0x00 0x1000>; - phandle = <0x2a5>; - reset-names = "i2c\0apb"; - }; - - dmc { - downdifferential = <0x14>; - clock-names = "dmc_clk"; - interrupts = <0x00 0x49 0x04>; - clocks = <0x0e 0x04>; - upthreshold = <0x28>; - center-supply = <0x42>; - devfreq-events = <0x40>; - compatible = "rockchip,rk3588-dmc"; - status = "disabled"; - interrupt-names = "complete"; - mem-supply = <0x43>; - phandle = <0x21f>; - operating-points-v2 = <0x41>; - system-status-level = <0x01 0x04 0x08 0x08 0x02 0x01 0x10 0x04 0x10000 0x04 0x80000 0x04 0x1000 0x08 0x4000 0x08 0x2000 0x08 0xc00 0x08 0x40000 0x08 0x200000 0x08>; - auto-freq-en = <0x01>; - }; - - hdmi1-sound { - rockchip,jack-det; - rockchip,cpu = <0x1e0>; - rockchip,codec = <0x1e1>; - rockchip,card-name = "rockchip-hdmi1"; - compatible = "rockchip,hdmi"; - status = "disabled"; - phandle = <0x4a8>; - rockchip,mclk-fs = <0x80>; - }; - - qos@fdf3d800 { - compatible = "syscon"; - reg = <0x00 0xfdf3d800 0x00 0x20>; - phandle = <0xb0>; - }; - - mipi-dcphy-dummy { - phandle = <0x223>; - }; - - jpege-core@fdbac000 { - power-domains = <0x60 0x15>; - iommus = <0xc0>; - rockchip,ccu = <0xbd>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1b2>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2d0 0x02 0x2d1>; - interrupts = <0x00 0x80 0x04>; - clocks = <0x02 0x1b2 0x02 0x1b3>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-jpege-core"; - status = "okay"; - interrupt-names = "irq_jpege3"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdbac000 0x00 0x400>; - phandle = <0x270>; - reset-names = "video_a\0video_h"; - }; - - iommu@fdce0800 { - power-domains = <0x60 0x1b>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x71 0x04>; - clocks = <0x02 0x1e4 0x02 0x1e5>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "cif_mmu"; - reg = <0x00 0xfdce0800 0x00 0x100 0x00 0xfdce0900 0x00 0x100>; - phandle = <0x50>; - }; - - qos@fdf35400 { - compatible = "syscon"; - reg = <0x00 0xfdf35400 0x00 0x20>; - phandle = <0x89>; - }; - - syscon@fd5a8000 { - clocks = <0x73>; - compatible = "rockchip,rk3588-vo-grf\0syscon"; - reg = <0x00 0xfd5a8000 0x00 0x100>; - phandle = <0xd8>; - }; - - dp0-sound { - rockchip,jack-det; - rockchip,cpu = <0x1d5>; - rockchip,codec = <0x1d6 0x01>; - rockchip,card-name = "rockchip-dp0"; - compatible = "rockchip,hdmi"; - status = "disabled"; - phandle = <0x49c>; - rockchip,mclk-fs = <0x200>; - }; - - rkcif-mipi-lvds4 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x1a1>; - }; - - usb@fc880000 { - power-domains = <0x60 0x1f>; - phy-names = "usb2-phy"; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - companion = <0x6e>; - interrupts = <0x00 0xda 0x04>; - clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; - compatible = "rockchip,rk3588-ehci\0generic-ehci"; - status = "okay"; - phys = <0x6f>; - reg = <0x00 0xfc880000 0x00 0x40000>; - phandle = <0x255>; - }; - - qos@fdf62000 { - compatible = "syscon"; - reg = <0x00 0xfdf62000 0x00 0x20>; - phandle = <0x8b>; - }; - - syscon@fd5f0000 { - compatible = "rockchip,rk3588-ioc\0syscon"; - reg = <0x00 0xfd5f0000 0x00 0x10000>; - phandle = <0x196>; - }; - - mipi1-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x225>; - }; - - hdmiphy@fed70000 { - clock-names = "ref\0apb"; - resets = <0x02 0x491 0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041 0x02 0x48f 0x02 0x490>; - clocks = <0x02 0x2b5 0x02 0x268>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-hdptx-phy-hdmi"; - status = "disabled"; - rockchip,grf = <0x1c7>; - reg = <0x00 0xfed70000 0x00 0x2000>; - phandle = <0x1ac>; - reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; - - clk-port { - #clock-cells = <0x00>; - status = "okay"; - phandle = <0x36>; - }; - }; - - i2c@fec80000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x178>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb5 0x02 0xad>; - interrupts = <0x00 0x143 0x04>; - clocks = <0x02 0x92 0x02 0x8a>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfec80000 0x00 0x1000>; - phandle = <0x2df>; - reset-names = "i2c\0apb"; - - imx415@37 { - power-domains = <0x60 0x1b>; - pinctrl-names = "default"; - pinctrl-0 = <0x180>; - clock-names = "xvclk"; - clocks = <0x02 0x100>; - firefly,clkout-enabled-index = <0x00>; - rockchip,camera-module-name = "CMK-OT2022-PX1"; - reset-gpios = <0x182 0x05 0x01>; - rockchip,camera-module-index = <0x00>; - compatible = "sony,imx415"; - rockchip,camera-module-facing = "back"; - power-gpios = <0x181 0x1d 0x00>; - reg = <0x37>; - rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20"; - phandle = <0x2e3>; - - port { - - endpoint { - data-lanes = <0x01 0x02 0x03 0x04>; - remote-endpoint = <0x184>; - phandle = <0x32>; - }; - }; - }; - - es8388@11 { - pinctrl-names = "default"; - pinctrl-0 = <0x17a>; - clock-names = "mclk"; - assigned-clocks = <0x179>; - assigned-clock-rates = <0xbb8000>; - clocks = <0x179>; - #sound-dai-cells = <0x00>; - compatible = "everest,es8388\0everest,es8323"; - status = "okay"; - reg = <0x11>; - phandle = <0x1db>; - }; - - XC7160b@1b { - power-domains = <0x60 0x1b>; - pinctrl-names = "default"; - pinctrl-0 = <0x180>; - clock-names = "xvclk"; - pwdn-gpios = <0xfe 0x04 0x00>; - clocks = <0x02 0x100>; - firefly,clkout-enabled-index = <0x00>; - rockchip,camera-module-name = "NC"; - reset-gpios = <0x182 0x05 0x00>; - rockchip,camera-module-index = <0x00>; - compatible = "firefly,xc7160"; - rockchip,camera-module-facing = "back"; - power-gpios = <0x181 0x1d 0x01>; - reg = <0x1b>; - rockchip,camera-module-lens-name = "NC"; - phandle = <0x2e2>; - - port { - - endpoint { - data-lanes = <0x01 0x02 0x03 0x04>; - remote-endpoint = <0x183>; - phandle = <0x31>; - }; - }; - }; - - fusb302@22 { - pinctrl-names = "default"; - pinctrl-0 = <0x17b>; - interrupts = <0x1b 0x08>; - vbus-supply = <0x17c>; - interrupt-parent = <0x7b>; - compatible = "fcs,fusb302"; - status = "disabled"; - reg = <0x22>; - phandle = <0x2e0>; - - connector { - sink-pdos = <0x4019064>; - power-role = "dual"; - source-pdos = <0x401912c>; - data-role = "dual"; - label = "USB-C"; - try-power-role = "sink"; - compatible = "usb-c-connector"; - op-sink-microwatt = <0xf4240>; - phandle = <0x2e1>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - - endpoint { - remote-endpoint = <0x17e>; - phandle = <0x18e>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - remote-endpoint = <0x17f>; - phandle = <0x18f>; - }; - }; - }; - - altmodes { - #address-cells = <0x01>; - #size-cells = <0x00>; - - altmode@0 { - svid = <0xff01>; - vdo = <0xffffffff>; - reg = <0x00>; - }; - }; - }; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - - endpoint@0 { - remote-endpoint = <0x17d>; - phandle = <0x68>; - }; - }; - }; - }; - }; - - syscon@fd5e8000 { - compatible = "rockchip,mipi-dcphy-grf\0syscon"; - reg = <0x00 0xfd5e8000 0x00 0x4000>; - phandle = <0x190>; - }; - - vbus5v0-typec-pwr-en-regulator { - gpio = <0x182 0x0c 0x00>; - enable-active-high; - regulator-name = "vbus5v0_typec_pwr_en"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x17c>; - }; - - mipi2-csi2-hw@fdd30000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x326>; - interrupts = <0x00 0x93 0x04 0x00 0x94 0x04>; - clocks = <0x02 0x1d1>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd30000 0x00 0x10000>; - phandle = <0x49>; - reset-names = "srst_csihost_p"; - }; - - spdif-rx@fde18000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x262>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x401>; - interrupts = <0x00 0xc9 0x04>; - clocks = <0x02 0x262 0x02 0x261>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; - status = "disabled"; - reg = <0x00 0xfde18000 0x00 0x1000>; - phandle = <0x480>; - dmas = <0x7c 0x17>; - reset-names = "spdifrx-m"; - }; - - syscon@fd5a2000 { - compatible = "rockchip,rk3588-npu-grf\0syscon"; - reg = <0x00 0xfd5a2000 0x00 0x100>; - phandle = <0xb6>; - }; - - rkisp0-vir3 { - rockchip,hw = <0x58>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x23e>; - }; - - qos@fdf66200 { - compatible = "syscon"; - reg = <0x00 0xfdf66200 0x00 0x20>; - phandle = <0x94>; - }; - - rkcif@fdce0000 { - power-domains = <0x60 0x1b>; - iommus = <0x50>; - nvmem-cells = <0x21 0xd4 0xd5>; - clock-names = "aclk_cif\0hclk_cif\0dclk_cif\0iclk_host0\0iclk_host1"; - reg-names = "cif_regs"; - assigned-clocks = <0x02 0x1e3>; - assigned-clock-rates = <0x23c34600>; - resets = <0x02 0x317 0x02 0x318 0x02 0x316 0x02 0x334 0x02 0x335 0x02 0x336 0x02 0x337 0x02 0x338 0x02 0x339>; - interrupts = <0x00 0x9b 0x04>; - clocks = <0x02 0x1e4 0x02 0x1e5 0x02 0x1e3 0x02 0x1cd 0x02 0x1ce>; - compatible = "rockchip,rk3588-cif"; - status = "okay"; - rockchip,grf = <0xc8>; - interrupt-names = "cif-intr"; - nvmem-cell-names = "specification\0package_low\0package_high"; - reg = <0x00 0xfdce0000 0x00 0x800>; - phandle = <0x4f>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_d\0rst_cif_host0\0rst_cif_host1\0rst_cif_host2\0rst_cif_host3\0rst_cif_host4\0rst_cif_host5"; - }; - - edp@fdec0000 { - power-domains = <0x60 0x1a>; - phy-names = "dp"; - clock-names = "dp\0pclk\0spdif\0hclk"; - resets = <0x02 0x3e1 0x02 0x3e0>; - interrupts = <0x00 0xa3 0x04>; - clocks = <0x02 0x211 0x02 0x210 0x02 0x212 0x05>; - compatible = "rockchip,rk3588-edp"; - status = "disabled"; - rockchip,grf = <0xd8>; - phys = <0x101>; - reg = <0x00 0xfdec0000 0x00 0x1000>; - phandle = <0x289>; - reset-names = "dp\0apb"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - remote-endpoint = <0x103>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe1>; - }; - - endpoint@2 { - remote-endpoint = <0x3b>; - status = "disabled"; - reg = <0x02>; - phandle = <0xe7>; - }; - - endpoint@0 { - remote-endpoint = <0x102>; - status = "disabled"; - reg = <0x00>; - phandle = <0xdb>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - phandle = <0x28a>; - }; - }; - }; - }; - - qos@fdf72400 { - compatible = "syscon"; - reg = <0x00 0xfdf72400 0x00 0x20>; - phandle = <0x84>; - }; - - dp@fde60000 { - power-domains = <0x60 0x19>; - clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; - assigned-clocks = <0x02 0x2cd>; - assigned-clock-rates = <0xf42400>; - resets = <0x02 0x389>; - interrupts = <0x00 0xa2 0x04>; - clocks = <0x02 0x1e7 0x02 0x2cd 0x02 0x201 0x02 0x20d 0x04 0x02 0x1eb>; - #sound-dai-cells = <0x01>; - compatible = "rockchip,rk3588-dp"; - status = "disabled"; - phys = <0x1a5>; - reg = <0x00 0xfde60000 0x00 0x4000>; - phandle = <0x1e3>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - remote-endpoint = <0x3e>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe3>; - }; - - endpoint@2 { - remote-endpoint = <0x1a7>; - status = "disabled"; - reg = <0x02>; - phandle = <0xeb>; - }; - - endpoint@0 { - remote-endpoint = <0x1a6>; - status = "disabled"; - reg = <0x00>; - phandle = <0xdd>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - phandle = <0x481>; - }; - }; - }; - }; - - vcc5v0-usbdcin { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_usbdcin"; - compatible = "regulator-fixed"; - phandle = <0x48c>; - vin-supply = <0x1cd>; - }; - - rkvdec-core@fdc48000 { - power-domains = <0x60 0x0f>; - iommus = <0xcc>; - rockchip,ccu = <0xca>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; - reg-names = "regs\0link"; - assigned-clocks = <0x02 0x195 0x02 0x198 0x02 0x196 0x02 0x197>; - rockchip,core-mask = <0x20002>; - rockchip,task-capacity = <0x10>; - rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; - assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; - resets = <0x02 0x293 0x02 0x292 0x02 0x298 0x02 0x296 0x02 0x297>; - interrupts = <0x00 0x61 0x04>; - rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; - clocks = <0x02 0x195 0x02 0x194 0x02 0x198 0x02 0x196 0x02 0x197>; - rockchip,rcb-min-width = <0x200>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x09>; - compatible = "rockchip,rkv-decoder-v2"; - status = "okay"; - interrupt-names = "irq_rkvdec1"; - rockchip,skip-pmu-idle-request; - rockchip,rcb-iova = <0xffe00000 0x100000>; - reg = <0x00 0xfdc48100 0x00 0x400 0x00 0xfdc48000 0x00 0x100>; - phandle = <0x275>; - reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; - rockchip,sram = <0xcd>; - }; - - vcc-1v1-nldo-s3 { - regulator-max-microvolt = <0x10c8e0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x10c8e0>; - regulator-name = "vcc_1v1_nldo_s3"; - compatible = "regulator-fixed"; - phandle = <0x15c>; - vin-supply = <0x78>; - }; - - power-management@fd8d8000 { - compatible = "rockchip,rk3588-pmu\0syscon\0simple-mfd"; - reg = <0x00 0xfd8d8000 0x00 0x400>; - phandle = <0xd9>; - - power-controller { - #address-cells = <0x01>; - #size-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-power-controller"; - status = "okay"; - phandle = <0x60>; - - power-domain@37 { - clocks = <0x02 0x199 0x02 0x140>; - reg = <0x25>; - pm_qos = <0xaf>; - }; - - power-domain@27 { - #address-cells = <0x01>; - clocks = <0x02 0x1e1 0x02 0x1e2 0x02 0x1df 0x02 0x1de 0x02 0x1e5 0x02 0x1e4>; - #size-cells = <0x00>; - reg = <0x1b>; - pm_qos = <0xa2 0xa3 0xa4 0xa5>; - - power-domain@29 { - clocks = <0x02 0x1d6 0x02 0x1d5 0x02 0x1d9 0x02 0x1d8 0x02 0x1e2>; - reg = <0x1d>; - pm_qos = <0xa8 0xa9>; - }; - - power-domain@28 { - clocks = <0x02 0x121 0x02 0x120 0x02 0x1e1 0x02 0x1e2>; - reg = <0x1c>; - pm_qos = <0xa6 0xa7>; - }; - }; - - power-domain@33 { - clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; - reg = <0x21>; - }; - - power-domain@13 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x0d>; - - power-domain@15 { - clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc 0x02 0x195>; - reg = <0x0f>; - pm_qos = <0x8c>; - }; - - power-domain@16 { - #address-cells = <0x01>; - clocks = <0x02 0x1c4 0x02 0x1c5>; - #size-cells = <0x00>; - reg = <0x10>; - pm_qos = <0x8d 0x8e 0x8f>; - - power-domain@17 { - clocks = <0x02 0x1c9 0x02 0x1c4 0x02 0x1c5 0x02 0x1ca>; - reg = <0x11>; - pm_qos = <0x90 0x91 0x92>; - }; - }; - - power-domain@14 { - clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190 0x02 0x18e>; - reg = <0x0e>; - pm_qos = <0x8b>; - }; - }; - - power-domain@31 { - clocks = <0x02 0x166 0x02 0x1a1 0x02 0x1a4 0x02 0x19d 0x02 0x19e 0x02 0x19f 0x02 0x1a0>; - reg = <0x1f>; - pm_qos = <0xab 0xac 0xad 0xae>; - }; - - power-domain@21 { - #address-cells = <0x01>; - clocks = <0x02 0x1be 0x02 0x1bd 0x02 0x1bc 0x02 0x1bf 0x02 0x1aa 0x02 0x1a9 0x02 0x1ac 0x02 0x1ad 0x02 0x1ae 0x02 0x1af 0x02 0x1b0 0x02 0x1b1 0x02 0x1b2 0x02 0x1b3 0x02 0x1b4 0x02 0x1b5 0x02 0x1b7 0x02 0x1b6>; - #size-cells = <0x00>; - reg = <0x15>; - pm_qos = <0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a>; - - power-domain@15 { - clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc>; - reg = <0x0f>; - pm_qos = <0x8c>; - }; - - power-domain@23 { - clocks = <0x02 0x4b 0x02 0x49 0x02 0x1be>; - reg = <0x17>; - pm_qos = <0x9b>; - }; - - power-domain@14 { - clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190>; - reg = <0x0e>; - pm_qos = <0x8b>; - }; - - power-domain@22 { - clocks = <0x02 0x1ba 0x02 0x1b9>; - reg = <0x16>; - pm_qos = <0x9c>; - }; - }; - - power-domain@38 { - clocks = <0x02 0x3c 0x02 0x3d>; - reg = <0x26>; - }; - - power-domain@8 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x08>; - - power-domain@9 { - #address-cells = <0x01>; - clocks = <0x02 0x12f 0x02 0x131 0x02 0x130 0x02 0x126>; - #size-cells = <0x00>; - reg = <0x09>; - pm_qos = <0x82 0x83 0x84>; - - power-domain@11 { - clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; - reg = <0x0b>; - pm_qos = <0x86>; - }; - - power-domain@10 { - clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; - reg = <0x0a>; - pm_qos = <0x85>; - }; - }; - }; - - power-domain@26 { - clocks = <0x02 0x22e 0x02 0x22f 0x02 0x22d 0x02 0x218 0x02 0x217 0x02 0x22b 0x02 0x264>; - reg = <0x1a>; - pm_qos = <0xa0 0xa1>; - }; - - power-domain@34 { - clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; - reg = <0x22>; - }; - - power-domain@24 { - #address-cells = <0x01>; - clocks = <0x02 0x26e 0x02 0x26d 0x02 0x270>; - #size-cells = <0x00>; - reg = <0x18>; - pm_qos = <0x9d 0x9e>; - - power-domain@25 { - clocks = <0x02 0x1f6 0x02 0x1f7 0x02 0x1f5 0x02 0x1f3 0x02 0x1ee 0x02 0x1ed 0x02 0x26d>; - reg = <0x19>; - pm_qos = <0x9f>; - }; - }; - - power-domain@12 { - clocks = <0x02 0x114 0x02 0x115 0x02 0x116>; - reg = <0x0c>; - pm_qos = <0x87 0x88 0x89 0x8a>; - }; - - power-domain@40 { - reg = <0x28>; - pm_qos = <0xb0>; - }; - - power-domain@30 { - clocks = <0x02 0x189 0x02 0x18a>; - reg = <0x1e>; - pm_qos = <0xaa>; - }; - }; - }; - - csi2-dphy3 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x212>; - }; - - qos@fdf3e000 { - compatible = "syscon"; - reg = <0x00 0xfdf3e000 0x00 0x20>; - phandle = <0xac>; - }; - - pwm@fd8b0030 { - pinctrl-names = "active"; - pinctrl-0 = <0x81>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x158 0x04 0x00 0x159 0x04>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfd8b0030 0x00 0x10>; - phandle = <0x264>; - }; - - rkcif-mipi-lvds2-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x55>; - phandle = <0x234>; - }; - - syscon@fd5cc000 { - compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; - reg = <0x00 0xfd5cc000 0x00 0x4000>; - phandle = <0x1c9>; - }; - - vdpu@fdb50400 { - power-domains = <0x60 0x15>; - iommus = <0xb7>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1c0>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2c8 0x02 0x2c9>; - interrupts = <0x00 0x77 0x04>; - clocks = <0x02 0x1c0 0x02 0x1c1>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x00>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-decoder-v2"; - rockchip,resetgroup-node = <0x00>; - status = "okay"; - interrupt-names = "irq_vdpu"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdb50400 0x00 0x400>; - phandle = <0x267>; - reset-names = "shared_video_a\0shared_video_h"; - }; - - qos@fdf60200 { - compatible = "syscon"; - reg = <0x00 0xfdf60200 0x00 0x20>; - phandle = <0x8e>; - }; - - pwm@febe0030 { - pinctrl-names = "active"; - pinctrl-0 = <0x170>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15c 0x04 0x00 0x15d 0x04>; - clocks = <0x02 0x57 0x02 0x56>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebe0030 0x00 0x10>; - phandle = <0x2d8>; - }; - - display-subsystem { - memory-region-names = "drm-logo"; - clock-names = "hdmi0_phy_pll\0hdmi1_phy_pll"; - ports = <0x34>; - memory-region = <0x37>; - clocks = <0x35 0x36>; - compatible = "rockchip,display-subsystem"; - phandle = <0x215>; - - route { - - route-edp1 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - logo,mode = "center"; - status = "disabled"; - phandle = <0x21a>; - }; - - route-hdmi1 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3f>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x21e>; - }; - - route-dp1 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3e>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x21d>; - }; - - route-dsi1 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3a>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x218>; - }; - - route-edp0 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3b>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x219>; - }; - - route-hdmi0 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3c>; - logo,mode = "center"; - status = "okay"; - phandle = <0x21b>; - }; - - route-dp0 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x38>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x216>; - }; - - route-rgb { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3d>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x21c>; - }; - - route-dsi0 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x39>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x217>; - }; - }; - }; - - serial@febc0000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x168>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x154 0x04>; - clocks = <0x02 0xd7 0x02 0xb3>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfebc0000 0x00 0x100>; - phandle = <0x2d1>; - dmas = <0xf2 0x0b 0xf2 0x0c>; - reg-shift = <0x02>; - }; - - adc-keys { - io-channels = <0x1d9 0x01>; - poll-interval = <0x64>; - keyup-threshold-microvolt = <0x1b7740>; - compatible = "adc-keys"; - status = "okay"; - phandle = <0x49e>; - io-channel-names = "buttons"; - - recovery-key { - press-threshold-microvolt = <0x4268>; - label = "F12"; - linux,code = <0x58>; - }; - }; - - pvtm@fdaf0000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-npu-pvtm"; - reg = <0x00 0xfdaf0000 0x00 0x100>; - - pvtm@3 { - clock-names = "clk\0pclk"; - resets = <0x02 0x1de 0x02 0x1dc>; - clocks = <0x02 0x12b 0x02 0x129>; - reg = <0x03>; - reset-names = "rts\0rst-p"; - }; - }; - - codec-digital@fe500000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default"; - pinctrl-0 = <0x144>; - clock-names = "dac\0pclk"; - resets = <0x02 0x84>; - clocks = <0x02 0x29 0x02 0x2f>; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-codec-digital\0rockchip,codec-digital-v1"; - status = "disabled"; - rockchip,grf = <0xc8>; - reg = <0x00 0xfe500000 0x00 0x1000>; - phandle = <0x29e>; - reset-names = "reset"; - rockchip,pwm-output-mode; - }; - - pwm@fd8b0020 { - pinctrl-names = "active"; - pinctrl-0 = <0x80>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x158 0x04>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfd8b0020 0x00 0x10>; - phandle = <0x263>; - }; - - rkcif-mipi-lvds2 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "okay"; - phandle = <0x55>; - - port { - - endpoint { - remote-endpoint = <0x54>; - phandle = <0x4e>; - }; - }; - }; - - pwm@febe0020 { - pinctrl-names = "active"; - pinctrl-0 = <0x16f>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15c 0x04>; - clocks = <0x02 0x57 0x02 0x56>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebe0020 0x00 0x10>; - phandle = <0x2d7>; - }; - - vcc-fan-pwr-en-regulator { - regulator-boot-on; - gpio = <0x182 0x0b 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_fan_pwr_en"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x4a4>; - }; - - iommu@fdba0800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x79 0x04>; - clocks = <0x02 0x1ac 0x02 0x1ad>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpege0_mmu"; - reg = <0x00 0xfdba0800 0x00 0x40>; - phandle = <0xbc>; - }; - - rkcif-mipi-lvds1-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x53>; - phandle = <0x231>; - }; - - arm-pmu { - interrupt-affinity = <0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d>; - interrupts = <0x01 0x07 0x08>; - compatible = "arm,armv8-pmuv3"; - phandle = <0x20c>; - }; - - pvtm@fda40000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-bigcore0-pvtm"; - reg = <0x00 0xfda40000 0x00 0x100>; - - pvtm@0 { - clock-names = "clk\0pclk"; - clocks = <0x02 0x2c6 0x02 0x15>; - reg = <0x00>; - }; - }; - - pwm@fd8b0010 { - pinctrl-names = "active"; - pinctrl-0 = <0x7f>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x158 0x04>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfd8b0010 0x00 0x10>; - phandle = <0x262>; - }; - - i2s@fddc0000 { - power-domains = <0x60 0x19>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x1f9>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x38d>; - interrupts = <0x00 0xb8 0x04>; - clocks = <0x02 0x1fb 0x02 0x1fb 0x02 0x1f0>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - rockchip,playback-only; - status = "disabled"; - reg = <0x00 0xfddc0000 0x00 0x1000>; - phandle = <0x27d>; - dmas = <0xf2 0x00>; - reset-names = "tx-m"; - }; - - qos@fdf61400 { - compatible = "syscon"; - reg = <0x00 0xfdf61400 0x00 0x20>; - phandle = <0x92>; - }; - - syscon@fd5d4000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5d4000 0x00 0x4000>; - phandle = <0x1c8>; - - usb2-phy@4000 { - clock-output-names = "usb480m_phy1"; - clock-names = "phyclk"; - resets = <0x02 0xc0048 0x02 0x489>; - interrupts = <0x00 0x18a 0x04>; - clocks = <0x02 0x2b5>; - #clock-cells = <0x00>; - rockchip,usbctrl-grf = <0x74>; - compatible = "rockchip,rk3588-usb2phy"; - status = "okay"; - reg = <0x4000 0x10>; - phandle = <0x1ca>; - reset-names = "phy\0apb"; - - otg-port { - phy-supply = <0x75>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x1a3>; - }; - }; - }; - - rkisp0-vir1 { - rockchip,hw = <0x58>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x23c>; - }; - - pwm@febe0010 { - pinctrl-names = "active"; - pinctrl-0 = <0x16e>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15c 0x04>; - clocks = <0x02 0x57 0x02 0x56>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebe0010 0x00 0x10>; - phandle = <0x2d6>; - }; - - thermal-zones { - phandle = <0x248>; - - bigcore1-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x02>; - phandle = <0x24d>; - }; - - soc-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x00>; - sustainable-power = <0x834>; - phandle = <0x249>; - - trips { - - trip-point-0 { - temperature = <0x124f8>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x24a>; - }; - - trip-point-1 { - temperature = <0x14c08>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x5e>; - }; - - soc-crit { - temperature = <0x1c138>; - hysteresis = <0x7d0>; - type = "critical"; - phandle = <0x24b>; - }; - }; - - cooling-maps { - - map2 { - trip = <0x5e>; - cooling-device = <0x0c 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; - - map0 { - trip = <0x5e>; - cooling-device = <0x06 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; - - map3 { - trip = <0x5e>; - cooling-device = <0x5f 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; - - map1 { - trip = <0x5e>; - cooling-device = <0x0a 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; - }; - }; - - npu-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x06>; - phandle = <0x251>; - }; - - center-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x04>; - phandle = <0x24f>; - }; - - gpu-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x05>; - phandle = <0x250>; - }; - - littlecore-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x03>; - phandle = <0x24e>; - }; - - bigcore0-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x01>; - phandle = <0x24c>; - }; - }; - - iommu@fdbdf000 { - power-domains = <0x60 0x10>; - rockchip,shootdown-entire; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x63 0x04 0x00 0x64 0x04>; - clocks = <0x02 0x1c5 0x02 0x1c4>; - rockchip,enable-cmd-retry; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "irq_rkvenc0_mmu0\0irq_rkvenc0_mmu1"; - reg = <0x00 0xfdbdf000 0x00 0x40 0x00 0xfdbdf040 0x00 0x40>; - phandle = <0xc2>; - }; - - serial@feb50000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x161>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14d 0x04>; - clocks = <0x02 0xbb 0x02 0xac>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeb50000 0x00 0x100>; - phandle = <0x2ca>; - dmas = <0x7c 0x0a 0x7c 0x0b>; - reg-shift = <0x02>; - }; - - iommu@fdcd0f00 { - power-domains = <0x60 0x1d>; - clock-names = "aclk\0iface\0pclk"; - interrupts = <0x00 0x8c 0x04>; - clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "disabled"; - interrupt-names = "fec0_mmu"; - reg = <0x00 0xfdcd0f00 0x00 0x100>; - phandle = <0xd2>; - }; - - vcc5v0-host { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - gpio = <0x182 0x02 0x00>; - regulator-always-on; - enable-active-high; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_host"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x75>; - vin-supply = <0x1dd>; - }; - - qos@fdf66a00 { - compatible = "syscon"; - reg = <0x00 0xfdf66a00 0x00 0x20>; - phandle = <0x98>; - }; - - phy@fed90000 { - clock-names = "refclk\0immortal\0pclk\0utmi"; - resets = <0x02 0x2f 0x02 0x30 0x02 0x31 0x02 0x32 0x02 0x484>; - clocks = <0x02 0x2b6 0x02 0x280 0x02 0x26a 0x1ca>; - compatible = "rockchip,rk3588-usbdp-phy"; - status = "okay"; - rockchip,dp-lane-mux = <0x02 0x03>; - reg = <0x00 0xfed90000 0x00 0x10000>; - phandle = <0x48b>; - rockchip,usb-grf = <0x74>; - reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; - rockchip,u2phy-grf = <0x1c8>; - rockchip,usbdpphy-grf = <0x1c9>; - rockchip,vo-grf = <0xf5>; - - dp-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x1a5>; - }; - - u3-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x1a4>; - }; - }; - - jpege-core@fdba0000 { - power-domains = <0x60 0x15>; - iommus = <0xbc>; - rockchip,ccu = <0xbd>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1ac>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2ca 0x02 0x2cb>; - interrupts = <0x00 0x7a 0x04>; - clocks = <0x02 0x1ac 0x02 0x1ad>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-jpege-core"; - status = "okay"; - interrupt-names = "irq_jpege0"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdba0000 0x00 0x400>; - phandle = <0x26d>; - reset-names = "video_a\0video_h"; - }; - - vcc5v0-sys { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_sys"; - compatible = "regulator-fixed"; - phandle = <0x78>; - vin-supply = <0x1cd>; - }; - - pwm@fd8b0000 { - pinctrl-names = "active"; - pinctrl-0 = <0x7e>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x158 0x04>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfd8b0000 0x00 0x10>; - phandle = <0x261>; - }; - - vop@fdd90000 { - power-domains = <0x60 0x18>; - iommus = <0xd6>; - rockchip,vop-grf = <0xd7>; - clock-names = "aclk_vop\0hclk_vop\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0pclk_vop\0dclk_src_vp0\0dclk_src_vp1\0dclk_src_vp2"; - reg-names = "regs\0gamma_lut"; - assigned-clocks = <0x02 0x270>; - assigned-clock-rates = <0x2cb41780>; - resets = <0x02 0x349 0x02 0x348 0x02 0x34d 0x02 0x350 0x02 0x351 0x02 0x352>; - interrupts = <0x00 0x9c 0x04>; - clocks = <0x02 0x270 0x02 0x26f 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x02 0x26e 0x02 0x271 0x02 0x272 0x02 0x273>; - compatible = "rockchip,rk3588-vop"; - rockchip,pmu = <0xd9>; - status = "okay"; - rockchip,grf = <0xc8>; - reg = <0x00 0xfdd90000 0x00 0x4200 0x00 0xfdd95000 0x00 0x1000>; - phandle = <0x278>; - rockchip,vo1-grf = <0xd8>; - reset-names = "axi\0ahb\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x34>; - - port@0 { - rockchip,primary-plane = <0x02>; - rockchip,plane-mask = <0x05>; - #address-cells = <0x01>; - assigned-clocks = <0x02 0x270>; - assigned-clock-rates = <0x2faf0800>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x279>; - - endpoint@5 { - remote-endpoint = <0xdf>; - reg = <0x05>; - phandle = <0x1ad>; - }; - - endpoint@3 { - remote-endpoint = <0xdd>; - reg = <0x03>; - phandle = <0x1a6>; - }; - - endpoint@1 { - remote-endpoint = <0xdb>; - reg = <0x01>; - phandle = <0x102>; - }; - - endpoint@4 { - remote-endpoint = <0xde>; - reg = <0x04>; - phandle = <0x1b0>; - }; - - endpoint@2 { - remote-endpoint = <0xdc>; - reg = <0x02>; - phandle = <0x3c>; - }; - - endpoint@0 { - remote-endpoint = <0xda>; - reg = <0x00>; - phandle = <0xf7>; - }; - }; - - port@3 { - rockchip,primary-plane = <0x09>; - rockchip,plane-mask = <0x280>; - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x03>; - phandle = <0x27c>; - - endpoint@1 { - remote-endpoint = <0xef>; - reg = <0x01>; - phandle = <0x3a>; - }; - - endpoint@2 { - remote-endpoint = <0xf0>; - reg = <0x02>; - phandle = <0x3d>; - }; - - endpoint@0 { - remote-endpoint = <0xee>; - reg = <0x00>; - phandle = <0x39>; - }; - }; - - port@1 { - rockchip,primary-plane = <0x03>; - rockchip,plane-mask = <0x0a>; - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x01>; - phandle = <0x27a>; - - endpoint@5 { - remote-endpoint = <0xe5>; - reg = <0x05>; - phandle = <0x3f>; - }; - - endpoint@3 { - remote-endpoint = <0xe3>; - reg = <0x03>; - phandle = <0x3e>; - }; - - endpoint@1 { - remote-endpoint = <0xe1>; - reg = <0x01>; - phandle = <0x103>; - }; - - endpoint@4 { - remote-endpoint = <0xe4>; - reg = <0x04>; - phandle = <0x1b1>; - }; - - endpoint@2 { - remote-endpoint = <0xe2>; - reg = <0x02>; - phandle = <0xff>; - }; - - endpoint@0 { - remote-endpoint = <0xe0>; - reg = <0x00>; - phandle = <0x38>; - }; - }; - - port@2 { - rockchip,primary-plane = <0x08>; - rockchip,plane-mask = <0x140>; - #address-cells = <0x01>; - assigned-clocks = <0x02 0x273>; - assigned-clock-parents = <0x02 0x04>; - #size-cells = <0x00>; - reg = <0x02>; - phandle = <0x27b>; - - endpoint@5 { - remote-endpoint = <0xeb>; - reg = <0x05>; - phandle = <0x1a7>; - }; - - endpoint@3 { - remote-endpoint = <0xe9>; - reg = <0x03>; - phandle = <0xf3>; - }; - - endpoint@1 { - remote-endpoint = <0xe7>; - reg = <0x01>; - phandle = <0x3b>; - }; - - endpoint@6 { - remote-endpoint = <0xec>; - reg = <0x06>; - phandle = <0x1b2>; - }; - - endpoint@4 { - remote-endpoint = <0xea>; - reg = <0x04>; - phandle = <0xf4>; - }; - - endpoint@2 { - remote-endpoint = <0xe8>; - reg = <0x02>; - phandle = <0x100>; - }; - - endpoint@0 { - remote-endpoint = <0xe6>; - reg = <0x00>; - phandle = <0xf8>; - }; - - endpoint@7 { - remote-endpoint = <0xed>; - reg = <0x07>; - phandle = <0x1ae>; - }; - }; - }; - }; - - csi2-dphy1 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x210>; - }; - - pwm@febe0000 { - pinctrl-names = "active"; - pinctrl-0 = <0x16d>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15c 0x04>; - clocks = <0x02 0x57 0x02 0x56>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebe0000 0x00 0x10>; - phandle = <0x2d5>; - }; - - clocks { - #address-cells = <0x02>; - #size-cells = <0x02>; - compatible = "simple-bus"; - ranges; - - hclk_nvm@fd7c087c { - clock-names = "link"; - clocks = <0x02 0x141>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c087c 0x00 0x10>; - phandle = <0x03>; - }; - - mclkin-i2s0 { - clock-output-names = "i2s0_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x204>; - }; - - hclk_rkvenc1_pre@fd7c08c0 { - clock-names = "link"; - clocks = <0x02 0x1c4>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08c0 0x00 0x10>; - phandle = <0x1fe>; - }; - - mclkout-i2s1@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s1_mclkout_to_io"; - clocks = <0x02 0x291>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x208>; - rockchip,bit-shift = <0x01>; - }; - - mclkout-i2s1@fd58a000 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s1m1_mclkout_to_io"; - clocks = <0x02 0x291>; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58a000 0x00 0x04>; - phandle = <0x209>; - rockchip,bit-shift = <0x06>; - }; - - aclk_hdcp0_pre@fd7c08dc { - clock-names = "link"; - clocks = <0x02 0x26c>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08dc 0x00 0x10>; - phandle = <0x1ff>; - }; - - xin32k { - clock-output-names = "xin32k"; - #clock-cells = <0x00>; - clock-frequency = <0x8000>; - compatible = "fixed-clock"; - phandle = <0x1f2>; - }; - - aclk_usb@fd7c08a8 { - clock-names = "link"; - clocks = <0x02 0x263>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a8 0x00 0x10>; - phandle = <0x6a>; - }; - - hclk_usb@fd7c08a8 { - clock-names = "link"; - clocks = <0x02 0x264>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a8 0x00 0x10>; - phandle = <0x1f5>; - }; - - hclk_vo0@fd7c08dc { - clock-names = "link"; - clocks = <0x02 0x26d>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08dc 0x00 0x10>; - phandle = <0x04>; - }; - - pclk_av1_pre@fd7c0910 { - clock-names = "link"; - clocks = <0x02 0x1be>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0910 0x00 0x10>; - phandle = <0x201>; - }; - - mclkout-i2s2@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s2_mclkout_to_io"; - clocks = <0x02 0x28>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x20a>; - rockchip,bit-shift = <0x02>; - }; - - aclk_vdpu_low_pre@fd7c08b0 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08b0 0x00 0x10>; - phandle = <0x1f4>; - }; - - mclkin-i2s3 { - clock-output-names = "i2s3_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x207>; - }; - - spll { - clock-output-names = "spll"; - #clock-cells = <0x00>; - clock-frequency = <0x29d7ab80>; - compatible = "fixed-clock"; - phandle = <0x1f1>; - }; - - xin24m { - clock-output-names = "xin24m"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - compatible = "fixed-clock"; - phandle = <0x1f3>; - }; - - aclk_av1_pre@fd7c0910 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0910 0x00 0x10>; - phandle = <0x202>; - }; - - pclk_vo0_grf@fd7c08dc { - clock-names = "link"; - clocks = <0x04>; - #clock-cells = <0x00>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08dc 0x00 0x04>; - phandle = <0x72>; - }; - - aclk_jpeg_decoder_pre@fd7c08b0 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08b0 0x00 0x10>; - phandle = <0x1fc>; - }; - - aclk_hdcp1_pre@fd7c08ec { - clock-names = "link"; - clocks = <0x02 0x263>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08ec 0x00 0x10>; - phandle = <0x200>; - }; - - mclkin-i2s1 { - clock-output-names = "i2s1_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x205>; - }; - - hclk_vo1@fd7c08ec { - clock-names = "link"; - clocks = <0x02 0x264>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08ec 0x00 0x10>; - phandle = <0x05>; - }; - - mclkout-i2s3@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s3_mclkout_to_io"; - clocks = <0x02 0x2e>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x20b>; - rockchip,bit-shift = <0x07>; - }; - - aclk_rkvdec0_pre@fd7c08a0 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a0 0x00 0x10>; - phandle = <0x1f8>; - }; - - aclk_isp1_pre@fd7c0868 { - clock-names = "link"; - clocks = <0x02 0x1e0>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0868 0x00 0x10>; - phandle = <0x1f7>; - }; - - pclk_vo1_grf@fd7c08ec { - clock-names = "link"; - clocks = <0x05>; - #clock-cells = <0x00>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08ec 0x00 0x04>; - phandle = <0x73>; - }; - - aclk_rkvdec1_pre@fd7c08a4 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a4 0x00 0x10>; - phandle = <0x1fa>; - }; - - hclk_rkvdec0_pre@fd7c08a0 { - clock-names = "link"; - clocks = <0x02 0x1be>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a0 0x00 0x10>; - phandle = <0x1f9>; - }; - - hclk_sdio_pre@fd7c092c { - clock-names = "link"; - clocks = <0x03>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c092c 0x00 0x10>; - phandle = <0x203>; - }; - - hclk_rkvdec1_pre@fd7c08a4 { - clock-names = "link"; - clocks = <0x02 0x1be>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a4 0x00 0x10>; - phandle = <0x1fb>; - }; - - hclk_isp1_pre@fd7c0868 { - clock-names = "link"; - clocks = <0x02 0x1e1>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0868 0x00 0x10>; - phandle = <0x1f6>; - }; - - mclkout-i2s0@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s0_mclkout_to_io"; - clocks = <0x02 0x39>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x179>; - rockchip,bit-shift = <0x00>; - }; - - mclkin-i2s2 { - clock-output-names = "i2s2_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x206>; - }; - - aclk_rkvenc1_pre@fd7c08c0 { - clock-names = "link"; - clocks = <0x02 0x1c5>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08c0 0x00 0x10>; - phandle = <0x1fd>; - }; - }; - - usb@fc8c0000 { - power-domains = <0x60 0x1f>; - phy-names = "usb2-phy"; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - interrupts = <0x00 0xdb 0x04>; - clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; - compatible = "rockchip,rk3588-ohci\0generic-ohci"; - status = "okay"; - phys = <0x6f>; - reg = <0x00 0xfc8c0000 0x00 0x40000>; - phandle = <0x6e>; - }; - - qos@fdf40000 { - compatible = "syscon"; - reg = <0x00 0xfdf40000 0x00 0x20>; - phandle = <0xa8>; - }; - - mipi0-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x224>; - }; - - cluster1-opp-table { - rockchip,pvtm-offset = <0x18>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,pvtm-hw = <0x06>; - nvmem-cells = <0x24 0x25 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; - rockchip,pvtm-thermal-zone = "soc-thermal"; - rockchip,pvtm-low-len-sel = <0x03>; - rockchip,high-temp-max-freq = <0x21b100>; - opp-shared; - rockchip,reboot-freq = <0x1b7740>; - rockchip,pvtm-freq = <0x188940>; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0x26>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; - phandle = <0x16>; - rockchip,idle-threshold-freq = <0x21b100>; - rockchip,pvtm-temp-prop = <0x10e 0x10e>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0xf6180>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-j-m-2016000000 { - opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - opp-hz = <0x00 0x7829b800>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - }; - - opp-1200000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1416000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x54667200>; - opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - opp-supported-hw = <0x06 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - }; - - opp-1008000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2256000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8677d400>; - opp-supported-hw = <0xf9 0x13>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1200000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1008000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-816000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2400000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8f0d1800>; - opp-supported-hw = <0xf9 0x80>; - clock-latency-ns = <0x9c40>; - }; - - opp-1800000000 { - opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2208000000 { - opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; - opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; - opp-microvolt-L2 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; - opp-hz = <0x00 0x839b6800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L3 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; - }; - - opp-1608000000 { - opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-408000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1800000000 { - opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - }; - - opp-2352000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8c30ac00>; - opp-supported-hw = <0xf9 0x48>; - clock-latency-ns = <0x9c40>; - }; - - opp-816000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1608000000 { - opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; - - opp-600000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2016000000 { - opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; - opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; - opp-hz = <0x00 0x7829b800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; - opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - }; - - opp-1416000000 { - opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-hz = <0x00 0x54667200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; - opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-408000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0xf9 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - }; - - opp-2304000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x89544000>; - opp-supported-hw = <0xf9 0x24>; - clock-latency-ns = <0x9c40>; - }; - }; - - mmc@fe2d0000 { - power-domains = <0x60 0x25>; - fifo-depth = <0x100>; - pinctrl-names = "default"; - pinctrl-0 = <0x119>; - clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; - interrupts = <0x00 0xcc 0x04>; - clocks = <0x02 0x199 0x02 0x19a 0x02 0x2c0 0x02 0x2c1>; - compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; - status = "disabled"; - reg = <0x00 0xfe2d0000 0x00 0x4000>; - phandle = <0x294>; - max-frequency = <0xbebc200>; - }; - - rkcif-mipi-lvds-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x52>; - phandle = <0x22e>; - }; - - serial@feb90000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x165>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x151 0x04>; - clocks = <0x02 0xcb 0x02 0xb0>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "okay"; - reg = <0x00 0xfeb90000 0x00 0x100>; - phandle = <0x2ce>; - dmas = <0xf1 0x0d 0xf1 0x0e>; - reg-shift = <0x02>; - }; - - i2s@fddf8000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x239>; - assigned-clock-parents = <0x02 0x05>; - rockchip,capture-only; - resets = <0x02 0x3c3>; - interrupts = <0x00 0xbb 0x04>; - clocks = <0x02 0x23c 0x02 0x23c 0x02 0x238>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - status = "okay"; - reg = <0x00 0xfddf8000 0x00 0x1000>; - phandle = <0x1ec>; - dmas = <0xf2 0x15>; - reset-names = "rx-m"; - }; - - phy@fee20000 { - rockchip,pipe-grf = <0x76>; - clock-names = "refclk\0apbclk\0phpclk"; - assigned-clocks = <0x02 0x2bf>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x02 0x20007 0x02 0x4d8>; - clocks = <0x02 0x2bf 0x02 0x187 0x02 0x166>; - #phy-cells = <0x01>; - compatible = "rockchip,rk3588-naneng-combphy"; - status = "disabled"; - rockchip,pipe-phy-grf = <0x195>; - reg = <0x00 0xfee20000 0x00 0x100>; - phandle = <0x70>; - reset-names = "combphy-apb\0combphy"; - rockchip,pcie1ln-sel-bits = <0x100 0x01 0x01 0x00>; - }; - - csi2-dphy0-hw@fedc0000 { - clock-names = "pclk"; - resets = <0x02 0x17 0x02 0x16>; - clocks = <0x02 0x10c>; - compatible = "rockchip,rk3588-csi2-dphy-hw"; - status = "okay"; - rockchip,grf = <0x192>; - reg = <0x00 0xfedc0000 0x00 0x8000>; - phandle = <0x2d>; - reset-names = "srst_csiphy0\0srst_p_csiphy0"; - rockchip,sys_grf = <0xc8>; - }; - - can@fea70000 { - pinctrl-names = "default"; - pinctrl-0 = <0x147>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x02 0xbd 0x02 0xbc>; - interrupts = <0x00 0x157 0x04>; - clocks = <0x02 0x74 0x02 0x73>; - compatible = "rockchip,can-2.0"; - status = "disabled"; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - reg = <0x00 0xfea70000 0x00 0x1000>; - phandle = <0x2a2>; - reset-names = "can\0can-apb"; - }; - - mailbox@fec60000 { - clock-names = "pclk_mailbox"; - interrupts = <0x00 0x3d 0x04 0x00 0x3e 0x04 0x00 0x3f 0x04 0x00 0x40 0x04>; - clocks = <0x02 0x4c>; - #mbox-cells = <0x01>; - compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; - status = "disabled"; - reg = <0x00 0xfec60000 0x00 0x200>; - phandle = <0x2dd>; - }; - - usbdrd3_1 { - #address-cells = <0x02>; - clock-names = "ref\0suspend\0bus"; - clocks = <0x02 0x1a6 0x02 0x1a5 0x02 0x1a4>; - #size-cells = <0x02>; - compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; - ranges; - status = "okay"; - phandle = <0x47a>; - - usb@fc400000 { - power-domains = <0x60 0x1f>; - snps,dis-u1-entry-quirk; - snps,dis_enblslpm_quirk; - phy-names = "usb2-phy\0usb3-phy"; - snps,dis-u2-freeclk-exists-quirk; - phy_type = "utmi_wide"; - resets = <0x02 0x2a7>; - interrupts = <0x00 0xdd 0x04>; - snps,dis-u2-entry-quirk; - compatible = "snps,dwc3"; - snps,parkmode-disable-hs-quirk; - snps,dis-del-phy-power-chg-quirk; - status = "okay"; - snps,parkmode-disable-ss-quirk; - phys = <0x1a3 0x1a4>; - reg = <0x00 0xfc400000 0x00 0x400000>; - phandle = <0x47b>; - dr_mode = "host"; - reset-names = "usb3-otg"; - snps,dis-tx-ipgap-linecheck-quirk; - }; - }; - - sata@fe210000 { - phy-names = "sata-phy"; - clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; - interrupts = <0x00 0x111 0x04>; - clocks = <0x02 0x171 0x02 0x16e 0x02 0x174 0x02 0x163 0x02 0x17e>; - compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; - status = "okay"; - interrupt-names = "hostc"; - phys = <0x108 0x01>; - reg = <0x00 0xfe210000 0x00 0x1000>; - phandle = <0x290>; - ports-implemented = <0x01>; - }; - - leds { - compatible = "gpio-leds"; - status = "okay"; - phandle = <0x497>; - - user { - linux,default-trigger = "ir-user-click"; - label = ":user"; - default-state = "off"; - phandle = <0x499>; - gpios = <0x182 0x03 0x00>; - }; - - power { - linux,default-trigger = "ir-power-click"; - label = ":power"; - default-state = "on"; - status = "disabled"; - phandle = <0x498>; - gpios = <0x7b 0x15 0x00>; - }; - }; - - rkcif-mipi-lvds5-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a2>; - phandle = <0x479>; - }; - - qos@fdf80000 { - compatible = "syscon"; - reg = <0x00 0xfdf80000 0x00 0x20>; - phandle = <0x9f>; - }; - - spdif-tx@fdde0000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x254>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc4 0x04>; - clocks = <0x02 0x257 0x02 0x253>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfdde0000 0x00 0x1000>; - phandle = <0x27e>; - dmas = <0xf1 0x07>; - }; - - qos@fdf35000 { - compatible = "syscon"; - reg = <0x00 0xfdf35000 0x00 0x20>; - phandle = <0x87>; - }; - - psci { - method = "smc"; - compatible = "arm,psci-1.0"; - }; - - rkcif-mipi-lvds { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x52>; - }; - - rga@fdb80000 { - power-domains = <0x60 0x15>; - clock-names = "aclk_rga2\0hclk_rga2\0clk_rga2"; - interrupts = <0x00 0x74 0x04>; - clocks = <0x02 0x1b7 0x02 0x1b6 0x02 0x1b8>; - compatible = "rockchip,rga2_core0"; - status = "okay"; - interrupt-names = "rga2_irq"; - reg = <0x00 0xfdb80000 0x00 0x1000>; - phandle = <0x26b>; - }; - - qos@fdf66800 { - compatible = "syscon"; - reg = <0x00 0xfdf66800 0x00 0x20>; - phandle = <0x97>; - }; - - spi@feb10000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x02>; - pinctrl-0 = <0x151 0x152 0x153>; - clock-names = "spiclk\0apb_pclk"; - interrupts = <0x00 0x147 0x04>; - clocks = <0x02 0xa4 0x02 0x9f>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "disabled"; - reg = <0x00 0xfeb10000 0x00 0x1000>; - phandle = <0x2ac>; - dmas = <0x7c 0x10 0x7c 0x11>; - }; - - rkcif-mipi-lvds4-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a1>; - phandle = <0x472>; - }; - - hdmi@fdea0000 { - power-domains = <0x60 0x1a>; - reg-io-width = <0x04>; - pinctrl-names = "default"; - phy-names = "hdmi"; - pinctrl-0 = <0x1a8 0x1a9 0x1aa 0x1ab>; - clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; - resets = <0x02 0x3d7 0x02 0x49d>; - interrupts = <0x00 0xad 0x04 0x00 0xae 0x04 0x00 0xaf 0x04 0x00 0xb0 0x04 0x00 0x169 0x04>; - clocks = <0x02 0x224 0x02 0x266 0x02 0x225 0x02 0x226 0x02 0x24c 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x36>; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-dw-hdmi"; - status = "disabled"; - rockchip,grf = <0xc8>; - phys = <0x1ac>; - reg = <0x00 0xfdea0000 0x00 0x10000 0x00 0xfdeb0000 0x00 0x10000>; - phandle = <0x1e1>; - reset-names = "ref\0hdp"; - rockchip,vo1_grf = <0xd8>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x482>; - - endpoint@1 { - remote-endpoint = <0x3f>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe5>; - }; - - endpoint@2 { - remote-endpoint = <0x1ae>; - status = "disabled"; - reg = <0x02>; - phandle = <0xed>; - }; - - endpoint@0 { - remote-endpoint = <0x1ad>; - status = "disabled"; - reg = <0x00>; - phandle = <0xdf>; - }; - }; - }; - }; - - pcie@fe180000 { - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x30 0x3f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x08>; - resets = <0x02 0x210 0x02 0x21f>; - interrupts = <0x00 0xf8 0x04 0x00 0xf7 0x04 0x00 0xf6 0x04 0x00 0xf5 0x04 0x00 0xf4 0x04>; - clocks = <0x02 0x151 0x02 0x156 0x02 0x14c 0x02 0x15c 0x02 0x161 0x02 0x2c5>; - interrupt-map = <0x00 0x00 0x00 0x01 0x105 0x00 0x00 0x00 0x00 0x02 0x105 0x01 0x00 0x00 0x00 0x03 0x105 0x02 0x00 0x00 0x00 0x04 0x105 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x02>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - num-lanes = <0x01>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf3000000 0x00 0xf3000000 0x00 0x100000 0x81000000 0x00 0xf3100000 0x00 0xf3100000 0x00 0x100000 0x82000000 0x00 0xf3200000 0x00 0xf3200000 0x00 0xe00000 0xc3000000 0x09 0xc0000000 0x09 0xc0000000 0x00 0x40000000>; - msi-map = <0x3000 0x106 0x3000 0x1000>; - #interrupt-cells = <0x01>; - status = "disabled"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x70 0x02>; - num-viewport = <0x04>; - reg = <0x00 0xfe180000 0x00 0x10000 0x0a 0x40c00000 0x00 0x400000>; - linux,pci-domain = <0x03>; - phandle = <0x28c>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x08>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0xf5 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x105>; - interrupt-controller; - }; - }; - - i2s@fe480000 { - pinctrl-names = "default"; - pinctrl-0 = <0x120 0x121 0x122 0x123 0x124 0x125 0x126 0x127 0x128 0x129>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - resets = <0x02 0xc002a 0x02 0xc002d>; - interrupts = <0x00 0xb5 0x04>; - clocks = <0x02 0x28c 0x02 0x290 0x02 0x288>; - dma-names = "tx\0rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - status = "disabled"; - reg = <0x00 0xfe480000 0x00 0x1000>; - phandle = <0x1d1>; - dmas = <0x7c 0x02 0x7c 0x03>; - reset-names = "tx-m\0rx-m"; - rockchip,clk-trcm = <0x01>; - }; - - syscon@fd5c0000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfd5c0000 0x00 0x100>; - phandle = <0x1cb>; - }; - - i2c@feab0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x14a>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb2 0x02 0xaa>; - interrupts = <0x00 0x140 0x04>; - clocks = <0x02 0x8f 0x02 0x87>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfeab0000 0x00 0x1000>; - phandle = <0x2a6>; - reset-names = "i2c\0apb"; - - gpio@21 { - gpio-controller; - gpio-group-num = <0xc8>; - compatible = "nxp,pca9555"; - status = "okay"; - reg = <0x21>; - phandle = <0x182>; - #gpio-cells = <0x02>; - }; - }; - - iommu@fdcb7f00 { - power-domains = <0x60 0x1b>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x84 0x04>; - clocks = <0x02 0x1de 0x02 0x1df>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "isp0_mmu"; - reg = <0x00 0xfdcb7f00 0x00 0x100>; - phandle = <0xd0>; - }; - - qos@fdf3e600 { - compatible = "syscon"; - reg = <0x00 0xfdf3e600 0x00 0x20>; - phandle = <0xae>; - }; - - syscon@fd5b8000 { - compatible = "rockchip,pcie30-phy-grf\0syscon"; - reg = <0x00 0xfd5b8000 0x00 0x10000>; - phandle = <0x1cc>; - }; - - qos@fdf81200 { - compatible = "syscon"; - reg = <0x00 0xfdf81200 0x00 0x20>; - phandle = <0xa1>; - }; - - mipi5-csi2-hw@fdd60000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x329>; - interrupts = <0x00 0x99 0x04 0x00 0x9a 0x04>; - clocks = <0x02 0x1d4>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd60000 0x00 0x10000>; - phandle = <0x4c>; - reset-names = "srst_csihost_p"; - }; - - qos@fdf72000 { - compatible = "syscon"; - reg = <0x00 0xfdf72000 0x00 0x20>; - phandle = <0x82>; - }; - - timer@feae0000 { - clock-names = "pclk\0timer"; - interrupts = <0x00 0x121 0x04>; - clocks = <0x02 0x5c 0x02 0x5f>; - compatible = "rockchip,rk3588-timer\0rockchip,rk3288-timer"; - reg = <0x00 0xfeae0000 0x00 0x20>; - phandle = <0x2a9>; - }; - - rkcif-mipi-lvds-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x52>; - phandle = <0x22c>; - }; - - syscon@fd5b5000 { - compatible = "rockchip,mipi-dphy-grf\0syscon"; - reg = <0x00 0xfd5b5000 0x00 0x1000>; - phandle = <0x193>; - }; - - i2c@fec90000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x185>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb6 0x02 0xae>; - interrupts = <0x00 0x144 0x04>; - clocks = <0x02 0x93 0x02 0x8b>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "disabled"; - reg = <0x00 0xfec90000 0x00 0x1000>; - phandle = <0x2e4>; - reset-names = "i2c\0apb"; - }; - - avsd-plus@fdb51000 { - power-domains = <0x60 0x15>; - iommus = <0xb7>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1c0>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2c8 0x02 0x2c9>; - interrupts = <0x00 0x77 0x04>; - clocks = <0x02 0x1c0 0x02 0x1c1>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x00>; - rockchip,disable-auto-freq; - compatible = "rockchip,avs-plus-decoder"; - rockchip,resetgroup-node = <0x00>; - status = "disabled"; - interrupt-names = "irq_avsd"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdb51000 0x00 0x200>; - phandle = <0x268>; - reset-names = "shared_video_a\0shared_video_h"; - }; - - dp1-sound { - rockchip,jack-det; - rockchip,cpu = <0x1e2>; - rockchip,codec = <0x1e3 0x01>; - rockchip,card-name = "rockchip,dp1"; - compatible = "rockchip,hdmi"; - status = "disabled"; - phandle = <0x4a9>; - rockchip,mclk-fs = <0x200>; - }; - - mipi1-csi2-hw@fdd20000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x325>; - interrupts = <0x00 0x91 0x04 0x00 0x92 0x04>; - clocks = <0x02 0x1d0>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd20000 0x00 0x10000>; - phandle = <0x48>; - reset-names = "srst_csihost_p"; - }; - - iep@fdbb0000 { - power-domains = <0x60 0x15>; - iommus = <0xc1>; - clock-names = "aclk\0hclk\0sclk"; - assigned-clocks = <0x02 0x1aa>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2d5 0x02 0x2d4 0x02 0x2d6>; - interrupts = <0x00 0x75 0x04>; - clocks = <0x02 0x1aa 0x02 0x1a9 0x02 0x1ab>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x06>; - rockchip,disable-auto-freq; - compatible = "rockchip,iep-v2"; - status = "okay"; - interrupt-names = "irq_iep"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdbb0000 0x00 0x500>; - phandle = <0x271>; - reset-names = "rst_a\0rst_h\0rst_s"; - }; - - dsi@fde20000 { - power-domains = <0x60 0x18>; - #address-cells = <0x01>; - phy-names = "dcphy"; - clock-names = "pclk\0sys_clk"; - resets = <0x02 0x354>; - interrupts = <0x00 0xa7 0x04>; - clocks = <0x02 0x278 0x02 0x27a>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-mipi-dsi2"; - status = "disabled"; - rockchip,grf = <0xd7>; - phys = <0x2f>; - reg = <0x00 0xfde20000 0x00 0x10000>; - phandle = <0x281>; - reset-names = "apb"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x282>; - - endpoint@1 { - remote-endpoint = <0x39>; - status = "disabled"; - reg = <0x01>; - phandle = <0xee>; - }; - - endpoint@0 { - remote-endpoint = <0xf3>; - status = "disabled"; - reg = <0x00>; - phandle = <0xe9>; - }; - }; - }; - }; - - rkcif-mipi-lvds5-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a2>; - phandle = <0x477>; - }; - - edp@fded0000 { - power-domains = <0x60 0x1a>; - phy-names = "dp"; - clock-names = "dp\0pclk\0spdif\0hclk"; - resets = <0x02 0x3e4 0x02 0x3e3>; - interrupts = <0x00 0xa4 0x04>; - clocks = <0x02 0x214 0x02 0x213 0x02 0x215 0x05>; - compatible = "rockchip,rk3588-edp"; - status = "disabled"; - rockchip,grf = <0xd8>; - phys = <0x1af>; - reg = <0x00 0xfded0000 0x00 0x1000>; - phandle = <0x483>; - reset-names = "dp\0apb"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - remote-endpoint = <0x1b1>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe4>; - }; - - endpoint@2 { - remote-endpoint = <0x1b2>; - status = "disabled"; - reg = <0x02>; - phandle = <0xec>; - }; - - endpoint@0 { - remote-endpoint = <0x1b0>; - status = "disabled"; - reg = <0x00>; - phandle = <0xde>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - phandle = <0x484>; - }; - }; - }; - }; - - qos@fdf67000 { - compatible = "syscon"; - reg = <0x00 0xfdf67000 0x00 0x20>; - phandle = <0x9c>; - }; - - qos@fdf64000 { - compatible = "syscon"; - reg = <0x00 0xfdf64000 0x00 0x20>; - phandle = <0x9b>; - }; - - npu-opp-table { - rockchip,pvtm-offset = <0x50>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,init-freq = <0xf4240>; - rockchip,pvtm-hw = <0x06>; - nvmem-cells = <0xb4 0xb5 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; - rockchip,pvtm-thermal-zone = "npu-thermal"; - rockchip,high-temp-max-freq = "\0\f5"; - rockchip,opp-clocks = <0x02 0x12a 0x02 0x12f>; - rockchip,pvtm-freq = "\0\f5"; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0xb6>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; - phandle = <0xb1>; - rockchip,pvtm-temp-prop = <0xffffff8f 0xffffff8f>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0x7a120>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-j-m-700000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x29b92700>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-300000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x11e1a300>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-500000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x1dcd6500>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-j-m-400000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x17d78400>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-700000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x29b92700>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-j-m-950000000 { - opp-microvolt = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - opp-microvolt-L4 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L2 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-hz = <0x00 0x389fd980>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L5 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-microvolt-L3 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L1 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-900000000 { - opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-hz = <0x00 0x35a4e900>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - }; - - opp-j-m-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-400000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x17d78400>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-j-m-300000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x11e1a300>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-600000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-1000000000 { - opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - opp-hz = <0x00 0x3b9aca00>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - }; - - opp-j-m-500000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x1dcd6500>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L4 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; - opp-microvolt-L2 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L3 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; - }; - }; - - syscon@fd590000 { - compatible = "rockchip,rk3588-bigcore0-grf\0syscon"; - reg = <0x00 0xfd590000 0x00 0x100>; - phandle = <0x26>; - }; - - syscon@fd5dc000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5dc000 0x00 0x4000>; - phandle = <0x25e>; - - usb2-phy@c000 { - clock-output-names = "usb480m_phy3"; - clock-names = "phyclk"; - resets = <0x02 0xc004a 0x02 0x48b>; - interrupts = <0x00 0x188 0x04>; - clocks = <0x02 0x2b5>; - #clock-cells = <0x00>; - compatible = "rockchip,rk3588-usb2phy"; - status = "okay"; - reg = <0xc000 0x10>; - phandle = <0x6d>; - reset-names = "phy\0apb"; - - host-port { - phy-supply = <0x75>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x6f>; - }; - }; - }; - - pcie-clk3 { - regulator-boot-on; - regulator-always-on; - regulator-name = "pcie_clk3"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x496>; - gpios = <0xfe 0x09 0x01>; - }; - - pwm@febf0030 { - pinctrl-names = "active"; - pinctrl-0 = <0x174>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15e 0x04 0x00 0x15f 0x04>; - clocks = <0x02 0x5a 0x02 0x59>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebf0030 0x00 0x10>; - phandle = <0x2dc>; - }; - - hwspinlock@fe5a0000 { - compatible = "rockchip,hwspinlock"; - reg = <0x00 0xfe5a0000 0x00 0x100>; - phandle = <0x29f>; - #hwlock-cells = <0x01>; - }; - - rkcif-mipi-lvds4-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a1>; - phandle = <0x474>; - }; - - sram@10f000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "mmio-sram"; - ranges = <0x00 0x00 0x10f000 0x100>; - reg = <0x00 0x10f000 0x00 0x100>; - - sram@0 { - compatible = "arm,scmi-shmem"; - reg = <0x00 0x100>; - phandle = <0x46>; - }; - }; - - hdmirx-controller@fdee0000 { - power-domains = <0x60 0x1a>; - pinctrl-names = "default"; - pinctrl-0 = <0x1b3 0x1b4>; - clock-names = "aclk\0audio\0cr_para\0pclk\0ref\0hclk_s_hdmirx\0hclk_vo1"; - reg-names = "hdmirx_regs"; - resets = <0x02 0x3d9 0x02 0x3da 0x02 0x3db 0x02 0x3b7>; - interrupts = <0x00 0xb1 0x04 0x00 0x1b4 0x04 0x00 0xb3 0x04>; - clocks = <0x02 0x21a 0x02 0x21f 0x02 0x2b2 0x02 0x21b 0x02 0x21c 0x02 0x232 0x05>; - hpd-trigger-level = <0x01>; - #sound-dai-cells = <0x01>; - compatible = "rockchip,rk3588-hdmirx-ctrler\0rockchip,hdmirx-ctrler"; - status = "disabled"; - rockchip,grf = <0xc8>; - interrupt-names = "cec\0hdmi\0dma"; - hdmirx-det-gpios = <0xfe 0x1d 0x01>; - reg = <0x00 0xfdee0000 0x00 0x6000>; - phandle = <0x1eb>; - reset-names = "rst_a\0rst_p\0rst_ref\0rst_biu"; - rockchip,vo1_grf = <0xd8>; - }; - - qos@fdf61000 { - compatible = "syscon"; - reg = <0x00 0xfdf61000 0x00 0x20>; - phandle = <0x90>; - }; - - qos@fdf40600 { - compatible = "syscon"; - reg = <0x00 0xfdf40600 0x00 0x20>; - phandle = <0xa4>; - }; - - syscon@fd588000 { - compatible = "rockchip,rk3588-pmu0-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd588000 0x00 0x2000>; - phandle = <0x25a>; - - reboot-mode { - mode-normal = <0x5242c300>; - mode-loader = <0x5242c301>; - mode-quiescent = <0x5242c30e>; - mode-bootloader = <0x5242c301>; - mode-recovery = <0x5242c303>; - mode-watchdog = <0x5242c308>; - mode-ums = <0x5242c30c>; - mode-fastboot = <0x5242c309>; - offset = <0x80>; - compatible = "syscon-reboot-mode"; - mode-winusb = <0x5242c30f>; - phandle = <0x25b>; - mode-charge = <0x5242c30b>; - mode-panic = <0x5242c307>; - }; - }; - - syscon@fd5a4000 { - compatible = "rockchip,rk3588-vop-grf\0syscon"; - reg = <0x00 0xfd5a4000 0x00 0x2000>; - phandle = <0xd7>; - }; - - iommu@fdb60f00 { - power-domains = <0x60 0x16>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x72 0x04>; - clocks = <0x02 0x1ba 0x02 0x1b9>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "rga3_0_mmu"; - reg = <0x00 0xfdb60f00 0x00 0x100>; - phandle = <0xb9>; - }; - - pwm@febf0020 { - pinctrl-names = "active"; - pinctrl-0 = <0x173>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15e 0x04>; - clocks = <0x02 0x5a 0x02 0x59>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebf0020 0x00 0x10>; - phandle = <0x2db>; - }; - - rkispp@fdcd0000 { - power-domains = <0x60 0x1d>; - iommus = <0xd2>; - clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; - assigned-clocks = <0x02 0x1d6>; - assigned-clock-rates = <0x5f5e100>; - interrupts = <0x00 0x8b 0x04>; - clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; - compatible = "rockchip,rk3588-rkispp"; - status = "disabled"; - interrupt-names = "fec_irq"; - reg = <0x00 0xfdcd0000 0x00 0xf00>; - phandle = <0x5b>; - }; - - tsadc@fec00000 { - pinctrl-names = "gpio\0otpout"; - pinctrl-0 = <0x175>; - clock-names = "tsadc\0apb_pclk"; - rockchip,hw-tshut-polarity = <0x00>; - assigned-clocks = <0x02 0xaa>; - assigned-clock-rates = <0x1e8480>; - resets = <0x02 0xc1 0x02 0xc0>; - interrupts = <0x00 0x18d 0x04>; - rockchip,hw-tshut-mode = <0x00>; - clocks = <0x02 0xaa 0x02 0xa9>; - #thermal-sensor-cells = <0x01>; - compatible = "rockchip,rk3588-tsadc"; - pinctrl-1 = <0x176>; - status = "okay"; - reg = <0x00 0xfec00000 0x00 0x400>; - phandle = <0x5d>; - reset-names = "tsadc\0tsadc-apb"; - rockchip,hw-tshut-temp = <0x1d4c0>; - }; - - iommu@fdbb0800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x75 0x04>; - clocks = <0x02 0x1aa 0x02 0x1a9>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_iep_mmu"; - reg = <0x00 0xfdbb0800 0x00 0x100>; - phandle = <0xc1>; - }; - - phy@fed60000 { - clock-names = "ref\0apb"; - resets = <0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d>; - clocks = <0x02 0x2b5 0x02 0x267>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-hdptx-phy"; - status = "disabled"; - rockchip,grf = <0x18a>; - reg = <0x00 0xfed60000 0x00 0x2000>; - phandle = <0x101>; - reset-names = "apb\0init\0cmn\0lane"; - }; - - pvtm@fda50000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-bigcore1-pvtm"; - reg = <0x00 0xfda50000 0x00 0x100>; - - pvtm@1 { - clock-names = "clk\0pclk"; - clocks = <0x02 0x2c8 0x02 0x17>; - reg = <0x01>; - }; - }; - - csi2-dcphy0 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x20d>; - }; - - mailbox@fece0000 { - clock-names = "pclk_mailbox"; - interrupts = <0x00 0x4d 0x04 0x00 0x4e 0x04 0x00 0x4f 0x04 0x00 0x50 0x04>; - clocks = <0x02 0x4e>; - #mbox-cells = <0x01>; - compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; - status = "disabled"; - reg = <0x00 0xfece0000 0x00 0x200>; - phandle = <0x2e9>; - }; - - rkcif-mipi-lvds3-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x57>; - phandle = <0x23a>; - }; - - rkcif-mipi-lvds1-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x53>; - phandle = <0x22f>; - }; - - dfi@fe060000 { - rockchip,pmu_grf = <0x104>; - compatible = "rockchip,rk3588-dfi"; - status = "disabled"; - reg = <0x00 0xfe060000 0x00 0x10000>; - phandle = <0x40>; - }; - - iommu@fdca0000 { - power-domains = <0x60 0x17>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x6d 0x04>; - clocks = <0x02 0x49 0x02 0x4b>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-av1"; - status = "okay"; - interrupt-names = "irq_av1d_mmu"; - reg = <0x00 0xfdca0000 0x00 0x600>; - phandle = <0xce>; - }; - - mipi5-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x229>; - }; - - qos@fdf35600 { - compatible = "syscon"; - reg = <0x00 0xfdf35600 0x00 0x20>; - phandle = <0x8a>; - }; - - syscon@fd5e4000 { - compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; - reg = <0x00 0xfd5e4000 0x00 0x100>; - phandle = <0x1c7>; - }; - - iommu@fdba8800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x7d 0x04>; - clocks = <0x02 0x1b0 0x02 0x1b1>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpege2_mmu"; - reg = <0x00 0xfdba8800 0x00 0x40>; - phandle = <0xbf>; - }; - - mpp-srv { - rockchip,resetgroup-count = <0x01>; - rockchip,taskqueue-count = <0x0c>; - compatible = "rockchip,mpp-service"; - status = "okay"; - phandle = <0xb8>; - }; - - cspmu@fd10c000 { - compatible = "rockchip,cspmu"; - reg = <0x00 0xfd10c000 0x00 0x1000 0x00 0xfd10d000 0x00 0x1000 0x00 0xfd10e000 0x00 0x1000 0x00 0xfd10f000 0x00 0x1000 0x00 0xfd12c000 0x00 0x1000 0x00 0xfd12d000 0x00 0x1000 0x00 0xfd12e000 0x00 0x1000 0x00 0xfd12f000 0x00 0x1000>; - phandle = <0x48e>; - }; - - pwm@febf0010 { - pinctrl-names = "active"; - pinctrl-0 = <0x172>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15e 0x04>; - clocks = <0x02 0x5a 0x02 0x59>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebf0010 0x00 0x10>; - phandle = <0x2da>; - }; - - iommu@fdbef000 { - power-domains = <0x60 0x11>; - rockchip,shootdown-entire; - interrupts = <0x00 0x66 0x04 0x00 0x67 0x04>; - clocks = <0x02 0x1ca 0x02 0x1c9>; - rockchip,enable-cmd-retry; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "irq_rkvenc1_mmu0\0irq_rkvenc1_mmu1"; - reg = <0x00 0xfdbef000 0x00 0x40 0x00 0xfdbef040 0x00 0x40>; - phandle = <0xc5>; - lock-names = "aclk\0iface"; - }; - - serial@feb60000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x162>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14e 0x04>; - clocks = <0x02 0xbf 0x02 0xad>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeb60000 0x00 0x100>; - phandle = <0x2cb>; - dmas = <0x7c 0x0c 0x7c 0x0d>; - reg-shift = <0x02>; - }; - - hdmiin-sound { - rockchip,jack-det; - rockchip,cpu = <0x1ec>; - rockchip,codec = <0x1eb 0x00>; - rockchip,bitclock-master = <0x1eb>; - rockchip,card-name = "rockchip,hdmiin"; - rockchip,format = "i2s"; - compatible = "rockchip,hdmi"; - phandle = <0x4ac>; - rockchip,frame-master = <0x1eb>; - rockchip,mclk-fs = <0x80>; - }; - - i2s@fddc8000 { - power-domains = <0x60 0x19>; - clock-names = "mclk_tx\0hclk"; - assigned-clocks = <0x02 0x1ff>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x391>; - interrupts = <0x00 0xbc 0x04>; - clocks = <0x02 0x201 0x02 0x1fe>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - rockchip,playback-only; - status = "disabled"; - reg = <0x00 0xfddc8000 0x00 0x1000>; - phandle = <0x47c>; - dmas = <0xf2 0x16>; - reset-names = "tx-m"; - }; - - pcie30-avdd0v75 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b0>; - regulator-name = "pcie30_avdd0v75"; - compatible = "regulator-fixed"; - phandle = <0x4a7>; - vin-supply = <0x1df>; - }; - - timer { - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - compatible = "arm,armv8-timer"; - }; - - rockchip-suspend { - rockchip,sleep-debug-en = <0x01>; - rockchip,sleep-mode-config = <0x5000604>; - compatible = "rockchip,pm-rk3588"; - status = "okay"; - rockchip,wakeup-config = <0x100>; - phandle = <0x246>; - }; - - decompress@fea80000 { - clock-names = "aclk\0dclk\0pclk"; - resets = <0x02 0x118>; - interrupts = <0x00 0x55 0x04>; - clocks = <0x02 0x75 0x02 0x77 0x02 0x76>; - compatible = "rockchip,hw-decompress"; - status = "disabled"; - reg = <0x00 0xfea80000 0x00 0x1000>; - phandle = <0x2a3>; - reset-names = "dresetn"; - }; - - dma-controller@fea30000 { - clock-names = "apb_pclk"; - interrupts = <0x00 0x58 0x04 0x00 0x59 0x04>; - clocks = <0x02 0x79>; - arm,pl330-periph-burst; - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xfea30000 0x00 0x4000>; - phandle = <0xf1>; - #dma-cells = <0x01>; - }; - - pwm@febf0000 { - pinctrl-names = "active"; - pinctrl-0 = <0x171>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15e 0x04>; - clocks = <0x02 0x5a 0x02 0x59>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebf0000 0x00 0x10>; - phandle = <0x2d9>; - }; - - iommu@fdcd8f00 { - power-domains = <0x60 0x1d>; - clock-names = "aclk\0iface\0pclk"; - interrupts = <0x00 0x8e 0x04>; - clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "disabled"; - interrupt-names = "fec1_mmu"; - reg = <0x00 0xfdcd8f00 0x00 0x100>; - phandle = <0xd3>; - }; - - spdif-tx@fddb0000 { - power-domains = <0x60 0x19>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x205>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc3 0x04>; - clocks = <0x02 0x209 0x02 0x204>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfddb0000 0x00 0x1000>; - phandle = <0x1d5>; - dmas = <0xf1 0x06>; - }; - - rkisp1-vir2 { - rockchip,hw = <0x5a>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x241>; - }; - - pcie-clk1 { - regulator-boot-on; - regulator-always-on; - regulator-name = "pcie_clk1"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x494>; - vin-supply = <0x1cd>; - gpios = <0x181 0x15 0x01>; - }; - - jpege-core@fdba8000 { - power-domains = <0x60 0x15>; - iommus = <0xbf>; - rockchip,ccu = <0xbd>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1b0>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2ce 0x02 0x2cf>; - interrupts = <0x00 0x7e 0x04>; - clocks = <0x02 0x1b0 0x02 0x1b1>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-jpege-core"; - status = "okay"; - interrupt-names = "irq_jpege2"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdba8000 0x00 0x400>; - phandle = <0x26f>; - reset-names = "video_a\0video_h"; - }; - - qos@fdf66400 { - compatible = "syscon"; - reg = <0x00 0xfdf66400 0x00 0x20>; - phandle = <0x95>; - }; - - spdif-tx1-sound { - simple-audio-card,name = "rockchip,spdif-tx1"; - compatible = "simple-audio-card"; - status = "disabled"; - phandle = <0x49d>; - simple-audio-card,mclk-fs = <0x80>; - - simple-audio-card,cpu { - sound-dai = <0x1d7>; - }; - - simple-audio-card,codec { - sound-dai = <0x1d8>; - }; - }; - - mmc@fe2e0000 { - mmc-hs400-enhanced-strobe; - clock-names = "core\0bus\0axi\0block\0timer"; - assigned-clocks = <0x02 0x13b 0x02 0x13c 0x02 0x13a>; - bus-width = <0x08>; - non-removable; - no-sdio; - assigned-clock-rates = <0xbebc200 0x16e3600 0xbebc200>; - resets = <0x02 0x1f6 0x02 0x1f4 0x02 0x1f5 0x02 0x1f7 0x02 0x1f8>; - mmc-hs400-1_8v; - interrupts = <0x00 0xcd 0x04>; - clocks = <0x02 0x13a 0x02 0x138 0x02 0x139 0x02 0x13b 0x02 0x13c>; - no-sd; - compatible = "rockchip,rk3588-dwcmshc\0rockchip,dwcmshc-sdhci"; - status = "okay"; - reg = <0x00 0xfe2e0000 0x00 0x10000>; - phandle = <0x295>; - max-frequency = <0xbebc200>; - reset-names = "core\0bus\0axi\0block\0timer"; - }; - - dma-controller@fed10000 { - clock-names = "apb_pclk"; - interrupts = <0x00 0x5a 0x04 0x00 0x5b 0x04>; - clocks = <0x02 0x7a>; - arm,pl330-periph-burst; - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xfed10000 0x00 0x4000>; - phandle = <0xf2>; - #dma-cells = <0x01>; - }; - - iommu@fc900000 { - interrupts = <0x00 0x171 0x04 0x00 0x173 0x04 0x00 0x176 0x04 0x00 0x16f 0x04>; - #iommu-cells = <0x01>; - compatible = "arm,smmu-v3"; - status = "disabled"; - interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; - reg = <0x00 0xfc900000 0x00 0x200000>; - phandle = <0x256>; - }; - - mailbox@fec70000 { - clock-names = "pclk_mailbox"; - interrupts = <0x00 0x45 0x04 0x00 0x46 0x04 0x00 0x47 0x04 0x00 0x48 0x04>; - clocks = <0x02 0x4d>; - #mbox-cells = <0x01>; - compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; - status = "disabled"; - reg = <0x00 0xfec70000 0x00 0x200>; - phandle = <0x2de>; - }; - - pcie@fe150000 { - power-domains = <0x60 0x22>; - vpcie3v3-supply = <0x1b8>; - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x00 0x0f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x10>; - resets = <0x02 0x20d 0x02 0x21c>; - interrupts = <0x00 0x107 0x04 0x00 0x106 0x04 0x00 0x105 0x04 0x00 0x104 0x04 0x00 0x103 0x04>; - clocks = <0x02 0x14e 0x02 0x153 0x02 0x149 0x02 0x158 0x02 0x15e 0x02 0x183>; - interrupt-map = <0x00 0x00 0x00 0x01 0x1b5 0x00 0x00 0x00 0x00 0x02 0x1b5 0x01 0x00 0x00 0x00 0x03 0x1b5 0x02 0x00 0x00 0x00 0x04 0x1b5 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x03>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - reset-gpios = <0x10d 0x0e 0x00>; - num-lanes = <0x01>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf0000000 0x00 0xf0000000 0x00 0x100000 0x81000000 0x00 0xf0100000 0x00 0xf0100000 0x00 0x100000 0x82000000 0x00 0xf0200000 0x00 0xf0200000 0x00 0xe00000 0xc3000000 0x09 0x00 0x09 0x00 0x00 0x40000000>; - msi-map = <0x00 0x1b6 0x00 0x1000>; - #interrupt-cells = <0x01>; - status = "okay"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x1b7>; - num-viewport = <0x08>; - reg = <0x00 0xfe150000 0x00 0x10000 0x0a 0x40000000 0x00 0x400000>; - linux,pci-domain = <0x00>; - phandle = <0x485>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x10>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0x104 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x1b5>; - interrupt-controller; - }; - }; - - rng@fe378000 { - clock-names = "hclk_trng"; - resets = <0x11a 0x30>; - interrupts = <0x00 0x190 0x04>; - clocks = <0x0e 0x0c>; - compatible = "rockchip,trngv1"; - status = "okay"; - reg = <0x00 0xfe378000 0x00 0x200>; - phandle = <0x297>; - reset-names = "reset"; - }; - - sata@fe220000 { - phy-names = "sata-phy"; - clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; - interrupts = <0x00 0x112 0x04>; - clocks = <0x02 0x172 0x02 0x16f 0x02 0x175 0x02 0x164 0x02 0x17f>; - compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; - status = "disabled"; - interrupt-names = "hostc"; - phys = <0x1bc 0x01>; - reg = <0x00 0xfe220000 0x00 0x1000>; - phandle = <0x48a>; - ports-implemented = <0x01>; - }; - - rkcif-mipi-lvds5 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x1a2>; - }; - - vcc-sata-pwr-en-regulator { - regulator-max-microvolt = <0x325aa0>; - regulator-boot-on; - gpio = <0x182 0x0c 0x00>; - regulator-always-on; - enable-active-high; - regulator-min-microvolt = <0x325aa0>; - regulator-name = "vcc_sata_pwr_en"; - startup-delay-us = <0x1388>; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4a3>; - vin-supply = <0x1cd>; - }; - - pwm-fan { - cooling-levels = <0x32 0x32 0x64 0x96 0xc8 0xff>; - rockchip,temp-trips = <0xc350 0x01 0xd6d8 0x02 0xea60 0x03 0xfde8 0x04 0x11170 0x05>; - compatible = "pwm-fan"; - phandle = <0x4ad>; - pwms = <0x1ed 0x00 0xc350 0x00>; - #cooling-cells = <0x02>; - fan-supply = <0x78>; - }; - - qos@fdf3e200 { - compatible = "syscon"; - reg = <0x00 0xfdf3e200 0x00 0x20>; - phandle = <0xab>; - }; - - spdif-tx@fe4e0000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default"; - pinctrl-0 = <0x142>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x3f>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc1 0x04>; - clocks = <0x02 0x41 0x02 0x3e>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfe4e0000 0x00 0x1000>; - phandle = <0x29d>; - dmas = <0x7c 0x05>; - }; - - vad@fe4d0000 { - rockchip,det-channel = <0x00>; - rockchip,audio-src = <0x00>; - clock-names = "hclk"; - reg-names = "vad"; - interrupts = <0x00 0xca 0x04>; - clocks = <0x02 0x2a0>; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-vad"; - status = "disabled"; - rockchip,mode = <0x00>; - reg = <0x00 0xfe4d0000 0x00 0x1000>; - phandle = <0x29c>; - }; - - jpegd@fdb90000 { - power-domains = <0x60 0x15>; - iommus = <0xbb>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1b4>; - rockchip,normal-rates = <0x23c34600 0x00>; - assigned-clock-rates = <0x23c34600>; - resets = <0x02 0x2d2 0x02 0x2d3>; - interrupts = <0x00 0x81 0x04>; - clocks = <0x02 0x1b4 0x02 0x1b5>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x01>; - compatible = "rockchip,rkv-jpeg-decoder-v1"; - status = "okay"; - interrupt-names = "irq_jpegd"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdb90000 0x00 0x400>; - phandle = <0x26c>; - reset-names = "video_a\0video_h"; - }; - - cpuinfo { - nvmem-cells = <0x2a 0x2b 0x2c>; - compatible = "rockchip,cpuinfo"; - nvmem-cell-names = "id\0cpu-version\0cpu-code"; - }; - - qos@fdf60400 { - compatible = "syscon"; - reg = <0x00 0xfdf60400 0x00 0x20>; - phandle = <0x8f>; - }; - - spi@feb20000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x01>; - pinctrl-0 = <0x154 0x155>; - clock-names = "spiclk\0apb_pclk"; - assigned-clocks = <0x02 0xa5>; - assigned-clock-rates = <0xbebc200>; - interrupts = <0x00 0x148 0x04>; - clocks = <0x02 0xa5 0x02 0xa0>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "okay"; - reg = <0x00 0xfeb20000 0x00 0x1000>; - phandle = <0x2ad>; - dmas = <0xf1 0x0f 0xf1 0x10>; - - rk806single@0 { - vcc11-supply = <0x15b>; - pinctrl-names = "default\0pmic-power-off"; - vcc12-supply = <0x78>; - vcc13-supply = <0x15c>; - vcc14-supply = <0x15c>; - pinctrl-0 = <0x156 0x157 0x158 0x159>; - interrupts = <0x07 0x08>; - spi-max-frequency = <0xf4240>; - interrupt-parent = <0x7b>; - low_voltage_threshold = <0xbb8>; - vcca-supply = <0x78>; - vcc1-supply = <0x78>; - pmic-reset-func = <0x01>; - vcc2-supply = <0x78>; - hotdie_temperture_threshold = <0x73>; - compatible = "rockchip,rk806"; - vcc3-supply = <0x78>; - pinctrl-1 = <0x15a>; - vcc4-supply = <0x78>; - vcc5-supply = <0x78>; - reg = <0x00>; - phandle = <0x2ae>; - vcc6-supply = <0x78>; - shutdown_voltage_threshold = <0xa8c>; - vcc7-supply = <0x78>; - vcc8-supply = <0x78>; - shutdown_temperture_threshold = <0xa0>; - vcc9-supply = <0x78>; - vcc10-supply = <0x78>; - - pinctrl_rk806 { - gpio-controller; - phandle = <0x2af>; - #gpio-cells = <0x02>; - - rk806_dvs2_rst { - function = "pin_fun3"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b4>; - }; - - rk806_dvs3_null { - function = "pin_fun0"; - pins = "gpio_pwrctrl3"; - phandle = <0x159>; - }; - - rk806_dvs3_dvs { - function = "pin_fun4"; - pins = "gpio_pwrctrl3"; - phandle = <0x2ba>; - }; - - rk806_dvs3_rst { - function = "pin_fun3"; - pins = "gpio_pwrctrl3"; - phandle = <0x2b9>; - }; - - rk806_dvs2_null { - function = "pin_fun0"; - pins = "gpio_pwrctrl2"; - phandle = <0x158>; - }; - - rk806_dvs1_pwrdn { - function = "pin_fun2"; - pins = "gpio_pwrctrl1"; - phandle = <0x15a>; - }; - - rk806_dvs1_slp { - function = "pin_fun1"; - pins = "gpio_pwrctrl1"; - phandle = <0x2b0>; - }; - - rk806_dvs1_null { - function = "pin_fun0"; - pins = "gpio_pwrctrl2"; - phandle = <0x157>; - }; - - rk806_dvs3_gpio { - function = "pin_fun5"; - pins = "gpio_pwrctrl3"; - phandle = <0x2bb>; - }; - - rk806_dvs2_gpio { - function = "pin_fun5"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b6>; - }; - - rk806_dvs2_slp { - function = "pin_fun1"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b2>; - }; - - rk806_dvs2_pwrdn { - function = "pin_fun2"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b3>; - }; - - rk806_dvs1_rst { - function = "pin_fun3"; - pins = "gpio_pwrctrl1"; - phandle = <0x2b1>; - }; - - rk806_dvs3_slp { - function = "pin_fun1"; - pins = "gpio_pwrctrl3"; - phandle = <0x2b7>; - }; - - rk806_dvs2_dvs { - function = "pin_fun4"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b5>; - }; - - rk806_dvs3_pwrdn { - function = "pin_fun2"; - pins = "gpio_pwrctrl3"; - phandle = <0x2b8>; - }; - }; - - pwrkey { - status = "okay"; - }; - - regulators { - - PLDO_REG2 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "vcc_1v8_s0"; - phandle = <0x177>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - DCDC_REG4 { - regulator-max-microvolt = <0xe7ef0>; - regulator-boot-on; - regulator-init-microvolt = <0xb71b0>; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_vdenc_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x2bc>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG2 { - regulator-max-microvolt = <0xe7ef0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_cpu_lit_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x12>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - NLDO_REG4 { - regulator-max-microvolt = <0xcf850>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xcf850>; - regulator-name = "vdd_0v85_s0"; - phandle = <0x2c6>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG9 { - regulator-boot-on; - regulator-always-on; - regulator-name = "vddq_ddr_s0"; - phandle = <0x2bf>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - NLDO_REG2 { - regulator-max-microvolt = <0xcf850>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xcf850>; - regulator-name = "vdd_ddr_pll_s0"; - phandle = <0x2c5>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xcf850>; - }; - }; - - PLDO_REG5 { - regulator-max-microvolt = <0x325aa0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "vccio_sd_s0"; - phandle = <0x118>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG7 { - regulator-max-microvolt = <0x1e8480>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1e8480>; - regulator-name = "vdd_2v0_pldo_s3"; - phandle = <0x15b>; - - regulator-state-mem { - regulator-suspend-microvolt = <0x1e8480>; - regulator-on-in-suspend; - }; - }; - - PLDO_REG3 { - regulator-max-microvolt = <0x124f80>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x124f80>; - regulator-name = "avdd_1v2_s0"; - phandle = <0x2c1>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG5 { - regulator-max-microvolt = <0xdbba0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xa4cb8>; - regulator-name = "vdd_ddr_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x42>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xcf850>; - }; - }; - - DCDC_REG10 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "vcc_1v8_s3"; - phandle = <0x2c0>; - - regulator-state-mem { - regulator-suspend-microvolt = <0x1b7740>; - regulator-on-in-suspend; - }; - }; - - PLDO_REG1 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "avcc_1v8_s0"; - phandle = <0x1de>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG3 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xa4cb8>; - regulator-name = "vdd_log_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x43>; - - regulator-state-mem { - regulator-suspend-microvolt = <0xb71b0>; - regulator-on-in-suspend; - }; - }; - - DCDC_REG1 { - regulator-max-microvolt = <0xe7ef0>; - regulator-boot-on; - regulator-enable-ramp-delay = <0x190>; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_gpu_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x62>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - NLDO_REG5 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b0>; - regulator-name = "vdd_0v75_s0"; - phandle = <0x2c7>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - NLDO_REG3 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b0>; - regulator-name = "avdd_0v75_s0"; - phandle = <0x1df>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - PLDO_REG6 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "pldo6_s3"; - phandle = <0x2c3>; - - regulator-state-mem { - regulator-suspend-microvolt = <0x1b7740>; - regulator-on-in-suspend; - }; - }; - - DCDC_REG8 { - regulator-max-microvolt = <0x325aa0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x325aa0>; - regulator-name = "vcc_3v3_s3"; - phandle = <0x2be>; - - regulator-state-mem { - regulator-suspend-microvolt = <0x325aa0>; - regulator-on-in-suspend; - }; - }; - - NLDO_REG1 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b0>; - regulator-name = "vdd_0v75_s3"; - phandle = <0x2c4>; - - regulator-state-mem { - regulator-suspend-microvolt = <0xb71b0>; - regulator-on-in-suspend; - }; - }; - - PLDO_REG4 { - regulator-max-microvolt = <0x325aa0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x325aa0>; - regulator-name = "vcc_3v3_s0"; - phandle = <0x2c2>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG6 { - regulator-boot-on; - regulator-always-on; - regulator-name = "vdd2_ddr_s3"; - phandle = <0x2bd>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - }; - }; - }; - - usbhost3_0 { - #address-cells = <0x02>; - clock-names = "ref\0suspend\0bus\0utmi\0php\0pipe"; - clocks = <0x02 0x179 0x02 0x178 0x02 0x177 0x02 0x17a 0x02 0x166 0x02 0x181>; - #size-cells = <0x02>; - compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; - ranges; - status = "disabled"; - phandle = <0x258>; - - usb@fcd00000 { - snps,dis_enblslpm_quirk; - phy-names = "usb3-phy"; - snps,dis-u2-freeclk-exists-quirk; - phy_type = "utmi_wide"; - resets = <0x02 0x237>; - interrupts = <0x00 0xde 0x04>; - snps,dis_rxdet_inp3_quirk; - compatible = "snps,dwc3"; - snps,parkmode-disable-hs-quirk; - snps,dis-del-phy-power-chg-quirk; - status = "disabled"; - snps,parkmode-disable-ss-quirk; - phys = <0x70 0x04>; - reg = <0x00 0xfcd00000 0x00 0x400000>; - phandle = <0x259>; - dr_mode = "host"; - reset-names = "usb3-host"; - snps,dis-tx-ipgap-linecheck-quirk; - }; - }; - - pcie@fe190000 { - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x40 0x4f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x08>; - resets = <0x02 0x211 0x02 0x220>; - interrupts = <0x00 0xfd 0x04 0x00 0xfc 0x04 0x00 0xfb 0x04 0x00 0xfa 0x04 0x00 0xf9 0x04>; - clocks = <0x02 0x152 0x02 0x157 0x02 0x14d 0x02 0x15d 0x02 0x162 0x02 0x182>; - interrupt-map = <0x00 0x00 0x00 0x01 0x107 0x00 0x00 0x00 0x00 0x02 0x107 0x01 0x00 0x00 0x00 0x03 0x107 0x02 0x00 0x00 0x00 0x04 0x107 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x02>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - num-lanes = <0x01>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf4000000 0x00 0xf4000000 0x00 0x100000 0x81000000 0x00 0xf4100000 0x00 0xf4100000 0x00 0x100000 0x82000000 0x00 0xf4200000 0x00 0xf4200000 0x00 0xe00000 0xc3000000 0x0a 0x00 0x0a 0x00 0x00 0x40000000>; - msi-map = <0x4000 0x106 0x4000 0x1000>; - #interrupt-cells = <0x01>; - status = "disabled"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x108 0x02>; - num-viewport = <0x04>; - reg = <0x00 0xfe190000 0x00 0x10000 0x0a 0x41000000 0x00 0x400000>; - linux,pci-domain = <0x04>; - phandle = <0x28d>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x08>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0xfa 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x107>; - interrupt-controller; - }; - }; - - rkcif-mipi-lvds3-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x57>; - phandle = <0x238>; - }; - - aliases { - i2c3 = "/i2c@feab0000"; - ethernet0 = "/ethernet@fe1b0000"; - pwm9 = "/pwm@febe0010"; - pwm14 = "/pwm@febf0020"; - spi2 = "/spi@feb20000"; - usbdp0 = "/phy@fed80000"; - gpio0 = "/pinctrl/gpio@fd8a0000"; - dsi1 = "/dsi@fde30000"; - hdmi1 = "/hdmi@fdea0000"; - serial7 = "/serial@feba0000"; - i2c1 = "/i2c@fea90000"; - pwm7 = "/pwm@febd0030"; - pwm12 = "/pwm@febf0000"; - jpege3 = "/jpege-core@fdbac000"; - spi0 = "/spi@feb00000"; - hdptx1 = "/phy@fed70000"; - csi2dphy5 = "/csi2-dphy5"; - serial5 = "/serial@feb80000"; - csi2dcphy1 = "/csi2-dcphy1"; - pwm5 = "/pwm@febd0010"; - mmc1 = "/mmc@fe2c0000"; - pwm10 = "/pwm@febe0020"; - jpege1 = "/jpege-core@fdba4000"; - rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; - i2c8 = "/i2c@feca0000"; - dp0 = "/dp@fde50000"; - csi2dphy3 = "/csi2-dphy3"; - serial3 = "/serial@feb60000"; - edp0 = "/edp@fdec0000"; - pwm3 = "/pwm@fd8b0030"; - hdcp1 = "/hdcp@fde70000"; - rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; - i2c6 = "/i2c@fec80000"; - csi2dphy1 = "/csi2-dphy1"; - serial1 = "/serial@feb40000"; - pwm1 = "/pwm@fd8b0010"; - rkvenc0 = "/rkvenc-core@fdbd0000"; - spi5 = "/spi@fe2b0000"; - gpio3 = "/pinctrl/gpio@fec40000"; - hdptxhdmi1 = "/hdmiphy@fed70000"; - rkcif_mipi_lvds0 = "/rkcif-mipi-lvds"; - i2c4 = "/i2c@feac0000"; - ethernet1 = "/ethernet@fe1c0000"; - rkvdec0 = "/rkvdec-core@fdc38000"; - pwm15 = "/pwm@febf0030"; - hdmirx0 = "/hdmirx-controller@fdee0000"; - spi3 = "/spi@feb30000"; - usbdp1 = "/phy@fed90000"; - gpio1 = "/pinctrl/gpio@fec20000"; - serial8 = "/serial@febb0000"; - i2c2 = "/i2c@feaa0000"; - pwm8 = "/pwm@febe0000"; - pwm13 = "/pwm@febf0010"; - spi1 = "/spi@feb10000"; - dsi0 = "/dsi@fde20000"; - hdmi0 = "/hdmi@fde80000"; - serial6 = "/serial@feb90000"; - i2c0 = "/i2c@fd880000"; - pwm6 = "/pwm@febd0020"; - mmc2 = "/mmc@fe2d0000"; - pwm11 = "/pwm@febe0030"; - jpege2 = "/jpege-core@fdba8000"; - hdptx0 = "/phy@fed60000"; - rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; - dp1 = "/dp@fde60000"; - csi2dphy4 = "/csi2-dphy4"; - serial4 = "/serial@feb70000"; - edp1 = "/edp@fded0000"; - csi2dcphy0 = "/csi2-dcphy0"; - pwm4 = "/pwm@febd0000"; - mmc0 = "/mmc@fe2e0000"; - jpege0 = "/jpege-core@fdba0000"; - rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; - i2c7 = "/i2c@fec90000"; - csi2dphy2 = "/csi2-dphy2"; - serial2 = "/serial@feb50000"; - pwm2 = "/pwm@fd8b0020"; - rkvenc1 = "/rkvenc-core@fdbe0000"; - gpio4 = "/pinctrl/gpio@fec50000"; - hdcp0 = "/hdcp@fde40000"; - rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; - i2c5 = "/i2c@fead0000"; - csi2dphy0 = "/csi2-dphy0"; - serial0 = "/serial@fd890000"; - rkvdec1 = "/rkvdec-core@fdc48000"; - pwm0 = "/pwm@fd8b0000"; - spi4 = "/spi@fecb0000"; - gpio2 = "/pinctrl/gpio@fec30000"; - hdptxhdmi0 = "/hdmiphy@fed60000"; - serial9 = "/serial@febc0000"; - }; - - spdif-tx@fdde8000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x259>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc5 0x04>; - clocks = <0x02 0x25c 0x02 0x258>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfdde8000 0x00 0x1000>; - phandle = <0x47d>; - dmas = <0xf1 0x08>; - }; - - i2s@fe490000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x12d 0x12e>; - pinctrl-0 = <0x12a 0x12b>; - clock-names = "i2s_clk\0i2s_hclk"; - assigned-clocks = <0x02 0x24>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xb6 0x04>; - clocks = <0x02 0x27 0x02 0x22>; - dma-names = "tx\0rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; - pinctrl-1 = <0x12c>; - status = "disabled"; - reg = <0x00 0xfe490000 0x00 0x1000>; - phandle = <0x298>; - dmas = <0xf1 0x00 0xf1 0x01>; - rockchip,clk-trcm = <0x01>; - }; - - syscon@fd5d0000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5d0000 0x00 0x4000>; - phandle = <0x18b>; - - usb2-phy@0 { - clock-output-names = "usb480m_phy0"; - clock-names = "phyclk"; - resets = <0x02 0xc0047 0x02 0x488>; - interrupts = <0x00 0x189 0x04>; - clocks = <0x02 0x2b5>; - #clock-cells = <0x00>; - rockchip,usbctrl-grf = <0x74>; - compatible = "rockchip,rk3588-usb2phy"; - status = "okay"; - reg = <0x00 0x10>; - phandle = <0x18d>; - reset-names = "phy\0apb"; - - otg-port { - #phy-cells = <0x00>; - rockchip,typec-vbus-det; - status = "okay"; - phandle = <0x66>; - }; - }; - }; - - i2c@feac0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x14b>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb3 0x02 0xab>; - interrupts = <0x00 0x141 0x04>; - clocks = <0x02 0x90 0x02 0x88>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfeac0000 0x00 0x1000>; - phandle = <0x2a7>; - reset-names = "i2c\0apb"; - - pc9202@3c { - pinctrl-names = "default"; - pinctrl-0 = <0x14c>; - index = <0x01>; - compatible = "firefly,pc9202"; - status = "okay"; - wd-en-gpio = <0x7b 0x14 0x00>; - driver-names = "wdt_base"; - reg = <0x3c>; - }; - }; - - rkcif-mipi-lvds5-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a2>; - phandle = <0x476>; - }; - - firmware { - - optee { - method = "smc"; - compatible = "linaro,optee-tz"; - phandle = <0x222>; - }; - - sdei { - method = "smc"; - compatible = "arm,sdei-1.0"; - phandle = <0x221>; - }; - - scmi { - shmem = <0x46>; - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "arm,scmi-smc"; - phandle = <0x220>; - arm,smc-id = <0x82000010>; - - protocol@16 { - #reset-cells = <0x01>; - reg = <0x16>; - phandle = <0x11a>; - }; - - protocol@14 { - assigned-clocks = <0x0e 0x00 0x0e 0x02 0x0e 0x03>; - assigned-clock-rates = <0x30a32c00 0x30a32c00 0x30a32c00>; - #clock-cells = <0x01>; - reg = <0x14>; - phandle = <0x0e>; - }; - }; - }; - - rkvenc-core@fdbd0000 { - power-domains = <0x60 0x10>; - iommus = <0xc2>; - rockchip,ccu = <0xc3>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - assigned-clocks = <0x02 0x1c5 0x02 0x1c6>; - rockchip,task-capacity = <0x08>; - rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; - assigned-clock-rates = <0x1dcd6500 0x2faf0800>; - resets = <0x02 0x2f5 0x02 0x2f4 0x02 0x2f6>; - interrupts = <0x00 0x65 0x04>; - clocks = <0x02 0x1c5 0x02 0x1c4 0x02 0x1c6>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x07>; - compatible = "rockchip,rkv-encoder-v2-core"; - status = "okay"; - interrupt-names = "irq_rkvenc0"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdbd0000 0x00 0x6000>; - phandle = <0x272>; - reset-names = "video_a\0video_h\0video_core"; - operating-points-v2 = <0xc4>; - }; - - iommu@fdcc7f00 { - power-domains = <0x60 0x1c>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x88 0x04>; - clocks = <0x02 0x120 0x02 0x121>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "disabled"; - interrupt-names = "isp1_mmu"; - reg = <0x00 0xfdcc7f00 0x00 0x100>; - phandle = <0xd1>; - }; - - rkcif-mipi-lvds-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x52>; - phandle = <0x22b>; - }; - - syscon@fd5c8000 { - compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; - reg = <0x00 0xfd5c8000 0x00 0x4000>; - phandle = <0x18c>; - }; - - gpu@fb000000 { - power-domains = <0x60 0x0c>; - downdifferential = <0x0a>; - mali-supply = <0x62>; - clock-names = "clk_mali\0clk_gpu_coregroup\0clk_gpu_stacks\0clk_gpu"; - assigned-clocks = <0x0e 0x05>; - assigned-clock-rates = <0xbebc200>; - interrupts = <0x00 0x5e 0x04 0x00 0x5d 0x04 0x00 0x5c 0x04>; - clocks = <0x0e 0x05 0x02 0x115 0x02 0x116 0x02 0x114>; - upthreshold = <0x1e>; - compatible = "arm,mali-bifrost"; - dynamic-power-coefficient = <0xba6>; - status = "okay"; - interrupt-names = "GPU\0MMU\0JOB"; - mem-supply = <0x62>; - reg = <0x00 0xfb000000 0x00 0x200000>; - phandle = <0x5f>; - operating-points-v2 = <0x61>; - #cooling-cells = <0x02>; - }; - - csi2-dphy4 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x213>; - }; - - mipi4-csi2-hw@fdd50000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x328>; - interrupts = <0x00 0x97 0x04 0x00 0x98 0x04>; - clocks = <0x02 0x1d3>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd50000 0x00 0x10000>; - phandle = <0x4b>; - reset-names = "srst_csihost_p"; - }; - - qos@fdf82000 { - compatible = "syscon"; - reg = <0x00 0xfdf82000 0x00 0x20>; - phandle = <0x9d>; - }; - - rkcif-mipi-lvds2-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x55>; - phandle = <0x235>; - }; - - rkisp1-vir0 { - rockchip,hw = <0x5a>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x23f>; - }; - - qos@fdf41100 { - compatible = "syscon"; - reg = <0x00 0xfdf41100 0x00 0x20>; - phandle = <0xa7>; - }; - - test-power { - status = "okay"; - }; - - usb-5v { - pinctrl-names = "default"; - regulator-boot-on; - gpio = <0xfe 0x03 0x00>; - pinctrl-0 = <0x1ef>; - regulator-always-on; - enable-active-high; - regulator-name = "usb_5v"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4b1>; - }; - - phy@feda0000 { - clock-names = "pclk\0ref"; - resets = <0x02 0xc0043 0x02 0x3e 0x02 0x3f 0x02 0xc0044>; - clocks = <0x02 0x108 0x02 0x2b6>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-mipi-dcphy"; - status = "okay"; - rockchip,grf = <0x190>; - reg = <0x00 0xfeda0000 0x00 0x10000>; - phandle = <0x2f>; - reset-names = "m_phy\0apb\0grf\0s_phy"; - }; - - mod-sleep-regulator { - pinctrl-names = "default"; - regulator-boot-on; - gpio = <0x7b 0x15 0x00>; - pinctrl-0 = <0x1ee>; - regulator-always-on; - enable-active-high; - regulator-name = "mod_sleep"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4ae>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - qos@fdf66c00 { - compatible = "syscon"; - reg = <0x00 0xfdf66c00 0x00 0x20>; - phandle = <0x99>; - }; - - crypto@fe370000 { - clock-names = "aclk\0hclk\0sclk\0pka"; - resets = <0x11a 0x0f>; - interrupts = <0x00 0xd1 0x04>; - clocks = <0x0e 0x0b 0x0e 0x0c 0x0e 0x14 0x0e 0x15>; - compatible = "rockchip,rk3588-crypto"; - status = "disabled"; - reg = <0x00 0xfe370000 0x00 0x2000>; - phandle = <0x296>; - reset-names = "crypto-rst"; - }; - - i2s@fddf4000 { - power-domains = <0x60 0x1a>; - rockchip,always-on; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x249>; - assigned-clock-parents = <0x02 0x07>; - resets = <0x02 0x3ef>; - interrupts = <0x00 0xba 0x04>; - clocks = <0x02 0x24c 0x02 0x24c 0x02 0x252>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - rockchip,playback-only; - status = "okay"; - reg = <0x00 0xfddf4000 0x00 0x1000>; - phandle = <0x1e0>; - dmas = <0xf2 0x04>; - reset-names = "tx-m"; - rockchip,hdmi-path; - }; - - mipi0-csi2-hw@fdd10000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x324>; - interrupts = <0x00 0x8f 0x04 0x00 0x90 0x04>; - clocks = <0x02 0x1cf>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd10000 0x00 0x10000>; - phandle = <0x47>; - reset-names = "srst_csihost_p"; - }; - - mipi4-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x228>; - }; - - jpege-ccu { - compatible = "rockchip,vpu-jpege-ccu"; - status = "okay"; - phandle = <0xbd>; - }; - - dsi@fde30000 { - power-domains = <0x60 0x18>; - #address-cells = <0x01>; - phy-names = "dcphy"; - clock-names = "pclk\0sys_clk"; - resets = <0x02 0x355>; - interrupts = <0x00 0xa8 0x04>; - clocks = <0x02 0x279 0x02 0x27b>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-mipi-dsi2"; - status = "disabled"; - rockchip,grf = <0xd7>; - phys = <0x30>; - reg = <0x00 0xfde30000 0x00 0x10000>; - phandle = <0x283>; - reset-names = "apb"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x284>; - - endpoint@1 { - remote-endpoint = <0x3a>; - status = "disabled"; - reg = <0x01>; - phandle = <0xef>; - }; - - endpoint@0 { - remote-endpoint = <0xf4>; - status = "disabled"; - reg = <0x00>; - phandle = <0xea>; - }; - }; - }; - }; - - iommu@fcb00000 { - interrupts = <0x00 0x17d 0x04 0x00 0x17f 0x04 0x00 0x182 0x04 0x00 0x17b 0x04>; - #iommu-cells = <0x01>; - compatible = "arm,smmu-v3"; - status = "disabled"; - interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; - reg = <0x00 0xfcb00000 0x00 0x200000>; - phandle = <0x257>; - }; - - rkcif-mipi-lvds3 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x57>; - }; - - vcc-hub-regulator { - regulator-boot-on; - gpio = <0x182 0x01 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_hub"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4af>; - }; - - syscon@fd5ac000 { - compatible = "rockchip,rk3588-usb-grf\0syscon"; - reg = <0x00 0xfd5ac000 0x00 0x4000>; - phandle = <0x74>; - }; - - qos@fdf40200 { - compatible = "syscon"; - reg = <0x00 0xfdf40200 0x00 0x20>; - phandle = <0xa9>; - }; - - rkisp@fdcb0000 { - power-domains = <0x60 0x1b>; - iommus = <0xd0>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; - interrupts = <0x00 0x83 0x04 0x00 0x85 0x04 0x00 0x86 0x04>; - clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd>; - compatible = "rockchip,rk3588-rkisp"; - status = "okay"; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - reg = <0x00 0xfdcb0000 0x00 0x7f00>; - phandle = <0x58>; - }; - - serial@feba0000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x166>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x152 0x04>; - clocks = <0x02 0xcf 0x02 0xb1>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeba0000 0x00 0x100>; - phandle = <0x2cf>; - dmas = <0xf2 0x07 0xf2 0x08>; - reg-shift = <0x02>; - }; - - rkcif-mipi-lvds1-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x53>; - phandle = <0x232>; - }; - - chosen { - linux,initrd-end = <0x00 0xaac72ae>; - bootargs = "storagemedia=emmc androidboot.storagemedia=emmc androidboot.mode=normal storagenode=/mmc@fe2e0000 androidboot.verifiedbootstate=orange ro rootwait earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0 root=PARTLABEL=rootfs rootfstype=ext4 overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 net.ifnames=0 rcupdate.rcu_expedited=1 rcu_nocbs=all comm-05/28/2025 androidboot.fwver=ddr-v1.15-d5483af87d,spl-v1.13,bl31-v1.44,bl32-v1.15,uboot--boot"; - linux,initrd-start = <0x00 0xa200000>; - phandle = <0x48d>; - }; - - hdmi@fde80000 { - power-domains = <0x60 0x1a>; - reg-io-width = <0x04>; - pinctrl-names = "default"; - phy-names = "hdmi"; - pinctrl-0 = <0xf9 0xfa 0xfb 0xfc>; - clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; - resets = <0x02 0x3d0 0x02 0x49c>; - interrupts = <0x00 0xa9 0x04 0x00 0xaa 0x04 0x00 0xab 0x04 0x00 0xac 0x04 0x00 0x168 0x04>; - clocks = <0x02 0x221 0x02 0x265 0x02 0x222 0x02 0x223 0x02 0x246 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x35>; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-dw-hdmi"; - status = "okay"; - rockchip,grf = <0xc8>; - phys = <0xfd>; - enable-gpios = <0xfe 0x08 0x00>; - reg = <0x00 0xfde80000 0x00 0x10000 0x00 0xfde90000 0x00 0x10000>; - phandle = <0x1d4>; - reset-names = "ref\0hdp"; - rockchip,vo1_grf = <0xd8>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x288>; - - endpoint@1 { - remote-endpoint = <0xff>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe2>; - }; - - endpoint@2 { - remote-endpoint = <0x100>; - status = "disabled"; - reg = <0x02>; - phandle = <0xe8>; - }; - - endpoint@0 { - remote-endpoint = <0x3c>; - status = "okay"; - reg = <0x00>; - phandle = <0xdc>; - }; - }; - }; - }; - - cluster2-opp-table { - rockchip,pvtm-offset = <0x18>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,pvtm-hw = <0x06>; - nvmem-cells = <0x27 0x28 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; - rockchip,pvtm-thermal-zone = "soc-thermal"; - rockchip,pvtm-low-len-sel = <0x03>; - rockchip,high-temp-max-freq = <0x21b100>; - opp-shared; - rockchip,reboot-freq = <0x1b7740>; - rockchip,pvtm-freq = <0x188940>; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0x29>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; - phandle = <0x1a>; - rockchip,idle-threshold-freq = <0x21b100>; - rockchip,pvtm-temp-prop = <0x10e 0x10e>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0xf6180>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-j-m-2016000000 { - opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - opp-hz = <0x00 0x7829b800>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - }; - - opp-1200000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1416000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x54667200>; - opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - opp-supported-hw = <0x06 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - }; - - opp-1008000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2256000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8677d400>; - opp-supported-hw = <0xf9 0x13>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1200000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1008000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-816000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2400000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8f0d1800>; - opp-supported-hw = <0xf9 0x80>; - clock-latency-ns = <0x9c40>; - }; - - opp-1800000000 { - opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2208000000 { - opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; - opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; - opp-hz = <0x00 0x839b6800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L3 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-1608000000 { - opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-408000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1800000000 { - opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - }; - - opp-2352000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8c30ac00>; - opp-supported-hw = <0xf9 0x48>; - clock-latency-ns = <0x9c40>; - }; - - opp-816000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1608000000 { - opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; - - opp-600000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2016000000 { - opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; - opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; - opp-hz = <0x00 0x7829b800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; - opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - }; - - opp-1416000000 { - opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-hz = <0x00 0x54667200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; - opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-408000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0xf9 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - }; - - opp-2304000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x89544000>; - opp-supported-hw = <0xf9 0x24>; - clock-latency-ns = <0x9c40>; - }; - }; - - rkcif-dvp { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-dvp"; - status = "disabled"; - phandle = <0x51>; - }; - - rkisp0-vir2 { - rockchip,hw = <0x58>; - compatible = "rockchip,rkisp-vir"; - status = "okay"; - phandle = <0x23d>; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - remote-endpoint = <0x59>; - reg = <0x00>; - phandle = <0x56>; - }; - }; - }; - - i2c@fea90000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x148>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb0 0x02 0xa8>; - interrupts = <0x00 0x13e 0x04>; - clocks = <0x02 0x8d 0x02 0x85>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfea90000 0x00 0x1000>; - phandle = <0x2a4>; - reset-names = "i2c\0apb"; - - rk8602@42 { - regulator-max-microvolt = <0xe7ef0>; - regulator-boot-on; - rockchip,suspend-voltage-selector = <0x01>; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_npu_s0"; - regulator-ramp-delay = <0x8fc>; - compatible = "rockchip,rk8602"; - reg = <0x42>; - phandle = <0xb3>; - vin-supply = <0x78>; - regulator-compatible = "rk860x-reg"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - - syscon@fd58a000 { - compatible = "rockchip,rk3588-pmu1-grf\0syscon"; - reg = <0x00 0xfd58a000 0x00 0x2000>; - phandle = <0x104>; - }; - - syscon@fd5ec000 { - compatible = "rockchip,mipi-dcphy-grf\0syscon"; - reg = <0x00 0xfd5ec000 0x00 0x4000>; - phandle = <0x191>; - }; - - venc-opp-table { - nvmem-cells = <0xc6 0xc7>; - rockchip,leakage-voltage-sel = <0x01 0x0f 0x00 0x10 0x19 0x01 0x1a 0xfe 0x02>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,grf = <0xc8>; - nvmem-cell-names = "leakage\0opp-info"; - phandle = <0xc4>; - - opp-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-microvolt-L0 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - }; - }; - - iommu@fdc38700 { - power-domains = <0x60 0x0e>; - rockchip,shootdown-entire; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x60 0x04>; - clocks = <0x02 0x190 0x02 0x18f>; - rockchip,enable-cmd-retry; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "irq_rkvdec0_mmu"; - reg = <0x00 0xfdc38700 0x00 0x40 0x00 0xfdc38740 0x00 0x40>; - phandle = <0xc9>; - rockchip,master-handle-irq; - }; - - qos@fdf35200 { - compatible = "syscon"; - reg = <0x00 0xfdf35200 0x00 0x20>; - phandle = <0x88>; - }; - - qos@fdf71000 { - compatible = "syscon"; - reg = <0x00 0xfdf71000 0x00 0x20>; - phandle = <0x86>; - }; - - syscon@fd598000 { - compatible = "rockchip,rk3588-dsu-grf\0syscon"; - reg = <0x00 0xfd598000 0x00 0x100>; - phandle = <0x23>; - }; - - csi2-dphy2 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x211>; - }; - - syscon@fd5b4000 { - compatible = "rockchip,mipi-dphy-grf\0syscon"; - reg = <0x00 0xfd5b4000 0x00 0x1000>; - phandle = <0x192>; - }; - - uio@fe1b0000 { - compatible = "rockchip,uio-gmac"; - status = "disabled"; - reg = <0x00 0xfe1b0000 0x00 0x10000>; - phandle = <0x488>; - rockchip,ethernet = <0x1bd>; - }; - - iommu@fdb70f00 { - power-domains = <0x60 0x1e>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x73 0x04>; - clocks = <0x02 0x18a 0x02 0x189>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "rga3_1_mmu"; - reg = <0x00 0xfdb70f00 0x00 0x100>; - phandle = <0xba>; - }; - - vcc5v0-usb { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_usb"; - compatible = "regulator-fixed"; - phandle = <0x1dd>; - vin-supply = <0x1cd>; - }; - - fiq-debugger { - pinctrl-names = "default"; - rockchip,irq-mode-enable = <0x01>; - rockchip,baudrate = <0x1c200>; - pinctrl-0 = <0x1ce>; - interrupts = <0x00 0x1a7 0x08>; - rockchip,wake-irq = <0x00>; - compatible = "rockchip,fiq-debugger"; - status = "okay"; - phandle = <0x490>; - rockchip,serial-id = <0x02>; - }; - - phy@fed70000 { - clock-names = "ref\0apb"; - resets = <0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041>; - clocks = <0x02 0x2b5 0x02 0x268>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-hdptx-phy"; - status = "disabled"; - rockchip,grf = <0x1c7>; - reg = <0x00 0xfed70000 0x00 0x2000>; - phandle = <0x1af>; - reset-names = "apb\0init\0cmn\0lane"; - }; - - ethernet@fe1b0000 { - power-domains = <0x60 0x21>; - pinctrl-names = "default"; - phy-mode = "rgmii-rxid"; - snps,mixed-burst; - snps,mtl-rx-config = <0x1bf>; - snps,reset-active-low; - pinctrl-0 = <0x1c1 0x1c2 0x1c3 0x1c4 0x1c5>; - clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; - snps,mtl-tx-config = <0x1c0>; - local-mac-address = [da 2f 1a d4 a9 85]; - resets = <0x02 0x20a>; - interrupts = <0x00 0xe3 0x04 0x00 0xe2 0x04>; - clocks = <0x02 0x144 0x02 0x145 0x02 0x167 0x02 0x16c 0x02 0x142>; - clock_in_out = "output"; - snps,tso; - compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; - status = "okay"; - rockchip,grf = <0xc8>; - interrupt-names = "macirq\0eth_wake_irq"; - snps,reset-gpio = <0x10d 0x02 0x01>; - reg = <0x00 0xfe1b0000 0x00 0x10000>; - rockchip,php_grf = <0x76>; - phandle = <0x1bd>; - phy-handle = <0x1c6>; - reset-names = "stmmaceth"; - tx_delay = <0x31>; - snps,axi-config = <0x1be>; - snps,reset-delays-us = <0x00 0x4e20 0x186a0>; - - mdio { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "snps,dwmac-mdio"; - phandle = <0x489>; - - phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x01>; - phandle = <0x1c6>; - }; - }; - - tx-queues-config { - phandle = <0x1c0>; - snps,tx-queues-to-use = <0x01>; - - queue0 { - }; - }; - - stmmac-axi-config { - snps,wr_osr_lmt = <0x04>; - phandle = <0x1be>; - snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; - snps,rd_osr_lmt = <0x08>; - }; - - rx-queues-config { - snps,rx-queues-to-use = <0x01>; - phandle = <0x1bf>; - - queue0 { - }; - }; - }; - - pvtm@fda60000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-litcore-pvtm"; - reg = <0x00 0xfda60000 0x00 0x100>; - - pvtm@2 { - clock-names = "clk\0pclk"; - clocks = <0x02 0x2ca 0x02 0x1b>; - reg = <0x02>; - }; - }; - - rkispp@fdcd8000 { - power-domains = <0x60 0x1d>; - iommus = <0xd3>; - clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; - assigned-clocks = <0x02 0x1d9>; - assigned-clock-rates = <0x5f5e100>; - interrupts = <0x00 0x8d 0x04>; - clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; - compatible = "rockchip,rk3588-rkispp"; - status = "disabled"; - interrupt-names = "fec_irq"; - reg = <0x00 0xfdcd8000 0x00 0xf00>; - phandle = <0x5c>; - }; - - qos@fdf66000 { - compatible = "syscon"; - reg = <0x00 0xfdf66000 0x00 0x20>; - phandle = <0x93>; - }; - - syscon@fd592000 { - compatible = "rockchip,rk3588-bigcore1-grf\0syscon"; - reg = <0x00 0xfd592000 0x00 0x100>; - phandle = <0x29>; - }; - - rkcif-mipi-lvds1 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x53>; - }; - - av1d@fdc70000 { - power-domains = <0x60 0x17>; - iommus = <0xce>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - reg-names = "vcd\0cache\0afbc"; - assigned-clocks = <0x02 0x49 0x02 0x4b>; - rockchip,normal-rates = <0x17d78400 0x17d78400>; - assigned-clock-rates = <0x17d78400 0x17d78400>; - resets = <0x02 0x442 0x02 0x445>; - interrupts = <0x00 0x6c 0x04 0x00 0x6b 0x04 0x00 0x6a 0x04>; - clocks = <0x02 0x49 0x02 0x4b>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x0b>; - compatible = "rockchip,av1-decoder"; - status = "okay"; - interrupt-names = "irq_av1d\0irq_cache\0irq_afbc"; - reg = <0x00 0xfdc70000 0x00 0x800 0x00 0xfdc80000 0x00 0x400 0x00 0xfdc90000 0x00 0x400>; - phandle = <0x276>; - reset-names = "video_a\0video_h"; - }; - - qos@fdf40500 { - compatible = "syscon"; - reg = <0x00 0xfdf40500 0x00 0x20>; - phandle = <0xa3>; - }; - - vcc-hub-reset-regulator { - regulator-boot-on; - gpio = <0x182 0x04 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_hub_reset"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x4a0>; - }; - - qos@fdf72200 { - compatible = "syscon"; - reg = <0x00 0xfdf72200 0x00 0x20>; - phandle = <0x83>; - }; - - serial@feb70000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x163>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14f 0x04>; - clocks = <0x02 0xc3 0x02 0xae>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeb70000 0x00 0x100>; - phandle = <0x2cc>; - dmas = <0xf1 0x09 0xf1 0x0a>; - reg-shift = <0x02>; - }; - - rkcif-mipi-lvds2-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "okay"; - rockchip,cif = <0x55>; - phandle = <0x233>; - - port { - - endpoint { - remote-endpoint = <0x56>; - phandle = <0x59>; - }; - }; - }; - - i2c@feca0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x186>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb7 0x02 0xaf>; - interrupts = <0x00 0x145 0x04>; - clocks = <0x02 0x94 0x02 0x8c>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "disabled"; - reg = <0x00 0xfeca0000 0x00 0x1000>; - phandle = <0x2e5>; - reset-names = "i2c\0apb"; - }; - - vcc-sdcard-pwr-en-regulator { - regulator-boot-on; - gpio = <0xfe 0x07 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_sdcard_pwr_en"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4a5>; - }; - - rkcif-mipi-lvds1-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x53>; - phandle = <0x230>; - }; - - qos@fdf63000 { - compatible = "syscon"; - reg = <0x00 0xfdf63000 0x00 0x20>; - phandle = <0x8c>; - }; - - phy@fee00000 { - rockchip,pipe-grf = <0x76>; - clock-names = "refclk\0apbclk\0phpclk"; - assigned-clocks = <0x02 0x2bd>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x02 0x20005 0x02 0x4d6>; - clocks = <0x02 0x2bd 0x02 0x185 0x02 0x166>; - #phy-cells = <0x01>; - compatible = "rockchip,rk3588-naneng-combphy"; - status = "okay"; - rockchip,pipe-phy-grf = <0x194>; - reg = <0x00 0xfee00000 0x00 0x100>; - phandle = <0x108>; - reset-names = "combphy-apb\0combphy"; - }; - - can@fea50000 { - pinctrl-names = "default"; - pinctrl-0 = <0x145>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x02 0xb9 0x02 0xb8>; - interrupts = <0x00 0x155 0x04>; - clocks = <0x02 0x70 0x02 0x6f>; - compatible = "rockchip,can-2.0"; - status = "disabled"; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - reg = <0x00 0xfea50000 0x00 0x1000>; - phandle = <0x2a0>; - reset-names = "can\0can-apb"; - }; - - pdm@fe4b0000 { - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x139 0x13a>; - pinctrl-0 = <0x134 0x135 0x136 0x137>; - clock-names = "pdm_clk\0pdm_hclk"; - clocks = <0x02 0x29f 0x02 0x29e>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-pdm"; - pinctrl-1 = <0x138>; - status = "disabled"; - reg = <0x00 0xfe4b0000 0x00 0x1000>; - phandle = <0x29a>; - dmas = <0x7c 0x04>; - }; - - rkisp-unite-mmu@fdcb7f00 { - power-domains = <0x60 0x1c>; - clock-names = "aclk0\0iface0\0aclk1\0iface1"; - interrupts = <0x00 0x84 0x04 0x00 0x88 0x04>; - clocks = <0x02 0x1de 0x02 0x1df 0x02 0x120 0x02 0x121>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "disabled"; - interrupt-names = "isp0_mmu\0isp1_mmu"; - reg = <0x00 0xfdcb7f00 0x00 0x100 0x00 0xfdcc7f00 0x00 0x100>; - phandle = <0xcf>; - }; - - syscon@fd5a6000 { - clocks = <0x72>; - compatible = "rockchip,rk3588-vo-grf\0syscon"; - reg = <0x00 0xfd5a6000 0x00 0x2000>; - phandle = <0xf5>; - }; - - cpus { - #address-cells = <0x01>; - #size-cells = <0x00>; - - l2-cache-b0 { - cache-size = <0x80000>; - cache-sets = <0x400>; - compatible = "cache"; - cache-line-size = <0x40>; - next-level-cache = <0x1e>; - phandle = <0x17>; - }; - - l2-cache-l3 { - cache-size = <0x20000>; - cache-sets = <0x200>; - compatible = "cache"; - cache-line-size = <0x40>; - next-level-cache = <0x1e>; - phandle = <0x15>; - }; - - cpu@300 { - d-cache-line-size = <0x40>; - capacity-dmips-mhz = <0x212>; - clocks = <0x0e 0x00>; - i-cache-line-size = <0x40>; - cpu-idle-states = <0x10>; - device_type = "cpu"; - compatible = "arm,cortex-a55"; - d-cache-size = <0x8000>; - next-level-cache = <0x15>; - i-cache-size = <0x8000>; - reg = <0x300>; - enable-method = "psci"; - phandle = <0x09>; - d-cache-sets = <0x80>; - operating-points-v2 = <0x0f>; - i-cache-sets = <0x80>; - }; - - l2-cache-l1 { - cache-size = <0x20000>; - cache-sets = <0x200>; - compatible = "cache"; - cache-line-size = <0x40>; - next-level-cache = <0x1e>; - phandle = <0x13>; - }; - - cpu@600 { - d-cache-line-size = <0x40>; - capacity-dmips-mhz = <0x400>; - cpu-supply = <0x1c>; - clocks = <0x0e 0x03>; - i-cache-line-size = <0x40>; - cpu-idle-states = <0x10>; - device_type = "cpu"; - compatible = "arm,cortex-a76"; - dynamic-power-coefficient = <0x12c>; - d-cache-size = <0x10000>; - next-level-cache = <0x1b>; - i-cache-size = <0x10000>; - mem-supply = <0x1c>; - reg = <0x600>; - enable-method = "psci"; - phandle = <0x0c>; - d-cache-sets = <0x100>; - operating-points-v2 = <0x1a>; - i-cache-sets = <0x100>; - #cooling-cells = <0x02>; - }; - - l2-cache-b3 { - cache-size = <0x80000>; - cache-sets = <0x400>; - compatible = "cache"; - cache-line-size = <0x40>; - next-level-cache = <0x1e>; - phandle = <0x1d>; - }; - - idle-states { - entry-method = "psci"; - - cpu-sleep { - entry-latency-us = <0x64>; - local-timer-stop; - exit-latency-us = <0x78>; - arm,psci-suspend-param = <0x10000>; - compatible = "arm,idle-state"; - phandle = <0x10>; - min-residency-us = <0x3e8>; - }; - }; - - cpu-map { - - cluster2 { - - core1 { - cpu = <0x0d>; - }; - - core0 { - cpu = <0x0c>; - }; - }; - - cluster0 { - - core3 { - cpu = <0x09>; - }; - - core1 { - cpu = <0x07>; - }; - - core2 { - cpu = <0x08>; - }; - - core0 { - cpu = <0x06>; - }; - }; - - cluster1 { - - core1 { - cpu = <0x0b>; - }; - - core0 { - cpu = <0x0a>; - }; - }; - }; - - l3-cache { - cache-size = <0x300000>; - cache-sets = <0x1000>; - compatible = "cache"; - cache-line-size = <0x40>; - phandle = <0x1e>; - }; - - cpu@200 { - d-cache-line-size = <0x40>; - capacity-dmips-mhz = <0x212>; - clocks = <0x0e 0x00>; - i-cache-line-size = <0x40>; - cpu-idle-states = <0x10>; - device_type = "cpu"; - compatible = "arm,cortex-a55"; - d-cache-size = <0x8000>; - next-level-cache = <0x14>; - i-cache-size = <0x8000>; - reg = <0x200>; - enable-method = "psci"; - phandle = <0x08>; - d-cache-sets = <0x80>; - operating-points-v2 = <0x0f>; - i-cache-sets = <0x80>; - }; - - l2-cache-b1 { - cache-size = <0x80000>; - cache-sets = <0x400>; - compatible = "cache"; - cache-line-size = <0x40>; - next-level-cache = <0x1e>; - phandle = <0x19>; - }; - - cpu@500 { - d-cache-line-size = <0x40>; - capacity-dmips-mhz = <0x400>; - clocks = <0x0e 0x02>; - i-cache-line-size = <0x40>; - cpu-idle-states = <0x10>; - device_type = "cpu"; - compatible = "arm,cortex-a76"; - d-cache-size = <0x10000>; - next-level-cache = <0x19>; - i-cache-size = <0x10000>; - reg = <0x500>; - enable-method = "psci"; - phandle = <0x0b>; - d-cache-sets = <0x100>; - operating-points-v2 = <0x16>; - i-cache-sets = <0x100>; - }; - - cpu@0 { - d-cache-line-size = <0x40>; - capacity-dmips-mhz = <0x212>; - cpu-supply = <0x12>; - clocks = <0x0e 0x00>; - i-cache-line-size = <0x40>; - cpu-idle-states = <0x10>; - device_type = "cpu"; - compatible = "arm,cortex-a55"; - dynamic-power-coefficient = <0x64>; - d-cache-size = <0x8000>; - next-level-cache = <0x11>; - i-cache-size = <0x8000>; - mem-supply = <0x12>; - reg = <0x00>; - enable-method = "psci"; - phandle = <0x06>; - d-cache-sets = <0x80>; - operating-points-v2 = <0x0f>; - i-cache-sets = <0x80>; - #cooling-cells = <0x02>; - }; - - l2-cache-l2 { - cache-size = <0x20000>; - cache-sets = <0x200>; - compatible = "cache"; - cache-line-size = <0x40>; - next-level-cache = <0x1e>; - phandle = <0x14>; - }; - - l2-cache-l0 { - cache-size = <0x20000>; - cache-sets = <0x200>; - compatible = "cache"; - cache-line-size = <0x40>; - next-level-cache = <0x1e>; - phandle = <0x11>; - }; - - cpu@100 { - d-cache-line-size = <0x40>; - capacity-dmips-mhz = <0x212>; - clocks = <0x0e 0x00>; - i-cache-line-size = <0x40>; - cpu-idle-states = <0x10>; - device_type = "cpu"; - compatible = "arm,cortex-a55"; - d-cache-size = <0x8000>; - next-level-cache = <0x13>; - i-cache-size = <0x8000>; - reg = <0x100>; - enable-method = "psci"; - phandle = <0x07>; - d-cache-sets = <0x80>; - operating-points-v2 = <0x0f>; - i-cache-sets = <0x80>; - }; - - cpu@400 { - d-cache-line-size = <0x40>; - capacity-dmips-mhz = <0x400>; - cpu-supply = <0x18>; - clocks = <0x0e 0x02>; - i-cache-line-size = <0x40>; - cpu-idle-states = <0x10>; - device_type = "cpu"; - compatible = "arm,cortex-a76"; - dynamic-power-coefficient = <0x12c>; - d-cache-size = <0x10000>; - next-level-cache = <0x17>; - i-cache-size = <0x10000>; - mem-supply = <0x18>; - reg = <0x400>; - enable-method = "psci"; - phandle = <0x0a>; - d-cache-sets = <0x100>; - operating-points-v2 = <0x16>; - i-cache-sets = <0x100>; - #cooling-cells = <0x02>; - }; - - l2-cache-b2 { - cache-size = <0x80000>; - cache-sets = <0x400>; - compatible = "cache"; - cache-line-size = <0x40>; - next-level-cache = <0x1e>; - phandle = <0x1b>; - }; - - cpu@700 { - d-cache-line-size = <0x40>; - capacity-dmips-mhz = <0x400>; - clocks = <0x0e 0x03>; - i-cache-line-size = <0x40>; - cpu-idle-states = <0x10>; - device_type = "cpu"; - compatible = "arm,cortex-a76"; - d-cache-size = <0x10000>; - next-level-cache = <0x1d>; - i-cache-size = <0x10000>; - reg = <0x700>; - enable-method = "psci"; - phandle = <0x0d>; - d-cache-sets = <0x100>; - operating-points-v2 = <0x1a>; - i-cache-sets = <0x100>; - }; - }; - - vcc-hub3-reset-regulator { - gpio = <0x182 0x06 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_hub3_reset"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x4a1>; - }; - - rkispp1-vir0 { - rockchip,hw = <0x5c>; - compatible = "rockchip,rk3588-rkispp-vir"; - status = "disabled"; - phandle = <0x244>; - }; - - saradc@fec10000 { - vref-supply = <0x177>; - clock-names = "saradc\0apb_pclk"; - resets = <0x02 0xbe>; - interrupts = <0x00 0x18e 0x04>; - clocks = <0x02 0x9d 0x02 0x9c>; - #io-channel-cells = <0x01>; - compatible = "rockchip,rk3588-saradc"; - status = "okay"; - reg = <0x00 0xfec10000 0x00 0x10000>; - phandle = <0x1d9>; - reset-names = "saradc-apb"; - }; - - rkisp0-vir0 { - rockchip,hw = <0x58>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x23b>; - }; - - __symbols__ { - i2s2m0_lrck = "/pinctrl/i2s2/i2s2m0-lrck"; - i2c3 = "/i2c@feab0000"; - scmi_shmem = "/sram@10f000/sram@0"; - rkispp0_vir0 = "/rkispp0-vir0"; - qos_jpeg_enc0 = "/qos@fdf66400"; - i2s1m1_sdi1 = "/pinctrl/i2s1/i2s1m1-sdi1"; - dp_altmode_mux = "/i2c@fec80000/fusb302@22/connector/ports/port@1/endpoint"; - pmic_pins = "/pinctrl/pmic/pmic-pins"; - usb_host1_ohci = "/usb@fc8c0000"; - pwm9 = "/pwm@febe0010"; - i2c6m4_xfer = "/pinctrl/i2c6/i2c6m4-xfer"; - leds_gpio = "/pinctrl/leds/leds-gpio"; - i2c3m3_xfer = "/pinctrl/i2c3/i2c3m3-xfer"; - qos_usb3_1 = "/qos@fdf3e000"; - hdmi_debug4 = "/pinctrl/hdmi/hdmi-debug4"; - i2c0m2_xfer = "/pinctrl/i2c0/i2c0m2-xfer"; - gmac0_rgmii_bus = "/pinctrl/gmac0/gmac0-rgmii-bus"; - pcie30x2m2_pins = "/pinctrl/pcie30x2/pcie30x2m2-pins"; - sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; - spi0m3_cs0 = "/pinctrl/spi0/spi0m3-cs0"; - hwlock = "/hwspinlock@fe5a0000"; - pcie3x2 = "/pcie@fe160000"; - i2s2m1_mclk = "/pinctrl/i2s2/i2s2m1-mclk"; - mipim0_camera3_clk = "/pinctrl/mipi/mipim0-camera3-clk"; - mclkin_i2s0 = "/clocks/mclkin-i2s0"; - edp1_in_vp1 = "/edp@fded0000/ports/port@0/endpoint@1"; - rkvenc0_mmu = "/iommu@fdbdf000"; - pwm14 = "/pwm@febf0020"; - rk806_dvs2_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_rst"; - mipi2_csi2 = "/mipi2-csi2"; - can2m1_pins = "/pinctrl/can2/can2m1-pins"; - pcie2x1l1 = "/pcie@fe180000"; - hdmi0_in_vp2 = "/hdmi@fde80000/ports/port@0/endpoint@2"; - qos_rkvenc0_m2wo = "/qos@fdf60400"; - pwm3m2_pins = "/pinctrl/pwm3/pwm3m2-pins"; - optee = "/firmware/optee"; - l2_cache_b2 = "/cpus/l2-cache-b2"; - pwm0m1_pins = "/pinctrl/pwm0/pwm0m1-pins"; - vdpu = "/vdpu@fdb50400"; - i2s3_sdo = "/pinctrl/i2s3/i2s3-sdo"; - usbdp_phy0_u3 = "/phy@fed80000/u3-port"; - thermal_zones = "/thermal-zones"; - hdmim2_rx_scl = "/pinctrl/hdmi/hdmim2-rx-scl"; - hdmim2_rx_sda = "/pinctrl/hdmi/hdmim2-rx-sda"; - uart9m0_rtsn = "/pinctrl/uart9/uart9m0-rtsn"; - spi1m2_cs0 = "/pinctrl/spi1/spi1m2-cs0"; - pcie2x1l1_intc = "/pcie@fe180000/legacy-interrupt-controller"; - spdif1m1_tx = "/pinctrl/spdif1/spdif1m1-tx"; - venc_opp_info = "/otp@fecc0000/venc-opp-info@67"; - qos_iep = "/qos@fdf66000"; - pcfg_pull_none_drv_level_3 = "/pinctrl/pcfg-pull-none-drv-level-3"; - spi3m2_cs1 = "/pinctrl/spi3/spi3m2-cs1"; - uart4m2_xfer = "/pinctrl/uart4/uart4m2-xfer"; - vp1 = "/vop@fdd90000/ports/port@1"; - bigcore1_grf = "/syscon@fd592000"; - uart1m1_xfer = "/pinctrl/uart1/uart1m1-xfer"; - uart5m1_ctsn = "/pinctrl/uart5/uart5m1-ctsn"; - fspim1_pins = "/pinctrl/fspi/fspim1-pins"; - cpu_l1 = "/cpus/cpu@100"; - uart8 = "/serial@febb0000"; - rkisp1_vir3 = "/rkisp1-vir3"; - qos_vop_m1 = "/qos@fdf82200"; - pcie_clk2 = "/pcie-clk2"; - cluster2_opp_table = "/cluster2-opp-table"; - usb_grf = "/syscon@fd5ac000"; - pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; - jpege0_mmu = "/iommu@fdba0800"; - spi2m1_cs0 = "/pinctrl/spi2/spi2m1-cs0"; - u2phy3 = "/syscon@fd5dc000/usb2-phy@c000"; - power_led = "/leds/power"; - aclk_usb = "/clocks/aclk_usb@fd7c08a8"; - csi2_dphy1 = "/csi2-dphy1"; - spi2 = "/spi@feb20000"; - uart2_rtsn = "/pinctrl/uart2/uart2-rtsn"; - spi4m1_cs1 = "/pinctrl/spi4/spi4m1-cs1"; - pcfg_pull_up_drv_level_15 = "/pinctrl/pcfg-pull-up-drv-level-15"; - vo1_grf = "/syscon@fd5a8000"; - pcie_essd = "/pcie-essd"; - i2c4m3_xfer = "/pinctrl/i2c4/i2c4m3-xfer"; - gpio0 = "/pinctrl/gpio@fd8a0000"; - saradc = "/saradc@fec10000"; - i2s1m0_sdi3 = "/pinctrl/i2s1/i2s1m0-sdi3"; - i2c1m2_xfer = "/pinctrl/i2c1/i2c1m2-xfer"; - csidphy0_out = "/csi2-dphy0/ports/port@1/endpoint@0"; - emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; - mclkout_i2s3 = "/clocks/mclkout-i2s3@fd58c318"; - xc7160_out0 = "/i2c@fec80000/XC7160b@1b/port/endpoint"; - rkcif_mipi_lvds1_sditf_vir1 = "/rkcif-mipi-lvds1-sditf-vir1"; - dsi1 = "/dsi@fde30000"; - venc_opp_table = "/venc-opp-table"; - qos_isp0_mwo = "/qos@fdf40500"; - pmu_pins = "/pinctrl/pmu/pmu-pins"; - gmac0_miim = "/pinctrl/gmac0/gmac0-miim"; - spi3m0_cs0 = "/pinctrl/spi3/spi3m0-cs0"; - mipi_dcphy0 = "/mipi-dcphy-dummy"; - minidump_mem = "/reserved-memory/minidump-mem@c000000"; - avdd_1v2_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG3"; - pwm7m3_pins = "/pinctrl/pwm7/pwm7m3-pins"; - route_edp1 = "/display-subsystem/route/route-edp1"; - hdmi1 = "/hdmi@fdea0000"; - crypto = "/crypto@fe370000"; - hdmi1_in_vp2 = "/hdmi@fdea0000/ports/port@0/endpoint@2"; - dfi = "/dfi@fe060000"; - can0m0_pins = "/pinctrl/can0/can0m0-pins"; - pcfg_pull_up_drv_level_2 = "/pinctrl/pcfg-pull-up-drv-level-2"; - pinctrl = "/pinctrl"; - rgmii_phy0 = "/ethernet@fe1b0000/mdio/phy@1"; - pcfg_pull_down_drv_level_6 = "/pinctrl/pcfg-pull-down-drv-level-6"; - dp0m0_pins = "/pinctrl/dp0/dp0m0-pins"; - i2s0_sdo3 = "/pinctrl/i2s0/i2s0-sdo3"; - vcc_sata_pwr_en = "/vcc-sata-pwr-en-regulator"; - pwm1m1_pins = "/pinctrl/pwm1/pwm1m1-pins"; - pcie30_avdd1v8 = "/pcie30-avdd1v8"; - usb2phy3_grf = "/syscon@fd5dc000"; - u2phy2_host = "/syscon@fd5d8000/usb2-phy@8000/host-port"; - hym8563_int = "/pinctrl/hym8563/hym8563-int"; - mailbox1 = "/mailbox@fec70000"; - pdm0m1_sdi3 = "/pinctrl/pdm0/pdm0m1-sdi3"; - combphy1_ps = "/phy@fee10000"; - hdptxphy0_grf = "/syscon@fd5e0000"; - sdei = "/firmware/sdei"; - vp0_out_dp1 = "/vop@fdd90000/ports/port@0/endpoint@3"; - uart5m2_xfer = "/pinctrl/uart5/uart5m2-xfer"; - uart9m2_ctsn = "/pinctrl/uart9/uart9m2-ctsn"; - uart2m1_xfer = "/pinctrl/uart2/uart2m1-xfer"; - dp0_out = "/dp@fde50000/ports/port@1/endpoint"; - uart6m1_ctsn = "/pinctrl/uart6/uart6m1-ctsn"; - route_rgb = "/display-subsystem/route/route-rgb"; - csidphy0_out1 = "/csi2-dphy0/ports/port@1/endpoint@0"; - i2c1 = "/i2c@fea90000"; - pinctrl_rk806 = "/spi@feb20000/rk806single@0/pinctrl_rk806"; - cpu_code = "/otp@fecc0000/cpu-code@2"; - pwm7 = "/pwm@febd0030"; - mipi5_csi2_hw = "/mipi5-csi2-hw@fdd60000"; - gpu_leakage = "/otp@fecc0000/gpu-leakage@1b"; - hdmi_debug2 = "/pinctrl/hdmi/hdmi-debug2"; - pdm0m0_clk = "/pinctrl/pdm0/pdm0m0-clk"; - gmac0_ppsclk = "/pinctrl/gmac0/gmac0-ppsclk"; - i2c8m4_xfer = "/pinctrl/i2c8/i2c8m4-xfer"; - vdd_npu_s0 = "/i2c@fea90000/rk8602@42"; - i2c5m3_xfer = "/pinctrl/i2c5/i2c5m3-xfer"; - gmac0 = "/ethernet@fe1b0000"; - i2c2m2_xfer = "/pinctrl/i2c2/i2c2m2-xfer"; - rockchip_system_monitor = "/rockchip-system-monitor"; - pcie30x4m2_pins = "/pinctrl/pcie30x4/pcie30x4m2-pins"; - pwm12 = "/pwm@febf0000"; - emmc_cmd = "/pinctrl/emmc/emmc-cmd"; - i2s1_8ch = "/i2s@fe480000"; - pcie30x1m1_pins = "/pinctrl/pcie30x1/pcie30x1m1-pins"; - uart4_ctsn = "/pinctrl/uart4/uart4-ctsn"; - vdd_cpu_big0_mem_s0 = "/i2c@fd880000/rk8602@42"; - pcfg_pull_none = "/pinctrl/pcfg-pull-none"; - i2s1m0_mclk = "/pinctrl/i2s1/i2s1m0-mclk"; - vp1_out_edp1 = "/vop@fdd90000/ports/port@1/endpoint@4"; - hdmi0_in_vp0 = "/hdmi@fde80000/ports/port@0/endpoint@0"; - vcc_4g = "/vcc-4g-regulator"; - firefly_leds = "/leds"; - jpege3 = "/jpege-core@fdbac000"; - l2_cache_b0 = "/cpus/l2-cache-b0"; - pmu1_grf = "/syscon@fd58a000"; - aclk_rkvenc1_pre = "/clocks/aclk_rkvenc1_pre@fd7c08c0"; - can1m0_pins = "/pinctrl/can1/can1m0-pins"; - spi0m3_pins = "/pinctrl/spi0/spi0m3-pins"; - pwm5m2_pins = "/pinctrl/pwm5/pwm5m2-pins"; - mipidphy0_in_ucam1 = "/csi2-dphy0/ports/port@0/endpoint@1"; - i2s0_lrck = "/pinctrl/i2s0/i2s0-lrck"; - clk32k_out0 = "/pinctrl/clk32k/clk32k-out0"; - dp1m0_pins = "/pinctrl/dp1/dp1m0-pins"; - pwm2m1_pins = "/pinctrl/pwm2/pwm2m1-pins"; - usbc0 = "/i2c@fec80000/fusb302@22"; - eth1_pins = "/pinctrl/eth1/eth1-pins"; - pcfg_pull_none_drv_level_1 = "/pinctrl/pcfg-pull-none-drv-level-1"; - csi2_dphy0_hw = "/csi2-dphy0-hw@fedc0000"; - pdm1m1_sdi3 = "/pinctrl/pdm1/pdm1m1-sdi3"; - dsi0_in_vp3 = "/dsi@fde20000/ports/port@0/endpoint@1"; - hdmim1_tx1_cec = "/pinctrl/hdmi/hdmim1-tx1-cec"; - usbc0_role_sw = "/i2c@fec80000/fusb302@22/ports/port@0/endpoint@0"; - uart6 = "/serial@feb90000"; - rkisp1_vir1 = "/rkisp1-vir1"; - sdhci = "/mmc@fe2e0000"; - uart6m2_xfer = "/pinctrl/uart6/uart6m2-xfer"; - target = "/thermal-zones/soc-thermal/trips/trip-point-1"; - rkcif_mipi_lvds_sditf_vir3 = "/rkcif-mipi-lvds-sditf-vir3"; - pcfg_pull_none_drv_level_0_smt = "/pinctrl/pcfg-pull-none-drv-level-0-smt"; - uart3m1_xfer = "/pinctrl/uart3/uart3m1-xfer"; - uart7m1_ctsn = "/pinctrl/uart7/uart7m1-ctsn"; - uart0m0_xfer = "/pinctrl/uart0/uart0m0-xfer"; - rgb_in_vp3 = "/syscon@fd58c000/rgb/ports/port@0/endpoint@2"; - rkcif_mipi_lvds5_sditf_vir2 = "/rkcif-mipi-lvds5-sditf-vir2"; - u2phy1 = "/syscon@fd5d4000/usb2-phy@4000"; - i2s5_8ch = "/i2s@fddf0000"; - i2s2m0_sdo = "/pinctrl/i2s2/i2s2m0-sdo"; - gpu = "/gpu@fb000000"; - spi0 = "/spi@feb00000"; - iep = "/iep@fdbb0000"; - pcfg_pull_up_drv_level_13 = "/pinctrl/pcfg-pull-up-drv-level-13"; - spdif_tx5 = "/spdif-tx@fddb8000"; - hdptxphy_hdmi_clk1 = "/hdmiphy@fed70000/clk-port"; - drm_logo = "/reserved-memory/drm-logo@00000000"; - i2s1m0_sdi1 = "/pinctrl/i2s1/i2s1m0-sdi1"; - rk806_dvs3_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_null"; - gmac1_ppsclk = "/pinctrl/gmac1/gmac1-ppsclk"; - usb_host0_ohci = "/usb@fc840000"; - mclkout_i2s1 = "/clocks/mclkout-i2s1@fd58c318"; - i2c6m3_xfer = "/pinctrl/i2c6/i2c6m3-xfer"; - i2c3m2_xfer = "/pinctrl/i2c3/i2c3m2-xfer"; - vop_opp_info = "/otp@fecc0000/vop-opp-info@61"; - cif_dvp_bus16 = "/pinctrl/cif/cif-dvp-bus16"; - i2c0m1_xfer = "/pinctrl/i2c0/i2c0m1-xfer"; - pcie30x2m1_pins = "/pinctrl/pcie30x2/pcie30x2m1-pins"; - mipidcphy0_grf = "/syscon@fd5e8000"; - vdd_cpu_big1_mem_s0 = "/i2c@fd880000/rk8603@43"; - pcie30phy = "/phy@fee80000"; - dmc = "/dmc"; - i2s2m0_mclk = "/pinctrl/i2s2/i2s2m0-mclk"; - mipidcphy1 = "/phy@fedb0000"; - dp1_sound = "/dp1-sound"; - hdmi1_in_vp0 = "/hdmi@fdea0000/ports/port@0/endpoint@0"; - scmi = "/firmware/scmi"; - pcfg_pull_up_drv_level_0 = "/pinctrl/pcfg-pull-up-drv-level-0"; - gmac1_clkinout = "/pinctrl/gmac1/gmac1-clkinout"; - pcfg_pull_down_drv_level_4 = "/pinctrl/pcfg-pull-down-drv-level-4"; - i2s0_sdo1 = "/pinctrl/i2s0/i2s0-sdo1"; - l3_cache = "/cpus/l3-cache"; - i2s3_idle = "/pinctrl/i2s3/i2s3-idle"; - pcfg_pull_none_drv_level_4_smt = "/pinctrl/pcfg-pull-none-drv-level-4-smt"; - litcpu_pins = "/pinctrl/litcpu/litcpu-pins"; - mipi1_csi2 = "/mipi1-csi2"; - can2m0_pins = "/pinctrl/can2/can2m0-pins"; - pwm6m2_pins = "/pinctrl/pwm6/pwm6m2-pins"; - usbdp_phy0 = "/phy@fed80000"; - pdm0m1_sdi1 = "/pinctrl/pdm0/pdm0m1-sdi1"; - pwm3m1_pins = "/pinctrl/pwm3/pwm3m1-pins"; - vdd_log_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG3"; - i2s9_8ch = "/i2s@fddfc000"; - pwm0m0_pins = "/pinctrl/pwm0/pwm0m0-pins"; - vcc_hub3_reset = "/vcc-hub3-reset-regulator"; - dsi1_in_vp3 = "/dsi@fde30000/ports/port@0/endpoint@1"; - otp_cpu_version = "/otp@fecc0000/cpu-version@1c"; - pcie2x1l0_intc = "/pcie@fe170000/legacy-interrupt-controller"; - spdif0m1_tx = "/pinctrl/spdif0/spdif0m1-tx"; - pcfg_pull_down_drv_level_15 = "/pinctrl/pcfg-pull-down-drv-level-15"; - XC7160 = "/i2c@fec80000/XC7160b@1b"; - rkcif_mipi_lvds4_sditf_vir3 = "/rkcif-mipi-lvds4-sditf-vir3"; - uart7m2_xfer = "/pinctrl/uart7/uart7m2-xfer"; - uart4m1_xfer = "/pinctrl/uart4/uart4m1-xfer"; - hdmim1_tx1_scl = "/pinctrl/hdmi/hdmim1-tx1-scl"; - hdmim1_tx1_sda = "/pinctrl/hdmi/hdmim1-tx1-sda"; - uart8m1_ctsn = "/pinctrl/uart8/uart8m1-ctsn"; - i2s2_2ch = "/i2s@fe490000"; - pwm5 = "/pwm@febd0010"; - uart1m0_xfer = "/pinctrl/uart1/uart1m0-xfer"; - uart5m0_ctsn = "/pinctrl/uart5/uart5m0-ctsn"; - fspim0_cs1 = "/pinctrl/fspi/fspim0-cs1"; - fspim0_pins = "/pinctrl/fspi/fspim0-pins"; - rkisp0_vir3 = "/rkisp0-vir3"; - l2_cache_l3 = "/cpus/l2-cache-l3"; - rk806_dvs3_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_dvs"; - hdmi_debug0 = "/pinctrl/hdmi/hdmi-debug0"; - hdmim1_tx1_hpd = "/pinctrl/hdmi/hdmim1-tx1-hpd"; - vp1_out_dp0 = "/vop@fdd90000/ports/port@1/endpoint@0"; - qos_isp0_mro = "/qos@fdf40400"; - spi0m2_cs1 = "/pinctrl/spi0/spi0m2-cs1"; - vdd_gpu_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; - tsadc_shut = "/pinctrl/tsadc/tsadc-shut"; - pwm10 = "/pwm@febe0020"; - i2c7m3_xfer = "/pinctrl/i2c7/i2c7m3-xfer"; - rktimer = "/timer@feae0000"; - cpub0_leakage = "/otp@fecc0000/cpub0-leakage@17"; - i2c4m2_xfer = "/pinctrl/i2c4/i2c4m2-xfer"; - hclk_rkvdec1_pre = "/clocks/hclk_rkvdec1_pre@fd7c08a4"; - pcie30phy_pins = "/pinctrl/pcie30phy/pcie30phy-pins"; - jpege1 = "/jpege-core@fdba4000"; - pcfg_pull_none_drv_level_14 = "/pinctrl/pcfg-pull-none-drv-level-14"; - i2c1m1_xfer = "/pinctrl/i2c1/i2c1m1-xfer"; - rkcif_dvp_sditf = "/rkcif-dvp-sditf"; - rkcif_mipi_lvds4_sditf = "/rkcif-mipi-lvds4-sditf"; - vp2_out_dp1 = "/vop@fdd90000/ports/port@2/endpoint@5"; - vp2_out_dsi0 = "/vop@fdd90000/ports/port@2/endpoint@3"; - its1 = "/interrupt-controller@fe600000/msi-controller@fe660000"; - cpu_b3 = "/cpus/cpu@700"; - vcc_hub_reset = "/vcc-hub-reset-regulator"; - spi1m1_cs1 = "/pinctrl/spi1/spi1m1-cs1"; - vdd_npu_mem_s0 = "/i2c@fea90000/rk8602@42"; - pwm7m2_pins = "/pinctrl/pwm7/pwm7m2-pins"; - pdm1m1_sdi1 = "/pinctrl/pdm1/pdm1m1-sdi1"; - vbus5v0_typec_pwr_en = "/vbus5v0-typec-pwr-en-regulator"; - pwm4m1_pins = "/pinctrl/pwm4/pwm4m1-pins"; - dmc_opp_table = "/dmc-opp-table"; - pcie30x4_button_rstn = "/pinctrl/pcie30x4/pcie30x4-button-rstn"; - uart4 = "/serial@feb70000"; - pwm1m0_pins = "/pinctrl/pwm1/pwm1m0-pins"; - spi0m0_cs0 = "/pinctrl/spi0/spi0m0-cs0"; - pldo6_s3 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG6"; - mipim1_camera2_clk = "/pinctrl/mipi/mipim1-camera2-clk"; - mipim0_camera0_clk = "/pinctrl/mipi/mipim0-camera0-clk"; - rkcif_mipi_lvds_sditf_vir1 = "/rkcif-mipi-lvds-sditf-vir1"; - pcfg_pull_up_drv_level_9 = "/pinctrl/pcfg-pull-up-drv-level-9"; - dmac2 = "/dma-controller@fed10000"; - pdm0m0_sdi3 = "/pinctrl/pdm0/pdm0m0-sdi3"; - qos_gpu_m2 = "/qos@fdf35400"; - i2s0_sdi3 = "/pinctrl/i2s0/i2s0-sdi3"; - cluster0_opp_table = "/cluster0-opp-table"; - spi2m0_cs1 = "/pinctrl/spi2/spi2m0-cs1"; - otp_id = "/otp@fecc0000/id@7"; - uart5m1_xfer = "/pinctrl/uart5/uart5m1-xfer"; - uart9m1_ctsn = "/pinctrl/uart9/uart9m1-ctsn"; - qos_rga3_0 = "/qos@fdf67000"; - usbdp_phy0_dp = "/phy@fed80000/dp-port"; - uart2m0_xfer = "/pinctrl/uart2/uart2m0-xfer"; - uart6m0_ctsn = "/pinctrl/uart6/uart6m0-ctsn"; - npu_pins = "/pinctrl/npu/npu-pins"; - pcfg_pull_up_drv_level_11 = "/pinctrl/pcfg-pull-up-drv-level-11"; - spdif_tx3 = "/spdif-tx@fdde0000"; - rkispp0 = "/rkispp@fdcd0000"; - xin32k = "/clocks/xin32k"; - vcc_1v8_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG10"; - qos_usb2host_1 = "/qos@fdf3e600"; - bt_sco = "/bt-sco"; - pcfg_output_high_pull_none = "/pinctrl/pcfg-output-high-pull-none"; - adc_keys = "/adc-keys"; - rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; - i2c8 = "/i2c@feca0000"; - dp0 = "/dp@fde50000"; - mipi_te1 = "/pinctrl/mipi/mipi-te1"; - i2c8m3_xfer = "/pinctrl/i2c8/i2c8m3-xfer"; - i2c5m2_xfer = "/pinctrl/i2c5/i2c5m2-xfer"; - pcie30x2_button_rstn = "/pinctrl/pcie30x2/pcie30x2-button-rstn"; - syssram = "/sram@ff001000"; - pcfg_pull_down_drv_level_2 = "/pinctrl/pcfg-pull-down-drv-level-2"; - qos_hdmirx = "/qos@fdf81200"; - i2c2m1_xfer = "/pinctrl/i2c2/i2c2m1-xfer"; - pcie30x4m1_pins = "/pinctrl/pcie30x4/pcie30x4m1-pins"; - vdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG5"; - hw_decompress = "/decompress@fea80000"; - pcie30x1m0_pins = "/pinctrl/pcie30x1/pcie30x1m0-pins"; - mipim0_camera4_clk = "/pinctrl/mipi/mipim0-camera4-clk"; - gmac1_txer = "/pinctrl/gmac1/gmac1-txer"; - uart3_ctsn = "/pinctrl/uart3/uart3-ctsn"; - vcc_sdcard_pwr_en = "/vcc-sdcard-pwr-en-regulator"; - mipi0_csi2_hw = "/mipi0-csi2-hw@fdd10000"; - rkvenc1_mmu = "/iommu@fdbef000"; - edp0 = "/edp@fdec0000"; - rkvenc_ccu = "/rkvenc-ccu"; - rk806_dvs3_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_rst"; - power = "/power-management@fd8d8000/power-controller"; - vad = "/vad@fe4d0000"; - spi3m3_pins = "/pinctrl/spi3/spi3m3-pins"; - pwm8m2_pins = "/pinctrl/pwm8/pwm8m2-pins"; - spi0m2_pins = "/pinctrl/spi0/spi0m2-pins"; - pwm5m1_pins = "/pinctrl/pwm5/pwm5m1-pins"; - vcc_3v3_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG4"; - aclk_isp1_pre = "/clocks/aclk_isp1_pre@fd7c0868"; - pwm2m0_pins = "/pinctrl/pwm2/pwm2m0-pins"; - i2s1m1_sdo2 = "/pinctrl/i2s1/i2s1m1-sdo2"; - pcfg_pull_down_drv_level_13 = "/pinctrl/pcfg-pull-down-drv-level-13"; - eth0_pins = "/pinctrl/eth0/eth0-pins"; - rkcif_mipi_lvds4_sditf_vir1 = "/rkcif-mipi-lvds4-sditf-vir1"; - pwm3 = "/pwm@fd8b0030"; - pdm1m0_sdi3 = "/pinctrl/pdm1/pdm1m0-sdi3"; - rkcif_mmu = "/iommu@fdce0800"; - usbc0_int = "/pinctrl/usb-typec/usbc0-int"; - gmac0_tx_bus2 = "/pinctrl/gmac0/gmac0-tx-bus2"; - sata2 = "/sata@fe230000"; - uart9m2_xfer = "/pinctrl/uart9/uart9m2-xfer"; - dp0_in_vp2 = "/dp@fde50000/ports/port@0/endpoint@2"; - hdmiin_sound = "/hdmiin-sound"; - rkisp0_vir1 = "/rkisp0-vir1"; - uart6_gpios = "/pinctrl/wireless-bluetooth/uart6-gpios"; - spi3m3_cs1 = "/pinctrl/spi3/spi3m3-cs1"; - l2_cache_l1 = "/cpus/l2-cache-l1"; - pcfg_pull_none_drv_level_8 = "/pinctrl/pcfg-pull-none-drv-level-8"; - uart6m1_xfer = "/pinctrl/uart6/uart6m1-xfer"; - pwm11m3_pins = "/pinctrl/pwm11/pwm11m3-pins"; - vp2_out_hdmi0 = "/vop@fdd90000/ports/port@2/endpoint@2"; - qos_hdcp1 = "/qos@fdf81000"; - scmi_reset = "/firmware/scmi/protocol@16"; - vdd_cpu_lit_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; - i2s0_mclk = "/pinctrl/i2s0/i2s0-mclk"; - uart3m0_xfer = "/pinctrl/uart3/uart3m0-xfer"; - uart7m0_ctsn = "/pinctrl/uart7/uart7m0-ctsn"; - usbhost_dwc3_0 = "/usbhost3_0/usb@fcd00000"; - hdmim0_rx_hpdin = "/pinctrl/hdmi/hdmim0-rx-hpdin"; - edp0_out = "/edp@fdec0000/ports/port@1/endpoint"; - rkisp0 = "/rkisp@fdcb0000"; - dsu_grf = "/syscon@fd598000"; - vcc_fan_pwr_en = "/vcc-fan-pwr-en-regulator"; - gmac1_rx_bus2 = "/pinctrl/gmac1/gmac1-rx-bus2"; - uart1m2_rtsn = "/pinctrl/uart1/uart1m2-rtsn"; - csi2_dcphy0 = "/csi2-dcphy0"; - usb2phy0_grf = "/syscon@fd5d0000"; - scmi_clk = "/firmware/scmi/protocol@14"; - emmc_clk = "/pinctrl/emmc/emmc-clk"; - jpege1_mmu = "/iommu@fdba4800"; - qos_rkvenc1_m1ro = "/qos@fdf61200"; - spi2m2_cs0 = "/pinctrl/spi2/spi2m2-cs0"; - vcc5v0_host = "/vcc5v0-host"; - cru = "/clock-controller@fd7c0000"; - hdmim0_tx0_cec = "/pinctrl/hdmi/hdmim0-tx0-cec"; - pcfg_pull_none_drv_level_12 = "/pinctrl/pcfg-pull-none-drv-level-12"; - rk806_dvs2_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_null"; - cpub01_opp_info = "/otp@fecc0000/cpub01-opp-info@43"; - i2s3_sdi = "/pinctrl/i2s3/i2s3-sdi"; - aclk_rkvdec0_pre = "/clocks/aclk_rkvdec0_pre@fd7c08a0"; - cpu_b1 = "/cpus/cpu@500"; - i2c6m2_xfer = "/pinctrl/i2c6/i2c6m2-xfer"; - rknpu_mmu = "/iommu@fdab9000"; - rkcif_mipi_lvds_sditf = "/rkcif-mipi-lvds-sditf"; - i2c3m1_xfer = "/pinctrl/i2c3/i2c3m1-xfer"; - i2c0m0_xfer = "/pinctrl/i2c0/i2c0m0-xfer"; - pcie30x2m0_pins = "/pinctrl/pcie30x2/pcie30x2m0-pins"; - qos_isp1_mwo = "/qos@fdf41000"; - mipi2_csi2_output1 = "/mipi2-csi2/ports/port@1/endpoint@0"; - gmac1_stmmac_axi_setup = "/ethernet@fe1c0000/stmmac-axi-config"; - vcc5v0_usbdcin = "/vcc5v0-usbdcin"; - spi3m1_cs0 = "/pinctrl/spi3/spi3m1-cs0"; - reboot_mode = "/syscon@fd588000/reboot-mode"; - rga3_0_mmu = "/iommu@fdb60f00"; - uart2 = "/serial@feb50000"; - imx415_out0 = "/i2c@fec80000/imx415@37/port/endpoint"; - rkcif_mipi_lvds3_sditf_vir2 = "/rkcif-mipi-lvds3-sditf-vir2"; - pwm9m2_pins = "/pinctrl/pwm9/pwm9m2-pins"; - fec0_mmu = "/iommu@fdcd0f00"; - mipi0_csi2 = "/mipi0-csi2"; - spi1m2_pins = "/pinctrl/spi1/spi1m2-pins"; - pcfg_pull_up_drv_level_7 = "/pinctrl/pcfg-pull-up-drv-level-7"; - pwm6m1_pins = "/pinctrl/pwm6/pwm6m1-pins"; - tsadc_shut_org = "/pinctrl/tsadc/tsadc-shut-org"; - qos_rkvdec1 = "/qos@fdf63000"; - dmac0 = "/dma-controller@fea10000"; - vp2_out_edp1 = "/vop@fdd90000/ports/port@2/endpoint@6"; - pdm0m0_sdi1 = "/pinctrl/pdm0/pdm0m0-sdi1"; - qos_gpu_m0 = "/qos@fdf35000"; - pwm3m0_pins = "/pinctrl/pwm3/pwm3m0-pins"; - i2s0_sdi1 = "/pinctrl/i2s0/i2s0-sdi1"; - qos_av1 = "/qos@fdf64000"; - pcfg_output_low = "/pinctrl/pcfg-output-low"; - spdif_tx1 = "/spdif-tx@fe4f0000"; - hdptxphy1_grf = "/syscon@fd5e4000"; - spi4m0_cs0 = "/pinctrl/spi4/spi4m0-cs0"; - dp1_in_vp2 = "/dp@fde60000/ports/port@0/endpoint@2"; - jpegd_mmu = "/iommu@fdb90480"; - sata0m1_pins = "/pinctrl/sata0/sata0m1-pins"; - uart7m1_xfer = "/pinctrl/uart7/uart7m1-xfer"; - vp1_out_hdmi1 = "/vop@fdd90000/ports/port@1/endpoint@5"; - dp1_out = "/dp@fde60000/ports/port@1/endpoint"; - otp = "/otp@fecc0000"; - uart4m0_xfer = "/pinctrl/uart4/uart4m0-xfer"; - uart8m0_ctsn = "/pinctrl/uart8/uart8m0-ctsn"; - hdcp1 = "/hdcp@fde70000"; - rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; - i2c6 = "/i2c@fec80000"; - qos_jpeg_enc3 = "/qos@fdf66a00"; - i2s2m1_idle = "/pinctrl/i2s2/i2s2m1-idle"; - refclk_pins = "/pinctrl/refclk/refclk-pins"; - pcie3x4_intc = "/pcie@fe150000/legacy-interrupt-controller"; - hdptxphy_hdmi1 = "/hdmiphy@fed70000"; - mipi2_lvds2_sditf = "/rkcif-mipi-lvds2-sditf/port/endpoint"; - pdm1 = "/pdm@fe4c0000"; - vdd_cpu_lit_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; - pdm0m1_clk = "/pinctrl/pdm0/pdm0m1-clk"; - pcfg_pull_down_drv_level_0 = "/pinctrl/pcfg-pull-down-drv-level-0"; - qos_vicap_m0 = "/qos@fdf40600"; - gic = "/interrupt-controller@fe600000"; - vdd_cpu_big1_s0 = "/i2c@fd880000/rk8603@43"; - uart0_rtsn = "/pinctrl/uart0/uart0-rtsn"; - i2c7m2_xfer = "/pinctrl/i2c7/i2c7m2-xfer"; - mclkin_i2s3 = "/clocks/mclkin-i2s3"; - hdmim0_tx0_scl = "/pinctrl/hdmi/hdmim0-tx0-scl"; - hdmim0_tx0_sda = "/pinctrl/hdmi/hdmim0-tx0-sda"; - i2c4m1_xfer = "/pinctrl/i2c4/i2c4m1-xfer"; - spdif1m0_tx = "/pinctrl/spdif1/spdif1m0-tx"; - sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; - i2c1m0_xfer = "/pinctrl/i2c1/i2c1m0-xfer"; - rkcif_mipi_lvds2_sditf_vir3 = "/rkcif-mipi-lvds2-sditf-vir3"; - hdptxphy1 = "/phy@fed70000"; - route_dp1 = "/display-subsystem/route/route-dp1"; - hdmim0_tx0_hpd = "/pinctrl/hdmi/hdmim0-tx0-hpd"; - i2s1m1_sdo0 = "/pinctrl/i2s1/i2s1m1-sdo0"; - pdm1m0_clk = "/pinctrl/pdm1/pdm1m0-clk"; - pcfg_pull_down_drv_level_11 = "/pinctrl/pcfg-pull-down-drv-level-11"; - usbdrd3_1 = "/usbdrd3_1"; - spi2m2_pins = "/pinctrl/spi2/spi2m2-pins"; - pwm7m1_pins = "/pinctrl/pwm7/pwm7m1-pins"; - rkcif_mipi_lvds1_sditf = "/rkcif-mipi-lvds1-sditf"; - pwm1 = "/pwm@fd8b0010"; - pdm1m0_sdi1 = "/pinctrl/pdm1/pdm1m0-sdi1"; - threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; - pwm4m0_pins = "/pinctrl/pwm4/pwm4m0-pins"; - gmac0_mtl_rx_setup = "/ethernet@fe1b0000/rx-queues-config"; - sata0 = "/sata@fe210000"; - dp0_in_vp0 = "/dp@fde50000/ports/port@0/endpoint@0"; - can2 = "/can@fea70000"; - pcfg_pull_none_drv_level_6 = "/pinctrl/pcfg-pull-none-drv-level-6"; - usbdrd_dwc3_0 = "/usbdrd3_0/usb@fc000000"; - rkvenc0 = "/rkvenc-core@fdbd0000"; - bt_reset_gpio = "/pinctrl/wireless-bluetooth/bt-reset-gpio"; - sata1m1_pins = "/pinctrl/sata1/sata1m1-pins"; - spll = "/clocks/spll"; - uart8m1_xfer = "/pinctrl/uart8/uart8m1-xfer"; - sata_pins = "/pinctrl/sata/sata-pins"; - pcfg_pull_none_drv_level_1_smt = "/pinctrl/pcfg-pull-none-drv-level-1-smt"; - qos_npu1 = "/qos@fdf70000"; - uart5m0_xfer = "/pinctrl/uart5/uart5m0-xfer"; - uart9m0_ctsn = "/pinctrl/uart9/uart9m0-ctsn"; - pwm10m2_pins = "/pinctrl/pwm10/pwm10m2-pins"; - rk806_dvs1_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_pwrdn"; - pipe_phy0_grf = "/syscon@fd5bc000"; - es8388 = "/i2c@fec80000/es8388@11"; - spdif_rx2 = "/spdif-rx@fde18000"; - usb_host1_ehci = "/usb@fc880000"; - xin24m = "/clocks/xin24m"; - pcie20x1_2_button_rstn = "/pinctrl/pcie20x1/pcie20x1-2-button-rstn"; - mipi2_csi2_hw = "/mipi2-csi2-hw@fdd30000"; - acdcdig_dsm = "/codec-digital@fe500000"; - vop_grf = "/syscon@fd5a4000"; - rk806_dvs1_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_slp"; - i2s6_8ch = "/i2s@fddf4000"; - i2s2m1_sdo = "/pinctrl/i2s2/i2s2m1-sdo"; - pcie30x1_1_button_rstn = "/pinctrl/pcie30x1/pcie30x1-1-button-rstn"; - pcfg_output_low_pull_down = "/pinctrl/pcfg-output-low-pull-down"; - pcfg_pull_none_drv_level_10 = "/pinctrl/pcfg-pull-none-drv-level-10"; - pdm0m1_clk1 = "/pinctrl/pdm0/pdm0m1-clk1"; - mipidphy0_grf = "/syscon@fd5b4000"; - route_dsi1 = "/display-subsystem/route/route-dsi1"; - route_hdmi0 = "/display-subsystem/route/route-hdmi0"; - rkvdec_ccu = "/rkvdec-ccu@fdc30000"; - csi2_dphy4 = "/csi2-dphy4"; - gmac1_rgmii_bus = "/pinctrl/gmac1/gmac1-rgmii-bus"; - qos_sdio = "/qos@fdf39000"; - tsadc = "/tsadc@fec00000"; - pcfg_output_high_pull_up = "/pinctrl/pcfg-output-high-pull-up"; - hclk_usb = "/clocks/hclk_usb@fd7c08a8"; - avcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG1"; - edp0_in_vp2 = "/edp@fdec0000/ports/port@0/endpoint@2"; - mdio1 = "/ethernet@fe1c0000/mdio"; - gpio3 = "/pinctrl/gpio@fec40000"; - gpu_opp_table = "/gpu-opp-table"; - cif_mipi2_in0 = "/rkcif-mipi-lvds2/port/endpoint"; - pcfg_output_high = "/pinctrl/pcfg-output-high"; - i2c8m2_xfer = "/pinctrl/i2c8/i2c8m2-xfer"; - vdpu_mmu = "/iommu@fdb50800"; - i2c5m1_xfer = "/pinctrl/i2c5/i2c5m1-xfer"; - combphy0_ps = "/phy@fee00000"; - rgb = "/syscon@fd58c000/rgb"; - hclk_vo1 = "/clocks/hclk_vo1@fd7c08ec"; - i2c2m0_xfer = "/pinctrl/i2c2/i2c2m0-xfer"; - uart0 = "/serial@fd890000"; - mipidcphy1_grf = "/syscon@fd5ec000"; - pcie30x4m0_pins = "/pinctrl/pcie30x4/pcie30x4m0-pins"; - vdd_ddr_pll_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG2"; - gmac0_txer = "/pinctrl/gmac0/gmac0-txer"; - uart2_ctsn = "/pinctrl/uart2/uart2-ctsn"; - pcfg_pull_up_drv_level_5 = "/pinctrl/pcfg-pull-up-drv-level-5"; - pcfg_pull_down_drv_level_9 = "/pinctrl/pcfg-pull-down-drv-level-9"; - pcfg_pull_none_drv_level_5_smt = "/pinctrl/pcfg-pull-none-drv-level-5-smt"; - i2s2m0_sdi = "/pinctrl/i2s2/i2s2m0-sdi"; - qos_rga2_mwo = "/qos@fdf66e00"; - spi3m2_pins = "/pinctrl/spi3/spi3m2-pins"; - pwm8m1_pins = "/pinctrl/pwm8/pwm8m1-pins"; - dsi1_in = "/dsi@fde30000/ports/port@0"; - vp3_out_dsi0 = "/vop@fdd90000/ports/port@3/endpoint@0"; - pclk_vo0_grf = "/clocks/pclk_vo0_grf@fd7c08dc"; - spi0m1_pins = "/pinctrl/spi0/spi0m1-pins"; - pwm5m0_pins = "/pinctrl/pwm5/pwm5m0-pins"; - bt1120_pins = "/pinctrl/bt1120/bt1120-pins"; - dp1_in_vp0 = "/dp@fde60000/ports/port@0/endpoint@0"; - i2s1m0_sdo2 = "/pinctrl/i2s1/i2s1m0-sdo2"; - mipi2_csi2_input0 = "/mipi2-csi2/ports/port@0/endpoint@0"; - u2phy0_otg = "/syscon@fd5d0000/usb2-phy@0/otg-port"; - vp0_out_edp0 = "/vop@fdd90000/ports/port@0/endpoint@1"; - qos_fisheye0 = "/qos@fdf40000"; - i2c4 = "/i2c@feac0000"; - sata2m1_pins = "/pinctrl/sata2/sata2m1-pins"; - uart9m1_xfer = "/pinctrl/uart9/uart9m1-xfer"; - qos_jpeg_enc1 = "/qos@fdf66600"; - i2s1m1_sdi2 = "/pinctrl/i2s1/i2s1m1-sdi2"; - i2s3_2ch = "/i2s@fe4a0000"; - uart6m0_xfer = "/pinctrl/uart6/uart6m0-xfer"; - cpul_leakage = "/otp@fecc0000/cpul-leakage@19"; - pwm11m2_pins = "/pinctrl/pwm11/pwm11m2-pins"; - fspim1_cs1 = "/pinctrl/fspi/fspim1-cs1"; - vdd_vdenc_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; - pdm1m1_clk1 = "/pinctrl/pdm1/pdm1m1-clk1"; - hdmi_debug5 = "/pinctrl/hdmi/hdmi-debug5"; - uart1m1_rtsn = "/pinctrl/uart1/uart1m1-rtsn"; - qos_isp1_mro = "/qos@fdf41100"; - ddrphych3_pins = "/pinctrl/ddrphych3/ddrphych3-pins"; - spi0m3_cs1 = "/pinctrl/spi0/spi0m3-cs1"; - qos_rkvenc0_m1ro = "/qos@fdf60200"; - qos_jpeg_dec = "/qos@fdf66200"; - mclkin_i2s1 = "/clocks/mclkin-i2s1"; - edp1_in_vp2 = "/edp@fded0000/ports/port@0/endpoint@2"; - pcie30_avdd0v75 = "/pcie30-avdd0v75"; - isp0_mmu = "/iommu@fdcb7f00"; - qos_npu0_mwr = "/qos@fdf72000"; - rkvdec0 = "/rkvdec-core@fdc38000"; - rkvdec0_mmu = "/iommu@fdc38700"; - rk806_dvs1_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_null"; - pwm15 = "/pwm@febf0030"; - vop_mmu = "/iommu@fdd97e00"; - rkcif_mipi_lvds2_sditf_vir1 = "/rkcif-mipi-lvds2-sditf-vir1"; - pcie2x1l2 = "/pcie@fe190000"; - i2c6m1_xfer = "/pinctrl/i2c6/i2c6m1-xfer"; - package_serial_number_low = "/otp@fecc0000/package-serial-number-low@6"; - iep_mmu = "/iommu@fdbb0800"; - l2_cache_b3 = "/cpus/l2-cache-b3"; - i2c3m0_xfer = "/pinctrl/i2c3/i2c3m0-xfer"; - vcc_1v1_nldo_s3 = "/vcc-1v1-nldo-s3"; - spi1m2_cs1 = "/pinctrl/spi1/spi1m2-cs1"; - pdm0m1_idle = "/pinctrl/pdm0/pdm0m1-idle"; - can0 = "/can@fea50000"; - spi4m2_pins = "/pinctrl/spi4/spi4m2-pins"; - pcfg_pull_none_drv_level_4 = "/pinctrl/pcfg-pull-none-drv-level-4"; - pwm9m1_pins = "/pinctrl/pwm9/pwm9m1-pins"; - arm_pmu = "/arm-pmu"; - vp2 = "/vop@fdd90000/ports/port@2"; - rk806single = "/spi@feb20000/rk806single@0"; - spi1m1_pins = "/pinctrl/spi1/spi1m1-pins"; - pwm6m0_pins = "/pinctrl/pwm6/pwm6m0-pins"; - gmac0_mtl_tx_setup = "/ethernet@fe1b0000/tx-queues-config"; - rng = "/rng@fe378000"; - cpu_l2 = "/cpus/cpu@200"; - uart9 = "/serial@febc0000"; - spi0m1_cs0 = "/pinctrl/spi0/spi0m1-cs0"; - rk806_dvs3_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_gpio"; - rkcif_mipi_lvds5_sditf = "/rkcif-mipi-lvds5-sditf"; - usbdpphy0_grf = "/syscon@fd5c8000"; - mipim1_camera3_clk = "/pinctrl/mipi/mipim1-camera3-clk"; - pcie_clk3 = "/pcie-clk3"; - mipim0_camera1_clk = "/pinctrl/mipi/mipim0-camera1-clk"; - vp0_out_hdmi0 = "/vop@fdd90000/ports/port@0/endpoint@2"; - rkcif = "/rkcif@fdce0000"; - gmac0_rgmii_clk = "/pinctrl/gmac0/gmac0-rgmii-clk"; - wdt_en_base = "/pinctrl/wdt-pc9202/wdt-en-base"; - vp3_out_rgb = "/vop@fdd90000/ports/port@3/endpoint@2"; - spdif_rx0 = "/spdif-rx@fde08000"; - sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; - hdmim2_tx0_scl = "/pinctrl/hdmi/hdmim2-tx0-scl"; - hdmim2_tx0_sda = "/pinctrl/hdmi/hdmim2-tx0-sda"; - spi2m1_cs1 = "/pinctrl/spi2/spi2m1-cs1"; - pwm15m3_pins = "/pinctrl/pwm15/pwm15m3-pins"; - sata0m0_pins = "/pinctrl/sata0/sata0m0-pins"; - uart7m0_xfer = "/pinctrl/uart7/uart7m0-xfer"; - csi2_dphy2 = "/csi2-dphy2"; - spi3 = "/spi@feb30000"; - edp0_in_vp0 = "/edp@fdec0000/ports/port@0/endpoint@0"; - gpio1 = "/pinctrl/gpio@fec20000"; - tsadcm1_shut = "/pinctrl/tsadc/tsadcm1-shut"; - usbdp_phy0_dp_altmode_mux = "/phy@fed80000/port/endpoint@1"; - i2s2m0_idle = "/pinctrl/i2s2/i2s2m0-idle"; - spi1m0_cs0 = "/pinctrl/spi1/spi1m0-cs0"; - rkcif_mipi_lvds1_sditf_vir2 = "/rkcif-mipi-lvds1-sditf-vir2"; - i2s3_sclk = "/pinctrl/i2s3/i2s3-sclk"; - hdmim1_rx_hpdin = "/pinctrl/hdmi/hdmim1-rx-hpdin"; - spi3m0_cs1 = "/pinctrl/spi3/spi3m0-cs1"; - mipi_dcphy1 = "/mipi-dcphy-dummy"; - vcc5v0_sys = "/vcc5v0-sys"; - aclk_hdcp0_pre = "/clocks/aclk_hdcp0_pre@fd7c08dc"; - usb_con = "/i2c@fec80000/fusb302@22/connector"; - hdmirx_ctrler = "/hdmirx-controller@fdee0000"; - i2c7m1_xfer = "/pinctrl/i2c7/i2c7m1-xfer"; - pcfg_pull_up_drv_level_3 = "/pinctrl/pcfg-pull-up-drv-level-3"; - rgmii_phy1 = "/ethernet@fe1c0000/mdio/phy@1"; - i2c4m0_xfer = "/pinctrl/i2c4/i2c4m0-xfer"; - pcfg_pull_down_drv_level_7 = "/pinctrl/pcfg-pull-down-drv-level-7"; - spdif0m0_tx = "/pinctrl/spdif0/spdif0m0-tx"; - wdt = "/watchdog@feaf0000"; - vdd_0v85_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG4"; - cspmu = "/cspmu@fd10c000"; - gmac_uio0 = "/uio@fe1b0000"; - av1d_mmu = "/iommu@fdca0000"; - mailbox2 = "/mailbox@fece0000"; - mipi4_csi2_hw = "/mipi4-csi2-hw@fdd50000"; - pdm1m1_idle = "/pinctrl/pdm1/pdm1m1-idle"; - rga3_core0 = "/rga@fdb60000"; - i2s1m0_sdo0 = "/pinctrl/i2s1/i2s1m0-sdo0"; - bigcore1_thermal = "/thermal-zones/bigcore1-thermal"; - pcfg_output_low_pull_up = "/pinctrl/pcfg-output-low-pull-up"; - spi2m1_pins = "/pinctrl/spi2/spi2m1-pins"; - pwm7m0_pins = "/pinctrl/pwm7/pwm7m0-pins"; - i2c2 = "/i2c@feaa0000"; - npu_grf = "/syscon@fd5a2000"; - i2s1m1_sdi0 = "/pinctrl/i2s1/i2s1m1-sdi0"; - mipi5_csi2 = "/mipi5-csi2"; - pwm8 = "/pwm@febe0000"; - log_leakage = "/otp@fecc0000/log-leakage@1a"; - cpub23_opp_info = "/otp@fecc0000/cpub23-opp-info@49"; - vdd_vdenc_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; - rga2 = "/rga@fdb80000"; - emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; - qos_usb3_0 = "/qos@fdf3e200"; - sata1m0_pins = "/pinctrl/sata1/sata1m0-pins"; - uart8m0_xfer = "/pinctrl/uart8/uart8m0-xfer"; - pwm13m2_pins = "/pinctrl/pwm13/pwm13m2-pins"; - hdmi_debug3 = "/pinctrl/hdmi/hdmi-debug3"; - cam0_or_cam1_switch_pin = "/pinctrl/cam/cam0-or-cam1-switch-pin"; - mcum1_pins = "/pinctrl/mcu/mcum1-pins"; - pwm10m1_pins = "/pinctrl/pwm10/pwm10m1-pins"; - edp1_out = "/edp@fded0000/ports/port@1/endpoint"; - hclk_sdio_pre = "/clocks/hclk_sdio_pre@fd7c092c"; - usb_host0_ehci = "/usb@fc800000"; - edp1_in_vp0 = "/edp@fded0000/ports/port@0/endpoint@0"; - gmac1 = "/ethernet@fe1c0000"; - i2s10_8ch = "/i2s@fde00000"; - hdmi1_in = "/hdmi@fdea0000/ports/port@0"; - usb2phy1_grf = "/syscon@fd5d4000"; - pdm0m0_clk1 = "/pinctrl/pdm0/pdm0m0-clk1"; - jpege2_mmu = "/iommu@fdba8800"; - pwm13 = "/pwm@febf0010"; - pcie2x1l0 = "/pcie@fe170000"; - hdmi0_in_vp1 = "/hdmi@fde80000/ports/port@0/endpoint@1"; - hdmim0_tx1_cec = "/pinctrl/hdmi/hdmim0-tx1-cec"; - l2_cache_b1 = "/cpus/l2-cache-b1"; - cif_dvp_bus8 = "/pinctrl/cif/cif-dvp-bus8"; - qos_rga2_mro = "/qos@fdf66c00"; - aclk_rkvdec1_pre = "/clocks/aclk_rkvdec1_pre@fd7c08a4"; - i2c8m1_xfer = "/pinctrl/i2c8/i2c8m1-xfer"; - vdd_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG5"; - hdmirx_det = "/pinctrl/hdmirx/hdmirx-det"; - pca9555 = "/i2c@feab0000/gpio@21"; - qos_sdmmc = "/qos@fdf3d800"; - clk32k_out1 = "/pinctrl/clk32k/clk32k-out1"; - i2c5m0_xfer = "/pinctrl/i2c5/i2c5m0-xfer"; - cif_dvp_clk = "/pinctrl/cif/cif-dvp-clk"; - rknpu = "/npu@fdab0000"; - pcfg_pull_none_drv_level_2 = "/pinctrl/pcfg-pull-none-drv-level-2"; - spi3m2_cs0 = "/pinctrl/spi3/spi3m2-cs0"; - vp0 = "/vop@fdd90000/ports/port@0"; - rga3_1_mmu = "/iommu@fdb70f00"; - jtagm2_pins = "/pinctrl/jtag/jtagm2-pins"; - cpu_l0 = "/cpus/cpu@0"; - uart7 = "/serial@feba0000"; - rkisp1_vir2 = "/rkisp1-vir2"; - fec1_mmu = "/iommu@fdcd8f00"; - qos_vop_m0 = "/qos@fdf82000"; - pcie_clk1 = "/pcie-clk1"; - gmac1_ptp_ref_clk = "/pinctrl/gmac1/gmac1-ptp-ref-clk"; - spi3m1_pins = "/pinctrl/spi3/spi3m1-pins"; - pwm8m0_pins = "/pinctrl/pwm8/pwm8m0-pins"; - hdmi0_sound = "/hdmi0-sound"; - ioc = "/syscon@fd5f0000"; - spi0m0_pins = "/pinctrl/spi0/spi0m0-pins"; - avsd = "/avsd-plus@fdb51000"; - rkcif_mipi_lvds5_sditf_vir3 = "/rkcif-mipi-lvds5-sditf-vir3"; - u2phy2 = "/syscon@fd5d8000/usb2-phy@8000"; - sfc = "/spi@fe2b0000"; - csi2_dphy0 = "/csi2-dphy0"; - spi1 = "/spi@feb10000"; - spi4m1_cs0 = "/pinctrl/spi4/spi4m1-cs0"; - gpu_grf = "/syscon@fd5a0000"; - pcfg_pull_up_drv_level_14 = "/pinctrl/pcfg-pull-up-drv-level-14"; - wireless_bluetooth = "/wireless-bluetooth"; - pclk_av1_pre = "/clocks/pclk_av1_pre@fd7c0910"; - sata2m0_pins = "/pinctrl/sata2/sata2m0-pins"; - uart9m0_xfer = "/pinctrl/uart9/uart9m0-xfer"; - pwm14m2_pins = "/pinctrl/pwm14/pwm14m2-pins"; - i2s1m0_sdi2 = "/pinctrl/i2s1/i2s1m0-sdi2"; - pwm11m1_pins = "/pinctrl/pwm11/pwm11m1-pins"; - bt_sound = "/bt-sound"; - qos_rkvenc1_m0ro = "/qos@fdf61000"; - mclkout_i2s2 = "/clocks/mclkout-i2s2@fd58c318"; - dsi0 = "/dsi@fde20000"; - pdm1m0_clk1 = "/pinctrl/pdm1/pdm1m0-clk1"; - uart1m0_rtsn = "/pinctrl/uart1/uart1m0-rtsn"; - ddrphych2_pins = "/pinctrl/ddrphych2/ddrphych2-pins"; - route_edp0 = "/display-subsystem/route/route-edp0"; - hdmi0 = "/hdmi@fde80000"; - es8388_sound = "/es8388-sound"; - hdmi1_in_vp1 = "/hdmi@fdea0000/ports/port@0/endpoint@1"; - pcfg_pull_up_drv_level_1 = "/pinctrl/pcfg-pull-up-drv-level-1"; - pcfg_pull_down_drv_level_5 = "/pinctrl/pcfg-pull-down-drv-level-5"; - i2s0_sdo2 = "/pinctrl/i2s0/i2s0-sdo2"; - vop_out = "/vop@fdd90000/ports"; - vdd_0v75_s3 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG1"; - hdmim1_rx = "/pinctrl/hdmi/hdmim1-rx"; - pcfg_pull_down_smt = "/pinctrl/pcfg-pull-down-smt"; - hdmim0_tx1_scl = "/pinctrl/hdmi/hdmim0-tx1-scl"; - hdmim0_tx1_sda = "/pinctrl/hdmi/hdmim0-tx1-sda"; - cpul_opp_info = "/otp@fecc0000/cpul-opp-info@3d"; - clk32k_in = "/pinctrl/clk32k/clk32k-in"; - usbdp_phy1 = "/phy@fed90000"; - mailbox0 = "/mailbox@fec60000"; - i2c6m0_xfer = "/pinctrl/i2c6/i2c6m0-xfer"; - pdm0m1_sdi2 = "/pinctrl/pdm0/pdm0m1-sdi2"; - sdmmc = "/mmc@fe2c0000"; - hclk_nvm = "/clocks/hclk_nvm@fd7c087c"; - hdmim0_tx1_hpd = "/pinctrl/hdmi/hdmim0-tx1-hpd"; - vp0_out_dp0 = "/vop@fdd90000/ports/port@0/endpoint@0"; - vddq_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG9"; - vcc_3v3_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG8"; - gmac0_ppstring = "/pinctrl/gmac0/gmac0-ppstring"; - i2c0 = "/i2c@fd880000"; - pdm1m1_clk = "/pinctrl/pdm1/pdm1m1-clk"; - pdm0m0_idle = "/pinctrl/pdm0/pdm0m0-idle"; - soc_thermal = "/thermal-zones/soc-thermal"; - cluster1_opp_table = "/cluster1-opp-table"; - i2s0_idle = "/pinctrl/i2s0/i2s0-idle"; - spi4m1_pins = "/pinctrl/spi4/spi4m1-pins"; - npu_opp_info = "/otp@fecc0000/npu-opp-info@55"; - pwm9m0_pins = "/pinctrl/pwm9/pwm9m0-pins"; - pwm6 = "/pwm@febd0020"; - spi1m0_pins = "/pinctrl/spi1/spi1m0-pins"; - hym8563 = "/i2c@fd880000/hym8563@51"; - i2s1m1_sclk = "/pinctrl/i2s1/i2s1m1-sclk"; - rk806_dvs2_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_gpio"; - hp_det = "/pinctrl/headphone/hp-det"; - hdmi_debug1 = "/pinctrl/hdmi/hdmi-debug1"; - vp1_out_dp1 = "/vop@fdd90000/ports/port@1/endpoint@3"; - qos_mcu_npu = "/qos@fdf72400"; - auddsm_pins = "/pinctrl/auddsm/auddsm-pins"; - i2s3_lrck = "/pinctrl/i2s3/i2s3-lrck"; - pcfg_pull_none_drv_level_2_smt = "/pinctrl/pcfg-pull-none-drv-level-2-smt"; - pwm15m2_pins = "/pinctrl/pwm15/pwm15m2-pins"; - pipe_phy1_grf = "/syscon@fd5c0000"; - pwm12m1_pins = "/pinctrl/pwm12/pwm12m1-pins"; - pwm11 = "/pwm@febe0030"; - rkisp_unite = "/rkisp-unite@fdcb0000"; - rkcif_mipi_lvds2_sditf = "/rkcif-mipi-lvds2-sditf"; - vp1_out_edp0 = "/vop@fdd90000/ports/port@1/endpoint@1"; - hclk_isp1_pre = "/clocks/hclk_isp1_pre@fd7c0868"; - rk806_dvs2_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_slp"; - i2s7_8ch = "/i2s@fddf8000"; - uart5m1_rtsn = "/pinctrl/uart5/uart5m1-rtsn"; - mipidphy1_grf = "/syscon@fd5b5000"; - usbhost3_0 = "/usbhost3_0"; - jpege2 = "/jpege-core@fdba8000"; - pcfg_pull_none_drv_level_15 = "/pinctrl/pcfg-pull-none-drv-level-15"; - pcie3x2_intc = "/pcie@fe160000/legacy-interrupt-controller"; - vp2_out_dsi1 = "/vop@fdd90000/ports/port@2/endpoint@4"; - mipidphy0_in_ucam0 = "/csi2-dphy0/ports/port@0/endpoint@0"; - av1d = "/av1d@fdc70000"; - uart1m2_ctsn = "/pinctrl/uart1/uart1m2-ctsn"; - sdiom1_pins = "/pinctrl/sdio/sdiom1-pins"; - rockchip_suspend = "/rockchip-suspend"; - rk806_dvs2_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_pwrdn"; - pcfg_pull_none_drv_level_0 = "/pinctrl/pcfg-pull-none-drv-level-0"; - npu_thermal = "/thermal-zones/npu-thermal"; - i2c7m0_xfer = "/pinctrl/i2c7/i2c7m0-xfer"; - pdm1m1_sdi2 = "/pinctrl/pdm1/pdm1m1-sdi2"; - cpu_pins = "/pinctrl/cpu/cpu-pins"; - dsi0_in_vp2 = "/dsi@fde20000/ports/port@0/endpoint@0"; - bt_wake_gpio = "/pinctrl/wireless-bluetooth/bt-wake-gpio"; - uart5 = "/serial@feb80000"; - dwc3_0_role_switch = "/usbdrd3_0/usb@fc000000/port/endpoint@0"; - rkisp1_vir0 = "/rkisp1-vir0"; - fiq_debugger = "/fiq-debugger"; - usbdp_phy1_u3 = "/phy@fed90000/u3-port"; - spi0m0_cs1 = "/pinctrl/spi0/spi0m0-cs1"; - sdio = "/mmc@fe2d0000"; - rkcif_mipi_lvds_sditf_vir2 = "/rkcif-mipi-lvds-sditf-vir2"; - spdif1m2_tx = "/pinctrl/spdif1/spdif1m2-tx"; - qos_gpu_m3 = "/qos@fdf35600"; - pdm1m0_idle = "/pinctrl/pdm1/pdm1m0-idle"; - pcfg_pull_none_drv_level_6_smt = "/pinctrl/pcfg-pull-none-drv-level-6-smt"; - user_led = "/leds/user"; - rkcif_mipi_lvds5_sditf_vir1 = "/rkcif-mipi-lvds5-sditf-vir1"; - i2s2m1_sdi = "/pinctrl/i2s2/i2s2m1-sdi"; - uart8_xfer = "/pinctrl/uart8/uart8-xfer"; - u2phy0 = "/syscon@fd5d0000/usb2-phy@0"; - pclk_vo1_grf = "/clocks/pclk_vo1_grf@fd7c08ec"; - vdd_gpu_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; - spi2m0_pins = "/pinctrl/spi2/spi2m0-pins"; - qos_rga3_1 = "/qos@fdf36000"; - i2s2m1_sclk = "/pinctrl/i2s2/i2s2m1-sclk"; - pcfg_pull_up_drv_level_12 = "/pinctrl/pcfg-pull-up-drv-level-12"; - spdif_tx4 = "/spdif-tx@fdde8000"; - gmac1_mtl_rx_setup = "/ethernet@fe1c0000/rx-queues-config"; - rkispp1 = "/rkispp@fdcd8000"; - hdmim2_tx1_cec = "/pinctrl/hdmi/hdmim2-tx1-cec"; - u2phy1_otg = "/syscon@fd5d4000/usb2-phy@4000/otg-port"; - hdptxphy_hdmi_clk0 = "/hdmiphy@fed60000/clk-port"; - i2s1m0_sdi0 = "/pinctrl/i2s1/i2s1m0-sdi0"; - mipi4_csi2 = "/mipi4-csi2"; - mclkout_i2s0 = "/clocks/mclkout-i2s0@fd58c318"; - vcc5v0_host3 = "/vcc5v0-host3"; - rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; - vdd_cpu_big0_s0 = "/i2c@fd880000/rk8602@42"; - dp1 = "/dp@fde60000"; - emmc_data_strobe = "/pinctrl/emmc/emmc-data-strobe"; - pwm13m1_pins = "/pinctrl/pwm13/pwm13m1-pins"; - vop_pins = "/pinctrl/vop/vop-pins"; - pcie20x1m1_pins = "/pinctrl/pcie20x1/pcie20x1m1-pins"; - fspim2_cs1 = "/pinctrl/fspi/fspim2-cs1"; - vcc_hub = "/vcc-hub-regulator"; - mcum0_pins = "/pinctrl/mcu/mcum0-pins"; - pwm10m0_pins = "/pinctrl/pwm10/pwm10m0-pins"; - uart9m2_rtsn = "/pinctrl/uart9/uart9m2-rtsn"; - mipidcphy0 = "/phy@feda0000"; - uart6m1_rtsn = "/pinctrl/uart6/uart6m1-rtsn"; - vcc3v3_pcie30 = "/vcc3v3-pcie30"; - pcfg_pull_down_drv_level_3 = "/pinctrl/pcfg-pull-down-drv-level-3"; - mipim1_camera0_clk = "/pinctrl/mipi/mipim1-camera0-clk"; - i2s0_sdo0 = "/pinctrl/i2s0/i2s0-sdo0"; - vop = "/vop@fdd90000"; - gmac0_ptp_refclk = "/pinctrl/gmac0/gmac0-ptp-refclk"; - usbdp_phy0_orientation_switch = "/phy@fed80000/port/endpoint@0"; - vepu = "/vepu@fdb50000"; - cif_clk = "/pinctrl/cif/cif-clk"; - pcie30_phy_grf = "/syscon@fd5b8000"; - isp1_mmu = "/iommu@fdcc7f00"; - pdm0m1_sdi0 = "/pinctrl/pdm0/pdm0m1-sdi0"; - rkvdec1_mmu = "/iommu@fdc48700"; - edp1 = "/edp@fded0000"; - cam0_cam1_switch = "/cam0-cam1-switch"; - gmac1_ppstrig = "/pinctrl/gmac1/gmac1-ppstrig"; - i2c8m0_xfer = "/pinctrl/i2c8/i2c8m0-xfer"; - dsi1_in_vp2 = "/dsi@fde30000/ports/port@0/endpoint@0"; - hdmim2_rx_hpdin = "/pinctrl/hdmi/hdmim2-rx-hpdin"; - i2s1m1_sdo3 = "/pinctrl/i2s1/i2s1m1-sdo3"; - pcfg_pull_down_drv_level_14 = "/pinctrl/pcfg-pull-down-drv-level-14"; - gmac0_rx_bus2 = "/pinctrl/gmac0/gmac0-rx-bus2"; - rkcif_mipi_lvds4_sditf_vir2 = "/rkcif-mipi-lvds4-sditf-vir2"; - center_thermal = "/thermal-zones/center-thermal"; - uart0_ctsn = "/pinctrl/uart0/uart0-ctsn"; - uart4_rtsn = "/pinctrl/uart4/uart4-rtsn"; - pwm4 = "/pwm@febd0000"; - vdd2_ddr_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG6"; - jtagm1_pins = "/pinctrl/jtag/jtagm1-pins"; - rkisp0_vir2 = "/rkisp0-vir2"; - i2c1m4_xfer = "/pinctrl/i2c1/i2c1m4-xfer"; - l2_cache_l2 = "/cpus/l2-cache-l2"; - pcfg_pull_none_drv_level_9 = "/pinctrl/pcfg-pull-none-drv-level-9"; - qos_vdpu = "/qos@fdf67200"; - vp2_out_hdmi1 = "/vop@fdd90000/ports/port@2/endpoint@7"; - spi3m0_pins = "/pinctrl/spi3/spi3m0-pins"; - pcfg_output_low_pull_none = "/pinctrl/pcfg-output-low-pull-none"; - spi0m2_cs0 = "/pinctrl/spi0/spi0m2-cs0"; - rkisp1 = "/rkisp@fdcc0000"; - usbdpphy1_grf = "/syscon@fd5cc000"; - mipim1_camera4_clk = "/pinctrl/mipi/mipim1-camera4-clk"; - mipim0_camera2_clk = "/pinctrl/mipi/mipim0-camera2-clk"; - csi2_dcphy1 = "/csi2-dcphy1"; - hdmim2_tx1_scl = "/pinctrl/hdmi/hdmim2-tx1-scl"; - hdmim2_tx1_sda = "/pinctrl/hdmi/hdmim2-tx1-sda"; - spi2m2_cs1 = "/pinctrl/spi2/spi2m2-cs1"; - chosen = "/chosen"; - soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; - rk806_dvs1_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_rst"; - mpp_srv = "/mpp-srv"; - hclk_rkvenc1_pre = "/clocks/hclk_rkvenc1_pre@fd7c08c0"; - dp0m2_pins = "/pinctrl/dp0/dp0m2-pins"; - debug = "/debug@fd104000"; - jpege0 = "/jpege-core@fdba0000"; - pcfg_pull_none_drv_level_13 = "/pinctrl/pcfg-pull-none-drv-level-13"; - pwm14m1_pins = "/pinctrl/pwm14/pwm14m1-pins"; - pwm11m0_pins = "/pinctrl/pwm11/pwm11m0-pins"; - vp2_out_dp0 = "/vop@fdd90000/ports/port@2/endpoint@0"; - qos_rkvenc0_m0ro = "/qos@fdf60000"; - its0 = "/interrupt-controller@fe600000/msi-controller@fe640000"; - cpu_b2 = "/cpus/cpu@600"; - uart7m1_rtsn = "/pinctrl/uart7/uart7m1-rtsn"; - usb_5v_ctrl = "/pinctrl/usb-typec/usb-5v-ctrl"; - tsadc_gpio_func = "/pinctrl/gpio-func/tsadc-gpio-func"; - spi1m1_cs0 = "/pinctrl/spi1/spi1m1-cs0"; - pcfg_pull_down = "/pinctrl/pcfg-pull-down"; - dmc_opp_info = "/otp@fecc0000/dmc-opp-info@5b"; - ddrphych1_pins = "/pinctrl/ddrphych1/ddrphych1-pins"; - dsi0_in = "/dsi@fde20000/ports/port@0"; - pdm1m1_sdi0 = "/pinctrl/pdm1/pdm1m1-sdi0"; - spi3m1_cs1 = "/pinctrl/spi3/spi3m1-cs1"; - bigcore0_grf = "/syscon@fd590000"; - cpub1_leakage = "/otp@fecc0000/cpub1-leakage@18"; - uart3 = "/serial@feb60000"; - aclk_hdcp1_pre = "/clocks/aclk_hdcp1_pre@fd7c08ec"; - pcfg_pull_up = "/pinctrl/pcfg-pull-up"; - rkcif_mipi_lvds3_sditf_vir3 = "/rkcif-mipi-lvds3-sditf-vir3"; - codec_leakage = "/otp@fecc0000/codec-leakage@29"; - pcfg_pull_up_drv_level_8 = "/pinctrl/pcfg-pull-up-drv-level-8"; - dmac1 = "/dma-controller@fea30000"; - pdm0m0_sdi2 = "/pinctrl/pdm0/pdm0m0-sdi2"; - i2s1m1_lrck = "/pinctrl/i2s1/i2s1m1-lrck"; - qos_gpu_m1 = "/qos@fdf35200"; - i2s0_sdi2 = "/pinctrl/i2s0/i2s0-sdi2"; - spi2m0_cs0 = "/pinctrl/spi2/spi2m0-cs0"; - gpu_opp_info = "/otp@fecc0000/gpu-opp-info@4f"; - csi2_dphy1_hw = "/csi2-dphy1-hw@fedc8000"; - pcfg_pull_up_drv_level_10 = "/pinctrl/pcfg-pull-up-drv-level-10"; - spdif_tx2 = "/spdif-tx@fddb0000"; - npu_opp_table = "/npu-opp-table"; - spi4m0_cs1 = "/pinctrl/spi4/spi4m0-cs1"; - vo0_grf = "/syscon@fd5a6000"; - i2c2m4_xfer = "/pinctrl/i2c2/i2c2m4-xfer"; - qos_usb2host_0 = "/qos@fdf3e400"; - spi4m0_pins = "/pinctrl/spi4/spi4m0-pins"; - gmac1_mtl_tx_setup = "/ethernet@fe1c0000/tx-queues-config"; - rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; - i2s1m0_sclk = "/pinctrl/i2s1/i2s1m0-sclk"; - i2c7 = "/i2c@fec90000"; - mipi2_csi2_output = "/mipi2-csi2/ports/port@1/endpoint@0"; - mipi_te0 = "/pinctrl/mipi/mipi-te0"; - sata_reset = "/pinctrl/sata/sata-reset"; - dp1m2_pins = "/pinctrl/dp1/dp1m2-pins"; - pwm15m1_pins = "/pinctrl/pwm15/pwm15m1-pins"; - pcfg_pull_down_drv_level_1 = "/pinctrl/pcfg-pull-down-drv-level-1"; - pwm12m0_pins = "/pinctrl/pwm12/pwm12m0-pins"; - qos_vicap_m1 = "/qos@fdf40800"; - sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; - uart8m1_rtsn = "/pinctrl/uart8/uart8m1-rtsn"; - usb2phy2_grf = "/syscon@fd5d8000"; - rkvdec1_sram = "/sram@ff001000/rkvdec-sram@78000"; - uart5m0_rtsn = "/pinctrl/uart5/uart5m0-rtsn"; - jpege3_mmu = "/iommu@fdbac800"; - vcc_2v0_pldo_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG7"; - i2s3_mclk = "/pinctrl/i2s3/i2s3-mclk"; - mclkout_i2s1m1 = "/clocks/mclkout-i2s1@fd58a000"; - spdif_tx1_dc = "/spdif-tx1-dc"; - uart0m2_xfer = "/pinctrl/uart0/uart0m2-xfer"; - wifi_host_wake_irq = "/pinctrl/wireless-wlan/wifi-host-wake-irq"; - i2s1m1_sdo1 = "/pinctrl/i2s1/i2s1m1-sdo1"; - uart1m1_ctsn = "/pinctrl/uart1/uart1m1-ctsn"; - pcfg_pull_down_drv_level_12 = "/pinctrl/pcfg-pull-down-drv-level-12"; - sdiom0_pins = "/pinctrl/sdio/sdiom0-pins"; - pcfg_pull_up_smt = "/pinctrl/pcfg-pull-up-smt"; - php_grf = "/syscon@fd5b0000"; - pwm2 = "/pwm@fd8b0020"; - pdm1m0_sdi2 = "/pinctrl/pdm1/pdm1m0-sdi2"; - i2s2m1_lrck = "/pinctrl/i2s2/i2s2m1-lrck"; - gmac0_stmmac_axi_setup = "/ethernet@fe1b0000/stmmac-axi-config"; - mipi1_csi2_hw = "/mipi1-csi2-hw@fdd20000"; - sata1 = "/sata@fe220000"; - rkispp1_vir0 = "/rkispp1-vir0"; - dp0_in_vp1 = "/dp@fde50000/ports/port@0/endpoint@1"; - CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; - rkisp0_vir0 = "/rkisp0-vir0"; - spi3m3_cs0 = "/pinctrl/spi3/spi3m3-cs0"; - specification_serial_number = "/otp@fecc0000/specification-serial-number@6"; - l2_cache_l0 = "/cpus/l2-cache-l0"; - pcfg_pull_none_drv_level_7 = "/pinctrl/pcfg-pull-none-drv-level-7"; - qos_hdcp0 = "/qos@fdf80000"; - qos_npu0_mro = "/qos@fdf72200"; - usbdrd_dwc3_1 = "/usbdrd3_1/usb@fc400000"; - rkvenc1 = "/rkvenc-core@fdbe0000"; - display_subsystem = "/display-subsystem"; - i2c3m4_xfer = "/pinctrl/i2c3/i2c3m4-xfer"; - pcie30x2m3_pins = "/pinctrl/pcie30x2/pcie30x2m3-pins"; - qos_npu2 = "/qos@fdf71000"; - i2s0_8ch = "/i2s@fe470000"; - i2s2m0_sclk = "/pinctrl/i2s2/i2s2m0-sclk"; - pmu = "/power-management@fd8d8000"; - gmac1_tx_bus2 = "/pinctrl/gmac1/gmac1-tx-bus2"; - pcfg_pull_none_drv_level_11 = "/pinctrl/pcfg-pull-none-drv-level-11"; - route_hdmi1 = "/display-subsystem/route/route-hdmi1"; - csi2_dphy5 = "/csi2-dphy5"; - spi4m2_cs0 = "/pinctrl/spi4/spi4m2-cs0"; - mipi3_csi2 = "/mipi3-csi2"; - pmu0_grf = "/syscon@fd588000"; - fan = "/pwm-fan"; - cpu_b0 = "/cpus/cpu@400"; - vccio_sd_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG5"; - qos_rkvenc1_m2wo = "/qos@fdf61400"; - gpio4 = "/pinctrl/gpio@fec50000"; - hdmim0_rx_cec = "/pinctrl/hdmi/hdmim0-rx-cec"; - pwm3m3_pins = "/pinctrl/pwm3/pwm3m3-pins"; - aclk_vdpu_low_pre = "/clocks/aclk_vdpu_low_pre@fd7c08b0"; - mmu600_php = "/iommu@fcb00000"; - cif_mipi2_in1 = "/rkcif-mipi-lvds2/port/endpoint"; - pwm0m2_pins = "/pinctrl/pwm0/pwm0m2-pins"; - pwm13m0_pins = "/pinctrl/pwm13/pwm13m0-pins"; - pcie20x1m0_pins = "/pinctrl/pcie20x1/pcie20x1m0-pins"; - bt656_pins = "/pinctrl/bt656/bt656-pins"; - hdmi1_sound = "/hdmi1-sound"; - uart9m1_rtsn = "/pinctrl/uart9/uart9m1-rtsn"; - uart6m0_rtsn = "/pinctrl/uart6/uart6m0-rtsn"; - pcie2x1l2_intc = "/pcie@fe190000/legacy-interrupt-controller"; - mod_sleep = "/mod-sleep-regulator"; - gpu_thermal = "/thermal-zones/gpu-thermal"; - hdmim1_tx0_cec = "/pinctrl/hdmi/hdmim1-tx0-cec"; - uart1 = "/serial@feb40000"; - rkcif_mipi_lvds3_sditf_vir1 = "/rkcif-mipi-lvds3-sditf-vir1"; - pcfg_pull_up_drv_level_6 = "/pinctrl/pcfg-pull-up-drv-level-6"; - qos_rkvdec0 = "/qos@fdf62000"; - vp2_out_edp0 = "/vop@fdd90000/ports/port@2/endpoint@1"; - uart1m2_xfer = "/pinctrl/uart1/uart1m2-xfer"; - pdm0m0_sdi0 = "/pinctrl/pdm0/pdm0m0-sdi0"; - fspim2_pins = "/pinctrl/fspi/fspim2-pins"; - i2s0_sdi0 = "/pinctrl/i2s0/i2s0-sdi0"; - gpu_pins = "/pinctrl/gpu/gpu-pins"; - imx415 = "/i2c@fec80000/imx415@37"; - vp3_out_dsi1 = "/vop@fdd90000/ports/port@3/endpoint@1"; - i2s4_8ch = "/i2s@fddc0000"; - ramoops = "/reserved-memory/ramoops@110000"; - dp0_sound = "/dp0-sound"; - spdif_tx0 = "/spdif-tx@fe4e0000"; - dp1_in_vp1 = "/dp@fde60000/ports/port@0/endpoint@1"; - i2s1m0_sdo3 = "/pinctrl/i2s1/i2s1m0-sdo3"; - mipi2_csi2_input1 = "/mipi2-csi2/ports/port@0/endpoint@0"; - vcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG2"; - vp1_out_hdmi0 = "/vop@fdd90000/ports/port@1/endpoint@2"; - vcc12v_dcin = "/vcc12v-dcin"; - vp0_out_edp1 = "/vop@fdd90000/ports/port@0/endpoint@4"; - uart3_rtsn = "/pinctrl/uart3/uart3-rtsn"; - gmac1_rgmii_clk = "/pinctrl/gmac1/gmac1-rgmii-clk"; - package_serial_number_high = "/otp@fecc0000/package-serial-number-high@5"; - hdcp0 = "/hdcp@fde40000"; - qos_fisheye1 = "/qos@fdf40200"; - rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; - i2c5 = "/i2c@fead0000"; - jtagm0_pins = "/pinctrl/jtag/jtagm0-pins"; - i2c4m4_xfer = "/pinctrl/i2c4/i2c4m4-xfer"; - spdif_tx1_sound = "/spdif-tx1-sound"; - qos_jpeg_enc2 = "/qos@fdf66800"; - hdmi0_in = "/hdmi@fde80000/ports/port@0"; - i2s1m1_sdi3 = "/pinctrl/i2s1/i2s1m1-sdi3"; - i2c1m3_xfer = "/pinctrl/i2c1/i2c1m3-xfer"; - hdptxphy_hdmi0 = "/hdmiphy@fed60000"; - sdmmc_pwren = "/pinctrl/sdmmc/sdmmc-pwren"; - usbdp_phy1_dp = "/phy@fed90000/dp-port"; - npu_leakage = "/otp@fecc0000/npu-leakage@28"; - aclk_jpeg_decoder_pre = "/clocks/aclk_jpeg_decoder_pre@fd7c08b0"; - pdm0 = "/pdm@fe4b0000"; - gmac1_miim = "/pinctrl/gmac1/gmac1-miim"; - pcfg_output_high_pull_down = "/pinctrl/pcfg-output-high-pull-down"; - hdmi_debug6 = "/pinctrl/hdmi/hdmi-debug6"; - pcie3x4 = "/pcie@fe150000"; - can0m1_pins = "/pinctrl/can0/can0m1-pins"; - mclkin_i2s2 = "/clocks/mclkin-i2s2"; - jpege_ccu = "/jpege-ccu"; - pcfg_pull_none_drv_level_3_smt = "/pinctrl/pcfg-pull-none-drv-level-3-smt"; - hdmim1_rx_cec = "/pinctrl/hdmi/hdmim1-rx-cec"; - pipe_phy2_grf = "/syscon@fd5c4000"; - dp0m1_pins = "/pinctrl/dp0/dp0m1-pins"; - rkvdec1 = "/rkvdec-core@fdc48000"; - pwm1m2_pins = "/pinctrl/pwm1/pwm1m2-pins"; - pwm14m0_pins = "/pinctrl/pwm14/pwm14m0-pins"; - little_core_thermal = "/thermal-zones/littlecore-thermal"; - rk806_dvs3_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_slp"; - usb_5v = "/usb-5v"; - i2s8_8ch = "/i2s@fddc8000"; - drm_cubic_lut = "/reserved-memory/drm-cubic-lut@00000000"; - rkcif_mipi_lvds2_sditf_vir2 = "/rkcif-mipi-lvds2-sditf-vir2"; - hdptxphy0 = "/phy@fed60000"; - pcie30x1_0_button_rstn = "/pinctrl/pcie30x1/pcie30x1-0-button-rstn"; - u2phy3_host = "/syscon@fd5dc000/usb2-phy@c000/host-port"; - route_dp0 = "/display-subsystem/route/route-dp0"; - hdmim0_rx_scl = "/pinctrl/hdmi/hdmim0-rx-scl"; - hdmim0_rx_sda = "/pinctrl/hdmi/hdmim0-rx-sda"; - uart7m0_rtsn = "/pinctrl/uart7/uart7m0-rtsn"; - pcfg_pull_down_drv_level_10 = "/pinctrl/pcfg-pull-down-drv-level-10"; - usbdrd3_0 = "/usbdrd3_0"; - ddrphych0_pins = "/pinctrl/ddrphych0/ddrphych0-pins"; - bt_irq_gpio = "/pinctrl/wireless-bluetooth/bt-irq-gpio"; - pwm0 = "/pwm@fd8b0000"; - uart2m2_xfer = "/pinctrl/uart2/uart2m2-xfer"; - pdm1m0_sdi0 = "/pinctrl/pdm1/pdm1m0-sdi0"; - hdmim1_tx0_scl = "/pinctrl/hdmi/hdmim1-tx0-scl"; - hdmim1_tx0_sda = "/pinctrl/hdmi/hdmim1-tx0-sda"; - can1 = "/can@fea60000"; - rkvtunnel = "/rkvtunnel"; - pcfg_pull_none_drv_level_5 = "/pinctrl/pcfg-pull-none-drv-level-5"; - rkcif_mipi_lvds3_sditf = "/rkcif-mipi-lvds3-sditf"; - combphy2_psu = "/phy@fee20000"; - vp3 = "/vop@fdd90000/ports/port@3"; - rk806_dvs2_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_dvs"; - mmu600_pcie = "/iommu@fc900000"; - hdmim1_tx0_hpd = "/pinctrl/hdmi/hdmim1-tx0-hpd"; - i2s1m0_lrck = "/pinctrl/i2s1/i2s1m0-lrck"; - cpu_l3 = "/cpus/cpu@300"; - spi0m1_cs1 = "/pinctrl/spi0/spi0m1-cs1"; - vp0_out_hdmi1 = "/vop@fdd90000/ports/port@0/endpoint@5"; - spdif_rx1 = "/spdif-rx@fde10000"; - gmac0_clkinout = "/pinctrl/gmac0/gmac0-clkinout"; - rkcif_dvp = "/rkcif-dvp"; - i2c5m4_xfer = "/pinctrl/i2c5/i2c5m4-xfer"; - wireless_wlan = "/wireless-wlan"; - rkcif_mipi_lvds = "/rkcif-mipi-lvds"; - avdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG3"; - i2c2m3_xfer = "/pinctrl/i2c2/i2c2m3-xfer"; - pcie30x4m3_pins = "/pinctrl/pcie30x4/pcie30x4m3-pins"; - hclk_rkvdec0_pre = "/clocks/hclk_rkvdec0_pre@fd7c08a0"; - route_dsi0 = "/display-subsystem/route/route-dsi0"; - rk806_dvs3_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_pwrdn"; - csi2_dphy3 = "/csi2-dphy3"; - pcie30x1m2_pins = "/pinctrl/pcie30x1/pcie30x1m2-pins"; - spi4 = "/spi@fecb0000"; - litcore_grf = "/syscon@fd594000"; - isp0_vir2 = "/rkisp0-vir2/port/endpoint@0"; - i2s1m1_mclk = "/pinctrl/i2s1/i2s1m1-mclk"; - sys_grf = "/syscon@fd58c000"; - edp0_in_vp1 = "/edp@fdec0000/ports/port@0/endpoint@1"; - mdio0 = "/ethernet@fe1b0000/mdio"; - rkisp_unite_mmu = "/rkisp-unite-mmu@fdcb7f00"; - gpio2 = "/pinctrl/gpio@fec30000"; - spi1m0_cs1 = "/pinctrl/spi1/spi1m0-cs1"; - aclk_av1_pre = "/clocks/aclk_av1_pre@fd7c0910"; - can1m1_pins = "/pinctrl/can1/can1m1-pins"; - rkcif_mipi_lvds1_sditf_vir3 = "/rkcif-mipi-lvds1-sditf-vir3"; - hdmim2_rx_cec = "/pinctrl/hdmi/hdmim2-rx-cec"; - mipi3_csi2_hw = "/mipi3-csi2-hw@fdd40000"; - dp1m1_pins = "/pinctrl/dp1/dp1m1-pins"; - pwm2m2_pins = "/pinctrl/pwm2/pwm2m2-pins"; - pwm15m0_pins = "/pinctrl/pwm15/pwm15m0-pins"; - hclk_vo0 = "/clocks/hclk_vo0@fd7c08dc"; - bigcore0_thermal = "/thermal-zones/bigcore0-thermal"; - hdmim1_rx_scl = "/pinctrl/hdmi/hdmim1-rx-scl"; - hdmim1_rx_sda = "/pinctrl/hdmi/hdmim1-rx-sda"; - uart8m0_rtsn = "/pinctrl/uart8/uart8m0-rtsn"; - pcfg_pull_up_drv_level_4 = "/pinctrl/pcfg-pull-up-drv-level-4"; - mipim1_camera1_clk = "/pinctrl/mipi/mipim1-camera1-clk"; - rkvdec0_sram = "/sram@ff001000/rkvdec-sram@0"; - pcfg_pull_down_drv_level_8 = "/pinctrl/pcfg-pull-down-drv-level-8"; - gmac_uio1 = "/uio@fe1c0000"; - usbc0_orien_sw = "/i2c@fec80000/fusb302@22/connector/ports/port@0/endpoint"; - jpegd = "/jpegd@fdb90000"; - uart3m2_xfer = "/pinctrl/uart3/uart3m2-xfer"; - minidump_smem = "/reserved-memory/minidump-smem@1f0000"; - i2s0_sclk = "/pinctrl/i2s0/i2s0-sclk"; - uart0m1_xfer = "/pinctrl/uart0/uart0m1-xfer"; - rga3_core1 = "/rga@fdb70000"; - i2s1m0_sdo1 = "/pinctrl/i2s1/i2s1m0-sdo1"; - uart1m0_ctsn = "/pinctrl/uart1/uart1m0-ctsn"; - vcc5v0_usb = "/vcc5v0-usb"; - minidump = "/minidump"; - }; - - rkvdec-ccu@fdc30000 { - power-domains = <0x60 0x0e>; - rockchip,ccu-mode = <0x01>; - clock-names = "aclk_ccu"; - reg-names = "ccu"; - assigned-clocks = <0x02 0x18e>; - assigned-clock-rates = <0x23c34600>; - resets = <0x02 0x282>; - clocks = <0x02 0x18e>; - compatible = "rockchip,rkv-decoder-v2-ccu"; - status = "okay"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdc30000 0x00 0x100>; - phandle = <0xca>; - reset-names = "video_ccu"; - }; - - qos@fdf60000 { - compatible = "syscon"; - reg = <0x00 0xfdf60000 0x00 0x20>; - phandle = <0x8d>; - }; - - iommu@fdb50800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x76 0x04>; - clocks = <0x02 0x1c0 0x02 0x1c1>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_vdpu_mmu"; - reg = <0x00 0xfdb50800 0x00 0x40>; - phandle = <0xb7>; - }; - - rga@fdb60000 { - power-domains = <0x60 0x16>; - iommus = <0xb9>; - clock-names = "aclk_rga3_0\0hclk_rga3_0\0clk_rga3_0"; - interrupts = <0x00 0x72 0x04>; - clocks = <0x02 0x1ba 0x02 0x1b9 0x02 0x1bb>; - compatible = "rockchip,rga3_core0"; - status = "okay"; - interrupt-names = "rga3_core0_irq"; - reg = <0x00 0xfdb60000 0x00 0x1000>; - phandle = <0x269>; - }; - - qos@fdf67200 { - compatible = "syscon"; - reg = <0x00 0xfdf67200 0x00 0x20>; - phandle = <0x28b>; - }; - - vepu@fdb50000 { - power-domains = <0x60 0x15>; - iommus = <0xb7>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1c0>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2c8 0x02 0x2c9>; - interrupts = <0x00 0x78 0x04>; - clocks = <0x02 0x1c0 0x02 0x1c1>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x00>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-encoder-v2"; - rockchip,resetgroup-node = <0x00>; - status = "disabled"; - interrupt-names = "irq_vepu"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdb50000 0x00 0x400>; - phandle = <0x266>; - reset-names = "shared_video_a\0shared_video_h"; - }; - - mipi3-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x227>; - }; - - hdmi0-sound { - rockchip,jack-det; - rockchip,cpu = <0x1d3>; - rockchip,codec = <0x1d4>; - rockchip,card-name = "rockchip-hdmi0"; - compatible = "rockchip,hdmi"; - status = "okay"; - phandle = <0x49b>; - rockchip,mclk-fs = <0x80>; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - minidump-smem@1f0000 { - status = "disabled"; - reg = <0x00 0x1f0000 0x00 0x100>; - phandle = <0x1cf>; - no-map; - }; - - minidump-mem@c000000 { - status = "disabled"; - reg = <0x00 0xc000000 0x00 0x2000000>; - phandle = <0x1d0>; - no-map; - }; - - cma { - linux,cma-default; - compatible = "shared-dma-pool"; - size = <0x00 0x800000>; - reg = <0x00 0x10000000 0x00 0x10000000>; - reusable; - }; - - drm-logo@00000000 { - compatible = "rockchip,drm-logo"; - reg = <0x00 0xedf00000 0x00 0x2e0000>; - phandle = <0x37>; - }; - - ramoops@110000 { - boot-log-count = <0x01>; - record-size = <0x14000>; - pmsg-size = <0x30000>; - compatible = "ramoops"; - console-size = <0x80000>; - reg = <0x00 0x110000 0x00 0xe0000>; - phandle = <0x493>; - boot-log-size = <0x8000>; - ftrace-size = <0x00>; - }; - - drm-cubic-lut@00000000 { - compatible = "rockchip,drm-cubic-lut"; - reg = <0x00 0x00 0x00 0x00>; - phandle = <0x492>; - }; - }; - - pcie@fe160000 { - power-domains = <0x60 0x22>; - vpcie3v3-supply = <0x1ba>; - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x10 0x1f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x10>; - resets = <0x02 0x20e 0x02 0x21d>; - interrupts = <0x00 0x102 0x04 0x00 0x101 0x04 0x00 0x100 0x04 0x00 0xff 0x04 0x00 0xfe 0x04>; - clocks = <0x02 0x14f 0x02 0x154 0x02 0x14a 0x02 0x159 0x02 0x15f 0x02 0x184>; - interrupt-map = <0x00 0x00 0x00 0x01 0x1b9 0x00 0x00 0x00 0x00 0x02 0x1b9 0x01 0x00 0x00 0x00 0x03 0x1b9 0x02 0x00 0x00 0x00 0x04 0x1b9 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x03>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - reset-gpios = <0x10d 0x08 0x00>; - num-lanes = <0x02>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf1000000 0x00 0xf1000000 0x00 0x100000 0x81000000 0x00 0xf1100000 0x00 0xf1100000 0x00 0x100000 0x82000000 0x00 0xf1200000 0x00 0xf1200000 0x00 0xe00000 0xc3000000 0x09 0x40000000 0x09 0x40000000 0x00 0x40000000>; - msi-map = <0x1000 0x1b6 0x1000 0x1000>; - #interrupt-cells = <0x01>; - status = "disabled"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x1b7>; - num-viewport = <0x08>; - reg = <0x00 0xfe160000 0x00 0x10000 0x0a 0x40400000 0x00 0x400000>; - linux,pci-domain = <0x01>; - phandle = <0x486>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x10>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0xff 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x1b9>; - interrupt-controller; - }; - }; - - spdif-tx@fddb8000 { - power-domains = <0x60 0x19>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x20b>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc6 0x04>; - clocks = <0x02 0x20f 0x02 0x20a>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfddb8000 0x00 0x1000>; - phandle = <0x1e2>; - dmas = <0xf1 0x16>; - }; - - pvtm@fdb30000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-gpu-pvtm"; - reg = <0x00 0xfdb30000 0x00 0x100>; - - pvtm@4 { - clock-names = "clk"; - resets = <0x02 0x430 0x02 0x42f>; - clocks = <0x02 0x118>; - reg = <0x04>; - reset-names = "rts\0rst-p"; - }; - }; - - spdif-tx1-dc { - #sound-dai-cells = <0x00>; - compatible = "linux,spdif-dit"; - status = "disabled"; - phandle = <0x1d8>; - }; - - csi2-dphy0 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "okay"; - phys = <0x2f 0x30>; - firefly-compatible; - phandle = <0x20f>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - data-lanes = <0x01 0x02 0x03 0x04>; - remote-endpoint = <0x32>; - reg = <0x01>; - phandle = <0x184>; - }; - - endpoint@0 { - data-lanes = <0x01 0x02 0x03 0x04>; - remote-endpoint = <0x31>; - reg = <0x00>; - phandle = <0x183>; - }; - }; - - port@1 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x01>; - - endpoint@0 { - remote-endpoint = <0x33>; - reg = <0x00>; - phandle = <0x4d>; - }; - }; - }; - }; - - rkisp-unite@fdcb0000 { - power-domains = <0x60 0x1c>; - iommus = <0xcf>; - clock-names = "aclk_isp0\0hclk_isp0\0clk_isp_core0\0clk_isp_core_marvin0\0clk_isp_core_vicap0\0aclk_isp1\0hclk_isp1\0clk_isp_core1\0clk_isp_core_marvin1\0clk_isp_core_vicap1"; - interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; - clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd 0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; - compatible = "rockchip,rk3588-rkisp-unite"; - status = "disabled"; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - reg = <0x00 0xfdcb0000 0x00 0x10000 0x00 0xfdcc0000 0x00 0x10000>; - phandle = <0x277>; - }; - - sata@fe230000 { - phy-names = "sata-phy"; - clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; - interrupts = <0x00 0x113 0x04>; - clocks = <0x02 0x173 0x02 0x170 0x02 0x176 0x02 0x165 0x02 0x180>; - compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; - status = "disabled"; - interrupt-names = "hostc"; - phys = <0x70 0x01>; - reg = <0x00 0xfe230000 0x00 0x1000>; - phandle = <0x291>; - ports-implemented = <0x01>; - }; - - syscon@fd5a0000 { - compatible = "rockchip,rk3588-gpu-grf\0syscon"; - reg = <0x00 0xfd5a0000 0x00 0x100>; - phandle = <0x65>; - }; - - bt-sound { - simple-audio-card,name = "rockchip,bt"; - simple-audio-card,format = "dsp_a"; - simple-audio-card,bitclock-inversion = <0x00>; - compatible = "simple-audio-card"; - status = "disabled"; - phandle = <0x49a>; - simple-audio-card,mclk-fs = <0x100>; - - simple-audio-card,cpu { - sound-dai = <0x1d1>; - }; - - simple-audio-card,codec { - sound-dai = <0x1d2 0x01>; - }; - }; - - iommu@fdb90480 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x82 0x04>; - clocks = <0x02 0x1b4 0x02 0x1b5>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpegd_mmu"; - reg = <0x00 0xfdb90480 0x00 0x40>; - phandle = <0xbb>; - }; - - hdcp@fde70000 { - power-domains = <0x60 0x1a>; - clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; - resets = <0x02 0x3c8 0x02 0x3c6 0x02 0x3c5 0x02 0x3c4 0x02 0x3ca>; - interrupts = <0x00 0xa0 0x04>; - clocks = <0x02 0x217 0x02 0x219 0x02 0x218 0x02 0x216 0x02 0x228 0x02 0x229>; - compatible = "rockchip,rk3588-hdcp"; - status = "disabled"; - reg = <0x00 0xfde70000 0x00 0x80>; - phandle = <0x287>; - reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; - rockchip,vo-grf = <0xd8>; - }; - - spdif-tx@fe4f0000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default"; - pinctrl-0 = <0x143>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x45>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc2 0x04>; - clocks = <0x02 0x47 0x02 0x44>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfe4f0000 0x00 0x1000>; - phandle = <0x1d7>; - dmas = <0xf1 0x05>; - }; - - rkcif-mipi-lvds-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x52>; - phandle = <0x22d>; - }; - - es8388-sound { - pinctrl-names = "default"; - rockchip,cpu = <0x1da>; - pinctrl-0 = <0x1dc>; - rockchip,codec = <0x1db>; - hp-det-gpio = <0x79 0x13 0x00>; - rockchip,card-name = "rockchip-es8388"; - rockchip,format = "i2s"; - rockchip,audio-routing = "Headphone\0LOUT1\0Headphone\0ROUT1\0Speaker\0LOUT2\0Speaker\0ROUT2\0Headphone\0Headphone Power\0Headphone\0Headphone Power\0LINPUT2\0Main Mic\0RINPUT2\0Main Mic\0LINPUT1\0Headset Mic\0RINPUT1\0Headset Mic"; - compatible = "firefly,multicodecs-card"; - linein-type = <0x01>; - status = "okay"; - phandle = <0x49f>; - hp-con-gpio = <0x182 0x0b 0x00>; - firefly,not-use-dapm; - rockchip,mclk-fs = <0x180>; - }; - - spi@feb30000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x02>; - pinctrl-0 = <0x15d 0x15e 0x15f>; - clock-names = "spiclk\0apb_pclk"; - interrupts = <0x00 0x149 0x04>; - clocks = <0x02 0xa6 0x02 0xa1>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "disabled"; - reg = <0x00 0xfeb30000 0x00 0x1000>; - phandle = <0x2c8>; - dmas = <0xf1 0x11 0xf1 0x12>; - }; - - phy@fee80000 { - rockchip,pipe-grf = <0x76>; - clock-names = "pclk"; - rockchip,pcie30-phymode = <0x01>; - resets = <0x02 0x2000a>; - clocks = <0x02 0x188>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-pcie3-phy"; - status = "okay"; - reg = <0x00 0xfee80000 0x00 0x20000>; - phandle = <0x1b7>; - reset-names = "phy"; - rockchip,phy-grf = <0x1cc>; - }; - - vcc12v-dcin { - regulator-max-microvolt = <0xb71b00>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b00>; - regulator-name = "vcc12v_dcin"; - compatible = "regulator-fixed"; - phandle = <0x1cd>; - }; - - qos@fdf61200 { - compatible = "syscon"; - reg = <0x00 0xfdf61200 0x00 0x20>; - phandle = <0x91>; - }; - - i2s@fde00000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x234>; - assigned-clock-parents = <0x02 0x05>; - rockchip,capture-only; - resets = <0x02 0x417>; - interrupts = <0x00 0xbe 0x04>; - clocks = <0x02 0x237 0x02 0x237 0x02 0x233>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - status = "disabled"; - reg = <0x00 0xfde00000 0x00 0x1000>; - phandle = <0x47e>; - dmas = <0xf2 0x18>; - reset-names = "rx-m"; - }; - - qos@fdf40800 { - compatible = "syscon"; - reg = <0x00 0xfdf40800 0x00 0x20>; - phandle = <0xa5>; - }; - - i2s@fddfc000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x23f>; - assigned-clock-parents = <0x02 0x05>; - rockchip,capture-only; - resets = <0x02 0x413>; - interrupts = <0x00 0xbd 0x04>; - clocks = <0x02 0x242 0x02 0x242 0x02 0x23e>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - status = "disabled"; - reg = <0x00 0xfddfc000 0x00 0x1000>; - phandle = <0x27f>; - dmas = <0xf2 0x17>; - reset-names = "rx-m"; - }; - - usbdrd3_0 { - #address-cells = <0x02>; - clock-names = "ref\0suspend\0bus"; - clocks = <0x02 0x1a3 0x02 0x1a2 0x02 0x1a1>; - #size-cells = <0x02>; - compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; - ranges; - status = "okay"; - phandle = <0x252>; - - usb@fc000000 { - power-domains = <0x60 0x1f>; - snps,dis-u1-entry-quirk; - snps,dis_enblslpm_quirk; - phy-names = "usb2-phy\0usb3-phy"; - snps,dis-u2-freeclk-exists-quirk; - usb-role-switch; - phy_type = "utmi_wide"; - quirk-skip-phy-init; - resets = <0x02 0x2a4>; - interrupts = <0x00 0xdc 0x04>; - snps,dis-u2-entry-quirk; - compatible = "snps,dwc3"; - snps,parkmode-disable-hs-quirk; - snps,dis-del-phy-power-chg-quirk; - status = "okay"; - snps,parkmode-disable-ss-quirk; - phys = <0x66 0x67>; - reg = <0x00 0xfc000000 0x00 0x400000>; - phandle = <0x253>; - dr_mode = "host"; - reset-names = "usb3-otg"; - snps,dis-tx-ipgap-linecheck-quirk; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - remote-endpoint = <0x68>; - reg = <0x00>; - phandle = <0x17d>; - }; - }; - }; - }; - - rkcif-mipi-lvds5-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a2>; - phandle = <0x478>; - }; - - rkcif-dvp-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x51>; - phandle = <0x22a>; - }; - - iommu@fdd97e00 { - rockchip,shootdown-entire; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x9c 0x04>; - clocks = <0x02 0x270 0x02 0x26f>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "vop_mmu"; - reg = <0x00 0xfdd97e00 0x00 0x100 0x00 0xfdd97f00 0x00 0x100>; - phandle = <0xd6>; - rockchip,disable-device-link-resume; - }; - - rkvtunnel { - compatible = "rockchip,video-tunnel"; - status = "disabled"; - phandle = <0x245>; - }; - - syscon@fd5e0000 { - compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; - reg = <0x00 0xfd5e0000 0x00 0x100>; - phandle = <0x18a>; - }; - - i2c@fead0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x14d>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb4 0x02 0xac>; - interrupts = <0x00 0x142 0x04>; - clocks = <0x02 0x91 0x02 0x89>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "disabled"; - reg = <0x00 0xfead0000 0x00 0x1000>; - phandle = <0x2a8>; - reset-names = "i2c\0apb"; - }; - - iommu@fdba4800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x7b 0x04>; - clocks = <0x02 0x1ae 0x02 0x1af>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpege1_mmu"; - reg = <0x00 0xfdba4800 0x00 0x40>; - phandle = <0xbe>; - }; - - spdif-rx@fde10000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x260>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x3ff>; - interrupts = <0x00 0xc8 0x04>; - clocks = <0x02 0x260 0x02 0x25f>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; - status = "disabled"; - reg = <0x00 0xfde10000 0x00 0x1000>; - phandle = <0x47f>; - dmas = <0x7c 0x16>; - reset-names = "spdifrx-m"; - }; - - npu@fdab0000 { - power-domains = <0x60 0x09 0x60 0x0a 0x60 0x0b>; - iommus = <0xb2>; - clock-names = "clk_npu\0aclk0\0aclk1\0aclk2\0hclk0\0hclk1\0hclk2\0pclk"; - assigned-clocks = <0x0e 0x06>; - power-domain-names = "npu0\0npu1\0npu2"; - rknpu-supply = <0xb3>; - assigned-clock-rates = <0xbebc200>; - resets = <0x02 0x1e6 0x02 0x1b0 0x02 0x1c0 0x02 0x1e8 0x02 0x1b2 0x02 0x1c2>; - interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; - clocks = <0x0e 0x06 0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125 0x02 0x131>; - compatible = "rockchip,rk3588-rknpu"; - status = "okay"; - interrupt-names = "npu0_irq\0npu1_irq\0npu2_irq"; - mem-supply = <0xb3>; - reg = <0x00 0xfdab0000 0x00 0x10000 0x00 0xfdac0000 0x00 0x10000 0x00 0xfdad0000 0x00 0x10000>; - phandle = <0x265>; - reset-names = "srst_a0\0srst_a1\0srst_a2\0srst_h0\0srst_h1\0srst_h2"; - operating-points-v2 = <0xb1>; - }; - - hdmiphy@fed60000 { - clock-names = "ref\0apb"; - resets = <0x02 0x48e 0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d 0x02 0x48c 0x02 0x48d>; - clocks = <0x02 0x2b5 0x02 0x267>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-hdptx-phy-hdmi"; - status = "okay"; - rockchip,grf = <0x18a>; - reg = <0x00 0xfed60000 0x00 0x2000>; - phandle = <0xfd>; - reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; - - clk-port { - #clock-cells = <0x00>; - status = "okay"; - phandle = <0x35>; - }; - }; - - dmc-opp-table { - nvmem-cells = <0x44 0x45 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,leakage-voltage-sel = <0x01 0x1f 0x00 0x20 0x2c 0x01 0x2d 0x39 0x02 0x3a 0xfe 0x03>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - phandle = <0x41>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,supported-hw; - - opp-1560000000 { - opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xadf34 0xadf34 0xb71b0>; - opp-hz = <0x00 0x5cfbb600>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L3 = <0xb1008 0xb1008 0xd59f8 0xaae60 0xaae60 0xb71b0>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb1008 0xb1008 0xb71b0>; - }; - - opp-j-m-1560000000 { - opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-hz = <0x00 0x5cfbb600>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L3 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - }; - - opp-j-m-528000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-hz = <0x00 0x1f78a400>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-2750000000 { - opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb1008 0xb1008 0xb71b0>; - opp-hz = <0x00 0xa3e9ab80>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xaae60 0xaae60 0xb71b0>; - opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - }; - - opp-1068000000 { - opp-microvolt = <0xb1008 0xb1008 0xd59f8 0xb40dc 0xb40dc 0xb71b0>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; - opp-hz = <0x00 0x3fa86300>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; - opp-microvolt-L1 = <0xaae60 0xaae60 0xd59f8 0xadf34 0xadf34 0xb71b0>; - }; - - opp-j-m-2750000000 { - opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-hz = <0x00 0xa3e9ab80>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - }; - - opp-528000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xd59f8 0xb1008 0xb1008 0xb71b0>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; - opp-hz = <0x00 0x1f78a400>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa4cb8 0xa4cb8 0xb71b0>; - opp-microvolt-L1 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; - }; - - opp-j-m-1068000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-hz = <0x00 0x3fa86300>; - opp-supported-hw = <0x06 0xffff>; - }; - }; - - rkvenc-core@fdbe0000 { - power-domains = <0x60 0x11>; - iommus = <0xc5>; - rockchip,ccu = <0xc3>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - assigned-clocks = <0x02 0x1ca 0x02 0x1cb>; - rockchip,task-capacity = <0x08>; - rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; - assigned-clock-rates = <0x1dcd6500 0x2faf0800>; - resets = <0x02 0x305 0x02 0x304 0x02 0x306>; - interrupts = <0x00 0x68 0x04>; - clocks = <0x02 0x1ca 0x02 0x1c9 0x02 0x1cb>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x07>; - compatible = "rockchip,rkv-encoder-v2-core"; - status = "okay"; - interrupt-names = "irq_rkvenc1"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdbe0000 0x00 0x6000>; - phandle = <0x273>; - reset-names = "video_a\0video_h\0video_core"; - operating-points-v2 = <0xc4>; - }; - - debug@fd104000 { - compatible = "rockchip,debug"; - reg = <0x00 0xfd104000 0x00 0x1000 0x00 0xfd105000 0x00 0x1000 0x00 0xfd106000 0x00 0x1000 0x00 0xfd107000 0x00 0x1000 0x00 0xfd124000 0x00 0x1000 0x00 0xfd125000 0x00 0x1000 0x00 0xfd126000 0x00 0x1000 0x00 0xfd127000 0x00 0x1000>; - phandle = <0x48f>; - }; - - watchdog@feaf0000 { - clock-names = "tclk\0pclk"; - interrupts = <0x00 0x13b 0x04>; - clocks = <0x02 0x6c 0x02 0x6b>; - compatible = "snps,dw-wdt"; - status = "okay"; - reg = <0x00 0xfeaf0000 0x00 0x100>; - phandle = <0x2aa>; - }; - - syscon@fd5d8000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5d8000 0x00 0x4000>; - phandle = <0x25d>; - - usb2-phy@8000 { - clock-output-names = "usb480m_phy2"; - clock-names = "phyclk"; - resets = <0x02 0xc0049 0x02 0x48a>; - interrupts = <0x00 0x187 0x04>; - clocks = <0x02 0x2b5>; - #clock-cells = <0x00>; - compatible = "rockchip,rk3588-usb2phy"; - status = "okay"; - reg = <0x8000 0x10>; - phandle = <0x69>; - reset-names = "phy\0apb"; - - host-port { - phy-supply = <0x75>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x6c>; - }; - }; - }; - - cluster0-opp-table { - rockchip,pvtm-offset = <0x64>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,dsu-grf = <0x23>; - rockchip,pvtm-hw = <0x06>; - nvmem-cells = <0x1f 0x20 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x555 0x00 0x556 0x56b 0x01 0x56c 0x581 0x02 0x582 0x597 0x03 0x598 0x5ad 0x04 0x5ae 0x5c3 0x05 0x5c4 0x270f 0x06>; - rockchip,pvtm-thermal-zone = "soc-thermal"; - rockchip,opp-shared-dsu; - rockchip,high-temp-max-freq = <0x188940>; - opp-shared; - rockchip,reboot-freq = <0x159b40>; - rockchip,pvtm-freq = <0x159b40>; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0x22>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x582 0x00 0x583 0x59a 0x01 0x59b 0x5b2 0x02 0x5b3 0x5ca 0x03 0x5cb 0x5e2 0x04 0x5e3 0x5fa 0x05 0x5fb 0x270f 0x06>; - phandle = <0x0f>; - rockchip,pvtm-temp-prop = <0xf4 0xf4>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0xf6180>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-1200000000 { - opp-microvolt = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; - opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-microvolt-L2 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xe7ef0 0xa7d8c 0xa7d8c 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; - }; - - opp-j-m-1416000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L2 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - opp-hz = <0x00 0x54667200>; - opp-microvolt-L0 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-supported-hw = <0x06 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - }; - - opp-1008000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1704000000 { - opp-microvolt = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - opp-microvolt-L6 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - opp-microvolt-L4 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L2 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - opp-hz = <0x00 0x6590fa00>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L5 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L3 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - }; - - opp-j-m-1200000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1008000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-816000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-1800000000 { - opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - opp-microvolt-L6 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L4 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - opp-microvolt-L2 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L3 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-1608000000 { - opp-microvolt = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - opp-microvolt-L6 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - }; - - opp-j-1296000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x4d3f6400>; - opp-microvolt-L0 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - opp-supported-hw = <0x04 0xffff>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - }; - - opp-j-m-408000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-816000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1608000000 { - opp-microvolt = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L6 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - opp-microvolt-L4 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - opp-microvolt-L2 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L5 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-microvolt-L3 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - }; - - opp-600000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-1416000000 { - opp-microvolt = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - opp-microvolt-L6 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; - opp-microvolt-L4 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; - opp-microvolt-L2 = <0xb40dc 0xb40dc 0xe7ef0 0xb40dc 0xb40dc 0xe7ef0>; - opp-hz = <0x00 0x54667200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; - opp-suspend; - opp-microvolt-L3 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - }; - - opp-408000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - }; - - vcc-4g-regulator { - regulator-boot-on; - gpio = <0x182 0x00 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_4g"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4b0>; - }; - - spi@fecb0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x02>; - pinctrl-0 = <0x187 0x188 0x189>; - clock-names = "spiclk\0apb_pclk"; - interrupts = <0x00 0x14a 0x04>; - clocks = <0x02 0xa7 0x02 0xa2>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "disabled"; - reg = <0x00 0xfecb0000 0x00 0x1000>; - phandle = <0x2e6>; - dmas = <0xf2 0x0d 0xf2 0x0e>; - }; - - spdif-rx@fde08000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x25e>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x3fd>; - interrupts = <0x00 0xc7 0x04>; - clocks = <0x02 0x25e 0x02 0x25d>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; - status = "disabled"; - reg = <0x00 0xfde08000 0x00 0x1000>; - phandle = <0x280>; - dmas = <0x7c 0x15>; - reset-names = "spdifrx-m"; - }; - - mipi3-csi2-hw@fdd40000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x327>; - interrupts = <0x00 0x95 0x04 0x00 0x96 0x04>; - clocks = <0x02 0x1d2>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd40000 0x00 0x10000>; - phandle = <0x4a>; - reset-names = "srst_csihost_p"; - }; - - memory { - device_type = "memory"; - reg = <0x00 0x200000 0x00 0x8200000 0x00 0x9400000 0x00 0xe6c00000 0x01 0x00 0x01 0x00 0x02 0xf0000000 0x00 0x10000000 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>; - }; - - jpege-core@fdba4000 { - power-domains = <0x60 0x15>; - iommus = <0xbe>; - rockchip,ccu = <0xbd>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1ae>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2cc 0x02 0x2cd>; - interrupts = <0x00 0x7c 0x04>; - clocks = <0x02 0x1ae 0x02 0x1af>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-jpege-core"; - status = "okay"; - interrupt-names = "irq_jpege1"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdba4000 0x00 0x400>; - phandle = <0x26e>; - reset-names = "video_a\0video_h"; - }; - - wireless-wlan { - pinctrl-names = "default"; - pinctrl-0 = <0x1ea>; - WIFI,host_wake_irq = <0x182 0x0a 0x00>; - wifi_chip_type = "rtl8822ce"; - compatible = "wlan-platdata"; - status = "okay"; - phandle = <0x4ab>; - }; - - rkcif-mipi-lvds4-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a1>; - phandle = <0x475>; - }; - - dp@fde50000 { - power-domains = <0x60 0x19>; - clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; - assigned-clocks = <0x02 0x2cc>; - assigned-clock-rates = <0xf42400>; - resets = <0x02 0x388>; - interrupts = <0x00 0xa1 0x04>; - clocks = <0x02 0x1e6 0x02 0x2cc 0x02 0x1fb 0x02 0x207 0x04 0x02 0x1ea>; - #sound-dai-cells = <0x01>; - compatible = "rockchip,rk3588-dp"; - status = "disabled"; - phys = <0xf6>; - reg = <0x00 0xfde50000 0x00 0x4000>; - phandle = <0x1d6>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - remote-endpoint = <0x38>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe0>; - }; - - endpoint@2 { - remote-endpoint = <0xf8>; - status = "disabled"; - reg = <0x02>; - phandle = <0xe6>; - }; - - endpoint@0 { - remote-endpoint = <0xf7>; - status = "disabled"; - reg = <0x00>; - phandle = <0xda>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - phandle = <0x286>; - }; - }; - }; - }; - - rockchip-system-monitor { - rockchip,thermal-zone = "soc-thermal"; - compatible = "rockchip,system-monitor"; - phandle = <0x247>; - }; - - vcc3v3-pcie30 { - regulator-max-microvolt = <0x325aa0>; - enable-active-high; - regulator-min-microvolt = <0x325aa0>; - regulator-name = "vcc3v3_pcie30"; - startup-delay-us = <0x1388>; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x1b8>; - vin-supply = <0x1cd>; - gpios = <0x182 0x04 0x00>; - }; - - phy@fedb0000 { - clock-names = "pclk\0ref"; - resets = <0x02 0xc0045 0x02 0x43 0x02 0x44 0x02 0xc0046>; - clocks = <0x02 0x109 0x02 0x2b6>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-mipi-dcphy"; - status = "okay"; - rockchip,grf = <0x191>; - reg = <0x00 0xfedb0000 0x00 0x10000>; - phandle = <0x30>; - reset-names = "m_phy\0apb\0grf\0s_phy"; - }; - - rkvdec-core@fdc38000 { - power-domains = <0x60 0x0e>; - iommus = <0xc9>; - rockchip,ccu = <0xca>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; - reg-names = "regs\0link"; - assigned-clocks = <0x02 0x190 0x02 0x193 0x02 0x191 0x02 0x192>; - rockchip,core-mask = <0x10001>; - rockchip,task-capacity = <0x10>; - rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; - assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; - resets = <0x02 0x284 0x02 0x283 0x02 0x289 0x02 0x287 0x02 0x288>; - interrupts = <0x00 0x5f 0x04>; - rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; - clocks = <0x02 0x190 0x02 0x18f 0x02 0x193 0x02 0x191 0x02 0x192>; - rockchip,rcb-min-width = <0x200>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x09>; - compatible = "rockchip,rkv-decoder-v2"; - status = "okay"; - interrupt-names = "irq_rkvdec0"; - rockchip,skip-pmu-idle-request; - rockchip,rcb-iova = <0xfff00000 0x100000>; - reg = <0x00 0xfdc38100 0x00 0x400 0x00 0xfdc38000 0x00 0x100>; - phandle = <0x274>; - reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; - rockchip,sram = <0xcb>; - }; - - minidump { - smem-region = <0x1cf>; - minidump-region = <0x1d0>; - compatible = "rockchip,minidump"; - status = "disabled"; - phandle = <0x491>; - }; -}; diff --git a/configs/vms_bkp/starry-aarch64.toml b/configs/vms_bkp/starry-aarch64.toml deleted file mode 100644 index 2c37c938..00000000 --- a/configs/vms_bkp/starry-aarch64.toml +++ /dev/null @@ -1,62 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 1 -# Guest vm name. -name = "starry" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 1 -# Guest vm physical cpu sets. -phys_cpu_sets = [1] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x4008_0000 -# The location of image: "memory" | "fs". -# Load from file system. -image_location = "fs" -# The file path of the kernel image. -kernel_path = "starry-aarch64.bin" -# The load address of the kernel image. -kernel_load_addr = 0x4008_0000 -# The file path of the BIOS image. -dtb_load_addr = 0x4000_0000 -# The load address of the BIOS image. -dtb_path = "starry-aarch64.bin" - -## The file path of the ramdisk image. -# ramdisk_path = "" -## The load address of the ramdisk image. -# ramdisk_load_addr = 0 -## The path of the disk image. -# disk_path = "disk.img" - -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x4000_0000, 0x100_0000, 0x7, 0], # Low RAM 16M 0b00111 R|W|EXECUTE -] - -# -# Device specifications -# -[devices] -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - ["intc@8000000", 0x800_0000, 0x800_0000, 0x50_000, 0x1], - ["pl011@9000000", 0x900_0000, 0x900_0000, 0x1000, 0x1], - ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], - ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], # a003000.virtio_mmio virtio_mmio@a003000 # a003200.virtio_mmio virtio_mmio@a003200 - ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], -] diff --git a/configs/vms_bkp/starry-riscv64.toml b/configs/vms_bkp/starry-riscv64.toml deleted file mode 100644 index 92961f9c..00000000 --- a/configs/vms_bkp/starry-riscv64.toml +++ /dev/null @@ -1,64 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 1 -# Guest vm name. -name = "starry" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 1 -# Guest vm physical cpu sets. -phys_cpu_sets = [1] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x8020_0000 -# The location of image: "memory" | "fs". -# Load from file system. -image_location = "fs" -# The file path of the kernel image. -kernel_path = "starry_riscv64.bin" -# The load address of the kernel image. -kernel_load_addr = 0x8020_0000 -# The file path of the device tree blob (DTB) -dtb_path = "starry_riscv64.bin" -# The load address of the device tree blob (DTB). -dtb_load_addr = 0x8000_0000 - -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x8000_0000, 0x100_0000, 0xf, 0], # Low RAM 16M 0b1111 R|W|EXECUTE|U -] - -# -# Device specifications -# -[devices] -# Emu_devices -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig -emu_devices = [] - -# Pass-through devices -# Name Base-Ipa Base-Pa Length Alloc-Irq -passthrough_devices = [ - [ - "PLIC@c000000", - 0x0c00_0000, - 0x0c00_0000, - 0x21_0000, - 0x1, - ], - [ - "UART@10000000", - 0x1000_0000, - 0x1000_0000, - 0x1000, - 0x1, - ], -] diff --git a/configs/vms_bkp/starry-x86_64.toml b/configs/vms_bkp/starry-x86_64.toml deleted file mode 100644 index 891e55d4..00000000 --- a/configs/vms_bkp/starry-x86_64.toml +++ /dev/null @@ -1,62 +0,0 @@ -# Vm base info configs -# -[base] -# Guest vm id. -id = 1 -# Guest vm name. -name = "starry" -# Virtualization type. -vm_type = 1 -# The number of virtual CPUs. -cpu_num = 1 -# Guest vm physical cpu sets. -phys_cpu_sets = [1] - -# -# Vm kernel configs -# -[kernel] -# The entry point of the kernel image. -entry_point = 0x4008_0000 -# The location of image: "memory" | "fs". -# Load from file system. -image_location = "fs" -# The file path of the kernel image. -kernel_path = "starry-aarch64.bin" -# The load address of the kernel image. -kernel_load_addr = 0x4008_0000 -# The file path of the BIOS image. -dtb_load_addr = 0x4000_0000 -# The load address of the BIOS image. -dtb_path = "starry-aarch64.bin" - -## The file path of the ramdisk image. -# ramdisk_path = "" -## The load address of the ramdisk image. -# ramdisk_load_addr = 0 -## The path of the disk image. -# disk_path = "disk.img" - -# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). -# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x4000_0000, 0x100_0000, 0x7, 0], # Low RAM 16M 0b00111 R|W|EXECUTE -] - -# -# Device specifications -# -[devices] -# Emu_devices. -# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] - -# Pass-through devices. -# Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - ["intc@8000000", 0x800_0000, 0x800_0000, 0x50_000, 0x1], - ["pl011@9000000", 0x900_0000, 0x900_0000, 0x1000, 0x1], - ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], - ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], # a003000.virtio_mmio virtio_mmio@a003000 # a003200.virtio_mmio virtio_mmio@a003200 - ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], -] From 8f2227e0cdf2793217eac53ea8b3a7da16fc17b0 Mon Sep 17 00:00:00 2001 From: ZCShou <72115@163.com> Date: Tue, 30 Sep 2025 01:13:16 +0000 Subject: [PATCH 3/4] clean some doc due to no updating --- doc/GuestVMs.md | 44 ----- doc/README.md | 170 ------------------ doc/SMP.md | 78 -------- doc/figures/RKDevTool3.3.png | Bin 92129 -> 0 bytes doc/figures/arceos-hv-architecture.svg | 3 - doc/old/Boot-on-qemu.md | 48 ----- doc/old/Boot-on-rk3588.md | 118 ------------ .../shell.md | 0 8 files changed, 461 deletions(-) delete mode 100644 doc/GuestVMs.md delete mode 100644 doc/README.md delete mode 100644 doc/SMP.md delete mode 100644 doc/figures/RKDevTool3.3.png delete mode 100644 doc/figures/arceos-hv-architecture.svg delete mode 100644 doc/old/Boot-on-qemu.md delete mode 100644 doc/old/Boot-on-rk3588.md rename "doc/Shell\346\250\241\345\235\227\344\273\213\347\273\215.md" => doc/shell.md (100%) diff --git a/doc/GuestVMs.md b/doc/GuestVMs.md deleted file mode 100644 index 257dd959..00000000 --- a/doc/GuestVMs.md +++ /dev/null @@ -1,44 +0,0 @@ -# ArceOS-Hypervisor Supported GuestVMs - -## [NimbOS](https://github.com/arceos-hypervisor/nimbos) - -* Simple real time guest VM that can only be used for **single-core** testing -* It supports the x86_64, aarch64, and riscv64 architectures -* Configuration file templates at [nimbos-aarch64.toml](../configs/vms/nimbos-aarch64.toml), [nimbos-x86_64.toml](../configs/vms/nimbos-x86_64.toml), and [nimbos-riscv64.toml](../configs/vms/nimbos-riscv64.toml) -* Kernel binary images availble at [nimbos/releases](https://github.com/arceos-hypervisor/nimbos/releases/tag/v0.6) - -## [ArceOS](https://github.com/arceos-hypervisor/arceos) -* Used for **SMP** testing -* It supports the x86_64, aarch64, and riscv64 architectures -* Configuration file templates at [arceos-aarch64.toml](../configs/vms/arceos-aarch64.toml), [arceos-x86_64.toml](../configs/vms/arceos-x86_64.toml), and [arceos-riscv64.toml](../configs/vms/arceos-riscv64.toml) - -### Testcases - -* **Hypercall**: - * ArceOS HelloWorld application that can be used to test hypercall functionality is provided [here](https://github.com/arceos-hypervisor/arceos/blob/gvm_test/examples/helloworld/src/main.rs) - * Just run `make A=examples/helloworld ARCH=[x86_64|aarch64|riscv64] build` to get binary images - -* **virtio-pci-devices (PCI)**: - * Branch (pci_pio)[https://github.com/hky1999/arceos/tree/pci_pio] can be used for virtio-pci devices testing (PCI device probed through port I/O) - -## [axvm-bios](https://github.com/arceos-hypervisor/axvm-bios-x86) - -* A extremely simple bios for x86_64 guests -* It can act as a bootloader for NimbOS and ArceOS -* Binary product available at [here](https://github.com/arceos-hypervisor/axvm-bios-x86/releases/download/v0.1/axvm-bios.bin) - -# ArceOS-Hypervisor in RK3588 board -## How to run ArceOS on rk3588 -1. Prepare your kernal file `linux-rk3588-aarch64.bin` and DTB file `rk3588.dtb`. -2. Set the kernel path and DTB path in the configuration file `configs/vms/linux-rk3588-aarch64.toml`. - ```toml - image_location = "memory" - kernel_path = "/path/to/linux-rk3588-aarch64.bin" - dtb_path = "/path/to/rk3588.dtb" - ``` -3. Use Command `make A=(pwd) ARCH=aarch64 VM_CONFIGS=configs/vms/linux-rk3588-aarch64.toml kernel` to build the kernel image `boot.img`. -4. Download the [RKDevTool](https://download.t-firefly.com/product/Board/RK3588/Tool/Window/RKDevTool_Release_v3.31.zip). - >This tool has only been tested on [Pji's](https://www.pji.net.cn/) Electronic Control Unit of RK3588. Other RK3588 development boards require independent testing. -5. Set the path of `boot.img` in **boot** and connect the RK3588 board. -6. Press the `Run` button to flash the image to the RK3588 board. -![RKDevTool](./figures/RKDevTool3.3.png) \ No newline at end of file diff --git a/doc/README.md b/doc/README.md deleted file mode 100644 index 4553a854..00000000 --- a/doc/README.md +++ /dev/null @@ -1,170 +0,0 @@ -# Axvisor 文档 - -## 概述 - -本目录包含 Axvisor 项目的相关文档。 - -## 文档列表 - -### 使用指南 - -- [task.py 使用说明](task.py-usage.md) - Axvisor 命令行工具的完整使用指南 - -### 架构文档 - -- [架构概览](#axvisor-architecture-overview) - Axvisor 整体架构介绍 -- [虚拟机管理](GuestVMs.md) - 虚拟机配置和管理 -- [SMP 支持](SMP.md) - 多处理器支持 - -### 配置文档 - -- [平台配置增强](../PLATFORM_CONFIG_ENHANCEMENT.md) - 平台配置自动读取功能说明 - ---- - -# Axvisor Architecture Overview - -About the overall architecture of Axvisor (the [main repo](https://github.com/arceos-hypervisor/axvisor) and [all components repos](https://github.com/arceos-hypervisor/)), -a unified modular hypervisor based on [ArceOS](https://github.com/arceos-org/arceos). - -The hypervisor mainly consists of the VMM (Virtual Machine Monitor) app named `axvisor` (the very repo you are looking at) and modules/crates responsible for implementing virtualization functions (e.g., `axvm`, `axvcpu`, `axdevice`, etc., which are in separate repos under the [arceos-hypervisor](https://github.com/arceos-hypervisor/) organization). - -## Design Goal - -This project originated from the [discussion/13](https://github.com/orgs/rcore-os/discussions/13) of [rCore-OS](https://github.com/rcore-os) community. - -In general, this project hopes to build a modular hypervisor that supports multiple architectures based on the basic OS functions provided by ArceOS unikernel through add several virtualization support modules/crates. - -We hope to make the hypervisor as modular as possible and minimize modifications to the arceos kernel code while maximizing the reuse of codes across different architectures. - -## Components - -Axvisor runs as an ArceOS app, mainly composed of the following independent components: - -(The definitions of ArceOS crates and modules can be seen in [ArceOS/doc/README.md](https://github.com/arceos-org/arceos/blob/main/doc/README.md)) - -### The App `axvisor` - -A user app of ArceOS, which is: - -- completely architecture-independent, -- main entry point of the hypervisor, and -- responsible for VM management (configuration & runtime). - -**Note that we aim to consolidate all dependencies on ArceOS within the vmm-app.** Currently, the modules from ArceOS that the vmm-app depends on include: - -- [axstd](https://github.com/arceos-hypervisor/arceos/tree/vmm/ulib/axstd): a standard dependency interface for ArceOS's user app. -- [axhal](https://github.com/arceos-hypervisor/arceos/tree/vmm/modules/axhal): for OS-related functions, including memory management, clock operations, and more. -- [axtask](https://github.com/arceos-org/arceos/tree/monolithic/modules/axtask): for the scheduling of vCPUs. - -### Modules - -- [axvm](https://github.com/arceos-hypervisor/axvm): responsible for **resource management** within each VM. - - partially architecture-independent. - - resources include: - - vcpu: [axvcpu](https://github.com/arceos-hypervisor/axvcpu) list. - - memory: [axaddrspace](https://github.com/arceos-hypervisor/axaddrspace) for guest memory management. - - device: [axdevice](https://github.com/arceos-hypervisor/axdevice) list. - -- [axvcpu](https://github.com/arceos-hypervisor/axvcpu): providing CPU virtualization support. - - highly architecture-dependent. - - stores exception context frame of different architecture. - - basic scheduling item. - - arch-specific vcpu implementations need to be separated into separate crates. - -- [axaddrspace](https://github.com/arceos-hypervisor/axaddrspace). - - architecture-independent. - - responsible for managing and mapping the guest VM's second-stage address space (GPA -> HPA). - -- [axdevice](https://github.com/arceos-hypervisor/axdevice): providing device emulation support. - - partially architecture-independent. - - different emulated device implementations need to be separated into separate crates. - -### Crates - -`crates` includes implementations of VCpus for different architectures, various emulated devices, and other utilities. - -## Dependency diagram - -![](figures/arceos-hv-architecture.svg) - -Since modules/crates used for virtualization functionality in the ArceOS-Hypervisor architecture need to call OS-related resource management interfaces, while we aim to consolidate all OS-related dependencies within the vmm-app. - -Various modules/crates will achieve dependency injection through Rust traits. - -### axvm - -The axvm crate defines the `AxVMHal trait`, which is a combination of generic types defined by `axaddrspace`, `axvcpu`, and `axdevice`. The `vmm-app` needs to implement the `AxVMHal` trait for `axvm` by calling system interfaces provided by ArceOS (or other OSs). - -### axvcpu - -Typically, `axvcpu` focuses on CPU virtualization support across different architectures, including managing registers for guest VM CPU context and virtualizing hardware abstractions, which generally does not depend on OS functionalities. - -However, for the x86 architecture, VMX requires allocating physical page frames for managing VMX regions (such as VMCS regions), which depends on OS-related memory allocation APIs. -This can be handled by importing the `PagingHandler` generic type, or passing pre-allocated physical page frames as parameters in the vCPU constructor. - -### axaddrspace - -The `struct AddrSpace` in `axaddrspace` uses a generic type parameter `` constrained by the `PagingHandler trait` from [`page_table_multiarch`](https://crates.io/crates/page_table_multiarch). - -While `PagingHandler` is an associated type of `AxVMHal trait`. - -### axdevice - -`axdevice` depends on `axaddrspace` to handle the guest request's parsing process in device emulation. -For example, when handling a Virtio request, the virtio-device needs to translate the accessed GPA into HVA and to perform subsequent operations. - -Additionally, axdevice depends on certain interfaces provided by the VMM to perform operations like interrupt injection and inter-VM communication. - -## Example about how we achieve dependency injection - -Taking [`axaddrspace`](https://github.com/arceos-hypervisor/axaddrspace) for an example, its [`AddrSpace`](https://github.com/arceos-hypervisor/axaddrspace/blob/d377e5aa4eb06afa50a3a901ec3239559be1eb51/src/address_space.rs#L16C12-L16C21) represents memory regions and two-stage address mapping for guest VM, which relies on a generic type `PagingHandler` for page table related stuff. - -```Rust -/// The virtual memory address space. -pub struct AddrSpace { - va_range: VirtAddrRange, - areas: MemorySet, Backend>, - pt: PageTable, -} -``` - -`axaddrspace` is owned and managed by `axvm`'s `AxVM` structure, which replies on `AxVMHal` trait ( defined in `axvm`'s [hal.rs](https://github.com/arceos-hypervisor/axvm/blob/master/src/hal.rs) ) . - -Indeed, `PagingHandler` is a associate type of `AxVMHal` trait. - -```Rust -/// The interfaces which the underlying software (kernel or hypervisor) must implement. -pub trait AxVMHal: Sized { - type PagingHandler: page_table_multiarch::PagingHandler; - /// Converts a virtual address to the corresponding physical address. - fn virt_to_phys(vaddr: HostVirtAddr) -> HostPhysAddr; - /// Current time in nanoseconds. - fn current_time_nanos() -> u64; - // ... -} -``` - -While `AxVMHal` is implemented by `AxVMHalImpl` in vmm-app, which rely on `PagingHandlerImpl` from `ArceOS`'s `axhal` module to implement its associate type `PagingHandler`. - -```Rust -pub struct AxVMHalImpl; - -impl AxVMHal for AxVMHalImpl { - type PagingHandler = axhal::paging::PagingHandlerImpl; - fn virt_to_phys(vaddr: VirtAddr) -> PhysAddr { - axhal::mem::virt_to_phys(vaddr) - } - fn current_time_nanos() -> u64 { - axhal::time::monotonic_time_nanos() - } - // ... -} -``` - -So, current design achieve dependency injection through Rust's generic type (`Trait`) and its associate type mechanism. - -For other virtualization-related modules/crates such as `axvcpu`, `axdevice`, etc., -we also want them to expose well-designed generics, and to converge these carefully crafted generics as subtraits or associated types within the `AxVmHal trait` of `axvm` (since `axvm` is reponsible for VM resource management). - -Ultimately, the `vmm-app` layer will call the relevant functionalities of `ArceOS` to implement them. diff --git a/doc/SMP.md b/doc/SMP.md deleted file mode 100644 index 85fc9686..00000000 --- a/doc/SMP.md +++ /dev/null @@ -1,78 +0,0 @@ -# About SMP support in ArceOS-Hypervisor - -## How to boot Starry and ArceOS on different cores currently - -* Note that Starry and ArceOS themselves are all configured to run on a single core. -* only tested in x86_64 -* refer to [README.md](../README.md) for the preparation of `disk.img`. - -### Guest VM images and configs - -* ArceOS binary image - * repo: https://github.com/arceos-hypervisor/arceos/tree/gvm_sleep - * build: - * `make A=examples/helloworld build` - * copy image: - * `sudo cp /PATH/TO/arceos/examples/helloworld/helloworld_x86_64-qemu-q35.bin DISK/MOUNT/ON/tmp/arceos-x86-sleep.bin` - * config file for vmm available at [arceos-x86_64-sleep.toml](../configs/vms/arceos-x86_64-sleep.toml) - * Note: ArceOS use COM1 at **0x2f8** for serial output. - -* Starry binary image - * repo: https://github.com/arceos-org/starry-next/tree/tick_loop - * build: - * `./scripts/get_deps.sh` - * `make user_apps` - * `make ARCH=x86_64 build` - * copy image: - * `sudo cp /PATH/TO/starry-next/starry-next_x86_64-qemu-q35.bin DISK/MOUNT/ON/tmp/starry-x86_64.bin` - * config file for vmm available at [starry-x86_64.toml](../configs/vms/starry-x86_64.toml) - -### How to run - -* open first terminal - * `make ARCH=x86_64 ACCEL=y VM_CONFIGS=configs/vms/arceos-x86_64-sleep.toml:configs/vms/starry-x86_64.toml SMP=2 SECOND_SERIAL=y run` - * ArceOS-hypervisor itself and Starry-next will print to this terminal. - * `SECOND_SERIAL=y` will make qemu open a second serial port and listen on the socket interface from localhost constrained by the `TELNET_PORT` variable (default is 4321, currently only valid under `qemu_system_x86_64`) - ```bash - qemu-system-x86_64: -serial telnet:localhost:4321,server: info: QEMU waiting for connection on: disconnected:telnet:127.0.0.1:4321,server=on - ``` - -* open another terminal - * `telnet localhost 4321` - * ArceOS as guest VM will print to this terminal. - -## How to boot a guest OS with SMP support - -Currently, the arceos-hypervisor supports booting a guest VM configured with multiple cores (vCPUs). - -> Due to the lack of interrupt virtualization support in this project, each vCPU is currently pinned to a specific physical core. -> Once interrupt virtualization is supported, flexible many-to-many scheduling between vCPUs and physical cores will be enabled. - -### Guest VM images and configs - -Refer to [GuestVMs.md](./GuestVMs.md) for available guest VMs. - -[arceos-aarch64-smp.toml](../configs/vms/arceos-aarch64-smp.toml) and [arceos-riscv64-smp.toml](../configs/vms/arceos-riscv64-smp.toml) provide templates for configuring multiple vCPUs for a guest VM. - -Key configuration options include: -* `cpu_num`: Specifies the number of vCPUs required by the guest VM. -* `phys_cpu_ids`: Represents the physical CPU IDs from the guest VM’s perspective. Due to certain hardware platform requirements with clustered CPU designs, physical CPU IDs may be non-contiguous. This information can be retrieved from the DTB. -* `phys_cpu_sets`: Defines the affinity bitmap for each vCPU, binding it to specific physical CPUs. - * For example, in an SMP configuration with `cpu_num = 2`, if the `phys_cpu_set` for a particular vCPU is set to 0x1 (0b01), that vCPU will only run on physical core 0. If set to 0x3 (0b11), it could be scheduled on either core 0 or core 1. If set to 0x8 (0b1000), it will result in an error due to exceeding the available physical cores. - - Example configuration: - - ```toml - cpu_num = 4 - phys_cpu_ids = [0x00, 0x100, 0x200, 0x300] - phys_cpu_sets = [0x1, 0x2, 0xC, 0xC] - ``` - * In this example, the guest VM is configured with 4 vCPUs. The physical CPU IDs for the vCPUs are 0x00, 0x100, 0x200, and 0x300, respectively. The first vCPU is fixed to run on physical core 0, the second on physical core 1, while the third and fourth vCPUs can be scheduled on either physical core 2 or core 3. - -### How to run - -* example command - - ```bash - make ARCH=aarch64 VM_CONFIGS=configs/vms/arceos-aarch64-smp.toml SMP=2 run - ``` \ No newline at end of file diff --git a/doc/figures/RKDevTool3.3.png b/doc/figures/RKDevTool3.3.png deleted file mode 100644 index d390f4219b81a1752fe22216aff5c200f51c0af5..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 92129 zcmeFY1yr2Nwl3NUPJje=cMqc98-qmln!3lC5K`V7EDe>93Ti1dgK@EG?I67Hj4-2m!`K|X$r^hfJ}fBT@Jqhg?7 zK0!i${6_`LX8-`oLpeG&>JwySObnDq0Av(Yw8u#3j|edch=_HQQ)ck+NyvmjI(nXs zi0N5ecdx{xR9=2TA?@1whNj6WQd&(9Ov|_gItC_Y76FB@x;{o8J`pJmGq-p2uVm${ zZ611|`j_beejmrfp#JCx9Ru^BTpbti2pRCuDHb;J13*Q35bt9oWE5OfG(3D-9u2d& z>JxMVLS89dh)c@&1cI1^j_;Kw=w0HcFO#QQ@wqib^bF>!7>xV^f)9RxDi*J<7_Z)(-Cj2{sTgW{@0~)#fr{#4z3QPAP|B~F8*m%%&5SZBx>EPi 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vmm-app
axstd
axhal
axtask
axvm
axvcpu
axaddrspace
axdevice
ArceOS modules
arm-vcpu
x86-vcpu-vmx
riscv-vcpu
arm-vgic
virtio-devices
x86-vlapic
...
OS-independent crates
OS-independent modules
 \ No newline at end of file diff --git a/doc/old/Boot-on-qemu.md b/doc/old/Boot-on-qemu.md deleted file mode 100644 index da6e7c89..00000000 --- a/doc/old/Boot-on-qemu.md +++ /dev/null @@ -1,48 +0,0 @@ -## Compile AxVisor - -* get deps -```bash -./tool/dev_env.py -cd crates/arceos && git checkout rk3588_jd4_qemu -cd crates/axvm && git checkout ivc -cd crates/axvcpu && git checkout ivc -cd crates/arm_vcpu && git checkout ivc_and_4lpt -cd crates/axaddrspace && git checkout 4_level_paging -cd crates/axhvc && git checkout ivc -cd crates/axdevice && git checkout ivc -cd crates/axvmconfig && git checkout ivc -``` - -* build dtb - -```bash -dtc -o configs/vms/qemu_gicv3.dtb -O dtb -I dts configs/vms/qemu_gicv3.dts -``` - -```bash -make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-qemu-virt-hv.toml defconfig -make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-qemu-virt-hv.toml LOG=debug VM_CONFIGS=configs/vms/linux-qemu-aarch64.toml:configs/vms/arceos-aarch64.toml GICV3=y NET=y SMP=2 run DISK_IMG=configs/vms/ubuntu-22.04-rootfs_ext4.img SECOND_SERIAL=y - -telnet localhost 4321 -``` - -## Test AxVisor IVC - -* Compile arceos ivc tester as guest VM 2 - -repo: https://github.com/arceos-hypervisor/arceos/tree/ivc_tester - -```bash -make ARCH=aarch64 A=examples/ivc_tester defconfig -make ARCH=aarch64 A=examples/ivc_tester build -# You can get `examples/ivc_tester/ivc_tester_aarch64-qemu-virt.bin`, -# whose path should be set to `kernel_path` field in `configs/vms/arceos-aarch64.toml`. -``` - -* Build and install axvisor-driver - -```bash -git clone git@github.com:arceos-hypervisor/axvisor-tools.git --branch ivc -``` - -see its [README](https://github.com/arceos-hypervisor/axvisor-tools/blob/ivc/axvisor-driver/README.md) about how to compile it and how to subscribe messages from guest ArceOS's ivc publisher. diff --git a/doc/old/Boot-on-rk3588.md b/doc/old/Boot-on-rk3588.md deleted file mode 100644 index 58507836..00000000 --- a/doc/old/Boot-on-rk3588.md +++ /dev/null @@ -1,118 +0,0 @@ -# Boot Two Linux VMs on the Firefly AIO-3588JD4 Board - -## Setup TFTP Server - -```bash -sudo apt-get install tftpd-hpa tftp-hpa -sudo chmod 777 /srv/tftp -``` - -Check if TFTP works - -```bash -echo "TFTP Server Test" > /srv/tftp/testfile.txt -tftp localhost -tftp> get testfile.txt -tftp> quit -cat testfile.txt -``` - -You should see `TFTP Server Test` on your screen. - -## Setup rootfs for VM2 - -### SATA disk - -Burn the rootfs image to an **M.2 SATA** SSD with whatever tools you prefer (e.g. dd, rufus, Balena Etcher, or even a loop mount and rsync), and install it to the back of the board. Specify the proper partition identifier (e.g. `/dev/sda1`) in the DTS bootargs. - -The kernel need built with SCSI disk, libata and AHCI platform support, or the corresponding kernel modules need to be put into the initramfs image. The default config in the Firefly SDK builds them as kernel modules but are not included in the initramfs image, hence the kernel failed to recognize the disk and mount the root partition. - -### NFS-root (optional) - -This works when directly attached storage is not available for VM2. - -Setup an NFS server: - -```bash -sudo apt install nfs-kernel-server -sudo mkdir -p /srv/nfs/firefly-rootfs -# Download rootfs image from firefly wiki, assume rootfs.img -# expand image and partition -sudo dd if=/dev/zero of=rootfs.img bs=1M count=0 seek=16384 -# ... will show which loop device the image is mounted on, assume loopX -sudo losetup -f --show rootfs.img -sudo e2fsck -f /dev/loopX && sudo resize2fs /dev/loopX -sudo losetup -D /dev/loopX -# now mount the image file to rootfs path -sudo mount -t loop rootfs.img /srv/nfs/firefly-rootfs -# Add to NFS exports -sudo cat <> /etc/exports -/srv/nfs 192.168.XXX.0/24(rw,async,no_subtree_check,fsid=0) -/srv/nfs/firefly-rootfs 192.168.XXX.0/24(rw,async,no_subtree_check,no_root_squash) -EOF -sudo exportfs -ar -``` - -Before compiling the DTS, edit the bootargs in `aio-rk3588-jd4-vm2.dts` and specify an NFS root as `root=/dev/nfs nfsroot=:` where `:` is your own NFS server IP and rootfs export path setup in the previous step. - -## Compile device tree - -```bash -dtc -o configs/vms/aio-rk3588-jd4-vm1.dtb -O dtb -I dts configs/vms/aio-rk3588-jd4-vm1.dts -dtc -o configs/vms/aio-rk3588-jd4-vm2.dtb -O dtb -I dts configs/vms/aio-rk3588-jd4-vm2.dts -``` - -## Prepare Linux kernel binary - -Prepare RK3588 SDK following manufacturer's instruction, checkout the Linux kernel repository to this branch: https://github.com/arceos-hypervisor/firefly-linux-bsp/tree/axvisor-rk3588-jd4-rt89, then build the kernel. This branch has PREEMPT_RT patches and native SCS, SATA and AHCI support, bootable on both VMs. - -Copy the kernel and ramdisk image to AxVisor directory: - -```bash -scp xxx@192.168.xxx.xxx:/home/xxx/firefly_rk3588_SDK/kernel/arch/arm64/boot/Image configs/vms/Image.bin -scp xxx@192.168.xxx.xxx:/home/xxx/firefly_rk3588_SDK/kernel/ramdisk.img configs/vms/ramdisk.img -``` - -## Compile AxVisor - -* get deps - -```bash -./tool/dev_env.py -cd crates/arceos && git checkout rk3588_jd4 -``` - -* compile - -```bash -make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-rk3588j-hv.toml SMP=4 defconfig -make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-rk3588j-hv.toml SMP=4 VM_CONFIGS=configs/vms/linux-rk3588-aarch64-smp-vm1.toml:configs/vms/linux-rk3588-aarch64-smp-vm2.toml LOG=debug GICV3=y upload -``` - -* copy to tftp dir (make xxx upload will copy the image to `/srv/tftp/axvisor` automatically) - -```bash -cp axvisor_aarch64-rk3588j.img /srv/tftp/axvisor -``` - -## rk3588 console - -上电，在 uboot 中 ctrl+C - -```bash -# 这是 tftp 服务器所在的主机 ip -setenv serverip 192.168.50.97 -# 这是 rk3588 所在设备的 ip (Firefly Linux 自己 DHCP 拿到的地址) -setenv ipaddr 192.168.50.8 -# 使用 tftp 加载镜像到指定内存地址并 boot -setenv serverip 192.168.50.97;setenv ipaddr 192.168.50.8;tftp 0x00480000 ${serverip}:axvisor;tftp 0x10000000 ${serverip}:rk3588_dtb.bin;bootm 0x00480000 - 0x10000000; -``` - -The VM2 will wait for several seconds before boot to allow VM1 to setup clocks of the whole SoC first. - -The VM1 output goes to the RS232 on the board (ttyS1 in Linux and serial@feb40000 in the device tree), and the VM2 output goes to the USB Type-C (ttyS2/ttyFIQ0 in Linux and serial@feb5000 in the device tree). - -## Known Issues - -* Resets of the ethernet in VM2 is not working, and reconfigure the NIC (e.g. with NetworkManager) may cause the VM2 to hang. Currently the initramfs will attempt to autoconfig the eth port when NFS-root is used. You may override the configuration with `ip=` kernel bootarg. -* Execute `reboot` in either VM would reset the whole board, which may be unexpected for the other VM. You may `shutdown` VM2 first, then do shutdown or reboot in VM1. diff --git "a/doc/Shell\346\250\241\345\235\227\344\273\213\347\273\215.md" b/doc/shell.md similarity index 100% rename from "doc/Shell\346\250\241\345\235\227\344\273\213\347\273\215.md" rename to doc/shell.md From bc1f89a3e333e089be9fdb59fcd2f38d2f2daf9b Mon Sep 17 00:00:00 2001 From: ZCShou <72115@163.com> Date: Tue, 30 Sep 2025 01:15:17 +0000 Subject: [PATCH 4/4] clean quick-start.sh due to no completation --- quick-start.sh | 13 ------------- 1 file changed, 13 deletions(-) delete mode 100755 quick-start.sh diff --git a/quick-start.sh b/quick-start.sh deleted file mode 100755 index 8496b879..00000000 --- a/quick-start.sh +++ /dev/null @@ -1,13 +0,0 @@ -#!/bin/bash -guestos=$1 -current_path=$(pwd) -arceos_config_path="./tmp/arceos-aarch64.toml" -arceos_kernel_path="$current_path/tmp/arceos_aarch64-dyn.bin" -arceos_img_path="https://raw.githubusercontent.com/arceos-hypervisor/axvisor-guest/main/IMAGES/arceos/arceos_aarch64-dyn.bin" - -mkdir -p ./tmp -wget -O ./tmp/arceos_aarch64-dyn.bin $arceos_img_path -cp $current_path/configs/vms/arceos-aarch64.toml ./tmp -sed -i 's|^kernel_path =.*|kernel_path = $arceos_kernel_path|' "$arceos_config_path" -./axvisor.sh run --plat aarch64-generic --arceos-args "LOG=info,SMP=4" --features "ept-level-4" --vmconfigs "$arceos_config_path" -rm -rf tmp \ No newline at end of file